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TARGET_MAX32600MBED/TOOLCHAIN_IAR/tpu_regs.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 171:3a7713b1edbc | 1 | /******************************************************************************* |
AnnaBridge | 171:3a7713b1edbc | 2 | * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved. |
AnnaBridge | 171:3a7713b1edbc | 3 | * |
AnnaBridge | 171:3a7713b1edbc | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
AnnaBridge | 171:3a7713b1edbc | 5 | * copy of this software and associated documentation files (the "Software"), |
AnnaBridge | 171:3a7713b1edbc | 6 | * to deal in the Software without restriction, including without limitation |
AnnaBridge | 171:3a7713b1edbc | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
AnnaBridge | 171:3a7713b1edbc | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
AnnaBridge | 171:3a7713b1edbc | 9 | * Software is furnished to do so, subject to the following conditions: |
AnnaBridge | 171:3a7713b1edbc | 10 | * |
AnnaBridge | 171:3a7713b1edbc | 11 | * The above copyright notice and this permission notice shall be included |
AnnaBridge | 171:3a7713b1edbc | 12 | * in all copies or substantial portions of the Software. |
AnnaBridge | 171:3a7713b1edbc | 13 | * |
AnnaBridge | 171:3a7713b1edbc | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
AnnaBridge | 171:3a7713b1edbc | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
AnnaBridge | 171:3a7713b1edbc | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
AnnaBridge | 171:3a7713b1edbc | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
AnnaBridge | 171:3a7713b1edbc | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
AnnaBridge | 171:3a7713b1edbc | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
AnnaBridge | 171:3a7713b1edbc | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
AnnaBridge | 171:3a7713b1edbc | 21 | * |
AnnaBridge | 171:3a7713b1edbc | 22 | * Except as contained in this notice, the name of Maxim Integrated |
AnnaBridge | 171:3a7713b1edbc | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
AnnaBridge | 171:3a7713b1edbc | 24 | * Products, Inc. Branding Policy. |
AnnaBridge | 171:3a7713b1edbc | 25 | * |
AnnaBridge | 171:3a7713b1edbc | 26 | * The mere transfer of this software does not imply any licenses |
AnnaBridge | 171:3a7713b1edbc | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
AnnaBridge | 171:3a7713b1edbc | 28 | * trademarks, maskwork rights, or any other form of intellectual |
AnnaBridge | 171:3a7713b1edbc | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
AnnaBridge | 171:3a7713b1edbc | 30 | * ownership rights. |
AnnaBridge | 171:3a7713b1edbc | 31 | ******************************************************************************* |
AnnaBridge | 171:3a7713b1edbc | 32 | */ |
AnnaBridge | 171:3a7713b1edbc | 33 | |
AnnaBridge | 171:3a7713b1edbc | 34 | #ifndef _MXC_TPU_REGS_H_ |
AnnaBridge | 171:3a7713b1edbc | 35 | #define _MXC_TPU_REGS_H_ |
AnnaBridge | 171:3a7713b1edbc | 36 | |
AnnaBridge | 171:3a7713b1edbc | 37 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 38 | extern "C" { |
AnnaBridge | 171:3a7713b1edbc | 39 | #endif |
AnnaBridge | 171:3a7713b1edbc | 40 | |
AnnaBridge | 171:3a7713b1edbc | 41 | #include <stdint.h> |
AnnaBridge | 171:3a7713b1edbc | 42 | |
AnnaBridge | 171:3a7713b1edbc | 43 | /** |
AnnaBridge | 171:3a7713b1edbc | 44 | * @file tpu_regs.h |
AnnaBridge | 171:3a7713b1edbc | 45 | * @addtogroup tpu TPU |
AnnaBridge | 171:3a7713b1edbc | 46 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 47 | */ |
AnnaBridge | 171:3a7713b1edbc | 48 | |
AnnaBridge | 171:3a7713b1edbc | 49 | /* Offset Register Description |
AnnaBridge | 171:3a7713b1edbc | 50 | ====== ================================================== */ |
AnnaBridge | 171:3a7713b1edbc | 51 | typedef struct { |
AnnaBridge | 171:3a7713b1edbc | 52 | __I uint32_t rsv0000; /* 0x0000 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 53 | __I uint32_t rsv0004; /* 0x0004 Reserved - PUF Control (Deprecated) */ |
AnnaBridge | 171:3a7713b1edbc | 54 | __I uint32_t rsv0008; /* 0x0008 Reserved - PUF Output (Deprecated) */ |
AnnaBridge | 171:3a7713b1edbc | 55 | __I uint32_t rsv000C[125]; /* 0x000C */ |
AnnaBridge | 171:3a7713b1edbc | 56 | __IO uint32_t prng_user_entropy; /* 0x0200 PRNG User Entropy Value */ |
AnnaBridge | 171:3a7713b1edbc | 57 | __IO uint32_t prng_rnd_num; /* 0x0204 PRNG Random Number Output */ |
AnnaBridge | 171:3a7713b1edbc | 58 | } mxc_tpu_regs_t; |
AnnaBridge | 171:3a7713b1edbc | 59 | |
AnnaBridge | 171:3a7713b1edbc | 60 | /* Offset Register Description |
AnnaBridge | 171:3a7713b1edbc | 61 | ====== ================================================= */ |
AnnaBridge | 171:3a7713b1edbc | 62 | typedef struct { |
AnnaBridge | 171:3a7713b1edbc | 63 | __IO uint32_t status; /* 0x0000 Dynamic Tamper Sensor Status */ |
AnnaBridge | 171:3a7713b1edbc | 64 | __IO uint32_t ctrl0; /* 0x0004 Dynamic Tamper Sensor Control 0 */ |
AnnaBridge | 171:3a7713b1edbc | 65 | __IO uint32_t ctrl1; /* 0x0008 Dynamic Tamper Sensor Control 1 */ |
AnnaBridge | 171:3a7713b1edbc | 66 | __IO uint32_t sks0; /* 0x0010 TPU Secure Key Storage Register 0 */ |
AnnaBridge | 171:3a7713b1edbc | 67 | __IO uint32_t sks1; /* 0x0014 TPU Secure Key Storage Register 0 */ |
AnnaBridge | 171:3a7713b1edbc | 68 | __IO uint32_t sks2; /* 0x0018 TPU Secure Key Storage Register 0 */ |
AnnaBridge | 171:3a7713b1edbc | 69 | __IO uint32_t sks3; /* 0x001C TPU Secure Key Storage Register 0 */ |
AnnaBridge | 171:3a7713b1edbc | 70 | } mxc_tpu_tsr_regs_t; |
AnnaBridge | 171:3a7713b1edbc | 71 | |
AnnaBridge | 171:3a7713b1edbc | 72 | /* |
AnnaBridge | 171:3a7713b1edbc | 73 | Register offsets for module TPU. |
AnnaBridge | 171:3a7713b1edbc | 74 | */ |
AnnaBridge | 171:3a7713b1edbc | 75 | #define MXC_R_TPU_OFFS_PRNG_USER_ENTROPY ((uint32_t)0x00000200UL) |
AnnaBridge | 171:3a7713b1edbc | 76 | #define MXC_R_TPU_OFFS_PRNG_RND_NUM ((uint32_t)0x00000204UL) |
AnnaBridge | 171:3a7713b1edbc | 77 | #define MXC_R_TPU_TSR_OFFS_STATUS ((uint32_t)0x00000000UL) |
AnnaBridge | 171:3a7713b1edbc | 78 | #define MXC_R_TPU_TSR_OFFS_CTRL0 ((uint32_t)0x00000004UL) |
AnnaBridge | 171:3a7713b1edbc | 79 | #define MXC_R_TPU_TSR_OFFS_CTRL1 ((uint32_t)0x00000008UL) |
AnnaBridge | 171:3a7713b1edbc | 80 | #define MXC_R_TPU_TSR_OFFS_SKS0 ((uint32_t)0x00000010UL) |
AnnaBridge | 171:3a7713b1edbc | 81 | #define MXC_R_TPU_TSR_OFFS_SKS1 ((uint32_t)0x00000014UL) |
AnnaBridge | 171:3a7713b1edbc | 82 | #define MXC_R_TPU_TSR_OFFS_SKS2 ((uint32_t)0x00000018UL) |
AnnaBridge | 171:3a7713b1edbc | 83 | #define MXC_R_TPU_TSR_OFFS_SKS3 ((uint32_t)0x0000001CUL) |
AnnaBridge | 171:3a7713b1edbc | 84 | |
AnnaBridge | 171:3a7713b1edbc | 85 | |
AnnaBridge | 171:3a7713b1edbc | 86 | /* |
AnnaBridge | 171:3a7713b1edbc | 87 | Field positions and masks for module TPU. |
AnnaBridge | 171:3a7713b1edbc | 88 | */ |
AnnaBridge | 171:3a7713b1edbc | 89 | #define MXC_F_TPU_CTRL0_ERR_THR_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 90 | #define MXC_F_TPU_CTRL0_ERR_THR ((uint32_t)(0x0000001FUL << MXC_F_TPU_CTRL0_ERR_THR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 91 | #define MXC_F_TPU_CTRL0_OUT_FREQ_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 92 | #define MXC_F_TPU_CTRL0_OUT_FREQ ((uint32_t)(0x00000007UL << MXC_F_TPU_CTRL0_OUT_FREQ_POS)) |
AnnaBridge | 171:3a7713b1edbc | 93 | #define MXC_F_TPU_CTRL0_CLOCK_DIV_POS 8 |
AnnaBridge | 171:3a7713b1edbc | 94 | #define MXC_F_TPU_CTRL0_CLOCK_DIV ((uint32_t)(0x00000007UL << MXC_F_TPU_CTRL0_CLOCK_DIV_POS)) |
AnnaBridge | 171:3a7713b1edbc | 95 | #define MXC_F_TPU_CTRL0_RTC_TX_BUSY_POS 14 |
AnnaBridge | 171:3a7713b1edbc | 96 | #define MXC_F_TPU_CTRL0_RTC_TX_BUSY ((uint32_t)(0x00000001UL << MXC_F_TPU_CTRL0_RTC_TX_BUSY_POS)) |
AnnaBridge | 171:3a7713b1edbc | 97 | #define MXC_F_TPU_CTRL0_LOCK_POS 15 |
AnnaBridge | 171:3a7713b1edbc | 98 | #define MXC_F_TPU_CTRL0_LOCK ((uint32_t)(0x00000001UL << MXC_F_TPU_CTRL0_LOCK_POS)) |
AnnaBridge | 171:3a7713b1edbc | 99 | |
AnnaBridge | 171:3a7713b1edbc | 100 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 101 | } |
AnnaBridge | 171:3a7713b1edbc | 102 | #endif |
AnnaBridge | 171:3a7713b1edbc | 103 | |
AnnaBridge | 171:3a7713b1edbc | 104 | /** |
AnnaBridge | 171:3a7713b1edbc | 105 | * @} |
AnnaBridge | 171:3a7713b1edbc | 106 | */ |
AnnaBridge | 171:3a7713b1edbc | 107 | |
AnnaBridge | 171:3a7713b1edbc | 108 | #endif /* _MXC_TPU_REGS_H_ */ |