The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
TARGET_LPC546XX/TOOLCHAIN_ARM_STD/fsl_mcan.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 171:3a7713b1edbc | 1 | /* |
AnnaBridge | 171:3a7713b1edbc | 2 | * The Clear BSD License |
AnnaBridge | 171:3a7713b1edbc | 3 | * Copyright (c) 2016, Freescale Semiconductor, Inc. |
AnnaBridge | 171:3a7713b1edbc | 4 | * Copyright 2016-2017 NXP |
AnnaBridge | 171:3a7713b1edbc | 5 | * All rights reserved. |
AnnaBridge | 171:3a7713b1edbc | 6 | * |
AnnaBridge | 171:3a7713b1edbc | 7 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 171:3a7713b1edbc | 8 | * are permitted (subject to the limitations in the disclaimer below) provided |
AnnaBridge | 171:3a7713b1edbc | 9 | * that the following conditions are met: |
AnnaBridge | 171:3a7713b1edbc | 10 | * |
AnnaBridge | 171:3a7713b1edbc | 11 | * o Redistributions of source code must retain the above copyright notice, this list |
AnnaBridge | 171:3a7713b1edbc | 12 | * of conditions and the following disclaimer. |
AnnaBridge | 171:3a7713b1edbc | 13 | * |
AnnaBridge | 171:3a7713b1edbc | 14 | * o Redistributions in binary form must reproduce the above copyright notice, this |
AnnaBridge | 171:3a7713b1edbc | 15 | * list of conditions and the following disclaimer in the documentation and/or |
AnnaBridge | 171:3a7713b1edbc | 16 | * other materials provided with the distribution. |
AnnaBridge | 171:3a7713b1edbc | 17 | * |
AnnaBridge | 171:3a7713b1edbc | 18 | * o Neither the name of the copyright holder nor the names of its |
AnnaBridge | 171:3a7713b1edbc | 19 | * contributors may be used to endorse or promote products derived from this |
AnnaBridge | 171:3a7713b1edbc | 20 | * software without specific prior written permission. |
AnnaBridge | 171:3a7713b1edbc | 21 | * |
AnnaBridge | 171:3a7713b1edbc | 22 | * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. |
AnnaBridge | 171:3a7713b1edbc | 23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
AnnaBridge | 171:3a7713b1edbc | 24 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
AnnaBridge | 171:3a7713b1edbc | 25 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 171:3a7713b1edbc | 26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
AnnaBridge | 171:3a7713b1edbc | 27 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
AnnaBridge | 171:3a7713b1edbc | 28 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
AnnaBridge | 171:3a7713b1edbc | 29 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
AnnaBridge | 171:3a7713b1edbc | 30 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
AnnaBridge | 171:3a7713b1edbc | 31 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
AnnaBridge | 171:3a7713b1edbc | 32 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 171:3a7713b1edbc | 33 | */ |
AnnaBridge | 171:3a7713b1edbc | 34 | #ifndef _FSL_MCAN_H_ |
AnnaBridge | 171:3a7713b1edbc | 35 | #define _FSL_MCAN_H_ |
AnnaBridge | 171:3a7713b1edbc | 36 | |
AnnaBridge | 171:3a7713b1edbc | 37 | #include "fsl_common.h" |
AnnaBridge | 171:3a7713b1edbc | 38 | |
AnnaBridge | 171:3a7713b1edbc | 39 | /*! |
AnnaBridge | 171:3a7713b1edbc | 40 | * @addtogroup mcan |
AnnaBridge | 171:3a7713b1edbc | 41 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 42 | */ |
AnnaBridge | 171:3a7713b1edbc | 43 | |
AnnaBridge | 171:3a7713b1edbc | 44 | /****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 45 | * Definitions |
AnnaBridge | 171:3a7713b1edbc | 46 | *****************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 47 | |
AnnaBridge | 171:3a7713b1edbc | 48 | /*! @name Driver version */ |
AnnaBridge | 171:3a7713b1edbc | 49 | /*@{*/ |
AnnaBridge | 171:3a7713b1edbc | 50 | /*! @brief MCAN driver version 2.0.1. */ |
AnnaBridge | 171:3a7713b1edbc | 51 | #define MCAN_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) |
AnnaBridge | 171:3a7713b1edbc | 52 | /*@}*/ |
AnnaBridge | 171:3a7713b1edbc | 53 | |
AnnaBridge | 171:3a7713b1edbc | 54 | /*! @brief MCAN transfer status. */ |
AnnaBridge | 171:3a7713b1edbc | 55 | enum _mcan_status |
AnnaBridge | 171:3a7713b1edbc | 56 | { |
AnnaBridge | 171:3a7713b1edbc | 57 | kStatus_MCAN_TxBusy = MAKE_STATUS(kStatusGroup_MCAN, 0), /*!< Tx Buffer is Busy. */ |
AnnaBridge | 171:3a7713b1edbc | 58 | kStatus_MCAN_TxIdle = MAKE_STATUS(kStatusGroup_MCAN, 1), /*!< Tx Buffer is Idle. */ |
AnnaBridge | 171:3a7713b1edbc | 59 | kStatus_MCAN_RxBusy = MAKE_STATUS(kStatusGroup_MCAN, 2), /*!< Rx Buffer is Busy. */ |
AnnaBridge | 171:3a7713b1edbc | 60 | kStatus_MCAN_RxIdle = MAKE_STATUS(kStatusGroup_MCAN, 3), /*!< Rx Buffer is Idle. */ |
AnnaBridge | 171:3a7713b1edbc | 61 | kStatus_MCAN_RxFifo0New = MAKE_STATUS(kStatusGroup_MCAN, 4), /*!< New message written to Rx FIFO 0. */ |
AnnaBridge | 171:3a7713b1edbc | 62 | kStatus_MCAN_RxFifo0Idle = MAKE_STATUS(kStatusGroup_MCAN, 5), /*!< Rx FIFO 0 is Idle. */ |
AnnaBridge | 171:3a7713b1edbc | 63 | kStatus_MCAN_RxFifo0Watermark = MAKE_STATUS(kStatusGroup_MCAN, 6), /*!< Rx FIFO 0 fill level reached watermark. */ |
AnnaBridge | 171:3a7713b1edbc | 64 | kStatus_MCAN_RxFifo0Full = MAKE_STATUS(kStatusGroup_MCAN, 7), /*!< Rx FIFO 0 full. */ |
AnnaBridge | 171:3a7713b1edbc | 65 | kStatus_MCAN_RxFifo0Lost = MAKE_STATUS(kStatusGroup_MCAN, 8), /*!< Rx FIFO 0 message lost. */ |
AnnaBridge | 171:3a7713b1edbc | 66 | kStatus_MCAN_RxFifo1New = MAKE_STATUS(kStatusGroup_MCAN, 9), /*!< New message written to Rx FIFO 1. */ |
AnnaBridge | 171:3a7713b1edbc | 67 | kStatus_MCAN_RxFifo1Idle = MAKE_STATUS(kStatusGroup_MCAN, 10), /*!< Rx FIFO 1 is Idle. */ |
AnnaBridge | 171:3a7713b1edbc | 68 | kStatus_MCAN_RxFifo1Watermark = MAKE_STATUS(kStatusGroup_MCAN, 11), /*!< Rx FIFO 1 fill level reached watermark. */ |
AnnaBridge | 171:3a7713b1edbc | 69 | kStatus_MCAN_RxFifo1Full = MAKE_STATUS(kStatusGroup_MCAN, 12), /*!< Rx FIFO 1 full. */ |
AnnaBridge | 171:3a7713b1edbc | 70 | kStatus_MCAN_RxFifo1Lost = MAKE_STATUS(kStatusGroup_MCAN, 13), /*!< Rx FIFO 1 message lost. */ |
AnnaBridge | 171:3a7713b1edbc | 71 | kStatus_MCAN_RxFifo0Busy = MAKE_STATUS(kStatusGroup_MCAN, 14), /*!< Rx FIFO 0 is busy. */ |
AnnaBridge | 171:3a7713b1edbc | 72 | kStatus_MCAN_RxFifo1Busy = MAKE_STATUS(kStatusGroup_MCAN, 15), /*!< Rx FIFO 1 is busy. */ |
AnnaBridge | 171:3a7713b1edbc | 73 | kStatus_MCAN_ErrorStatus = MAKE_STATUS(kStatusGroup_MCAN, 16), /*!< MCAN Module Error and Status. */ |
AnnaBridge | 171:3a7713b1edbc | 74 | kStatus_MCAN_UnHandled = MAKE_STATUS(kStatusGroup_MCAN, 17), /*!< UnHadled Interrupt asserted. */ |
AnnaBridge | 171:3a7713b1edbc | 75 | }; |
AnnaBridge | 171:3a7713b1edbc | 76 | |
AnnaBridge | 171:3a7713b1edbc | 77 | /*! |
AnnaBridge | 171:3a7713b1edbc | 78 | * @brief MCAN status flags. |
AnnaBridge | 171:3a7713b1edbc | 79 | * |
AnnaBridge | 171:3a7713b1edbc | 80 | * This provides constants for the MCAN status flags for use in the MCAN functions. |
AnnaBridge | 171:3a7713b1edbc | 81 | * Note: The CPU read action clears MCAN_ErrorFlag, therefore user need to |
AnnaBridge | 171:3a7713b1edbc | 82 | * read MCAN_ErrorFlag and distinguish which error is occur using |
AnnaBridge | 171:3a7713b1edbc | 83 | * @ref _mcan_error_flags enumerations. |
AnnaBridge | 171:3a7713b1edbc | 84 | */ |
AnnaBridge | 171:3a7713b1edbc | 85 | enum _mcan_flags |
AnnaBridge | 171:3a7713b1edbc | 86 | { |
AnnaBridge | 171:3a7713b1edbc | 87 | kMCAN_AccesstoRsvdFlag = CAN_IR_ARA_MASK, /*!< CAN Synchronization Status. */ |
AnnaBridge | 171:3a7713b1edbc | 88 | kMCAN_ProtocolErrDIntFlag = CAN_IR_PED_MASK, /*!< Tx Warning Interrupt Flag. */ |
AnnaBridge | 171:3a7713b1edbc | 89 | kMCAN_ProtocolErrAIntFlag = CAN_IR_PEA_MASK, /*!< Rx Warning Interrupt Flag. */ |
AnnaBridge | 171:3a7713b1edbc | 90 | kMCAN_BusOffIntFlag = CAN_IR_BO_MASK, /*!< Tx Error Warning Status. */ |
AnnaBridge | 171:3a7713b1edbc | 91 | kMCAN_ErrorWarningIntFlag = CAN_IR_EW_MASK, /*!< Rx Error Warning Status. */ |
AnnaBridge | 171:3a7713b1edbc | 92 | kMCAN_ErrorPassiveIntFlag = CAN_IR_EP_MASK, /*!< Rx Error Warning Status. */ |
AnnaBridge | 171:3a7713b1edbc | 93 | }; |
AnnaBridge | 171:3a7713b1edbc | 94 | |
AnnaBridge | 171:3a7713b1edbc | 95 | /*! |
AnnaBridge | 171:3a7713b1edbc | 96 | * @brief MCAN Rx FIFO status flags. |
AnnaBridge | 171:3a7713b1edbc | 97 | * |
AnnaBridge | 171:3a7713b1edbc | 98 | * The MCAN Rx FIFO Status enumerations are used to determine the status of the |
AnnaBridge | 171:3a7713b1edbc | 99 | * Rx FIFO. |
AnnaBridge | 171:3a7713b1edbc | 100 | */ |
AnnaBridge | 171:3a7713b1edbc | 101 | enum _mcan_rx_fifo_flags |
AnnaBridge | 171:3a7713b1edbc | 102 | { |
AnnaBridge | 171:3a7713b1edbc | 103 | kMCAN_RxFifo0NewFlag = CAN_IR_RF0N_MASK, /*!< Rx FIFO 0 new message flag. */ |
AnnaBridge | 171:3a7713b1edbc | 104 | kMCAN_RxFifo0WatermarkFlag = CAN_IR_RF0W_MASK, /*!< Rx FIFO 0 watermark reached flag. */ |
AnnaBridge | 171:3a7713b1edbc | 105 | kMCAN_RxFifo0FullFlag = CAN_IR_RF0F_MASK, /*!< Rx FIFO 0 full flag. */ |
AnnaBridge | 171:3a7713b1edbc | 106 | kMCAN_RxFifo0LostFlag = CAN_IR_RF0L_MASK, /*!< Rx FIFO 0 message lost flag. */ |
AnnaBridge | 171:3a7713b1edbc | 107 | kMCAN_RxFifo1NewFlag = CAN_IR_RF1N_MASK, /*!< Rx FIFO 0 new message flag. */ |
AnnaBridge | 171:3a7713b1edbc | 108 | kMCAN_RxFifo1WatermarkFlag = CAN_IR_RF1W_MASK, /*!< Rx FIFO 0 watermark reached flag. */ |
AnnaBridge | 171:3a7713b1edbc | 109 | kMCAN_RxFifo1FullFlag = CAN_IR_RF1F_MASK, /*!< Rx FIFO 0 full flag. */ |
AnnaBridge | 171:3a7713b1edbc | 110 | kMCAN_RxFifo1LostFlag = CAN_IR_RF1L_MASK, /*!< Rx FIFO 0 message lost flag. */ |
AnnaBridge | 171:3a7713b1edbc | 111 | }; |
AnnaBridge | 171:3a7713b1edbc | 112 | |
AnnaBridge | 171:3a7713b1edbc | 113 | /*! |
AnnaBridge | 171:3a7713b1edbc | 114 | * @brief MCAN Tx status flags. |
AnnaBridge | 171:3a7713b1edbc | 115 | * |
AnnaBridge | 171:3a7713b1edbc | 116 | * The MCAN Tx Status enumerations are used to determine the status of the |
AnnaBridge | 171:3a7713b1edbc | 117 | * Tx Buffer/Event FIFO. |
AnnaBridge | 171:3a7713b1edbc | 118 | */ |
AnnaBridge | 171:3a7713b1edbc | 119 | enum _mcan_tx_flags |
AnnaBridge | 171:3a7713b1edbc | 120 | { |
AnnaBridge | 171:3a7713b1edbc | 121 | kMCAN_TxTransmitCompleteFlag = CAN_IR_TC_MASK, /*!< Transmission completed flag. */ |
AnnaBridge | 171:3a7713b1edbc | 122 | kMCAN_TxTransmitCancelFinishFlag = CAN_IR_TCF_MASK, /*!< Transmission cancellation finished flag. */ |
AnnaBridge | 171:3a7713b1edbc | 123 | kMCAN_TxEventFifoLostFlag = CAN_IR_TEFL_MASK, /*!< Tx Event FIFO element lost. */ |
AnnaBridge | 171:3a7713b1edbc | 124 | kMCAN_TxEventFifoFullFlag = CAN_IR_TEFF_MASK, /*!< Tx Event FIFO full. */ |
AnnaBridge | 171:3a7713b1edbc | 125 | kMCAN_TxEventFifoWatermarkFlag = CAN_IR_TEFW_MASK, /*!< Tx Event FIFO fill level reached watermark. */ |
AnnaBridge | 171:3a7713b1edbc | 126 | kMCAN_TxEventFifoNewFlag = CAN_IR_TEFN_MASK, /*!< Tx Handler wrote Tx Event FIFO element flag. */ |
AnnaBridge | 171:3a7713b1edbc | 127 | kMCAN_TxEventFifoEmptyFlag = CAN_IR_TFE_MASK, /*!< Tx FIFO empty flag. */ |
AnnaBridge | 171:3a7713b1edbc | 128 | }; |
AnnaBridge | 171:3a7713b1edbc | 129 | |
AnnaBridge | 171:3a7713b1edbc | 130 | /*! |
AnnaBridge | 171:3a7713b1edbc | 131 | * @brief MCAN interrupt configuration structure, default settings all disabled. |
AnnaBridge | 171:3a7713b1edbc | 132 | * |
AnnaBridge | 171:3a7713b1edbc | 133 | * This structure contains the settings for all of the MCAN Module interrupt configurations. |
AnnaBridge | 171:3a7713b1edbc | 134 | */ |
AnnaBridge | 171:3a7713b1edbc | 135 | enum _mcan_interrupt_enable |
AnnaBridge | 171:3a7713b1edbc | 136 | { |
AnnaBridge | 171:3a7713b1edbc | 137 | kMCAN_BusOffInterruptEnable = CAN_IE_BOE_MASK, /*!< Bus Off interrupt. */ |
AnnaBridge | 171:3a7713b1edbc | 138 | kMCAN_ErrorInterruptEnable = CAN_IE_EPE_MASK, /*!< Error interrupt. */ |
AnnaBridge | 171:3a7713b1edbc | 139 | kMCAN_WarningInterruptEnable = CAN_IE_EWE_MASK, /*!< Rx Warning interrupt. */ |
AnnaBridge | 171:3a7713b1edbc | 140 | }; |
AnnaBridge | 171:3a7713b1edbc | 141 | |
AnnaBridge | 171:3a7713b1edbc | 142 | /*! @brief MCAN frame format. */ |
AnnaBridge | 171:3a7713b1edbc | 143 | typedef enum _mcan_frame_idformat |
AnnaBridge | 171:3a7713b1edbc | 144 | { |
AnnaBridge | 171:3a7713b1edbc | 145 | kMCAN_FrameIDStandard = 0x0U, /*!< Standard frame format attribute. */ |
AnnaBridge | 171:3a7713b1edbc | 146 | kMCAN_FrameIDExtend = 0x1U, /*!< Extend frame format attribute. */ |
AnnaBridge | 171:3a7713b1edbc | 147 | } mcan_frame_idformat_t; |
AnnaBridge | 171:3a7713b1edbc | 148 | |
AnnaBridge | 171:3a7713b1edbc | 149 | /*! @brief MCAN frame type. */ |
AnnaBridge | 171:3a7713b1edbc | 150 | typedef enum _mcan_frame_type |
AnnaBridge | 171:3a7713b1edbc | 151 | { |
AnnaBridge | 171:3a7713b1edbc | 152 | kMCAN_FrameTypeData = 0x0U, /*!< Data frame type attribute. */ |
AnnaBridge | 171:3a7713b1edbc | 153 | kMCAN_FrameTypeRemote = 0x1U, /*!< Remote frame type attribute. */ |
AnnaBridge | 171:3a7713b1edbc | 154 | } mcan_frame_type_t; |
AnnaBridge | 171:3a7713b1edbc | 155 | |
AnnaBridge | 171:3a7713b1edbc | 156 | /*! @brief MCAN frame datafield size. */ |
AnnaBridge | 171:3a7713b1edbc | 157 | typedef enum _mcan_bytes_in_datafield |
AnnaBridge | 171:3a7713b1edbc | 158 | { |
AnnaBridge | 171:3a7713b1edbc | 159 | kMCAN_8ByteDatafield = 0x0U, /*!< 8 byte data field. */ |
AnnaBridge | 171:3a7713b1edbc | 160 | kMCAN_12ByteDatafield = 0x1U, /*!< 12 byte data field. */ |
AnnaBridge | 171:3a7713b1edbc | 161 | kMCAN_16ByteDatafield = 0x2U, /*!< 16 byte data field. */ |
AnnaBridge | 171:3a7713b1edbc | 162 | kMCAN_20ByteDatafield = 0x3U, /*!< 20 byte data field. */ |
AnnaBridge | 171:3a7713b1edbc | 163 | kMCAN_24ByteDatafield = 0x4U, /*!< 24 byte data field. */ |
AnnaBridge | 171:3a7713b1edbc | 164 | kMCAN_32ByteDatafield = 0x5U, /*!< 32 byte data field. */ |
AnnaBridge | 171:3a7713b1edbc | 165 | kMCAN_48ByteDatafield = 0x6U, /*!< 48 byte data field. */ |
AnnaBridge | 171:3a7713b1edbc | 166 | kMCAN_64ByteDatafield = 0x7U, /*!< 64 byte data field. */ |
AnnaBridge | 171:3a7713b1edbc | 167 | } mcan_bytes_in_datafield_t; |
AnnaBridge | 171:3a7713b1edbc | 168 | |
AnnaBridge | 171:3a7713b1edbc | 169 | #if defined(__CC_ARM) |
AnnaBridge | 171:3a7713b1edbc | 170 | #pragma anon_unions |
AnnaBridge | 171:3a7713b1edbc | 171 | #endif |
AnnaBridge | 171:3a7713b1edbc | 172 | /*! @brief MCAN Tx Buffer structure. */ |
AnnaBridge | 171:3a7713b1edbc | 173 | typedef struct _mcan_tx_buffer_frame |
AnnaBridge | 171:3a7713b1edbc | 174 | { |
AnnaBridge | 171:3a7713b1edbc | 175 | struct |
AnnaBridge | 171:3a7713b1edbc | 176 | { |
AnnaBridge | 171:3a7713b1edbc | 177 | uint32_t id : 29; /*!< CAN Frame Identifier. */ |
AnnaBridge | 171:3a7713b1edbc | 178 | uint32_t rtr : 1; /*!< CAN Frame Type(DATA or REMOTE). */ |
AnnaBridge | 171:3a7713b1edbc | 179 | uint32_t xtd : 1; /*!< CAN Frame Type(STD or EXT). */ |
AnnaBridge | 171:3a7713b1edbc | 180 | uint32_t esi : 1; /*!< CAN Frame Error State Indicator. */ |
AnnaBridge | 171:3a7713b1edbc | 181 | }; |
AnnaBridge | 171:3a7713b1edbc | 182 | struct |
AnnaBridge | 171:3a7713b1edbc | 183 | { |
AnnaBridge | 171:3a7713b1edbc | 184 | uint32_t : 16; |
AnnaBridge | 171:3a7713b1edbc | 185 | uint32_t dlc : 4; /*!< Data Length Code. */ |
AnnaBridge | 171:3a7713b1edbc | 186 | uint32_t brs : 1; /*!< Bit Rate Switch. */ |
AnnaBridge | 171:3a7713b1edbc | 187 | uint32_t fdf : 1; /*!< CAN FD format. */ |
AnnaBridge | 171:3a7713b1edbc | 188 | uint32_t : 1; /*!< Reserved. */ |
AnnaBridge | 171:3a7713b1edbc | 189 | uint32_t efc : 1; /*!< Event FIFO control. */ |
AnnaBridge | 171:3a7713b1edbc | 190 | uint32_t mm : 8; /*!< Message Marker. */ |
AnnaBridge | 171:3a7713b1edbc | 191 | }; |
AnnaBridge | 171:3a7713b1edbc | 192 | uint8_t *data; |
AnnaBridge | 171:3a7713b1edbc | 193 | uint8_t size; |
AnnaBridge | 171:3a7713b1edbc | 194 | } mcan_tx_buffer_frame_t; |
AnnaBridge | 171:3a7713b1edbc | 195 | |
AnnaBridge | 171:3a7713b1edbc | 196 | /*! @brief MCAN Rx FIFO/Buffer structure. */ |
AnnaBridge | 171:3a7713b1edbc | 197 | typedef struct _mcan_rx_buffer_frame |
AnnaBridge | 171:3a7713b1edbc | 198 | { |
AnnaBridge | 171:3a7713b1edbc | 199 | struct |
AnnaBridge | 171:3a7713b1edbc | 200 | { |
AnnaBridge | 171:3a7713b1edbc | 201 | uint32_t id : 29; /*!< CAN Frame Identifier. */ |
AnnaBridge | 171:3a7713b1edbc | 202 | uint32_t rtr : 1; /*!< CAN Frame Type(DATA or REMOTE). */ |
AnnaBridge | 171:3a7713b1edbc | 203 | uint32_t xtd : 1; /*!< CAN Frame Type(STD or EXT). */ |
AnnaBridge | 171:3a7713b1edbc | 204 | uint32_t esi : 1; /*!< CAN Frame Error State Indicator. */ |
AnnaBridge | 171:3a7713b1edbc | 205 | }; |
AnnaBridge | 171:3a7713b1edbc | 206 | struct |
AnnaBridge | 171:3a7713b1edbc | 207 | { |
AnnaBridge | 171:3a7713b1edbc | 208 | uint32_t rxts : 16; /*!< Rx Timestamp. */ |
AnnaBridge | 171:3a7713b1edbc | 209 | uint32_t dlc : 4; /*!< Data Length Code. */ |
AnnaBridge | 171:3a7713b1edbc | 210 | uint32_t brs : 1; /*!< Bit Rate Switch. */ |
AnnaBridge | 171:3a7713b1edbc | 211 | uint32_t fdf : 1; /*!< CAN FD format. */ |
AnnaBridge | 171:3a7713b1edbc | 212 | uint32_t : 2; /*!< Reserved. */ |
AnnaBridge | 171:3a7713b1edbc | 213 | uint32_t fidx : 7; /*!< Filter Index. */ |
AnnaBridge | 171:3a7713b1edbc | 214 | uint32_t anmf : 1; /*!< Accepted Non-matching Frame. */ |
AnnaBridge | 171:3a7713b1edbc | 215 | }; |
AnnaBridge | 171:3a7713b1edbc | 216 | uint8_t *data; |
AnnaBridge | 171:3a7713b1edbc | 217 | uint8_t size; |
AnnaBridge | 171:3a7713b1edbc | 218 | } mcan_rx_buffer_frame_t; |
AnnaBridge | 171:3a7713b1edbc | 219 | |
AnnaBridge | 171:3a7713b1edbc | 220 | /*! @brief MCAN Rx FIFO block number. */ |
AnnaBridge | 171:3a7713b1edbc | 221 | typedef enum _mcan_fifo_type |
AnnaBridge | 171:3a7713b1edbc | 222 | { |
AnnaBridge | 171:3a7713b1edbc | 223 | kMCAN_Fifo0 = 0x0U, /*!< CAN Rx FIFO 0. */ |
AnnaBridge | 171:3a7713b1edbc | 224 | kMCAN_Fifo1 = 0x1U, /*!< CAN Rx FIFO 1. */ |
AnnaBridge | 171:3a7713b1edbc | 225 | } mcan_fifo_type_t; |
AnnaBridge | 171:3a7713b1edbc | 226 | |
AnnaBridge | 171:3a7713b1edbc | 227 | /*! @brief MCAN FIFO Operation Mode. */ |
AnnaBridge | 171:3a7713b1edbc | 228 | typedef enum _mcan_fifo_opmode_config |
AnnaBridge | 171:3a7713b1edbc | 229 | { |
AnnaBridge | 171:3a7713b1edbc | 230 | kMCAN_FifoBlocking = 0, /*!< FIFO blocking mode. */ |
AnnaBridge | 171:3a7713b1edbc | 231 | kMCAN_FifoOverwrite = 1, /*!< FIFO overwrite mode. */ |
AnnaBridge | 171:3a7713b1edbc | 232 | } mcan_fifo_opmode_config_t; |
AnnaBridge | 171:3a7713b1edbc | 233 | |
AnnaBridge | 171:3a7713b1edbc | 234 | /*! @brief MCAN Tx FIFO/Queue Mode. */ |
AnnaBridge | 171:3a7713b1edbc | 235 | typedef enum _mcan_txmode_config |
AnnaBridge | 171:3a7713b1edbc | 236 | { |
AnnaBridge | 171:3a7713b1edbc | 237 | kMCAN_txFifo = 0, /*!< Tx FIFO operation. */ |
AnnaBridge | 171:3a7713b1edbc | 238 | kMCAN_txQueue = 1, /*!< Tx Queue operation. */ |
AnnaBridge | 171:3a7713b1edbc | 239 | } mcan_txmode_config_t; |
AnnaBridge | 171:3a7713b1edbc | 240 | |
AnnaBridge | 171:3a7713b1edbc | 241 | /*! @brief MCAN remote frames treatment. */ |
AnnaBridge | 171:3a7713b1edbc | 242 | typedef enum _mcan_remote_frame_config |
AnnaBridge | 171:3a7713b1edbc | 243 | { |
AnnaBridge | 171:3a7713b1edbc | 244 | kMCAN_filterFrame = 0, /*!< Filter remote frames. */ |
AnnaBridge | 171:3a7713b1edbc | 245 | kMCAN_rejectFrame = 1, /*!< Reject all remote frames. */ |
AnnaBridge | 171:3a7713b1edbc | 246 | } mcan_remote_frame_config_t; |
AnnaBridge | 171:3a7713b1edbc | 247 | |
AnnaBridge | 171:3a7713b1edbc | 248 | /*! @brief MCAN non-masking frames treatment. */ |
AnnaBridge | 171:3a7713b1edbc | 249 | typedef enum _mcan_nonmasking_frame_config |
AnnaBridge | 171:3a7713b1edbc | 250 | { |
AnnaBridge | 171:3a7713b1edbc | 251 | kMCAN_acceptinFifo0 = 0, /*!< Accept non-masking frames in Rx FIFO 0. */ |
AnnaBridge | 171:3a7713b1edbc | 252 | kMCAN_acceptinFifo1 = 1, /*!< Accept non-masking frames in Rx FIFO 1. */ |
AnnaBridge | 171:3a7713b1edbc | 253 | kMCAN_reject0 = 2, /*!< Reject non-masking frames. */ |
AnnaBridge | 171:3a7713b1edbc | 254 | kMCAN_reject1 = 3, /*!< Reject non-masking frames. */ |
AnnaBridge | 171:3a7713b1edbc | 255 | } mcan_nonmasking_frame_config_t; |
AnnaBridge | 171:3a7713b1edbc | 256 | |
AnnaBridge | 171:3a7713b1edbc | 257 | /*! @brief MCAN Filter Element Configuration. */ |
AnnaBridge | 171:3a7713b1edbc | 258 | typedef enum _mcan_fec_config |
AnnaBridge | 171:3a7713b1edbc | 259 | { |
AnnaBridge | 171:3a7713b1edbc | 260 | kMCAN_disable = 0, /*!< Disable filter element. */ |
AnnaBridge | 171:3a7713b1edbc | 261 | kMCAN_storeinFifo0 = 1, /*!< Store in Rx FIFO 0 if filter matches. */ |
AnnaBridge | 171:3a7713b1edbc | 262 | kMCAN_storeinFifo1 = 2, /*!< Store in Rx FIFO 1 if filter matches. */ |
AnnaBridge | 171:3a7713b1edbc | 263 | kMCAN_reject = 3, /*!< Reject ID if filter matches. */ |
AnnaBridge | 171:3a7713b1edbc | 264 | kMCAN_setprio = 4, /*!< Set priority if filter matches. */ |
AnnaBridge | 171:3a7713b1edbc | 265 | kMCAN_setpriofifo0 = 5, /*!< Set priority and store in FIFO 0 if filter matches. */ |
AnnaBridge | 171:3a7713b1edbc | 266 | kMCAN_setpriofifo1 = 6, /*!< Set priority and store in FIFO 1 if filter matches. */ |
AnnaBridge | 171:3a7713b1edbc | 267 | kMCAN_storeinbuffer = 7, /*!< Store into Rx Buffer or as debug message. */ |
AnnaBridge | 171:3a7713b1edbc | 268 | } mcan_fec_config_t; |
AnnaBridge | 171:3a7713b1edbc | 269 | |
AnnaBridge | 171:3a7713b1edbc | 270 | /*! @brief MCAN Rx FIFO configuration. */ |
AnnaBridge | 171:3a7713b1edbc | 271 | typedef struct _mcan_rx_fifo_config |
AnnaBridge | 171:3a7713b1edbc | 272 | { |
AnnaBridge | 171:3a7713b1edbc | 273 | uint32_t address; /*!< FIFOn start address. */ |
AnnaBridge | 171:3a7713b1edbc | 274 | uint32_t elementSize; /*!< FIFOn element number. */ |
AnnaBridge | 171:3a7713b1edbc | 275 | uint32_t watermark; /*!< FIFOn watermark level. */ |
AnnaBridge | 171:3a7713b1edbc | 276 | mcan_fifo_opmode_config_t opmode; /*!< FIFOn blocking/overwrite mode. */ |
AnnaBridge | 171:3a7713b1edbc | 277 | mcan_bytes_in_datafield_t datafieldSize; /*!< Data field size per frame, size>8 is for CANFD. */ |
AnnaBridge | 171:3a7713b1edbc | 278 | } mcan_rx_fifo_config_t; |
AnnaBridge | 171:3a7713b1edbc | 279 | |
AnnaBridge | 171:3a7713b1edbc | 280 | /*! @brief MCAN Rx Buffer configuration. */ |
AnnaBridge | 171:3a7713b1edbc | 281 | typedef struct _mcan_rx_buffer_config |
AnnaBridge | 171:3a7713b1edbc | 282 | { |
AnnaBridge | 171:3a7713b1edbc | 283 | uint32_t address; /*!< Rx Buffer start address. */ |
AnnaBridge | 171:3a7713b1edbc | 284 | mcan_bytes_in_datafield_t datafieldSize; /*!< Data field size per frame, size>8 is for CANFD. */ |
AnnaBridge | 171:3a7713b1edbc | 285 | } mcan_rx_buffer_config_t; |
AnnaBridge | 171:3a7713b1edbc | 286 | |
AnnaBridge | 171:3a7713b1edbc | 287 | /*! @brief MCAN Tx Event FIFO configuration. */ |
AnnaBridge | 171:3a7713b1edbc | 288 | typedef struct _mcan_tx_fifo_config |
AnnaBridge | 171:3a7713b1edbc | 289 | { |
AnnaBridge | 171:3a7713b1edbc | 290 | uint32_t address; /*!< Event fifo start address. */ |
AnnaBridge | 171:3a7713b1edbc | 291 | uint32_t elementSize; /*!< FIFOn element number. */ |
AnnaBridge | 171:3a7713b1edbc | 292 | uint32_t watermark; /*!< FIFOn watermark level. */ |
AnnaBridge | 171:3a7713b1edbc | 293 | } mcan_tx_fifo_config_t; |
AnnaBridge | 171:3a7713b1edbc | 294 | |
AnnaBridge | 171:3a7713b1edbc | 295 | /*! @brief MCAN Tx Buffer configuration. */ |
AnnaBridge | 171:3a7713b1edbc | 296 | typedef struct _mcan_tx_buffer_config |
AnnaBridge | 171:3a7713b1edbc | 297 | { |
AnnaBridge | 171:3a7713b1edbc | 298 | uint32_t address; /*!< Tx Buffers Start Address. */ |
AnnaBridge | 171:3a7713b1edbc | 299 | uint32_t dedicatedSize; /*!< Number of Dedicated Transmit Buffers. */ |
AnnaBridge | 171:3a7713b1edbc | 300 | uint32_t fqSize; /*!< Transmit FIFO/Queue Size. */ |
AnnaBridge | 171:3a7713b1edbc | 301 | mcan_txmode_config_t mode; /*!< Tx FIFO/Queue Mode.*/ |
AnnaBridge | 171:3a7713b1edbc | 302 | mcan_bytes_in_datafield_t datafieldSize; /*!< Data field size per frame, size>8 is for CANFD. */ |
AnnaBridge | 171:3a7713b1edbc | 303 | } mcan_tx_buffer_config_t; |
AnnaBridge | 171:3a7713b1edbc | 304 | |
AnnaBridge | 171:3a7713b1edbc | 305 | /*! @brief MCAN Filter Type. */ |
AnnaBridge | 171:3a7713b1edbc | 306 | typedef enum _mcan_std_filter_type |
AnnaBridge | 171:3a7713b1edbc | 307 | { |
AnnaBridge | 171:3a7713b1edbc | 308 | kMCAN_range = 0, /*!< Range filter from SFID1 to SFID2. */ |
AnnaBridge | 171:3a7713b1edbc | 309 | kMCAN_dual = 1, /*!< Dual ID filter for SFID1 or SFID2. */ |
AnnaBridge | 171:3a7713b1edbc | 310 | kMCAN_classic = 2, /*!< Classic filter: SFID1 = filter, SFID2 = mask. */ |
AnnaBridge | 171:3a7713b1edbc | 311 | kMCAN_disableORrange2 = 3, /*!< Filter element disabled for standard filter |
AnnaBridge | 171:3a7713b1edbc | 312 | or Range filter, XIDAM mask not applied for extended filter. */ |
AnnaBridge | 171:3a7713b1edbc | 313 | } mcan_filter_type_t; |
AnnaBridge | 171:3a7713b1edbc | 314 | |
AnnaBridge | 171:3a7713b1edbc | 315 | /*! @brief MCAN Standard Message ID Filter Element. */ |
AnnaBridge | 171:3a7713b1edbc | 316 | typedef struct _mcan_std_filter_element_config |
AnnaBridge | 171:3a7713b1edbc | 317 | { |
AnnaBridge | 171:3a7713b1edbc | 318 | uint32_t sfid2 : 11; /*!< Standard Filter ID 2. */ |
AnnaBridge | 171:3a7713b1edbc | 319 | uint32_t : 5; /*!< Reserved. */ |
AnnaBridge | 171:3a7713b1edbc | 320 | uint32_t sfid1 : 11; /*!< Standard Filter ID 1. */ |
AnnaBridge | 171:3a7713b1edbc | 321 | mcan_fec_config_t sfec : 3; /*!< Standard Filter Element Configuration. */ |
AnnaBridge | 171:3a7713b1edbc | 322 | mcan_filter_type_t sft : 2; /*!< Standard Filter Type/ */ |
AnnaBridge | 171:3a7713b1edbc | 323 | } mcan_std_filter_element_config_t; |
AnnaBridge | 171:3a7713b1edbc | 324 | |
AnnaBridge | 171:3a7713b1edbc | 325 | /*! @brief MCAN Extended Message ID Filter Element. */ |
AnnaBridge | 171:3a7713b1edbc | 326 | typedef struct _mcan_ext_filter_element_config |
AnnaBridge | 171:3a7713b1edbc | 327 | { |
AnnaBridge | 171:3a7713b1edbc | 328 | uint32_t efid1 : 29; /*!< Extended Filter ID 1. */ |
AnnaBridge | 171:3a7713b1edbc | 329 | mcan_fec_config_t efec : 3; /*!< Extended Filter Element Configuration. */ |
AnnaBridge | 171:3a7713b1edbc | 330 | uint32_t efid2 : 29; /*!< Extended Filter ID 2. */ |
AnnaBridge | 171:3a7713b1edbc | 331 | uint32_t : 1; /*!< Reserved. */ |
AnnaBridge | 171:3a7713b1edbc | 332 | mcan_filter_type_t eft : 2; /*!< Extended Filter Type. */ |
AnnaBridge | 171:3a7713b1edbc | 333 | } mcan_ext_filter_element_config_t; |
AnnaBridge | 171:3a7713b1edbc | 334 | |
AnnaBridge | 171:3a7713b1edbc | 335 | /*! @brief MCAN Rx filter configuration. */ |
AnnaBridge | 171:3a7713b1edbc | 336 | typedef struct _mcan_frame_filter_config |
AnnaBridge | 171:3a7713b1edbc | 337 | { |
AnnaBridge | 171:3a7713b1edbc | 338 | uint32_t address; /*!< Filter start address. */ |
AnnaBridge | 171:3a7713b1edbc | 339 | uint32_t listSize; /*!< Filter list size. */ |
AnnaBridge | 171:3a7713b1edbc | 340 | mcan_frame_idformat_t idFormat; /*!< Frame format. */ |
AnnaBridge | 171:3a7713b1edbc | 341 | mcan_remote_frame_config_t remFrame; /*!< Remote frame treatment. */ |
AnnaBridge | 171:3a7713b1edbc | 342 | mcan_nonmasking_frame_config_t nmFrame; /*!< Non-masking frame treatment. */ |
AnnaBridge | 171:3a7713b1edbc | 343 | } mcan_frame_filter_config_t; |
AnnaBridge | 171:3a7713b1edbc | 344 | |
AnnaBridge | 171:3a7713b1edbc | 345 | /*! @brief MCAN module configuration structure. */ |
AnnaBridge | 171:3a7713b1edbc | 346 | typedef struct _mcan_config |
AnnaBridge | 171:3a7713b1edbc | 347 | { |
AnnaBridge | 171:3a7713b1edbc | 348 | uint32_t baudRateA; /*!< Baud rate of Arbitration phase in bps. */ |
AnnaBridge | 171:3a7713b1edbc | 349 | uint32_t baudRateD; /*!< Baud rate of Data phase in bps. */ |
AnnaBridge | 171:3a7713b1edbc | 350 | bool enableCanfdNormal; /*!< Enable or Disable CANFD normal. */ |
AnnaBridge | 171:3a7713b1edbc | 351 | bool enableCanfdSwitch; /*!< Enable or Disable CANFD with baudrate switch. */ |
AnnaBridge | 171:3a7713b1edbc | 352 | bool enableLoopBackInt; /*!< Enable or Disable Internal Back. */ |
AnnaBridge | 171:3a7713b1edbc | 353 | bool enableLoopBackExt; /*!< Enable or Disable External Loop Back. */ |
AnnaBridge | 171:3a7713b1edbc | 354 | bool enableBusMon; /*!< Enable or Disable Bus Monitoring Mode. */ |
AnnaBridge | 171:3a7713b1edbc | 355 | } mcan_config_t; |
AnnaBridge | 171:3a7713b1edbc | 356 | |
AnnaBridge | 171:3a7713b1edbc | 357 | /*! @brief MCAN protocol timing characteristic configuration structure. */ |
AnnaBridge | 171:3a7713b1edbc | 358 | typedef struct _mcan_timing_config |
AnnaBridge | 171:3a7713b1edbc | 359 | { |
AnnaBridge | 171:3a7713b1edbc | 360 | uint16_t preDivider; /*!< Clock Pre-scaler Division Factor. */ |
AnnaBridge | 171:3a7713b1edbc | 361 | uint8_t rJumpwidth; /*!< Re-sync Jump Width. */ |
AnnaBridge | 171:3a7713b1edbc | 362 | uint8_t seg1; /*!< Data Time Segment 1. */ |
AnnaBridge | 171:3a7713b1edbc | 363 | uint8_t seg2; /*!< Data Time Segment 2. */ |
AnnaBridge | 171:3a7713b1edbc | 364 | } mcan_timing_config_t; |
AnnaBridge | 171:3a7713b1edbc | 365 | |
AnnaBridge | 171:3a7713b1edbc | 366 | /*! @brief MCAN Buffer transfer. */ |
AnnaBridge | 171:3a7713b1edbc | 367 | typedef struct _mcan_buffer_transfer |
AnnaBridge | 171:3a7713b1edbc | 368 | { |
AnnaBridge | 171:3a7713b1edbc | 369 | mcan_tx_buffer_frame_t *frame; /*!< The buffer of CAN Message to be transfer. */ |
AnnaBridge | 171:3a7713b1edbc | 370 | uint8_t bufferIdx; /*!< The index of Message buffer used to transfer Message. */ |
AnnaBridge | 171:3a7713b1edbc | 371 | } mcan_buffer_transfer_t; |
AnnaBridge | 171:3a7713b1edbc | 372 | |
AnnaBridge | 171:3a7713b1edbc | 373 | /*! @brief MCAN Rx FIFO transfer. */ |
AnnaBridge | 171:3a7713b1edbc | 374 | typedef struct _mcan_fifo_transfer |
AnnaBridge | 171:3a7713b1edbc | 375 | { |
AnnaBridge | 171:3a7713b1edbc | 376 | mcan_rx_buffer_frame_t *frame; /*!< The buffer of CAN Message to be received from Rx FIFO. */ |
AnnaBridge | 171:3a7713b1edbc | 377 | } mcan_fifo_transfer_t; |
AnnaBridge | 171:3a7713b1edbc | 378 | |
AnnaBridge | 171:3a7713b1edbc | 379 | /*! @brief MCAN handle structure definition. */ |
AnnaBridge | 171:3a7713b1edbc | 380 | typedef struct _mcan_handle mcan_handle_t; |
AnnaBridge | 171:3a7713b1edbc | 381 | |
AnnaBridge | 171:3a7713b1edbc | 382 | /*! @brief MCAN transfer callback function. |
AnnaBridge | 171:3a7713b1edbc | 383 | * |
AnnaBridge | 171:3a7713b1edbc | 384 | * The MCAN transfer callback returns a value from the underlying layer. |
AnnaBridge | 171:3a7713b1edbc | 385 | * If the status equals to kStatus_MCAN_ErrorStatus, the result parameter is the Content of |
AnnaBridge | 171:3a7713b1edbc | 386 | * MCAN status register which can be used to get the working status(or error status) of MCAN module. |
AnnaBridge | 171:3a7713b1edbc | 387 | * If the status equals to other MCAN Message Buffer transfer status, the result is the index of |
AnnaBridge | 171:3a7713b1edbc | 388 | * Message Buffer that generate transfer event. |
AnnaBridge | 171:3a7713b1edbc | 389 | * If the status equals to other MCAN Message Buffer transfer status, the result is meaningless and should be |
AnnaBridge | 171:3a7713b1edbc | 390 | * Ignored. |
AnnaBridge | 171:3a7713b1edbc | 391 | */ |
AnnaBridge | 171:3a7713b1edbc | 392 | typedef void (*mcan_transfer_callback_t)( |
AnnaBridge | 171:3a7713b1edbc | 393 | CAN_Type *base, mcan_handle_t *handle, status_t status, uint32_t result, void *userData); |
AnnaBridge | 171:3a7713b1edbc | 394 | |
AnnaBridge | 171:3a7713b1edbc | 395 | /*! @brief MCAN handle structure. */ |
AnnaBridge | 171:3a7713b1edbc | 396 | struct _mcan_handle |
AnnaBridge | 171:3a7713b1edbc | 397 | { |
AnnaBridge | 171:3a7713b1edbc | 398 | mcan_transfer_callback_t callback; /*!< Callback function. */ |
AnnaBridge | 171:3a7713b1edbc | 399 | void *userData; /*!< MCAN callback function parameter.*/ |
AnnaBridge | 171:3a7713b1edbc | 400 | mcan_tx_buffer_frame_t *volatile bufferFrameBuf[64]; /*!< The buffer for received data from Buffers. */ |
AnnaBridge | 171:3a7713b1edbc | 401 | mcan_rx_buffer_frame_t *volatile rxFifoFrameBuf; /*!< The buffer for received data from Rx FIFO. */ |
AnnaBridge | 171:3a7713b1edbc | 402 | volatile uint8_t txbufferIdx; /*!< Message Buffer transfer state. */ |
AnnaBridge | 171:3a7713b1edbc | 403 | volatile uint8_t bufferState[64]; /*!< Message Buffer transfer state. */ |
AnnaBridge | 171:3a7713b1edbc | 404 | volatile uint8_t rxFifoState; /*!< Rx FIFO transfer state. */ |
AnnaBridge | 171:3a7713b1edbc | 405 | }; |
AnnaBridge | 171:3a7713b1edbc | 406 | |
AnnaBridge | 171:3a7713b1edbc | 407 | /****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 408 | * API |
AnnaBridge | 171:3a7713b1edbc | 409 | *****************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 410 | |
AnnaBridge | 171:3a7713b1edbc | 411 | #if defined(__cplusplus) |
AnnaBridge | 171:3a7713b1edbc | 412 | extern "C" { |
AnnaBridge | 171:3a7713b1edbc | 413 | #endif |
AnnaBridge | 171:3a7713b1edbc | 414 | |
AnnaBridge | 171:3a7713b1edbc | 415 | /*! |
AnnaBridge | 171:3a7713b1edbc | 416 | * @name Initialization and deinitialization |
AnnaBridge | 171:3a7713b1edbc | 417 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 418 | */ |
AnnaBridge | 171:3a7713b1edbc | 419 | |
AnnaBridge | 171:3a7713b1edbc | 420 | /*! |
AnnaBridge | 171:3a7713b1edbc | 421 | * @brief Initializes an MCAN instance. |
AnnaBridge | 171:3a7713b1edbc | 422 | * |
AnnaBridge | 171:3a7713b1edbc | 423 | * This function initializes the MCAN module with user-defined settings. |
AnnaBridge | 171:3a7713b1edbc | 424 | * This example shows how to set up the mcan_config_t parameters and how |
AnnaBridge | 171:3a7713b1edbc | 425 | * to call the MCAN_Init function by passing in these parameters. |
AnnaBridge | 171:3a7713b1edbc | 426 | * @code |
AnnaBridge | 171:3a7713b1edbc | 427 | * mcan_config_t config; |
AnnaBridge | 171:3a7713b1edbc | 428 | * config->baudRateA = 500000U; |
AnnaBridge | 171:3a7713b1edbc | 429 | * config->baudRateD = 500000U; |
AnnaBridge | 171:3a7713b1edbc | 430 | * config->enableCanfdNormal = false; |
AnnaBridge | 171:3a7713b1edbc | 431 | * config->enableCanfdSwitch = false; |
AnnaBridge | 171:3a7713b1edbc | 432 | * config->enableLoopBackInt = false; |
AnnaBridge | 171:3a7713b1edbc | 433 | * config->enableLoopBackExt = false; |
AnnaBridge | 171:3a7713b1edbc | 434 | * config->enableBusMon = false; |
AnnaBridge | 171:3a7713b1edbc | 435 | * MCAN_Init(CANFD0, &config, 8000000UL); |
AnnaBridge | 171:3a7713b1edbc | 436 | * @endcode |
AnnaBridge | 171:3a7713b1edbc | 437 | * |
AnnaBridge | 171:3a7713b1edbc | 438 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 439 | * @param config Pointer to the user-defined configuration structure. |
AnnaBridge | 171:3a7713b1edbc | 440 | * @param sourceClock_Hz MCAN Protocol Engine clock source frequency in Hz. |
AnnaBridge | 171:3a7713b1edbc | 441 | */ |
AnnaBridge | 171:3a7713b1edbc | 442 | void MCAN_Init(CAN_Type *base, const mcan_config_t *config, uint32_t sourceClock_Hz); |
AnnaBridge | 171:3a7713b1edbc | 443 | |
AnnaBridge | 171:3a7713b1edbc | 444 | /*! |
AnnaBridge | 171:3a7713b1edbc | 445 | * @brief Deinitializes an MCAN instance. |
AnnaBridge | 171:3a7713b1edbc | 446 | * |
AnnaBridge | 171:3a7713b1edbc | 447 | * This function deinitializes the MCAN module. |
AnnaBridge | 171:3a7713b1edbc | 448 | * |
AnnaBridge | 171:3a7713b1edbc | 449 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 450 | */ |
AnnaBridge | 171:3a7713b1edbc | 451 | void MCAN_Deinit(CAN_Type *base); |
AnnaBridge | 171:3a7713b1edbc | 452 | |
AnnaBridge | 171:3a7713b1edbc | 453 | /*! |
AnnaBridge | 171:3a7713b1edbc | 454 | * @brief Gets the default configuration structure. |
AnnaBridge | 171:3a7713b1edbc | 455 | * |
AnnaBridge | 171:3a7713b1edbc | 456 | * This function initializes the MCAN configuration structure to default values. The default |
AnnaBridge | 171:3a7713b1edbc | 457 | * values are as follows. |
AnnaBridge | 171:3a7713b1edbc | 458 | * config->baudRateA = 500000U; |
AnnaBridge | 171:3a7713b1edbc | 459 | * config->baudRateD = 500000U; |
AnnaBridge | 171:3a7713b1edbc | 460 | * config->enableCanfdNormal = false; |
AnnaBridge | 171:3a7713b1edbc | 461 | * config->enableCanfdSwitch = false; |
AnnaBridge | 171:3a7713b1edbc | 462 | * config->enableLoopBackInt = false; |
AnnaBridge | 171:3a7713b1edbc | 463 | * config->enableLoopBackExt = false; |
AnnaBridge | 171:3a7713b1edbc | 464 | * config->enableBusMon = false; |
AnnaBridge | 171:3a7713b1edbc | 465 | * |
AnnaBridge | 171:3a7713b1edbc | 466 | * @param config Pointer to the MCAN configuration structure. |
AnnaBridge | 171:3a7713b1edbc | 467 | */ |
AnnaBridge | 171:3a7713b1edbc | 468 | void MCAN_GetDefaultConfig(mcan_config_t *config); |
AnnaBridge | 171:3a7713b1edbc | 469 | |
AnnaBridge | 171:3a7713b1edbc | 470 | /*! |
AnnaBridge | 171:3a7713b1edbc | 471 | * @brief MCAN enters normal mode. |
AnnaBridge | 171:3a7713b1edbc | 472 | * |
AnnaBridge | 171:3a7713b1edbc | 473 | * After initialization, INIT bit in CCCR register must be cleared to enter |
AnnaBridge | 171:3a7713b1edbc | 474 | * normal mode thus synchronizes to the CAN bus and ready for communication. |
AnnaBridge | 171:3a7713b1edbc | 475 | * |
AnnaBridge | 171:3a7713b1edbc | 476 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 477 | */ |
AnnaBridge | 171:3a7713b1edbc | 478 | void MCAN_EnterNormalMode(CAN_Type *base); |
AnnaBridge | 171:3a7713b1edbc | 479 | |
AnnaBridge | 171:3a7713b1edbc | 480 | /*! |
AnnaBridge | 171:3a7713b1edbc | 481 | * @name Configuration. |
AnnaBridge | 171:3a7713b1edbc | 482 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 483 | */ |
AnnaBridge | 171:3a7713b1edbc | 484 | |
AnnaBridge | 171:3a7713b1edbc | 485 | /*! |
AnnaBridge | 171:3a7713b1edbc | 486 | * @brief Sets the MCAN Message RAM base address. |
AnnaBridge | 171:3a7713b1edbc | 487 | * |
AnnaBridge | 171:3a7713b1edbc | 488 | * This function sets the Message RAM base address. |
AnnaBridge | 171:3a7713b1edbc | 489 | * |
AnnaBridge | 171:3a7713b1edbc | 490 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 491 | * @param value Desired Message RAM base. |
AnnaBridge | 171:3a7713b1edbc | 492 | */ |
AnnaBridge | 171:3a7713b1edbc | 493 | static inline void MCAN_SetMsgRAMBase(CAN_Type *base, uint32_t value) |
AnnaBridge | 171:3a7713b1edbc | 494 | { |
AnnaBridge | 171:3a7713b1edbc | 495 | assert((value >= 0x20000000U) && (value <= 0x20027FFFU)); |
AnnaBridge | 171:3a7713b1edbc | 496 | |
AnnaBridge | 171:3a7713b1edbc | 497 | base->MRBA = CAN_MRBA_BA(value); |
AnnaBridge | 171:3a7713b1edbc | 498 | } |
AnnaBridge | 171:3a7713b1edbc | 499 | |
AnnaBridge | 171:3a7713b1edbc | 500 | /*! |
AnnaBridge | 171:3a7713b1edbc | 501 | * @brief Gets the MCAN Message RAM base address. |
AnnaBridge | 171:3a7713b1edbc | 502 | * |
AnnaBridge | 171:3a7713b1edbc | 503 | * This function gets the Message RAM base address. |
AnnaBridge | 171:3a7713b1edbc | 504 | * |
AnnaBridge | 171:3a7713b1edbc | 505 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 506 | * @return Message RAM base address. |
AnnaBridge | 171:3a7713b1edbc | 507 | */ |
AnnaBridge | 171:3a7713b1edbc | 508 | static inline uint32_t MCAN_GetMsgRAMBase(CAN_Type *base) |
AnnaBridge | 171:3a7713b1edbc | 509 | { |
AnnaBridge | 171:3a7713b1edbc | 510 | return base->MRBA; |
AnnaBridge | 171:3a7713b1edbc | 511 | } |
AnnaBridge | 171:3a7713b1edbc | 512 | |
AnnaBridge | 171:3a7713b1edbc | 513 | /*! |
AnnaBridge | 171:3a7713b1edbc | 514 | * @brief Sets the MCAN protocol arbitration phase timing characteristic. |
AnnaBridge | 171:3a7713b1edbc | 515 | * |
AnnaBridge | 171:3a7713b1edbc | 516 | * This function gives user settings to CAN bus timing characteristic. |
AnnaBridge | 171:3a7713b1edbc | 517 | * The function is for an experienced user. For less experienced users, call |
AnnaBridge | 171:3a7713b1edbc | 518 | * the MCAN_Init() and fill the baud rate field with a desired value. |
AnnaBridge | 171:3a7713b1edbc | 519 | * This provides the default arbitration phase timing characteristics. |
AnnaBridge | 171:3a7713b1edbc | 520 | * |
AnnaBridge | 171:3a7713b1edbc | 521 | * Note that calling MCAN_SetArbitrationTimingConfig() overrides the baud rate |
AnnaBridge | 171:3a7713b1edbc | 522 | * set in MCAN_Init(). |
AnnaBridge | 171:3a7713b1edbc | 523 | * |
AnnaBridge | 171:3a7713b1edbc | 524 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 525 | * @param config Pointer to the timing configuration structure. |
AnnaBridge | 171:3a7713b1edbc | 526 | */ |
AnnaBridge | 171:3a7713b1edbc | 527 | void MCAN_SetArbitrationTimingConfig(CAN_Type *base, const mcan_timing_config_t *config); |
AnnaBridge | 171:3a7713b1edbc | 528 | |
AnnaBridge | 171:3a7713b1edbc | 529 | #if (defined(FSL_FEATURE_CAN_SUPPORT_CANFD) && FSL_FEATURE_CAN_SUPPORT_CANFD) |
AnnaBridge | 171:3a7713b1edbc | 530 | /*! |
AnnaBridge | 171:3a7713b1edbc | 531 | * @brief Sets the MCAN protocol data phase timing characteristic. |
AnnaBridge | 171:3a7713b1edbc | 532 | * |
AnnaBridge | 171:3a7713b1edbc | 533 | * This function gives user settings to CAN bus timing characteristic. |
AnnaBridge | 171:3a7713b1edbc | 534 | * The function is for an experienced user. For less experienced users, call |
AnnaBridge | 171:3a7713b1edbc | 535 | * the MCAN_Init() and fill the baud rate field with a desired value. |
AnnaBridge | 171:3a7713b1edbc | 536 | * This provides the default data phase timing characteristics. |
AnnaBridge | 171:3a7713b1edbc | 537 | * |
AnnaBridge | 171:3a7713b1edbc | 538 | * Note that calling MCAN_SetArbitrationTimingConfig() overrides the baud rate |
AnnaBridge | 171:3a7713b1edbc | 539 | * set in MCAN_Init(). |
AnnaBridge | 171:3a7713b1edbc | 540 | * |
AnnaBridge | 171:3a7713b1edbc | 541 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 542 | * @param config Pointer to the timing configuration structure. |
AnnaBridge | 171:3a7713b1edbc | 543 | */ |
AnnaBridge | 171:3a7713b1edbc | 544 | void MCAN_SetDataTimingConfig(CAN_Type *base, const mcan_timing_config_t *config); |
AnnaBridge | 171:3a7713b1edbc | 545 | #endif /* FSL_FEATURE_CAN_SUPPORT_CANFD */ |
AnnaBridge | 171:3a7713b1edbc | 546 | |
AnnaBridge | 171:3a7713b1edbc | 547 | /*! |
AnnaBridge | 171:3a7713b1edbc | 548 | * @brief Configures an MCAN receive fifo 0 buffer. |
AnnaBridge | 171:3a7713b1edbc | 549 | * |
AnnaBridge | 171:3a7713b1edbc | 550 | * This function sets start address, element size, watermark, operation mode |
AnnaBridge | 171:3a7713b1edbc | 551 | * and datafield size of the recieve fifo 0. |
AnnaBridge | 171:3a7713b1edbc | 552 | * |
AnnaBridge | 171:3a7713b1edbc | 553 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 554 | * @param config The receive fifo 0 configuration structure. |
AnnaBridge | 171:3a7713b1edbc | 555 | */ |
AnnaBridge | 171:3a7713b1edbc | 556 | void MCAN_SetRxFifo0Config(CAN_Type *base, const mcan_rx_fifo_config_t *config); |
AnnaBridge | 171:3a7713b1edbc | 557 | |
AnnaBridge | 171:3a7713b1edbc | 558 | /*! |
AnnaBridge | 171:3a7713b1edbc | 559 | * @brief Configures an MCAN receive fifo 1 buffer. |
AnnaBridge | 171:3a7713b1edbc | 560 | * |
AnnaBridge | 171:3a7713b1edbc | 561 | * This function sets start address, element size, watermark, operation mode |
AnnaBridge | 171:3a7713b1edbc | 562 | * and datafield size of the recieve fifo 1. |
AnnaBridge | 171:3a7713b1edbc | 563 | * |
AnnaBridge | 171:3a7713b1edbc | 564 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 565 | * @param config The receive fifo 1 configuration structure. |
AnnaBridge | 171:3a7713b1edbc | 566 | */ |
AnnaBridge | 171:3a7713b1edbc | 567 | void MCAN_SetRxFifo1Config(CAN_Type *base, const mcan_rx_fifo_config_t *config); |
AnnaBridge | 171:3a7713b1edbc | 568 | |
AnnaBridge | 171:3a7713b1edbc | 569 | /*! |
AnnaBridge | 171:3a7713b1edbc | 570 | * @brief Configures an MCAN receive buffer. |
AnnaBridge | 171:3a7713b1edbc | 571 | * |
AnnaBridge | 171:3a7713b1edbc | 572 | * This function sets start address and datafield size of the recieve buffer. |
AnnaBridge | 171:3a7713b1edbc | 573 | * |
AnnaBridge | 171:3a7713b1edbc | 574 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 575 | * @param config The receive buffer configuration structure. |
AnnaBridge | 171:3a7713b1edbc | 576 | */ |
AnnaBridge | 171:3a7713b1edbc | 577 | void MCAN_SetRxBufferConfig(CAN_Type *base, const mcan_rx_buffer_config_t *config); |
AnnaBridge | 171:3a7713b1edbc | 578 | |
AnnaBridge | 171:3a7713b1edbc | 579 | /*! |
AnnaBridge | 171:3a7713b1edbc | 580 | * @brief Configures an MCAN transmit event fifo. |
AnnaBridge | 171:3a7713b1edbc | 581 | * |
AnnaBridge | 171:3a7713b1edbc | 582 | * This function sets start address, element size, watermark of the transmit event fifo. |
AnnaBridge | 171:3a7713b1edbc | 583 | * |
AnnaBridge | 171:3a7713b1edbc | 584 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 585 | * @param config The transmit event fifo configuration structure. |
AnnaBridge | 171:3a7713b1edbc | 586 | */ |
AnnaBridge | 171:3a7713b1edbc | 587 | void MCAN_SetTxEventfifoConfig(CAN_Type *base, const mcan_tx_fifo_config_t *config); |
AnnaBridge | 171:3a7713b1edbc | 588 | |
AnnaBridge | 171:3a7713b1edbc | 589 | /*! |
AnnaBridge | 171:3a7713b1edbc | 590 | * @brief Configures an MCAN transmit buffer. |
AnnaBridge | 171:3a7713b1edbc | 591 | * |
AnnaBridge | 171:3a7713b1edbc | 592 | * This function sets start address, element size, fifo/queue mode and datafield |
AnnaBridge | 171:3a7713b1edbc | 593 | * size of the transmit buffer. |
AnnaBridge | 171:3a7713b1edbc | 594 | * |
AnnaBridge | 171:3a7713b1edbc | 595 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 596 | * @param config The transmit buffer configuration structure. |
AnnaBridge | 171:3a7713b1edbc | 597 | */ |
AnnaBridge | 171:3a7713b1edbc | 598 | void MCAN_SetTxBufferConfig(CAN_Type *base, const mcan_tx_buffer_config_t *config); |
AnnaBridge | 171:3a7713b1edbc | 599 | |
AnnaBridge | 171:3a7713b1edbc | 600 | /*! |
AnnaBridge | 171:3a7713b1edbc | 601 | * @brief Set filter configuration. |
AnnaBridge | 171:3a7713b1edbc | 602 | * |
AnnaBridge | 171:3a7713b1edbc | 603 | * This function sets remote and non masking frames in global filter configuration, |
AnnaBridge | 171:3a7713b1edbc | 604 | * also the start address, list size in standard/extended ID filter configuration. |
AnnaBridge | 171:3a7713b1edbc | 605 | * |
AnnaBridge | 171:3a7713b1edbc | 606 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 607 | * @param config The MCAN filter configuration. |
AnnaBridge | 171:3a7713b1edbc | 608 | */ |
AnnaBridge | 171:3a7713b1edbc | 609 | void MCAN_SetFilterConfig(CAN_Type *base, const mcan_frame_filter_config_t *config); |
AnnaBridge | 171:3a7713b1edbc | 610 | |
AnnaBridge | 171:3a7713b1edbc | 611 | /*! |
AnnaBridge | 171:3a7713b1edbc | 612 | * @brief Set filter configuration. |
AnnaBridge | 171:3a7713b1edbc | 613 | * |
AnnaBridge | 171:3a7713b1edbc | 614 | * This function sets remote and non masking frames in global filter configuration, |
AnnaBridge | 171:3a7713b1edbc | 615 | * also the start address, list size in standard/extended ID filter configuration. |
AnnaBridge | 171:3a7713b1edbc | 616 | * |
AnnaBridge | 171:3a7713b1edbc | 617 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 618 | * @param config The MCAN filter configuration. |
AnnaBridge | 171:3a7713b1edbc | 619 | */ |
AnnaBridge | 171:3a7713b1edbc | 620 | void MCAN_SetSTDFilterElement(CAN_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 621 | const mcan_frame_filter_config_t *config, |
AnnaBridge | 171:3a7713b1edbc | 622 | const mcan_std_filter_element_config_t *filter, |
AnnaBridge | 171:3a7713b1edbc | 623 | uint8_t idx); |
AnnaBridge | 171:3a7713b1edbc | 624 | |
AnnaBridge | 171:3a7713b1edbc | 625 | /*! |
AnnaBridge | 171:3a7713b1edbc | 626 | * @brief Set filter configuration. |
AnnaBridge | 171:3a7713b1edbc | 627 | * |
AnnaBridge | 171:3a7713b1edbc | 628 | * This function sets remote and non masking frames in global filter configuration, |
AnnaBridge | 171:3a7713b1edbc | 629 | * also the start address, list size in standard/extended ID filter configuration. |
AnnaBridge | 171:3a7713b1edbc | 630 | * |
AnnaBridge | 171:3a7713b1edbc | 631 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 632 | * @param config The MCAN filter configuration. |
AnnaBridge | 171:3a7713b1edbc | 633 | */ |
AnnaBridge | 171:3a7713b1edbc | 634 | void MCAN_SetEXTFilterElement(CAN_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 635 | const mcan_frame_filter_config_t *config, |
AnnaBridge | 171:3a7713b1edbc | 636 | const mcan_ext_filter_element_config_t *filter, |
AnnaBridge | 171:3a7713b1edbc | 637 | uint8_t idx); |
AnnaBridge | 171:3a7713b1edbc | 638 | |
AnnaBridge | 171:3a7713b1edbc | 639 | /*! |
AnnaBridge | 171:3a7713b1edbc | 640 | * @name Status |
AnnaBridge | 171:3a7713b1edbc | 641 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 642 | */ |
AnnaBridge | 171:3a7713b1edbc | 643 | |
AnnaBridge | 171:3a7713b1edbc | 644 | /*! |
AnnaBridge | 171:3a7713b1edbc | 645 | * @brief Gets the MCAN module interrupt flags. |
AnnaBridge | 171:3a7713b1edbc | 646 | * |
AnnaBridge | 171:3a7713b1edbc | 647 | * This function gets all MCAN interrupt status flags. |
AnnaBridge | 171:3a7713b1edbc | 648 | * |
AnnaBridge | 171:3a7713b1edbc | 649 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 650 | * @param mask The ORed MCAN interrupt mask. |
AnnaBridge | 171:3a7713b1edbc | 651 | * @return MCAN status flags which are ORed. |
AnnaBridge | 171:3a7713b1edbc | 652 | */ |
AnnaBridge | 171:3a7713b1edbc | 653 | static inline uint32_t MCAN_GetStatusFlag(CAN_Type *base, uint32_t mask) |
AnnaBridge | 171:3a7713b1edbc | 654 | { |
AnnaBridge | 171:3a7713b1edbc | 655 | return (bool)(base->IR & mask); |
AnnaBridge | 171:3a7713b1edbc | 656 | } |
AnnaBridge | 171:3a7713b1edbc | 657 | |
AnnaBridge | 171:3a7713b1edbc | 658 | /*! |
AnnaBridge | 171:3a7713b1edbc | 659 | * @brief Clears the MCAN module interrupt flags. |
AnnaBridge | 171:3a7713b1edbc | 660 | * |
AnnaBridge | 171:3a7713b1edbc | 661 | * This function clears MCAN interrupt status flags. |
AnnaBridge | 171:3a7713b1edbc | 662 | * |
AnnaBridge | 171:3a7713b1edbc | 663 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 664 | * @param mask The ORed MCAN interrupt mask. |
AnnaBridge | 171:3a7713b1edbc | 665 | */ |
AnnaBridge | 171:3a7713b1edbc | 666 | static inline void MCAN_ClearStatusFlag(CAN_Type *base, uint32_t mask) |
AnnaBridge | 171:3a7713b1edbc | 667 | { |
AnnaBridge | 171:3a7713b1edbc | 668 | /* Write 1 to clear status flag. */ |
AnnaBridge | 171:3a7713b1edbc | 669 | base->IR |= mask; |
AnnaBridge | 171:3a7713b1edbc | 670 | } |
AnnaBridge | 171:3a7713b1edbc | 671 | |
AnnaBridge | 171:3a7713b1edbc | 672 | /*! |
AnnaBridge | 171:3a7713b1edbc | 673 | * @brief Gets the new data flag of specific Rx Buffer. |
AnnaBridge | 171:3a7713b1edbc | 674 | * |
AnnaBridge | 171:3a7713b1edbc | 675 | * This function gets new data flag of specific Rx Buffer. |
AnnaBridge | 171:3a7713b1edbc | 676 | * |
AnnaBridge | 171:3a7713b1edbc | 677 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 678 | * @param idx Rx Buffer index. |
AnnaBridge | 171:3a7713b1edbc | 679 | * @return Rx Buffer new data status flag. |
AnnaBridge | 171:3a7713b1edbc | 680 | */ |
AnnaBridge | 171:3a7713b1edbc | 681 | static inline bool MCAN_GetRxBufferStatusFlag(CAN_Type *base, uint8_t idx) |
AnnaBridge | 171:3a7713b1edbc | 682 | { |
AnnaBridge | 171:3a7713b1edbc | 683 | assert(idx <= 63U); |
AnnaBridge | 171:3a7713b1edbc | 684 | |
AnnaBridge | 171:3a7713b1edbc | 685 | if (idx <= 31U) |
AnnaBridge | 171:3a7713b1edbc | 686 | { |
AnnaBridge | 171:3a7713b1edbc | 687 | return (bool)(base->NDAT1 & (1U << idx)); |
AnnaBridge | 171:3a7713b1edbc | 688 | } |
AnnaBridge | 171:3a7713b1edbc | 689 | else |
AnnaBridge | 171:3a7713b1edbc | 690 | { |
AnnaBridge | 171:3a7713b1edbc | 691 | return (bool)(base->NDAT2 & (1U << (idx - 31U))); |
AnnaBridge | 171:3a7713b1edbc | 692 | } |
AnnaBridge | 171:3a7713b1edbc | 693 | } |
AnnaBridge | 171:3a7713b1edbc | 694 | |
AnnaBridge | 171:3a7713b1edbc | 695 | /*! |
AnnaBridge | 171:3a7713b1edbc | 696 | * @brief Clears the new data flag of specific Rx Buffer. |
AnnaBridge | 171:3a7713b1edbc | 697 | * |
AnnaBridge | 171:3a7713b1edbc | 698 | * This function clears new data flag of specific Rx Buffer. |
AnnaBridge | 171:3a7713b1edbc | 699 | * |
AnnaBridge | 171:3a7713b1edbc | 700 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 701 | * @param idx Rx Buffer index. |
AnnaBridge | 171:3a7713b1edbc | 702 | */ |
AnnaBridge | 171:3a7713b1edbc | 703 | static inline void MCAN_ClearRxBufferStatusFlag(CAN_Type *base, uint8_t idx) |
AnnaBridge | 171:3a7713b1edbc | 704 | { |
AnnaBridge | 171:3a7713b1edbc | 705 | assert(idx <= 63U); |
AnnaBridge | 171:3a7713b1edbc | 706 | |
AnnaBridge | 171:3a7713b1edbc | 707 | if (idx <= 31U) |
AnnaBridge | 171:3a7713b1edbc | 708 | { |
AnnaBridge | 171:3a7713b1edbc | 709 | base->NDAT1 &= ~(1U << idx); |
AnnaBridge | 171:3a7713b1edbc | 710 | } |
AnnaBridge | 171:3a7713b1edbc | 711 | else |
AnnaBridge | 171:3a7713b1edbc | 712 | { |
AnnaBridge | 171:3a7713b1edbc | 713 | base->NDAT2 &= ~(1U << (idx - 31U)); |
AnnaBridge | 171:3a7713b1edbc | 714 | } |
AnnaBridge | 171:3a7713b1edbc | 715 | } |
AnnaBridge | 171:3a7713b1edbc | 716 | |
AnnaBridge | 171:3a7713b1edbc | 717 | /* @} */ |
AnnaBridge | 171:3a7713b1edbc | 718 | |
AnnaBridge | 171:3a7713b1edbc | 719 | /*! |
AnnaBridge | 171:3a7713b1edbc | 720 | * @name Interrupts |
AnnaBridge | 171:3a7713b1edbc | 721 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 722 | */ |
AnnaBridge | 171:3a7713b1edbc | 723 | |
AnnaBridge | 171:3a7713b1edbc | 724 | /*! |
AnnaBridge | 171:3a7713b1edbc | 725 | * @brief Enables MCAN interrupts according to the provided interrupt line and mask. |
AnnaBridge | 171:3a7713b1edbc | 726 | * |
AnnaBridge | 171:3a7713b1edbc | 727 | * This function enables the MCAN interrupts according to the provided interrupt line and mask. |
AnnaBridge | 171:3a7713b1edbc | 728 | * The mask is a logical OR of enumeration members. |
AnnaBridge | 171:3a7713b1edbc | 729 | * |
AnnaBridge | 171:3a7713b1edbc | 730 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 731 | * @param line Interrupt line number, 0 or 1. |
AnnaBridge | 171:3a7713b1edbc | 732 | * @param mask The interrupts to enable. |
AnnaBridge | 171:3a7713b1edbc | 733 | */ |
AnnaBridge | 171:3a7713b1edbc | 734 | static inline void MCAN_EnableInterrupts(CAN_Type *base, uint32_t line, uint32_t mask) |
AnnaBridge | 171:3a7713b1edbc | 735 | { |
AnnaBridge | 171:3a7713b1edbc | 736 | base->ILE |= (1U << line); |
AnnaBridge | 171:3a7713b1edbc | 737 | if (0 == line) |
AnnaBridge | 171:3a7713b1edbc | 738 | { |
AnnaBridge | 171:3a7713b1edbc | 739 | base->ILS &= ~mask; |
AnnaBridge | 171:3a7713b1edbc | 740 | } |
AnnaBridge | 171:3a7713b1edbc | 741 | else |
AnnaBridge | 171:3a7713b1edbc | 742 | { |
AnnaBridge | 171:3a7713b1edbc | 743 | base->ILS |= mask; |
AnnaBridge | 171:3a7713b1edbc | 744 | } |
AnnaBridge | 171:3a7713b1edbc | 745 | base->IE |= mask; |
AnnaBridge | 171:3a7713b1edbc | 746 | } |
AnnaBridge | 171:3a7713b1edbc | 747 | |
AnnaBridge | 171:3a7713b1edbc | 748 | /*! |
AnnaBridge | 171:3a7713b1edbc | 749 | * @brief Enables MCAN Tx Buffer interrupts according to the provided index. |
AnnaBridge | 171:3a7713b1edbc | 750 | * |
AnnaBridge | 171:3a7713b1edbc | 751 | * This function enables the MCAN Tx Buffer interrupts. |
AnnaBridge | 171:3a7713b1edbc | 752 | * |
AnnaBridge | 171:3a7713b1edbc | 753 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 754 | * @param idx Tx Buffer index. |
AnnaBridge | 171:3a7713b1edbc | 755 | */ |
AnnaBridge | 171:3a7713b1edbc | 756 | static inline void MCAN_EnableTransmitBufferInterrupts(CAN_Type *base, uint8_t idx) |
AnnaBridge | 171:3a7713b1edbc | 757 | { |
AnnaBridge | 171:3a7713b1edbc | 758 | base->TXBTIE |= (uint32_t)(1U << idx); |
AnnaBridge | 171:3a7713b1edbc | 759 | } |
AnnaBridge | 171:3a7713b1edbc | 760 | |
AnnaBridge | 171:3a7713b1edbc | 761 | /*! |
AnnaBridge | 171:3a7713b1edbc | 762 | * @brief Disables MCAN Tx Buffer interrupts according to the provided index. |
AnnaBridge | 171:3a7713b1edbc | 763 | * |
AnnaBridge | 171:3a7713b1edbc | 764 | * This function disables the MCAN Tx Buffer interrupts. |
AnnaBridge | 171:3a7713b1edbc | 765 | * |
AnnaBridge | 171:3a7713b1edbc | 766 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 767 | * @param idx Tx Buffer index. |
AnnaBridge | 171:3a7713b1edbc | 768 | */ |
AnnaBridge | 171:3a7713b1edbc | 769 | static inline void MCAN_DisableTransmitBufferInterrupts(CAN_Type *base, uint8_t idx) |
AnnaBridge | 171:3a7713b1edbc | 770 | { |
AnnaBridge | 171:3a7713b1edbc | 771 | base->TXBTIE &= (uint32_t)(~(1U << idx)); |
AnnaBridge | 171:3a7713b1edbc | 772 | } |
AnnaBridge | 171:3a7713b1edbc | 773 | |
AnnaBridge | 171:3a7713b1edbc | 774 | /*! |
AnnaBridge | 171:3a7713b1edbc | 775 | * @brief Disables MCAN interrupts according to the provided mask. |
AnnaBridge | 171:3a7713b1edbc | 776 | * |
AnnaBridge | 171:3a7713b1edbc | 777 | * This function disables the MCAN interrupts according to the provided mask. |
AnnaBridge | 171:3a7713b1edbc | 778 | * The mask is a logical OR of enumeration members. |
AnnaBridge | 171:3a7713b1edbc | 779 | * |
AnnaBridge | 171:3a7713b1edbc | 780 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 781 | * @param mask The interrupts to disable. |
AnnaBridge | 171:3a7713b1edbc | 782 | */ |
AnnaBridge | 171:3a7713b1edbc | 783 | static inline void MCAN_DisableInterrupts(CAN_Type *base, uint32_t mask) |
AnnaBridge | 171:3a7713b1edbc | 784 | { |
AnnaBridge | 171:3a7713b1edbc | 785 | base->IE &= ~mask; |
AnnaBridge | 171:3a7713b1edbc | 786 | } |
AnnaBridge | 171:3a7713b1edbc | 787 | |
AnnaBridge | 171:3a7713b1edbc | 788 | /* @} */ |
AnnaBridge | 171:3a7713b1edbc | 789 | |
AnnaBridge | 171:3a7713b1edbc | 790 | /*! |
AnnaBridge | 171:3a7713b1edbc | 791 | * @name Bus Operations |
AnnaBridge | 171:3a7713b1edbc | 792 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 793 | */ |
AnnaBridge | 171:3a7713b1edbc | 794 | |
AnnaBridge | 171:3a7713b1edbc | 795 | /*! |
AnnaBridge | 171:3a7713b1edbc | 796 | * @brief Writes an MCAN Message to the Transmit Buffer. |
AnnaBridge | 171:3a7713b1edbc | 797 | * |
AnnaBridge | 171:3a7713b1edbc | 798 | * This function writes a CAN Message to the specified Transmit Message Buffer |
AnnaBridge | 171:3a7713b1edbc | 799 | * and changes the Message Buffer state to start CAN Message transmit. After |
AnnaBridge | 171:3a7713b1edbc | 800 | * that the function returns immediately. |
AnnaBridge | 171:3a7713b1edbc | 801 | * |
AnnaBridge | 171:3a7713b1edbc | 802 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 803 | * @param idx The MCAN Tx Buffer index. |
AnnaBridge | 171:3a7713b1edbc | 804 | * @param txFrame Pointer to CAN message frame to be sent. |
AnnaBridge | 171:3a7713b1edbc | 805 | */ |
AnnaBridge | 171:3a7713b1edbc | 806 | status_t MCAN_WriteTxBuffer(CAN_Type *base, uint8_t idx, const mcan_tx_buffer_frame_t *txFrame); |
AnnaBridge | 171:3a7713b1edbc | 807 | |
AnnaBridge | 171:3a7713b1edbc | 808 | /*! |
AnnaBridge | 171:3a7713b1edbc | 809 | * @brief Reads an MCAN Message from Rx FIFO. |
AnnaBridge | 171:3a7713b1edbc | 810 | * |
AnnaBridge | 171:3a7713b1edbc | 811 | * This function reads a CAN message from the Rx FIFO in the Message RAM. |
AnnaBridge | 171:3a7713b1edbc | 812 | * |
AnnaBridge | 171:3a7713b1edbc | 813 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 814 | * @param fifoBlock Rx FIFO block 0 or 1. |
AnnaBridge | 171:3a7713b1edbc | 815 | * @param rxFrame Pointer to CAN message frame structure for reception. |
AnnaBridge | 171:3a7713b1edbc | 816 | * @retval kStatus_Success - Read Message from Rx FIFO successfully. |
AnnaBridge | 171:3a7713b1edbc | 817 | */ |
AnnaBridge | 171:3a7713b1edbc | 818 | status_t MCAN_ReadRxFifo(CAN_Type *base, uint8_t fifoBlock, mcan_rx_buffer_frame_t *rxFrame); |
AnnaBridge | 171:3a7713b1edbc | 819 | |
AnnaBridge | 171:3a7713b1edbc | 820 | /* @} */ |
AnnaBridge | 171:3a7713b1edbc | 821 | |
AnnaBridge | 171:3a7713b1edbc | 822 | /*! |
AnnaBridge | 171:3a7713b1edbc | 823 | * @name Transactional |
AnnaBridge | 171:3a7713b1edbc | 824 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 825 | */ |
AnnaBridge | 171:3a7713b1edbc | 826 | |
AnnaBridge | 171:3a7713b1edbc | 827 | /*! |
AnnaBridge | 171:3a7713b1edbc | 828 | * @brief Tx Buffer add request to send message out. |
AnnaBridge | 171:3a7713b1edbc | 829 | * |
AnnaBridge | 171:3a7713b1edbc | 830 | * This function add sending request to corresponding Tx Buffer. |
AnnaBridge | 171:3a7713b1edbc | 831 | * |
AnnaBridge | 171:3a7713b1edbc | 832 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 833 | * @param idx Tx Buffer index. |
AnnaBridge | 171:3a7713b1edbc | 834 | */ |
AnnaBridge | 171:3a7713b1edbc | 835 | static inline void MCAN_TransmitAddRequest(CAN_Type *base, uint8_t idx) |
AnnaBridge | 171:3a7713b1edbc | 836 | { |
AnnaBridge | 171:3a7713b1edbc | 837 | base->TXBAR |= (uint32_t)(1U << idx); |
AnnaBridge | 171:3a7713b1edbc | 838 | } |
AnnaBridge | 171:3a7713b1edbc | 839 | |
AnnaBridge | 171:3a7713b1edbc | 840 | /*! |
AnnaBridge | 171:3a7713b1edbc | 841 | * @brief Tx Buffer cancel sending request. |
AnnaBridge | 171:3a7713b1edbc | 842 | * |
AnnaBridge | 171:3a7713b1edbc | 843 | * This function clears Tx buffer request pending bit. |
AnnaBridge | 171:3a7713b1edbc | 844 | * |
AnnaBridge | 171:3a7713b1edbc | 845 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 846 | * @param idx Tx Buffer index. |
AnnaBridge | 171:3a7713b1edbc | 847 | */ |
AnnaBridge | 171:3a7713b1edbc | 848 | static inline void MCAN_TransmitCancelRequest(CAN_Type *base, uint8_t idx) |
AnnaBridge | 171:3a7713b1edbc | 849 | { |
AnnaBridge | 171:3a7713b1edbc | 850 | base->TXBCR |= (uint32_t)(1U << idx); |
AnnaBridge | 171:3a7713b1edbc | 851 | } |
AnnaBridge | 171:3a7713b1edbc | 852 | |
AnnaBridge | 171:3a7713b1edbc | 853 | /*! |
AnnaBridge | 171:3a7713b1edbc | 854 | * @brief Performs a polling send transaction on the CAN bus. |
AnnaBridge | 171:3a7713b1edbc | 855 | * |
AnnaBridge | 171:3a7713b1edbc | 856 | * Note that a transfer handle does not need to be created before calling this API. |
AnnaBridge | 171:3a7713b1edbc | 857 | * |
AnnaBridge | 171:3a7713b1edbc | 858 | * @param base MCAN peripheral base pointer. |
AnnaBridge | 171:3a7713b1edbc | 859 | * @param idx The MCAN buffer index. |
AnnaBridge | 171:3a7713b1edbc | 860 | * @param txFrame Pointer to CAN message frame to be sent. |
AnnaBridge | 171:3a7713b1edbc | 861 | * @retval kStatus_Success - Write Tx Message Buffer Successfully. |
AnnaBridge | 171:3a7713b1edbc | 862 | * @retval kStatus_Fail - Tx Message Buffer is currently in use. |
AnnaBridge | 171:3a7713b1edbc | 863 | */ |
AnnaBridge | 171:3a7713b1edbc | 864 | status_t MCAN_TransferSendBlocking(CAN_Type *base, uint8_t idx, mcan_tx_buffer_frame_t *txFrame); |
AnnaBridge | 171:3a7713b1edbc | 865 | |
AnnaBridge | 171:3a7713b1edbc | 866 | /*! |
AnnaBridge | 171:3a7713b1edbc | 867 | * @brief Performs a polling receive transaction from Rx FIFO on the CAN bus. |
AnnaBridge | 171:3a7713b1edbc | 868 | * |
AnnaBridge | 171:3a7713b1edbc | 869 | * Note that a transfer handle does not need to be created before calling this API. |
AnnaBridge | 171:3a7713b1edbc | 870 | * |
AnnaBridge | 171:3a7713b1edbc | 871 | * @param base MCAN peripheral base pointer. |
AnnaBridge | 171:3a7713b1edbc | 872 | * @param fifoBlock Rx FIFO block, 0 or 1. |
AnnaBridge | 171:3a7713b1edbc | 873 | * @param rxFrame Pointer to CAN message frame structure for reception. |
AnnaBridge | 171:3a7713b1edbc | 874 | * @retval kStatus_Success - Read Message from Rx FIFO successfully. |
AnnaBridge | 171:3a7713b1edbc | 875 | * @retval kStatus_Fail - No new message in Rx FIFO. |
AnnaBridge | 171:3a7713b1edbc | 876 | */ |
AnnaBridge | 171:3a7713b1edbc | 877 | status_t MCAN_TransferReceiveFifoBlocking(CAN_Type *base, uint8_t fifoBlock, mcan_rx_buffer_frame_t *rxFrame); |
AnnaBridge | 171:3a7713b1edbc | 878 | |
AnnaBridge | 171:3a7713b1edbc | 879 | /*! |
AnnaBridge | 171:3a7713b1edbc | 880 | * @brief Initializes the MCAN handle. |
AnnaBridge | 171:3a7713b1edbc | 881 | * |
AnnaBridge | 171:3a7713b1edbc | 882 | * This function initializes the MCAN handle, which can be used for other MCAN |
AnnaBridge | 171:3a7713b1edbc | 883 | * transactional APIs. Usually, for a specified MCAN instance, |
AnnaBridge | 171:3a7713b1edbc | 884 | * call this API once to get the initialized handle. |
AnnaBridge | 171:3a7713b1edbc | 885 | * |
AnnaBridge | 171:3a7713b1edbc | 886 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 887 | * @param handle MCAN handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 888 | * @param callback The callback function. |
AnnaBridge | 171:3a7713b1edbc | 889 | * @param userData The parameter of the callback function. |
AnnaBridge | 171:3a7713b1edbc | 890 | */ |
AnnaBridge | 171:3a7713b1edbc | 891 | void MCAN_TransferCreateHandle(CAN_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 892 | mcan_handle_t *handle, |
AnnaBridge | 171:3a7713b1edbc | 893 | mcan_transfer_callback_t callback, |
AnnaBridge | 171:3a7713b1edbc | 894 | void *userData); |
AnnaBridge | 171:3a7713b1edbc | 895 | |
AnnaBridge | 171:3a7713b1edbc | 896 | /*! |
AnnaBridge | 171:3a7713b1edbc | 897 | * @brief Sends a message using IRQ. |
AnnaBridge | 171:3a7713b1edbc | 898 | * |
AnnaBridge | 171:3a7713b1edbc | 899 | * This function sends a message using IRQ. This is a non-blocking function, which returns |
AnnaBridge | 171:3a7713b1edbc | 900 | * right away. When messages have been sent out, the send callback function is called. |
AnnaBridge | 171:3a7713b1edbc | 901 | * |
AnnaBridge | 171:3a7713b1edbc | 902 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 903 | * @param handle MCAN handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 904 | * @param xfer MCAN Buffer transfer structure. See the #mcan_buffer_transfer_t. |
AnnaBridge | 171:3a7713b1edbc | 905 | * @retval kStatus_Success Start Tx Buffer sending process successfully. |
AnnaBridge | 171:3a7713b1edbc | 906 | * @retval kStatus_Fail Write Tx Buffer failed. |
AnnaBridge | 171:3a7713b1edbc | 907 | * @retval kStatus_MCAN_TxBusy Tx Buffer is in use. |
AnnaBridge | 171:3a7713b1edbc | 908 | */ |
AnnaBridge | 171:3a7713b1edbc | 909 | status_t MCAN_TransferSendNonBlocking(CAN_Type *base, mcan_handle_t *handle, mcan_buffer_transfer_t *xfer); |
AnnaBridge | 171:3a7713b1edbc | 910 | |
AnnaBridge | 171:3a7713b1edbc | 911 | /*! |
AnnaBridge | 171:3a7713b1edbc | 912 | * @brief Receives a message from Rx FIFO using IRQ. |
AnnaBridge | 171:3a7713b1edbc | 913 | * |
AnnaBridge | 171:3a7713b1edbc | 914 | * This function receives a message using IRQ. This is a non-blocking function, which returns |
AnnaBridge | 171:3a7713b1edbc | 915 | * right away. When all messages have been received, the receive callback function is called. |
AnnaBridge | 171:3a7713b1edbc | 916 | * |
AnnaBridge | 171:3a7713b1edbc | 917 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 918 | * @param handle MCAN handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 919 | * @param fifoBlock Rx FIFO block, 0 or 1. |
AnnaBridge | 171:3a7713b1edbc | 920 | * @param xfer MCAN Rx FIFO transfer structure. See the @ref mcan_fifo_transfer_t. |
AnnaBridge | 171:3a7713b1edbc | 921 | * @retval kStatus_Success - Start Rx FIFO receiving process successfully. |
AnnaBridge | 171:3a7713b1edbc | 922 | * @retval kStatus_MCAN_RxFifo0Busy - Rx FIFO 0 is currently in use. |
AnnaBridge | 171:3a7713b1edbc | 923 | * @retval kStatus_MCAN_RxFifo1Busy - Rx FIFO 1 is currently in use. |
AnnaBridge | 171:3a7713b1edbc | 924 | */ |
AnnaBridge | 171:3a7713b1edbc | 925 | status_t MCAN_TransferReceiveFifoNonBlocking(CAN_Type *base, |
AnnaBridge | 171:3a7713b1edbc | 926 | uint8_t fifoBlock, |
AnnaBridge | 171:3a7713b1edbc | 927 | mcan_handle_t *handle, |
AnnaBridge | 171:3a7713b1edbc | 928 | mcan_fifo_transfer_t *xfer); |
AnnaBridge | 171:3a7713b1edbc | 929 | |
AnnaBridge | 171:3a7713b1edbc | 930 | /*! |
AnnaBridge | 171:3a7713b1edbc | 931 | * @brief Aborts the interrupt driven message send process. |
AnnaBridge | 171:3a7713b1edbc | 932 | * |
AnnaBridge | 171:3a7713b1edbc | 933 | * This function aborts the interrupt driven message send process. |
AnnaBridge | 171:3a7713b1edbc | 934 | * |
AnnaBridge | 171:3a7713b1edbc | 935 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 936 | * @param handle MCAN handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 937 | * @param bufferIdx The MCAN Buffer index. |
AnnaBridge | 171:3a7713b1edbc | 938 | */ |
AnnaBridge | 171:3a7713b1edbc | 939 | void MCAN_TransferAbortSend(CAN_Type *base, mcan_handle_t *handle, uint8_t bufferIdx); |
AnnaBridge | 171:3a7713b1edbc | 940 | |
AnnaBridge | 171:3a7713b1edbc | 941 | /*! |
AnnaBridge | 171:3a7713b1edbc | 942 | * @brief Aborts the interrupt driven message receive from Rx FIFO process. |
AnnaBridge | 171:3a7713b1edbc | 943 | * |
AnnaBridge | 171:3a7713b1edbc | 944 | * This function aborts the interrupt driven message receive from Rx FIFO process. |
AnnaBridge | 171:3a7713b1edbc | 945 | * |
AnnaBridge | 171:3a7713b1edbc | 946 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 947 | * @param fifoBlock MCAN Fifo block, 0 or 1. |
AnnaBridge | 171:3a7713b1edbc | 948 | * @param handle MCAN handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 949 | */ |
AnnaBridge | 171:3a7713b1edbc | 950 | void MCAN_TransferAbortReceiveFifo(CAN_Type *base, uint8_t fifoBlock, mcan_handle_t *handle); |
AnnaBridge | 171:3a7713b1edbc | 951 | |
AnnaBridge | 171:3a7713b1edbc | 952 | /*! |
AnnaBridge | 171:3a7713b1edbc | 953 | * @brief MCAN IRQ handle function. |
AnnaBridge | 171:3a7713b1edbc | 954 | * |
AnnaBridge | 171:3a7713b1edbc | 955 | * This function handles the MCAN Error, the Buffer, and the Rx FIFO IRQ request. |
AnnaBridge | 171:3a7713b1edbc | 956 | * |
AnnaBridge | 171:3a7713b1edbc | 957 | * @param base MCAN peripheral base address. |
AnnaBridge | 171:3a7713b1edbc | 958 | * @param handle MCAN handle pointer. |
AnnaBridge | 171:3a7713b1edbc | 959 | */ |
AnnaBridge | 171:3a7713b1edbc | 960 | void MCAN_TransferHandleIRQ(CAN_Type *base, mcan_handle_t *handle); |
AnnaBridge | 171:3a7713b1edbc | 961 | |
AnnaBridge | 171:3a7713b1edbc | 962 | /* @} */ |
AnnaBridge | 171:3a7713b1edbc | 963 | |
AnnaBridge | 171:3a7713b1edbc | 964 | #if defined(__cplusplus) |
AnnaBridge | 171:3a7713b1edbc | 965 | } |
AnnaBridge | 171:3a7713b1edbc | 966 | #endif |
AnnaBridge | 171:3a7713b1edbc | 967 | |
AnnaBridge | 171:3a7713b1edbc | 968 | /*! @}*/ |
AnnaBridge | 171:3a7713b1edbc | 969 | |
AnnaBridge | 171:3a7713b1edbc | 970 | #endif /* _FSL_MCAN_H_ */ |