mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_KL27Z/TOOLCHAIN_IAR/fsl_dma.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 3 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 4 *
AnnaBridge 171:3a7713b1edbc 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 6 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 9 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 13 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 14 *
AnnaBridge 171:3a7713b1edbc 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
AnnaBridge 171:3a7713b1edbc 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 17 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 18 *
AnnaBridge 171:3a7713b1edbc 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 29 */
AnnaBridge 171:3a7713b1edbc 30
AnnaBridge 171:3a7713b1edbc 31 #ifndef _FSL_DMA_H_
AnnaBridge 171:3a7713b1edbc 32 #define _FSL_DMA_H_
AnnaBridge 171:3a7713b1edbc 33
AnnaBridge 171:3a7713b1edbc 34 #include "fsl_common.h"
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /*!
AnnaBridge 171:3a7713b1edbc 37 * @addtogroup dma_driver
AnnaBridge 171:3a7713b1edbc 38 * @{
AnnaBridge 171:3a7713b1edbc 39 */
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 /*! @file */
AnnaBridge 171:3a7713b1edbc 42
AnnaBridge 171:3a7713b1edbc 43 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 44 * Definitions
AnnaBridge 171:3a7713b1edbc 45 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /*! @name Driver version */
AnnaBridge 171:3a7713b1edbc 48 /*@{*/
AnnaBridge 171:3a7713b1edbc 49 /*! @brief DMA driver version 2.0.0. */
AnnaBridge 171:3a7713b1edbc 50 #define FSL_DMA_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
AnnaBridge 171:3a7713b1edbc 51 /*@}*/
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /*! @brief status flag for the DMA driver. */
AnnaBridge 171:3a7713b1edbc 54 enum _dma_channel_status_flags
AnnaBridge 171:3a7713b1edbc 55 {
AnnaBridge 171:3a7713b1edbc 56 kDMA_TransactionsBCRFlag = DMA_DSR_BCR_BCR_MASK, /*!< Contains the number of bytes yet to be
AnnaBridge 171:3a7713b1edbc 57 transferred for a given block */
AnnaBridge 171:3a7713b1edbc 58 kDMA_TransactionsDoneFlag = DMA_DSR_BCR_DONE_MASK, /*!< Transactions Done */
AnnaBridge 171:3a7713b1edbc 59 kDMA_TransactionsBusyFlag = DMA_DSR_BCR_BSY_MASK, /*!< Transactions Busy */
AnnaBridge 171:3a7713b1edbc 60 kDMA_TransactionsRequestFlag = DMA_DSR_BCR_REQ_MASK, /*!< Transactions Request */
AnnaBridge 171:3a7713b1edbc 61 kDMA_BusErrorOnDestinationFlag = DMA_DSR_BCR_BED_MASK, /*!< Bus Error on Destination */
AnnaBridge 171:3a7713b1edbc 62 kDMA_BusErrorOnSourceFlag = DMA_DSR_BCR_BES_MASK, /*!< Bus Error on Source */
AnnaBridge 171:3a7713b1edbc 63 kDMA_ConfigurationErrorFlag = DMA_DSR_BCR_CE_MASK, /*!< Configuration Error */
AnnaBridge 171:3a7713b1edbc 64 };
AnnaBridge 171:3a7713b1edbc 65
AnnaBridge 171:3a7713b1edbc 66 /*! @brief DMA transfer size type*/
AnnaBridge 171:3a7713b1edbc 67 typedef enum _dma_transfer_size
AnnaBridge 171:3a7713b1edbc 68 {
AnnaBridge 171:3a7713b1edbc 69 kDMA_Transfersize32bits = 0x0U, /*!< 32 bits are transferred for every read/write */
AnnaBridge 171:3a7713b1edbc 70 kDMA_Transfersize8bits, /*!< 8 bits are transferred for every read/write */
AnnaBridge 171:3a7713b1edbc 71 kDMA_Transfersize16bits, /*!< 16b its are transferred for every read/write */
AnnaBridge 171:3a7713b1edbc 72 } dma_transfer_size_t;
AnnaBridge 171:3a7713b1edbc 73
AnnaBridge 171:3a7713b1edbc 74 /*! @brief Configuration type for the DMA modulo */
AnnaBridge 171:3a7713b1edbc 75 typedef enum _dma_modulo
AnnaBridge 171:3a7713b1edbc 76 {
AnnaBridge 171:3a7713b1edbc 77 kDMA_ModuloDisable = 0x0U, /*!< Buffer disabled */
AnnaBridge 171:3a7713b1edbc 78 kDMA_Modulo16Bytes, /*!< Circular buffer size is 16 bytes. */
AnnaBridge 171:3a7713b1edbc 79 kDMA_Modulo32Bytes, /*!< Circular buffer size is 32 bytes. */
AnnaBridge 171:3a7713b1edbc 80 kDMA_Modulo64Bytes, /*!< Circular buffer size is 64 bytes. */
AnnaBridge 171:3a7713b1edbc 81 kDMA_Modulo128Bytes, /*!< Circular buffer size is 128 bytes. */
AnnaBridge 171:3a7713b1edbc 82 kDMA_Modulo256Bytes, /*!< Circular buffer size is 256 bytes. */
AnnaBridge 171:3a7713b1edbc 83 kDMA_Modulo512Bytes, /*!< Circular buffer size is 512 bytes. */
AnnaBridge 171:3a7713b1edbc 84 kDMA_Modulo1KBytes, /*!< Circular buffer size is 1 KB. */
AnnaBridge 171:3a7713b1edbc 85 kDMA_Modulo2KBytes, /*!< Circular buffer size is 2 KB. */
AnnaBridge 171:3a7713b1edbc 86 kDMA_Modulo4KBytes, /*!< Circular buffer size is 4 KB. */
AnnaBridge 171:3a7713b1edbc 87 kDMA_Modulo8KBytes, /*!< Circular buffer size is 8 KB. */
AnnaBridge 171:3a7713b1edbc 88 kDMA_Modulo16KBytes, /*!< Circular buffer size is 16 KB. */
AnnaBridge 171:3a7713b1edbc 89 kDMA_Modulo32KBytes, /*!< Circular buffer size is 32 KB. */
AnnaBridge 171:3a7713b1edbc 90 kDMA_Modulo64KBytes, /*!< Circular buffer size is 64 KB. */
AnnaBridge 171:3a7713b1edbc 91 kDMA_Modulo128KBytes, /*!< Circular buffer size is 128 KB. */
AnnaBridge 171:3a7713b1edbc 92 kDMA_Modulo256KBytes, /*!< Circular buffer size is 256 KB. */
AnnaBridge 171:3a7713b1edbc 93 } dma_modulo_t;
AnnaBridge 171:3a7713b1edbc 94
AnnaBridge 171:3a7713b1edbc 95 /*! @brief DMA channel link type */
AnnaBridge 171:3a7713b1edbc 96 typedef enum _dma_channel_link_type
AnnaBridge 171:3a7713b1edbc 97 {
AnnaBridge 171:3a7713b1edbc 98 kDMA_ChannelLinkDisable = 0x0U, /*!< No channel link. */
AnnaBridge 171:3a7713b1edbc 99 kDMA_ChannelLinkChannel1AndChannel2, /*!< Perform a link to channel LCH1 after each cycle-steal transfer.
AnnaBridge 171:3a7713b1edbc 100 followed by a link to LCH2 after the BCR decrements to 0. */
AnnaBridge 171:3a7713b1edbc 101 kDMA_ChannelLinkChannel1, /*!< Perform a link to LCH1 after each cycle-steal transfer. */
AnnaBridge 171:3a7713b1edbc 102 kDMA_ChannelLinkChannel1AfterBCR0, /*!< Perform a link to LCH1 after the BCR decrements. */
AnnaBridge 171:3a7713b1edbc 103 } dma_channel_link_type_t;
AnnaBridge 171:3a7713b1edbc 104
AnnaBridge 171:3a7713b1edbc 105 /*! @brief DMA transfer type */
AnnaBridge 171:3a7713b1edbc 106 typedef enum _dma_transfer_type
AnnaBridge 171:3a7713b1edbc 107 {
AnnaBridge 171:3a7713b1edbc 108 kDMA_MemoryToMemory = 0x0U, /*!< Memory to Memory transfer. */
AnnaBridge 171:3a7713b1edbc 109 kDMA_PeripheralToMemory, /*!< Peripheral to Memory transfer. */
AnnaBridge 171:3a7713b1edbc 110 kDMA_MemoryToPeripheral, /*!< Memory to Peripheral transfer. */
AnnaBridge 171:3a7713b1edbc 111 } dma_transfer_type_t;
AnnaBridge 171:3a7713b1edbc 112
AnnaBridge 171:3a7713b1edbc 113 /*! @brief DMA transfer options */
AnnaBridge 171:3a7713b1edbc 114 typedef enum _dma_transfer_options
AnnaBridge 171:3a7713b1edbc 115 {
AnnaBridge 171:3a7713b1edbc 116 kDMA_NoOptions = 0x0U, /*!< Transfer without options. */
AnnaBridge 171:3a7713b1edbc 117 kDMA_EnableInterrupt, /*!< Enable interrupt while transfer complete. */
AnnaBridge 171:3a7713b1edbc 118 } dma_transfer_options_t;
AnnaBridge 171:3a7713b1edbc 119
AnnaBridge 171:3a7713b1edbc 120 /*! @brief DMA transfer status */
AnnaBridge 171:3a7713b1edbc 121 enum _dma_transfer_status
AnnaBridge 171:3a7713b1edbc 122 {
AnnaBridge 171:3a7713b1edbc 123 kStatus_DMA_Busy = MAKE_STATUS(kStatusGroup_DMA, 0),
AnnaBridge 171:3a7713b1edbc 124 };
AnnaBridge 171:3a7713b1edbc 125
AnnaBridge 171:3a7713b1edbc 126 /*! @brief DMA transfer configuration structure */
AnnaBridge 171:3a7713b1edbc 127 typedef struct _dma_transfer_config
AnnaBridge 171:3a7713b1edbc 128 {
AnnaBridge 171:3a7713b1edbc 129 uint32_t srcAddr; /*!< DMA transfer source address. */
AnnaBridge 171:3a7713b1edbc 130 uint32_t destAddr; /*!< DMA destination address.*/
AnnaBridge 171:3a7713b1edbc 131 bool enableSrcIncrement; /*!< Source address increase after each transfer. */
AnnaBridge 171:3a7713b1edbc 132 dma_transfer_size_t srcSize; /*!< Source transfer size unit. */
AnnaBridge 171:3a7713b1edbc 133 bool enableDestIncrement; /*!< Destination address increase after each transfer. */
AnnaBridge 171:3a7713b1edbc 134 dma_transfer_size_t destSize; /*!< Destination transfer unit.*/
AnnaBridge 171:3a7713b1edbc 135 uint32_t transferSize; /*!< The number of bytes to be transferred. */
AnnaBridge 171:3a7713b1edbc 136 } dma_transfer_config_t;
AnnaBridge 171:3a7713b1edbc 137
AnnaBridge 171:3a7713b1edbc 138 /*! @brief DMA transfer configuration structure */
AnnaBridge 171:3a7713b1edbc 139 typedef struct _dma_channel_link_config
AnnaBridge 171:3a7713b1edbc 140 {
AnnaBridge 171:3a7713b1edbc 141 dma_channel_link_type_t linkType; /*!< Channel link type. */
AnnaBridge 171:3a7713b1edbc 142 uint32_t channel1; /*!< The index of channel 1. */
AnnaBridge 171:3a7713b1edbc 143 uint32_t channel2; /*!< The index of channel 2. */
AnnaBridge 171:3a7713b1edbc 144 } dma_channel_link_config_t;
AnnaBridge 171:3a7713b1edbc 145
AnnaBridge 171:3a7713b1edbc 146 struct _dma_handle;
AnnaBridge 171:3a7713b1edbc 147 /*! @brief Callback function prototype for the DMA driver. */
AnnaBridge 171:3a7713b1edbc 148 typedef void (*dma_callback)(struct _dma_handle *handle, void *userData);
AnnaBridge 171:3a7713b1edbc 149
AnnaBridge 171:3a7713b1edbc 150 /*! @brief DMA DMA handle structure */
AnnaBridge 171:3a7713b1edbc 151 typedef struct _dma_handle
AnnaBridge 171:3a7713b1edbc 152 {
AnnaBridge 171:3a7713b1edbc 153 DMA_Type *base; /*!< DMA peripheral address. */
AnnaBridge 171:3a7713b1edbc 154 uint8_t channel; /*!< DMA channel used. */
AnnaBridge 171:3a7713b1edbc 155 dma_callback callback; /*!< DMA callback function.*/
AnnaBridge 171:3a7713b1edbc 156 void *userData; /*!< Callback parameter. */
AnnaBridge 171:3a7713b1edbc 157 } dma_handle_t;
AnnaBridge 171:3a7713b1edbc 158
AnnaBridge 171:3a7713b1edbc 159 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 160 * API
AnnaBridge 171:3a7713b1edbc 161 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 162 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 163 extern "C" {
AnnaBridge 171:3a7713b1edbc 164 #endif /* __cplusplus */
AnnaBridge 171:3a7713b1edbc 165
AnnaBridge 171:3a7713b1edbc 166 /*!
AnnaBridge 171:3a7713b1edbc 167 * @name DMA Initialization and De-initialization
AnnaBridge 171:3a7713b1edbc 168 * @{
AnnaBridge 171:3a7713b1edbc 169 */
AnnaBridge 171:3a7713b1edbc 170
AnnaBridge 171:3a7713b1edbc 171 /*!
AnnaBridge 171:3a7713b1edbc 172 * @brief Initializes the DMA peripheral.
AnnaBridge 171:3a7713b1edbc 173 *
AnnaBridge 171:3a7713b1edbc 174 * This function ungates the DMA clock.
AnnaBridge 171:3a7713b1edbc 175 *
AnnaBridge 171:3a7713b1edbc 176 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 177 */
AnnaBridge 171:3a7713b1edbc 178 void DMA_Init(DMA_Type *base);
AnnaBridge 171:3a7713b1edbc 179
AnnaBridge 171:3a7713b1edbc 180 /*!
AnnaBridge 171:3a7713b1edbc 181 * @brief Deinitializes the DMA peripheral.
AnnaBridge 171:3a7713b1edbc 182 *
AnnaBridge 171:3a7713b1edbc 183 * This function gates the DMA clock.
AnnaBridge 171:3a7713b1edbc 184 *
AnnaBridge 171:3a7713b1edbc 185 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 186 */
AnnaBridge 171:3a7713b1edbc 187 void DMA_Deinit(DMA_Type *base);
AnnaBridge 171:3a7713b1edbc 188
AnnaBridge 171:3a7713b1edbc 189 /* @} */
AnnaBridge 171:3a7713b1edbc 190 /*!
AnnaBridge 171:3a7713b1edbc 191 * @name DMA Channel Operation
AnnaBridge 171:3a7713b1edbc 192 * @{
AnnaBridge 171:3a7713b1edbc 193 */
AnnaBridge 171:3a7713b1edbc 194
AnnaBridge 171:3a7713b1edbc 195 /*!
AnnaBridge 171:3a7713b1edbc 196 * @brief Resets the DMA channel.
AnnaBridge 171:3a7713b1edbc 197 *
AnnaBridge 171:3a7713b1edbc 198 * Sets all register values to reset values and enables
AnnaBridge 171:3a7713b1edbc 199 * the cycle steal and auto stop channel request features.
AnnaBridge 171:3a7713b1edbc 200 *
AnnaBridge 171:3a7713b1edbc 201 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 202 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 203 */
AnnaBridge 171:3a7713b1edbc 204 void DMA_ResetChannel(DMA_Type *base, uint32_t channel);
AnnaBridge 171:3a7713b1edbc 205
AnnaBridge 171:3a7713b1edbc 206 /*!
AnnaBridge 171:3a7713b1edbc 207 * @brief Configures the DMA transfer attribute.
AnnaBridge 171:3a7713b1edbc 208 *
AnnaBridge 171:3a7713b1edbc 209 * This function configures the transfer attribute including the source address,
AnnaBridge 171:3a7713b1edbc 210 * destination address, transfer size, and so on.
AnnaBridge 171:3a7713b1edbc 211 * This example shows how to set up the the dma_transfer_config_t
AnnaBridge 171:3a7713b1edbc 212 * parameters and how to call the DMA_ConfigBasicTransfer function.
AnnaBridge 171:3a7713b1edbc 213 * @code
AnnaBridge 171:3a7713b1edbc 214 * dma_transfer_config_t transferConfig;
AnnaBridge 171:3a7713b1edbc 215 * memset(&transferConfig, 0, sizeof(transferConfig));
AnnaBridge 171:3a7713b1edbc 216 * transferConfig.srcAddr = (uint32_t)srcAddr;
AnnaBridge 171:3a7713b1edbc 217 * transferConfig.destAddr = (uint32_t)destAddr;
AnnaBridge 171:3a7713b1edbc 218 * transferConfig.enbaleSrcIncrement = true;
AnnaBridge 171:3a7713b1edbc 219 * transferConfig.enableDestIncrement = true;
AnnaBridge 171:3a7713b1edbc 220 * transferConfig.srcSize = kDMA_Transfersize32bits;
AnnaBridge 171:3a7713b1edbc 221 * transferConfig.destSize = kDMA_Transfersize32bits;
AnnaBridge 171:3a7713b1edbc 222 * transferConfig.transferSize = sizeof(uint32_t) * BUFF_LENGTH;
AnnaBridge 171:3a7713b1edbc 223 * DMA_SetTransferConfig(DMA0, 0, &transferConfig);
AnnaBridge 171:3a7713b1edbc 224 * @endcode
AnnaBridge 171:3a7713b1edbc 225 *
AnnaBridge 171:3a7713b1edbc 226 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 227 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 228 * @param config Pointer to the DMA transfer configuration structure.
AnnaBridge 171:3a7713b1edbc 229 */
AnnaBridge 171:3a7713b1edbc 230 void DMA_SetTransferConfig(DMA_Type *base, uint32_t channel, const dma_transfer_config_t *config);
AnnaBridge 171:3a7713b1edbc 231
AnnaBridge 171:3a7713b1edbc 232 /*!
AnnaBridge 171:3a7713b1edbc 233 * @brief Configures the DMA channel link feature.
AnnaBridge 171:3a7713b1edbc 234 *
AnnaBridge 171:3a7713b1edbc 235 * This function allows DMA channels to have their transfers linked. The current DMA channel
AnnaBridge 171:3a7713b1edbc 236 * triggers a DMA request to the linked channels (LCH1 or LCH2) depending on the channel link
AnnaBridge 171:3a7713b1edbc 237 * type.
AnnaBridge 171:3a7713b1edbc 238 * Perform a link to channel LCH1 after each cycle-steal transfer followed by a link to LCH2
AnnaBridge 171:3a7713b1edbc 239 * after the BCR decrements to 0 if the type is kDMA_ChannelLinkChannel1AndChannel2.
AnnaBridge 171:3a7713b1edbc 240 * Perform a link to LCH1 after each cycle-steal transfer if the type is kDMA_ChannelLinkChannel1.
AnnaBridge 171:3a7713b1edbc 241 * Perform a link to LCH1 after the BCR decrements to 0 if the type is kDMA_ChannelLinkChannel1AfterBCR0.
AnnaBridge 171:3a7713b1edbc 242 *
AnnaBridge 171:3a7713b1edbc 243 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 244 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 245 * @param config Pointer to the channel link configuration structure.
AnnaBridge 171:3a7713b1edbc 246 */
AnnaBridge 171:3a7713b1edbc 247 void DMA_SetChannelLinkConfig(DMA_Type *base, uint32_t channel, const dma_channel_link_config_t *config);
AnnaBridge 171:3a7713b1edbc 248
AnnaBridge 171:3a7713b1edbc 249 /*!
AnnaBridge 171:3a7713b1edbc 250 * @brief Sets the DMA source address for the DMA transfer.
AnnaBridge 171:3a7713b1edbc 251 *
AnnaBridge 171:3a7713b1edbc 252 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 253 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 254 * @param srcAddr DMA source address.
AnnaBridge 171:3a7713b1edbc 255 */
AnnaBridge 171:3a7713b1edbc 256 static inline void DMA_SetSourceAddress(DMA_Type *base, uint32_t channel, uint32_t srcAddr)
AnnaBridge 171:3a7713b1edbc 257 {
AnnaBridge 171:3a7713b1edbc 258 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
AnnaBridge 171:3a7713b1edbc 259
AnnaBridge 171:3a7713b1edbc 260 base->DMA[channel].SAR = srcAddr;
AnnaBridge 171:3a7713b1edbc 261 }
AnnaBridge 171:3a7713b1edbc 262
AnnaBridge 171:3a7713b1edbc 263 /*!
AnnaBridge 171:3a7713b1edbc 264 * @brief Sets the DMA destination address for the DMA transfer.
AnnaBridge 171:3a7713b1edbc 265 *
AnnaBridge 171:3a7713b1edbc 266 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 267 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 268 * @param destAddr DMA destination address.
AnnaBridge 171:3a7713b1edbc 269 */
AnnaBridge 171:3a7713b1edbc 270 static inline void DMA_SetDestinationAddress(DMA_Type *base, uint32_t channel, uint32_t destAddr)
AnnaBridge 171:3a7713b1edbc 271 {
AnnaBridge 171:3a7713b1edbc 272 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
AnnaBridge 171:3a7713b1edbc 273
AnnaBridge 171:3a7713b1edbc 274 base->DMA[channel].DAR = destAddr;
AnnaBridge 171:3a7713b1edbc 275 }
AnnaBridge 171:3a7713b1edbc 276
AnnaBridge 171:3a7713b1edbc 277 /*!
AnnaBridge 171:3a7713b1edbc 278 * @brief Sets the DMA transfer size for the DMA transfer.
AnnaBridge 171:3a7713b1edbc 279 *
AnnaBridge 171:3a7713b1edbc 280 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 281 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 282 * @param size The number of bytes to be transferred.
AnnaBridge 171:3a7713b1edbc 283 */
AnnaBridge 171:3a7713b1edbc 284 static inline void DMA_SetTransferSize(DMA_Type *base, uint32_t channel, uint32_t size)
AnnaBridge 171:3a7713b1edbc 285 {
AnnaBridge 171:3a7713b1edbc 286 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
AnnaBridge 171:3a7713b1edbc 287
AnnaBridge 171:3a7713b1edbc 288 base->DMA[channel].DSR_BCR = DMA_DSR_BCR_BCR(size);
AnnaBridge 171:3a7713b1edbc 289 }
AnnaBridge 171:3a7713b1edbc 290
AnnaBridge 171:3a7713b1edbc 291 /*!
AnnaBridge 171:3a7713b1edbc 292 * @brief Sets the DMA modulo for the DMA transfer.
AnnaBridge 171:3a7713b1edbc 293 *
AnnaBridge 171:3a7713b1edbc 294 * This function defines a specific address range specified to be the value after (SAR + SSIZE)/(DAR + DSIZE)
AnnaBridge 171:3a7713b1edbc 295 * calculation is performed or the original register value. It provides the ability to implement a circular
AnnaBridge 171:3a7713b1edbc 296 * data queue easily.
AnnaBridge 171:3a7713b1edbc 297 *
AnnaBridge 171:3a7713b1edbc 298 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 299 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 300 * @param srcModulo source address modulo.
AnnaBridge 171:3a7713b1edbc 301 * @param destModulo destination address modulo.
AnnaBridge 171:3a7713b1edbc 302 */
AnnaBridge 171:3a7713b1edbc 303 void DMA_SetModulo(DMA_Type *base, uint32_t channel, dma_modulo_t srcModulo, dma_modulo_t destModulo);
AnnaBridge 171:3a7713b1edbc 304
AnnaBridge 171:3a7713b1edbc 305 /*!
AnnaBridge 171:3a7713b1edbc 306 * @brief Enables the DMA cycle steal for the DMA transfer.
AnnaBridge 171:3a7713b1edbc 307 *
AnnaBridge 171:3a7713b1edbc 308 * If the cycle steal feature is enabled (true), the DMA controller forces a single read/write transfer per request,
AnnaBridge 171:3a7713b1edbc 309 * or it continuously makes read/write transfers until the BCR decrements to 0.
AnnaBridge 171:3a7713b1edbc 310 *
AnnaBridge 171:3a7713b1edbc 311 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 312 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 313 * @param enable The command for enable (true) or disable (false).
AnnaBridge 171:3a7713b1edbc 314 */
AnnaBridge 171:3a7713b1edbc 315 static inline void DMA_EnableCycleSteal(DMA_Type *base, uint32_t channel, bool enable)
AnnaBridge 171:3a7713b1edbc 316 {
AnnaBridge 171:3a7713b1edbc 317 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
AnnaBridge 171:3a7713b1edbc 318
AnnaBridge 171:3a7713b1edbc 319 base->DMA[channel].DCR = (base->DMA[channel].DCR & (~DMA_DCR_CS_MASK)) | DMA_DCR_CS(enable);
AnnaBridge 171:3a7713b1edbc 320 }
AnnaBridge 171:3a7713b1edbc 321
AnnaBridge 171:3a7713b1edbc 322 /*!
AnnaBridge 171:3a7713b1edbc 323 * @brief Enables the DMA auto align for the DMA transfer.
AnnaBridge 171:3a7713b1edbc 324 *
AnnaBridge 171:3a7713b1edbc 325 * If the auto align feature is enabled (true), the appropriate address register increments,
AnnaBridge 171:3a7713b1edbc 326 * regardless of DINC or SINC.
AnnaBridge 171:3a7713b1edbc 327 *
AnnaBridge 171:3a7713b1edbc 328 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 329 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 330 * @param enable The command for enable (true) or disable (false).
AnnaBridge 171:3a7713b1edbc 331 */
AnnaBridge 171:3a7713b1edbc 332 static inline void DMA_EnableAutoAlign(DMA_Type *base, uint32_t channel, bool enable)
AnnaBridge 171:3a7713b1edbc 333 {
AnnaBridge 171:3a7713b1edbc 334 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
AnnaBridge 171:3a7713b1edbc 335
AnnaBridge 171:3a7713b1edbc 336 base->DMA[channel].DCR = (base->DMA[channel].DCR & (~DMA_DCR_AA_MASK)) | DMA_DCR_AA(enable);
AnnaBridge 171:3a7713b1edbc 337 }
AnnaBridge 171:3a7713b1edbc 338
AnnaBridge 171:3a7713b1edbc 339 /*!
AnnaBridge 171:3a7713b1edbc 340 * @brief Enables the DMA async request for the DMA transfer.
AnnaBridge 171:3a7713b1edbc 341 *
AnnaBridge 171:3a7713b1edbc 342 * If the async request feature is enabled (true), the DMA supports asynchronous DREQs
AnnaBridge 171:3a7713b1edbc 343 * while the MCU is in stop mode.
AnnaBridge 171:3a7713b1edbc 344 *
AnnaBridge 171:3a7713b1edbc 345 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 346 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 347 * @param enable The command for enable (true) or disable (false).
AnnaBridge 171:3a7713b1edbc 348 */
AnnaBridge 171:3a7713b1edbc 349 static inline void DMA_EnableAsyncRequest(DMA_Type *base, uint32_t channel, bool enable)
AnnaBridge 171:3a7713b1edbc 350 {
AnnaBridge 171:3a7713b1edbc 351 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
AnnaBridge 171:3a7713b1edbc 352
AnnaBridge 171:3a7713b1edbc 353 base->DMA[channel].DCR = (base->DMA[channel].DCR & (~DMA_DCR_EADREQ_MASK)) | DMA_DCR_EADREQ(enable);
AnnaBridge 171:3a7713b1edbc 354 }
AnnaBridge 171:3a7713b1edbc 355
AnnaBridge 171:3a7713b1edbc 356 /*!
AnnaBridge 171:3a7713b1edbc 357 * @brief Enables an interrupt for the DMA transfer.
AnnaBridge 171:3a7713b1edbc 358 *
AnnaBridge 171:3a7713b1edbc 359 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 360 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 361 */
AnnaBridge 171:3a7713b1edbc 362 static inline void DMA_EnableInterrupts(DMA_Type *base, uint32_t channel)
AnnaBridge 171:3a7713b1edbc 363 {
AnnaBridge 171:3a7713b1edbc 364 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
AnnaBridge 171:3a7713b1edbc 365
AnnaBridge 171:3a7713b1edbc 366 base->DMA[channel].DCR |= DMA_DCR_EINT(true);
AnnaBridge 171:3a7713b1edbc 367 }
AnnaBridge 171:3a7713b1edbc 368
AnnaBridge 171:3a7713b1edbc 369 /*!
AnnaBridge 171:3a7713b1edbc 370 * @brief Disables an interrupt for the DMA transfer.
AnnaBridge 171:3a7713b1edbc 371 *
AnnaBridge 171:3a7713b1edbc 372 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 373 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 374 */
AnnaBridge 171:3a7713b1edbc 375 static inline void DMA_DisableInterrupts(DMA_Type *base, uint32_t channel)
AnnaBridge 171:3a7713b1edbc 376 {
AnnaBridge 171:3a7713b1edbc 377 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
AnnaBridge 171:3a7713b1edbc 378
AnnaBridge 171:3a7713b1edbc 379 base->DMA[channel].DCR &= ~DMA_DCR_EINT_MASK;
AnnaBridge 171:3a7713b1edbc 380 }
AnnaBridge 171:3a7713b1edbc 381
AnnaBridge 171:3a7713b1edbc 382 /* @} */
AnnaBridge 171:3a7713b1edbc 383 /*!
AnnaBridge 171:3a7713b1edbc 384 * @name DMA Channel Transfer Operation
AnnaBridge 171:3a7713b1edbc 385 * @{
AnnaBridge 171:3a7713b1edbc 386 */
AnnaBridge 171:3a7713b1edbc 387
AnnaBridge 171:3a7713b1edbc 388 /*!
AnnaBridge 171:3a7713b1edbc 389 * @brief Enables the DMA hardware channel request.
AnnaBridge 171:3a7713b1edbc 390 *
AnnaBridge 171:3a7713b1edbc 391 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 392 * @param channel The DMA channel number.
AnnaBridge 171:3a7713b1edbc 393 */
AnnaBridge 171:3a7713b1edbc 394 static inline void DMA_EnableChannelRequest(DMA_Type *base, uint32_t channel)
AnnaBridge 171:3a7713b1edbc 395 {
AnnaBridge 171:3a7713b1edbc 396 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
AnnaBridge 171:3a7713b1edbc 397
AnnaBridge 171:3a7713b1edbc 398 base->DMA[channel].DCR |= DMA_DCR_ERQ_MASK;
AnnaBridge 171:3a7713b1edbc 399 }
AnnaBridge 171:3a7713b1edbc 400
AnnaBridge 171:3a7713b1edbc 401 /*!
AnnaBridge 171:3a7713b1edbc 402 * @brief Disables the DMA hardware channel request.
AnnaBridge 171:3a7713b1edbc 403 *
AnnaBridge 171:3a7713b1edbc 404 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 405 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 406 */
AnnaBridge 171:3a7713b1edbc 407 static inline void DMA_DisableChannelRequest(DMA_Type *base, uint32_t channel)
AnnaBridge 171:3a7713b1edbc 408 {
AnnaBridge 171:3a7713b1edbc 409 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
AnnaBridge 171:3a7713b1edbc 410
AnnaBridge 171:3a7713b1edbc 411 base->DMA[channel].DCR &= ~DMA_DCR_ERQ_MASK;
AnnaBridge 171:3a7713b1edbc 412 }
AnnaBridge 171:3a7713b1edbc 413
AnnaBridge 171:3a7713b1edbc 414 /*!
AnnaBridge 171:3a7713b1edbc 415 * @brief Starts the DMA transfer with a software trigger.
AnnaBridge 171:3a7713b1edbc 416 *
AnnaBridge 171:3a7713b1edbc 417 * This function starts only one read/write iteration.
AnnaBridge 171:3a7713b1edbc 418 *
AnnaBridge 171:3a7713b1edbc 419 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 420 * @param channel The DMA channel number.
AnnaBridge 171:3a7713b1edbc 421 */
AnnaBridge 171:3a7713b1edbc 422 static inline void DMA_TriggerChannelStart(DMA_Type *base, uint32_t channel)
AnnaBridge 171:3a7713b1edbc 423 {
AnnaBridge 171:3a7713b1edbc 424 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
AnnaBridge 171:3a7713b1edbc 425
AnnaBridge 171:3a7713b1edbc 426 base->DMA[channel].DCR |= DMA_DCR_START_MASK;
AnnaBridge 171:3a7713b1edbc 427 }
AnnaBridge 171:3a7713b1edbc 428
AnnaBridge 171:3a7713b1edbc 429 /* @} */
AnnaBridge 171:3a7713b1edbc 430 /*!
AnnaBridge 171:3a7713b1edbc 431 * @name DMA Channel Status Operation
AnnaBridge 171:3a7713b1edbc 432 * @{
AnnaBridge 171:3a7713b1edbc 433 */
AnnaBridge 171:3a7713b1edbc 434
AnnaBridge 171:3a7713b1edbc 435 /*!
AnnaBridge 171:3a7713b1edbc 436 * @brief Gets the remaining bytes of the current DMA transfer.
AnnaBridge 171:3a7713b1edbc 437 *
AnnaBridge 171:3a7713b1edbc 438 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 439 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 440 * @return The number of bytes which have not been transferred yet.
AnnaBridge 171:3a7713b1edbc 441 */
AnnaBridge 171:3a7713b1edbc 442 static inline uint32_t DMA_GetRemainingBytes(DMA_Type *base, uint32_t channel)
AnnaBridge 171:3a7713b1edbc 443 {
AnnaBridge 171:3a7713b1edbc 444 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
AnnaBridge 171:3a7713b1edbc 445
AnnaBridge 171:3a7713b1edbc 446 return (base->DMA[channel].DSR_BCR & DMA_DSR_BCR_BCR_MASK) >> DMA_DSR_BCR_BCR_SHIFT;
AnnaBridge 171:3a7713b1edbc 447 }
AnnaBridge 171:3a7713b1edbc 448
AnnaBridge 171:3a7713b1edbc 449 /*!
AnnaBridge 171:3a7713b1edbc 450 * @brief Gets the DMA channel status flags.
AnnaBridge 171:3a7713b1edbc 451 *
AnnaBridge 171:3a7713b1edbc 452 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 453 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 454 * @return The mask of the channel status. Use the _dma_channel_status_flags
AnnaBridge 171:3a7713b1edbc 455 * type to decode the return 32 bit variables.
AnnaBridge 171:3a7713b1edbc 456 */
AnnaBridge 171:3a7713b1edbc 457 static inline uint32_t DMA_GetChannelStatusFlags(DMA_Type *base, uint32_t channel)
AnnaBridge 171:3a7713b1edbc 458 {
AnnaBridge 171:3a7713b1edbc 459 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
AnnaBridge 171:3a7713b1edbc 460
AnnaBridge 171:3a7713b1edbc 461 return base->DMA[channel].DSR_BCR;
AnnaBridge 171:3a7713b1edbc 462 }
AnnaBridge 171:3a7713b1edbc 463
AnnaBridge 171:3a7713b1edbc 464 /*!
AnnaBridge 171:3a7713b1edbc 465 * @brief Clears the DMA channel status flags.
AnnaBridge 171:3a7713b1edbc 466 *
AnnaBridge 171:3a7713b1edbc 467 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 468 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 469 * @param mask The mask of the channel status to be cleared. Use
AnnaBridge 171:3a7713b1edbc 470 * the defined _dma_channel_status_flags type.
AnnaBridge 171:3a7713b1edbc 471 */
AnnaBridge 171:3a7713b1edbc 472 static inline void DMA_ClearChannelStatusFlags(DMA_Type *base, uint32_t channel, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 473 {
AnnaBridge 171:3a7713b1edbc 474 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
AnnaBridge 171:3a7713b1edbc 475
AnnaBridge 171:3a7713b1edbc 476 if (mask != 0U)
AnnaBridge 171:3a7713b1edbc 477 {
AnnaBridge 171:3a7713b1edbc 478 base->DMA[channel].DSR_BCR |= DMA_DSR_BCR_DONE(true);
AnnaBridge 171:3a7713b1edbc 479 }
AnnaBridge 171:3a7713b1edbc 480 }
AnnaBridge 171:3a7713b1edbc 481
AnnaBridge 171:3a7713b1edbc 482 /* @} */
AnnaBridge 171:3a7713b1edbc 483 /*!
AnnaBridge 171:3a7713b1edbc 484 * @name DMA Channel Transactional Operation
AnnaBridge 171:3a7713b1edbc 485 * @{
AnnaBridge 171:3a7713b1edbc 486 */
AnnaBridge 171:3a7713b1edbc 487
AnnaBridge 171:3a7713b1edbc 488 /*!
AnnaBridge 171:3a7713b1edbc 489 * @brief Creates the DMA handle.
AnnaBridge 171:3a7713b1edbc 490 *
AnnaBridge 171:3a7713b1edbc 491 * This function is called first if using the transactional API for the DMA. This function
AnnaBridge 171:3a7713b1edbc 492 * initializes the internal state of the DMA handle.
AnnaBridge 171:3a7713b1edbc 493 *
AnnaBridge 171:3a7713b1edbc 494 * @param handle DMA handle pointer. The DMA handle stores callback function and
AnnaBridge 171:3a7713b1edbc 495 * parameters.
AnnaBridge 171:3a7713b1edbc 496 * @param base DMA peripheral base address.
AnnaBridge 171:3a7713b1edbc 497 * @param channel DMA channel number.
AnnaBridge 171:3a7713b1edbc 498 */
AnnaBridge 171:3a7713b1edbc 499 void DMA_CreateHandle(dma_handle_t *handle, DMA_Type *base, uint32_t channel);
AnnaBridge 171:3a7713b1edbc 500
AnnaBridge 171:3a7713b1edbc 501 /*!
AnnaBridge 171:3a7713b1edbc 502 * @brief Sets the DMA callback function.
AnnaBridge 171:3a7713b1edbc 503 *
AnnaBridge 171:3a7713b1edbc 504 * This callback is called in the DMA IRQ handler. Use the callback to do something
AnnaBridge 171:3a7713b1edbc 505 * after the current transfer complete.
AnnaBridge 171:3a7713b1edbc 506 *
AnnaBridge 171:3a7713b1edbc 507 * @param handle DMA handle pointer.
AnnaBridge 171:3a7713b1edbc 508 * @param callback DMA callback function pointer.
AnnaBridge 171:3a7713b1edbc 509 * @param userData Parameter for callback function. If it is not needed, just set to NULL.
AnnaBridge 171:3a7713b1edbc 510 */
AnnaBridge 171:3a7713b1edbc 511 void DMA_SetCallback(dma_handle_t *handle, dma_callback callback, void *userData);
AnnaBridge 171:3a7713b1edbc 512
AnnaBridge 171:3a7713b1edbc 513 /*!
AnnaBridge 171:3a7713b1edbc 514 * @brief Prepares the DMA transfer configuration structure.
AnnaBridge 171:3a7713b1edbc 515 *
AnnaBridge 171:3a7713b1edbc 516 * This function prepares the transfer configuration structure according to the user input.
AnnaBridge 171:3a7713b1edbc 517 *
AnnaBridge 171:3a7713b1edbc 518 * @param config Pointer to the user configuration structure of type dma_transfer_config_t.
AnnaBridge 171:3a7713b1edbc 519 * @param srcAddr DMA transfer source address.
AnnaBridge 171:3a7713b1edbc 520 * @param srcWidth DMA transfer source address width (byte).
AnnaBridge 171:3a7713b1edbc 521 * @param destAddr DMA transfer destination address.
AnnaBridge 171:3a7713b1edbc 522 * @param destWidth DMA transfer destination address width (byte).
AnnaBridge 171:3a7713b1edbc 523 * @param transferBytes DMA transfer bytes to be transferred.
AnnaBridge 171:3a7713b1edbc 524 * @param type DMA transfer type.
AnnaBridge 171:3a7713b1edbc 525 */
AnnaBridge 171:3a7713b1edbc 526 void DMA_PrepareTransfer(dma_transfer_config_t *config,
AnnaBridge 171:3a7713b1edbc 527 void *srcAddr,
AnnaBridge 171:3a7713b1edbc 528 uint32_t srcWidth,
AnnaBridge 171:3a7713b1edbc 529 void *destAddr,
AnnaBridge 171:3a7713b1edbc 530 uint32_t destWidth,
AnnaBridge 171:3a7713b1edbc 531 uint32_t transferBytes,
AnnaBridge 171:3a7713b1edbc 532 dma_transfer_type_t type);
AnnaBridge 171:3a7713b1edbc 533
AnnaBridge 171:3a7713b1edbc 534 /*!
AnnaBridge 171:3a7713b1edbc 535 * @brief Submits the DMA transfer request.
AnnaBridge 171:3a7713b1edbc 536 *
AnnaBridge 171:3a7713b1edbc 537 * This function submits the DMA transfer request according to the transfer configuration structure.
AnnaBridge 171:3a7713b1edbc 538 *
AnnaBridge 171:3a7713b1edbc 539 * @param handle DMA handle pointer.
AnnaBridge 171:3a7713b1edbc 540 * @param config Pointer to DMA transfer configuration structure.
AnnaBridge 171:3a7713b1edbc 541 * @param options Additional configurations for transfer. Use
AnnaBridge 171:3a7713b1edbc 542 * the defined dma_transfer_options_t type.
AnnaBridge 171:3a7713b1edbc 543 * @retval kStatus_DMA_Success It indicates that the DMA submit transfer request succeeded.
AnnaBridge 171:3a7713b1edbc 544 * @retval kStatus_DMA_Busy It indicates that the DMA is busy. Submit transfer request is not allowed.
AnnaBridge 171:3a7713b1edbc 545 * @note This function can't process multi transfer request.
AnnaBridge 171:3a7713b1edbc 546 */
AnnaBridge 171:3a7713b1edbc 547 status_t DMA_SubmitTransfer(dma_handle_t *handle, const dma_transfer_config_t *config, uint32_t options);
AnnaBridge 171:3a7713b1edbc 548
AnnaBridge 171:3a7713b1edbc 549 /*!
AnnaBridge 171:3a7713b1edbc 550 * @brief DMA starts a transfer.
AnnaBridge 171:3a7713b1edbc 551 *
AnnaBridge 171:3a7713b1edbc 552 * This function enables the channel request. Call this function
AnnaBridge 171:3a7713b1edbc 553 * after submitting a transfer request.
AnnaBridge 171:3a7713b1edbc 554 *
AnnaBridge 171:3a7713b1edbc 555 * @param handle DMA handle pointer.
AnnaBridge 171:3a7713b1edbc 556 * @retval kStatus_DMA_Success It indicates that the DMA start transfer succeed.
AnnaBridge 171:3a7713b1edbc 557 * @retval kStatus_DMA_Busy It indicates that the DMA has started a transfer.
AnnaBridge 171:3a7713b1edbc 558 */
AnnaBridge 171:3a7713b1edbc 559 static inline void DMA_StartTransfer(dma_handle_t *handle)
AnnaBridge 171:3a7713b1edbc 560 {
AnnaBridge 171:3a7713b1edbc 561 assert(handle != NULL);
AnnaBridge 171:3a7713b1edbc 562
AnnaBridge 171:3a7713b1edbc 563 handle->base->DMA[handle->channel].DCR |= DMA_DCR_ERQ_MASK;
AnnaBridge 171:3a7713b1edbc 564 }
AnnaBridge 171:3a7713b1edbc 565
AnnaBridge 171:3a7713b1edbc 566 /*!
AnnaBridge 171:3a7713b1edbc 567 * @brief DMA stops a transfer.
AnnaBridge 171:3a7713b1edbc 568 *
AnnaBridge 171:3a7713b1edbc 569 * This function disables the channel request to stop a DMA transfer.
AnnaBridge 171:3a7713b1edbc 570 * The transfer can be resumed by calling the DMA_StartTransfer.
AnnaBridge 171:3a7713b1edbc 571 *
AnnaBridge 171:3a7713b1edbc 572 * @param handle DMA handle pointer.
AnnaBridge 171:3a7713b1edbc 573 */
AnnaBridge 171:3a7713b1edbc 574 static inline void DMA_StopTransfer(dma_handle_t *handle)
AnnaBridge 171:3a7713b1edbc 575 {
AnnaBridge 171:3a7713b1edbc 576 assert(handle != NULL);
AnnaBridge 171:3a7713b1edbc 577
AnnaBridge 171:3a7713b1edbc 578 handle->base->DMA[handle->channel].DCR &= ~DMA_DCR_ERQ_MASK;
AnnaBridge 171:3a7713b1edbc 579 }
AnnaBridge 171:3a7713b1edbc 580
AnnaBridge 171:3a7713b1edbc 581 /*!
AnnaBridge 171:3a7713b1edbc 582 * @brief DMA aborts a transfer.
AnnaBridge 171:3a7713b1edbc 583 *
AnnaBridge 171:3a7713b1edbc 584 * This function disables the channel request and clears all status bits.
AnnaBridge 171:3a7713b1edbc 585 * Submit another transfer after calling this API.
AnnaBridge 171:3a7713b1edbc 586 *
AnnaBridge 171:3a7713b1edbc 587 * @param handle DMA handle pointer.
AnnaBridge 171:3a7713b1edbc 588 */
AnnaBridge 171:3a7713b1edbc 589 void DMA_AbortTransfer(dma_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 590
AnnaBridge 171:3a7713b1edbc 591 /*!
AnnaBridge 171:3a7713b1edbc 592 * @brief DMA IRQ handler for current transfer complete.
AnnaBridge 171:3a7713b1edbc 593 *
AnnaBridge 171:3a7713b1edbc 594 * This function clears the channel interrupt flag and calls
AnnaBridge 171:3a7713b1edbc 595 * the callback function if it is not NULL.
AnnaBridge 171:3a7713b1edbc 596 *
AnnaBridge 171:3a7713b1edbc 597 * @param handle DMA handle pointer.
AnnaBridge 171:3a7713b1edbc 598 */
AnnaBridge 171:3a7713b1edbc 599 void DMA_HandleIRQ(dma_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 600
AnnaBridge 171:3a7713b1edbc 601 /* @} */
AnnaBridge 171:3a7713b1edbc 602
AnnaBridge 171:3a7713b1edbc 603 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 604 }
AnnaBridge 171:3a7713b1edbc 605 #endif /* __cplusplus */
AnnaBridge 171:3a7713b1edbc 606
AnnaBridge 171:3a7713b1edbc 607 /* @}*/
AnnaBridge 171:3a7713b1edbc 608
AnnaBridge 171:3a7713b1edbc 609 #endif /* _FSL_DMA_H_ */