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TARGET_LPC546XX/TOOLCHAIN_IAR/fsl_common.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Child:
172:65be27845400
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * The Clear BSD License
AnnaBridge 171:3a7713b1edbc 3 * Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 4 * Copyright 2016-2017 NXP
AnnaBridge 171:3a7713b1edbc 5 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 6 *
AnnaBridge 171:3a7713b1edbc 7 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 8 * are permitted (subject to the limitations in the disclaimer below) provided
AnnaBridge 171:3a7713b1edbc 9 * that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 12 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 13 *
AnnaBridge 171:3a7713b1edbc 14 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 15 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 16 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 17 *
AnnaBridge 171:3a7713b1edbc 18 * o Neither the name of the copyright holder nor the names of its
AnnaBridge 171:3a7713b1edbc 19 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 20 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
AnnaBridge 171:3a7713b1edbc 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 30 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 33 */
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 #ifndef _FSL_COMMON_H_
AnnaBridge 171:3a7713b1edbc 36 #define _FSL_COMMON_H_
AnnaBridge 171:3a7713b1edbc 37
AnnaBridge 171:3a7713b1edbc 38 #include <assert.h>
AnnaBridge 171:3a7713b1edbc 39 #include <stdbool.h>
AnnaBridge 171:3a7713b1edbc 40 #include <stdint.h>
AnnaBridge 171:3a7713b1edbc 41 #include <string.h>
AnnaBridge 171:3a7713b1edbc 42
AnnaBridge 171:3a7713b1edbc 43 #if defined(__ICCARM__)
AnnaBridge 171:3a7713b1edbc 44 #include <stddef.h>
AnnaBridge 171:3a7713b1edbc 45 #endif
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 #include "fsl_device_registers.h"
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 /*!
AnnaBridge 171:3a7713b1edbc 50 * @addtogroup ksdk_common
AnnaBridge 171:3a7713b1edbc 51 * @{
AnnaBridge 171:3a7713b1edbc 52 */
AnnaBridge 171:3a7713b1edbc 53
AnnaBridge 171:3a7713b1edbc 54 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 55 * Definitions
AnnaBridge 171:3a7713b1edbc 56 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 57
AnnaBridge 171:3a7713b1edbc 58 /*! @brief Construct a status code value from a group and code number. */
AnnaBridge 171:3a7713b1edbc 59 #define MAKE_STATUS(group, code) ((((group)*100) + (code)))
AnnaBridge 171:3a7713b1edbc 60
AnnaBridge 171:3a7713b1edbc 61 /*! @brief Construct the version number for drivers. */
AnnaBridge 171:3a7713b1edbc 62 #define MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix))
AnnaBridge 171:3a7713b1edbc 63
AnnaBridge 171:3a7713b1edbc 64 /*! @name Driver version */
AnnaBridge 171:3a7713b1edbc 65 /*@{*/
AnnaBridge 171:3a7713b1edbc 66 /*! @brief common driver version 2.0.0. */
AnnaBridge 171:3a7713b1edbc 67 #define FSL_COMMON_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
AnnaBridge 171:3a7713b1edbc 68 /*@}*/
AnnaBridge 171:3a7713b1edbc 69
AnnaBridge 171:3a7713b1edbc 70 /* Debug console type definition. */
AnnaBridge 171:3a7713b1edbc 71 #define DEBUG_CONSOLE_DEVICE_TYPE_NONE 0U /*!< No debug console. */
AnnaBridge 171:3a7713b1edbc 72 #define DEBUG_CONSOLE_DEVICE_TYPE_UART 1U /*!< Debug console base on UART. */
AnnaBridge 171:3a7713b1edbc 73 #define DEBUG_CONSOLE_DEVICE_TYPE_LPUART 2U /*!< Debug console base on LPUART. */
AnnaBridge 171:3a7713b1edbc 74 #define DEBUG_CONSOLE_DEVICE_TYPE_LPSCI 3U /*!< Debug console base on LPSCI. */
AnnaBridge 171:3a7713b1edbc 75 #define DEBUG_CONSOLE_DEVICE_TYPE_USBCDC 4U /*!< Debug console base on USBCDC. */
AnnaBridge 171:3a7713b1edbc 76 #define DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM 5U /*!< Debug console base on USBCDC. */
AnnaBridge 171:3a7713b1edbc 77 #define DEBUG_CONSOLE_DEVICE_TYPE_IUART 6U /*!< Debug console base on i.MX UART. */
AnnaBridge 171:3a7713b1edbc 78 #define DEBUG_CONSOLE_DEVICE_TYPE_VUSART 7U /*!< Debug console base on LPC_USART. */
AnnaBridge 171:3a7713b1edbc 79
AnnaBridge 171:3a7713b1edbc 80 /*! @brief Status group numbers. */
AnnaBridge 171:3a7713b1edbc 81 enum _status_groups
AnnaBridge 171:3a7713b1edbc 82 {
AnnaBridge 171:3a7713b1edbc 83 kStatusGroup_Generic = 0, /*!< Group number for generic status codes. */
AnnaBridge 171:3a7713b1edbc 84 kStatusGroup_FLASH = 1, /*!< Group number for FLASH status codes. */
AnnaBridge 171:3a7713b1edbc 85 kStatusGroup_LPSPI = 4, /*!< Group number for LPSPI status codes. */
AnnaBridge 171:3a7713b1edbc 86 kStatusGroup_FLEXIO_SPI = 5, /*!< Group number for FLEXIO SPI status codes. */
AnnaBridge 171:3a7713b1edbc 87 kStatusGroup_DSPI = 6, /*!< Group number for DSPI status codes. */
AnnaBridge 171:3a7713b1edbc 88 kStatusGroup_FLEXIO_UART = 7, /*!< Group number for FLEXIO UART status codes. */
AnnaBridge 171:3a7713b1edbc 89 kStatusGroup_FLEXIO_I2C = 8, /*!< Group number for FLEXIO I2C status codes. */
AnnaBridge 171:3a7713b1edbc 90 kStatusGroup_LPI2C = 9, /*!< Group number for LPI2C status codes. */
AnnaBridge 171:3a7713b1edbc 91 kStatusGroup_UART = 10, /*!< Group number for UART status codes. */
AnnaBridge 171:3a7713b1edbc 92 kStatusGroup_I2C = 11, /*!< Group number for UART status codes. */
AnnaBridge 171:3a7713b1edbc 93 kStatusGroup_LPSCI = 12, /*!< Group number for LPSCI status codes. */
AnnaBridge 171:3a7713b1edbc 94 kStatusGroup_LPUART = 13, /*!< Group number for LPUART status codes. */
AnnaBridge 171:3a7713b1edbc 95 kStatusGroup_SPI = 14, /*!< Group number for SPI status code.*/
AnnaBridge 171:3a7713b1edbc 96 kStatusGroup_XRDC = 15, /*!< Group number for XRDC status code.*/
AnnaBridge 171:3a7713b1edbc 97 kStatusGroup_SEMA42 = 16, /*!< Group number for SEMA42 status code.*/
AnnaBridge 171:3a7713b1edbc 98 kStatusGroup_SDHC = 17, /*!< Group number for SDHC status code */
AnnaBridge 171:3a7713b1edbc 99 kStatusGroup_SDMMC = 18, /*!< Group number for SDMMC status code */
AnnaBridge 171:3a7713b1edbc 100 kStatusGroup_SAI = 19, /*!< Group number for SAI status code */
AnnaBridge 171:3a7713b1edbc 101 kStatusGroup_MCG = 20, /*!< Group number for MCG status codes. */
AnnaBridge 171:3a7713b1edbc 102 kStatusGroup_SCG = 21, /*!< Group number for SCG status codes. */
AnnaBridge 171:3a7713b1edbc 103 kStatusGroup_SDSPI = 22, /*!< Group number for SDSPI status codes. */
AnnaBridge 171:3a7713b1edbc 104 kStatusGroup_FLEXIO_I2S = 23, /*!< Group number for FLEXIO I2S status codes */
AnnaBridge 171:3a7713b1edbc 105 kStatusGroup_FLEXIO_MCULCD = 24, /*!< Group number for FLEXIO LCD status codes */
AnnaBridge 171:3a7713b1edbc 106 kStatusGroup_FLASHIAP = 25, /*!< Group number for FLASHIAP status codes */
AnnaBridge 171:3a7713b1edbc 107 kStatusGroup_FLEXCOMM_I2C = 26, /*!< Group number for FLEXCOMM I2C status codes */
AnnaBridge 171:3a7713b1edbc 108 kStatusGroup_I2S = 27, /*!< Group number for I2S status codes */
AnnaBridge 171:3a7713b1edbc 109 kStatusGroup_IUART = 28, /*!< Group number for IUART status codes */
AnnaBridge 171:3a7713b1edbc 110 kStatusGroup_CSI = 29, /*!< Group number for CSI status codes */
AnnaBridge 171:3a7713b1edbc 111 kStatusGroup_MIPI_DSI = 30, /*!< Group number for MIPI DSI status codes */
AnnaBridge 171:3a7713b1edbc 112 kStatusGroup_SDRAMC = 35, /*!< Group number for SDRAMC status codes. */
AnnaBridge 171:3a7713b1edbc 113 kStatusGroup_POWER = 39, /*!< Group number for POWER status codes. */
AnnaBridge 171:3a7713b1edbc 114 kStatusGroup_ENET = 40, /*!< Group number for ENET status codes. */
AnnaBridge 171:3a7713b1edbc 115 kStatusGroup_PHY = 41, /*!< Group number for PHY status codes. */
AnnaBridge 171:3a7713b1edbc 116 kStatusGroup_TRGMUX = 42, /*!< Group number for TRGMUX status codes. */
AnnaBridge 171:3a7713b1edbc 117 kStatusGroup_SMARTCARD = 43, /*!< Group number for SMARTCARD status codes. */
AnnaBridge 171:3a7713b1edbc 118 kStatusGroup_LMEM = 44, /*!< Group number for LMEM status codes. */
AnnaBridge 171:3a7713b1edbc 119 kStatusGroup_QSPI = 45, /*!< Group number for QSPI status codes. */
AnnaBridge 171:3a7713b1edbc 120 kStatusGroup_DMA = 50, /*!< Group number for DMA status codes. */
AnnaBridge 171:3a7713b1edbc 121 kStatusGroup_EDMA = 51, /*!< Group number for EDMA status codes. */
AnnaBridge 171:3a7713b1edbc 122 kStatusGroup_DMAMGR = 52, /*!< Group number for DMAMGR status codes. */
AnnaBridge 171:3a7713b1edbc 123 kStatusGroup_FLEXCAN = 53, /*!< Group number for FlexCAN status codes. */
AnnaBridge 171:3a7713b1edbc 124 kStatusGroup_LTC = 54, /*!< Group number for LTC status codes. */
AnnaBridge 171:3a7713b1edbc 125 kStatusGroup_FLEXIO_CAMERA = 55, /*!< Group number for FLEXIO CAMERA status codes. */
AnnaBridge 171:3a7713b1edbc 126 kStatusGroup_LPC_SPI = 56, /*!< Group number for LPC_SPI status codes. */
AnnaBridge 171:3a7713b1edbc 127 kStatusGroup_LPC_USART = 57, /*!< Group number for LPC_USART status codes. */
AnnaBridge 171:3a7713b1edbc 128 kStatusGroup_DMIC = 58, /*!< Group number for DMIC status codes. */
AnnaBridge 171:3a7713b1edbc 129 kStatusGroup_SDIF = 59, /*!< Group number for SDIF status codes.*/
AnnaBridge 171:3a7713b1edbc 130 kStatusGroup_SPIFI = 60, /*!< Group number for SPIFI status codes. */
AnnaBridge 171:3a7713b1edbc 131 kStatusGroup_OTP = 61, /*!< Group number for OTP status codes. */
AnnaBridge 171:3a7713b1edbc 132 kStatusGroup_MCAN = 62, /*!< Group number for MCAN status codes. */
AnnaBridge 171:3a7713b1edbc 133 kStatusGroup_CAAM = 63, /*!< Group number for CAAM status codes. */
AnnaBridge 171:3a7713b1edbc 134 kStatusGroup_ECSPI = 64, /*!< Group number for ECSPI status codes. */
AnnaBridge 171:3a7713b1edbc 135 kStatusGroup_USDHC = 65, /*!< Group number for USDHC status codes.*/
AnnaBridge 171:3a7713b1edbc 136 kStatusGroup_LPC_I2C = 66, /*!< Group number for LPC_I2C status codes.*/
AnnaBridge 171:3a7713b1edbc 137 kStatusGroup_DCP = 67, /*!< Group number for DCP status codes.*/
AnnaBridge 171:3a7713b1edbc 138 kStatusGroup_MSCAN = 68, /*!< Group number for MSCAN status codes.*/
AnnaBridge 171:3a7713b1edbc 139 kStatusGroup_ESAI = 69, /*!< Group number for ESAI status codes. */
AnnaBridge 171:3a7713b1edbc 140 kStatusGroup_FLEXSPI = 70, /*!< Group number for FLEXSPI status codes. */
AnnaBridge 171:3a7713b1edbc 141 kStatusGroup_MMDC = 71, /*!< Group number for MMDC status codes. */
AnnaBridge 171:3a7713b1edbc 142 kStatusGroup_MICFIL = 72, /*!< Group number for MIC status codes. */
AnnaBridge 171:3a7713b1edbc 143 kStatusGroup_SDMA = 73, /*!< Group number for SDMA status codes. */
AnnaBridge 171:3a7713b1edbc 144 kStatusGroup_ICS = 74, /*!< Group number for ICS status codes. */
AnnaBridge 171:3a7713b1edbc 145 kStatusGroup_SPDIF = 75, /*!< Group number for SPDIF status codes. */
AnnaBridge 171:3a7713b1edbc 146 kStatusGroup_NOTIFIER = 98, /*!< Group number for NOTIFIER status codes. */
AnnaBridge 171:3a7713b1edbc 147 kStatusGroup_DebugConsole = 99, /*!< Group number for debug console status codes. */
AnnaBridge 171:3a7713b1edbc 148 kStatusGroup_SEMC = 100, /*!< Group number for SEMC status codes. */
AnnaBridge 171:3a7713b1edbc 149 kStatusGroup_ApplicationRangeStart = 101, /*!< Starting number for application groups. */
AnnaBridge 171:3a7713b1edbc 150 };
AnnaBridge 171:3a7713b1edbc 151
AnnaBridge 171:3a7713b1edbc 152 /*! @brief Generic status return codes. */
AnnaBridge 171:3a7713b1edbc 153 enum _generic_status
AnnaBridge 171:3a7713b1edbc 154 {
AnnaBridge 171:3a7713b1edbc 155 kStatus_Success = MAKE_STATUS(kStatusGroup_Generic, 0),
AnnaBridge 171:3a7713b1edbc 156 kStatus_Fail = MAKE_STATUS(kStatusGroup_Generic, 1),
AnnaBridge 171:3a7713b1edbc 157 kStatus_ReadOnly = MAKE_STATUS(kStatusGroup_Generic, 2),
AnnaBridge 171:3a7713b1edbc 158 kStatus_OutOfRange = MAKE_STATUS(kStatusGroup_Generic, 3),
AnnaBridge 171:3a7713b1edbc 159 kStatus_InvalidArgument = MAKE_STATUS(kStatusGroup_Generic, 4),
AnnaBridge 171:3a7713b1edbc 160 kStatus_Timeout = MAKE_STATUS(kStatusGroup_Generic, 5),
AnnaBridge 171:3a7713b1edbc 161 kStatus_NoTransferInProgress = MAKE_STATUS(kStatusGroup_Generic, 6),
AnnaBridge 171:3a7713b1edbc 162 };
AnnaBridge 171:3a7713b1edbc 163
AnnaBridge 171:3a7713b1edbc 164 /*! @brief Type used for all status and error return values. */
AnnaBridge 171:3a7713b1edbc 165 typedef int32_t status_t;
AnnaBridge 171:3a7713b1edbc 166
AnnaBridge 171:3a7713b1edbc 167 /*
AnnaBridge 171:3a7713b1edbc 168 * The fsl_clock.h is included here because it needs MAKE_VERSION/MAKE_STATUS/status_t
AnnaBridge 171:3a7713b1edbc 169 * defined in previous of this file.
AnnaBridge 171:3a7713b1edbc 170 */
AnnaBridge 171:3a7713b1edbc 171 #include "fsl_clock.h"
AnnaBridge 171:3a7713b1edbc 172
AnnaBridge 171:3a7713b1edbc 173 /*
AnnaBridge 171:3a7713b1edbc 174 * Chip level peripheral reset API, for MCUs that implement peripheral reset control external to a peripheral
AnnaBridge 171:3a7713b1edbc 175 */
AnnaBridge 171:3a7713b1edbc 176 #if ((defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) || \
AnnaBridge 171:3a7713b1edbc 177 (defined(FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT) && (FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT > 0)))
AnnaBridge 171:3a7713b1edbc 178 #include "fsl_reset.h"
AnnaBridge 171:3a7713b1edbc 179 #endif
AnnaBridge 171:3a7713b1edbc 180
AnnaBridge 171:3a7713b1edbc 181 /*! @name Min/max macros */
AnnaBridge 171:3a7713b1edbc 182 /* @{ */
AnnaBridge 171:3a7713b1edbc 183 #if !defined(MIN)
AnnaBridge 171:3a7713b1edbc 184 #define MIN(a, b) ((a) < (b) ? (a) : (b))
AnnaBridge 171:3a7713b1edbc 185 #endif
AnnaBridge 171:3a7713b1edbc 186
AnnaBridge 171:3a7713b1edbc 187 #if !defined(MAX)
AnnaBridge 171:3a7713b1edbc 188 #define MAX(a, b) ((a) > (b) ? (a) : (b))
AnnaBridge 171:3a7713b1edbc 189 #endif
AnnaBridge 171:3a7713b1edbc 190 /* @} */
AnnaBridge 171:3a7713b1edbc 191
AnnaBridge 171:3a7713b1edbc 192 /*! @brief Computes the number of elements in an array. */
AnnaBridge 171:3a7713b1edbc 193 #if !defined(ARRAY_SIZE)
AnnaBridge 171:3a7713b1edbc 194 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
AnnaBridge 171:3a7713b1edbc 195 #endif
AnnaBridge 171:3a7713b1edbc 196
AnnaBridge 171:3a7713b1edbc 197 /*! @name UINT16_MAX/UINT32_MAX value */
AnnaBridge 171:3a7713b1edbc 198 /* @{ */
AnnaBridge 171:3a7713b1edbc 199 #if !defined(UINT16_MAX)
AnnaBridge 171:3a7713b1edbc 200 #define UINT16_MAX ((uint16_t)-1)
AnnaBridge 171:3a7713b1edbc 201 #endif
AnnaBridge 171:3a7713b1edbc 202
AnnaBridge 171:3a7713b1edbc 203 #if !defined(UINT32_MAX)
AnnaBridge 171:3a7713b1edbc 204 #define UINT32_MAX ((uint32_t)-1)
AnnaBridge 171:3a7713b1edbc 205 #endif
AnnaBridge 171:3a7713b1edbc 206 /* @} */
AnnaBridge 171:3a7713b1edbc 207
AnnaBridge 171:3a7713b1edbc 208 /*! @name Timer utilities */
AnnaBridge 171:3a7713b1edbc 209 /* @{ */
AnnaBridge 171:3a7713b1edbc 210 /*! Macro to convert a microsecond period to raw count value */
AnnaBridge 171:3a7713b1edbc 211 #define USEC_TO_COUNT(us, clockFreqInHz) (uint64_t)((uint64_t)us * clockFreqInHz / 1000000U)
AnnaBridge 171:3a7713b1edbc 212 /*! Macro to convert a raw count value to microsecond */
AnnaBridge 171:3a7713b1edbc 213 #define COUNT_TO_USEC(count, clockFreqInHz) (uint64_t)((uint64_t)count * 1000000U / clockFreqInHz)
AnnaBridge 171:3a7713b1edbc 214
AnnaBridge 171:3a7713b1edbc 215 /*! Macro to convert a millisecond period to raw count value */
AnnaBridge 171:3a7713b1edbc 216 #define MSEC_TO_COUNT(ms, clockFreqInHz) (uint64_t)((uint64_t)ms * clockFreqInHz / 1000U)
AnnaBridge 171:3a7713b1edbc 217 /*! Macro to convert a raw count value to millisecond */
AnnaBridge 171:3a7713b1edbc 218 #define COUNT_TO_MSEC(count, clockFreqInHz) (uint64_t)((uint64_t)count * 1000U / clockFreqInHz)
AnnaBridge 171:3a7713b1edbc 219 /* @} */
AnnaBridge 171:3a7713b1edbc 220
AnnaBridge 171:3a7713b1edbc 221 /*! @name Alignment variable definition macros */
AnnaBridge 171:3a7713b1edbc 222 /* @{ */
AnnaBridge 171:3a7713b1edbc 223 #if (defined(__ICCARM__))
AnnaBridge 171:3a7713b1edbc 224 /**
AnnaBridge 171:3a7713b1edbc 225 * Workaround to disable MISRA C message suppress warnings for IAR compiler.
AnnaBridge 171:3a7713b1edbc 226 * http://supp.iar.com/Support/?note=24725
AnnaBridge 171:3a7713b1edbc 227 */
AnnaBridge 171:3a7713b1edbc 228 _Pragma("diag_suppress=Pm120")
AnnaBridge 171:3a7713b1edbc 229 #define SDK_PRAGMA(x) _Pragma(#x)
AnnaBridge 171:3a7713b1edbc 230 _Pragma("diag_error=Pm120")
AnnaBridge 171:3a7713b1edbc 231 /*! Macro to define a variable with alignbytes alignment */
AnnaBridge 171:3a7713b1edbc 232 #define SDK_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var
AnnaBridge 171:3a7713b1edbc 233 /*! Macro to define a variable with L1 d-cache line size alignment */
AnnaBridge 171:3a7713b1edbc 234 #if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
AnnaBridge 171:3a7713b1edbc 235 #define SDK_L1DCACHE_ALIGN(var) SDK_PRAGMA(data_alignment = FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) var
AnnaBridge 171:3a7713b1edbc 236 #endif
AnnaBridge 171:3a7713b1edbc 237 /*! Macro to define a variable with L2 cache line size alignment */
AnnaBridge 171:3a7713b1edbc 238 #if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
AnnaBridge 171:3a7713b1edbc 239 #define SDK_L2CACHE_ALIGN(var) SDK_PRAGMA(data_alignment = FSL_FEATURE_L2CACHE_LINESIZE_BYTE) var
AnnaBridge 171:3a7713b1edbc 240 #endif
AnnaBridge 171:3a7713b1edbc 241 #elif defined(__ARMCC_VERSION)
AnnaBridge 171:3a7713b1edbc 242 /*! Macro to define a variable with alignbytes alignment */
AnnaBridge 171:3a7713b1edbc 243 #define SDK_ALIGN(var, alignbytes) __align(alignbytes) var
AnnaBridge 171:3a7713b1edbc 244 /*! Macro to define a variable with L1 d-cache line size alignment */
AnnaBridge 171:3a7713b1edbc 245 #if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
AnnaBridge 171:3a7713b1edbc 246 #define SDK_L1DCACHE_ALIGN(var) __align(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) var
AnnaBridge 171:3a7713b1edbc 247 #endif
AnnaBridge 171:3a7713b1edbc 248 /*! Macro to define a variable with L2 cache line size alignment */
AnnaBridge 171:3a7713b1edbc 249 #if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
AnnaBridge 171:3a7713b1edbc 250 #define SDK_L2CACHE_ALIGN(var) __align(FSL_FEATURE_L2CACHE_LINESIZE_BYTE) var
AnnaBridge 171:3a7713b1edbc 251 #endif
AnnaBridge 171:3a7713b1edbc 252 #elif defined(__GNUC__)
AnnaBridge 171:3a7713b1edbc 253 /*! Macro to define a variable with alignbytes alignment */
AnnaBridge 171:3a7713b1edbc 254 #define SDK_ALIGN(var, alignbytes) var __attribute__((aligned(alignbytes)))
AnnaBridge 171:3a7713b1edbc 255 /*! Macro to define a variable with L1 d-cache line size alignment */
AnnaBridge 171:3a7713b1edbc 256 #if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
AnnaBridge 171:3a7713b1edbc 257 #define SDK_L1DCACHE_ALIGN(var) var __attribute__((aligned(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)))
AnnaBridge 171:3a7713b1edbc 258 #endif
AnnaBridge 171:3a7713b1edbc 259 /*! Macro to define a variable with L2 cache line size alignment */
AnnaBridge 171:3a7713b1edbc 260 #if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
AnnaBridge 171:3a7713b1edbc 261 #define SDK_L2CACHE_ALIGN(var) var __attribute__((aligned(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)))
AnnaBridge 171:3a7713b1edbc 262 #endif
AnnaBridge 171:3a7713b1edbc 263 #else
AnnaBridge 171:3a7713b1edbc 264 #error Toolchain not supported
AnnaBridge 171:3a7713b1edbc 265 #define SDK_ALIGN(var, alignbytes) var
AnnaBridge 171:3a7713b1edbc 266 #if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
AnnaBridge 171:3a7713b1edbc 267 #define SDK_L1DCACHE_ALIGN(var) var
AnnaBridge 171:3a7713b1edbc 268 #endif
AnnaBridge 171:3a7713b1edbc 269 #if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
AnnaBridge 171:3a7713b1edbc 270 #define SDK_L2CACHE_ALIGN(var) var
AnnaBridge 171:3a7713b1edbc 271 #endif
AnnaBridge 171:3a7713b1edbc 272 #endif
AnnaBridge 171:3a7713b1edbc 273
AnnaBridge 171:3a7713b1edbc 274 /*! Macro to change a value to a given size aligned value */
AnnaBridge 171:3a7713b1edbc 275 #define SDK_SIZEALIGN(var, alignbytes) \
AnnaBridge 171:3a7713b1edbc 276 ((unsigned int)((var) + ((alignbytes)-1)) & (unsigned int)(~(unsigned int)((alignbytes)-1)))
AnnaBridge 171:3a7713b1edbc 277 /* @} */
AnnaBridge 171:3a7713b1edbc 278
AnnaBridge 171:3a7713b1edbc 279 /*! @name Non-cacheable region definition macros */
AnnaBridge 171:3a7713b1edbc 280 /* For initialized non-zero non-cacheable variables, please using "AT_NONCACHEABLE_SECTION_INIT(var) ={xx};" or
AnnaBridge 171:3a7713b1edbc 281 * "AT_NONCACHEABLE_SECTION_ALIGN_INIT(var) ={xx};" in your projects to define them, for zero-inited non-cacheable variables,
AnnaBridge 171:3a7713b1edbc 282 * please using "AT_NONCACHEABLE_SECTION(var);" or "AT_NONCACHEABLE_SECTION_ALIGN(var);" to define them, these zero-inited variables
AnnaBridge 171:3a7713b1edbc 283 * will be initialized to zero in system startup.
AnnaBridge 171:3a7713b1edbc 284 */
AnnaBridge 171:3a7713b1edbc 285 /* @{ */
AnnaBridge 171:3a7713b1edbc 286 #if (defined(__ICCARM__))
AnnaBridge 171:3a7713b1edbc 287 #if defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE)
AnnaBridge 171:3a7713b1edbc 288 #define AT_NONCACHEABLE_SECTION(var) var @"NonCacheable"
AnnaBridge 171:3a7713b1edbc 289 #define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var @"NonCacheable"
AnnaBridge 171:3a7713b1edbc 290 #define AT_NONCACHEABLE_SECTION_INIT(var) var @"NonCacheable.init"
AnnaBridge 171:3a7713b1edbc 291 #define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var @"NonCacheable.init"
AnnaBridge 171:3a7713b1edbc 292 #else
AnnaBridge 171:3a7713b1edbc 293 #define AT_NONCACHEABLE_SECTION(var) var
AnnaBridge 171:3a7713b1edbc 294 #define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var
AnnaBridge 171:3a7713b1edbc 295 #define AT_NONCACHEABLE_SECTION_INIT(var) var
AnnaBridge 171:3a7713b1edbc 296 #define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var
AnnaBridge 171:3a7713b1edbc 297 #endif
AnnaBridge 171:3a7713b1edbc 298 #elif(defined(__ARMCC_VERSION))
AnnaBridge 171:3a7713b1edbc 299 #if defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE)
AnnaBridge 171:3a7713b1edbc 300 #define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable"), zero_init)) var
AnnaBridge 171:3a7713b1edbc 301 #define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
AnnaBridge 171:3a7713b1edbc 302 __attribute__((section("NonCacheable"), zero_init)) __align(alignbytes) var
AnnaBridge 171:3a7713b1edbc 303 #define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var
AnnaBridge 171:3a7713b1edbc 304 #define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \
AnnaBridge 171:3a7713b1edbc 305 __attribute__((section("NonCacheable.init"))) __align(alignbytes) var
AnnaBridge 171:3a7713b1edbc 306 #else
AnnaBridge 171:3a7713b1edbc 307 #define AT_NONCACHEABLE_SECTION(var) var
AnnaBridge 171:3a7713b1edbc 308 #define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) __align(alignbytes) var
AnnaBridge 171:3a7713b1edbc 309 #define AT_NONCACHEABLE_SECTION_INIT(var) var
AnnaBridge 171:3a7713b1edbc 310 #define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) __align(alignbytes) var
AnnaBridge 171:3a7713b1edbc 311 #endif
AnnaBridge 171:3a7713b1edbc 312 #elif(defined(__GNUC__))
AnnaBridge 171:3a7713b1edbc 313 /* For GCC, when the non-cacheable section is required, please define "__STARTUP_INITIALIZE_NONCACHEDATA"
AnnaBridge 171:3a7713b1edbc 314 * in your projects to make sure the non-cacheable section variables will be initialized in system startup.
AnnaBridge 171:3a7713b1edbc 315 */
AnnaBridge 171:3a7713b1edbc 316 #if defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE)
AnnaBridge 171:3a7713b1edbc 317 #define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var
AnnaBridge 171:3a7713b1edbc 318 #define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \
AnnaBridge 171:3a7713b1edbc 319 __attribute__((section("NonCacheable.init"))) var __attribute__((aligned(alignbytes)))
AnnaBridge 171:3a7713b1edbc 320 #define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable,\"aw\",%nobits @"))) var
AnnaBridge 171:3a7713b1edbc 321 #define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
AnnaBridge 171:3a7713b1edbc 322 __attribute__((section("NonCacheable,\"aw\",%nobits @"))) var __attribute__((aligned(alignbytes)))
AnnaBridge 171:3a7713b1edbc 323 #else
AnnaBridge 171:3a7713b1edbc 324 #define AT_NONCACHEABLE_SECTION(var) var
AnnaBridge 171:3a7713b1edbc 325 #define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) var __attribute__((aligned(alignbytes)))
AnnaBridge 171:3a7713b1edbc 326 #define AT_NONCACHEABLE_SECTION_INIT(var) var
AnnaBridge 171:3a7713b1edbc 327 #define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) var __attribute__((aligned(alignbytes)))
AnnaBridge 171:3a7713b1edbc 328 #endif
AnnaBridge 171:3a7713b1edbc 329 #else
AnnaBridge 171:3a7713b1edbc 330 #error Toolchain not supported.
AnnaBridge 171:3a7713b1edbc 331 #define AT_NONCACHEABLE_SECTION(var) var
AnnaBridge 171:3a7713b1edbc 332 #define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) var
AnnaBridge 171:3a7713b1edbc 333 #define AT_NONCACHEABLE_SECTION_INIT(var) var
AnnaBridge 171:3a7713b1edbc 334 #define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) var
AnnaBridge 171:3a7713b1edbc 335 #endif
AnnaBridge 171:3a7713b1edbc 336 /* @} */
AnnaBridge 171:3a7713b1edbc 337
AnnaBridge 171:3a7713b1edbc 338 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 339 * API
AnnaBridge 171:3a7713b1edbc 340 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 341
AnnaBridge 171:3a7713b1edbc 342 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 343 extern "C"
AnnaBridge 171:3a7713b1edbc 344 {
AnnaBridge 171:3a7713b1edbc 345 #endif
AnnaBridge 171:3a7713b1edbc 346
AnnaBridge 171:3a7713b1edbc 347 /*!
AnnaBridge 171:3a7713b1edbc 348 * @brief Enable specific interrupt.
AnnaBridge 171:3a7713b1edbc 349 *
AnnaBridge 171:3a7713b1edbc 350 * Enable LEVEL1 interrupt. For some devices, there might be multiple interrupt
AnnaBridge 171:3a7713b1edbc 351 * levels. For example, there are NVIC and intmux. Here the interrupts connected
AnnaBridge 171:3a7713b1edbc 352 * to NVIC are the LEVEL1 interrupts, because they are routed to the core directly.
AnnaBridge 171:3a7713b1edbc 353 * The interrupts connected to intmux are the LEVEL2 interrupts, they are routed
AnnaBridge 171:3a7713b1edbc 354 * to NVIC first then routed to core.
AnnaBridge 171:3a7713b1edbc 355 *
AnnaBridge 171:3a7713b1edbc 356 * This function only enables the LEVEL1 interrupts. The number of LEVEL1 interrupts
AnnaBridge 171:3a7713b1edbc 357 * is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.
AnnaBridge 171:3a7713b1edbc 358 *
AnnaBridge 171:3a7713b1edbc 359 * @param interrupt The IRQ number.
AnnaBridge 171:3a7713b1edbc 360 * @retval kStatus_Success Interrupt enabled successfully
AnnaBridge 171:3a7713b1edbc 361 * @retval kStatus_Fail Failed to enable the interrupt
AnnaBridge 171:3a7713b1edbc 362 */
AnnaBridge 171:3a7713b1edbc 363 static inline status_t EnableIRQ(IRQn_Type interrupt)
AnnaBridge 171:3a7713b1edbc 364 {
AnnaBridge 171:3a7713b1edbc 365 if (NotAvail_IRQn == interrupt)
AnnaBridge 171:3a7713b1edbc 366 {
AnnaBridge 171:3a7713b1edbc 367 return kStatus_Fail;
AnnaBridge 171:3a7713b1edbc 368 }
AnnaBridge 171:3a7713b1edbc 369
AnnaBridge 171:3a7713b1edbc 370 #if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0)
AnnaBridge 171:3a7713b1edbc 371 if (interrupt >= FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS)
AnnaBridge 171:3a7713b1edbc 372 {
AnnaBridge 171:3a7713b1edbc 373 return kStatus_Fail;
AnnaBridge 171:3a7713b1edbc 374 }
AnnaBridge 171:3a7713b1edbc 375 #endif
AnnaBridge 171:3a7713b1edbc 376
AnnaBridge 171:3a7713b1edbc 377 #if defined(__GIC_PRIO_BITS)
AnnaBridge 171:3a7713b1edbc 378 GIC_EnableIRQ(interrupt);
AnnaBridge 171:3a7713b1edbc 379 #else
AnnaBridge 171:3a7713b1edbc 380 NVIC_EnableIRQ(interrupt);
AnnaBridge 171:3a7713b1edbc 381 #endif
AnnaBridge 171:3a7713b1edbc 382 return kStatus_Success;
AnnaBridge 171:3a7713b1edbc 383 }
AnnaBridge 171:3a7713b1edbc 384
AnnaBridge 171:3a7713b1edbc 385 /*!
AnnaBridge 171:3a7713b1edbc 386 * @brief Disable specific interrupt.
AnnaBridge 171:3a7713b1edbc 387 *
AnnaBridge 171:3a7713b1edbc 388 * Disable LEVEL1 interrupt. For some devices, there might be multiple interrupt
AnnaBridge 171:3a7713b1edbc 389 * levels. For example, there are NVIC and intmux. Here the interrupts connected
AnnaBridge 171:3a7713b1edbc 390 * to NVIC are the LEVEL1 interrupts, because they are routed to the core directly.
AnnaBridge 171:3a7713b1edbc 391 * The interrupts connected to intmux are the LEVEL2 interrupts, they are routed
AnnaBridge 171:3a7713b1edbc 392 * to NVIC first then routed to core.
AnnaBridge 171:3a7713b1edbc 393 *
AnnaBridge 171:3a7713b1edbc 394 * This function only disables the LEVEL1 interrupts. The number of LEVEL1 interrupts
AnnaBridge 171:3a7713b1edbc 395 * is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.
AnnaBridge 171:3a7713b1edbc 396 *
AnnaBridge 171:3a7713b1edbc 397 * @param interrupt The IRQ number.
AnnaBridge 171:3a7713b1edbc 398 * @retval kStatus_Success Interrupt disabled successfully
AnnaBridge 171:3a7713b1edbc 399 * @retval kStatus_Fail Failed to disable the interrupt
AnnaBridge 171:3a7713b1edbc 400 */
AnnaBridge 171:3a7713b1edbc 401 static inline status_t DisableIRQ(IRQn_Type interrupt)
AnnaBridge 171:3a7713b1edbc 402 {
AnnaBridge 171:3a7713b1edbc 403 if (NotAvail_IRQn == interrupt)
AnnaBridge 171:3a7713b1edbc 404 {
AnnaBridge 171:3a7713b1edbc 405 return kStatus_Fail;
AnnaBridge 171:3a7713b1edbc 406 }
AnnaBridge 171:3a7713b1edbc 407
AnnaBridge 171:3a7713b1edbc 408 #if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0)
AnnaBridge 171:3a7713b1edbc 409 if (interrupt >= FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS)
AnnaBridge 171:3a7713b1edbc 410 {
AnnaBridge 171:3a7713b1edbc 411 return kStatus_Fail;
AnnaBridge 171:3a7713b1edbc 412 }
AnnaBridge 171:3a7713b1edbc 413 #endif
AnnaBridge 171:3a7713b1edbc 414
AnnaBridge 171:3a7713b1edbc 415 #if defined(__GIC_PRIO_BITS)
AnnaBridge 171:3a7713b1edbc 416 GIC_DisableIRQ(interrupt);
AnnaBridge 171:3a7713b1edbc 417 #else
AnnaBridge 171:3a7713b1edbc 418 NVIC_DisableIRQ(interrupt);
AnnaBridge 171:3a7713b1edbc 419 #endif
AnnaBridge 171:3a7713b1edbc 420 return kStatus_Success;
AnnaBridge 171:3a7713b1edbc 421 }
AnnaBridge 171:3a7713b1edbc 422
AnnaBridge 171:3a7713b1edbc 423 /*!
AnnaBridge 171:3a7713b1edbc 424 * @brief Disable the global IRQ
AnnaBridge 171:3a7713b1edbc 425 *
AnnaBridge 171:3a7713b1edbc 426 * Disable the global interrupt and return the current primask register. User is required to provided the primask
AnnaBridge 171:3a7713b1edbc 427 * register for the EnableGlobalIRQ().
AnnaBridge 171:3a7713b1edbc 428 *
AnnaBridge 171:3a7713b1edbc 429 * @return Current primask value.
AnnaBridge 171:3a7713b1edbc 430 */
AnnaBridge 171:3a7713b1edbc 431 static inline uint32_t DisableGlobalIRQ(void)
AnnaBridge 171:3a7713b1edbc 432 {
AnnaBridge 171:3a7713b1edbc 433 #if defined(CPSR_I_Msk)
AnnaBridge 171:3a7713b1edbc 434 uint32_t cpsr = __get_CPSR() & CPSR_I_Msk;
AnnaBridge 171:3a7713b1edbc 435
AnnaBridge 171:3a7713b1edbc 436 __disable_irq();
AnnaBridge 171:3a7713b1edbc 437
AnnaBridge 171:3a7713b1edbc 438 return cpsr;
AnnaBridge 171:3a7713b1edbc 439 #else
AnnaBridge 171:3a7713b1edbc 440 uint32_t regPrimask = __get_PRIMASK();
AnnaBridge 171:3a7713b1edbc 441
AnnaBridge 171:3a7713b1edbc 442 __disable_irq();
AnnaBridge 171:3a7713b1edbc 443
AnnaBridge 171:3a7713b1edbc 444 return regPrimask;
AnnaBridge 171:3a7713b1edbc 445 #endif
AnnaBridge 171:3a7713b1edbc 446 }
AnnaBridge 171:3a7713b1edbc 447
AnnaBridge 171:3a7713b1edbc 448 /*!
AnnaBridge 171:3a7713b1edbc 449 * @brief Enaable the global IRQ
AnnaBridge 171:3a7713b1edbc 450 *
AnnaBridge 171:3a7713b1edbc 451 * Set the primask register with the provided primask value but not just enable the primask. The idea is for the
AnnaBridge 171:3a7713b1edbc 452 * convinience of integration of RTOS. some RTOS get its own management mechanism of primask. User is required to
AnnaBridge 171:3a7713b1edbc 453 * use the EnableGlobalIRQ() and DisableGlobalIRQ() in pair.
AnnaBridge 171:3a7713b1edbc 454 *
AnnaBridge 171:3a7713b1edbc 455 * @param primask value of primask register to be restored. The primask value is supposed to be provided by the
AnnaBridge 171:3a7713b1edbc 456 * DisableGlobalIRQ().
AnnaBridge 171:3a7713b1edbc 457 */
AnnaBridge 171:3a7713b1edbc 458 static inline void EnableGlobalIRQ(uint32_t primask)
AnnaBridge 171:3a7713b1edbc 459 {
AnnaBridge 171:3a7713b1edbc 460 #if defined(CPSR_I_Msk)
AnnaBridge 171:3a7713b1edbc 461 __set_CPSR((__get_CPSR() & ~CPSR_I_Msk) | primask);
AnnaBridge 171:3a7713b1edbc 462 #else
AnnaBridge 171:3a7713b1edbc 463 __set_PRIMASK(primask);
AnnaBridge 171:3a7713b1edbc 464 #endif
AnnaBridge 171:3a7713b1edbc 465 }
AnnaBridge 171:3a7713b1edbc 466
AnnaBridge 171:3a7713b1edbc 467 #if defined(ENABLE_RAM_VECTOR_TABLE)
AnnaBridge 171:3a7713b1edbc 468 /*!
AnnaBridge 171:3a7713b1edbc 469 * @brief install IRQ handler
AnnaBridge 171:3a7713b1edbc 470 *
AnnaBridge 171:3a7713b1edbc 471 * @param irq IRQ number
AnnaBridge 171:3a7713b1edbc 472 * @param irqHandler IRQ handler address
AnnaBridge 171:3a7713b1edbc 473 * @return The old IRQ handler address
AnnaBridge 171:3a7713b1edbc 474 */
AnnaBridge 171:3a7713b1edbc 475 uint32_t InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);
AnnaBridge 171:3a7713b1edbc 476 #endif /* ENABLE_RAM_VECTOR_TABLE. */
AnnaBridge 171:3a7713b1edbc 477
AnnaBridge 171:3a7713b1edbc 478 #if (defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0))
AnnaBridge 171:3a7713b1edbc 479 /*!
AnnaBridge 171:3a7713b1edbc 480 * @brief Enable specific interrupt for wake-up from deep-sleep mode.
AnnaBridge 171:3a7713b1edbc 481 *
AnnaBridge 171:3a7713b1edbc 482 * Enable the interrupt for wake-up from deep sleep mode.
AnnaBridge 171:3a7713b1edbc 483 * Some interrupts are typically used in sleep mode only and will not occur during
AnnaBridge 171:3a7713b1edbc 484 * deep-sleep mode because relevant clocks are stopped. However, it is possible to enable
AnnaBridge 171:3a7713b1edbc 485 * those clocks (significantly increasing power consumption in the reduced power mode),
AnnaBridge 171:3a7713b1edbc 486 * making these wake-ups possible.
AnnaBridge 171:3a7713b1edbc 487 *
AnnaBridge 171:3a7713b1edbc 488 * @note This function also enables the interrupt in the NVIC (EnableIRQ() is called internally).
AnnaBridge 171:3a7713b1edbc 489 *
AnnaBridge 171:3a7713b1edbc 490 * @param interrupt The IRQ number.
AnnaBridge 171:3a7713b1edbc 491 */
AnnaBridge 171:3a7713b1edbc 492 void EnableDeepSleepIRQ(IRQn_Type interrupt);
AnnaBridge 171:3a7713b1edbc 493
AnnaBridge 171:3a7713b1edbc 494 /*!
AnnaBridge 171:3a7713b1edbc 495 * @brief Disable specific interrupt for wake-up from deep-sleep mode.
AnnaBridge 171:3a7713b1edbc 496 *
AnnaBridge 171:3a7713b1edbc 497 * Disable the interrupt for wake-up from deep sleep mode.
AnnaBridge 171:3a7713b1edbc 498 * Some interrupts are typically used in sleep mode only and will not occur during
AnnaBridge 171:3a7713b1edbc 499 * deep-sleep mode because relevant clocks are stopped. However, it is possible to enable
AnnaBridge 171:3a7713b1edbc 500 * those clocks (significantly increasing power consumption in the reduced power mode),
AnnaBridge 171:3a7713b1edbc 501 * making these wake-ups possible.
AnnaBridge 171:3a7713b1edbc 502 *
AnnaBridge 171:3a7713b1edbc 503 * @note This function also disables the interrupt in the NVIC (DisableIRQ() is called internally).
AnnaBridge 171:3a7713b1edbc 504 *
AnnaBridge 171:3a7713b1edbc 505 * @param interrupt The IRQ number.
AnnaBridge 171:3a7713b1edbc 506 */
AnnaBridge 171:3a7713b1edbc 507 void DisableDeepSleepIRQ(IRQn_Type interrupt);
AnnaBridge 171:3a7713b1edbc 508 #endif /* FSL_FEATURE_SOC_SYSCON_COUNT */
AnnaBridge 171:3a7713b1edbc 509
AnnaBridge 171:3a7713b1edbc 510 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 511 }
AnnaBridge 171:3a7713b1edbc 512 #endif
AnnaBridge 171:3a7713b1edbc 513
AnnaBridge 171:3a7713b1edbc 514 /*! @} */
AnnaBridge 171:3a7713b1edbc 515
AnnaBridge 171:3a7713b1edbc 516 #endif /* _FSL_COMMON_H_ */