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TARGET_EFM32PG_STK3401/TOOLCHAIN_IAR/efm32pg1b200f256.icf

Committer:
AnnaBridge
Date:
2017-11-08
Revision:
156:ff21514d8981

File content as of revision 156:ff21514d8981:

/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */

if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00040000; }

/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__   = MBED_APP_START;
define symbol __ICFEDIT_region_ROM_end__     = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol __NVIC_start__                 = 0x20000000;
define symbol __NVIC_end__                   = 0x200000C7;
define symbol __ICFEDIT_region_RAM_start__   = 0x200000C8;
define symbol __ICFEDIT_region_RAM_end__     = 0x20007FFF;
/*-Sizes-*/
/*Heap 1/4 of ram and stack 1/8*/
define symbol __ICFEDIT_size_cstack__   = 0x1000;
define symbol __ICFEDIT_size_heap__     = 0x2000;
/**** End of ICF editor section. ###ICF###*/

define memory mem with size = 4G;
define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];

define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

initialize by copy { readwrite };
do not initialize  { section .noinit };

keep { section .intvec };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region   { readonly };
place in RAM_region   { readwrite, block CSTACK, block HEAP };