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TARGET_DISCO_L496AG/TOOLCHAIN_IAR/stm32l496xx.icf
- Committer:
- AnnaBridge
- Date:
- 2018-04-19
- Revision:
- 165:d1b4690b3f8b
- Child:
- 171:3a7713b1edbc
File content as of revision 165:d1b4690b3f8b:
/* [ROM = 1024kb = 0x100000] */ define symbol __intvec_start__ = 0x08000000; define symbol __region_ROM_start__ = 0x08000000; define symbol __region_ROM_end__ = 0x08000000 + 0x100000 - 1; /* [RAM = 0x50000] */ /* Vector table dynamic copy: Total: 107 vectors = 428 bytes (0x1AC) to be reserved in RAM */ define symbol __NVIC_start__ = 0x20000000; define symbol __NVIC_end__ = 0x200001AC - 1; define symbol __region_SRAM1_start__ = 0x200001AC; /* Aligned on 8 bytes (428 = 53 x 8) */ define symbol __region_SRAM1_end__ = 0x2004FFFF; /* Memory regions */ define memory mem with size = 4G; define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]; define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; /* Stack 1/8 and Heap 1/4 of RAM */ define symbol __size_cstack__ = 0x8000; define symbol __size_heap__ = 0xa000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; do not initialize { section .noinit }; place at address mem:__intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; place in SRAM1_region { readwrite, block STACKHEAP };