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Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
Diff: TARGET_ARCH_MAX/stm32f4xx_hal_can.h
- Revision:
- 122:f9eeca106725
- Parent:
- 110:165afa46840b
--- a/TARGET_ARCH_MAX/stm32f4xx_hal_can.h Wed May 25 16:44:06 2016 +0100
+++ b/TARGET_ARCH_MAX/stm32f4xx_hal_can.h Thu Jul 07 14:34:11 2016 +0100
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f4xx_hal_can.h
* @author MCD Application Team
- * @version V1.4.1
- * @date 09-October-2015
+ * @version V1.5.0
+ * @date 06-May-2016
* @brief Header file of CAN HAL module.
******************************************************************************
* @attention
*
- * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
+ * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -45,7 +45,8 @@
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+ defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
+ defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal_def.h"
@@ -67,14 +68,14 @@
*/
typedef enum
{
- HAL_CAN_STATE_RESET = 0x00, /*!< CAN not yet initialized or disabled */
- HAL_CAN_STATE_READY = 0x01, /*!< CAN initialized and ready for use */
- HAL_CAN_STATE_BUSY = 0x02, /*!< CAN process is ongoing */
- HAL_CAN_STATE_BUSY_TX = 0x12, /*!< CAN process is ongoing */
- HAL_CAN_STATE_BUSY_RX = 0x22, /*!< CAN process is ongoing */
- HAL_CAN_STATE_BUSY_TX_RX = 0x32, /*!< CAN process is ongoing */
- HAL_CAN_STATE_TIMEOUT = 0x03, /*!< Timeout state */
- HAL_CAN_STATE_ERROR = 0x04 /*!< CAN error state */
+ HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */
+ HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */
+ HAL_CAN_STATE_BUSY = 0x02U, /*!< CAN process is ongoing */
+ HAL_CAN_STATE_BUSY_TX = 0x12U, /*!< CAN process is ongoing */
+ HAL_CAN_STATE_BUSY_RX = 0x22U, /*!< CAN process is ongoing */
+ HAL_CAN_STATE_BUSY_TX_RX = 0x32U, /*!< CAN process is ongoing */
+ HAL_CAN_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
+ HAL_CAN_STATE_ERROR = 0x04U /*!< CAN error state */
}HAL_CAN_StateTypeDef;
@@ -126,21 +127,21 @@
{
uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
configuration, first one for a 16-bit configuration).
- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
+ This parameter must be a number between Min_Data = 0x0000U and Max_Data = 0xFFFFU */
uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
configuration, second one for a 16-bit configuration).
- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
+ This parameter must be a number between Min_Data = 0x0000U and Max_Data = 0xFFFFU */
uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
according to the mode (MSBs for a 32-bit configuration,
first one for a 16-bit configuration).
- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
+ This parameter must be a number between Min_Data = 0x0000U and Max_Data = 0xFFFFU */
uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
according to the mode (LSBs for a 32-bit configuration,
second one for a 16-bit configuration).
- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
+ This parameter must be a number between Min_Data = 0x0000U and Max_Data = 0xFFFFU */
uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
This parameter can be a value of @ref CAN_filter_FIFO */
@@ -171,7 +172,7 @@
This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
uint32_t ExtId; /*!< Specifies the extended identifier.
- This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
+ This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFFU */
uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
This parameter can be a value of @ref CAN_Identifier_Type */
@@ -196,7 +197,7 @@
This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
uint32_t ExtId; /*!< Specifies the extended identifier.
- This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
+ This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFFU */
uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received.
This parameter can be a value of @ref CAN_Identifier_Type */
@@ -251,16 +252,16 @@
/** @defgroup HAL_CAN_Error_Code HAL CAN Error Code
* @{
*/
-#define HAL_CAN_ERROR_NONE 0x00 /*!< No error */
-#define HAL_CAN_ERROR_EWG 0x01 /*!< EWG error */
-#define HAL_CAN_ERROR_EPV 0x02 /*!< EPV error */
-#define HAL_CAN_ERROR_BOF 0x04 /*!< BOF error */
-#define HAL_CAN_ERROR_STF 0x08 /*!< Stuff error */
-#define HAL_CAN_ERROR_FOR 0x10 /*!< Form error */
-#define HAL_CAN_ERROR_ACK 0x20 /*!< Acknowledgment error */
-#define HAL_CAN_ERROR_BR 0x40 /*!< Bit recessive */
-#define HAL_CAN_ERROR_BD 0x80 /*!< LEC dominant */
-#define HAL_CAN_ERROR_CRC 0x100 /*!< LEC transfer error */
+#define HAL_CAN_ERROR_NONE 0x00U /*!< No error */
+#define HAL_CAN_ERROR_EWG 0x01U /*!< EWG error */
+#define HAL_CAN_ERROR_EPV 0x02U /*!< EPV error */
+#define HAL_CAN_ERROR_BOF 0x04U /*!< BOF error */
+#define HAL_CAN_ERROR_STF 0x08U /*!< Stuff error */
+#define HAL_CAN_ERROR_FOR 0x10U /*!< Form error */
+#define HAL_CAN_ERROR_ACK 0x20U /*!< Acknowledgment error */
+#define HAL_CAN_ERROR_BR 0x40U /*!< Bit recessive */
+#define HAL_CAN_ERROR_BD 0x80U /*!< LEC dominant */
+#define HAL_CAN_ERROR_CRC 0x100U /*!< LEC transfer error */
/**
* @}
*/
@@ -268,8 +269,8 @@
/** @defgroup CAN_InitStatus CAN InitStatus
* @{
*/
-#define CAN_INITSTATUS_FAILED ((uint8_t)0x00) /*!< CAN initialization failed */
-#define CAN_INITSTATUS_SUCCESS ((uint8_t)0x01) /*!< CAN initialization OK */
+#define CAN_INITSTATUS_FAILED ((uint8_t)0x00U) /*!< CAN initialization failed */
+#define CAN_INITSTATUS_SUCCESS ((uint8_t)0x01U) /*!< CAN initialization OK */
/**
* @}
*/
@@ -277,7 +278,7 @@
/** @defgroup CAN_operating_mode CAN Operating Mode
* @{
*/
-#define CAN_MODE_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */
+#define CAN_MODE_NORMAL ((uint32_t)0x00000000U) /*!< Normal mode */
#define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
#define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
#define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
@@ -288,7 +289,7 @@
/** @defgroup CAN_synchronisation_jump_width CAN Synchronisation Jump Width
* @{
*/
-#define CAN_SJW_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
+#define CAN_SJW_1TQ ((uint32_t)0x00000000U) /*!< 1 time quantum */
#define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
#define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
#define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
@@ -299,7 +300,7 @@
/** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in bit segment 1
* @{
*/
-#define CAN_BS1_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
+#define CAN_BS1_1TQ ((uint32_t)0x00000000U) /*!< 1 time quantum */
#define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
#define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
#define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
@@ -322,7 +323,7 @@
/** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in bit segment 2
* @{
*/
-#define CAN_BS2_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
+#define CAN_BS2_1TQ ((uint32_t)0x00000000U) /*!< 1 time quantum */
#define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
#define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
#define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
@@ -337,8 +338,8 @@
/** @defgroup CAN_filter_mode CAN Filter Mode
* @{
*/
-#define CAN_FILTERMODE_IDMASK ((uint8_t)0x00) /*!< Identifier mask mode */
-#define CAN_FILTERMODE_IDLIST ((uint8_t)0x01) /*!< Identifier list mode */
+#define CAN_FILTERMODE_IDMASK ((uint8_t)0x00U) /*!< Identifier mask mode */
+#define CAN_FILTERMODE_IDLIST ((uint8_t)0x01U) /*!< Identifier list mode */
/**
* @}
*/
@@ -346,8 +347,8 @@
/** @defgroup CAN_filter_scale CAN Filter Scale
* @{
*/
-#define CAN_FILTERSCALE_16BIT ((uint8_t)0x00) /*!< Two 16-bit filters */
-#define CAN_FILTERSCALE_32BIT ((uint8_t)0x01) /*!< One 32-bit filter */
+#define CAN_FILTERSCALE_16BIT ((uint8_t)0x00U) /*!< Two 16-bit filters */
+#define CAN_FILTERSCALE_32BIT ((uint8_t)0x01U) /*!< One 32-bit filter */
/**
* @}
*/
@@ -355,8 +356,8 @@
/** @defgroup CAN_filter_FIFO CAN Filter FIFO
* @{
*/
-#define CAN_FILTER_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */
-#define CAN_FILTER_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */
+#define CAN_FILTER_FIFO0 ((uint8_t)0x00U) /*!< Filter FIFO 0 assignment for filter x */
+#define CAN_FILTER_FIFO1 ((uint8_t)0x01U) /*!< Filter FIFO 1 assignment for filter x */
/**
* @}
*/
@@ -364,8 +365,8 @@
/** @defgroup CAN_Identifier_Type CAN Identifier Type
* @{
*/
-#define CAN_ID_STD ((uint32_t)0x00000000) /*!< Standard Id */
-#define CAN_ID_EXT ((uint32_t)0x00000004) /*!< Extended Id */
+#define CAN_ID_STD ((uint32_t)0x00000000U) /*!< Standard Id */
+#define CAN_ID_EXT ((uint32_t)0x00000004U) /*!< Extended Id */
/**
* @}
*/
@@ -373,8 +374,8 @@
/** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
* @{
*/
-#define CAN_RTR_DATA ((uint32_t)0x00000000) /*!< Data frame */
-#define CAN_RTR_REMOTE ((uint32_t)0x00000002) /*!< Remote frame */
+#define CAN_RTR_DATA ((uint32_t)0x00000000U) /*!< Data frame */
+#define CAN_RTR_REMOTE ((uint32_t)0x00000002U) /*!< Remote frame */
/**
* @}
*/
@@ -382,8 +383,8 @@
/** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number Constants
* @{
*/
-#define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */
-#define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */
+#define CAN_FIFO0 ((uint8_t)0x00U) /*!< CAN FIFO 0 used to receive */
+#define CAN_FIFO1 ((uint8_t)0x01U) /*!< CAN FIFO 1 used to receive */
/**
* @}
*/
@@ -397,34 +398,37 @@
CAN_GetFlagStatus() function. */
/* Transmit Flags */
-#define CAN_FLAG_RQCP0 ((uint32_t)0x00000500) /*!< Request MailBox0 flag */
-#define CAN_FLAG_RQCP1 ((uint32_t)0x00000508) /*!< Request MailBox1 flag */
-#define CAN_FLAG_RQCP2 ((uint32_t)0x00000510) /*!< Request MailBox2 flag */
-#define CAN_FLAG_TXOK0 ((uint32_t)0x00000501) /*!< Transmission OK MailBox0 flag */
-#define CAN_FLAG_TXOK1 ((uint32_t)0x00000509) /*!< Transmission OK MailBox1 flag */
-#define CAN_FLAG_TXOK2 ((uint32_t)0x00000511) /*!< Transmission OK MailBox2 flag */
-#define CAN_FLAG_TME0 ((uint32_t)0x0000051A) /*!< Transmit mailbox 0 empty flag */
-#define CAN_FLAG_TME1 ((uint32_t)0x0000051B) /*!< Transmit mailbox 0 empty flag */
-#define CAN_FLAG_TME2 ((uint32_t)0x0000051C) /*!< Transmit mailbox 0 empty flag */
+#define CAN_FLAG_RQCP0 ((uint32_t)0x00000500U) /*!< Request MailBox0 flag */
+#define CAN_FLAG_RQCP1 ((uint32_t)0x00000508U) /*!< Request MailBox1 flag */
+#define CAN_FLAG_RQCP2 ((uint32_t)0x00000510U) /*!< Request MailBox2 flag */
+#define CAN_FLAG_TXOK0 ((uint32_t)0x00000501U) /*!< Transmission OK MailBox0 flag */
+#define CAN_FLAG_TXOK1 ((uint32_t)0x00000509U) /*!< Transmission OK MailBox1 flag */
+#define CAN_FLAG_TXOK2 ((uint32_t)0x00000511U) /*!< Transmission OK MailBox2 flag */
+#define CAN_FLAG_TME0 ((uint32_t)0x0000051AU) /*!< Transmit mailbox 0 empty flag */
+#define CAN_FLAG_TME1 ((uint32_t)0x0000051BU) /*!< Transmit mailbox 0 empty flag */
+#define CAN_FLAG_TME2 ((uint32_t)0x0000051CU) /*!< Transmit mailbox 0 empty flag */
/* Receive Flags */
-#define CAN_FLAG_FF0 ((uint32_t)0x00000203) /*!< FIFO 0 Full flag */
-#define CAN_FLAG_FOV0 ((uint32_t)0x00000204) /*!< FIFO 0 Overrun flag */
+#define CAN_FLAG_FF0 ((uint32_t)0x00000203U) /*!< FIFO 0 Full flag */
+#define CAN_FLAG_FOV0 ((uint32_t)0x00000204U) /*!< FIFO 0 Overrun flag */
-#define CAN_FLAG_FF1 ((uint32_t)0x00000403) /*!< FIFO 1 Full flag */
-#define CAN_FLAG_FOV1 ((uint32_t)0x00000404) /*!< FIFO 1 Overrun flag */
+#define CAN_FLAG_FF1 ((uint32_t)0x00000403U) /*!< FIFO 1 Full flag */
+#define CAN_FLAG_FOV1 ((uint32_t)0x00000404U) /*!< FIFO 1 Overrun flag */
/* Operating Mode Flags */
-#define CAN_FLAG_WKU ((uint32_t)0x00000103) /*!< Wake up flag */
-#define CAN_FLAG_SLAK ((uint32_t)0x00000101) /*!< Sleep acknowledge flag */
-#define CAN_FLAG_SLAKI ((uint32_t)0x00000104) /*!< Sleep acknowledge flag */
+#define CAN_FLAG_INAK ((uint32_t)0x00000100U) /*!< Initialization acknowledge flag */
+#define CAN_FLAG_SLAK ((uint32_t)0x00000101U) /*!< Sleep acknowledge flag */
+#define CAN_FLAG_ERRI ((uint32_t)0x00000102U) /*!< Error flag */
+#define CAN_FLAG_WKU ((uint32_t)0x00000103U) /*!< Wake up flag */
+#define CAN_FLAG_SLAKI ((uint32_t)0x00000104U) /*!< Sleep acknowledge flag */
+
/* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
In this case the SLAK bit can be polled.*/
/* Error Flags */
-#define CAN_FLAG_EWG ((uint32_t)0x00000300) /*!< Error warning flag */
-#define CAN_FLAG_EPV ((uint32_t)0x00000301) /*!< Error passive flag */
-#define CAN_FLAG_BOF ((uint32_t)0x00000302) /*!< Bus-Off flag */
+#define CAN_FLAG_EWG ((uint32_t)0x00000300U) /*!< Error warning flag */
+#define CAN_FLAG_EPV ((uint32_t)0x00000301U) /*!< Error passive flag */
+#define CAN_FLAG_BOF ((uint32_t)0x00000302U) /*!< Bus-Off flag */
/**
* @}
*/
@@ -459,9 +463,9 @@
/** @defgroup CAN_Mailboxes_Definition CAN Mailboxes Definition
* @{
*/
-#define CAN_TXMAILBOX_0 ((uint8_t)0x00)
-#define CAN_TXMAILBOX_1 ((uint8_t)0x01)
-#define CAN_TXMAILBOX_2 ((uint8_t)0x02)
+#define CAN_TXMAILBOX_0 ((uint8_t)0x00U)
+#define CAN_TXMAILBOX_1 ((uint8_t)0x01U)
+#define CAN_TXMAILBOX_2 ((uint8_t)0x02U)
/**
* @}
*/
@@ -504,7 +508,7 @@
* @retval The number of pending message.
*/
#define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
-((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03)))
+((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03U)) : ((uint8_t)((__HANDLE__)->Instance->RF1R & (uint32_t)0x03U)))
/** @brief Check whether the specified CAN flag is set or not.
* @param __HANDLE__: CAN Handle
@@ -534,11 +538,11 @@
* @retval The new state of __FLAG__ (TRUE or FALSE).
*/
#define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
-((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
- (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
- (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
- (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
- ((((__HANDLE__)->Instance->ESR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))))
+((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
+ (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
+ (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
+ (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
+ ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))))
/** @brief Clear the specified CAN pending flag.
* @param __HANDLE__: CAN Handle.
@@ -562,17 +566,13 @@
* @arg CAN_FLAG_WKU: Wake up Flag
* @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
* @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
- * @arg CAN_FLAG_EWG: Error Warning Flag
- * @arg CAN_FLAG_EPV: Error Passive Flag
- * @arg CAN_FLAG_BOF: Bus-Off Flag
* @retval The new state of __FLAG__ (TRUE or FALSE).
*/
#define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
-((((__FLAG__) >> 8) == 5)? (((__HANDLE__)->Instance->TSR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
- (((__FLAG__) >> 8) == 2)? (((__HANDLE__)->Instance->RF0R) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
- (((__FLAG__) >> 8) == 4)? (((__HANDLE__)->Instance->RF1R) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
- (((__FLAG__) >> 8) == 1)? (((__HANDLE__)->Instance->MSR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
- (((__HANDLE__)->Instance->ESR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))))
+((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = ((uint32_t)1U << ((__FLAG__) & CAN_FLAG_MASK))): \
+ (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = ((uint32_t)1U << ((__FLAG__) & CAN_FLAG_MASK))): \
+ (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = ((uint32_t)1U << ((__FLAG__) & CAN_FLAG_MASK))): \
+ (((__HANDLE__)->Instance->MSR) = ((uint32_t)1U << ((__FLAG__) & CAN_FLAG_MASK))))
/** @brief Check if the specified CAN interrupt source is enabled or disabled.
* @param __HANDLE__: CAN Handle
@@ -603,7 +603,7 @@
* @retval None
*/
#define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
-((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1))
+((__HANDLE__)->Instance->RF0R = CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R = CAN_RF1R_RFOM1))
/**
* @brief Cancel a transmit request.
@@ -612,9 +612,9 @@
* @retval None
*/
#define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
-(((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\
- ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\
- ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2))
+(((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ0) :\
+ ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ1) :\
+ ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ2))
/**
* @brief Enable or disable the DBG Freeze for CAN.
@@ -704,8 +704,8 @@
/** @defgroup CAN_Private_Constants CAN Private Constants
* @{
*/
-#define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
-#define CAN_FLAG_MASK ((uint32_t)0x000000FF)
+#define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04U) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
+#define CAN_FLAG_MASK ((uint32_t)0x000000FFU)
/**
* @}
*/
@@ -722,20 +722,20 @@
((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
#define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
#define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
-#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
-#define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
+#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U))
+#define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27U)
#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
((MODE) == CAN_FILTERMODE_IDLIST))
#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
((SCALE) == CAN_FILTERSCALE_32BIT))
#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
((FIFO) == CAN_FILTER_FIFO1))
-#define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28)
+#define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28U)
-#define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
-#define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF))
-#define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF))
-#define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
+#define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02U))
+#define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FFU))
+#define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFFU))
+#define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08U))
#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
((IDTYPE) == CAN_ID_EXT))
@@ -756,7 +756,8 @@
*/
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
- STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
+ STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
+ STM32F412Vx || STM32F412Rx || STM32F412Cx */
/**
* @}
