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Diff: TARGET_EFM32LG_STK3600/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_ldma.h
- Revision:
- 159:7130f322cb7e
- Parent:
- 156:ff21514d8981
--- a/TARGET_EFM32LG_STK3600/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_ldma.h Thu Nov 23 11:44:04 2017 +0000
+++ b/TARGET_EFM32LG_STK3600/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_ldma.h Thu Dec 21 18:20:02 2017 +0000
@@ -1,9 +1,9 @@
/***************************************************************************//**
* @file em_ldma.h
* @brief Direct memory access (LDMA) API
- * @version 5.1.2
+ * @version 5.3.3
*******************************************************************************
- * @section License
+ * # License
* <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
*******************************************************************************
*
@@ -35,7 +35,7 @@
#include "em_device.h"
-#if defined( LDMA_PRESENT ) && ( LDMA_COUNT == 1 )
+#if defined(LDMA_PRESENT) && (LDMA_COUNT == 1)
#include <stdbool.h>
@@ -43,7 +43,6 @@
extern "C" {
#endif
-
/***************************************************************************//**
* @addtogroup emlib
* @{
@@ -132,8 +131,7 @@
* This value controls the number of unit data transfers per arbitration
* cycle, providing a means to balance DMA channels' load on the controller.
*/
-typedef enum
-{
+typedef enum {
ldmaCtrlBlockSizeUnit1 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1, /**< One transfer per arbitration. */
ldmaCtrlBlockSizeUnit2 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT2, /**< Two transfers per arbitration. */
ldmaCtrlBlockSizeUnit3 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT3, /**< Three transfers per arbitration. */
@@ -151,23 +149,20 @@
} LDMA_CtrlBlockSize_t;
/** DMA structure type. */
-typedef enum
-{
+typedef enum {
ldmaCtrlStructTypeXfer = _LDMA_CH_CTRL_STRUCTTYPE_TRANSFER, /**< TRANSFER transfer type. */
ldmaCtrlStructTypeSync = _LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE, /**< SYNCHRONIZE transfer type. */
ldmaCtrlStructTypeWrite = _LDMA_CH_CTRL_STRUCTTYPE_WRITE /**< WRITE transfer type. */
} LDMA_CtrlStructType_t;
/** DMA transfer block or cycle selector. */
-typedef enum
-{
+typedef enum {
ldmaCtrlReqModeBlock = _LDMA_CH_CTRL_REQMODE_BLOCK, /**< Each DMA request trigger transfer of one block. */
ldmaCtrlReqModeAll = _LDMA_CH_CTRL_REQMODE_ALL /**< A DMA request trigger transfer of a complete cycle. */
} LDMA_CtrlReqMode_t;
/** Source address increment unit size. */
-typedef enum
-{
+typedef enum {
ldmaCtrlSrcIncOne = _LDMA_CH_CTRL_SRCINC_ONE, /**< Increment source address by one unit data size. */
ldmaCtrlSrcIncTwo = _LDMA_CH_CTRL_SRCINC_TWO, /**< Increment source address by two unit data sizes. */
ldmaCtrlSrcIncFour = _LDMA_CH_CTRL_SRCINC_FOUR, /**< Increment source address by four unit data sizes. */
@@ -175,16 +170,14 @@
} LDMA_CtrlSrcInc_t;
/** DMA transfer unit size. */
-typedef enum
-{
+typedef enum {
ldmaCtrlSizeByte = _LDMA_CH_CTRL_SIZE_BYTE, /**< Each unit transfer is a byte. */
ldmaCtrlSizeHalf = _LDMA_CH_CTRL_SIZE_HALFWORD, /**< Each unit transfer is a half-word. */
ldmaCtrlSizeWord = _LDMA_CH_CTRL_SIZE_WORD /**< Each unit transfer is a word. */
} LDMA_CtrlSize_t;
/** Destination address increment unit size. */
-typedef enum
-{
+typedef enum {
ldmaCtrlDstIncOne = _LDMA_CH_CTRL_DSTINC_ONE, /**< Increment destination address by one unit data size. */
ldmaCtrlDstIncTwo = _LDMA_CH_CTRL_DSTINC_TWO, /**< Increment destination address by two unit data sizes. */
ldmaCtrlDstIncFour = _LDMA_CH_CTRL_DSTINC_FOUR, /**< Increment destination address by four unit data sizes. */
@@ -192,29 +185,25 @@
} LDMA_CtrlDstInc_t;
/** Source addressing mode. */
-typedef enum
-{
+typedef enum {
ldmaCtrlSrcAddrModeAbs = _LDMA_CH_CTRL_SRCMODE_ABSOLUTE, /**< Address fetched from a linked structure is absolute. */
ldmaCtrlSrcAddrModeRel = _LDMA_CH_CTRL_SRCMODE_RELATIVE /**< Address fetched from a linked structure is relative. */
} LDMA_CtrlSrcAddrMode_t;
/** Destination addressing mode. */
-typedef enum
-{
+typedef enum {
ldmaCtrlDstAddrModeAbs = _LDMA_CH_CTRL_DSTMODE_ABSOLUTE, /**< Address fetched from a linked structure is absolute. */
ldmaCtrlDstAddrModeRel = _LDMA_CH_CTRL_DSTMODE_RELATIVE /**< Address fetched from a linked structure is relative. */
} LDMA_CtrlDstAddrMode_t;
/** DMA linkload address mode. */
-typedef enum
-{
+typedef enum {
ldmaLinkModeAbs = _LDMA_CH_LINK_LINKMODE_ABSOLUTE, /**< Link address is an absolute address value. */
ldmaLinkModeRel = _LDMA_CH_LINK_LINKMODE_RELATIVE /**< Link address is a two's complement releative address. */
} LDMA_LinkMode_t;
/** Insert extra arbitration slots to increase channel arbitration priority. */
-typedef enum
-{
+typedef enum {
ldmaCfgArbSlotsAs1 = _LDMA_CH_CFG_ARBSLOTS_ONE, /**< One arbitration slot selected. */
ldmaCfgArbSlotsAs2 = _LDMA_CH_CFG_ARBSLOTS_TWO, /**< Two arbitration slots selected. */
ldmaCfgArbSlotsAs4 = _LDMA_CH_CFG_ARBSLOTS_FOUR, /**< Four arbitration slots selected. */
@@ -222,22 +211,19 @@
} LDMA_CfgArbSlots_t;
/** Source address increment sign. */
-typedef enum
-{
+typedef enum {
ldmaCfgSrcIncSignPos = _LDMA_CH_CFG_SRCINCSIGN_POSITIVE, /**< Increment source address. */
ldmaCfgSrcIncSignNeg = _LDMA_CH_CFG_SRCINCSIGN_NEGATIVE /**< Decrement source address. */
} LDMA_CfgSrcIncSign_t;
/** Destination address increment sign. */
-typedef enum
-{
+typedef enum {
ldmaCfgDstIncSignPos = _LDMA_CH_CFG_DSTINCSIGN_POSITIVE, /**< Increment destination address. */
ldmaCfgDstIncSignNeg = _LDMA_CH_CFG_DSTINCSIGN_NEGATIVE /**< Decrement destination address. */
} LDMA_CfgDstIncSign_t;
/** Peripherals that can trigger LDMA transfers. */
-typedef enum
-{
+typedef enum {
ldmaPeripheralSignal_NONE = LDMA_CH_REQSEL_SOURCESEL_NONE, ///< No peripheral selected for DMA triggering.
#if defined(LDMA_CH_REQSEL_SIGSEL_ADC0SCAN)
ldmaPeripheralSignal_ADC0_SCAN = LDMA_CH_REQSEL_SIGSEL_ADC0SCAN | LDMA_CH_REQSEL_SOURCESEL_ADC0, ///< Trig on ADC0_SCAN.
@@ -245,19 +231,25 @@
#if defined(LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE)
ldmaPeripheralSignal_ADC0_SINGLE = LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE | LDMA_CH_REQSEL_SOURCESEL_ADC0, ///< Trig on ADC0_SINGLE.
#endif
- #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0RD )
+ #if defined(LDMA_CH_REQSEL_SIGSEL_ADC1SCAN)
+ ldmaPeripheralSignal_ADC1_SCAN = LDMA_CH_REQSEL_SIGSEL_ADC1SCAN | LDMA_CH_REQSEL_SOURCESEL_ADC1, ///< Trig on ADC1_SCAN.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_ADC1SINGLE)
+ ldmaPeripheralSignal_ADC1_SINGLE = LDMA_CH_REQSEL_SIGSEL_ADC1SINGLE | LDMA_CH_REQSEL_SOURCESEL_ADC1, ///< Trig on ADC1_SINGLE.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0RD)
ldmaPeripheralSignal_CRYPTO_DATA0RD = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA0RD.
#endif
- #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0WR )
+ #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0WR)
ldmaPeripheralSignal_CRYPTO_DATA0WR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA0WR.
#endif
- #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0XWR )
+ #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0XWR)
ldmaPeripheralSignal_CRYPTO_DATA0XWR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0XWR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA0XWR.
#endif
- #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1RD )
+ #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1RD)
ldmaPeripheralSignal_CRYPTO_DATA1RD = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA1RD.
#endif
- #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1WR )
+ #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1WR)
ldmaPeripheralSignal_CRYPTO_DATA1WR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA1WR.
#endif
#if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0RD)
@@ -296,6 +288,24 @@
#if defined(LDMA_CH_REQSEL_SIGSEL_CSENDATA)
ldmaPeripheralSignal_CSEN_DATA = LDMA_CH_REQSEL_SIGSEL_CSENDATA | LDMA_CH_REQSEL_SOURCESEL_CSEN, ///< Trig on CSEN_DATA.
#endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_EBIPXL0EMPTY)
+ ldmaPeripheralSignal_EBI_PXL0EMPTY = LDMA_CH_REQSEL_SIGSEL_EBIPXL0EMPTY | LDMA_CH_REQSEL_SOURCESEL_EBI, ///< Trig on EBI_PXL0EMPTY.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_EBIPXL1EMPTY)
+ ldmaPeripheralSignal_EBI_PXL1EMPTY = LDMA_CH_REQSEL_SIGSEL_EBIPXL1EMPTY | LDMA_CH_REQSEL_SOURCESEL_EBI, ///< Trig on EBI_PXL1EMPTY.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_EBIPXLFULL)
+ ldmaPeripheralSignal_EBI_PXLFULL = LDMA_CH_REQSEL_SIGSEL_EBIPXLFULL | LDMA_CH_REQSEL_SOURCESEL_EBI, ///< Trig on EBI_PXLFULL.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_EBIDDEMPTY)
+ ldmaPeripheralSignal_EBI_DDEMPTY = LDMA_CH_REQSEL_SIGSEL_EBIDDEMPTY | LDMA_CH_REQSEL_SOURCESEL_EBI, ///< Trig on EBI_DDEMPTY.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_EBIVSYNC)
+ ldmaPeripheralSignal_EBI_VSYNC = LDMA_CH_REQSEL_SIGSEL_EBIVSYNC | LDMA_CH_REQSEL_SOURCESEL_EBI, ///< Trig on EBI_VSYNC.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_EBIHSYNC)
+ ldmaPeripheralSignal_EBI_HSYNC = LDMA_CH_REQSEL_SIGSEL_EBIHSYNC | LDMA_CH_REQSEL_SOURCESEL_EBI, ///< Trig on EBI_HSYNC.
+ #endif
#if defined(LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV)
ldmaPeripheralSignal_I2C0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_I2C0, ///< Trig on I2C0_RXDATAV.
#endif
@@ -308,6 +318,12 @@
#if defined(LDMA_CH_REQSEL_SIGSEL_I2C1TXBL)
ldmaPeripheralSignal_I2C1_TXBL = LDMA_CH_REQSEL_SIGSEL_I2C1TXBL | LDMA_CH_REQSEL_SOURCESEL_I2C1, ///< Trig on I2C1_TXBL.
#endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_I2C2RXDATAV)
+ ldmaPeripheralSignal_I2C2_RXDATAV = LDMA_CH_REQSEL_SIGSEL_I2C2RXDATAV | LDMA_CH_REQSEL_SOURCESEL_I2C2, ///< Trig on I2C2_RXDATAV.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_I2C2TXBL)
+ ldmaPeripheralSignal_I2C2_TXBL = LDMA_CH_REQSEL_SIGSEL_I2C2TXBL | LDMA_CH_REQSEL_SOURCESEL_I2C2, ///< Trig on I2C2_TXBL.
+ #endif
#if defined(LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV)
ldmaPeripheralSignal_LESENSE_BUFDATAV = LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV | LDMA_CH_REQSEL_SOURCESEL_LESENSE, ///< Trig on LESENSE_BUFDATAV.
#endif
@@ -320,6 +336,15 @@
#if defined(LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY)
ldmaPeripheralSignal_LEUART0_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_LEUART0, ///< Trig on LEUART0_TXEMPTY.
#endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_LEUART1RXDATAV)
+ ldmaPeripheralSignal_LEUART1_RXDATAV = LDMA_CH_REQSEL_SIGSEL_LEUART1RXDATAV | LDMA_CH_REQSEL_SOURCESEL_LEUART1, ///< Trig on LEUART1_RXDATAV.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_LEUART1TXBL)
+ ldmaPeripheralSignal_LEUART1_TXBL = LDMA_CH_REQSEL_SIGSEL_LEUART1TXBL | LDMA_CH_REQSEL_SOURCESEL_LEUART1, ///< Trig on LEUART1_TXBL.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_LEUART1TXEMPTY)
+ ldmaPeripheralSignal_LEUART1_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_LEUART1TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_LEUART1, ///< Trig on LEUART1_TXEMPTY.
+ #endif
#if defined(LDMA_CH_REQSEL_SIGSEL_MSCWDATA)
ldmaPeripheralSignal_MSC_WDATA = LDMA_CH_REQSEL_SIGSEL_MSCWDATA | LDMA_CH_REQSEL_SOURCESEL_MSC, ///< Trig on MSC_WDATA.
#endif
@@ -356,6 +381,84 @@
#if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF)
ldmaPeripheralSignal_TIMER1_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ///< Trig on TIMER1_UFOF.
#endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER2CC0)
+ ldmaPeripheralSignal_TIMER2_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER2CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER2, ///< Trig on TIMER2_CC0.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER2CC1)
+ ldmaPeripheralSignal_TIMER2_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER2CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER2, ///< Trig on TIMER2_CC1.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER2CC2)
+ ldmaPeripheralSignal_TIMER2_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER2CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER2, ///< Trig on TIMER2_CC2.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER2UFOF)
+ ldmaPeripheralSignal_TIMER2_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER2UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER2, ///< Trig on TIMER2_UFOF.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER3CC0)
+ ldmaPeripheralSignal_TIMER3_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER3CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER3, ///< Trig on TIMER3_CC0.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER3CC1)
+ ldmaPeripheralSignal_TIMER3_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER3CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER3, ///< Trig on TIMER3_CC1.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER3CC2)
+ ldmaPeripheralSignal_TIMER3_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER3CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER3, ///< Trig on TIMER3_CC2.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER3UFOF)
+ ldmaPeripheralSignal_TIMER3_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER3UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER3, ///< Trig on TIMER3_UFOF.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER4CC0)
+ ldmaPeripheralSignal_TIMER4_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER4CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER4, ///< Trig on TIMER4_CC0.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER4CC1)
+ ldmaPeripheralSignal_TIMER4_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER4CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER4, ///< Trig on TIMER4_CC1.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER4CC2)
+ ldmaPeripheralSignal_TIMER4_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER4CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER4, ///< Trig on TIMER4_CC2.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER4UFOF)
+ ldmaPeripheralSignal_TIMER4_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER4UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER4, ///< Trig on TIMER4_UFOF.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER5CC0)
+ ldmaPeripheralSignal_TIMER5_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER5CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER5, ///< Trig on TIMER5_CC0.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER5CC1)
+ ldmaPeripheralSignal_TIMER5_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER5CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER5, ///< Trig on TIMER5_CC1.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER5CC2)
+ ldmaPeripheralSignal_TIMER5_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER5CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER5, ///< Trig on TIMER5_CC2.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER5UFOF)
+ ldmaPeripheralSignal_TIMER5_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER5UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER5, ///< Trig on TIMER5_UFOF.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER6CC0)
+ ldmaPeripheralSignal_TIMER6_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER6CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER6, ///< Trig on TIMER6_CC0.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER6CC1)
+ ldmaPeripheralSignal_TIMER6_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER6CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER6, ///< Trig on TIMER6_CC1.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER6CC2)
+ ldmaPeripheralSignal_TIMER6_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER6CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER6, ///< Trig on TIMER6_CC2.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER6UFOF)
+ ldmaPeripheralSignal_TIMER6_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER6UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER6, ///< Trig on TIMER6_UFOF.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_UART0RXDATAV)
+ ldmaPeripheralSignal_UART0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_UART0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_UART0, ///< Trig on UART0_RXDATAV.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_UART0TXBL)
+ ldmaPeripheralSignal_UART0_TXBL = LDMA_CH_REQSEL_SIGSEL_UART0TXBL | LDMA_CH_REQSEL_SOURCESEL_UART0, ///< Trig on UART0_TXBL.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_UART0TXEMPTY)
+ ldmaPeripheralSignal_UART0_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_UART0TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_UART0, ///< Trig on UART0_TXEMPTY.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_UART1RXDATAV)
+ ldmaPeripheralSignal_UART1_RXDATAV = LDMA_CH_REQSEL_SIGSEL_UART1RXDATAV | LDMA_CH_REQSEL_SOURCESEL_UART1, ///< Trig on UART1_RXDATAV.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_UART1TXBL)
+ ldmaPeripheralSignal_UART1_TXBL = LDMA_CH_REQSEL_SIGSEL_UART1TXBL | LDMA_CH_REQSEL_SOURCESEL_UART1, ///< Trig on UART1_TXBL.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_UART1TXEMPTY)
+ ldmaPeripheralSignal_UART1_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_UART1TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_UART1, ///< Trig on UART1_TXEMPTY.
+ #endif
#if defined(LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV)
ldmaPeripheralSignal_USART0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART0, ///< Trig on USART0_RXDATAV.
#endif
@@ -404,6 +507,30 @@
#if defined(LDMA_CH_REQSEL_SIGSEL_USART3TXEMPTY)
ldmaPeripheralSignal_USART3_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART3TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART3, ///< Trig on USART3_TXEMPTY.
#endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_USART4RXDATAV)
+ ldmaPeripheralSignal_USART4_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART4RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART4, ///< Trig on USART4_RXDATAV.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_USART4RXDATAVRIGHT)
+ ldmaPeripheralSignal_USART4_RXDATAVRIGHT = LDMA_CH_REQSEL_SIGSEL_USART4RXDATAVRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART4, ///< Trig on USART4_RXDATAVRIGHT.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_USART4TXBL)
+ ldmaPeripheralSignal_USART4_TXBL = LDMA_CH_REQSEL_SIGSEL_USART4TXBL | LDMA_CH_REQSEL_SOURCESEL_USART4, ///< Trig on USART4_TXBL.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_USART4TXBLRIGHT)
+ ldmaPeripheralSignal_USART4_TXBLRIGHT = LDMA_CH_REQSEL_SIGSEL_USART4TXBLRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART4, ///< Trig on USART4_TXBLRIGHT.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_USART4TXEMPTY)
+ ldmaPeripheralSignal_USART4_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART4TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART4, ///< Trig on USART4_TXEMPTY.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_USART5RXDATAV)
+ ldmaPeripheralSignal_USART5_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART5RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART5, ///< Trig on USART5_RXDATAV.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_USART5TXBL)
+ ldmaPeripheralSignal_USART5_TXBL = LDMA_CH_REQSEL_SIGSEL_USART5TXBL | LDMA_CH_REQSEL_SOURCESEL_USART5, ///< Trig on USART5_TXBL.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_USART5TXEMPTY)
+ ldmaPeripheralSignal_USART5_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART5TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART5, ///< Trig on USART5_TXEMPTY.
+ #endif
#if defined(LDMA_CH_REQSEL_SIGSEL_VDAC0CH0)
ldmaPeripheralSignal_VDAC0_CH0 = LDMA_CH_REQSEL_SIGSEL_VDAC0CH0 | LDMA_CH_REQSEL_SOURCESEL_VDAC0, ///< Trig on VDAC0_CH0.
#endif
@@ -435,11 +562,34 @@
ldmaPeripheralSignal_WTIMER1_CC3 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC3 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1, ///< Trig on WTIMER1_CC3.
#endif
#if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF)
- ldmaPeripheralSignal_WTIMER1_UFOF = LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF | LDMA_CH_REQSEL_SOURCESEL_WTIMER1 ///< Trig on WTIMER1_UFOF.
+ ldmaPeripheralSignal_WTIMER1_UFOF = LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF | LDMA_CH_REQSEL_SOURCESEL_WTIMER1, ///< Trig on WTIMER1_UFOF.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER2CC0)
+ ldmaPeripheralSignal_WTIMER2_CC0 = LDMA_CH_REQSEL_SIGSEL_WTIMER2CC0 | LDMA_CH_REQSEL_SOURCESEL_WTIMER2, ///< Trig on WTIMER2_CC0.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER2CC1)
+ ldmaPeripheralSignal_WTIMER2_CC1 = LDMA_CH_REQSEL_SIGSEL_WTIMER2CC1 | LDMA_CH_REQSEL_SOURCESEL_WTIMER2, ///< Trig on WTIMER2_CC1.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER2CC2)
+ ldmaPeripheralSignal_WTIMER2_CC2 = LDMA_CH_REQSEL_SIGSEL_WTIMER2CC2 | LDMA_CH_REQSEL_SOURCESEL_WTIMER2, ///< Trig on WTIMER2_CC2.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER2UFOF)
+ ldmaPeripheralSignal_WTIMER2_UFOF = LDMA_CH_REQSEL_SIGSEL_WTIMER2UFOF | LDMA_CH_REQSEL_SOURCESEL_WTIMER2, ///< Trig on WTIMER2_UFOF.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER3CC0)
+ ldmaPeripheralSignal_WTIMER3_CC0 = LDMA_CH_REQSEL_SIGSEL_WTIMER3CC0 | LDMA_CH_REQSEL_SOURCESEL_WTIMER3, ///< Trig on WTIMER3_CC0.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER3CC1)
+ ldmaPeripheralSignal_WTIMER3_CC1 = LDMA_CH_REQSEL_SIGSEL_WTIMER3CC1 | LDMA_CH_REQSEL_SOURCESEL_WTIMER3, ///< Trig on WTIMER3_CC1.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER3CC2)
+ ldmaPeripheralSignal_WTIMER3_CC2 = LDMA_CH_REQSEL_SIGSEL_WTIMER3CC2 | LDMA_CH_REQSEL_SOURCESEL_WTIMER3, ///< Trig on WTIMER3_CC2.
+ #endif
+ #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER3UFOF)
+ ldmaPeripheralSignal_WTIMER3_UFOF = LDMA_CH_REQSEL_SIGSEL_WTIMER3UFOF | LDMA_CH_REQSEL_SOURCESEL_WTIMER3, ///< Trig on WTIMER3_UFOF.
#endif
} LDMA_PeripheralSignal_t;
-
/*******************************************************************************
******************************* STRUCTS ***********************************
******************************************************************************/
@@ -453,14 +603,12 @@
* given DMA channel. The three descriptor types are XFER, SYNC and WRI.
* Refer to the reference manual for further information.
*/
-typedef union
-{
+typedef union {
/**
* TRANSFER DMA descriptor, this is the only descriptor type which can be
* used to start a DMA transfer.
*/
- struct
- {
+ struct {
uint32_t structType : 2; /**< Set to 0 to select XFER descriptor type. */
uint32_t reserved0 : 1;
uint32_t structReq : 1; /**< DMA transfer trigger during LINKLOAD. */
@@ -474,8 +622,8 @@
uint32_t srcInc : 2; /**< Source address increment unit size. */
uint32_t size : 2; /**< DMA transfer unit size. */
uint32_t dstInc : 2; /**< Destination address increment unit size. */
- uint32_t srcAddrMode: 1; /**< Source addressing mode. */
- uint32_t dstAddrMode: 1; /**< Destination addressing mode. */
+ uint32_t srcAddrMode : 1; /**< Source addressing mode. */
+ uint32_t dstAddrMode : 1; /**< Destination addressing mode. */
uint32_t srcAddr; /**< DMA source address. */
uint32_t dstAddr; /**< DMA destination address. */
@@ -486,10 +634,9 @@
} xfer;
/** SYNCHRONIZE DMA descriptor, used for intra channel transfer
- * syncronization.
- */
- struct
- {
+ * syncronization.
+ */
+ struct {
uint32_t structType : 2; /**< Set to 1 to select SYNC descriptor type. */
uint32_t reserved0 : 1;
uint32_t structReq : 1; /**< DMA transfer trigger during LINKLOAD. */
@@ -503,8 +650,8 @@
uint32_t srcInc : 2; /**< Source address increment unit size. */
uint32_t size : 2; /**< DMA transfer unit size. */
uint32_t dstInc : 2; /**< Destination address increment unit size. */
- uint32_t srcAddrMode: 1; /**< Source addressing mode. */
- uint32_t dstAddrMode: 1; /**< Destination addressing mode. */
+ uint32_t srcAddrMode : 1; /**< Source addressing mode. */
+ uint32_t dstAddrMode : 1; /**< Destination addressing mode. */
uint32_t syncSet : 8; /**< Set bits in LDMA_CTRL.SYNCTRIG register. */
uint32_t syncClr : 8; /**< Clear bits in LDMA_CTRL.SYNCTRIG register*/
@@ -519,8 +666,7 @@
} sync;
/** WRITE DMA descriptor, used for write immediate operations. */
- struct
- {
+ struct {
uint32_t structType : 2; /**< Set to 2 to select WRITE descriptor type.*/
uint32_t reserved0 : 1;
uint32_t structReq : 1; /**< DMA transfer trigger during LINKLOAD. */
@@ -534,8 +680,8 @@
uint32_t srcInc : 2; /**< Source address increment unit size. */
uint32_t size : 2; /**< DMA transfer unit size. */
uint32_t dstInc : 2; /**< Destination address increment unit size. */
- uint32_t srcAddrMode: 1; /**< Source addressing mode. */
- uint32_t dstAddrMode: 1; /**< Destination addressing mode. */
+ uint32_t srcAddrMode : 1; /**< Source addressing mode. */
+ uint32_t dstAddrMode : 1; /**< Destination addressing mode. */
uint32_t immVal; /**< Data to be written at dstAddr. */
uint32_t dstAddr; /**< DMA write destination address. */
@@ -547,8 +693,7 @@
} LDMA_Descriptor_t;
/** @brief LDMA initialization configuration structure. */
-typedef struct
-{
+typedef struct {
uint8_t ldmaInitCtrlNumFixed; /**< Arbitration mode separator.*/
uint8_t ldmaInitCtrlSyncPrsClrEn; /**< PRS Synctrig clear enable. */
uint8_t ldmaInitCtrlSyncPrsSetEn; /**< PRS Synctrig set enable. */
@@ -561,8 +706,7 @@
* @details
* This struct configures all aspects of a DMA transfer.
*/
-typedef struct
-{
+typedef struct {
uint32_t ldmaReqSel; /**< Selects DMA trigger source. */
uint8_t ldmaCtrlSyncPrsClrOff; /**< PRS Synctrig clear enables to clear. */
uint8_t ldmaCtrlSyncPrsClrOn; /**< PRS Synctrig clear enables to set. */
@@ -576,65 +720,63 @@
uint8_t ldmaLoopCnt; /**< Counter for looped transfers. */
} LDMA_TransferCfg_t;
-
/*******************************************************************************
************************** STRUCT INITIALIZERS ****************************
******************************************************************************/
-
/** @brief Default DMA initialization structure. */
-#define LDMA_INIT_DEFAULT \
-{ \
- .ldmaInitCtrlNumFixed = _LDMA_CTRL_NUMFIXED_DEFAULT, /* Fixed priority arbitration. */ \
- .ldmaInitCtrlSyncPrsClrEn = 0, /* No PRS Synctrig clear enable*/ \
- .ldmaInitCtrlSyncPrsSetEn = 0, /* No PRS Synctrig set enable. */ \
- .ldmaInitIrqPriority = 3 /* IRQ priority level 3. */ \
-}
+#define LDMA_INIT_DEFAULT \
+ { \
+ .ldmaInitCtrlNumFixed = _LDMA_CTRL_NUMFIXED_DEFAULT,/* Fixed priority arbitration.*/ \
+ .ldmaInitCtrlSyncPrsClrEn = 0, /* No PRS Synctrig clear enable*/ \
+ .ldmaInitCtrlSyncPrsSetEn = 0, /* No PRS Synctrig set enable. */ \
+ .ldmaInitIrqPriority = 3 /* IRQ priority level 3. */ \
+ }
/**
* @brief
* Generic DMA transfer configuration for memory to memory transfers.
*/
-#define LDMA_TRANSFER_CFG_MEMORY() \
-{ \
- 0, 0, 0, 0, 0, \
- false, false, ldmaCfgArbSlotsAs1, \
- ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, 0 \
-}
+#define LDMA_TRANSFER_CFG_MEMORY() \
+ { \
+ 0, 0, 0, 0, 0, \
+ false, false, ldmaCfgArbSlotsAs1, \
+ ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, 0 \
+ }
/**
* @brief
* Generic DMA transfer configuration for looped memory to memory transfers.
*/
#define LDMA_TRANSFER_CFG_MEMORY_LOOP(loopCnt) \
-{ \
- 0, 0, 0, 0, 0, \
- false, false, ldmaCfgArbSlotsAs1, \
- ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, \
- loopCnt \
-}
+ { \
+ 0, 0, 0, 0, 0, \
+ false, false, ldmaCfgArbSlotsAs1, \
+ ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, \
+ loopCnt \
+ }
/**
* @brief
* Generic DMA transfer configuration for memory to/from peripheral transfers.
*/
-#define LDMA_TRANSFER_CFG_PERIPHERAL(signal) \
-{ \
- signal, 0, 0, 0, 0, \
- false, false, ldmaCfgArbSlotsAs1, \
- ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, 0 \
-}
+#define LDMA_TRANSFER_CFG_PERIPHERAL(signal) \
+ { \
+ signal, 0, 0, 0, 0, \
+ false, false, ldmaCfgArbSlotsAs1, \
+ ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, 0 \
+ }
/**
* @brief
* Generic DMA transfer configuration for looped memory to/from peripheral transfers.
*/
-#define LDMA_TRANSFER_CFG_PERIPHERAL_LOOP(signal, loopCnt) \
-{ \
- signal, 0, 0, 0, 0, \
- false, false, ldmaCfgArbSlotsAs1, \
- ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, loopCnt \
-}
+#define LDMA_TRANSFER_CFG_PERIPHERAL_LOOP(signal, loopCnt) \
+ { \
+ signal, 0, 0, 0, 0, \
+ false, false, ldmaCfgArbSlotsAs1, \
+ ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, loopCnt \
+ }
/**
* @brief
@@ -643,31 +785,31 @@
* @param[in] dest Destination data address.
* @param[in] count Number of words to transfer.
*/
-#define LDMA_DESCRIPTOR_SINGLE_M2M_WORD(src, dest, count) \
-{ \
- .xfer = \
- { \
- .structType = ldmaCtrlStructTypeXfer, \
- .structReq = 1, \
- .xferCnt = ( count ) - 1, \
- .byteSwap = 0, \
- .blockSize = ldmaCtrlBlockSizeUnit1, \
- .doneIfs = 1, \
- .reqMode = ldmaCtrlReqModeAll, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = ldmaCtrlSrcIncOne, \
- .size = ldmaCtrlSizeWord, \
- .dstInc = ldmaCtrlDstIncOne, \
- .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
- .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
- .srcAddr = (uint32_t)(src), \
- .dstAddr = (uint32_t)(dest), \
- .linkMode = 0, \
- .link = 0, \
- .linkAddr = 0 \
- } \
-}
+#define LDMA_DESCRIPTOR_SINGLE_M2M_WORD(src, dest, count) \
+ { \
+ .xfer = \
+ { \
+ .structType = ldmaCtrlStructTypeXfer, \
+ .structReq = 1, \
+ .xferCnt = (count) - 1, \
+ .byteSwap = 0, \
+ .blockSize = ldmaCtrlBlockSizeUnit1, \
+ .doneIfs = 1, \
+ .reqMode = ldmaCtrlReqModeAll, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = ldmaCtrlSrcIncOne, \
+ .size = ldmaCtrlSizeWord, \
+ .dstInc = ldmaCtrlDstIncOne, \
+ .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
+ .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
+ .srcAddr = (uint32_t)(src), \
+ .dstAddr = (uint32_t)(dest), \
+ .linkMode = 0, \
+ .link = 0, \
+ .linkAddr = 0 \
+ } \
+ }
/**
* @brief
@@ -676,31 +818,31 @@
* @param[in] dest Destination data address.
* @param[in] count Number of half-words to transfer.
*/
-#define LDMA_DESCRIPTOR_SINGLE_M2M_HALF(src, dest, count) \
-{ \
- .xfer = \
- { \
- .structType = ldmaCtrlStructTypeXfer, \
- .structReq = 1, \
- .xferCnt = ( count ) - 1, \
- .byteSwap = 0, \
- .blockSize = ldmaCtrlBlockSizeUnit1, \
- .doneIfs = 1, \
- .reqMode = ldmaCtrlReqModeAll, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = ldmaCtrlSrcIncOne, \
- .size = ldmaCtrlSizeHalf, \
- .dstInc = ldmaCtrlDstIncOne, \
- .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
- .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
- .srcAddr = (uint32_t)(src), \
- .dstAddr = (uint32_t)(dest), \
- .linkMode = 0, \
- .link = 0, \
- .linkAddr = 0 \
- } \
-}
+#define LDMA_DESCRIPTOR_SINGLE_M2M_HALF(src, dest, count) \
+ { \
+ .xfer = \
+ { \
+ .structType = ldmaCtrlStructTypeXfer, \
+ .structReq = 1, \
+ .xferCnt = (count) - 1, \
+ .byteSwap = 0, \
+ .blockSize = ldmaCtrlBlockSizeUnit1, \
+ .doneIfs = 1, \
+ .reqMode = ldmaCtrlReqModeAll, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = ldmaCtrlSrcIncOne, \
+ .size = ldmaCtrlSizeHalf, \
+ .dstInc = ldmaCtrlDstIncOne, \
+ .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
+ .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
+ .srcAddr = (uint32_t)(src), \
+ .dstAddr = (uint32_t)(dest), \
+ .linkMode = 0, \
+ .link = 0, \
+ .linkAddr = 0 \
+ } \
+ }
/**
* @brief
@@ -709,31 +851,31 @@
* @param[in] dest Destination data address.
* @param[in] count Number of bytes to transfer.
*/
-#define LDMA_DESCRIPTOR_SINGLE_M2M_BYTE(src, dest, count) \
-{ \
- .xfer = \
- { \
- .structType = ldmaCtrlStructTypeXfer, \
- .structReq = 1, \
- .xferCnt = (count) - 1, \
- .byteSwap = 0, \
- .blockSize = ldmaCtrlBlockSizeUnit1, \
- .doneIfs = 1, \
- .reqMode = ldmaCtrlReqModeAll, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = ldmaCtrlSrcIncOne, \
- .size = ldmaCtrlSizeByte, \
- .dstInc = ldmaCtrlDstIncOne, \
- .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
- .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
- .srcAddr = (uint32_t)(src), \
- .dstAddr = (uint32_t)(dest), \
- .linkMode = 0, \
- .link = 0, \
- .linkAddr = 0 \
- } \
-}
+#define LDMA_DESCRIPTOR_SINGLE_M2M_BYTE(src, dest, count) \
+ { \
+ .xfer = \
+ { \
+ .structType = ldmaCtrlStructTypeXfer, \
+ .structReq = 1, \
+ .xferCnt = (count) - 1, \
+ .byteSwap = 0, \
+ .blockSize = ldmaCtrlBlockSizeUnit1, \
+ .doneIfs = 1, \
+ .reqMode = ldmaCtrlReqModeAll, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = ldmaCtrlSrcIncOne, \
+ .size = ldmaCtrlSizeByte, \
+ .dstInc = ldmaCtrlDstIncOne, \
+ .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
+ .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
+ .srcAddr = (uint32_t)(src), \
+ .dstAddr = (uint32_t)(dest), \
+ .linkMode = 0, \
+ .link = 0, \
+ .linkAddr = 0 \
+ } \
+ }
/**
* @brief
@@ -747,31 +889,31 @@
* @param[in] dest Destination data address.
* @param[in] count Number of words to transfer.
*/
-#define LDMA_DESCRIPTOR_LINKABS_M2M_WORD(src, dest, count) \
-{ \
- .xfer = \
- { \
- .structType = ldmaCtrlStructTypeXfer, \
- .structReq = 1, \
- .xferCnt = (count) - 1, \
- .byteSwap = 0, \
- .blockSize = ldmaCtrlBlockSizeUnit1, \
- .doneIfs = 0, \
- .reqMode = ldmaCtrlReqModeAll, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = ldmaCtrlSrcIncOne, \
- .size = ldmaCtrlSizeWord, \
- .dstInc = ldmaCtrlDstIncOne, \
- .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
- .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
- .srcAddr = (uint32_t)(src), \
- .dstAddr = (uint32_t)(dest), \
- .linkMode = ldmaLinkModeAbs, \
- .link = 1, \
- .linkAddr = 0 /* Must be set runtime ! */ \
- } \
-}
+#define LDMA_DESCRIPTOR_LINKABS_M2M_WORD(src, dest, count) \
+ { \
+ .xfer = \
+ { \
+ .structType = ldmaCtrlStructTypeXfer, \
+ .structReq = 1, \
+ .xferCnt = (count) - 1, \
+ .byteSwap = 0, \
+ .blockSize = ldmaCtrlBlockSizeUnit1, \
+ .doneIfs = 0, \
+ .reqMode = ldmaCtrlReqModeAll, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = ldmaCtrlSrcIncOne, \
+ .size = ldmaCtrlSizeWord, \
+ .dstInc = ldmaCtrlDstIncOne, \
+ .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
+ .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
+ .srcAddr = (uint32_t)(src), \
+ .dstAddr = (uint32_t)(dest), \
+ .linkMode = ldmaLinkModeAbs, \
+ .link = 1, \
+ .linkAddr = 0 /* Must be set runtime ! */ \
+ } \
+ }
/**
* @brief
@@ -785,31 +927,31 @@
* @param[in] dest Destination data address.
* @param[in] count Number of half-words to transfer.
*/
-#define LDMA_DESCRIPTOR_LINKABS_M2M_HALF(src, dest, count) \
-{ \
- .xfer = \
- { \
- .structType = ldmaCtrlStructTypeXfer, \
- .structReq = 1, \
- .xferCnt = (count) - 1, \
- .byteSwap = 0, \
- .blockSize = ldmaCtrlBlockSizeUnit1, \
- .doneIfs = 0, \
- .reqMode = ldmaCtrlReqModeAll, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = ldmaCtrlSrcIncOne, \
- .size = ldmaCtrlSizeHalf, \
- .dstInc = ldmaCtrlDstIncOne, \
- .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
- .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
- .srcAddr = (uint32_t)(src), \
- .dstAddr = (uint32_t)(dest), \
- .linkMode = ldmaLinkModeAbs, \
- .link = 1, \
- .linkAddr = 0 /* Must be set runtime ! */ \
- } \
-}
+#define LDMA_DESCRIPTOR_LINKABS_M2M_HALF(src, dest, count) \
+ { \
+ .xfer = \
+ { \
+ .structType = ldmaCtrlStructTypeXfer, \
+ .structReq = 1, \
+ .xferCnt = (count) - 1, \
+ .byteSwap = 0, \
+ .blockSize = ldmaCtrlBlockSizeUnit1, \
+ .doneIfs = 0, \
+ .reqMode = ldmaCtrlReqModeAll, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = ldmaCtrlSrcIncOne, \
+ .size = ldmaCtrlSizeHalf, \
+ .dstInc = ldmaCtrlDstIncOne, \
+ .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
+ .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
+ .srcAddr = (uint32_t)(src), \
+ .dstAddr = (uint32_t)(dest), \
+ .linkMode = ldmaLinkModeAbs, \
+ .link = 1, \
+ .linkAddr = 0 /* Must be set runtime ! */ \
+ } \
+ }
/**
* @brief
@@ -823,31 +965,31 @@
* @param[in] dest Destination data address.
* @param[in] count Number of bytes to transfer.
*/
-#define LDMA_DESCRIPTOR_LINKABS_M2M_BYTE(src, dest, count) \
-{ \
- .xfer = \
- { \
- .structType = ldmaCtrlStructTypeXfer, \
- .structReq = 1, \
- .xferCnt = (count) - 1, \
- .byteSwap = 0, \
- .blockSize = ldmaCtrlBlockSizeUnit1, \
- .doneIfs = 0, \
- .reqMode = ldmaCtrlReqModeAll, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = ldmaCtrlSrcIncOne, \
- .size = ldmaCtrlSizeByte, \
- .dstInc = ldmaCtrlDstIncOne, \
- .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
- .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
- .srcAddr = (uint32_t)(src), \
- .dstAddr = (uint32_t)(dest), \
- .linkMode = ldmaLinkModeAbs, \
- .link = 1, \
- .linkAddr = 0 /* Must be set runtime ! */ \
- } \
-}
+#define LDMA_DESCRIPTOR_LINKABS_M2M_BYTE(src, dest, count) \
+ { \
+ .xfer = \
+ { \
+ .structType = ldmaCtrlStructTypeXfer, \
+ .structReq = 1, \
+ .xferCnt = (count) - 1, \
+ .byteSwap = 0, \
+ .blockSize = ldmaCtrlBlockSizeUnit1, \
+ .doneIfs = 0, \
+ .reqMode = ldmaCtrlReqModeAll, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = ldmaCtrlSrcIncOne, \
+ .size = ldmaCtrlSizeByte, \
+ .dstInc = ldmaCtrlDstIncOne, \
+ .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
+ .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
+ .srcAddr = (uint32_t)(src), \
+ .dstAddr = (uint32_t)(dest), \
+ .linkMode = ldmaLinkModeAbs, \
+ .link = 1, \
+ .linkAddr = 0 /* Must be set runtime ! */ \
+ } \
+ }
/**
* @brief
@@ -867,31 +1009,31 @@
* 0=one this descriptor,
* -1=one descriptor back in memory.
*/
-#define LDMA_DESCRIPTOR_LINKREL_M2M_WORD(src, dest, count, linkjmp) \
-{ \
- .xfer = \
- { \
- .structType = ldmaCtrlStructTypeXfer, \
- .structReq = 1, \
- .xferCnt = (count) - 1, \
- .byteSwap = 0, \
- .blockSize = ldmaCtrlBlockSizeUnit1, \
- .doneIfs = 0, \
- .reqMode = ldmaCtrlReqModeAll, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = ldmaCtrlSrcIncOne, \
- .size = ldmaCtrlSizeWord, \
- .dstInc = ldmaCtrlDstIncOne, \
- .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
- .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
- .srcAddr = (uint32_t)(src), \
- .dstAddr = (uint32_t)(dest), \
- .linkMode = ldmaLinkModeRel, \
- .link = 1, \
- .linkAddr = (linkjmp) * 4 \
- } \
-}
+#define LDMA_DESCRIPTOR_LINKREL_M2M_WORD(src, dest, count, linkjmp) \
+ { \
+ .xfer = \
+ { \
+ .structType = ldmaCtrlStructTypeXfer, \
+ .structReq = 1, \
+ .xferCnt = (count) - 1, \
+ .byteSwap = 0, \
+ .blockSize = ldmaCtrlBlockSizeUnit1, \
+ .doneIfs = 0, \
+ .reqMode = ldmaCtrlReqModeAll, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = ldmaCtrlSrcIncOne, \
+ .size = ldmaCtrlSizeWord, \
+ .dstInc = ldmaCtrlDstIncOne, \
+ .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
+ .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
+ .srcAddr = (uint32_t)(src), \
+ .dstAddr = (uint32_t)(dest), \
+ .linkMode = ldmaLinkModeRel, \
+ .link = 1, \
+ .linkAddr = (linkjmp) * 4 \
+ } \
+ }
/**
* @brief
@@ -911,31 +1053,31 @@
* 0=one this descriptor,
* -1=one descriptor back in memory.
*/
-#define LDMA_DESCRIPTOR_LINKREL_M2M_HALF(src, dest, count, linkjmp) \
-{ \
- .xfer = \
- { \
- .structType = ldmaCtrlStructTypeXfer, \
- .structReq = 1, \
- .xferCnt = (count) - 1, \
- .byteSwap = 0, \
- .blockSize = ldmaCtrlBlockSizeUnit1, \
- .doneIfs = 0, \
- .reqMode = ldmaCtrlReqModeAll, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = ldmaCtrlSrcIncOne, \
- .size = ldmaCtrlSizeHalf, \
- .dstInc = ldmaCtrlDstIncOne, \
- .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
- .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
- .srcAddr = (uint32_t)(src), \
- .dstAddr = (uint32_t)(dest), \
- .linkMode = ldmaLinkModeRel, \
- .link = 1, \
- .linkAddr = (linkjmp) * 4 \
- } \
-}
+#define LDMA_DESCRIPTOR_LINKREL_M2M_HALF(src, dest, count, linkjmp) \
+ { \
+ .xfer = \
+ { \
+ .structType = ldmaCtrlStructTypeXfer, \
+ .structReq = 1, \
+ .xferCnt = (count) - 1, \
+ .byteSwap = 0, \
+ .blockSize = ldmaCtrlBlockSizeUnit1, \
+ .doneIfs = 0, \
+ .reqMode = ldmaCtrlReqModeAll, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = ldmaCtrlSrcIncOne, \
+ .size = ldmaCtrlSizeHalf, \
+ .dstInc = ldmaCtrlDstIncOne, \
+ .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
+ .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
+ .srcAddr = (uint32_t)(src), \
+ .dstAddr = (uint32_t)(dest), \
+ .linkMode = ldmaLinkModeRel, \
+ .link = 1, \
+ .linkAddr = (linkjmp) * 4 \
+ } \
+ }
/**
* @brief
@@ -955,31 +1097,31 @@
* 0=one this descriptor,
* -1=one descriptor back in memory.
*/
-#define LDMA_DESCRIPTOR_LINKREL_M2M_BYTE(src, dest, count, linkjmp) \
-{ \
- .xfer = \
- { \
- .structType = ldmaCtrlStructTypeXfer, \
- .structReq = 1, \
- .xferCnt = (count) - 1, \
- .byteSwap = 0, \
- .blockSize = ldmaCtrlBlockSizeUnit1, \
- .doneIfs = 0, \
- .reqMode = ldmaCtrlReqModeAll, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = ldmaCtrlSrcIncOne, \
- .size = ldmaCtrlSizeByte, \
- .dstInc = ldmaCtrlDstIncOne, \
- .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
- .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
- .srcAddr = (uint32_t)(src), \
- .dstAddr = (uint32_t)(dest), \
- .linkMode = ldmaLinkModeRel, \
- .link = 1, \
- .linkAddr = (linkjmp) * 4 \
- } \
-}
+#define LDMA_DESCRIPTOR_LINKREL_M2M_BYTE(src, dest, count, linkjmp) \
+ { \
+ .xfer = \
+ { \
+ .structType = ldmaCtrlStructTypeXfer, \
+ .structReq = 1, \
+ .xferCnt = (count) - 1, \
+ .byteSwap = 0, \
+ .blockSize = ldmaCtrlBlockSizeUnit1, \
+ .doneIfs = 0, \
+ .reqMode = ldmaCtrlReqModeAll, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = ldmaCtrlSrcIncOne, \
+ .size = ldmaCtrlSizeByte, \
+ .dstInc = ldmaCtrlDstIncOne, \
+ .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
+ .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
+ .srcAddr = (uint32_t)(src), \
+ .dstAddr = (uint32_t)(dest), \
+ .linkMode = ldmaLinkModeRel, \
+ .link = 1, \
+ .linkAddr = (linkjmp) * 4 \
+ } \
+ }
/**
* @brief
@@ -988,31 +1130,31 @@
* @param[in] dest Destination data address.
* @param[in] count Number of bytes to transfer.
*/
-#define LDMA_DESCRIPTOR_SINGLE_P2M_BYTE(src, dest, count) \
-{ \
- .xfer = \
- { \
- .structType = ldmaCtrlStructTypeXfer, \
- .structReq = 0, \
- .xferCnt = (count) - 1, \
- .byteSwap = 0, \
- .blockSize = ldmaCtrlBlockSizeUnit1, \
- .doneIfs = 1, \
- .reqMode = ldmaCtrlReqModeBlock, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = ldmaCtrlSrcIncNone, \
- .size = ldmaCtrlSizeByte, \
- .dstInc = ldmaCtrlDstIncOne, \
- .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
- .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
- .srcAddr = (uint32_t)(src), \
- .dstAddr = (uint32_t)(dest), \
- .linkMode = 0, \
- .link = 0, \
- .linkAddr = 0 \
- } \
-}
+#define LDMA_DESCRIPTOR_SINGLE_P2M_BYTE(src, dest, count) \
+ { \
+ .xfer = \
+ { \
+ .structType = ldmaCtrlStructTypeXfer, \
+ .structReq = 0, \
+ .xferCnt = (count) - 1, \
+ .byteSwap = 0, \
+ .blockSize = ldmaCtrlBlockSizeUnit1, \
+ .doneIfs = 1, \
+ .reqMode = ldmaCtrlReqModeBlock, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = ldmaCtrlSrcIncNone, \
+ .size = ldmaCtrlSizeByte, \
+ .dstInc = ldmaCtrlDstIncOne, \
+ .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
+ .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
+ .srcAddr = (uint32_t)(src), \
+ .dstAddr = (uint32_t)(dest), \
+ .linkMode = 0, \
+ .link = 0, \
+ .linkAddr = 0 \
+ } \
+ }
/**
* @brief
@@ -1021,31 +1163,31 @@
* @param[in] dest Peripheral data destination register address.
* @param[in] count Number of bytes to transfer.
*/
-#define LDMA_DESCRIPTOR_SINGLE_P2P_BYTE(src, dest, count) \
-{ \
- .xfer = \
- { \
- .structType = ldmaCtrlStructTypeXfer, \
- .structReq = 0, \
- .xferCnt = (count) - 1, \
- .byteSwap = 0, \
- .blockSize = ldmaCtrlBlockSizeUnit1, \
- .doneIfs = 1, \
- .reqMode = ldmaCtrlReqModeBlock, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = ldmaCtrlSrcIncNone, \
- .size = ldmaCtrlSizeByte, \
- .dstInc = ldmaCtrlDstIncNone, \
- .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
- .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
- .srcAddr = (uint32_t)(src), \
- .dstAddr = (uint32_t)(dest), \
- .linkMode = 0, \
- .link = 0, \
- .linkAddr = 0 \
- } \
-}
+#define LDMA_DESCRIPTOR_SINGLE_P2P_BYTE(src, dest, count) \
+ { \
+ .xfer = \
+ { \
+ .structType = ldmaCtrlStructTypeXfer, \
+ .structReq = 0, \
+ .xferCnt = (count) - 1, \
+ .byteSwap = 0, \
+ .blockSize = ldmaCtrlBlockSizeUnit1, \
+ .doneIfs = 1, \
+ .reqMode = ldmaCtrlReqModeBlock, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = ldmaCtrlSrcIncNone, \
+ .size = ldmaCtrlSizeByte, \
+ .dstInc = ldmaCtrlDstIncNone, \
+ .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
+ .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
+ .srcAddr = (uint32_t)(src), \
+ .dstAddr = (uint32_t)(dest), \
+ .linkMode = 0, \
+ .link = 0, \
+ .linkAddr = 0 \
+ } \
+ }
/**
* @brief
@@ -1054,31 +1196,31 @@
* @param[in] dest Peripheral data register destination address.
* @param[in] count Number of bytes to transfer.
*/
-#define LDMA_DESCRIPTOR_SINGLE_M2P_BYTE(src, dest, count) \
-{ \
- .xfer = \
- { \
- .structType = ldmaCtrlStructTypeXfer, \
- .structReq = 0, \
- .xferCnt = (count) - 1, \
- .byteSwap = 0, \
- .blockSize = ldmaCtrlBlockSizeUnit1, \
- .doneIfs = 1, \
- .reqMode = ldmaCtrlReqModeBlock, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = ldmaCtrlSrcIncOne, \
- .size = ldmaCtrlSizeByte, \
- .dstInc = ldmaCtrlDstIncNone, \
- .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
- .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
- .srcAddr = (uint32_t)(src), \
- .dstAddr = (uint32_t)(dest), \
- .linkMode = 0, \
- .link = 0, \
- .linkAddr = 0 \
- } \
-}
+#define LDMA_DESCRIPTOR_SINGLE_M2P_BYTE(src, dest, count) \
+ { \
+ .xfer = \
+ { \
+ .structType = ldmaCtrlStructTypeXfer, \
+ .structReq = 0, \
+ .xferCnt = (count) - 1, \
+ .byteSwap = 0, \
+ .blockSize = ldmaCtrlBlockSizeUnit1, \
+ .doneIfs = 1, \
+ .reqMode = ldmaCtrlReqModeBlock, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = ldmaCtrlSrcIncOne, \
+ .size = ldmaCtrlSizeByte, \
+ .dstInc = ldmaCtrlDstIncNone, \
+ .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
+ .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
+ .srcAddr = (uint32_t)(src), \
+ .dstAddr = (uint32_t)(dest), \
+ .linkMode = 0, \
+ .link = 0, \
+ .linkAddr = 0 \
+ } \
+ }
/**
* @brief
@@ -1092,31 +1234,31 @@
* 0=one this descriptor,
* -1=one descriptor back in memory.
*/
-#define LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(src, dest, count, linkjmp) \
-{ \
- .xfer = \
- { \
- .structType = ldmaCtrlStructTypeXfer, \
- .structReq = 0, \
- .xferCnt = (count) - 1, \
- .byteSwap = 0, \
- .blockSize = ldmaCtrlBlockSizeUnit1, \
- .doneIfs = 1, \
- .reqMode = ldmaCtrlReqModeBlock, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = ldmaCtrlSrcIncNone, \
- .size = ldmaCtrlSizeByte, \
- .dstInc = ldmaCtrlDstIncOne, \
- .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
- .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
- .srcAddr = (uint32_t)(src), \
- .dstAddr = (uint32_t)(dest), \
- .linkMode = ldmaLinkModeRel, \
- .link = 1, \
- .linkAddr = (linkjmp) * 4 \
- } \
-}
+#define LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(src, dest, count, linkjmp) \
+ { \
+ .xfer = \
+ { \
+ .structType = ldmaCtrlStructTypeXfer, \
+ .structReq = 0, \
+ .xferCnt = (count) - 1, \
+ .byteSwap = 0, \
+ .blockSize = ldmaCtrlBlockSizeUnit1, \
+ .doneIfs = 1, \
+ .reqMode = ldmaCtrlReqModeBlock, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = ldmaCtrlSrcIncNone, \
+ .size = ldmaCtrlSizeByte, \
+ .dstInc = ldmaCtrlDstIncOne, \
+ .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
+ .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
+ .srcAddr = (uint32_t)(src), \
+ .dstAddr = (uint32_t)(dest), \
+ .linkMode = ldmaLinkModeRel, \
+ .link = 1, \
+ .linkAddr = (linkjmp) * 4 \
+ } \
+ }
/**
* @brief
@@ -1130,31 +1272,31 @@
* 0=one this descriptor,
* -1=one descriptor back in memory.
*/
-#define LDMA_DESCRIPTOR_LINKREL_M2P_BYTE(src, dest, count, linkjmp) \
-{ \
- .xfer = \
- { \
- .structType = ldmaCtrlStructTypeXfer, \
- .structReq = 0, \
- .xferCnt = (count) - 1, \
- .byteSwap = 0, \
- .blockSize = ldmaCtrlBlockSizeUnit1, \
- .doneIfs = 1, \
- .reqMode = ldmaCtrlReqModeBlock, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = ldmaCtrlSrcIncOne, \
- .size = ldmaCtrlSizeByte, \
- .dstInc = ldmaCtrlDstIncNone, \
- .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
- .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
- .srcAddr = (uint32_t)(src), \
- .dstAddr = (uint32_t)(dest), \
- .linkMode = ldmaLinkModeRel, \
- .link = 1, \
- .linkAddr = (linkjmp) * 4 \
- } \
-}
+#define LDMA_DESCRIPTOR_LINKREL_M2P_BYTE(src, dest, count, linkjmp) \
+ { \
+ .xfer = \
+ { \
+ .structType = ldmaCtrlStructTypeXfer, \
+ .structReq = 0, \
+ .xferCnt = (count) - 1, \
+ .byteSwap = 0, \
+ .blockSize = ldmaCtrlBlockSizeUnit1, \
+ .doneIfs = 1, \
+ .reqMode = ldmaCtrlReqModeBlock, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = ldmaCtrlSrcIncOne, \
+ .size = ldmaCtrlSizeByte, \
+ .dstInc = ldmaCtrlDstIncNone, \
+ .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
+ .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
+ .srcAddr = (uint32_t)(src), \
+ .dstAddr = (uint32_t)(dest), \
+ .linkMode = ldmaLinkModeRel, \
+ .link = 1, \
+ .linkAddr = (linkjmp) * 4 \
+ } \
+ }
/**
* @brief
@@ -1162,31 +1304,31 @@
* @param[in] value Immediate value to write.
* @param[in] address Write sddress.
*/
-#define LDMA_DESCRIPTOR_SINGLE_WRITE(value, address) \
-{ \
- .wri = \
- { \
- .structType = ldmaCtrlStructTypeWrite, \
- .structReq = 1, \
- .xferCnt = 0, \
- .byteSwap = 0, \
- .blockSize = 0, \
- .doneIfs = 1, \
- .reqMode = 0, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = 0, \
- .size = 0, \
- .dstInc = 0, \
- .srcAddrMode = 0, \
- .dstAddrMode = 0, \
- .immVal = (value), \
- .dstAddr = (uint32_t)(address), \
- .linkMode = 0, \
- .link = 0, \
- .linkAddr = 0 \
- } \
-}
+#define LDMA_DESCRIPTOR_SINGLE_WRITE(value, address) \
+ { \
+ .wri = \
+ { \
+ .structType = ldmaCtrlStructTypeWrite, \
+ .structReq = 1, \
+ .xferCnt = 0, \
+ .byteSwap = 0, \
+ .blockSize = 0, \
+ .doneIfs = 1, \
+ .reqMode = 0, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = 0, \
+ .size = 0, \
+ .dstInc = 0, \
+ .srcAddrMode = 0, \
+ .dstAddrMode = 0, \
+ .immVal = (value), \
+ .dstAddr = (uint32_t)(address), \
+ .linkMode = 0, \
+ .link = 0, \
+ .linkAddr = 0 \
+ } \
+ }
/**
* @brief
@@ -1199,31 +1341,31 @@
* @param[in] value Immediate value to write.
* @param[in] address Write sddress.
*/
-#define LDMA_DESCRIPTOR_LINKABS_WRITE(value, address) \
-{ \
- .wri = \
- { \
- .structType = ldmaCtrlStructTypeWrite, \
- .structReq = 1, \
- .xferCnt = 0, \
- .byteSwap = 0, \
- .blockSize = 0, \
- .doneIfs = 0, \
- .reqMode = 0, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = 0, \
- .size = 0, \
- .dstInc = 0, \
- .srcAddrMode = 0, \
- .dstAddrMode = 0, \
- .immVal = (value), \
- .dstAddr = (uint32_t)(address), \
- .linkMode = ldmaLinkModeAbs, \
- .link = 1, \
- .linkAddr = 0 /* Must be set runtime ! */ \
- } \
-}
+#define LDMA_DESCRIPTOR_LINKABS_WRITE(value, address) \
+ { \
+ .wri = \
+ { \
+ .structType = ldmaCtrlStructTypeWrite, \
+ .structReq = 1, \
+ .xferCnt = 0, \
+ .byteSwap = 0, \
+ .blockSize = 0, \
+ .doneIfs = 0, \
+ .reqMode = 0, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = 0, \
+ .size = 0, \
+ .dstInc = 0, \
+ .srcAddrMode = 0, \
+ .dstAddrMode = 0, \
+ .immVal = (value), \
+ .dstAddr = (uint32_t)(address), \
+ .linkMode = ldmaLinkModeAbs, \
+ .link = 1, \
+ .linkAddr = 0 /* Must be set runtime ! */ \
+ } \
+ }
/**
* @brief
@@ -1236,31 +1378,31 @@
* 0=one this descriptor,
* -1=one descriptor back in memory.
*/
-#define LDMA_DESCRIPTOR_LINKREL_WRITE(value, address, linkjmp) \
-{ \
- .wri = \
- { \
- .structType = ldmaCtrlStructTypeWrite, \
- .structReq = 1, \
- .xferCnt = 0, \
- .byteSwap = 0, \
- .blockSize = 0, \
- .doneIfs = 0, \
- .reqMode = 0, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = 0, \
- .size = 0, \
- .dstInc = 0, \
- .srcAddrMode = 0, \
- .dstAddrMode = 0, \
- .immVal = (value), \
- .dstAddr = (uint32_t)(address), \
- .linkMode = ldmaLinkModeRel, \
- .link = 1, \
- .linkAddr = (linkjmp) * 4 \
- } \
-}
+#define LDMA_DESCRIPTOR_LINKREL_WRITE(value, address, linkjmp) \
+ { \
+ .wri = \
+ { \
+ .structType = ldmaCtrlStructTypeWrite, \
+ .structReq = 1, \
+ .xferCnt = 0, \
+ .byteSwap = 0, \
+ .blockSize = 0, \
+ .doneIfs = 0, \
+ .reqMode = 0, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = 0, \
+ .size = 0, \
+ .dstInc = 0, \
+ .srcAddrMode = 0, \
+ .dstAddrMode = 0, \
+ .immVal = (value), \
+ .dstAddr = (uint32_t)(address), \
+ .linkMode = ldmaLinkModeRel, \
+ .link = 1, \
+ .linkAddr = (linkjmp) * 4 \
+ } \
+ }
/**
* @brief
@@ -1270,33 +1412,33 @@
* @param[in] matchValue Sync pattern to match.
* @param[in] matchEnable Sync pattern bits to enable for match.
*/
-#define LDMA_DESCRIPTOR_SINGLE_SYNC(set, clr, matchValue, matchEnable) \
-{ \
- .sync = \
- { \
- .structType = ldmaCtrlStructTypeSync, \
- .structReq = 1, \
- .xferCnt = 0, \
- .byteSwap = 0, \
- .blockSize = 0, \
- .doneIfs = 1, \
- .reqMode = 0, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = 0, \
- .size = 0, \
- .dstInc = 0, \
- .srcAddrMode = 0, \
- .dstAddrMode = 0, \
- .syncSet = (set), \
- .syncClr = (clr), \
- .matchVal = (matchValue), \
- .matchEn = (matchEnable), \
- .linkMode = 0, \
- .link = 0, \
- .linkAddr = 0 \
- } \
-}
+#define LDMA_DESCRIPTOR_SINGLE_SYNC(set, clr, matchValue, matchEnable) \
+ { \
+ .sync = \
+ { \
+ .structType = ldmaCtrlStructTypeSync, \
+ .structReq = 1, \
+ .xferCnt = 0, \
+ .byteSwap = 0, \
+ .blockSize = 0, \
+ .doneIfs = 1, \
+ .reqMode = 0, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = 0, \
+ .size = 0, \
+ .dstInc = 0, \
+ .srcAddrMode = 0, \
+ .dstAddrMode = 0, \
+ .syncSet = (set), \
+ .syncClr = (clr), \
+ .matchVal = (matchValue), \
+ .matchEn = (matchEnable), \
+ .linkMode = 0, \
+ .link = 0, \
+ .linkAddr = 0 \
+ } \
+ }
/**
* @brief
@@ -1311,33 +1453,33 @@
* @param[in] matchValue Sync pattern to match.
* @param[in] matchEnable Sync pattern bits to enable for match.
*/
-#define LDMA_DESCRIPTOR_LINKABS_SYNC(set, clr, matchValue, matchEnable) \
-{ \
- .sync = \
- { \
- .structType = ldmaCtrlStructTypeSync, \
- .structReq = 1, \
- .xferCnt = 0, \
- .byteSwap = 0, \
- .blockSize = 0, \
- .doneIfs = 0, \
- .reqMode = 0, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = 0, \
- .size = 0, \
- .dstInc = 0, \
- .srcAddrMode = 0, \
- .dstAddrMode = 0, \
- .syncSet = (set), \
- .syncClr = (clr), \
- .matchVal = (matchValue), \
- .matchEn = (matchEnable), \
- .linkMode = ldmaLinkModeAbs, \
- .link = 1, \
- .linkAddr = 0 /* Must be set runtime ! */ \
- } \
-}
+#define LDMA_DESCRIPTOR_LINKABS_SYNC(set, clr, matchValue, matchEnable) \
+ { \
+ .sync = \
+ { \
+ .structType = ldmaCtrlStructTypeSync, \
+ .structReq = 1, \
+ .xferCnt = 0, \
+ .byteSwap = 0, \
+ .blockSize = 0, \
+ .doneIfs = 0, \
+ .reqMode = 0, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = 0, \
+ .size = 0, \
+ .dstInc = 0, \
+ .srcAddrMode = 0, \
+ .dstAddrMode = 0, \
+ .syncSet = (set), \
+ .syncClr = (clr), \
+ .matchVal = (matchValue), \
+ .matchEn = (matchEnable), \
+ .linkMode = ldmaLinkModeAbs, \
+ .link = 1, \
+ .linkAddr = 0 /* Must be set runtime ! */ \
+ } \
+ }
/**
* @brief
@@ -1353,32 +1495,32 @@
* -1=one descriptor back in memory.
*/
#define LDMA_DESCRIPTOR_LINKREL_SYNC(set, clr, matchValue, matchEnable, linkjmp) \
-{ \
- .sync = \
{ \
- .structType = ldmaCtrlStructTypeSync, \
- .structReq = 1, \
- .xferCnt = 0, \
- .byteSwap = 0, \
- .blockSize = 0, \
- .doneIfs = 0, \
- .reqMode = 0, \
- .decLoopCnt = 0, \
- .ignoreSrec = 0, \
- .srcInc = 0, \
- .size = 0, \
- .dstInc = 0, \
- .srcAddrMode = 0, \
- .dstAddrMode = 0, \
- .syncSet = (set), \
- .syncClr = (clr), \
- .matchVal = (matchValue), \
- .matchEn = (matchEnable), \
- .linkMode = ldmaLinkModeRel, \
- .link = 1, \
- .linkAddr = (linkjmp) * 4 \
- } \
-}
+ .sync = \
+ { \
+ .structType = ldmaCtrlStructTypeSync, \
+ .structReq = 1, \
+ .xferCnt = 0, \
+ .byteSwap = 0, \
+ .blockSize = 0, \
+ .doneIfs = 0, \
+ .reqMode = 0, \
+ .decLoopCnt = 0, \
+ .ignoreSrec = 0, \
+ .srcInc = 0, \
+ .size = 0, \
+ .dstInc = 0, \
+ .srcAddrMode = 0, \
+ .dstAddrMode = 0, \
+ .syncSet = (set), \
+ .syncClr = (clr), \
+ .matchVal = (matchValue), \
+ .matchEn = (matchEnable), \
+ .linkMode = ldmaLinkModeRel, \
+ .link = 1, \
+ .linkAddr = (linkjmp) * 4 \
+ } \
+ }
/*******************************************************************************
***************************** PROTOTYPES **********************************
@@ -1394,7 +1536,6 @@
bool LDMA_TransferDone(int ch);
uint32_t LDMA_TransferRemainingCount(int ch);
-
/***************************************************************************//**
* @brief
* Clear one or more pending LDMA interrupts.
@@ -1409,7 +1550,6 @@
LDMA->IFC = flags;
}
-
/***************************************************************************//**
* @brief
* Disable one or more LDMA interrupts.
@@ -1424,7 +1564,6 @@
LDMA->IEN &= ~flags;
}
-
/***************************************************************************//**
* @brief
* Enable one or more LDMA interrupts.
@@ -1444,7 +1583,6 @@
LDMA->IEN |= flags;
}
-
/***************************************************************************//**
* @brief
* Get pending LDMA interrupt flags.
@@ -1462,7 +1600,6 @@
return LDMA->IF;
}
-
/***************************************************************************//**
* @brief
* Get enabled and pending LDMA interrupt flags.
@@ -1485,7 +1622,6 @@
return LDMA->IF & ien;
}
-
/***************************************************************************//**
* @brief
* Set one or more pending LDMA interrupts
