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Diff: TARGET_NUCLEO_L496ZG_P/TOOLCHAIN_GCC_ARM/core_cm3.h
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
--- a/TARGET_NUCLEO_L496ZG_P/TOOLCHAIN_GCC_ARM/core_cm3.h Thu Nov 08 11:45:42 2018 +0000 +++ b/TARGET_NUCLEO_L496ZG_P/TOOLCHAIN_GCC_ARM/core_cm3.h Wed Feb 20 20:53:29 2019 +0000 @@ -81,7 +81,7 @@ #endif #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP + #if defined __ARM_FP #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" #endif @@ -668,7 +668,7 @@ #define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ /* Auxiliary Control Register Definitions */ - +#if defined (__CM3_REV) && (__CM3_REV >= 0x200U) #define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ #define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ @@ -677,6 +677,7 @@ #define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ #define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ +#endif /*@} end of group CMSIS_SCnotSCB */