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Diff: TARGET_MAX32620FTHR/TOOLCHAIN_ARM_STD/crc_regs.h
- Revision:
- 171:3a7713b1edbc
- Parent:
- 167:84c0a372a020
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TARGET_MAX32620FTHR/TOOLCHAIN_ARM_STD/crc_regs.h Thu Nov 08 11:45:42 2018 +0000 @@ -0,0 +1,118 @@ +/******************************************************************************* + * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES + * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Except as contained in this notice, the name of Maxim Integrated + * Products, Inc. shall not be used except as stated in the Maxim Integrated + * Products, Inc. Branding Policy. + * + * The mere transfer of this software does not imply any licenses + * of trade secrets, proprietary technology, copyrights, patents, + * trademarks, maskwork rights, or any other form of intellectual + * property whatsoever. Maxim Integrated Products, Inc. retains all + * ownership rights. + * + * $Date: 2016-03-11 11:46:37 -0600 (Fri, 11 Mar 2016) $ + * $Revision: 21839 $ + * + ******************************************************************************/ + +#ifndef _MXC_CRC_REGS_H_ +#define _MXC_CRC_REGS_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> + +/* + If types are not defined elsewhere (CMSIS) define them here +*/ +#ifndef __IO +#define __IO volatile +#endif +#ifndef __I +#define __I volatile const +#endif +#ifndef __O +#define __O volatile +#endif +#ifndef __RO +#define __RO volatile const +#endif + + +/* + Typedefed structure(s) for module registers (per instance or section) with direct 32-bit + access to each register in module. +*/ + +/* Offset Register Description + ============= ============================================================================ */ +typedef struct { + __IO uint32_t reseed; /* 0x0000 CRC-16/CRC-32 Reseed Controls */ + __IO uint32_t seed16; /* 0x0004 Reseed Value for CRC-16 Calculations */ + __IO uint32_t seed32; /* 0x0008 Reseed Value for CRC-32 Calculations */ +} mxc_crc_regs_t; + + +/* Offset Register Description + ============= ============================================================================ */ +typedef struct { + __IO uint32_t value16[512]; /* 0x0000-0x07FC Write Next CRC-16 Data Value / Read CRC-16 Result Value */ + __IO uint32_t value32[512]; /* 0x0800-0x0FFC Write Next CRC-32 Data Value / Read CRC-32 Result Value */ +} mxc_crc_data_regs_t; + + +/* + Register offsets for module CRC. +*/ + +#define MXC_R_CRC_OFFS_RESEED ((uint32_t)0x00000000UL) +#define MXC_R_CRC_OFFS_SEED16 ((uint32_t)0x00000004UL) +#define MXC_R_CRC_OFFS_SEED32 ((uint32_t)0x00000008UL) +#define MXC_R_CRC_DATA_OFFS_VALUE16 ((uint32_t)0x00000000UL) +#define MXC_R_CRC_DATA_OFFS_VALUE32 ((uint32_t)0x00000800UL) + + +/* + Field positions and masks for module CRC. +*/ + +#define MXC_F_CRC_RESEED_CRC16_POS 0 +#define MXC_F_CRC_RESEED_CRC16 ((uint32_t)(0x00000001UL << MXC_F_CRC_RESEED_CRC16_POS)) +#define MXC_F_CRC_RESEED_CRC32_POS 1 +#define MXC_F_CRC_RESEED_CRC32 ((uint32_t)(0x00000001UL << MXC_F_CRC_RESEED_CRC32_POS)) +#define MXC_F_CRC_RESEED_REV_ENDIAN16_POS 4 +#define MXC_F_CRC_RESEED_REV_ENDIAN16 ((uint32_t)(0x00000001UL << MXC_F_CRC_RESEED_REV_ENDIAN16_POS)) +#define MXC_F_CRC_RESEED_REV_ENDIAN32_POS 5 +#define MXC_F_CRC_RESEED_REV_ENDIAN32 ((uint32_t)(0x00000001UL << MXC_F_CRC_RESEED_REV_ENDIAN32_POS)) +#define MXC_F_CRC_RESEED_CCITT_MODE_POS 8 +#define MXC_F_CRC_RESEED_CCITT_MODE ((uint32_t)(0x00000001UL << MXC_F_CRC_RESEED_CCITT_MODE_POS)) + + + +#ifdef __cplusplus +} +#endif + +#endif /* _MXC_CRC_REGS_H_ */ +