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TARGET_EFM32LG_STK3600/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_ldma.h@156:ff21514d8981, 2017-11-08 (annotated)

Committer:
AnnaBridge
Date:
Wed Nov 08 17:18:06 2017 +0000
Revision:
156:ff21514d8981
Child:
159:7130f322cb7e
Reverting back to release 154 of the mbed library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 156:ff21514d8981 1 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 2 * @file em_ldma.h
AnnaBridge 156:ff21514d8981 3 * @brief Direct memory access (LDMA) API
AnnaBridge 156:ff21514d8981 4 * @version 5.1.2
AnnaBridge 156:ff21514d8981 5 *******************************************************************************
AnnaBridge 156:ff21514d8981 6 * @section License
AnnaBridge 156:ff21514d8981 7 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
AnnaBridge 156:ff21514d8981 8 *******************************************************************************
AnnaBridge 156:ff21514d8981 9 *
AnnaBridge 156:ff21514d8981 10 * Permission is granted to anyone to use this software for any purpose,
AnnaBridge 156:ff21514d8981 11 * including commercial applications, and to alter it and redistribute it
AnnaBridge 156:ff21514d8981 12 * freely, subject to the following restrictions:
AnnaBridge 156:ff21514d8981 13 *
AnnaBridge 156:ff21514d8981 14 * 1. The origin of this software must not be misrepresented; you must not
AnnaBridge 156:ff21514d8981 15 * claim that you wrote the original software.@n
AnnaBridge 156:ff21514d8981 16 * 2. Altered source versions must be plainly marked as such, and must not be
AnnaBridge 156:ff21514d8981 17 * misrepresented as being the original software.@n
AnnaBridge 156:ff21514d8981 18 * 3. This notice may not be removed or altered from any source distribution.
AnnaBridge 156:ff21514d8981 19 *
AnnaBridge 156:ff21514d8981 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
AnnaBridge 156:ff21514d8981 21 * obligation to support this Software. Silicon Labs is providing the
AnnaBridge 156:ff21514d8981 22 * Software "AS IS", with no express or implied warranties of any kind,
AnnaBridge 156:ff21514d8981 23 * including, but not limited to, any implied warranties of merchantability
AnnaBridge 156:ff21514d8981 24 * or fitness for any particular purpose or warranties against infringement
AnnaBridge 156:ff21514d8981 25 * of any proprietary rights of a third party.
AnnaBridge 156:ff21514d8981 26 *
AnnaBridge 156:ff21514d8981 27 * Silicon Labs will not be liable for any consequential, incidental, or
AnnaBridge 156:ff21514d8981 28 * special damages, or any other relief, or for any claim by any third party,
AnnaBridge 156:ff21514d8981 29 * arising from your use of this Software.
AnnaBridge 156:ff21514d8981 30 *
AnnaBridge 156:ff21514d8981 31 ******************************************************************************/
AnnaBridge 156:ff21514d8981 32
AnnaBridge 156:ff21514d8981 33 #ifndef EM_LDMA_H
AnnaBridge 156:ff21514d8981 34 #define EM_LDMA_H
AnnaBridge 156:ff21514d8981 35
AnnaBridge 156:ff21514d8981 36 #include "em_device.h"
AnnaBridge 156:ff21514d8981 37
AnnaBridge 156:ff21514d8981 38 #if defined( LDMA_PRESENT ) && ( LDMA_COUNT == 1 )
AnnaBridge 156:ff21514d8981 39
AnnaBridge 156:ff21514d8981 40 #include <stdbool.h>
AnnaBridge 156:ff21514d8981 41
AnnaBridge 156:ff21514d8981 42 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 43 extern "C" {
AnnaBridge 156:ff21514d8981 44 #endif
AnnaBridge 156:ff21514d8981 45
AnnaBridge 156:ff21514d8981 46
AnnaBridge 156:ff21514d8981 47 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 48 * @addtogroup emlib
AnnaBridge 156:ff21514d8981 49 * @{
AnnaBridge 156:ff21514d8981 50 ******************************************************************************/
AnnaBridge 156:ff21514d8981 51
AnnaBridge 156:ff21514d8981 52 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 53 * @addtogroup LDMA
AnnaBridge 156:ff21514d8981 54 * @brief Linked Direct Memory Access (LDMA) Peripheral API
AnnaBridge 156:ff21514d8981 55 *
AnnaBridge 156:ff21514d8981 56 * @details
AnnaBridge 156:ff21514d8981 57 * The LDMA API functions provide full support for the LDMA peripheral.
AnnaBridge 156:ff21514d8981 58 *
AnnaBridge 156:ff21514d8981 59 * The LDMA supports these DMA transfer types:
AnnaBridge 156:ff21514d8981 60 *
AnnaBridge 156:ff21514d8981 61 * @li Memory to memory.
AnnaBridge 156:ff21514d8981 62 * @li Memory to peripheral.
AnnaBridge 156:ff21514d8981 63 * @li Peripheral to memory.
AnnaBridge 156:ff21514d8981 64 * @li Peripheral to peripheral.
AnnaBridge 156:ff21514d8981 65 * @li Constant value to memory.
AnnaBridge 156:ff21514d8981 66 *
AnnaBridge 156:ff21514d8981 67 * The LDMA supports linked lists of DMA descriptors allowing:
AnnaBridge 156:ff21514d8981 68 *
AnnaBridge 156:ff21514d8981 69 * @li Circular and ping-pong buffer transfers.
AnnaBridge 156:ff21514d8981 70 * @li Scatter-gather transfers.
AnnaBridge 156:ff21514d8981 71 * @li Looped transfers.
AnnaBridge 156:ff21514d8981 72 *
AnnaBridge 156:ff21514d8981 73 * The LDMA has some advanced features:
AnnaBridge 156:ff21514d8981 74 *
AnnaBridge 156:ff21514d8981 75 * @li Intra-channel synchronization (SYNC), allowing hardware events to
AnnaBridge 156:ff21514d8981 76 * pause and restart a DMA sequence.
AnnaBridge 156:ff21514d8981 77 * @li Immediate-write (WRI), allowing the DMA to write a constant anywhere
AnnaBridge 156:ff21514d8981 78 * in the memory map.
AnnaBridge 156:ff21514d8981 79 * @li Complex flow control allowing if-else constructs.
AnnaBridge 156:ff21514d8981 80 *
AnnaBridge 156:ff21514d8981 81 * A basic understanding of the LDMA controller is assumed. Please refer to
AnnaBridge 156:ff21514d8981 82 * the reference manual for further details. The LDMA examples described
AnnaBridge 156:ff21514d8981 83 * in the reference manual are particularly helpful in understanding LDMA
AnnaBridge 156:ff21514d8981 84 * operations.
AnnaBridge 156:ff21514d8981 85 *
AnnaBridge 156:ff21514d8981 86 * In order to use the DMA controller, the initialization function @ref
AnnaBridge 156:ff21514d8981 87 * LDMA_Init() must have been executed once (normally during system init).
AnnaBridge 156:ff21514d8981 88 *
AnnaBridge 156:ff21514d8981 89 * DMA transfers are initiated by a call to @ref LDMA_StartTransfer(), the
AnnaBridge 156:ff21514d8981 90 * transfer properties are controlled by the contents of @ref LDMA_TransferCfg_t
AnnaBridge 156:ff21514d8981 91 * and @ref LDMA_Descriptor_t structure parameters.
AnnaBridge 156:ff21514d8981 92 * The @htmlonly LDMA_Descriptor_t @endhtmlonly structure parameter may be a
AnnaBridge 156:ff21514d8981 93 * pointer to an array of descriptors, the descriptors in the array should
AnnaBridge 156:ff21514d8981 94 * be linked together as needed.
AnnaBridge 156:ff21514d8981 95 *
AnnaBridge 156:ff21514d8981 96 * Transfer and descriptor initialization macros are provided for the most common
AnnaBridge 156:ff21514d8981 97 * transfer types. Due to the flexibility of the LDMA peripheral only a small
AnnaBridge 156:ff21514d8981 98 * subset of all possible initializer macros are provided, the user should create
AnnaBridge 156:ff21514d8981 99 * new one's when needed.
AnnaBridge 156:ff21514d8981 100 *
AnnaBridge 156:ff21514d8981 101 * <b> Examples of LDMA usage: </b>
AnnaBridge 156:ff21514d8981 102 *
AnnaBridge 156:ff21514d8981 103 * A simple memory to memory transfer:
AnnaBridge 156:ff21514d8981 104 *
AnnaBridge 156:ff21514d8981 105 * @include em_ldma_single.c
AnnaBridge 156:ff21514d8981 106 *
AnnaBridge 156:ff21514d8981 107 * @n A linked list of three memory to memory transfers:
AnnaBridge 156:ff21514d8981 108 *
AnnaBridge 156:ff21514d8981 109 * @include em_ldma_link_memory.c
AnnaBridge 156:ff21514d8981 110 *
AnnaBridge 156:ff21514d8981 111 * @n DMA from serial port peripheral to memory:
AnnaBridge 156:ff21514d8981 112 *
AnnaBridge 156:ff21514d8981 113 * @include em_ldma_peripheral.c
AnnaBridge 156:ff21514d8981 114 *
AnnaBridge 156:ff21514d8981 115 * @n Ping pong DMA from serial port peripheral to memory:
AnnaBridge 156:ff21514d8981 116 *
AnnaBridge 156:ff21514d8981 117 * @include em_ldma_pingpong.c
AnnaBridge 156:ff21514d8981 118 *
AnnaBridge 156:ff21514d8981 119 * @note The LDMA module does not implement the LDMA interrupt handler. A
AnnaBridge 156:ff21514d8981 120 * template for an LDMA IRQ handler is include here as an example.
AnnaBridge 156:ff21514d8981 121 *
AnnaBridge 156:ff21514d8981 122 * @include em_ldma_irq.c
AnnaBridge 156:ff21514d8981 123 *
AnnaBridge 156:ff21514d8981 124 * @{
AnnaBridge 156:ff21514d8981 125 ******************************************************************************/
AnnaBridge 156:ff21514d8981 126
AnnaBridge 156:ff21514d8981 127 /*******************************************************************************
AnnaBridge 156:ff21514d8981 128 ******************************** ENUMS ************************************
AnnaBridge 156:ff21514d8981 129 ******************************************************************************/
AnnaBridge 156:ff21514d8981 130
AnnaBridge 156:ff21514d8981 131 /**
AnnaBridge 156:ff21514d8981 132 * This value controls the number of unit data transfers per arbitration
AnnaBridge 156:ff21514d8981 133 * cycle, providing a means to balance DMA channels' load on the controller.
AnnaBridge 156:ff21514d8981 134 */
AnnaBridge 156:ff21514d8981 135 typedef enum
AnnaBridge 156:ff21514d8981 136 {
AnnaBridge 156:ff21514d8981 137 ldmaCtrlBlockSizeUnit1 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1, /**< One transfer per arbitration. */
AnnaBridge 156:ff21514d8981 138 ldmaCtrlBlockSizeUnit2 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT2, /**< Two transfers per arbitration. */
AnnaBridge 156:ff21514d8981 139 ldmaCtrlBlockSizeUnit3 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT3, /**< Three transfers per arbitration. */
AnnaBridge 156:ff21514d8981 140 ldmaCtrlBlockSizeUnit4 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT4, /**< Four transfers per arbitration. */
AnnaBridge 156:ff21514d8981 141 ldmaCtrlBlockSizeUnit6 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT6, /**< Six transfers per arbitration. */
AnnaBridge 156:ff21514d8981 142 ldmaCtrlBlockSizeUnit8 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT8, /**< Eight transfers per arbitration. */
AnnaBridge 156:ff21514d8981 143 ldmaCtrlBlockSizeUnit16 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT16, /**< 16 transfers per arbitration. */
AnnaBridge 156:ff21514d8981 144 ldmaCtrlBlockSizeUnit32 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT32, /**< 32 transfers per arbitration. */
AnnaBridge 156:ff21514d8981 145 ldmaCtrlBlockSizeUnit64 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT64, /**< 64 transfers per arbitration. */
AnnaBridge 156:ff21514d8981 146 ldmaCtrlBlockSizeUnit128 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT128, /**< 128 transfers per arbitration. */
AnnaBridge 156:ff21514d8981 147 ldmaCtrlBlockSizeUnit256 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT256, /**< 256 transfers per arbitration. */
AnnaBridge 156:ff21514d8981 148 ldmaCtrlBlockSizeUnit512 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT512, /**< 512 transfers per arbitration. */
AnnaBridge 156:ff21514d8981 149 ldmaCtrlBlockSizeUnit1024 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1024, /**< 1024 transfers per arbitration. */
AnnaBridge 156:ff21514d8981 150 ldmaCtrlBlockSizeAll = _LDMA_CH_CTRL_BLOCKSIZE_ALL /**< Lock arbitration during transfer. */
AnnaBridge 156:ff21514d8981 151 } LDMA_CtrlBlockSize_t;
AnnaBridge 156:ff21514d8981 152
AnnaBridge 156:ff21514d8981 153 /** DMA structure type. */
AnnaBridge 156:ff21514d8981 154 typedef enum
AnnaBridge 156:ff21514d8981 155 {
AnnaBridge 156:ff21514d8981 156 ldmaCtrlStructTypeXfer = _LDMA_CH_CTRL_STRUCTTYPE_TRANSFER, /**< TRANSFER transfer type. */
AnnaBridge 156:ff21514d8981 157 ldmaCtrlStructTypeSync = _LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE, /**< SYNCHRONIZE transfer type. */
AnnaBridge 156:ff21514d8981 158 ldmaCtrlStructTypeWrite = _LDMA_CH_CTRL_STRUCTTYPE_WRITE /**< WRITE transfer type. */
AnnaBridge 156:ff21514d8981 159 } LDMA_CtrlStructType_t;
AnnaBridge 156:ff21514d8981 160
AnnaBridge 156:ff21514d8981 161 /** DMA transfer block or cycle selector. */
AnnaBridge 156:ff21514d8981 162 typedef enum
AnnaBridge 156:ff21514d8981 163 {
AnnaBridge 156:ff21514d8981 164 ldmaCtrlReqModeBlock = _LDMA_CH_CTRL_REQMODE_BLOCK, /**< Each DMA request trigger transfer of one block. */
AnnaBridge 156:ff21514d8981 165 ldmaCtrlReqModeAll = _LDMA_CH_CTRL_REQMODE_ALL /**< A DMA request trigger transfer of a complete cycle. */
AnnaBridge 156:ff21514d8981 166 } LDMA_CtrlReqMode_t;
AnnaBridge 156:ff21514d8981 167
AnnaBridge 156:ff21514d8981 168 /** Source address increment unit size. */
AnnaBridge 156:ff21514d8981 169 typedef enum
AnnaBridge 156:ff21514d8981 170 {
AnnaBridge 156:ff21514d8981 171 ldmaCtrlSrcIncOne = _LDMA_CH_CTRL_SRCINC_ONE, /**< Increment source address by one unit data size. */
AnnaBridge 156:ff21514d8981 172 ldmaCtrlSrcIncTwo = _LDMA_CH_CTRL_SRCINC_TWO, /**< Increment source address by two unit data sizes. */
AnnaBridge 156:ff21514d8981 173 ldmaCtrlSrcIncFour = _LDMA_CH_CTRL_SRCINC_FOUR, /**< Increment source address by four unit data sizes. */
AnnaBridge 156:ff21514d8981 174 ldmaCtrlSrcIncNone = _LDMA_CH_CTRL_SRCINC_NONE /**< Do not increment the source address. */
AnnaBridge 156:ff21514d8981 175 } LDMA_CtrlSrcInc_t;
AnnaBridge 156:ff21514d8981 176
AnnaBridge 156:ff21514d8981 177 /** DMA transfer unit size. */
AnnaBridge 156:ff21514d8981 178 typedef enum
AnnaBridge 156:ff21514d8981 179 {
AnnaBridge 156:ff21514d8981 180 ldmaCtrlSizeByte = _LDMA_CH_CTRL_SIZE_BYTE, /**< Each unit transfer is a byte. */
AnnaBridge 156:ff21514d8981 181 ldmaCtrlSizeHalf = _LDMA_CH_CTRL_SIZE_HALFWORD, /**< Each unit transfer is a half-word. */
AnnaBridge 156:ff21514d8981 182 ldmaCtrlSizeWord = _LDMA_CH_CTRL_SIZE_WORD /**< Each unit transfer is a word. */
AnnaBridge 156:ff21514d8981 183 } LDMA_CtrlSize_t;
AnnaBridge 156:ff21514d8981 184
AnnaBridge 156:ff21514d8981 185 /** Destination address increment unit size. */
AnnaBridge 156:ff21514d8981 186 typedef enum
AnnaBridge 156:ff21514d8981 187 {
AnnaBridge 156:ff21514d8981 188 ldmaCtrlDstIncOne = _LDMA_CH_CTRL_DSTINC_ONE, /**< Increment destination address by one unit data size. */
AnnaBridge 156:ff21514d8981 189 ldmaCtrlDstIncTwo = _LDMA_CH_CTRL_DSTINC_TWO, /**< Increment destination address by two unit data sizes. */
AnnaBridge 156:ff21514d8981 190 ldmaCtrlDstIncFour = _LDMA_CH_CTRL_DSTINC_FOUR, /**< Increment destination address by four unit data sizes. */
AnnaBridge 156:ff21514d8981 191 ldmaCtrlDstIncNone = _LDMA_CH_CTRL_DSTINC_NONE /**< Do not increment the destination address. */
AnnaBridge 156:ff21514d8981 192 } LDMA_CtrlDstInc_t;
AnnaBridge 156:ff21514d8981 193
AnnaBridge 156:ff21514d8981 194 /** Source addressing mode. */
AnnaBridge 156:ff21514d8981 195 typedef enum
AnnaBridge 156:ff21514d8981 196 {
AnnaBridge 156:ff21514d8981 197 ldmaCtrlSrcAddrModeAbs = _LDMA_CH_CTRL_SRCMODE_ABSOLUTE, /**< Address fetched from a linked structure is absolute. */
AnnaBridge 156:ff21514d8981 198 ldmaCtrlSrcAddrModeRel = _LDMA_CH_CTRL_SRCMODE_RELATIVE /**< Address fetched from a linked structure is relative. */
AnnaBridge 156:ff21514d8981 199 } LDMA_CtrlSrcAddrMode_t;
AnnaBridge 156:ff21514d8981 200
AnnaBridge 156:ff21514d8981 201 /** Destination addressing mode. */
AnnaBridge 156:ff21514d8981 202 typedef enum
AnnaBridge 156:ff21514d8981 203 {
AnnaBridge 156:ff21514d8981 204 ldmaCtrlDstAddrModeAbs = _LDMA_CH_CTRL_DSTMODE_ABSOLUTE, /**< Address fetched from a linked structure is absolute. */
AnnaBridge 156:ff21514d8981 205 ldmaCtrlDstAddrModeRel = _LDMA_CH_CTRL_DSTMODE_RELATIVE /**< Address fetched from a linked structure is relative. */
AnnaBridge 156:ff21514d8981 206 } LDMA_CtrlDstAddrMode_t;
AnnaBridge 156:ff21514d8981 207
AnnaBridge 156:ff21514d8981 208 /** DMA linkload address mode. */
AnnaBridge 156:ff21514d8981 209 typedef enum
AnnaBridge 156:ff21514d8981 210 {
AnnaBridge 156:ff21514d8981 211 ldmaLinkModeAbs = _LDMA_CH_LINK_LINKMODE_ABSOLUTE, /**< Link address is an absolute address value. */
AnnaBridge 156:ff21514d8981 212 ldmaLinkModeRel = _LDMA_CH_LINK_LINKMODE_RELATIVE /**< Link address is a two's complement releative address. */
AnnaBridge 156:ff21514d8981 213 } LDMA_LinkMode_t;
AnnaBridge 156:ff21514d8981 214
AnnaBridge 156:ff21514d8981 215 /** Insert extra arbitration slots to increase channel arbitration priority. */
AnnaBridge 156:ff21514d8981 216 typedef enum
AnnaBridge 156:ff21514d8981 217 {
AnnaBridge 156:ff21514d8981 218 ldmaCfgArbSlotsAs1 = _LDMA_CH_CFG_ARBSLOTS_ONE, /**< One arbitration slot selected. */
AnnaBridge 156:ff21514d8981 219 ldmaCfgArbSlotsAs2 = _LDMA_CH_CFG_ARBSLOTS_TWO, /**< Two arbitration slots selected. */
AnnaBridge 156:ff21514d8981 220 ldmaCfgArbSlotsAs4 = _LDMA_CH_CFG_ARBSLOTS_FOUR, /**< Four arbitration slots selected. */
AnnaBridge 156:ff21514d8981 221 ldmaCfgArbSlotsAs8 = _LDMA_CH_CFG_ARBSLOTS_EIGHT /**< Eight arbitration slots selected. */
AnnaBridge 156:ff21514d8981 222 } LDMA_CfgArbSlots_t;
AnnaBridge 156:ff21514d8981 223
AnnaBridge 156:ff21514d8981 224 /** Source address increment sign. */
AnnaBridge 156:ff21514d8981 225 typedef enum
AnnaBridge 156:ff21514d8981 226 {
AnnaBridge 156:ff21514d8981 227 ldmaCfgSrcIncSignPos = _LDMA_CH_CFG_SRCINCSIGN_POSITIVE, /**< Increment source address. */
AnnaBridge 156:ff21514d8981 228 ldmaCfgSrcIncSignNeg = _LDMA_CH_CFG_SRCINCSIGN_NEGATIVE /**< Decrement source address. */
AnnaBridge 156:ff21514d8981 229 } LDMA_CfgSrcIncSign_t;
AnnaBridge 156:ff21514d8981 230
AnnaBridge 156:ff21514d8981 231 /** Destination address increment sign. */
AnnaBridge 156:ff21514d8981 232 typedef enum
AnnaBridge 156:ff21514d8981 233 {
AnnaBridge 156:ff21514d8981 234 ldmaCfgDstIncSignPos = _LDMA_CH_CFG_DSTINCSIGN_POSITIVE, /**< Increment destination address. */
AnnaBridge 156:ff21514d8981 235 ldmaCfgDstIncSignNeg = _LDMA_CH_CFG_DSTINCSIGN_NEGATIVE /**< Decrement destination address. */
AnnaBridge 156:ff21514d8981 236 } LDMA_CfgDstIncSign_t;
AnnaBridge 156:ff21514d8981 237
AnnaBridge 156:ff21514d8981 238 /** Peripherals that can trigger LDMA transfers. */
AnnaBridge 156:ff21514d8981 239 typedef enum
AnnaBridge 156:ff21514d8981 240 {
AnnaBridge 156:ff21514d8981 241 ldmaPeripheralSignal_NONE = LDMA_CH_REQSEL_SOURCESEL_NONE, ///< No peripheral selected for DMA triggering.
AnnaBridge 156:ff21514d8981 242 #if defined(LDMA_CH_REQSEL_SIGSEL_ADC0SCAN)
AnnaBridge 156:ff21514d8981 243 ldmaPeripheralSignal_ADC0_SCAN = LDMA_CH_REQSEL_SIGSEL_ADC0SCAN | LDMA_CH_REQSEL_SOURCESEL_ADC0, ///< Trig on ADC0_SCAN.
AnnaBridge 156:ff21514d8981 244 #endif
AnnaBridge 156:ff21514d8981 245 #if defined(LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE)
AnnaBridge 156:ff21514d8981 246 ldmaPeripheralSignal_ADC0_SINGLE = LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE | LDMA_CH_REQSEL_SOURCESEL_ADC0, ///< Trig on ADC0_SINGLE.
AnnaBridge 156:ff21514d8981 247 #endif
AnnaBridge 156:ff21514d8981 248 #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0RD )
AnnaBridge 156:ff21514d8981 249 ldmaPeripheralSignal_CRYPTO_DATA0RD = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA0RD.
AnnaBridge 156:ff21514d8981 250 #endif
AnnaBridge 156:ff21514d8981 251 #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0WR )
AnnaBridge 156:ff21514d8981 252 ldmaPeripheralSignal_CRYPTO_DATA0WR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA0WR.
AnnaBridge 156:ff21514d8981 253 #endif
AnnaBridge 156:ff21514d8981 254 #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0XWR )
AnnaBridge 156:ff21514d8981 255 ldmaPeripheralSignal_CRYPTO_DATA0XWR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0XWR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA0XWR.
AnnaBridge 156:ff21514d8981 256 #endif
AnnaBridge 156:ff21514d8981 257 #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1RD )
AnnaBridge 156:ff21514d8981 258 ldmaPeripheralSignal_CRYPTO_DATA1RD = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA1RD.
AnnaBridge 156:ff21514d8981 259 #endif
AnnaBridge 156:ff21514d8981 260 #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1WR )
AnnaBridge 156:ff21514d8981 261 ldmaPeripheralSignal_CRYPTO_DATA1WR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA1WR.
AnnaBridge 156:ff21514d8981 262 #endif
AnnaBridge 156:ff21514d8981 263 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0RD)
AnnaBridge 156:ff21514d8981 264 ldmaPeripheralSignal_CRYPTO0_DATA0RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ///< Trig on CRYPTO0_DATA0RD.
AnnaBridge 156:ff21514d8981 265 #endif
AnnaBridge 156:ff21514d8981 266 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0WR)
AnnaBridge 156:ff21514d8981 267 ldmaPeripheralSignal_CRYPTO0_DATA0WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ///< Trig on CRYPTO0_DATA0WR.
AnnaBridge 156:ff21514d8981 268 #endif
AnnaBridge 156:ff21514d8981 269 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0XWR)
AnnaBridge 156:ff21514d8981 270 ldmaPeripheralSignal_CRYPTO0_DATA0XWR = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0XWR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ///< Trig on CRYPTO0_DATA0XWR.
AnnaBridge 156:ff21514d8981 271 #endif
AnnaBridge 156:ff21514d8981 272 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1RD)
AnnaBridge 156:ff21514d8981 273 ldmaPeripheralSignal_CRYPTO0_DATA1RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ///< Trig on CRYPTO0_DATA1RD.
AnnaBridge 156:ff21514d8981 274 #endif
AnnaBridge 156:ff21514d8981 275 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1WR)
AnnaBridge 156:ff21514d8981 276 ldmaPeripheralSignal_CRYPTO0_DATA1WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ///< Trig on CRYPTO0_DATA1WR.
AnnaBridge 156:ff21514d8981 277 #endif
AnnaBridge 156:ff21514d8981 278 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0RD)
AnnaBridge 156:ff21514d8981 279 ldmaPeripheralSignal_CRYPTO1_DATA0RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ///< Trig on CRYPTO1_DATA0RD.
AnnaBridge 156:ff21514d8981 280 #endif
AnnaBridge 156:ff21514d8981 281 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0WR)
AnnaBridge 156:ff21514d8981 282 ldmaPeripheralSignal_CRYPTO1_DATA0WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ///< Trig on CRYPTO1_DATA0WR.
AnnaBridge 156:ff21514d8981 283 #endif
AnnaBridge 156:ff21514d8981 284 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0XWR)
AnnaBridge 156:ff21514d8981 285 ldmaPeripheralSignal_CRYPTO1_DATA0XWR = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0XWR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ///< Trig on CRYPTO1_DATA0XWR.
AnnaBridge 156:ff21514d8981 286 #endif
AnnaBridge 156:ff21514d8981 287 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1RD)
AnnaBridge 156:ff21514d8981 288 ldmaPeripheralSignal_CRYPTO1_DATA1RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ///< Trig on CRYPTO1_DATA1RD.
AnnaBridge 156:ff21514d8981 289 #endif
AnnaBridge 156:ff21514d8981 290 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1WR)
AnnaBridge 156:ff21514d8981 291 ldmaPeripheralSignal_CRYPTO1_DATA1WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ///< Trig on CRYPTO1_DATA1WR.
AnnaBridge 156:ff21514d8981 292 #endif
AnnaBridge 156:ff21514d8981 293 #if defined(LDMA_CH_REQSEL_SIGSEL_CSENBSLN)
AnnaBridge 156:ff21514d8981 294 ldmaPeripheralSignal_CSEN_BSLN = LDMA_CH_REQSEL_SIGSEL_CSENBSLN | LDMA_CH_REQSEL_SOURCESEL_CSEN, ///< Trig on CSEN_BSLN.
AnnaBridge 156:ff21514d8981 295 #endif
AnnaBridge 156:ff21514d8981 296 #if defined(LDMA_CH_REQSEL_SIGSEL_CSENDATA)
AnnaBridge 156:ff21514d8981 297 ldmaPeripheralSignal_CSEN_DATA = LDMA_CH_REQSEL_SIGSEL_CSENDATA | LDMA_CH_REQSEL_SOURCESEL_CSEN, ///< Trig on CSEN_DATA.
AnnaBridge 156:ff21514d8981 298 #endif
AnnaBridge 156:ff21514d8981 299 #if defined(LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV)
AnnaBridge 156:ff21514d8981 300 ldmaPeripheralSignal_I2C0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_I2C0, ///< Trig on I2C0_RXDATAV.
AnnaBridge 156:ff21514d8981 301 #endif
AnnaBridge 156:ff21514d8981 302 #if defined(LDMA_CH_REQSEL_SIGSEL_I2C0TXBL)
AnnaBridge 156:ff21514d8981 303 ldmaPeripheralSignal_I2C0_TXBL = LDMA_CH_REQSEL_SIGSEL_I2C0TXBL | LDMA_CH_REQSEL_SOURCESEL_I2C0, ///< Trig on I2C0_TXBL.
AnnaBridge 156:ff21514d8981 304 #endif
AnnaBridge 156:ff21514d8981 305 #if defined(LDMA_CH_REQSEL_SIGSEL_I2C1RXDATAV)
AnnaBridge 156:ff21514d8981 306 ldmaPeripheralSignal_I2C1_RXDATAV = LDMA_CH_REQSEL_SIGSEL_I2C1RXDATAV | LDMA_CH_REQSEL_SOURCESEL_I2C1, ///< Trig on I2C1_RXDATAV.
AnnaBridge 156:ff21514d8981 307 #endif
AnnaBridge 156:ff21514d8981 308 #if defined(LDMA_CH_REQSEL_SIGSEL_I2C1TXBL)
AnnaBridge 156:ff21514d8981 309 ldmaPeripheralSignal_I2C1_TXBL = LDMA_CH_REQSEL_SIGSEL_I2C1TXBL | LDMA_CH_REQSEL_SOURCESEL_I2C1, ///< Trig on I2C1_TXBL.
AnnaBridge 156:ff21514d8981 310 #endif
AnnaBridge 156:ff21514d8981 311 #if defined(LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV)
AnnaBridge 156:ff21514d8981 312 ldmaPeripheralSignal_LESENSE_BUFDATAV = LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV | LDMA_CH_REQSEL_SOURCESEL_LESENSE, ///< Trig on LESENSE_BUFDATAV.
AnnaBridge 156:ff21514d8981 313 #endif
AnnaBridge 156:ff21514d8981 314 #if defined(LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV)
AnnaBridge 156:ff21514d8981 315 ldmaPeripheralSignal_LEUART0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_LEUART0, ///< Trig on LEUART0_RXDATAV.
AnnaBridge 156:ff21514d8981 316 #endif
AnnaBridge 156:ff21514d8981 317 #if defined(LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL)
AnnaBridge 156:ff21514d8981 318 ldmaPeripheralSignal_LEUART0_TXBL = LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL | LDMA_CH_REQSEL_SOURCESEL_LEUART0, ///< Trig on LEUART0_TXBL.
AnnaBridge 156:ff21514d8981 319 #endif
AnnaBridge 156:ff21514d8981 320 #if defined(LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY)
AnnaBridge 156:ff21514d8981 321 ldmaPeripheralSignal_LEUART0_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_LEUART0, ///< Trig on LEUART0_TXEMPTY.
AnnaBridge 156:ff21514d8981 322 #endif
AnnaBridge 156:ff21514d8981 323 #if defined(LDMA_CH_REQSEL_SIGSEL_MSCWDATA)
AnnaBridge 156:ff21514d8981 324 ldmaPeripheralSignal_MSC_WDATA = LDMA_CH_REQSEL_SIGSEL_MSCWDATA | LDMA_CH_REQSEL_SOURCESEL_MSC, ///< Trig on MSC_WDATA.
AnnaBridge 156:ff21514d8981 325 #endif
AnnaBridge 156:ff21514d8981 326 #if defined(LDMA_CH_REQSEL_SIGSEL_PRSREQ0)
AnnaBridge 156:ff21514d8981 327 ldmaPeripheralSignal_PRS_REQ0 = LDMA_CH_REQSEL_SIGSEL_PRSREQ0 | LDMA_CH_REQSEL_SOURCESEL_PRS, ///< Trig on PRS_REQ0.
AnnaBridge 156:ff21514d8981 328 #endif
AnnaBridge 156:ff21514d8981 329 #if defined(LDMA_CH_REQSEL_SIGSEL_PRSREQ1)
AnnaBridge 156:ff21514d8981 330 ldmaPeripheralSignal_PRS_REQ1 = LDMA_CH_REQSEL_SIGSEL_PRSREQ1 | LDMA_CH_REQSEL_SOURCESEL_PRS, ///< Trig on PRS_REQ1.
AnnaBridge 156:ff21514d8981 331 #endif
AnnaBridge 156:ff21514d8981 332 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER0CC0)
AnnaBridge 156:ff21514d8981 333 ldmaPeripheralSignal_TIMER0_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER0, ///< Trig on TIMER0_CC0.
AnnaBridge 156:ff21514d8981 334 #endif
AnnaBridge 156:ff21514d8981 335 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER0CC1)
AnnaBridge 156:ff21514d8981 336 ldmaPeripheralSignal_TIMER0_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER0, ///< Trig on TIMER0_CC1.
AnnaBridge 156:ff21514d8981 337 #endif
AnnaBridge 156:ff21514d8981 338 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER0CC2)
AnnaBridge 156:ff21514d8981 339 ldmaPeripheralSignal_TIMER0_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER0, ///< Trig on TIMER0_CC2.
AnnaBridge 156:ff21514d8981 340 #endif
AnnaBridge 156:ff21514d8981 341 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF)
AnnaBridge 156:ff21514d8981 342 ldmaPeripheralSignal_TIMER0_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER0, ///< Trig on TIMER0_UFOF.
AnnaBridge 156:ff21514d8981 343 #endif
AnnaBridge 156:ff21514d8981 344 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1CC0)
AnnaBridge 156:ff21514d8981 345 ldmaPeripheralSignal_TIMER1_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ///< Trig on TIMER1_CC0.
AnnaBridge 156:ff21514d8981 346 #endif
AnnaBridge 156:ff21514d8981 347 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1CC1)
AnnaBridge 156:ff21514d8981 348 ldmaPeripheralSignal_TIMER1_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ///< Trig on TIMER1_CC1.
AnnaBridge 156:ff21514d8981 349 #endif
AnnaBridge 156:ff21514d8981 350 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1CC2)
AnnaBridge 156:ff21514d8981 351 ldmaPeripheralSignal_TIMER1_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ///< Trig on TIMER1_CC2.
AnnaBridge 156:ff21514d8981 352 #endif
AnnaBridge 156:ff21514d8981 353 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1CC3)
AnnaBridge 156:ff21514d8981 354 ldmaPeripheralSignal_TIMER1_CC3 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC3 | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ///< Trig on TIMER1_CC3.
AnnaBridge 156:ff21514d8981 355 #endif
AnnaBridge 156:ff21514d8981 356 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF)
AnnaBridge 156:ff21514d8981 357 ldmaPeripheralSignal_TIMER1_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ///< Trig on TIMER1_UFOF.
AnnaBridge 156:ff21514d8981 358 #endif
AnnaBridge 156:ff21514d8981 359 #if defined(LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV)
AnnaBridge 156:ff21514d8981 360 ldmaPeripheralSignal_USART0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART0, ///< Trig on USART0_RXDATAV.
AnnaBridge 156:ff21514d8981 361 #endif
AnnaBridge 156:ff21514d8981 362 #if defined(LDMA_CH_REQSEL_SIGSEL_USART0TXBL)
AnnaBridge 156:ff21514d8981 363 ldmaPeripheralSignal_USART0_TXBL = LDMA_CH_REQSEL_SIGSEL_USART0TXBL | LDMA_CH_REQSEL_SOURCESEL_USART0, ///< Trig on USART0_TXBL.
AnnaBridge 156:ff21514d8981 364 #endif
AnnaBridge 156:ff21514d8981 365 #if defined(LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY)
AnnaBridge 156:ff21514d8981 366 ldmaPeripheralSignal_USART0_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART0, ///< Trig on USART0_TXEMPTY.
AnnaBridge 156:ff21514d8981 367 #endif
AnnaBridge 156:ff21514d8981 368 #if defined(LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV)
AnnaBridge 156:ff21514d8981 369 ldmaPeripheralSignal_USART1_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART1, ///< Trig on USART1_RXDATAV.
AnnaBridge 156:ff21514d8981 370 #endif
AnnaBridge 156:ff21514d8981 371 #if defined(LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT)
AnnaBridge 156:ff21514d8981 372 ldmaPeripheralSignal_USART1_RXDATAVRIGHT = LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART1, ///< Trig on USART1_RXDATAVRIGHT.
AnnaBridge 156:ff21514d8981 373 #endif
AnnaBridge 156:ff21514d8981 374 #if defined(LDMA_CH_REQSEL_SIGSEL_USART1TXBL)
AnnaBridge 156:ff21514d8981 375 ldmaPeripheralSignal_USART1_TXBL = LDMA_CH_REQSEL_SIGSEL_USART1TXBL | LDMA_CH_REQSEL_SOURCESEL_USART1, ///< Trig on USART1_TXBL.
AnnaBridge 156:ff21514d8981 376 #endif
AnnaBridge 156:ff21514d8981 377 #if defined(LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT)
AnnaBridge 156:ff21514d8981 378 ldmaPeripheralSignal_USART1_TXBLRIGHT = LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART1, ///< Trig on USART1_TXBLRIGHT.
AnnaBridge 156:ff21514d8981 379 #endif
AnnaBridge 156:ff21514d8981 380 #if defined(LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY)
AnnaBridge 156:ff21514d8981 381 ldmaPeripheralSignal_USART1_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART1, ///< Trig on USART1_TXEMPTY.
AnnaBridge 156:ff21514d8981 382 #endif
AnnaBridge 156:ff21514d8981 383 #if defined(LDMA_CH_REQSEL_SIGSEL_USART2RXDATAV)
AnnaBridge 156:ff21514d8981 384 ldmaPeripheralSignal_USART2_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART2RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART2, ///< Trig on USART2_RXDATAV.
AnnaBridge 156:ff21514d8981 385 #endif
AnnaBridge 156:ff21514d8981 386 #if defined(LDMA_CH_REQSEL_SIGSEL_USART2TXBL)
AnnaBridge 156:ff21514d8981 387 ldmaPeripheralSignal_USART2_TXBL = LDMA_CH_REQSEL_SIGSEL_USART2TXBL | LDMA_CH_REQSEL_SOURCESEL_USART2, ///< Trig on USART2_TXBL.
AnnaBridge 156:ff21514d8981 388 #endif
AnnaBridge 156:ff21514d8981 389 #if defined(LDMA_CH_REQSEL_SIGSEL_USART2TXEMPTY)
AnnaBridge 156:ff21514d8981 390 ldmaPeripheralSignal_USART2_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART2TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART2, ///< Trig on USART2_TXEMPTY.
AnnaBridge 156:ff21514d8981 391 #endif
AnnaBridge 156:ff21514d8981 392 #if defined(LDMA_CH_REQSEL_SIGSEL_USART3RXDATAV)
AnnaBridge 156:ff21514d8981 393 ldmaPeripheralSignal_USART3_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART3RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART3, ///< Trig on USART3_RXDATAV.
AnnaBridge 156:ff21514d8981 394 #endif
AnnaBridge 156:ff21514d8981 395 #if defined(LDMA_CH_REQSEL_SIGSEL_USART3RXDATAVRIGHT)
AnnaBridge 156:ff21514d8981 396 ldmaPeripheralSignal_USART3_RXDATAVRIGHT = LDMA_CH_REQSEL_SIGSEL_USART3RXDATAVRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART3, ///< Trig on USART3_RXDATAVRIGHT.
AnnaBridge 156:ff21514d8981 397 #endif
AnnaBridge 156:ff21514d8981 398 #if defined(LDMA_CH_REQSEL_SIGSEL_USART3TXBL)
AnnaBridge 156:ff21514d8981 399 ldmaPeripheralSignal_USART3_TXBL = LDMA_CH_REQSEL_SIGSEL_USART3TXBL | LDMA_CH_REQSEL_SOURCESEL_USART3, ///< Trig on USART3_TXBL.
AnnaBridge 156:ff21514d8981 400 #endif
AnnaBridge 156:ff21514d8981 401 #if defined(LDMA_CH_REQSEL_SIGSEL_USART3TXBLRIGHT)
AnnaBridge 156:ff21514d8981 402 ldmaPeripheralSignal_USART3_TXBLRIGHT = LDMA_CH_REQSEL_SIGSEL_USART3TXBLRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART3, ///< Trig on USART3_TXBLRIGHT.
AnnaBridge 156:ff21514d8981 403 #endif
AnnaBridge 156:ff21514d8981 404 #if defined(LDMA_CH_REQSEL_SIGSEL_USART3TXEMPTY)
AnnaBridge 156:ff21514d8981 405 ldmaPeripheralSignal_USART3_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART3TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART3, ///< Trig on USART3_TXEMPTY.
AnnaBridge 156:ff21514d8981 406 #endif
AnnaBridge 156:ff21514d8981 407 #if defined(LDMA_CH_REQSEL_SIGSEL_VDAC0CH0)
AnnaBridge 156:ff21514d8981 408 ldmaPeripheralSignal_VDAC0_CH0 = LDMA_CH_REQSEL_SIGSEL_VDAC0CH0 | LDMA_CH_REQSEL_SOURCESEL_VDAC0, ///< Trig on VDAC0_CH0.
AnnaBridge 156:ff21514d8981 409 #endif
AnnaBridge 156:ff21514d8981 410 #if defined(LDMA_CH_REQSEL_SIGSEL_VDAC0CH1)
AnnaBridge 156:ff21514d8981 411 ldmaPeripheralSignal_VDAC0_CH1 = LDMA_CH_REQSEL_SIGSEL_VDAC0CH1 | LDMA_CH_REQSEL_SOURCESEL_VDAC0, ///< Trig on VDAC0_CH1.
AnnaBridge 156:ff21514d8981 412 #endif
AnnaBridge 156:ff21514d8981 413 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER0CC0)
AnnaBridge 156:ff21514d8981 414 ldmaPeripheralSignal_WTIMER0_CC0 = LDMA_CH_REQSEL_SIGSEL_WTIMER0CC0 | LDMA_CH_REQSEL_SOURCESEL_WTIMER0, ///< Trig on WTIMER0_CC0.
AnnaBridge 156:ff21514d8981 415 #endif
AnnaBridge 156:ff21514d8981 416 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER0CC1)
AnnaBridge 156:ff21514d8981 417 ldmaPeripheralSignal_WTIMER0_CC1 = LDMA_CH_REQSEL_SIGSEL_WTIMER0CC1 | LDMA_CH_REQSEL_SOURCESEL_WTIMER0, ///< Trig on WTIMER0_CC1.
AnnaBridge 156:ff21514d8981 418 #endif
AnnaBridge 156:ff21514d8981 419 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER0CC2)
AnnaBridge 156:ff21514d8981 420 ldmaPeripheralSignal_WTIMER0_CC2 = LDMA_CH_REQSEL_SIGSEL_WTIMER0CC2 | LDMA_CH_REQSEL_SOURCESEL_WTIMER0, ///< Trig on WTIMER0_CC2.
AnnaBridge 156:ff21514d8981 421 #endif
AnnaBridge 156:ff21514d8981 422 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER0UFOF)
AnnaBridge 156:ff21514d8981 423 ldmaPeripheralSignal_WTIMER0_UFOF = LDMA_CH_REQSEL_SIGSEL_WTIMER0UFOF | LDMA_CH_REQSEL_SOURCESEL_WTIMER0, ///< Trig on WTIMER0_UFOF.
AnnaBridge 156:ff21514d8981 424 #endif
AnnaBridge 156:ff21514d8981 425 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1CC0)
AnnaBridge 156:ff21514d8981 426 ldmaPeripheralSignal_WTIMER1_CC0 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC0 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1, ///< Trig on WTIMER1_CC0.
AnnaBridge 156:ff21514d8981 427 #endif
AnnaBridge 156:ff21514d8981 428 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1CC1)
AnnaBridge 156:ff21514d8981 429 ldmaPeripheralSignal_WTIMER1_CC1 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC1 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1, ///< Trig on WTIMER1_CC1.
AnnaBridge 156:ff21514d8981 430 #endif
AnnaBridge 156:ff21514d8981 431 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1CC2)
AnnaBridge 156:ff21514d8981 432 ldmaPeripheralSignal_WTIMER1_CC2 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC2 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1, ///< Trig on WTIMER1_CC2.
AnnaBridge 156:ff21514d8981 433 #endif
AnnaBridge 156:ff21514d8981 434 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1CC3)
AnnaBridge 156:ff21514d8981 435 ldmaPeripheralSignal_WTIMER1_CC3 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC3 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1, ///< Trig on WTIMER1_CC3.
AnnaBridge 156:ff21514d8981 436 #endif
AnnaBridge 156:ff21514d8981 437 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF)
AnnaBridge 156:ff21514d8981 438 ldmaPeripheralSignal_WTIMER1_UFOF = LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF | LDMA_CH_REQSEL_SOURCESEL_WTIMER1 ///< Trig on WTIMER1_UFOF.
AnnaBridge 156:ff21514d8981 439 #endif
AnnaBridge 156:ff21514d8981 440 } LDMA_PeripheralSignal_t;
AnnaBridge 156:ff21514d8981 441
AnnaBridge 156:ff21514d8981 442
AnnaBridge 156:ff21514d8981 443 /*******************************************************************************
AnnaBridge 156:ff21514d8981 444 ******************************* STRUCTS ***********************************
AnnaBridge 156:ff21514d8981 445 ******************************************************************************/
AnnaBridge 156:ff21514d8981 446
AnnaBridge 156:ff21514d8981 447 /**
AnnaBridge 156:ff21514d8981 448 * @brief
AnnaBridge 156:ff21514d8981 449 * DMA descriptor.
AnnaBridge 156:ff21514d8981 450 * @details
AnnaBridge 156:ff21514d8981 451 * The LDMA DMA controller supports three different DMA descriptors. Each
AnnaBridge 156:ff21514d8981 452 * consist of four WORD's which map directly onto hw control registers for a
AnnaBridge 156:ff21514d8981 453 * given DMA channel. The three descriptor types are XFER, SYNC and WRI.
AnnaBridge 156:ff21514d8981 454 * Refer to the reference manual for further information.
AnnaBridge 156:ff21514d8981 455 */
AnnaBridge 156:ff21514d8981 456 typedef union
AnnaBridge 156:ff21514d8981 457 {
AnnaBridge 156:ff21514d8981 458 /**
AnnaBridge 156:ff21514d8981 459 * TRANSFER DMA descriptor, this is the only descriptor type which can be
AnnaBridge 156:ff21514d8981 460 * used to start a DMA transfer.
AnnaBridge 156:ff21514d8981 461 */
AnnaBridge 156:ff21514d8981 462 struct
AnnaBridge 156:ff21514d8981 463 {
AnnaBridge 156:ff21514d8981 464 uint32_t structType : 2; /**< Set to 0 to select XFER descriptor type. */
AnnaBridge 156:ff21514d8981 465 uint32_t reserved0 : 1;
AnnaBridge 156:ff21514d8981 466 uint32_t structReq : 1; /**< DMA transfer trigger during LINKLOAD. */
AnnaBridge 156:ff21514d8981 467 uint32_t xferCnt : 11; /**< Transfer count minus one. */
AnnaBridge 156:ff21514d8981 468 uint32_t byteSwap : 1; /**< Enable byte swapping transfers. */
AnnaBridge 156:ff21514d8981 469 uint32_t blockSize : 4; /**< Number of unit transfers per arb. cycle. */
AnnaBridge 156:ff21514d8981 470 uint32_t doneIfs : 1; /**< Generate interrupt when done. */
AnnaBridge 156:ff21514d8981 471 uint32_t reqMode : 1; /**< Block or cycle transfer selector. */
AnnaBridge 156:ff21514d8981 472 uint32_t decLoopCnt : 1; /**< Enable looped transfers. */
AnnaBridge 156:ff21514d8981 473 uint32_t ignoreSrec : 1; /**< Ignore single requests. */
AnnaBridge 156:ff21514d8981 474 uint32_t srcInc : 2; /**< Source address increment unit size. */
AnnaBridge 156:ff21514d8981 475 uint32_t size : 2; /**< DMA transfer unit size. */
AnnaBridge 156:ff21514d8981 476 uint32_t dstInc : 2; /**< Destination address increment unit size. */
AnnaBridge 156:ff21514d8981 477 uint32_t srcAddrMode: 1; /**< Source addressing mode. */
AnnaBridge 156:ff21514d8981 478 uint32_t dstAddrMode: 1; /**< Destination addressing mode. */
AnnaBridge 156:ff21514d8981 479
AnnaBridge 156:ff21514d8981 480 uint32_t srcAddr; /**< DMA source address. */
AnnaBridge 156:ff21514d8981 481 uint32_t dstAddr; /**< DMA destination address. */
AnnaBridge 156:ff21514d8981 482
AnnaBridge 156:ff21514d8981 483 uint32_t linkMode : 1; /**< Select absolute or relative link address.*/
AnnaBridge 156:ff21514d8981 484 uint32_t link : 1; /**< Enable LINKLOAD when transfer is done. */
AnnaBridge 156:ff21514d8981 485 int32_t linkAddr : 30; /**< Address of next (linked) descriptor. */
AnnaBridge 156:ff21514d8981 486 } xfer;
AnnaBridge 156:ff21514d8981 487
AnnaBridge 156:ff21514d8981 488 /** SYNCHRONIZE DMA descriptor, used for intra channel transfer
AnnaBridge 156:ff21514d8981 489 * syncronization.
AnnaBridge 156:ff21514d8981 490 */
AnnaBridge 156:ff21514d8981 491 struct
AnnaBridge 156:ff21514d8981 492 {
AnnaBridge 156:ff21514d8981 493 uint32_t structType : 2; /**< Set to 1 to select SYNC descriptor type. */
AnnaBridge 156:ff21514d8981 494 uint32_t reserved0 : 1;
AnnaBridge 156:ff21514d8981 495 uint32_t structReq : 1; /**< DMA transfer trigger during LINKLOAD. */
AnnaBridge 156:ff21514d8981 496 uint32_t xferCnt : 11; /**< Transfer count minus one. */
AnnaBridge 156:ff21514d8981 497 uint32_t byteSwap : 1; /**< Enable byte swapping transfers. */
AnnaBridge 156:ff21514d8981 498 uint32_t blockSize : 4; /**< Number of unit transfers per arb. cycle. */
AnnaBridge 156:ff21514d8981 499 uint32_t doneIfs : 1; /**< Generate interrupt when done. */
AnnaBridge 156:ff21514d8981 500 uint32_t reqMode : 1; /**< Block or cycle transfer selector. */
AnnaBridge 156:ff21514d8981 501 uint32_t decLoopCnt : 1; /**< Enable looped transfers. */
AnnaBridge 156:ff21514d8981 502 uint32_t ignoreSrec : 1; /**< Ignore single requests. */
AnnaBridge 156:ff21514d8981 503 uint32_t srcInc : 2; /**< Source address increment unit size. */
AnnaBridge 156:ff21514d8981 504 uint32_t size : 2; /**< DMA transfer unit size. */
AnnaBridge 156:ff21514d8981 505 uint32_t dstInc : 2; /**< Destination address increment unit size. */
AnnaBridge 156:ff21514d8981 506 uint32_t srcAddrMode: 1; /**< Source addressing mode. */
AnnaBridge 156:ff21514d8981 507 uint32_t dstAddrMode: 1; /**< Destination addressing mode. */
AnnaBridge 156:ff21514d8981 508
AnnaBridge 156:ff21514d8981 509 uint32_t syncSet : 8; /**< Set bits in LDMA_CTRL.SYNCTRIG register. */
AnnaBridge 156:ff21514d8981 510 uint32_t syncClr : 8; /**< Clear bits in LDMA_CTRL.SYNCTRIG register*/
AnnaBridge 156:ff21514d8981 511 uint32_t reserved3 : 16;
AnnaBridge 156:ff21514d8981 512 uint32_t matchVal : 8; /**< Sync trig match value. */
AnnaBridge 156:ff21514d8981 513 uint32_t matchEn : 8; /**< Sync trig match enable. */
AnnaBridge 156:ff21514d8981 514 uint32_t reserved4 : 16;
AnnaBridge 156:ff21514d8981 515
AnnaBridge 156:ff21514d8981 516 uint32_t linkMode : 1; /**< Select absolute or relative link address.*/
AnnaBridge 156:ff21514d8981 517 uint32_t link : 1; /**< Enable LINKLOAD when transfer is done. */
AnnaBridge 156:ff21514d8981 518 int32_t linkAddr : 30; /**< Address of next (linked) descriptor. */
AnnaBridge 156:ff21514d8981 519 } sync;
AnnaBridge 156:ff21514d8981 520
AnnaBridge 156:ff21514d8981 521 /** WRITE DMA descriptor, used for write immediate operations. */
AnnaBridge 156:ff21514d8981 522 struct
AnnaBridge 156:ff21514d8981 523 {
AnnaBridge 156:ff21514d8981 524 uint32_t structType : 2; /**< Set to 2 to select WRITE descriptor type.*/
AnnaBridge 156:ff21514d8981 525 uint32_t reserved0 : 1;
AnnaBridge 156:ff21514d8981 526 uint32_t structReq : 1; /**< DMA transfer trigger during LINKLOAD. */
AnnaBridge 156:ff21514d8981 527 uint32_t xferCnt : 11; /**< Transfer count minus one. */
AnnaBridge 156:ff21514d8981 528 uint32_t byteSwap : 1; /**< Enable byte swapping transfers. */
AnnaBridge 156:ff21514d8981 529 uint32_t blockSize : 4; /**< Number of unit transfers per arb. cycle. */
AnnaBridge 156:ff21514d8981 530 uint32_t doneIfs : 1; /**< Generate interrupt when done. */
AnnaBridge 156:ff21514d8981 531 uint32_t reqMode : 1; /**< Block or cycle transfer selector. */
AnnaBridge 156:ff21514d8981 532 uint32_t decLoopCnt : 1; /**< Enable looped transfers. */
AnnaBridge 156:ff21514d8981 533 uint32_t ignoreSrec : 1; /**< Ignore single requests. */
AnnaBridge 156:ff21514d8981 534 uint32_t srcInc : 2; /**< Source address increment unit size. */
AnnaBridge 156:ff21514d8981 535 uint32_t size : 2; /**< DMA transfer unit size. */
AnnaBridge 156:ff21514d8981 536 uint32_t dstInc : 2; /**< Destination address increment unit size. */
AnnaBridge 156:ff21514d8981 537 uint32_t srcAddrMode: 1; /**< Source addressing mode. */
AnnaBridge 156:ff21514d8981 538 uint32_t dstAddrMode: 1; /**< Destination addressing mode. */
AnnaBridge 156:ff21514d8981 539
AnnaBridge 156:ff21514d8981 540 uint32_t immVal; /**< Data to be written at dstAddr. */
AnnaBridge 156:ff21514d8981 541 uint32_t dstAddr; /**< DMA write destination address. */
AnnaBridge 156:ff21514d8981 542
AnnaBridge 156:ff21514d8981 543 uint32_t linkMode : 1; /**< Select absolute or relative link address.*/
AnnaBridge 156:ff21514d8981 544 uint32_t link : 1; /**< Enable LINKLOAD when transfer is done. */
AnnaBridge 156:ff21514d8981 545 int32_t linkAddr : 30; /**< Address of next (linked) descriptor. */
AnnaBridge 156:ff21514d8981 546 } wri;
AnnaBridge 156:ff21514d8981 547 } LDMA_Descriptor_t;
AnnaBridge 156:ff21514d8981 548
AnnaBridge 156:ff21514d8981 549 /** @brief LDMA initialization configuration structure. */
AnnaBridge 156:ff21514d8981 550 typedef struct
AnnaBridge 156:ff21514d8981 551 {
AnnaBridge 156:ff21514d8981 552 uint8_t ldmaInitCtrlNumFixed; /**< Arbitration mode separator.*/
AnnaBridge 156:ff21514d8981 553 uint8_t ldmaInitCtrlSyncPrsClrEn; /**< PRS Synctrig clear enable. */
AnnaBridge 156:ff21514d8981 554 uint8_t ldmaInitCtrlSyncPrsSetEn; /**< PRS Synctrig set enable. */
AnnaBridge 156:ff21514d8981 555 uint8_t ldmaInitIrqPriority; /**< LDMA IRQ priority (0..7). */
AnnaBridge 156:ff21514d8981 556 } LDMA_Init_t;
AnnaBridge 156:ff21514d8981 557
AnnaBridge 156:ff21514d8981 558 /**
AnnaBridge 156:ff21514d8981 559 * @brief
AnnaBridge 156:ff21514d8981 560 * DMA transfer configuration structure.
AnnaBridge 156:ff21514d8981 561 * @details
AnnaBridge 156:ff21514d8981 562 * This struct configures all aspects of a DMA transfer.
AnnaBridge 156:ff21514d8981 563 */
AnnaBridge 156:ff21514d8981 564 typedef struct
AnnaBridge 156:ff21514d8981 565 {
AnnaBridge 156:ff21514d8981 566 uint32_t ldmaReqSel; /**< Selects DMA trigger source. */
AnnaBridge 156:ff21514d8981 567 uint8_t ldmaCtrlSyncPrsClrOff; /**< PRS Synctrig clear enables to clear. */
AnnaBridge 156:ff21514d8981 568 uint8_t ldmaCtrlSyncPrsClrOn; /**< PRS Synctrig clear enables to set. */
AnnaBridge 156:ff21514d8981 569 uint8_t ldmaCtrlSyncPrsSetOff; /**< PRS Synctrig set enables to clear. */
AnnaBridge 156:ff21514d8981 570 uint8_t ldmaCtrlSyncPrsSetOn; /**< PRS Synctrig set enables to set. */
AnnaBridge 156:ff21514d8981 571 bool ldmaReqDis; /**< Mask the PRS trigger input. */
AnnaBridge 156:ff21514d8981 572 bool ldmaDbgHalt; /**< Dis. DMA trig when cpu is halted. */
AnnaBridge 156:ff21514d8981 573 uint8_t ldmaCfgArbSlots; /**< Arbitration slot number. */
AnnaBridge 156:ff21514d8981 574 uint8_t ldmaCfgSrcIncSign; /**< Source addr. increment sign. */
AnnaBridge 156:ff21514d8981 575 uint8_t ldmaCfgDstIncSign; /**< Dest. addr. increment sign. */
AnnaBridge 156:ff21514d8981 576 uint8_t ldmaLoopCnt; /**< Counter for looped transfers. */
AnnaBridge 156:ff21514d8981 577 } LDMA_TransferCfg_t;
AnnaBridge 156:ff21514d8981 578
AnnaBridge 156:ff21514d8981 579
AnnaBridge 156:ff21514d8981 580 /*******************************************************************************
AnnaBridge 156:ff21514d8981 581 ************************** STRUCT INITIALIZERS ****************************
AnnaBridge 156:ff21514d8981 582 ******************************************************************************/
AnnaBridge 156:ff21514d8981 583
AnnaBridge 156:ff21514d8981 584
AnnaBridge 156:ff21514d8981 585 /** @brief Default DMA initialization structure. */
AnnaBridge 156:ff21514d8981 586 #define LDMA_INIT_DEFAULT \
AnnaBridge 156:ff21514d8981 587 { \
AnnaBridge 156:ff21514d8981 588 .ldmaInitCtrlNumFixed = _LDMA_CTRL_NUMFIXED_DEFAULT, /* Fixed priority arbitration. */ \
AnnaBridge 156:ff21514d8981 589 .ldmaInitCtrlSyncPrsClrEn = 0, /* No PRS Synctrig clear enable*/ \
AnnaBridge 156:ff21514d8981 590 .ldmaInitCtrlSyncPrsSetEn = 0, /* No PRS Synctrig set enable. */ \
AnnaBridge 156:ff21514d8981 591 .ldmaInitIrqPriority = 3 /* IRQ priority level 3. */ \
AnnaBridge 156:ff21514d8981 592 }
AnnaBridge 156:ff21514d8981 593
AnnaBridge 156:ff21514d8981 594 /**
AnnaBridge 156:ff21514d8981 595 * @brief
AnnaBridge 156:ff21514d8981 596 * Generic DMA transfer configuration for memory to memory transfers.
AnnaBridge 156:ff21514d8981 597 */
AnnaBridge 156:ff21514d8981 598 #define LDMA_TRANSFER_CFG_MEMORY() \
AnnaBridge 156:ff21514d8981 599 { \
AnnaBridge 156:ff21514d8981 600 0, 0, 0, 0, 0, \
AnnaBridge 156:ff21514d8981 601 false, false, ldmaCfgArbSlotsAs1, \
AnnaBridge 156:ff21514d8981 602 ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, 0 \
AnnaBridge 156:ff21514d8981 603 }
AnnaBridge 156:ff21514d8981 604
AnnaBridge 156:ff21514d8981 605 /**
AnnaBridge 156:ff21514d8981 606 * @brief
AnnaBridge 156:ff21514d8981 607 * Generic DMA transfer configuration for looped memory to memory transfers.
AnnaBridge 156:ff21514d8981 608 */
AnnaBridge 156:ff21514d8981 609 #define LDMA_TRANSFER_CFG_MEMORY_LOOP(loopCnt) \
AnnaBridge 156:ff21514d8981 610 { \
AnnaBridge 156:ff21514d8981 611 0, 0, 0, 0, 0, \
AnnaBridge 156:ff21514d8981 612 false, false, ldmaCfgArbSlotsAs1, \
AnnaBridge 156:ff21514d8981 613 ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, \
AnnaBridge 156:ff21514d8981 614 loopCnt \
AnnaBridge 156:ff21514d8981 615 }
AnnaBridge 156:ff21514d8981 616
AnnaBridge 156:ff21514d8981 617 /**
AnnaBridge 156:ff21514d8981 618 * @brief
AnnaBridge 156:ff21514d8981 619 * Generic DMA transfer configuration for memory to/from peripheral transfers.
AnnaBridge 156:ff21514d8981 620 */
AnnaBridge 156:ff21514d8981 621 #define LDMA_TRANSFER_CFG_PERIPHERAL(signal) \
AnnaBridge 156:ff21514d8981 622 { \
AnnaBridge 156:ff21514d8981 623 signal, 0, 0, 0, 0, \
AnnaBridge 156:ff21514d8981 624 false, false, ldmaCfgArbSlotsAs1, \
AnnaBridge 156:ff21514d8981 625 ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, 0 \
AnnaBridge 156:ff21514d8981 626 }
AnnaBridge 156:ff21514d8981 627
AnnaBridge 156:ff21514d8981 628 /**
AnnaBridge 156:ff21514d8981 629 * @brief
AnnaBridge 156:ff21514d8981 630 * Generic DMA transfer configuration for looped memory to/from peripheral transfers.
AnnaBridge 156:ff21514d8981 631 */
AnnaBridge 156:ff21514d8981 632 #define LDMA_TRANSFER_CFG_PERIPHERAL_LOOP(signal, loopCnt) \
AnnaBridge 156:ff21514d8981 633 { \
AnnaBridge 156:ff21514d8981 634 signal, 0, 0, 0, 0, \
AnnaBridge 156:ff21514d8981 635 false, false, ldmaCfgArbSlotsAs1, \
AnnaBridge 156:ff21514d8981 636 ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, loopCnt \
AnnaBridge 156:ff21514d8981 637 }
AnnaBridge 156:ff21514d8981 638
AnnaBridge 156:ff21514d8981 639 /**
AnnaBridge 156:ff21514d8981 640 * @brief
AnnaBridge 156:ff21514d8981 641 * DMA descriptor initializer for single memory to memory word transfer.
AnnaBridge 156:ff21514d8981 642 * @param[in] src Source data address.
AnnaBridge 156:ff21514d8981 643 * @param[in] dest Destination data address.
AnnaBridge 156:ff21514d8981 644 * @param[in] count Number of words to transfer.
AnnaBridge 156:ff21514d8981 645 */
AnnaBridge 156:ff21514d8981 646 #define LDMA_DESCRIPTOR_SINGLE_M2M_WORD(src, dest, count) \
AnnaBridge 156:ff21514d8981 647 { \
AnnaBridge 156:ff21514d8981 648 .xfer = \
AnnaBridge 156:ff21514d8981 649 { \
AnnaBridge 156:ff21514d8981 650 .structType = ldmaCtrlStructTypeXfer, \
AnnaBridge 156:ff21514d8981 651 .structReq = 1, \
AnnaBridge 156:ff21514d8981 652 .xferCnt = ( count ) - 1, \
AnnaBridge 156:ff21514d8981 653 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 654 .blockSize = ldmaCtrlBlockSizeUnit1, \
AnnaBridge 156:ff21514d8981 655 .doneIfs = 1, \
AnnaBridge 156:ff21514d8981 656 .reqMode = ldmaCtrlReqModeAll, \
AnnaBridge 156:ff21514d8981 657 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 658 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 659 .srcInc = ldmaCtrlSrcIncOne, \
AnnaBridge 156:ff21514d8981 660 .size = ldmaCtrlSizeWord, \
AnnaBridge 156:ff21514d8981 661 .dstInc = ldmaCtrlDstIncOne, \
AnnaBridge 156:ff21514d8981 662 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
AnnaBridge 156:ff21514d8981 663 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
AnnaBridge 156:ff21514d8981 664 .srcAddr = (uint32_t)(src), \
AnnaBridge 156:ff21514d8981 665 .dstAddr = (uint32_t)(dest), \
AnnaBridge 156:ff21514d8981 666 .linkMode = 0, \
AnnaBridge 156:ff21514d8981 667 .link = 0, \
AnnaBridge 156:ff21514d8981 668 .linkAddr = 0 \
AnnaBridge 156:ff21514d8981 669 } \
AnnaBridge 156:ff21514d8981 670 }
AnnaBridge 156:ff21514d8981 671
AnnaBridge 156:ff21514d8981 672 /**
AnnaBridge 156:ff21514d8981 673 * @brief
AnnaBridge 156:ff21514d8981 674 * DMA descriptor initializer for single memory to memory half-word transfer.
AnnaBridge 156:ff21514d8981 675 * @param[in] src Source data address.
AnnaBridge 156:ff21514d8981 676 * @param[in] dest Destination data address.
AnnaBridge 156:ff21514d8981 677 * @param[in] count Number of half-words to transfer.
AnnaBridge 156:ff21514d8981 678 */
AnnaBridge 156:ff21514d8981 679 #define LDMA_DESCRIPTOR_SINGLE_M2M_HALF(src, dest, count) \
AnnaBridge 156:ff21514d8981 680 { \
AnnaBridge 156:ff21514d8981 681 .xfer = \
AnnaBridge 156:ff21514d8981 682 { \
AnnaBridge 156:ff21514d8981 683 .structType = ldmaCtrlStructTypeXfer, \
AnnaBridge 156:ff21514d8981 684 .structReq = 1, \
AnnaBridge 156:ff21514d8981 685 .xferCnt = ( count ) - 1, \
AnnaBridge 156:ff21514d8981 686 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 687 .blockSize = ldmaCtrlBlockSizeUnit1, \
AnnaBridge 156:ff21514d8981 688 .doneIfs = 1, \
AnnaBridge 156:ff21514d8981 689 .reqMode = ldmaCtrlReqModeAll, \
AnnaBridge 156:ff21514d8981 690 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 691 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 692 .srcInc = ldmaCtrlSrcIncOne, \
AnnaBridge 156:ff21514d8981 693 .size = ldmaCtrlSizeHalf, \
AnnaBridge 156:ff21514d8981 694 .dstInc = ldmaCtrlDstIncOne, \
AnnaBridge 156:ff21514d8981 695 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
AnnaBridge 156:ff21514d8981 696 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
AnnaBridge 156:ff21514d8981 697 .srcAddr = (uint32_t)(src), \
AnnaBridge 156:ff21514d8981 698 .dstAddr = (uint32_t)(dest), \
AnnaBridge 156:ff21514d8981 699 .linkMode = 0, \
AnnaBridge 156:ff21514d8981 700 .link = 0, \
AnnaBridge 156:ff21514d8981 701 .linkAddr = 0 \
AnnaBridge 156:ff21514d8981 702 } \
AnnaBridge 156:ff21514d8981 703 }
AnnaBridge 156:ff21514d8981 704
AnnaBridge 156:ff21514d8981 705 /**
AnnaBridge 156:ff21514d8981 706 * @brief
AnnaBridge 156:ff21514d8981 707 * DMA descriptor initializer for single memory to memory byte transfer.
AnnaBridge 156:ff21514d8981 708 * @param[in] src Source data address.
AnnaBridge 156:ff21514d8981 709 * @param[in] dest Destination data address.
AnnaBridge 156:ff21514d8981 710 * @param[in] count Number of bytes to transfer.
AnnaBridge 156:ff21514d8981 711 */
AnnaBridge 156:ff21514d8981 712 #define LDMA_DESCRIPTOR_SINGLE_M2M_BYTE(src, dest, count) \
AnnaBridge 156:ff21514d8981 713 { \
AnnaBridge 156:ff21514d8981 714 .xfer = \
AnnaBridge 156:ff21514d8981 715 { \
AnnaBridge 156:ff21514d8981 716 .structType = ldmaCtrlStructTypeXfer, \
AnnaBridge 156:ff21514d8981 717 .structReq = 1, \
AnnaBridge 156:ff21514d8981 718 .xferCnt = (count) - 1, \
AnnaBridge 156:ff21514d8981 719 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 720 .blockSize = ldmaCtrlBlockSizeUnit1, \
AnnaBridge 156:ff21514d8981 721 .doneIfs = 1, \
AnnaBridge 156:ff21514d8981 722 .reqMode = ldmaCtrlReqModeAll, \
AnnaBridge 156:ff21514d8981 723 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 724 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 725 .srcInc = ldmaCtrlSrcIncOne, \
AnnaBridge 156:ff21514d8981 726 .size = ldmaCtrlSizeByte, \
AnnaBridge 156:ff21514d8981 727 .dstInc = ldmaCtrlDstIncOne, \
AnnaBridge 156:ff21514d8981 728 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
AnnaBridge 156:ff21514d8981 729 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
AnnaBridge 156:ff21514d8981 730 .srcAddr = (uint32_t)(src), \
AnnaBridge 156:ff21514d8981 731 .dstAddr = (uint32_t)(dest), \
AnnaBridge 156:ff21514d8981 732 .linkMode = 0, \
AnnaBridge 156:ff21514d8981 733 .link = 0, \
AnnaBridge 156:ff21514d8981 734 .linkAddr = 0 \
AnnaBridge 156:ff21514d8981 735 } \
AnnaBridge 156:ff21514d8981 736 }
AnnaBridge 156:ff21514d8981 737
AnnaBridge 156:ff21514d8981 738 /**
AnnaBridge 156:ff21514d8981 739 * @brief
AnnaBridge 156:ff21514d8981 740 * DMA descriptor initializer for linked memory to memory word transfer.
AnnaBridge 156:ff21514d8981 741 *
AnnaBridge 156:ff21514d8981 742 * The link address must be an absolute address.
AnnaBridge 156:ff21514d8981 743 * @note
AnnaBridge 156:ff21514d8981 744 * The linkAddr member of the transfer descriptor is not
AnnaBridge 156:ff21514d8981 745 * initialized.
AnnaBridge 156:ff21514d8981 746 * @param[in] src Source data address.
AnnaBridge 156:ff21514d8981 747 * @param[in] dest Destination data address.
AnnaBridge 156:ff21514d8981 748 * @param[in] count Number of words to transfer.
AnnaBridge 156:ff21514d8981 749 */
AnnaBridge 156:ff21514d8981 750 #define LDMA_DESCRIPTOR_LINKABS_M2M_WORD(src, dest, count) \
AnnaBridge 156:ff21514d8981 751 { \
AnnaBridge 156:ff21514d8981 752 .xfer = \
AnnaBridge 156:ff21514d8981 753 { \
AnnaBridge 156:ff21514d8981 754 .structType = ldmaCtrlStructTypeXfer, \
AnnaBridge 156:ff21514d8981 755 .structReq = 1, \
AnnaBridge 156:ff21514d8981 756 .xferCnt = (count) - 1, \
AnnaBridge 156:ff21514d8981 757 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 758 .blockSize = ldmaCtrlBlockSizeUnit1, \
AnnaBridge 156:ff21514d8981 759 .doneIfs = 0, \
AnnaBridge 156:ff21514d8981 760 .reqMode = ldmaCtrlReqModeAll, \
AnnaBridge 156:ff21514d8981 761 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 762 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 763 .srcInc = ldmaCtrlSrcIncOne, \
AnnaBridge 156:ff21514d8981 764 .size = ldmaCtrlSizeWord, \
AnnaBridge 156:ff21514d8981 765 .dstInc = ldmaCtrlDstIncOne, \
AnnaBridge 156:ff21514d8981 766 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
AnnaBridge 156:ff21514d8981 767 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
AnnaBridge 156:ff21514d8981 768 .srcAddr = (uint32_t)(src), \
AnnaBridge 156:ff21514d8981 769 .dstAddr = (uint32_t)(dest), \
AnnaBridge 156:ff21514d8981 770 .linkMode = ldmaLinkModeAbs, \
AnnaBridge 156:ff21514d8981 771 .link = 1, \
AnnaBridge 156:ff21514d8981 772 .linkAddr = 0 /* Must be set runtime ! */ \
AnnaBridge 156:ff21514d8981 773 } \
AnnaBridge 156:ff21514d8981 774 }
AnnaBridge 156:ff21514d8981 775
AnnaBridge 156:ff21514d8981 776 /**
AnnaBridge 156:ff21514d8981 777 * @brief
AnnaBridge 156:ff21514d8981 778 * DMA descriptor initializer for linked memory to memory half-word transfer.
AnnaBridge 156:ff21514d8981 779 *
AnnaBridge 156:ff21514d8981 780 * The link address must be an absolute address.
AnnaBridge 156:ff21514d8981 781 * @note
AnnaBridge 156:ff21514d8981 782 * The linkAddr member of the transfer descriptor is not
AnnaBridge 156:ff21514d8981 783 * initialized.
AnnaBridge 156:ff21514d8981 784 * @param[in] src Source data address.
AnnaBridge 156:ff21514d8981 785 * @param[in] dest Destination data address.
AnnaBridge 156:ff21514d8981 786 * @param[in] count Number of half-words to transfer.
AnnaBridge 156:ff21514d8981 787 */
AnnaBridge 156:ff21514d8981 788 #define LDMA_DESCRIPTOR_LINKABS_M2M_HALF(src, dest, count) \
AnnaBridge 156:ff21514d8981 789 { \
AnnaBridge 156:ff21514d8981 790 .xfer = \
AnnaBridge 156:ff21514d8981 791 { \
AnnaBridge 156:ff21514d8981 792 .structType = ldmaCtrlStructTypeXfer, \
AnnaBridge 156:ff21514d8981 793 .structReq = 1, \
AnnaBridge 156:ff21514d8981 794 .xferCnt = (count) - 1, \
AnnaBridge 156:ff21514d8981 795 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 796 .blockSize = ldmaCtrlBlockSizeUnit1, \
AnnaBridge 156:ff21514d8981 797 .doneIfs = 0, \
AnnaBridge 156:ff21514d8981 798 .reqMode = ldmaCtrlReqModeAll, \
AnnaBridge 156:ff21514d8981 799 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 800 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 801 .srcInc = ldmaCtrlSrcIncOne, \
AnnaBridge 156:ff21514d8981 802 .size = ldmaCtrlSizeHalf, \
AnnaBridge 156:ff21514d8981 803 .dstInc = ldmaCtrlDstIncOne, \
AnnaBridge 156:ff21514d8981 804 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
AnnaBridge 156:ff21514d8981 805 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
AnnaBridge 156:ff21514d8981 806 .srcAddr = (uint32_t)(src), \
AnnaBridge 156:ff21514d8981 807 .dstAddr = (uint32_t)(dest), \
AnnaBridge 156:ff21514d8981 808 .linkMode = ldmaLinkModeAbs, \
AnnaBridge 156:ff21514d8981 809 .link = 1, \
AnnaBridge 156:ff21514d8981 810 .linkAddr = 0 /* Must be set runtime ! */ \
AnnaBridge 156:ff21514d8981 811 } \
AnnaBridge 156:ff21514d8981 812 }
AnnaBridge 156:ff21514d8981 813
AnnaBridge 156:ff21514d8981 814 /**
AnnaBridge 156:ff21514d8981 815 * @brief
AnnaBridge 156:ff21514d8981 816 * DMA descriptor initializer for linked memory to memory byte transfer.
AnnaBridge 156:ff21514d8981 817 *
AnnaBridge 156:ff21514d8981 818 * The link address must be an absolute address.
AnnaBridge 156:ff21514d8981 819 * @note
AnnaBridge 156:ff21514d8981 820 * The linkAddr member of the transfer descriptor is not
AnnaBridge 156:ff21514d8981 821 * initialized.
AnnaBridge 156:ff21514d8981 822 * @param[in] src Source data address.
AnnaBridge 156:ff21514d8981 823 * @param[in] dest Destination data address.
AnnaBridge 156:ff21514d8981 824 * @param[in] count Number of bytes to transfer.
AnnaBridge 156:ff21514d8981 825 */
AnnaBridge 156:ff21514d8981 826 #define LDMA_DESCRIPTOR_LINKABS_M2M_BYTE(src, dest, count) \
AnnaBridge 156:ff21514d8981 827 { \
AnnaBridge 156:ff21514d8981 828 .xfer = \
AnnaBridge 156:ff21514d8981 829 { \
AnnaBridge 156:ff21514d8981 830 .structType = ldmaCtrlStructTypeXfer, \
AnnaBridge 156:ff21514d8981 831 .structReq = 1, \
AnnaBridge 156:ff21514d8981 832 .xferCnt = (count) - 1, \
AnnaBridge 156:ff21514d8981 833 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 834 .blockSize = ldmaCtrlBlockSizeUnit1, \
AnnaBridge 156:ff21514d8981 835 .doneIfs = 0, \
AnnaBridge 156:ff21514d8981 836 .reqMode = ldmaCtrlReqModeAll, \
AnnaBridge 156:ff21514d8981 837 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 838 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 839 .srcInc = ldmaCtrlSrcIncOne, \
AnnaBridge 156:ff21514d8981 840 .size = ldmaCtrlSizeByte, \
AnnaBridge 156:ff21514d8981 841 .dstInc = ldmaCtrlDstIncOne, \
AnnaBridge 156:ff21514d8981 842 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
AnnaBridge 156:ff21514d8981 843 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
AnnaBridge 156:ff21514d8981 844 .srcAddr = (uint32_t)(src), \
AnnaBridge 156:ff21514d8981 845 .dstAddr = (uint32_t)(dest), \
AnnaBridge 156:ff21514d8981 846 .linkMode = ldmaLinkModeAbs, \
AnnaBridge 156:ff21514d8981 847 .link = 1, \
AnnaBridge 156:ff21514d8981 848 .linkAddr = 0 /* Must be set runtime ! */ \
AnnaBridge 156:ff21514d8981 849 } \
AnnaBridge 156:ff21514d8981 850 }
AnnaBridge 156:ff21514d8981 851
AnnaBridge 156:ff21514d8981 852 /**
AnnaBridge 156:ff21514d8981 853 * @brief
AnnaBridge 156:ff21514d8981 854 * DMA descriptor initializer for linked memory to memory word transfer.
AnnaBridge 156:ff21514d8981 855 *
AnnaBridge 156:ff21514d8981 856 * The link address is a relative address.
AnnaBridge 156:ff21514d8981 857 * @note
AnnaBridge 156:ff21514d8981 858 * The linkAddr member of the transfer descriptor is
AnnaBridge 156:ff21514d8981 859 * initialized to 4, assuming that the next descriptor immediately follows
AnnaBridge 156:ff21514d8981 860 * this descriptor (in memory).
AnnaBridge 156:ff21514d8981 861 * @param[in] src Source data address.
AnnaBridge 156:ff21514d8981 862 * @param[in] dest Destination data address.
AnnaBridge 156:ff21514d8981 863 * @param[in] count Number of words to transfer.
AnnaBridge 156:ff21514d8981 864 * @param[in] linkjmp Address of descriptor to link to expressed as a
AnnaBridge 156:ff21514d8981 865 * signed number of descriptors from "here".
AnnaBridge 156:ff21514d8981 866 * 1=one descriptor forward in memory,
AnnaBridge 156:ff21514d8981 867 * 0=one this descriptor,
AnnaBridge 156:ff21514d8981 868 * -1=one descriptor back in memory.
AnnaBridge 156:ff21514d8981 869 */
AnnaBridge 156:ff21514d8981 870 #define LDMA_DESCRIPTOR_LINKREL_M2M_WORD(src, dest, count, linkjmp) \
AnnaBridge 156:ff21514d8981 871 { \
AnnaBridge 156:ff21514d8981 872 .xfer = \
AnnaBridge 156:ff21514d8981 873 { \
AnnaBridge 156:ff21514d8981 874 .structType = ldmaCtrlStructTypeXfer, \
AnnaBridge 156:ff21514d8981 875 .structReq = 1, \
AnnaBridge 156:ff21514d8981 876 .xferCnt = (count) - 1, \
AnnaBridge 156:ff21514d8981 877 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 878 .blockSize = ldmaCtrlBlockSizeUnit1, \
AnnaBridge 156:ff21514d8981 879 .doneIfs = 0, \
AnnaBridge 156:ff21514d8981 880 .reqMode = ldmaCtrlReqModeAll, \
AnnaBridge 156:ff21514d8981 881 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 882 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 883 .srcInc = ldmaCtrlSrcIncOne, \
AnnaBridge 156:ff21514d8981 884 .size = ldmaCtrlSizeWord, \
AnnaBridge 156:ff21514d8981 885 .dstInc = ldmaCtrlDstIncOne, \
AnnaBridge 156:ff21514d8981 886 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
AnnaBridge 156:ff21514d8981 887 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
AnnaBridge 156:ff21514d8981 888 .srcAddr = (uint32_t)(src), \
AnnaBridge 156:ff21514d8981 889 .dstAddr = (uint32_t)(dest), \
AnnaBridge 156:ff21514d8981 890 .linkMode = ldmaLinkModeRel, \
AnnaBridge 156:ff21514d8981 891 .link = 1, \
AnnaBridge 156:ff21514d8981 892 .linkAddr = (linkjmp) * 4 \
AnnaBridge 156:ff21514d8981 893 } \
AnnaBridge 156:ff21514d8981 894 }
AnnaBridge 156:ff21514d8981 895
AnnaBridge 156:ff21514d8981 896 /**
AnnaBridge 156:ff21514d8981 897 * @brief
AnnaBridge 156:ff21514d8981 898 * DMA descriptor initializer for linked memory to memory half-word transfer.
AnnaBridge 156:ff21514d8981 899 *
AnnaBridge 156:ff21514d8981 900 * The link address is a relative address.
AnnaBridge 156:ff21514d8981 901 * @note
AnnaBridge 156:ff21514d8981 902 * The linkAddr member of the transfer descriptor is
AnnaBridge 156:ff21514d8981 903 * initialized to 4, assuming that the next descriptor immediately follows
AnnaBridge 156:ff21514d8981 904 * this descriptor (in memory).
AnnaBridge 156:ff21514d8981 905 * @param[in] src Source data address.
AnnaBridge 156:ff21514d8981 906 * @param[in] dest Destination data address.
AnnaBridge 156:ff21514d8981 907 * @param[in] count Number of half-words to transfer.
AnnaBridge 156:ff21514d8981 908 * @param[in] linkjmp Address of descriptor to link to expressed as a
AnnaBridge 156:ff21514d8981 909 * signed number of descriptors from "here".
AnnaBridge 156:ff21514d8981 910 * 1=one descriptor forward in memory,
AnnaBridge 156:ff21514d8981 911 * 0=one this descriptor,
AnnaBridge 156:ff21514d8981 912 * -1=one descriptor back in memory.
AnnaBridge 156:ff21514d8981 913 */
AnnaBridge 156:ff21514d8981 914 #define LDMA_DESCRIPTOR_LINKREL_M2M_HALF(src, dest, count, linkjmp) \
AnnaBridge 156:ff21514d8981 915 { \
AnnaBridge 156:ff21514d8981 916 .xfer = \
AnnaBridge 156:ff21514d8981 917 { \
AnnaBridge 156:ff21514d8981 918 .structType = ldmaCtrlStructTypeXfer, \
AnnaBridge 156:ff21514d8981 919 .structReq = 1, \
AnnaBridge 156:ff21514d8981 920 .xferCnt = (count) - 1, \
AnnaBridge 156:ff21514d8981 921 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 922 .blockSize = ldmaCtrlBlockSizeUnit1, \
AnnaBridge 156:ff21514d8981 923 .doneIfs = 0, \
AnnaBridge 156:ff21514d8981 924 .reqMode = ldmaCtrlReqModeAll, \
AnnaBridge 156:ff21514d8981 925 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 926 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 927 .srcInc = ldmaCtrlSrcIncOne, \
AnnaBridge 156:ff21514d8981 928 .size = ldmaCtrlSizeHalf, \
AnnaBridge 156:ff21514d8981 929 .dstInc = ldmaCtrlDstIncOne, \
AnnaBridge 156:ff21514d8981 930 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
AnnaBridge 156:ff21514d8981 931 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
AnnaBridge 156:ff21514d8981 932 .srcAddr = (uint32_t)(src), \
AnnaBridge 156:ff21514d8981 933 .dstAddr = (uint32_t)(dest), \
AnnaBridge 156:ff21514d8981 934 .linkMode = ldmaLinkModeRel, \
AnnaBridge 156:ff21514d8981 935 .link = 1, \
AnnaBridge 156:ff21514d8981 936 .linkAddr = (linkjmp) * 4 \
AnnaBridge 156:ff21514d8981 937 } \
AnnaBridge 156:ff21514d8981 938 }
AnnaBridge 156:ff21514d8981 939
AnnaBridge 156:ff21514d8981 940 /**
AnnaBridge 156:ff21514d8981 941 * @brief
AnnaBridge 156:ff21514d8981 942 * DMA descriptor initializer for linked memory to memory byte transfer.
AnnaBridge 156:ff21514d8981 943 *
AnnaBridge 156:ff21514d8981 944 * The link address is a relative address.
AnnaBridge 156:ff21514d8981 945 * @note
AnnaBridge 156:ff21514d8981 946 * The linkAddr member of the transfer descriptor is
AnnaBridge 156:ff21514d8981 947 * initialized to 4, assuming that the next descriptor immediately follows
AnnaBridge 156:ff21514d8981 948 * this descriptor (in memory).
AnnaBridge 156:ff21514d8981 949 * @param[in] src Source data address.
AnnaBridge 156:ff21514d8981 950 * @param[in] dest Destination data address.
AnnaBridge 156:ff21514d8981 951 * @param[in] count Number of bytes to transfer.
AnnaBridge 156:ff21514d8981 952 * @param[in] linkjmp Address of descriptor to link to expressed as a
AnnaBridge 156:ff21514d8981 953 * signed number of descriptors from "here".
AnnaBridge 156:ff21514d8981 954 * 1=one descriptor forward in memory,
AnnaBridge 156:ff21514d8981 955 * 0=one this descriptor,
AnnaBridge 156:ff21514d8981 956 * -1=one descriptor back in memory.
AnnaBridge 156:ff21514d8981 957 */
AnnaBridge 156:ff21514d8981 958 #define LDMA_DESCRIPTOR_LINKREL_M2M_BYTE(src, dest, count, linkjmp) \
AnnaBridge 156:ff21514d8981 959 { \
AnnaBridge 156:ff21514d8981 960 .xfer = \
AnnaBridge 156:ff21514d8981 961 { \
AnnaBridge 156:ff21514d8981 962 .structType = ldmaCtrlStructTypeXfer, \
AnnaBridge 156:ff21514d8981 963 .structReq = 1, \
AnnaBridge 156:ff21514d8981 964 .xferCnt = (count) - 1, \
AnnaBridge 156:ff21514d8981 965 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 966 .blockSize = ldmaCtrlBlockSizeUnit1, \
AnnaBridge 156:ff21514d8981 967 .doneIfs = 0, \
AnnaBridge 156:ff21514d8981 968 .reqMode = ldmaCtrlReqModeAll, \
AnnaBridge 156:ff21514d8981 969 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 970 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 971 .srcInc = ldmaCtrlSrcIncOne, \
AnnaBridge 156:ff21514d8981 972 .size = ldmaCtrlSizeByte, \
AnnaBridge 156:ff21514d8981 973 .dstInc = ldmaCtrlDstIncOne, \
AnnaBridge 156:ff21514d8981 974 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
AnnaBridge 156:ff21514d8981 975 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
AnnaBridge 156:ff21514d8981 976 .srcAddr = (uint32_t)(src), \
AnnaBridge 156:ff21514d8981 977 .dstAddr = (uint32_t)(dest), \
AnnaBridge 156:ff21514d8981 978 .linkMode = ldmaLinkModeRel, \
AnnaBridge 156:ff21514d8981 979 .link = 1, \
AnnaBridge 156:ff21514d8981 980 .linkAddr = (linkjmp) * 4 \
AnnaBridge 156:ff21514d8981 981 } \
AnnaBridge 156:ff21514d8981 982 }
AnnaBridge 156:ff21514d8981 983
AnnaBridge 156:ff21514d8981 984 /**
AnnaBridge 156:ff21514d8981 985 * @brief
AnnaBridge 156:ff21514d8981 986 * DMA descriptor initializer for byte transfers from a peripheral to memory.
AnnaBridge 156:ff21514d8981 987 * @param[in] src Peripheral data source register address.
AnnaBridge 156:ff21514d8981 988 * @param[in] dest Destination data address.
AnnaBridge 156:ff21514d8981 989 * @param[in] count Number of bytes to transfer.
AnnaBridge 156:ff21514d8981 990 */
AnnaBridge 156:ff21514d8981 991 #define LDMA_DESCRIPTOR_SINGLE_P2M_BYTE(src, dest, count) \
AnnaBridge 156:ff21514d8981 992 { \
AnnaBridge 156:ff21514d8981 993 .xfer = \
AnnaBridge 156:ff21514d8981 994 { \
AnnaBridge 156:ff21514d8981 995 .structType = ldmaCtrlStructTypeXfer, \
AnnaBridge 156:ff21514d8981 996 .structReq = 0, \
AnnaBridge 156:ff21514d8981 997 .xferCnt = (count) - 1, \
AnnaBridge 156:ff21514d8981 998 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 999 .blockSize = ldmaCtrlBlockSizeUnit1, \
AnnaBridge 156:ff21514d8981 1000 .doneIfs = 1, \
AnnaBridge 156:ff21514d8981 1001 .reqMode = ldmaCtrlReqModeBlock, \
AnnaBridge 156:ff21514d8981 1002 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 1003 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 1004 .srcInc = ldmaCtrlSrcIncNone, \
AnnaBridge 156:ff21514d8981 1005 .size = ldmaCtrlSizeByte, \
AnnaBridge 156:ff21514d8981 1006 .dstInc = ldmaCtrlDstIncOne, \
AnnaBridge 156:ff21514d8981 1007 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
AnnaBridge 156:ff21514d8981 1008 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
AnnaBridge 156:ff21514d8981 1009 .srcAddr = (uint32_t)(src), \
AnnaBridge 156:ff21514d8981 1010 .dstAddr = (uint32_t)(dest), \
AnnaBridge 156:ff21514d8981 1011 .linkMode = 0, \
AnnaBridge 156:ff21514d8981 1012 .link = 0, \
AnnaBridge 156:ff21514d8981 1013 .linkAddr = 0 \
AnnaBridge 156:ff21514d8981 1014 } \
AnnaBridge 156:ff21514d8981 1015 }
AnnaBridge 156:ff21514d8981 1016
AnnaBridge 156:ff21514d8981 1017 /**
AnnaBridge 156:ff21514d8981 1018 * @brief
AnnaBridge 156:ff21514d8981 1019 * DMA descriptor initializer for byte transfers from a peripheral to a peripheral.
AnnaBridge 156:ff21514d8981 1020 * @param[in] src Peripheral data source register address.
AnnaBridge 156:ff21514d8981 1021 * @param[in] dest Peripheral data destination register address.
AnnaBridge 156:ff21514d8981 1022 * @param[in] count Number of bytes to transfer.
AnnaBridge 156:ff21514d8981 1023 */
AnnaBridge 156:ff21514d8981 1024 #define LDMA_DESCRIPTOR_SINGLE_P2P_BYTE(src, dest, count) \
AnnaBridge 156:ff21514d8981 1025 { \
AnnaBridge 156:ff21514d8981 1026 .xfer = \
AnnaBridge 156:ff21514d8981 1027 { \
AnnaBridge 156:ff21514d8981 1028 .structType = ldmaCtrlStructTypeXfer, \
AnnaBridge 156:ff21514d8981 1029 .structReq = 0, \
AnnaBridge 156:ff21514d8981 1030 .xferCnt = (count) - 1, \
AnnaBridge 156:ff21514d8981 1031 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 1032 .blockSize = ldmaCtrlBlockSizeUnit1, \
AnnaBridge 156:ff21514d8981 1033 .doneIfs = 1, \
AnnaBridge 156:ff21514d8981 1034 .reqMode = ldmaCtrlReqModeBlock, \
AnnaBridge 156:ff21514d8981 1035 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 1036 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 1037 .srcInc = ldmaCtrlSrcIncNone, \
AnnaBridge 156:ff21514d8981 1038 .size = ldmaCtrlSizeByte, \
AnnaBridge 156:ff21514d8981 1039 .dstInc = ldmaCtrlDstIncNone, \
AnnaBridge 156:ff21514d8981 1040 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
AnnaBridge 156:ff21514d8981 1041 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
AnnaBridge 156:ff21514d8981 1042 .srcAddr = (uint32_t)(src), \
AnnaBridge 156:ff21514d8981 1043 .dstAddr = (uint32_t)(dest), \
AnnaBridge 156:ff21514d8981 1044 .linkMode = 0, \
AnnaBridge 156:ff21514d8981 1045 .link = 0, \
AnnaBridge 156:ff21514d8981 1046 .linkAddr = 0 \
AnnaBridge 156:ff21514d8981 1047 } \
AnnaBridge 156:ff21514d8981 1048 }
AnnaBridge 156:ff21514d8981 1049
AnnaBridge 156:ff21514d8981 1050 /**
AnnaBridge 156:ff21514d8981 1051 * @brief
AnnaBridge 156:ff21514d8981 1052 * DMA descriptor initializer for byte transfers from memory to a peripheral
AnnaBridge 156:ff21514d8981 1053 * @param[in] src Source data address.
AnnaBridge 156:ff21514d8981 1054 * @param[in] dest Peripheral data register destination address.
AnnaBridge 156:ff21514d8981 1055 * @param[in] count Number of bytes to transfer.
AnnaBridge 156:ff21514d8981 1056 */
AnnaBridge 156:ff21514d8981 1057 #define LDMA_DESCRIPTOR_SINGLE_M2P_BYTE(src, dest, count) \
AnnaBridge 156:ff21514d8981 1058 { \
AnnaBridge 156:ff21514d8981 1059 .xfer = \
AnnaBridge 156:ff21514d8981 1060 { \
AnnaBridge 156:ff21514d8981 1061 .structType = ldmaCtrlStructTypeXfer, \
AnnaBridge 156:ff21514d8981 1062 .structReq = 0, \
AnnaBridge 156:ff21514d8981 1063 .xferCnt = (count) - 1, \
AnnaBridge 156:ff21514d8981 1064 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 1065 .blockSize = ldmaCtrlBlockSizeUnit1, \
AnnaBridge 156:ff21514d8981 1066 .doneIfs = 1, \
AnnaBridge 156:ff21514d8981 1067 .reqMode = ldmaCtrlReqModeBlock, \
AnnaBridge 156:ff21514d8981 1068 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 1069 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 1070 .srcInc = ldmaCtrlSrcIncOne, \
AnnaBridge 156:ff21514d8981 1071 .size = ldmaCtrlSizeByte, \
AnnaBridge 156:ff21514d8981 1072 .dstInc = ldmaCtrlDstIncNone, \
AnnaBridge 156:ff21514d8981 1073 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
AnnaBridge 156:ff21514d8981 1074 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
AnnaBridge 156:ff21514d8981 1075 .srcAddr = (uint32_t)(src), \
AnnaBridge 156:ff21514d8981 1076 .dstAddr = (uint32_t)(dest), \
AnnaBridge 156:ff21514d8981 1077 .linkMode = 0, \
AnnaBridge 156:ff21514d8981 1078 .link = 0, \
AnnaBridge 156:ff21514d8981 1079 .linkAddr = 0 \
AnnaBridge 156:ff21514d8981 1080 } \
AnnaBridge 156:ff21514d8981 1081 }
AnnaBridge 156:ff21514d8981 1082
AnnaBridge 156:ff21514d8981 1083 /**
AnnaBridge 156:ff21514d8981 1084 * @brief
AnnaBridge 156:ff21514d8981 1085 * DMA descriptor initializer for byte transfers from a peripheral to memory.
AnnaBridge 156:ff21514d8981 1086 * @param[in] src Peripheral data source register address.
AnnaBridge 156:ff21514d8981 1087 * @param[in] dest Destination data address.
AnnaBridge 156:ff21514d8981 1088 * @param[in] count Number of bytes to transfer.
AnnaBridge 156:ff21514d8981 1089 * @param[in] linkjmp Address of descriptor to link to expressed as a
AnnaBridge 156:ff21514d8981 1090 * signed number of descriptors from "here".
AnnaBridge 156:ff21514d8981 1091 * 1=one descriptor forward in memory,
AnnaBridge 156:ff21514d8981 1092 * 0=one this descriptor,
AnnaBridge 156:ff21514d8981 1093 * -1=one descriptor back in memory.
AnnaBridge 156:ff21514d8981 1094 */
AnnaBridge 156:ff21514d8981 1095 #define LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(src, dest, count, linkjmp) \
AnnaBridge 156:ff21514d8981 1096 { \
AnnaBridge 156:ff21514d8981 1097 .xfer = \
AnnaBridge 156:ff21514d8981 1098 { \
AnnaBridge 156:ff21514d8981 1099 .structType = ldmaCtrlStructTypeXfer, \
AnnaBridge 156:ff21514d8981 1100 .structReq = 0, \
AnnaBridge 156:ff21514d8981 1101 .xferCnt = (count) - 1, \
AnnaBridge 156:ff21514d8981 1102 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 1103 .blockSize = ldmaCtrlBlockSizeUnit1, \
AnnaBridge 156:ff21514d8981 1104 .doneIfs = 1, \
AnnaBridge 156:ff21514d8981 1105 .reqMode = ldmaCtrlReqModeBlock, \
AnnaBridge 156:ff21514d8981 1106 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 1107 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 1108 .srcInc = ldmaCtrlSrcIncNone, \
AnnaBridge 156:ff21514d8981 1109 .size = ldmaCtrlSizeByte, \
AnnaBridge 156:ff21514d8981 1110 .dstInc = ldmaCtrlDstIncOne, \
AnnaBridge 156:ff21514d8981 1111 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
AnnaBridge 156:ff21514d8981 1112 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
AnnaBridge 156:ff21514d8981 1113 .srcAddr = (uint32_t)(src), \
AnnaBridge 156:ff21514d8981 1114 .dstAddr = (uint32_t)(dest), \
AnnaBridge 156:ff21514d8981 1115 .linkMode = ldmaLinkModeRel, \
AnnaBridge 156:ff21514d8981 1116 .link = 1, \
AnnaBridge 156:ff21514d8981 1117 .linkAddr = (linkjmp) * 4 \
AnnaBridge 156:ff21514d8981 1118 } \
AnnaBridge 156:ff21514d8981 1119 }
AnnaBridge 156:ff21514d8981 1120
AnnaBridge 156:ff21514d8981 1121 /**
AnnaBridge 156:ff21514d8981 1122 * @brief
AnnaBridge 156:ff21514d8981 1123 * DMA descriptor initializer for byte transfers from memory to a peripheral
AnnaBridge 156:ff21514d8981 1124 * @param[in] src Source data address.
AnnaBridge 156:ff21514d8981 1125 * @param[in] dest Peripheral data register destination address.
AnnaBridge 156:ff21514d8981 1126 * @param[in] count Number of bytes to transfer.
AnnaBridge 156:ff21514d8981 1127 * @param[in] linkjmp Address of descriptor to link to expressed as a
AnnaBridge 156:ff21514d8981 1128 * signed number of descriptors from "here".
AnnaBridge 156:ff21514d8981 1129 * 1=one descriptor forward in memory,
AnnaBridge 156:ff21514d8981 1130 * 0=one this descriptor,
AnnaBridge 156:ff21514d8981 1131 * -1=one descriptor back in memory.
AnnaBridge 156:ff21514d8981 1132 */
AnnaBridge 156:ff21514d8981 1133 #define LDMA_DESCRIPTOR_LINKREL_M2P_BYTE(src, dest, count, linkjmp) \
AnnaBridge 156:ff21514d8981 1134 { \
AnnaBridge 156:ff21514d8981 1135 .xfer = \
AnnaBridge 156:ff21514d8981 1136 { \
AnnaBridge 156:ff21514d8981 1137 .structType = ldmaCtrlStructTypeXfer, \
AnnaBridge 156:ff21514d8981 1138 .structReq = 0, \
AnnaBridge 156:ff21514d8981 1139 .xferCnt = (count) - 1, \
AnnaBridge 156:ff21514d8981 1140 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 1141 .blockSize = ldmaCtrlBlockSizeUnit1, \
AnnaBridge 156:ff21514d8981 1142 .doneIfs = 1, \
AnnaBridge 156:ff21514d8981 1143 .reqMode = ldmaCtrlReqModeBlock, \
AnnaBridge 156:ff21514d8981 1144 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 1145 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 1146 .srcInc = ldmaCtrlSrcIncOne, \
AnnaBridge 156:ff21514d8981 1147 .size = ldmaCtrlSizeByte, \
AnnaBridge 156:ff21514d8981 1148 .dstInc = ldmaCtrlDstIncNone, \
AnnaBridge 156:ff21514d8981 1149 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
AnnaBridge 156:ff21514d8981 1150 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
AnnaBridge 156:ff21514d8981 1151 .srcAddr = (uint32_t)(src), \
AnnaBridge 156:ff21514d8981 1152 .dstAddr = (uint32_t)(dest), \
AnnaBridge 156:ff21514d8981 1153 .linkMode = ldmaLinkModeRel, \
AnnaBridge 156:ff21514d8981 1154 .link = 1, \
AnnaBridge 156:ff21514d8981 1155 .linkAddr = (linkjmp) * 4 \
AnnaBridge 156:ff21514d8981 1156 } \
AnnaBridge 156:ff21514d8981 1157 }
AnnaBridge 156:ff21514d8981 1158
AnnaBridge 156:ff21514d8981 1159 /**
AnnaBridge 156:ff21514d8981 1160 * @brief
AnnaBridge 156:ff21514d8981 1161 * DMA descriptor initializer for Immediate WRITE transfer
AnnaBridge 156:ff21514d8981 1162 * @param[in] value Immediate value to write.
AnnaBridge 156:ff21514d8981 1163 * @param[in] address Write sddress.
AnnaBridge 156:ff21514d8981 1164 */
AnnaBridge 156:ff21514d8981 1165 #define LDMA_DESCRIPTOR_SINGLE_WRITE(value, address) \
AnnaBridge 156:ff21514d8981 1166 { \
AnnaBridge 156:ff21514d8981 1167 .wri = \
AnnaBridge 156:ff21514d8981 1168 { \
AnnaBridge 156:ff21514d8981 1169 .structType = ldmaCtrlStructTypeWrite, \
AnnaBridge 156:ff21514d8981 1170 .structReq = 1, \
AnnaBridge 156:ff21514d8981 1171 .xferCnt = 0, \
AnnaBridge 156:ff21514d8981 1172 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 1173 .blockSize = 0, \
AnnaBridge 156:ff21514d8981 1174 .doneIfs = 1, \
AnnaBridge 156:ff21514d8981 1175 .reqMode = 0, \
AnnaBridge 156:ff21514d8981 1176 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 1177 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 1178 .srcInc = 0, \
AnnaBridge 156:ff21514d8981 1179 .size = 0, \
AnnaBridge 156:ff21514d8981 1180 .dstInc = 0, \
AnnaBridge 156:ff21514d8981 1181 .srcAddrMode = 0, \
AnnaBridge 156:ff21514d8981 1182 .dstAddrMode = 0, \
AnnaBridge 156:ff21514d8981 1183 .immVal = (value), \
AnnaBridge 156:ff21514d8981 1184 .dstAddr = (uint32_t)(address), \
AnnaBridge 156:ff21514d8981 1185 .linkMode = 0, \
AnnaBridge 156:ff21514d8981 1186 .link = 0, \
AnnaBridge 156:ff21514d8981 1187 .linkAddr = 0 \
AnnaBridge 156:ff21514d8981 1188 } \
AnnaBridge 156:ff21514d8981 1189 }
AnnaBridge 156:ff21514d8981 1190
AnnaBridge 156:ff21514d8981 1191 /**
AnnaBridge 156:ff21514d8981 1192 * @brief
AnnaBridge 156:ff21514d8981 1193 * DMA descriptor initializer for Immediate WRITE transfer
AnnaBridge 156:ff21514d8981 1194 *
AnnaBridge 156:ff21514d8981 1195 * The link address must be an absolute address.
AnnaBridge 156:ff21514d8981 1196 * @note
AnnaBridge 156:ff21514d8981 1197 * The linkAddr member of the transfer descriptor is not
AnnaBridge 156:ff21514d8981 1198 * initialized.
AnnaBridge 156:ff21514d8981 1199 * @param[in] value Immediate value to write.
AnnaBridge 156:ff21514d8981 1200 * @param[in] address Write sddress.
AnnaBridge 156:ff21514d8981 1201 */
AnnaBridge 156:ff21514d8981 1202 #define LDMA_DESCRIPTOR_LINKABS_WRITE(value, address) \
AnnaBridge 156:ff21514d8981 1203 { \
AnnaBridge 156:ff21514d8981 1204 .wri = \
AnnaBridge 156:ff21514d8981 1205 { \
AnnaBridge 156:ff21514d8981 1206 .structType = ldmaCtrlStructTypeWrite, \
AnnaBridge 156:ff21514d8981 1207 .structReq = 1, \
AnnaBridge 156:ff21514d8981 1208 .xferCnt = 0, \
AnnaBridge 156:ff21514d8981 1209 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 1210 .blockSize = 0, \
AnnaBridge 156:ff21514d8981 1211 .doneIfs = 0, \
AnnaBridge 156:ff21514d8981 1212 .reqMode = 0, \
AnnaBridge 156:ff21514d8981 1213 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 1214 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 1215 .srcInc = 0, \
AnnaBridge 156:ff21514d8981 1216 .size = 0, \
AnnaBridge 156:ff21514d8981 1217 .dstInc = 0, \
AnnaBridge 156:ff21514d8981 1218 .srcAddrMode = 0, \
AnnaBridge 156:ff21514d8981 1219 .dstAddrMode = 0, \
AnnaBridge 156:ff21514d8981 1220 .immVal = (value), \
AnnaBridge 156:ff21514d8981 1221 .dstAddr = (uint32_t)(address), \
AnnaBridge 156:ff21514d8981 1222 .linkMode = ldmaLinkModeAbs, \
AnnaBridge 156:ff21514d8981 1223 .link = 1, \
AnnaBridge 156:ff21514d8981 1224 .linkAddr = 0 /* Must be set runtime ! */ \
AnnaBridge 156:ff21514d8981 1225 } \
AnnaBridge 156:ff21514d8981 1226 }
AnnaBridge 156:ff21514d8981 1227
AnnaBridge 156:ff21514d8981 1228 /**
AnnaBridge 156:ff21514d8981 1229 * @brief
AnnaBridge 156:ff21514d8981 1230 * DMA descriptor initializer for Immediate WRITE transfer
AnnaBridge 156:ff21514d8981 1231 * @param[in] value Immediate value to write.
AnnaBridge 156:ff21514d8981 1232 * @param[in] address Write sddress.
AnnaBridge 156:ff21514d8981 1233 * @param[in] linkjmp Address of descriptor to link to expressed as a
AnnaBridge 156:ff21514d8981 1234 * signed number of descriptors from "here".
AnnaBridge 156:ff21514d8981 1235 * 1=one descriptor forward in memory,
AnnaBridge 156:ff21514d8981 1236 * 0=one this descriptor,
AnnaBridge 156:ff21514d8981 1237 * -1=one descriptor back in memory.
AnnaBridge 156:ff21514d8981 1238 */
AnnaBridge 156:ff21514d8981 1239 #define LDMA_DESCRIPTOR_LINKREL_WRITE(value, address, linkjmp) \
AnnaBridge 156:ff21514d8981 1240 { \
AnnaBridge 156:ff21514d8981 1241 .wri = \
AnnaBridge 156:ff21514d8981 1242 { \
AnnaBridge 156:ff21514d8981 1243 .structType = ldmaCtrlStructTypeWrite, \
AnnaBridge 156:ff21514d8981 1244 .structReq = 1, \
AnnaBridge 156:ff21514d8981 1245 .xferCnt = 0, \
AnnaBridge 156:ff21514d8981 1246 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 1247 .blockSize = 0, \
AnnaBridge 156:ff21514d8981 1248 .doneIfs = 0, \
AnnaBridge 156:ff21514d8981 1249 .reqMode = 0, \
AnnaBridge 156:ff21514d8981 1250 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 1251 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 1252 .srcInc = 0, \
AnnaBridge 156:ff21514d8981 1253 .size = 0, \
AnnaBridge 156:ff21514d8981 1254 .dstInc = 0, \
AnnaBridge 156:ff21514d8981 1255 .srcAddrMode = 0, \
AnnaBridge 156:ff21514d8981 1256 .dstAddrMode = 0, \
AnnaBridge 156:ff21514d8981 1257 .immVal = (value), \
AnnaBridge 156:ff21514d8981 1258 .dstAddr = (uint32_t)(address), \
AnnaBridge 156:ff21514d8981 1259 .linkMode = ldmaLinkModeRel, \
AnnaBridge 156:ff21514d8981 1260 .link = 1, \
AnnaBridge 156:ff21514d8981 1261 .linkAddr = (linkjmp) * 4 \
AnnaBridge 156:ff21514d8981 1262 } \
AnnaBridge 156:ff21514d8981 1263 }
AnnaBridge 156:ff21514d8981 1264
AnnaBridge 156:ff21514d8981 1265 /**
AnnaBridge 156:ff21514d8981 1266 * @brief
AnnaBridge 156:ff21514d8981 1267 * DMA descriptor initializer for SYNC transfer
AnnaBridge 156:ff21514d8981 1268 * @param[in] set Sync pattern bits to set.
AnnaBridge 156:ff21514d8981 1269 * @param[in] clr Sync pattern bits to clear.
AnnaBridge 156:ff21514d8981 1270 * @param[in] matchValue Sync pattern to match.
AnnaBridge 156:ff21514d8981 1271 * @param[in] matchEnable Sync pattern bits to enable for match.
AnnaBridge 156:ff21514d8981 1272 */
AnnaBridge 156:ff21514d8981 1273 #define LDMA_DESCRIPTOR_SINGLE_SYNC(set, clr, matchValue, matchEnable) \
AnnaBridge 156:ff21514d8981 1274 { \
AnnaBridge 156:ff21514d8981 1275 .sync = \
AnnaBridge 156:ff21514d8981 1276 { \
AnnaBridge 156:ff21514d8981 1277 .structType = ldmaCtrlStructTypeSync, \
AnnaBridge 156:ff21514d8981 1278 .structReq = 1, \
AnnaBridge 156:ff21514d8981 1279 .xferCnt = 0, \
AnnaBridge 156:ff21514d8981 1280 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 1281 .blockSize = 0, \
AnnaBridge 156:ff21514d8981 1282 .doneIfs = 1, \
AnnaBridge 156:ff21514d8981 1283 .reqMode = 0, \
AnnaBridge 156:ff21514d8981 1284 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 1285 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 1286 .srcInc = 0, \
AnnaBridge 156:ff21514d8981 1287 .size = 0, \
AnnaBridge 156:ff21514d8981 1288 .dstInc = 0, \
AnnaBridge 156:ff21514d8981 1289 .srcAddrMode = 0, \
AnnaBridge 156:ff21514d8981 1290 .dstAddrMode = 0, \
AnnaBridge 156:ff21514d8981 1291 .syncSet = (set), \
AnnaBridge 156:ff21514d8981 1292 .syncClr = (clr), \
AnnaBridge 156:ff21514d8981 1293 .matchVal = (matchValue), \
AnnaBridge 156:ff21514d8981 1294 .matchEn = (matchEnable), \
AnnaBridge 156:ff21514d8981 1295 .linkMode = 0, \
AnnaBridge 156:ff21514d8981 1296 .link = 0, \
AnnaBridge 156:ff21514d8981 1297 .linkAddr = 0 \
AnnaBridge 156:ff21514d8981 1298 } \
AnnaBridge 156:ff21514d8981 1299 }
AnnaBridge 156:ff21514d8981 1300
AnnaBridge 156:ff21514d8981 1301 /**
AnnaBridge 156:ff21514d8981 1302 * @brief
AnnaBridge 156:ff21514d8981 1303 * DMA descriptor initializer for SYNC transfer
AnnaBridge 156:ff21514d8981 1304 *
AnnaBridge 156:ff21514d8981 1305 * The link address must be an absolute address.
AnnaBridge 156:ff21514d8981 1306 * @note
AnnaBridge 156:ff21514d8981 1307 * The linkAddr member of the transfer descriptor is not
AnnaBridge 156:ff21514d8981 1308 * initialized.
AnnaBridge 156:ff21514d8981 1309 * @param[in] set Sync pattern bits to set.
AnnaBridge 156:ff21514d8981 1310 * @param[in] clr Sync pattern bits to clear.
AnnaBridge 156:ff21514d8981 1311 * @param[in] matchValue Sync pattern to match.
AnnaBridge 156:ff21514d8981 1312 * @param[in] matchEnable Sync pattern bits to enable for match.
AnnaBridge 156:ff21514d8981 1313 */
AnnaBridge 156:ff21514d8981 1314 #define LDMA_DESCRIPTOR_LINKABS_SYNC(set, clr, matchValue, matchEnable) \
AnnaBridge 156:ff21514d8981 1315 { \
AnnaBridge 156:ff21514d8981 1316 .sync = \
AnnaBridge 156:ff21514d8981 1317 { \
AnnaBridge 156:ff21514d8981 1318 .structType = ldmaCtrlStructTypeSync, \
AnnaBridge 156:ff21514d8981 1319 .structReq = 1, \
AnnaBridge 156:ff21514d8981 1320 .xferCnt = 0, \
AnnaBridge 156:ff21514d8981 1321 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 1322 .blockSize = 0, \
AnnaBridge 156:ff21514d8981 1323 .doneIfs = 0, \
AnnaBridge 156:ff21514d8981 1324 .reqMode = 0, \
AnnaBridge 156:ff21514d8981 1325 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 1326 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 1327 .srcInc = 0, \
AnnaBridge 156:ff21514d8981 1328 .size = 0, \
AnnaBridge 156:ff21514d8981 1329 .dstInc = 0, \
AnnaBridge 156:ff21514d8981 1330 .srcAddrMode = 0, \
AnnaBridge 156:ff21514d8981 1331 .dstAddrMode = 0, \
AnnaBridge 156:ff21514d8981 1332 .syncSet = (set), \
AnnaBridge 156:ff21514d8981 1333 .syncClr = (clr), \
AnnaBridge 156:ff21514d8981 1334 .matchVal = (matchValue), \
AnnaBridge 156:ff21514d8981 1335 .matchEn = (matchEnable), \
AnnaBridge 156:ff21514d8981 1336 .linkMode = ldmaLinkModeAbs, \
AnnaBridge 156:ff21514d8981 1337 .link = 1, \
AnnaBridge 156:ff21514d8981 1338 .linkAddr = 0 /* Must be set runtime ! */ \
AnnaBridge 156:ff21514d8981 1339 } \
AnnaBridge 156:ff21514d8981 1340 }
AnnaBridge 156:ff21514d8981 1341
AnnaBridge 156:ff21514d8981 1342 /**
AnnaBridge 156:ff21514d8981 1343 * @brief
AnnaBridge 156:ff21514d8981 1344 * DMA descriptor initializer for SYNC transfer
AnnaBridge 156:ff21514d8981 1345 * @param[in] set Sync pattern bits to set.
AnnaBridge 156:ff21514d8981 1346 * @param[in] clr Sync pattern bits to clear.
AnnaBridge 156:ff21514d8981 1347 * @param[in] matchValue Sync pattern to match.
AnnaBridge 156:ff21514d8981 1348 * @param[in] matchEnable Sync pattern bits to enable for match.
AnnaBridge 156:ff21514d8981 1349 * @param[in] linkjmp Address of descriptor to link to expressed as a
AnnaBridge 156:ff21514d8981 1350 * signed number of descriptors from "here".
AnnaBridge 156:ff21514d8981 1351 * 1=one descriptor forward in memory,
AnnaBridge 156:ff21514d8981 1352 * 0=one this descriptor,
AnnaBridge 156:ff21514d8981 1353 * -1=one descriptor back in memory.
AnnaBridge 156:ff21514d8981 1354 */
AnnaBridge 156:ff21514d8981 1355 #define LDMA_DESCRIPTOR_LINKREL_SYNC(set, clr, matchValue, matchEnable, linkjmp) \
AnnaBridge 156:ff21514d8981 1356 { \
AnnaBridge 156:ff21514d8981 1357 .sync = \
AnnaBridge 156:ff21514d8981 1358 { \
AnnaBridge 156:ff21514d8981 1359 .structType = ldmaCtrlStructTypeSync, \
AnnaBridge 156:ff21514d8981 1360 .structReq = 1, \
AnnaBridge 156:ff21514d8981 1361 .xferCnt = 0, \
AnnaBridge 156:ff21514d8981 1362 .byteSwap = 0, \
AnnaBridge 156:ff21514d8981 1363 .blockSize = 0, \
AnnaBridge 156:ff21514d8981 1364 .doneIfs = 0, \
AnnaBridge 156:ff21514d8981 1365 .reqMode = 0, \
AnnaBridge 156:ff21514d8981 1366 .decLoopCnt = 0, \
AnnaBridge 156:ff21514d8981 1367 .ignoreSrec = 0, \
AnnaBridge 156:ff21514d8981 1368 .srcInc = 0, \
AnnaBridge 156:ff21514d8981 1369 .size = 0, \
AnnaBridge 156:ff21514d8981 1370 .dstInc = 0, \
AnnaBridge 156:ff21514d8981 1371 .srcAddrMode = 0, \
AnnaBridge 156:ff21514d8981 1372 .dstAddrMode = 0, \
AnnaBridge 156:ff21514d8981 1373 .syncSet = (set), \
AnnaBridge 156:ff21514d8981 1374 .syncClr = (clr), \
AnnaBridge 156:ff21514d8981 1375 .matchVal = (matchValue), \
AnnaBridge 156:ff21514d8981 1376 .matchEn = (matchEnable), \
AnnaBridge 156:ff21514d8981 1377 .linkMode = ldmaLinkModeRel, \
AnnaBridge 156:ff21514d8981 1378 .link = 1, \
AnnaBridge 156:ff21514d8981 1379 .linkAddr = (linkjmp) * 4 \
AnnaBridge 156:ff21514d8981 1380 } \
AnnaBridge 156:ff21514d8981 1381 }
AnnaBridge 156:ff21514d8981 1382
AnnaBridge 156:ff21514d8981 1383 /*******************************************************************************
AnnaBridge 156:ff21514d8981 1384 ***************************** PROTOTYPES **********************************
AnnaBridge 156:ff21514d8981 1385 ******************************************************************************/
AnnaBridge 156:ff21514d8981 1386
AnnaBridge 156:ff21514d8981 1387 void LDMA_DeInit(void);
AnnaBridge 156:ff21514d8981 1388 void LDMA_EnableChannelRequest(int ch, bool enable);
AnnaBridge 156:ff21514d8981 1389 void LDMA_Init(const LDMA_Init_t *init);
AnnaBridge 156:ff21514d8981 1390 void LDMA_StartTransfer(int ch,
AnnaBridge 156:ff21514d8981 1391 const LDMA_TransferCfg_t *transfer,
AnnaBridge 156:ff21514d8981 1392 const LDMA_Descriptor_t *descriptor);
AnnaBridge 156:ff21514d8981 1393 void LDMA_StopTransfer(int ch);
AnnaBridge 156:ff21514d8981 1394 bool LDMA_TransferDone(int ch);
AnnaBridge 156:ff21514d8981 1395 uint32_t LDMA_TransferRemainingCount(int ch);
AnnaBridge 156:ff21514d8981 1396
AnnaBridge 156:ff21514d8981 1397
AnnaBridge 156:ff21514d8981 1398 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 1399 * @brief
AnnaBridge 156:ff21514d8981 1400 * Clear one or more pending LDMA interrupts.
AnnaBridge 156:ff21514d8981 1401 *
AnnaBridge 156:ff21514d8981 1402 * @param[in] flags
AnnaBridge 156:ff21514d8981 1403 * Pending LDMA interrupt sources to clear. Use one or more valid
AnnaBridge 156:ff21514d8981 1404 * interrupt flags for the LDMA module. The flags are @ref LDMA_IFC_ERROR
AnnaBridge 156:ff21514d8981 1405 * and one done flag for each channel.
AnnaBridge 156:ff21514d8981 1406 ******************************************************************************/
AnnaBridge 156:ff21514d8981 1407 __STATIC_INLINE void LDMA_IntClear(uint32_t flags)
AnnaBridge 156:ff21514d8981 1408 {
AnnaBridge 156:ff21514d8981 1409 LDMA->IFC = flags;
AnnaBridge 156:ff21514d8981 1410 }
AnnaBridge 156:ff21514d8981 1411
AnnaBridge 156:ff21514d8981 1412
AnnaBridge 156:ff21514d8981 1413 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 1414 * @brief
AnnaBridge 156:ff21514d8981 1415 * Disable one or more LDMA interrupts.
AnnaBridge 156:ff21514d8981 1416 *
AnnaBridge 156:ff21514d8981 1417 * @param[in] flags
AnnaBridge 156:ff21514d8981 1418 * LDMA interrupt sources to disable. Use one or more valid
AnnaBridge 156:ff21514d8981 1419 * interrupt flags for the LDMA module. The flags are @ref LDMA_IEN_ERROR
AnnaBridge 156:ff21514d8981 1420 * and one done flag for each channel.
AnnaBridge 156:ff21514d8981 1421 ******************************************************************************/
AnnaBridge 156:ff21514d8981 1422 __STATIC_INLINE void LDMA_IntDisable(uint32_t flags)
AnnaBridge 156:ff21514d8981 1423 {
AnnaBridge 156:ff21514d8981 1424 LDMA->IEN &= ~flags;
AnnaBridge 156:ff21514d8981 1425 }
AnnaBridge 156:ff21514d8981 1426
AnnaBridge 156:ff21514d8981 1427
AnnaBridge 156:ff21514d8981 1428 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 1429 * @brief
AnnaBridge 156:ff21514d8981 1430 * Enable one or more LDMA interrupts.
AnnaBridge 156:ff21514d8981 1431 *
AnnaBridge 156:ff21514d8981 1432 * @note
AnnaBridge 156:ff21514d8981 1433 * Depending on the use, a pending interrupt may already be set prior to
AnnaBridge 156:ff21514d8981 1434 * enabling the interrupt. Consider using LDMA_IntClear() prior to enabling
AnnaBridge 156:ff21514d8981 1435 * if such a pending interrupt should be ignored.
AnnaBridge 156:ff21514d8981 1436 *
AnnaBridge 156:ff21514d8981 1437 * @param[in] flags
AnnaBridge 156:ff21514d8981 1438 * LDMA interrupt sources to enable. Use one or more valid
AnnaBridge 156:ff21514d8981 1439 * interrupt flags for the LDMA module. The flags are @ref LDMA_IEN_ERROR
AnnaBridge 156:ff21514d8981 1440 * and one done flag for each channel.
AnnaBridge 156:ff21514d8981 1441 ******************************************************************************/
AnnaBridge 156:ff21514d8981 1442 __STATIC_INLINE void LDMA_IntEnable(uint32_t flags)
AnnaBridge 156:ff21514d8981 1443 {
AnnaBridge 156:ff21514d8981 1444 LDMA->IEN |= flags;
AnnaBridge 156:ff21514d8981 1445 }
AnnaBridge 156:ff21514d8981 1446
AnnaBridge 156:ff21514d8981 1447
AnnaBridge 156:ff21514d8981 1448 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 1449 * @brief
AnnaBridge 156:ff21514d8981 1450 * Get pending LDMA interrupt flags.
AnnaBridge 156:ff21514d8981 1451 *
AnnaBridge 156:ff21514d8981 1452 * @note
AnnaBridge 156:ff21514d8981 1453 * The event bits are not cleared by the use of this function.
AnnaBridge 156:ff21514d8981 1454 *
AnnaBridge 156:ff21514d8981 1455 * @return
AnnaBridge 156:ff21514d8981 1456 * LDMA interrupt sources pending. Returns one or more valid
AnnaBridge 156:ff21514d8981 1457 * interrupt flags for the LDMA module. The flags are @ref LDMA_IF_ERROR and
AnnaBridge 156:ff21514d8981 1458 * one flag for each LDMA channel.
AnnaBridge 156:ff21514d8981 1459 ******************************************************************************/
AnnaBridge 156:ff21514d8981 1460 __STATIC_INLINE uint32_t LDMA_IntGet(void)
AnnaBridge 156:ff21514d8981 1461 {
AnnaBridge 156:ff21514d8981 1462 return LDMA->IF;
AnnaBridge 156:ff21514d8981 1463 }
AnnaBridge 156:ff21514d8981 1464
AnnaBridge 156:ff21514d8981 1465
AnnaBridge 156:ff21514d8981 1466 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 1467 * @brief
AnnaBridge 156:ff21514d8981 1468 * Get enabled and pending LDMA interrupt flags.
AnnaBridge 156:ff21514d8981 1469 * Useful for handling more interrupt sources in the same interrupt handler.
AnnaBridge 156:ff21514d8981 1470 *
AnnaBridge 156:ff21514d8981 1471 * @note
AnnaBridge 156:ff21514d8981 1472 * Interrupt flags are not cleared by the use of this function.
AnnaBridge 156:ff21514d8981 1473 *
AnnaBridge 156:ff21514d8981 1474 * @return
AnnaBridge 156:ff21514d8981 1475 * Pending and enabled LDMA interrupt sources
AnnaBridge 156:ff21514d8981 1476 * The return value is the bitwise AND of
AnnaBridge 156:ff21514d8981 1477 * - the enabled interrupt sources in LDMA_IEN and
AnnaBridge 156:ff21514d8981 1478 * - the pending interrupt flags LDMA_IF
AnnaBridge 156:ff21514d8981 1479 ******************************************************************************/
AnnaBridge 156:ff21514d8981 1480 __STATIC_INLINE uint32_t LDMA_IntGetEnabled(void)
AnnaBridge 156:ff21514d8981 1481 {
AnnaBridge 156:ff21514d8981 1482 uint32_t ien;
AnnaBridge 156:ff21514d8981 1483
AnnaBridge 156:ff21514d8981 1484 ien = LDMA->IEN;
AnnaBridge 156:ff21514d8981 1485 return LDMA->IF & ien;
AnnaBridge 156:ff21514d8981 1486 }
AnnaBridge 156:ff21514d8981 1487
AnnaBridge 156:ff21514d8981 1488
AnnaBridge 156:ff21514d8981 1489 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 1490 * @brief
AnnaBridge 156:ff21514d8981 1491 * Set one or more pending LDMA interrupts
AnnaBridge 156:ff21514d8981 1492 *
AnnaBridge 156:ff21514d8981 1493 * @param[in] flags
AnnaBridge 156:ff21514d8981 1494 * LDMA interrupt sources to set to pending. Use one or more valid
AnnaBridge 156:ff21514d8981 1495 * interrupt flags for the LDMA module. The flags are @ref LDMA_IFS_ERROR and
AnnaBridge 156:ff21514d8981 1496 * one done flag for each LDMA channel.
AnnaBridge 156:ff21514d8981 1497 ******************************************************************************/
AnnaBridge 156:ff21514d8981 1498 __STATIC_INLINE void LDMA_IntSet(uint32_t flags)
AnnaBridge 156:ff21514d8981 1499 {
AnnaBridge 156:ff21514d8981 1500 LDMA->IFS = flags;
AnnaBridge 156:ff21514d8981 1501 }
AnnaBridge 156:ff21514d8981 1502
AnnaBridge 156:ff21514d8981 1503 /** @} (end addtogroup LDMA) */
AnnaBridge 156:ff21514d8981 1504 /** @} (end addtogroup emlib) */
AnnaBridge 156:ff21514d8981 1505
AnnaBridge 156:ff21514d8981 1506 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 1507 }
AnnaBridge 156:ff21514d8981 1508 #endif
AnnaBridge 156:ff21514d8981 1509
AnnaBridge 156:ff21514d8981 1510 #endif /* defined( LDMA_PRESENT ) && ( LDMA_COUNT == 1 ) */
AnnaBridge 156:ff21514d8981 1511 #endif /* EM_LDMA_H */