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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_NUCLEO_L011K4/stm32l0xx_hal_pwr.h@122:f9eeca106725, 2016-07-07 (annotated)

Committer:
Kojto
Date:
Thu Jul 07 14:34:11 2016 +0100
Revision:
122:f9eeca106725
Release 122 of the mbed library



Changes:

- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4

- Thread safety addition - mbed API should contain a statement about thread safety

- critical section API addition

- CAS API (core_util_atomic_incr/decr)

- DEVICE_ are generated from targets.json file, device.h deprecated

- Callback replaces FunctionPointer to provide std like interface

- mbed HAL API docs improvements

- toolchain - prexif attributes with MBED_

            - add new attributes - packed, weak, forcedinline, align

- target.json - contains targets definitions

- ST - L1XX - Cube update to 1.5

     - SPI clock selection fix (clock from APB domain)

     - F7 - Cube update v1.4.0

     - L0 -  baudrate init fix

     - L1 - Cube update v1.5

     - F3 - baudrate init fix, 3 targets CAN support

     - F4 - Cube update v1.12.0, 3 targets CAN support

     - L4XX - Cube update v1.5.1

     - F0 - update Cube to v1.5.0

     - L4 - 2 targets (L476RG/VG) CAN support

- NXP - pwm clock fix for KSDK2 MCU

      - LPC2368 - remove ARM toolchain support - due to regression

      - KSDK2 - fix SPI , I2C address and repeat start

- Silabs - some fixes backported from mbed 3

- Renesas - RZ_A1H - SystemCoreClockUpdate addition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 122:f9eeca106725 1 /**
Kojto 122:f9eeca106725 2 ******************************************************************************
Kojto 122:f9eeca106725 3 * @file stm32l0xx_hal_pwr.h
Kojto 122:f9eeca106725 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.5.0
Kojto 122:f9eeca106725 6 * @date 8-January-2016
Kojto 122:f9eeca106725 7 * @brief Header file of PWR HAL module.
Kojto 122:f9eeca106725 8 ******************************************************************************
Kojto 122:f9eeca106725 9 * @attention
Kojto 122:f9eeca106725 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 122:f9eeca106725 12 *
Kojto 122:f9eeca106725 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 122:f9eeca106725 14 * are permitted provided that the following conditions are met:
Kojto 122:f9eeca106725 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 122:f9eeca106725 16 * this list of conditions and the following disclaimer.
Kojto 122:f9eeca106725 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 122:f9eeca106725 18 * this list of conditions and the following disclaimer in the documentation
Kojto 122:f9eeca106725 19 * and/or other materials provided with the distribution.
Kojto 122:f9eeca106725 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 122:f9eeca106725 21 * may be used to endorse or promote products derived from this software
Kojto 122:f9eeca106725 22 * without specific prior written permission.
Kojto 122:f9eeca106725 23 *
Kojto 122:f9eeca106725 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 122:f9eeca106725 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 122:f9eeca106725 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 122:f9eeca106725 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 122:f9eeca106725 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 122:f9eeca106725 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 122:f9eeca106725 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 122:f9eeca106725 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 122:f9eeca106725 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 122:f9eeca106725 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 122:f9eeca106725 34 *
Kojto 122:f9eeca106725 35 ******************************************************************************
Kojto 122:f9eeca106725 36 */
Kojto 122:f9eeca106725 37
Kojto 122:f9eeca106725 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 122:f9eeca106725 39 #ifndef __STM32L0xx_HAL_PWR_H
Kojto 122:f9eeca106725 40 #define __STM32L0xx_HAL_PWR_H
Kojto 122:f9eeca106725 41
Kojto 122:f9eeca106725 42 #ifdef __cplusplus
Kojto 122:f9eeca106725 43 extern "C" {
Kojto 122:f9eeca106725 44 #endif
Kojto 122:f9eeca106725 45
Kojto 122:f9eeca106725 46 /* Includes ------------------------------------------------------------------*/
Kojto 122:f9eeca106725 47 #include "stm32l0xx_hal_def.h"
Kojto 122:f9eeca106725 48
Kojto 122:f9eeca106725 49 /** @addtogroup STM32L0xx_HAL_Driver
Kojto 122:f9eeca106725 50 * @{
Kojto 122:f9eeca106725 51 */
Kojto 122:f9eeca106725 52
Kojto 122:f9eeca106725 53 /** @defgroup PWR PWR
Kojto 122:f9eeca106725 54 * @{
Kojto 122:f9eeca106725 55 */
Kojto 122:f9eeca106725 56
Kojto 122:f9eeca106725 57 /** @defgroup PWR_Exported_Types PWR Exported Types
Kojto 122:f9eeca106725 58 * @{
Kojto 122:f9eeca106725 59 */
Kojto 122:f9eeca106725 60
Kojto 122:f9eeca106725 61 /**
Kojto 122:f9eeca106725 62 * @brief PWR PVD configuration structure definition
Kojto 122:f9eeca106725 63 */
Kojto 122:f9eeca106725 64 typedef struct
Kojto 122:f9eeca106725 65 {
Kojto 122:f9eeca106725 66 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
Kojto 122:f9eeca106725 67 This parameter can be a value of @ref PWR_PVD_detection_level */
Kojto 122:f9eeca106725 68
Kojto 122:f9eeca106725 69 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
Kojto 122:f9eeca106725 70 This parameter can be a value of @ref PWR_PVD_Mode */
Kojto 122:f9eeca106725 71 }PWR_PVDTypeDef;
Kojto 122:f9eeca106725 72
Kojto 122:f9eeca106725 73 /**
Kojto 122:f9eeca106725 74 * @}
Kojto 122:f9eeca106725 75 */
Kojto 122:f9eeca106725 76
Kojto 122:f9eeca106725 77 /** @addtogroup PWR_Private
Kojto 122:f9eeca106725 78 * @{
Kojto 122:f9eeca106725 79 */
Kojto 122:f9eeca106725 80
Kojto 122:f9eeca106725 81 #define PWR_EXTI_LINE_PVD EXTI_FTSR_TR16 /*!< External interrupt line 16 Connected to the PVD EXTI Line */
Kojto 122:f9eeca106725 82
Kojto 122:f9eeca106725 83 /**
Kojto 122:f9eeca106725 84 * @}
Kojto 122:f9eeca106725 85 */
Kojto 122:f9eeca106725 86
Kojto 122:f9eeca106725 87 /** @defgroup PWR_Exported_Constants PWR Exported Constants
Kojto 122:f9eeca106725 88 * @{
Kojto 122:f9eeca106725 89 */
Kojto 122:f9eeca106725 90
Kojto 122:f9eeca106725 91 /** @defgroup PWR_register_alias_address PWR Register alias address
Kojto 122:f9eeca106725 92 * @{
Kojto 122:f9eeca106725 93 */
Kojto 122:f9eeca106725 94 #define PWR_WAKEUP_PIN1 PWR_CSR_EWUP1
Kojto 122:f9eeca106725 95 #define PWR_WAKEUP_PIN2 PWR_CSR_EWUP2
Kojto 122:f9eeca106725 96 #if defined (STM32L011xx) || defined (STM32L021xx) || defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L071xx) || \
Kojto 122:f9eeca106725 97 defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
Kojto 122:f9eeca106725 98 #define PWR_WAKEUP_PIN3 PWR_CSR_EWUP3
Kojto 122:f9eeca106725 99 #endif
Kojto 122:f9eeca106725 100 /**
Kojto 122:f9eeca106725 101 * @}
Kojto 122:f9eeca106725 102 */
Kojto 122:f9eeca106725 103
Kojto 122:f9eeca106725 104 /** @defgroup PWR_PVD_detection_level PVD detection level
Kojto 122:f9eeca106725 105 * @{
Kojto 122:f9eeca106725 106 */
Kojto 122:f9eeca106725 107 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
Kojto 122:f9eeca106725 108 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
Kojto 122:f9eeca106725 109 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
Kojto 122:f9eeca106725 110 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
Kojto 122:f9eeca106725 111 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
Kojto 122:f9eeca106725 112 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
Kojto 122:f9eeca106725 113 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
Kojto 122:f9eeca106725 114 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 /* External input analog voltage
Kojto 122:f9eeca106725 115 (Compare internally to VREFINT) */
Kojto 122:f9eeca106725 116 /**
Kojto 122:f9eeca106725 117 * @}
Kojto 122:f9eeca106725 118 */
Kojto 122:f9eeca106725 119
Kojto 122:f9eeca106725 120 /** @defgroup PWR_PVD_Mode PWR PVD Mode
Kojto 122:f9eeca106725 121 * @{
Kojto 122:f9eeca106725 122 */
Kojto 122:f9eeca106725 123 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */
Kojto 122:f9eeca106725 124 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
Kojto 122:f9eeca106725 125 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
Kojto 122:f9eeca106725 126 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
Kojto 122:f9eeca106725 127 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
Kojto 122:f9eeca106725 128 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
Kojto 122:f9eeca106725 129 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
Kojto 122:f9eeca106725 130
Kojto 122:f9eeca106725 131 /**
Kojto 122:f9eeca106725 132 * @}
Kojto 122:f9eeca106725 133 */
Kojto 122:f9eeca106725 134
Kojto 122:f9eeca106725 135 /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode
Kojto 122:f9eeca106725 136 * @{
Kojto 122:f9eeca106725 137 */
Kojto 122:f9eeca106725 138 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000)
Kojto 122:f9eeca106725 139 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPSDSR
Kojto 122:f9eeca106725 140
Kojto 122:f9eeca106725 141 /**
Kojto 122:f9eeca106725 142 * @}
Kojto 122:f9eeca106725 143 */
Kojto 122:f9eeca106725 144
Kojto 122:f9eeca106725 145 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
Kojto 122:f9eeca106725 146 * @{
Kojto 122:f9eeca106725 147 */
Kojto 122:f9eeca106725 148 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
Kojto 122:f9eeca106725 149 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
Kojto 122:f9eeca106725 150 /**
Kojto 122:f9eeca106725 151 * @}
Kojto 122:f9eeca106725 152 */
Kojto 122:f9eeca106725 153
Kojto 122:f9eeca106725 154 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
Kojto 122:f9eeca106725 155 * @{
Kojto 122:f9eeca106725 156 */
Kojto 122:f9eeca106725 157 #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
Kojto 122:f9eeca106725 158 #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
Kojto 122:f9eeca106725 159 /**
Kojto 122:f9eeca106725 160 * @}
Kojto 122:f9eeca106725 161 */
Kojto 122:f9eeca106725 162
Kojto 122:f9eeca106725 163 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
Kojto 122:f9eeca106725 164 * @{
Kojto 122:f9eeca106725 165 */
Kojto 122:f9eeca106725 166
Kojto 122:f9eeca106725 167 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS_0
Kojto 122:f9eeca106725 168 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1
Kojto 122:f9eeca106725 169 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS
Kojto 122:f9eeca106725 170
Kojto 122:f9eeca106725 171 #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
Kojto 122:f9eeca106725 172 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
Kojto 122:f9eeca106725 173 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
Kojto 122:f9eeca106725 174 /**
Kojto 122:f9eeca106725 175 * @}
Kojto 122:f9eeca106725 176 */
Kojto 122:f9eeca106725 177
Kojto 122:f9eeca106725 178 /** @defgroup PWR_Flag PWR Flag
Kojto 122:f9eeca106725 179 * @{
Kojto 122:f9eeca106725 180 */
Kojto 122:f9eeca106725 181 #define PWR_FLAG_WU PWR_CSR_WUF
Kojto 122:f9eeca106725 182 #define PWR_FLAG_SB PWR_CSR_SBF
Kojto 122:f9eeca106725 183 #define PWR_FLAG_PVDO PWR_CSR_PVDO
Kojto 122:f9eeca106725 184 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
Kojto 122:f9eeca106725 185 #define PWR_FLAG_VOS PWR_CSR_VOSF
Kojto 122:f9eeca106725 186 #define PWR_FLAG_REGLP PWR_CSR_REGLPF
Kojto 122:f9eeca106725 187
Kojto 122:f9eeca106725 188
Kojto 122:f9eeca106725 189 /**
Kojto 122:f9eeca106725 190 * @}
Kojto 122:f9eeca106725 191 */
Kojto 122:f9eeca106725 192
Kojto 122:f9eeca106725 193 /**
Kojto 122:f9eeca106725 194 * @}
Kojto 122:f9eeca106725 195 */
Kojto 122:f9eeca106725 196
Kojto 122:f9eeca106725 197 /** @defgroup PWR_Exported_Macro PWR Exported Macros
Kojto 122:f9eeca106725 198 * @{
Kojto 122:f9eeca106725 199 */
Kojto 122:f9eeca106725 200 /** @brief macros configure the main internal regulator output voltage.
Kojto 122:f9eeca106725 201 * When exiting Low Power Run Mode or during dynamic voltage scaling configuration,
Kojto 122:f9eeca106725 202 * the reference manual recommends to poll PWR_FLAG_REGLP bit to wait for the regulator
Kojto 122:f9eeca106725 203 * to reach main mode (resp. to get stabilized) for a transition from 0 to 1.
Kojto 122:f9eeca106725 204 * Only then the clock can be increased.
Kojto 122:f9eeca106725 205 *
Kojto 122:f9eeca106725 206 * @param __REGULATOR__: specifies the regulator output voltage to achieve
Kojto 122:f9eeca106725 207 * a tradeoff between performance and power consumption when the device does
Kojto 122:f9eeca106725 208 * not operate at the maximum frequency (refer to the datasheets for more details).
Kojto 122:f9eeca106725 209 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 210 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode,
Kojto 122:f9eeca106725 211 * System frequency up to 32 MHz.
Kojto 122:f9eeca106725 212 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode,
Kojto 122:f9eeca106725 213 * System frequency up to 16 MHz.
Kojto 122:f9eeca106725 214 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode,
Kojto 122:f9eeca106725 215 * System frequency up to 4.2 MHz
Kojto 122:f9eeca106725 216 * @retval None
Kojto 122:f9eeca106725 217 */
Kojto 122:f9eeca106725 218 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
Kojto 122:f9eeca106725 219
Kojto 122:f9eeca106725 220 /** @brief Check PWR flag is set or not.
Kojto 122:f9eeca106725 221 * @param __FLAG__: specifies the flag to check.
Kojto 122:f9eeca106725 222 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 223 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
Kojto 122:f9eeca106725 224 * was received from the WKUP pin or from the RTC alarm (Alarm B),
Kojto 122:f9eeca106725 225 * RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
Kojto 122:f9eeca106725 226 * An additional wakeup event is detected if the WKUP pin is enabled
Kojto 122:f9eeca106725 227 * (by setting the EWUP bit) when the WKUP pin level is already high.
Kojto 122:f9eeca106725 228 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
Kojto 122:f9eeca106725 229 * resumed from StandBy mode.
Kojto 122:f9eeca106725 230 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
Kojto 122:f9eeca106725 231 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode.
Kojto 122:f9eeca106725 232 * For this reason, this bit is equal to 0 after Standby or reset
Kojto 122:f9eeca106725 233 * until the PVDE bit is set.
Kojto 122:f9eeca106725 234 * @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag.
Kojto 122:f9eeca106725 235 * This bit indicates the state of the internal voltage reference, VREFINT.
Kojto 122:f9eeca106725 236 * @arg PWR_FLAG_VOS: Voltage Scaling select flag. A delay is required for
Kojto 122:f9eeca106725 237 * the internal regulator to be ready after the voltage range is changed.
Kojto 122:f9eeca106725 238 * The VOSF bit indicates that the regulator has reached the voltage level
Kojto 122:f9eeca106725 239 * defined with bits VOS of PWR_CR register.
Kojto 122:f9eeca106725 240 * @arg PWR_FLAG_REGLP: Regulator LP flag. When the MCU exits from Low power run
Kojto 122:f9eeca106725 241 * mode, this bit stays at 1 until the regulator is ready in main mode.
Kojto 122:f9eeca106725 242 * A polling on this bit is recommended to wait for the regulator main mode.
Kojto 122:f9eeca106725 243 * This bit is reset by hardware when the regulator is ready.
Kojto 122:f9eeca106725 244 * @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto 122:f9eeca106725 245 */
Kojto 122:f9eeca106725 246 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
Kojto 122:f9eeca106725 247
Kojto 122:f9eeca106725 248 /** @brief Clear the PWR pending flags.
Kojto 122:f9eeca106725 249 * @param __FLAG__: specifies the flag to clear.
Kojto 122:f9eeca106725 250 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 251 * @arg PWR_FLAG_WU: Wake Up flag
Kojto 122:f9eeca106725 252 * @arg PWR_FLAG_SB: StandBy flag
Kojto 122:f9eeca106725 253 */
Kojto 122:f9eeca106725 254 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, (__FLAG__) << 2)
Kojto 122:f9eeca106725 255
Kojto 122:f9eeca106725 256 /**
Kojto 122:f9eeca106725 257 * @brief Enable interrupt on PVD Exti Line 16.
Kojto 122:f9eeca106725 258 * @retval None.
Kojto 122:f9eeca106725 259 */
Kojto 122:f9eeca106725 260 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 261
Kojto 122:f9eeca106725 262 /**
Kojto 122:f9eeca106725 263 * @brief Disable interrupt on PVD Exti Line 16.
Kojto 122:f9eeca106725 264 * @retval None.
Kojto 122:f9eeca106725 265 */
Kojto 122:f9eeca106725 266 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 267
Kojto 122:f9eeca106725 268 /**
Kojto 122:f9eeca106725 269 * @brief Enable event on PVD Exti Line 16.
Kojto 122:f9eeca106725 270 * @retval None.
Kojto 122:f9eeca106725 271 */
Kojto 122:f9eeca106725 272 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 273
Kojto 122:f9eeca106725 274 /**
Kojto 122:f9eeca106725 275 * @brief Disable event on PVD Exti Line 16.
Kojto 122:f9eeca106725 276 * @retval None.
Kojto 122:f9eeca106725 277 */
Kojto 122:f9eeca106725 278 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 279
Kojto 122:f9eeca106725 280
Kojto 122:f9eeca106725 281 /**
Kojto 122:f9eeca106725 282 * @brief PVD EXTI line configuration: set falling edge trigger.
Kojto 122:f9eeca106725 283 * @retval None.
Kojto 122:f9eeca106725 284 */
Kojto 122:f9eeca106725 285 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 286
Kojto 122:f9eeca106725 287
Kojto 122:f9eeca106725 288 /**
Kojto 122:f9eeca106725 289 * @brief Disable the PVD Extended Interrupt Falling Trigger.
Kojto 122:f9eeca106725 290 * @retval None.
Kojto 122:f9eeca106725 291 */
Kojto 122:f9eeca106725 292 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 293
Kojto 122:f9eeca106725 294
Kojto 122:f9eeca106725 295 /**
Kojto 122:f9eeca106725 296 * @brief PVD EXTI line configuration: set rising edge trigger.
Kojto 122:f9eeca106725 297 * @retval None.
Kojto 122:f9eeca106725 298 */
Kojto 122:f9eeca106725 299 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 300
Kojto 122:f9eeca106725 301 /**
Kojto 122:f9eeca106725 302 * @brief Disable the PVD Extended Interrupt Rising Trigger.
Kojto 122:f9eeca106725 303 * This parameter can be:
Kojto 122:f9eeca106725 304 * @retval None.
Kojto 122:f9eeca106725 305 */
Kojto 122:f9eeca106725 306 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 307
Kojto 122:f9eeca106725 308 /**
Kojto 122:f9eeca106725 309 * @brief PVD EXTI line configuration: set rising & falling edge trigger.
Kojto 122:f9eeca106725 310 * @retval None.
Kojto 122:f9eeca106725 311 */
Kojto 122:f9eeca106725 312 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do { __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); } while(0);
Kojto 122:f9eeca106725 313
Kojto 122:f9eeca106725 314 /**
Kojto 122:f9eeca106725 315 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
Kojto 122:f9eeca106725 316 * This parameter can be:
Kojto 122:f9eeca106725 317 * @retval None.
Kojto 122:f9eeca106725 318 */
Kojto 122:f9eeca106725 319 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0);
Kojto 122:f9eeca106725 320
Kojto 122:f9eeca106725 321
Kojto 122:f9eeca106725 322
Kojto 122:f9eeca106725 323 /**
Kojto 122:f9eeca106725 324 * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
Kojto 122:f9eeca106725 325 * @retval EXTI PVD Line Status.
Kojto 122:f9eeca106725 326 */
Kojto 122:f9eeca106725 327 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
Kojto 122:f9eeca106725 328
Kojto 122:f9eeca106725 329 /**
Kojto 122:f9eeca106725 330 * @brief Clear the PVD EXTI flag.
Kojto 122:f9eeca106725 331 * @retval None.
Kojto 122:f9eeca106725 332 */
Kojto 122:f9eeca106725 333 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
Kojto 122:f9eeca106725 334
Kojto 122:f9eeca106725 335 /**
Kojto 122:f9eeca106725 336 * @brief Generate a Software interrupt on selected EXTI line.
Kojto 122:f9eeca106725 337 * @retval None.
Kojto 122:f9eeca106725 338 */
Kojto 122:f9eeca106725 339 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 340
Kojto 122:f9eeca106725 341 /**
Kojto 122:f9eeca106725 342 * @brief Generate a Software interrupt on selected EXTI line.
Kojto 122:f9eeca106725 343 * @retval None.
Kojto 122:f9eeca106725 344 */
Kojto 122:f9eeca106725 345 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 346
Kojto 122:f9eeca106725 347 /**
Kojto 122:f9eeca106725 348 * @}
Kojto 122:f9eeca106725 349 */
Kojto 122:f9eeca106725 350
Kojto 122:f9eeca106725 351 /** @addtogroup PWR_Private
Kojto 122:f9eeca106725 352 * @{
Kojto 122:f9eeca106725 353 */
Kojto 122:f9eeca106725 354 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
Kojto 122:f9eeca106725 355 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
Kojto 122:f9eeca106725 356 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
Kojto 122:f9eeca106725 357 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
Kojto 122:f9eeca106725 358
Kojto 122:f9eeca106725 359 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
Kojto 122:f9eeca106725 360 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
Kojto 122:f9eeca106725 361 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
Kojto 122:f9eeca106725 362 ((MODE) == PWR_PVD_MODE_NORMAL))
Kojto 122:f9eeca106725 363
Kojto 122:f9eeca106725 364 #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
Kojto 122:f9eeca106725 365 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
Kojto 122:f9eeca106725 366 ((PIN) == PWR_WAKEUP_PIN2) || \
Kojto 122:f9eeca106725 367 ((PIN) == PWR_WAKEUP_PIN3))
Kojto 122:f9eeca106725 368 #elif defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx)
Kojto 122:f9eeca106725 369 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
Kojto 122:f9eeca106725 370 ((PIN) == PWR_WAKEUP_PIN2))
Kojto 122:f9eeca106725 371 #elif defined (STM32L031xx) || defined (STM32L041xx)
Kojto 122:f9eeca106725 372 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
Kojto 122:f9eeca106725 373 ((PIN) == PWR_WAKEUP_PIN2))
Kojto 122:f9eeca106725 374 #elif defined (STM32L011xx) || defined (STM32L021xx)
Kojto 122:f9eeca106725 375 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
Kojto 122:f9eeca106725 376 ((PIN) == PWR_WAKEUP_PIN3))
Kojto 122:f9eeca106725 377 #endif
Kojto 122:f9eeca106725 378
Kojto 122:f9eeca106725 379 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
Kojto 122:f9eeca106725 380 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
Kojto 122:f9eeca106725 381 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
Kojto 122:f9eeca106725 382
Kojto 122:f9eeca106725 383 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
Kojto 122:f9eeca106725 384
Kojto 122:f9eeca106725 385 /**
Kojto 122:f9eeca106725 386 * @}
Kojto 122:f9eeca106725 387 */
Kojto 122:f9eeca106725 388
Kojto 122:f9eeca106725 389 /* Include PWR HAL Extension module */
Kojto 122:f9eeca106725 390 #include "stm32l0xx_hal_pwr_ex.h"
Kojto 122:f9eeca106725 391
Kojto 122:f9eeca106725 392 /** @defgroup PWR_Exported_Functions PWR Exported Functions
Kojto 122:f9eeca106725 393 * @{
Kojto 122:f9eeca106725 394 */
Kojto 122:f9eeca106725 395
Kojto 122:f9eeca106725 396 /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 122:f9eeca106725 397 * @{
Kojto 122:f9eeca106725 398 */
Kojto 122:f9eeca106725 399 void HAL_PWR_DeInit(void);
Kojto 122:f9eeca106725 400 void HAL_PWR_EnableBkUpAccess(void);
Kojto 122:f9eeca106725 401 void HAL_PWR_DisableBkUpAccess(void);
Kojto 122:f9eeca106725 402 /**
Kojto 122:f9eeca106725 403 * @}
Kojto 122:f9eeca106725 404 */
Kojto 122:f9eeca106725 405
Kojto 122:f9eeca106725 406 /** @defgroup PWR_Exported_Functions_Group2 Low Power modes configuration functions
Kojto 122:f9eeca106725 407 * @{
Kojto 122:f9eeca106725 408 */
Kojto 122:f9eeca106725 409
Kojto 122:f9eeca106725 410 /* PVD control functions ************************************************/
Kojto 122:f9eeca106725 411 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
Kojto 122:f9eeca106725 412 void HAL_PWR_EnablePVD(void);
Kojto 122:f9eeca106725 413 void HAL_PWR_DisablePVD(void);
Kojto 122:f9eeca106725 414 void HAL_PWR_PVD_IRQHandler(void);
Kojto 122:f9eeca106725 415 void HAL_PWR_PVDCallback(void);
Kojto 122:f9eeca106725 416
Kojto 122:f9eeca106725 417 /* WakeUp pins configuration functions ****************************************/
Kojto 122:f9eeca106725 418 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
Kojto 122:f9eeca106725 419 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
Kojto 122:f9eeca106725 420
Kojto 122:f9eeca106725 421 /* Low Power modes configuration functions ************************************/
Kojto 122:f9eeca106725 422 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
Kojto 122:f9eeca106725 423 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
Kojto 122:f9eeca106725 424 void HAL_PWR_EnterSTANDBYMode(void);
Kojto 122:f9eeca106725 425
Kojto 122:f9eeca106725 426 void HAL_PWR_EnableSleepOnExit(void);
Kojto 122:f9eeca106725 427 void HAL_PWR_DisableSleepOnExit(void);
Kojto 122:f9eeca106725 428 void HAL_PWR_EnableSEVOnPend(void);
Kojto 122:f9eeca106725 429 void HAL_PWR_DisableSEVOnPend(void);
Kojto 122:f9eeca106725 430
Kojto 122:f9eeca106725 431 /**
Kojto 122:f9eeca106725 432 * @}
Kojto 122:f9eeca106725 433 */
Kojto 122:f9eeca106725 434
Kojto 122:f9eeca106725 435 /**
Kojto 122:f9eeca106725 436 * @}
Kojto 122:f9eeca106725 437 */
Kojto 122:f9eeca106725 438
Kojto 122:f9eeca106725 439 /* Define the private group ***********************************/
Kojto 122:f9eeca106725 440 /**************************************************************/
Kojto 122:f9eeca106725 441 /** @defgroup PWR_Private PWR Private
Kojto 122:f9eeca106725 442 * @{
Kojto 122:f9eeca106725 443 */
Kojto 122:f9eeca106725 444 /**
Kojto 122:f9eeca106725 445 * @}
Kojto 122:f9eeca106725 446 */
Kojto 122:f9eeca106725 447 /**************************************************************/
Kojto 122:f9eeca106725 448
Kojto 122:f9eeca106725 449 /**
Kojto 122:f9eeca106725 450 * @}
Kojto 122:f9eeca106725 451 */
Kojto 122:f9eeca106725 452
Kojto 122:f9eeca106725 453 /**
Kojto 122:f9eeca106725 454 * @}
Kojto 122:f9eeca106725 455 */
Kojto 122:f9eeca106725 456
Kojto 122:f9eeca106725 457 #ifdef __cplusplus
Kojto 122:f9eeca106725 458 }
Kojto 122:f9eeca106725 459 #endif
Kojto 122:f9eeca106725 460
Kojto 122:f9eeca106725 461
Kojto 122:f9eeca106725 462 #endif /* __STM32L0xx_HAL_PWR_H */
Kojto 122:f9eeca106725 463
Kojto 122:f9eeca106725 464 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Kojto 122:f9eeca106725 465