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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_NUCLEO_F401RE/stm32f4xx_hal_sd.h@122:f9eeca106725, 2016-07-07 (annotated)

Committer:
Kojto
Date:
Thu Jul 07 14:34:11 2016 +0100
Revision:
122:f9eeca106725
Parent:
110:165afa46840b 
Release 122 of the mbed library



Changes:

- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4

- Thread safety addition - mbed API should contain a statement about thread safety

- critical section API addition

- CAS API (core_util_atomic_incr/decr)

- DEVICE_ are generated from targets.json file, device.h deprecated

- Callback replaces FunctionPointer to provide std like interface

- mbed HAL API docs improvements

- toolchain - prexif attributes with MBED_

            - add new attributes - packed, weak, forcedinline, align

- target.json - contains targets definitions

- ST - L1XX - Cube update to 1.5

     - SPI clock selection fix (clock from APB domain)

     - F7 - Cube update v1.4.0

     - L0 -  baudrate init fix

     - L1 - Cube update v1.5

     - F3 - baudrate init fix, 3 targets CAN support

     - F4 - Cube update v1.12.0, 3 targets CAN support

     - L4XX - Cube update v1.5.1

     - F0 - update Cube to v1.5.0

     - L4 - 2 targets (L476RG/VG) CAN support

- NXP - pwm clock fix for KSDK2 MCU

      - LPC2368 - remove ARM toolchain support - due to regression

      - KSDK2 - fix SPI , I2C address and repeat start

- Silabs - some fixes backported from mbed 3

- Renesas - RZ_A1H - SystemCoreClockUpdate addition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_sd.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.5.0
Kojto 122:f9eeca106725 6 * @date 06-May-2016
emilmont 77:869cf507173a 7 * @brief Header file of SD HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_SD_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_SD_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
Kojto 110:165afa46840b 45 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
Kojto 110:165afa46840b 46 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
Kojto 110:165afa46840b 47 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
Kojto 122:f9eeca106725 48 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
Kojto 122:f9eeca106725 49 defined(STM32F412Rx) || defined(STM32F412Cx)
emilmont 77:869cf507173a 50 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 51 #include "stm32f4xx_ll_sdmmc.h"
emilmont 77:869cf507173a 52
emilmont 77:869cf507173a 53 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 54 * @{
emilmont 77:869cf507173a 55 */
emilmont 77:869cf507173a 56
Kojto 99:dbbf35b96557 57 /** @defgroup SD SD
Kojto 99:dbbf35b96557 58 * @brief SD HAL module driver
emilmont 77:869cf507173a 59 * @{
Kojto 99:dbbf35b96557 60 */
emilmont 77:869cf507173a 61
emilmont 77:869cf507173a 62 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 63 /** @defgroup SD_Exported_Types SD Exported Types
Kojto 99:dbbf35b96557 64 * @{
Kojto 99:dbbf35b96557 65 */
Kojto 99:dbbf35b96557 66
Kojto 99:dbbf35b96557 67 /** @defgroup SD_Exported_Types_Group1 SD Handle Structure definition
Kojto 90:cb3d968589d8 68 * @{
Kojto 90:cb3d968589d8 69 */
emilmont 77:869cf507173a 70 #define SD_InitTypeDef SDIO_InitTypeDef
emilmont 77:869cf507173a 71 #define SD_TypeDef SDIO_TypeDef
emilmont 77:869cf507173a 72
emilmont 77:869cf507173a 73 typedef struct
emilmont 77:869cf507173a 74 {
bogdanm 85:024bf7f99721 75 SD_TypeDef *Instance; /*!< SDIO register base address */
emilmont 77:869cf507173a 76
emilmont 77:869cf507173a 77 SD_InitTypeDef Init; /*!< SD required parameters */
emilmont 77:869cf507173a 78
bogdanm 85:024bf7f99721 79 HAL_LockTypeDef Lock; /*!< SD locking object */
emilmont 77:869cf507173a 80
emilmont 77:869cf507173a 81 uint32_t CardType; /*!< SD card type */
emilmont 77:869cf507173a 82
emilmont 77:869cf507173a 83 uint32_t RCA; /*!< SD relative card address */
emilmont 77:869cf507173a 84
emilmont 77:869cf507173a 85 uint32_t CSD[4]; /*!< SD card specific data table */
emilmont 77:869cf507173a 86
emilmont 77:869cf507173a 87 uint32_t CID[4]; /*!< SD card identification number table */
emilmont 77:869cf507173a 88
emilmont 77:869cf507173a 89 __IO uint32_t SdTransferCplt; /*!< SD transfer complete flag in non blocking mode */
emilmont 77:869cf507173a 90
bogdanm 85:024bf7f99721 91 __IO uint32_t SdTransferErr; /*!< SD transfer error flag in non blocking mode */
emilmont 77:869cf507173a 92
emilmont 77:869cf507173a 93 __IO uint32_t DmaTransferCplt; /*!< SD DMA transfer complete flag */
emilmont 77:869cf507173a 94
emilmont 77:869cf507173a 95 __IO uint32_t SdOperation; /*!< SD transfer operation (read/write) */
emilmont 77:869cf507173a 96
bogdanm 85:024bf7f99721 97 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */
emilmont 77:869cf507173a 98
emilmont 77:869cf507173a 99 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */
emilmont 77:869cf507173a 100
emilmont 77:869cf507173a 101 }SD_HandleTypeDef;
Kojto 99:dbbf35b96557 102 /**
Kojto 99:dbbf35b96557 103 * @}
Kojto 99:dbbf35b96557 104 */
emilmont 77:869cf507173a 105
Kojto 99:dbbf35b96557 106 /** @defgroup SD_Exported_Types_Group2 Card Specific Data: CSD Register
Kojto 99:dbbf35b96557 107 * @{
emilmont 77:869cf507173a 108 */
emilmont 77:869cf507173a 109 typedef struct
emilmont 77:869cf507173a 110 {
emilmont 77:869cf507173a 111 __IO uint8_t CSDStruct; /*!< CSD structure */
emilmont 77:869cf507173a 112 __IO uint8_t SysSpecVersion; /*!< System specification version */
emilmont 77:869cf507173a 113 __IO uint8_t Reserved1; /*!< Reserved */
emilmont 77:869cf507173a 114 __IO uint8_t TAAC; /*!< Data read access time 1 */
emilmont 77:869cf507173a 115 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
emilmont 77:869cf507173a 116 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
emilmont 77:869cf507173a 117 __IO uint16_t CardComdClasses; /*!< Card command classes */
emilmont 77:869cf507173a 118 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
emilmont 77:869cf507173a 119 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
emilmont 77:869cf507173a 120 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
emilmont 77:869cf507173a 121 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
emilmont 77:869cf507173a 122 __IO uint8_t DSRImpl; /*!< DSR implemented */
emilmont 77:869cf507173a 123 __IO uint8_t Reserved2; /*!< Reserved */
emilmont 77:869cf507173a 124 __IO uint32_t DeviceSize; /*!< Device Size */
emilmont 77:869cf507173a 125 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
emilmont 77:869cf507173a 126 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
emilmont 77:869cf507173a 127 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
emilmont 77:869cf507173a 128 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
emilmont 77:869cf507173a 129 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
emilmont 77:869cf507173a 130 __IO uint8_t EraseGrSize; /*!< Erase group size */
emilmont 77:869cf507173a 131 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
emilmont 77:869cf507173a 132 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
emilmont 77:869cf507173a 133 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
emilmont 77:869cf507173a 134 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
emilmont 77:869cf507173a 135 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
emilmont 77:869cf507173a 136 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
emilmont 77:869cf507173a 137 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
emilmont 77:869cf507173a 138 __IO uint8_t Reserved3; /*!< Reserved */
emilmont 77:869cf507173a 139 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
emilmont 77:869cf507173a 140 __IO uint8_t FileFormatGrouop; /*!< File format group */
emilmont 77:869cf507173a 141 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
emilmont 77:869cf507173a 142 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
emilmont 77:869cf507173a 143 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
emilmont 77:869cf507173a 144 __IO uint8_t FileFormat; /*!< File format */
emilmont 77:869cf507173a 145 __IO uint8_t ECC; /*!< ECC code */
emilmont 77:869cf507173a 146 __IO uint8_t CSD_CRC; /*!< CSD CRC */
emilmont 77:869cf507173a 147 __IO uint8_t Reserved4; /*!< Always 1 */
emilmont 77:869cf507173a 148
emilmont 77:869cf507173a 149 }HAL_SD_CSDTypedef;
Kojto 99:dbbf35b96557 150 /**
Kojto 99:dbbf35b96557 151 * @}
Kojto 99:dbbf35b96557 152 */
emilmont 77:869cf507173a 153
Kojto 99:dbbf35b96557 154 /** @defgroup SD_Exported_Types_Group3 Card Identification Data: CID Register
Kojto 99:dbbf35b96557 155 * @{
Kojto 99:dbbf35b96557 156 */
emilmont 77:869cf507173a 157 typedef struct
emilmont 77:869cf507173a 158 {
emilmont 77:869cf507173a 159 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
emilmont 77:869cf507173a 160 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
emilmont 77:869cf507173a 161 __IO uint32_t ProdName1; /*!< Product Name part1 */
emilmont 77:869cf507173a 162 __IO uint8_t ProdName2; /*!< Product Name part2 */
emilmont 77:869cf507173a 163 __IO uint8_t ProdRev; /*!< Product Revision */
emilmont 77:869cf507173a 164 __IO uint32_t ProdSN; /*!< Product Serial Number */
emilmont 77:869cf507173a 165 __IO uint8_t Reserved1; /*!< Reserved1 */
emilmont 77:869cf507173a 166 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
emilmont 77:869cf507173a 167 __IO uint8_t CID_CRC; /*!< CID CRC */
emilmont 77:869cf507173a 168 __IO uint8_t Reserved2; /*!< Always 1 */
emilmont 77:869cf507173a 169
emilmont 77:869cf507173a 170 }HAL_SD_CIDTypedef;
Kojto 99:dbbf35b96557 171 /**
Kojto 99:dbbf35b96557 172 * @}
Kojto 99:dbbf35b96557 173 */
emilmont 77:869cf507173a 174
Kojto 99:dbbf35b96557 175 /** @defgroup SD_Exported_Types_Group4 SD Card Status returned by ACMD13
Kojto 99:dbbf35b96557 176 * @{
Kojto 99:dbbf35b96557 177 */
emilmont 77:869cf507173a 178 typedef struct
emilmont 77:869cf507173a 179 {
emilmont 77:869cf507173a 180 __IO uint8_t DAT_BUS_WIDTH; /*!< Shows the currently defined data bus width */
emilmont 77:869cf507173a 181 __IO uint8_t SECURED_MODE; /*!< Card is in secured mode of operation */
emilmont 77:869cf507173a 182 __IO uint16_t SD_CARD_TYPE; /*!< Carries information about card type */
emilmont 77:869cf507173a 183 __IO uint32_t SIZE_OF_PROTECTED_AREA; /*!< Carries information about the capacity of protected area */
emilmont 77:869cf507173a 184 __IO uint8_t SPEED_CLASS; /*!< Carries information about the speed class of the card */
emilmont 77:869cf507173a 185 __IO uint8_t PERFORMANCE_MOVE; /*!< Carries information about the card's performance move */
emilmont 77:869cf507173a 186 __IO uint8_t AU_SIZE; /*!< Carries information about the card's allocation unit size */
emilmont 77:869cf507173a 187 __IO uint16_t ERASE_SIZE; /*!< Determines the number of AUs to be erased in one operation */
emilmont 77:869cf507173a 188 __IO uint8_t ERASE_TIMEOUT; /*!< Determines the timeout for any number of AU erase */
emilmont 77:869cf507173a 189 __IO uint8_t ERASE_OFFSET; /*!< Carries information about the erase offset */
emilmont 77:869cf507173a 190
emilmont 77:869cf507173a 191 }HAL_SD_CardStatusTypedef;
Kojto 99:dbbf35b96557 192 /**
Kojto 99:dbbf35b96557 193 * @}
Kojto 99:dbbf35b96557 194 */
emilmont 77:869cf507173a 195
Kojto 99:dbbf35b96557 196 /** @defgroup SD_Exported_Types_Group5 SD Card information structure
Kojto 99:dbbf35b96557 197 * @{
Kojto 99:dbbf35b96557 198 */
emilmont 77:869cf507173a 199 typedef struct
emilmont 77:869cf507173a 200 {
emilmont 77:869cf507173a 201 HAL_SD_CSDTypedef SD_csd; /*!< SD card specific data register */
emilmont 77:869cf507173a 202 HAL_SD_CIDTypedef SD_cid; /*!< SD card identification number register */
emilmont 77:869cf507173a 203 uint64_t CardCapacity; /*!< Card capacity */
emilmont 77:869cf507173a 204 uint32_t CardBlockSize; /*!< Card block size */
emilmont 77:869cf507173a 205 uint16_t RCA; /*!< SD relative card address */
emilmont 77:869cf507173a 206 uint8_t CardType; /*!< SD card type */
emilmont 77:869cf507173a 207
emilmont 77:869cf507173a 208 }HAL_SD_CardInfoTypedef;
Kojto 99:dbbf35b96557 209 /**
Kojto 99:dbbf35b96557 210 * @}
Kojto 99:dbbf35b96557 211 */
emilmont 77:869cf507173a 212
Kojto 99:dbbf35b96557 213 /** @defgroup SD_Exported_Types_Group6 SD Error status enumeration Structure definition
Kojto 99:dbbf35b96557 214 * @{
Kojto 99:dbbf35b96557 215 */
emilmont 77:869cf507173a 216 typedef enum
emilmont 77:869cf507173a 217 {
emilmont 77:869cf507173a 218 /**
emilmont 77:869cf507173a 219 * @brief SD specific error defines
emilmont 77:869cf507173a 220 */
Kojto 122:f9eeca106725 221 SD_CMD_CRC_FAIL = (1U), /*!< Command response received (but CRC check failed) */
Kojto 122:f9eeca106725 222 SD_DATA_CRC_FAIL = (2U), /*!< Data block sent/received (CRC check failed) */
Kojto 122:f9eeca106725 223 SD_CMD_RSP_TIMEOUT = (3U), /*!< Command response timeout */
Kojto 122:f9eeca106725 224 SD_DATA_TIMEOUT = (4U), /*!< Data timeout */
Kojto 122:f9eeca106725 225 SD_TX_UNDERRUN = (5U), /*!< Transmit FIFO underrun */
Kojto 122:f9eeca106725 226 SD_RX_OVERRUN = (6U), /*!< Receive FIFO overrun */
Kojto 122:f9eeca106725 227 SD_START_BIT_ERR = (7U), /*!< Start bit not detected on all data signals in wide bus mode */
Kojto 122:f9eeca106725 228 SD_CMD_OUT_OF_RANGE = (8U), /*!< Command's argument was out of range. */
Kojto 122:f9eeca106725 229 SD_ADDR_MISALIGNED = (9U), /*!< Misaligned address */
Kojto 122:f9eeca106725 230 SD_BLOCK_LEN_ERR = (10U), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
Kojto 122:f9eeca106725 231 SD_ERASE_SEQ_ERR = (11U), /*!< An error in the sequence of erase command occurs. */
Kojto 122:f9eeca106725 232 SD_BAD_ERASE_PARAM = (12U), /*!< An invalid selection for erase groups */
Kojto 122:f9eeca106725 233 SD_WRITE_PROT_VIOLATION = (13U), /*!< Attempt to program a write protect block */
Kojto 122:f9eeca106725 234 SD_LOCK_UNLOCK_FAILED = (14U), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
Kojto 122:f9eeca106725 235 SD_COM_CRC_FAILED = (15U), /*!< CRC check of the previous command failed */
Kojto 122:f9eeca106725 236 SD_ILLEGAL_CMD = (16U), /*!< Command is not legal for the card state */
Kojto 122:f9eeca106725 237 SD_CARD_ECC_FAILED = (17U), /*!< Card internal ECC was applied but failed to correct the data */
Kojto 122:f9eeca106725 238 SD_CC_ERROR = (18U), /*!< Internal card controller error */
Kojto 122:f9eeca106725 239 SD_GENERAL_UNKNOWN_ERROR = (19U), /*!< General or unknown error */
Kojto 122:f9eeca106725 240 SD_STREAM_READ_UNDERRUN = (20U), /*!< The card could not sustain data transfer in stream read operation. */
Kojto 122:f9eeca106725 241 SD_STREAM_WRITE_OVERRUN = (21U), /*!< The card could not sustain data programming in stream mode */
Kojto 122:f9eeca106725 242 SD_CID_CSD_OVERWRITE = (22U), /*!< CID/CSD overwrite error */
Kojto 122:f9eeca106725 243 SD_WP_ERASE_SKIP = (23U), /*!< Only partial address space was erased */
Kojto 122:f9eeca106725 244 SD_CARD_ECC_DISABLED = (24U), /*!< Command has been executed without using internal ECC */
Kojto 122:f9eeca106725 245 SD_ERASE_RESET = (25U), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */
Kojto 122:f9eeca106725 246 SD_AKE_SEQ_ERROR = (26U), /*!< Error in sequence of authentication. */
Kojto 122:f9eeca106725 247 SD_INVALID_VOLTRANGE = (27U),
Kojto 122:f9eeca106725 248 SD_ADDR_OUT_OF_RANGE = (28U),
Kojto 122:f9eeca106725 249 SD_SWITCH_ERROR = (29U),
Kojto 122:f9eeca106725 250 SD_SDIO_DISABLED = (30U),
Kojto 122:f9eeca106725 251 SD_SDIO_FUNCTION_BUSY = (31U),
Kojto 122:f9eeca106725 252 SD_SDIO_FUNCTION_FAILED = (32U),
Kojto 122:f9eeca106725 253 SD_SDIO_UNKNOWN_FUNCTION = (33U),
emilmont 77:869cf507173a 254
emilmont 77:869cf507173a 255 /**
emilmont 77:869cf507173a 256 * @brief Standard error defines
emilmont 77:869cf507173a 257 */
Kojto 122:f9eeca106725 258 SD_INTERNAL_ERROR = (34U),
Kojto 122:f9eeca106725 259 SD_NOT_CONFIGURED = (35U),
Kojto 122:f9eeca106725 260 SD_REQUEST_PENDING = (36U),
Kojto 122:f9eeca106725 261 SD_REQUEST_NOT_APPLICABLE = (37U),
Kojto 122:f9eeca106725 262 SD_INVALID_PARAMETER = (38U),
Kojto 122:f9eeca106725 263 SD_UNSUPPORTED_FEATURE = (39U),
Kojto 122:f9eeca106725 264 SD_UNSUPPORTED_HW = (40U),
Kojto 122:f9eeca106725 265 SD_ERROR = (41U),
Kojto 122:f9eeca106725 266 SD_OK = (0U)
emilmont 77:869cf507173a 267
emilmont 77:869cf507173a 268 }HAL_SD_ErrorTypedef;
Kojto 99:dbbf35b96557 269 /**
Kojto 99:dbbf35b96557 270 * @}
Kojto 99:dbbf35b96557 271 */
emilmont 77:869cf507173a 272
Kojto 99:dbbf35b96557 273 /** @defgroup SD_Exported_Types_Group7 SD Transfer state enumeration structure
Kojto 99:dbbf35b96557 274 * @{
Kojto 99:dbbf35b96557 275 */
emilmont 77:869cf507173a 276 typedef enum
emilmont 77:869cf507173a 277 {
Kojto 122:f9eeca106725 278 SD_TRANSFER_OK = 0U, /*!< Transfer success */
Kojto 122:f9eeca106725 279 SD_TRANSFER_BUSY = 1U, /*!< Transfer is occurring */
Kojto 122:f9eeca106725 280 SD_TRANSFER_ERROR = 2U /*!< Transfer failed */
emilmont 77:869cf507173a 281
emilmont 77:869cf507173a 282 }HAL_SD_TransferStateTypedef;
Kojto 99:dbbf35b96557 283 /**
Kojto 99:dbbf35b96557 284 * @}
Kojto 99:dbbf35b96557 285 */
emilmont 77:869cf507173a 286
Kojto 99:dbbf35b96557 287 /** @defgroup SD_Exported_Types_Group8 SD Card State enumeration structure
Kojto 99:dbbf35b96557 288 * @{
Kojto 99:dbbf35b96557 289 */
emilmont 77:869cf507173a 290 typedef enum
emilmont 77:869cf507173a 291 {
Kojto 122:f9eeca106725 292 SD_CARD_READY = ((uint32_t)0x00000001U), /*!< Card state is ready */
Kojto 122:f9eeca106725 293 SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002U), /*!< Card is in identification state */
Kojto 122:f9eeca106725 294 SD_CARD_STANDBY = ((uint32_t)0x00000003U), /*!< Card is in standby state */
Kojto 122:f9eeca106725 295 SD_CARD_TRANSFER = ((uint32_t)0x00000004U), /*!< Card is in transfer state */
Kojto 122:f9eeca106725 296 SD_CARD_SENDING = ((uint32_t)0x00000005U), /*!< Card is sending an operation */
Kojto 122:f9eeca106725 297 SD_CARD_RECEIVING = ((uint32_t)0x00000006U), /*!< Card is receiving operation information */
Kojto 122:f9eeca106725 298 SD_CARD_PROGRAMMING = ((uint32_t)0x00000007U), /*!< Card is in programming state */
Kojto 122:f9eeca106725 299 SD_CARD_DISCONNECTED = ((uint32_t)0x00000008U), /*!< Card is disconnected */
Kojto 122:f9eeca106725 300 SD_CARD_ERROR = ((uint32_t)0x000000FFU) /*!< Card is in error state */
emilmont 77:869cf507173a 301
emilmont 77:869cf507173a 302 }HAL_SD_CardStateTypedef;
Kojto 99:dbbf35b96557 303 /**
Kojto 99:dbbf35b96557 304 * @}
Kojto 99:dbbf35b96557 305 */
emilmont 77:869cf507173a 306
Kojto 99:dbbf35b96557 307 /** @defgroup SD_Exported_Types_Group9 SD Operation enumeration structure
Kojto 99:dbbf35b96557 308 * @{
Kojto 99:dbbf35b96557 309 */
emilmont 77:869cf507173a 310 typedef enum
emilmont 77:869cf507173a 311 {
Kojto 122:f9eeca106725 312 SD_READ_SINGLE_BLOCK = 0U, /*!< Read single block operation */
Kojto 122:f9eeca106725 313 SD_READ_MULTIPLE_BLOCK = 1U, /*!< Read multiple blocks operation */
Kojto 122:f9eeca106725 314 SD_WRITE_SINGLE_BLOCK = 2U, /*!< Write single block operation */
Kojto 122:f9eeca106725 315 SD_WRITE_MULTIPLE_BLOCK = 3U /*!< Write multiple blocks operation */
emilmont 77:869cf507173a 316
emilmont 77:869cf507173a 317 }HAL_SD_OperationTypedef;
Kojto 99:dbbf35b96557 318 /**
Kojto 99:dbbf35b96557 319 * @}
Kojto 99:dbbf35b96557 320 */
emilmont 77:869cf507173a 321
Kojto 99:dbbf35b96557 322 /**
Kojto 99:dbbf35b96557 323 * @}
Kojto 99:dbbf35b96557 324 */
emilmont 77:869cf507173a 325
emilmont 77:869cf507173a 326 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 327 /** @defgroup SD_Exported_Constants SD Exported Constants
emilmont 77:869cf507173a 328 * @{
emilmont 77:869cf507173a 329 */
emilmont 77:869cf507173a 330
emilmont 77:869cf507173a 331 /**
emilmont 77:869cf507173a 332 * @brief SD Commands Index
emilmont 77:869cf507173a 333 */
Kojto 122:f9eeca106725 334 #define SD_CMD_GO_IDLE_STATE ((uint8_t)0U) /*!< Resets the SD memory card. */
Kojto 122:f9eeca106725 335 #define SD_CMD_SEND_OP_COND ((uint8_t)1U) /*!< Sends host capacity support information and activates the card's initialization process. */
Kojto 122:f9eeca106725 336 #define SD_CMD_ALL_SEND_CID ((uint8_t)2U) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */
Kojto 122:f9eeca106725 337 #define SD_CMD_SET_REL_ADDR ((uint8_t)3U) /*!< Asks the card to publish a new relative address (RCA). */
Kojto 122:f9eeca106725 338 #define SD_CMD_SET_DSR ((uint8_t)4U) /*!< Programs the DSR of all cards. */
Kojto 122:f9eeca106725 339 #define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5U) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
emilmont 77:869cf507173a 340 operating condition register (OCR) content in the response on the CMD line. */
Kojto 122:f9eeca106725 341 #define SD_CMD_HS_SWITCH ((uint8_t)6U) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */
Kojto 122:f9eeca106725 342 #define SD_CMD_SEL_DESEL_CARD ((uint8_t)7U) /*!< Selects the card by its own relative address and gets deselected by any other address */
Kojto 122:f9eeca106725 343 #define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8U) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
emilmont 77:869cf507173a 344 and asks the card whether card supports voltage. */
Kojto 122:f9eeca106725 345 #define SD_CMD_SEND_CSD ((uint8_t)9U) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */
Kojto 122:f9eeca106725 346 #define SD_CMD_SEND_CID ((uint8_t)10U) /*!< Addressed card sends its card identification (CID) on the CMD line. */
Kojto 122:f9eeca106725 347 #define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11U) /*!< SD card doesn't support it. */
Kojto 122:f9eeca106725 348 #define SD_CMD_STOP_TRANSMISSION ((uint8_t)12U) /*!< Forces the card to stop transmission. */
Kojto 122:f9eeca106725 349 #define SD_CMD_SEND_STATUS ((uint8_t)13U) /*!< Addressed card sends its status register. */
Kojto 122:f9eeca106725 350 #define SD_CMD_HS_BUSTEST_READ ((uint8_t)14U)
Kojto 122:f9eeca106725 351 #define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15U) /*!< Sends an addressed card into the inactive state. */
Kojto 122:f9eeca106725 352 #define SD_CMD_SET_BLOCKLEN ((uint8_t)16U) /*!< Sets the block length (in bytes for SDSC) for all following block commands
emilmont 77:869cf507173a 353 (read, write, lock). Default block length is fixed to 512 Bytes. Not effective
emilmont 77:869cf507173a 354 for SDHS and SDXC. */
Kojto 122:f9eeca106725 355 #define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17U) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
emilmont 77:869cf507173a 356 fixed 512 bytes in case of SDHC and SDXC. */
Kojto 122:f9eeca106725 357 #define SD_CMD_READ_MULT_BLOCK ((uint8_t)18U) /*!< Continuously transfers data blocks from card to host until interrupted by
emilmont 77:869cf507173a 358 STOP_TRANSMISSION command. */
Kojto 122:f9eeca106725 359 #define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19U) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */
Kojto 122:f9eeca106725 360 #define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20U) /*!< Speed class control command. */
Kojto 122:f9eeca106725 361 #define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23U) /*!< Specify block count for CMD18 and CMD25. */
Kojto 122:f9eeca106725 362 #define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24U) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
emilmont 77:869cf507173a 363 fixed 512 bytes in case of SDHC and SDXC. */
Kojto 122:f9eeca106725 364 #define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25U) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */
Kojto 122:f9eeca106725 365 #define SD_CMD_PROG_CID ((uint8_t)26U) /*!< Reserved for manufacturers. */
Kojto 122:f9eeca106725 366 #define SD_CMD_PROG_CSD ((uint8_t)27U) /*!< Programming of the programmable bits of the CSD. */
Kojto 122:f9eeca106725 367 #define SD_CMD_SET_WRITE_PROT ((uint8_t)28U) /*!< Sets the write protection bit of the addressed group. */
Kojto 122:f9eeca106725 368 #define SD_CMD_CLR_WRITE_PROT ((uint8_t)29U) /*!< Clears the write protection bit of the addressed group. */
Kojto 122:f9eeca106725 369 #define SD_CMD_SEND_WRITE_PROT ((uint8_t)30U) /*!< Asks the card to send the status of the write protection bits. */
Kojto 122:f9eeca106725 370 #define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32U) /*!< Sets the address of the first write block to be erased. (For SD card only). */
Kojto 122:f9eeca106725 371 #define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33U) /*!< Sets the address of the last write block of the continuous range to be erased. */
Kojto 122:f9eeca106725 372 #define SD_CMD_ERASE_GRP_START ((uint8_t)35U) /*!< Sets the address of the first write block to be erased. Reserved for each command
emilmont 77:869cf507173a 373 system set by switch function command (CMD6). */
Kojto 122:f9eeca106725 374 #define SD_CMD_ERASE_GRP_END ((uint8_t)36U) /*!< Sets the address of the last write block of the continuous range to be erased.
emilmont 77:869cf507173a 375 Reserved for each command system set by switch function command (CMD6). */
Kojto 122:f9eeca106725 376 #define SD_CMD_ERASE ((uint8_t)38U) /*!< Reserved for SD security applications. */
Kojto 122:f9eeca106725 377 #define SD_CMD_FAST_IO ((uint8_t)39U) /*!< SD card doesn't support it (Reserved). */
Kojto 122:f9eeca106725 378 #define SD_CMD_GO_IRQ_STATE ((uint8_t)40U) /*!< SD card doesn't support it (Reserved). */
Kojto 122:f9eeca106725 379 #define SD_CMD_LOCK_UNLOCK ((uint8_t)42U) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
emilmont 77:869cf507173a 380 the SET_BLOCK_LEN command. */
Kojto 122:f9eeca106725 381 #define SD_CMD_APP_CMD ((uint8_t)55U) /*!< Indicates to the card that the next command is an application specific command rather
emilmont 77:869cf507173a 382 than a standard command. */
Kojto 122:f9eeca106725 383 #define SD_CMD_GEN_CMD ((uint8_t)56U) /*!< Used either to transfer a data block to the card or to get a data block from the card
emilmont 77:869cf507173a 384 for general purpose/application specific commands. */
Kojto 122:f9eeca106725 385 #define SD_CMD_NO_CMD ((uint8_t)64U)
emilmont 77:869cf507173a 386
emilmont 77:869cf507173a 387 /**
emilmont 77:869cf507173a 388 * @brief Following commands are SD Card Specific commands.
emilmont 77:869cf507173a 389 * SDIO_APP_CMD should be sent before sending these commands.
emilmont 77:869cf507173a 390 */
Kojto 122:f9eeca106725 391 #define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6U) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
emilmont 77:869cf507173a 392 widths are given in SCR register. */
Kojto 122:f9eeca106725 393 #define SD_CMD_SD_APP_STATUS ((uint8_t)13U) /*!< (ACMD13) Sends the SD status. */
Kojto 122:f9eeca106725 394 #define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22U) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
emilmont 77:869cf507173a 395 32bit+CRC data block. */
Kojto 122:f9eeca106725 396 #define SD_CMD_SD_APP_OP_COND ((uint8_t)41U) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
emilmont 77:869cf507173a 397 send its operating condition register (OCR) content in the response on the CMD line. */
Kojto 122:f9eeca106725 398 #define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42U) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */
Kojto 122:f9eeca106725 399 #define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51U) /*!< Reads the SD Configuration Register (SCR). */
Kojto 122:f9eeca106725 400 #define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52U) /*!< For SD I/O card only, reserved for security specification. */
Kojto 122:f9eeca106725 401 #define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53U) /*!< For SD I/O card only, reserved for security specification. */
emilmont 77:869cf507173a 402
emilmont 77:869cf507173a 403 /**
emilmont 77:869cf507173a 404 * @brief Following commands are SD Card Specific security commands.
emilmont 77:869cf507173a 405 * SD_CMD_APP_CMD should be sent before sending these commands.
emilmont 77:869cf507173a 406 */
Kojto 122:f9eeca106725 407 #define SD_CMD_SD_APP_GET_MKB ((uint8_t)43U) /*!< For SD card only */
Kojto 122:f9eeca106725 408 #define SD_CMD_SD_APP_GET_MID ((uint8_t)44U) /*!< For SD card only */
Kojto 122:f9eeca106725 409 #define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45U) /*!< For SD card only */
Kojto 122:f9eeca106725 410 #define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46U) /*!< For SD card only */
Kojto 122:f9eeca106725 411 #define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47U) /*!< For SD card only */
Kojto 122:f9eeca106725 412 #define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48U) /*!< For SD card only */
Kojto 122:f9eeca106725 413 #define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18U) /*!< For SD card only */
Kojto 122:f9eeca106725 414 #define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25U) /*!< For SD card only */
Kojto 122:f9eeca106725 415 #define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38U) /*!< For SD card only */
Kojto 122:f9eeca106725 416 #define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49U) /*!< For SD card only */
Kojto 122:f9eeca106725 417 #define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48U) /*!< For SD card only */
emilmont 77:869cf507173a 418
emilmont 77:869cf507173a 419 /**
emilmont 77:869cf507173a 420 * @brief Supported SD Memory Cards
emilmont 77:869cf507173a 421 */
Kojto 122:f9eeca106725 422 #define STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 423 #define STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001U)
Kojto 122:f9eeca106725 424 #define HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002U)
Kojto 122:f9eeca106725 425 #define MULTIMEDIA_CARD ((uint32_t)0x00000003U)
Kojto 122:f9eeca106725 426 #define SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004U)
Kojto 122:f9eeca106725 427 #define HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005U)
Kojto 122:f9eeca106725 428 #define SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006U)
Kojto 122:f9eeca106725 429 #define HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007U)
emilmont 77:869cf507173a 430 /**
emilmont 77:869cf507173a 431 * @}
emilmont 77:869cf507173a 432 */
emilmont 77:869cf507173a 433
emilmont 77:869cf507173a 434 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 435 /** @defgroup SD_Exported_macros SD Exported Macros
Kojto 99:dbbf35b96557 436 * @brief macros to handle interrupts and specific clock configurations
Kojto 99:dbbf35b96557 437 * @{
Kojto 99:dbbf35b96557 438 */
emilmont 77:869cf507173a 439
emilmont 77:869cf507173a 440 /**
emilmont 77:869cf507173a 441 * @brief Enable the SD device.
emilmont 77:869cf507173a 442 * @retval None
emilmont 77:869cf507173a 443 */
emilmont 77:869cf507173a 444 #define __HAL_SD_SDIO_ENABLE() __SDIO_ENABLE()
emilmont 77:869cf507173a 445
emilmont 77:869cf507173a 446 /**
emilmont 77:869cf507173a 447 * @brief Disable the SD device.
emilmont 77:869cf507173a 448 * @retval None
emilmont 77:869cf507173a 449 */
emilmont 77:869cf507173a 450 #define __HAL_SD_SDIO_DISABLE() __SDIO_DISABLE()
emilmont 77:869cf507173a 451
emilmont 77:869cf507173a 452 /**
emilmont 77:869cf507173a 453 * @brief Enable the SDIO DMA transfer.
emilmont 77:869cf507173a 454 * @retval None
emilmont 77:869cf507173a 455 */
emilmont 77:869cf507173a 456 #define __HAL_SD_SDIO_DMA_ENABLE() __SDIO_DMA_ENABLE()
emilmont 77:869cf507173a 457
emilmont 77:869cf507173a 458 /**
emilmont 77:869cf507173a 459 * @brief Disable the SDIO DMA transfer.
emilmont 77:869cf507173a 460 * @retval None
emilmont 77:869cf507173a 461 */
emilmont 77:869cf507173a 462 #define __HAL_SD_SDIO_DMA_DISABLE() __SDIO_DMA_DISABLE()
emilmont 77:869cf507173a 463
emilmont 77:869cf507173a 464 /**
emilmont 77:869cf507173a 465 * @brief Enable the SD device interrupt.
emilmont 77:869cf507173a 466 * @param __HANDLE__: SD Handle
emilmont 77:869cf507173a 467 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be enabled.
emilmont 77:869cf507173a 468 * This parameter can be one or a combination of the following values:
emilmont 77:869cf507173a 469 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
emilmont 77:869cf507173a 470 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
emilmont 77:869cf507173a 471 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
emilmont 77:869cf507173a 472 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
emilmont 77:869cf507173a 473 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
emilmont 77:869cf507173a 474 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
emilmont 77:869cf507173a 475 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
emilmont 77:869cf507173a 476 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
emilmont 77:869cf507173a 477 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
emilmont 77:869cf507173a 478 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
emilmont 77:869cf507173a 479 * bus mode interrupt
emilmont 77:869cf507173a 480 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
emilmont 77:869cf507173a 481 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
emilmont 77:869cf507173a 482 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
emilmont 77:869cf507173a 483 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
emilmont 77:869cf507173a 484 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
emilmont 77:869cf507173a 485 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
emilmont 77:869cf507173a 486 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
emilmont 77:869cf507173a 487 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
emilmont 77:869cf507173a 488 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
emilmont 77:869cf507173a 489 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
emilmont 77:869cf507173a 490 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
emilmont 77:869cf507173a 491 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
emilmont 77:869cf507173a 492 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
emilmont 77:869cf507173a 493 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
emilmont 77:869cf507173a 494 * @retval None
emilmont 77:869cf507173a 495 */
emilmont 77:869cf507173a 496 #define __HAL_SD_SDIO_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
emilmont 77:869cf507173a 497
emilmont 77:869cf507173a 498 /**
emilmont 77:869cf507173a 499 * @brief Disable the SD device interrupt.
emilmont 77:869cf507173a 500 * @param __HANDLE__: SD Handle
emilmont 77:869cf507173a 501 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be disabled.
emilmont 77:869cf507173a 502 * This parameter can be one or a combination of the following values:
emilmont 77:869cf507173a 503 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
emilmont 77:869cf507173a 504 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
emilmont 77:869cf507173a 505 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
emilmont 77:869cf507173a 506 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
emilmont 77:869cf507173a 507 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
emilmont 77:869cf507173a 508 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
emilmont 77:869cf507173a 509 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
emilmont 77:869cf507173a 510 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
emilmont 77:869cf507173a 511 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
emilmont 77:869cf507173a 512 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
emilmont 77:869cf507173a 513 * bus mode interrupt
emilmont 77:869cf507173a 514 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
emilmont 77:869cf507173a 515 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
emilmont 77:869cf507173a 516 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
emilmont 77:869cf507173a 517 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
emilmont 77:869cf507173a 518 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
emilmont 77:869cf507173a 519 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
emilmont 77:869cf507173a 520 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
emilmont 77:869cf507173a 521 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
emilmont 77:869cf507173a 522 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
emilmont 77:869cf507173a 523 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
emilmont 77:869cf507173a 524 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
emilmont 77:869cf507173a 525 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
emilmont 77:869cf507173a 526 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
emilmont 77:869cf507173a 527 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
emilmont 77:869cf507173a 528 * @retval None
emilmont 77:869cf507173a 529 */
emilmont 77:869cf507173a 530 #define __HAL_SD_SDIO_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
emilmont 77:869cf507173a 531
emilmont 77:869cf507173a 532 /**
emilmont 77:869cf507173a 533 * @brief Check whether the specified SD flag is set or not.
emilmont 77:869cf507173a 534 * @param __HANDLE__: SD Handle
emilmont 77:869cf507173a 535 * @param __FLAG__: specifies the flag to check.
emilmont 77:869cf507173a 536 * This parameter can be one of the following values:
emilmont 77:869cf507173a 537 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
emilmont 77:869cf507173a 538 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
emilmont 77:869cf507173a 539 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
emilmont 77:869cf507173a 540 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
emilmont 77:869cf507173a 541 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
emilmont 77:869cf507173a 542 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
emilmont 77:869cf507173a 543 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
emilmont 77:869cf507173a 544 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
emilmont 77:869cf507173a 545 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
emilmont 77:869cf507173a 546 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
emilmont 77:869cf507173a 547 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
emilmont 77:869cf507173a 548 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
emilmont 77:869cf507173a 549 * @arg SDIO_FLAG_TXACT: Data transmit in progress
emilmont 77:869cf507173a 550 * @arg SDIO_FLAG_RXACT: Data receive in progress
emilmont 77:869cf507173a 551 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
emilmont 77:869cf507173a 552 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
emilmont 77:869cf507173a 553 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
emilmont 77:869cf507173a 554 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
emilmont 77:869cf507173a 555 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
emilmont 77:869cf507173a 556 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
emilmont 77:869cf507173a 557 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
emilmont 77:869cf507173a 558 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
emilmont 77:869cf507173a 559 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
emilmont 77:869cf507173a 560 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
emilmont 77:869cf507173a 561 * @retval The new state of SD FLAG (SET or RESET).
emilmont 77:869cf507173a 562 */
emilmont 77:869cf507173a 563 #define __HAL_SD_SDIO_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
emilmont 77:869cf507173a 564
emilmont 77:869cf507173a 565 /**
emilmont 77:869cf507173a 566 * @brief Clear the SD's pending flags.
emilmont 77:869cf507173a 567 * @param __HANDLE__: SD Handle
emilmont 77:869cf507173a 568 * @param __FLAG__: specifies the flag to clear.
emilmont 77:869cf507173a 569 * This parameter can be one or a combination of the following values:
emilmont 77:869cf507173a 570 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
emilmont 77:869cf507173a 571 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
emilmont 77:869cf507173a 572 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
emilmont 77:869cf507173a 573 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
emilmont 77:869cf507173a 574 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
emilmont 77:869cf507173a 575 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
emilmont 77:869cf507173a 576 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
emilmont 77:869cf507173a 577 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
emilmont 77:869cf507173a 578 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
emilmont 77:869cf507173a 579 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
emilmont 77:869cf507173a 580 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
emilmont 77:869cf507173a 581 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
emilmont 77:869cf507173a 582 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
emilmont 77:869cf507173a 583 * @retval None
emilmont 77:869cf507173a 584 */
emilmont 77:869cf507173a 585 #define __HAL_SD_SDIO_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
emilmont 77:869cf507173a 586
emilmont 77:869cf507173a 587 /**
emilmont 77:869cf507173a 588 * @brief Check whether the specified SD interrupt has occurred or not.
emilmont 77:869cf507173a 589 * @param __HANDLE__: SD Handle
emilmont 77:869cf507173a 590 * @param __INTERRUPT__: specifies the SDIO interrupt source to check.
emilmont 77:869cf507173a 591 * This parameter can be one of the following values:
emilmont 77:869cf507173a 592 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
emilmont 77:869cf507173a 593 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
emilmont 77:869cf507173a 594 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
emilmont 77:869cf507173a 595 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
emilmont 77:869cf507173a 596 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
emilmont 77:869cf507173a 597 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
emilmont 77:869cf507173a 598 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
emilmont 77:869cf507173a 599 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
emilmont 77:869cf507173a 600 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
emilmont 77:869cf507173a 601 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
emilmont 77:869cf507173a 602 * bus mode interrupt
emilmont 77:869cf507173a 603 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
emilmont 77:869cf507173a 604 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
emilmont 77:869cf507173a 605 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
emilmont 77:869cf507173a 606 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
emilmont 77:869cf507173a 607 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
emilmont 77:869cf507173a 608 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
emilmont 77:869cf507173a 609 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
emilmont 77:869cf507173a 610 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
emilmont 77:869cf507173a 611 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
emilmont 77:869cf507173a 612 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
emilmont 77:869cf507173a 613 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
emilmont 77:869cf507173a 614 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
emilmont 77:869cf507173a 615 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
emilmont 77:869cf507173a 616 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
emilmont 77:869cf507173a 617 * @retval The new state of SD IT (SET or RESET).
emilmont 77:869cf507173a 618 */
emilmont 77:869cf507173a 619 #define __HAL_SD_SDIO_GET_IT (__HANDLE__, __INTERRUPT__) __SDIO_GET_IT ((__HANDLE__)->Instance, __INTERRUPT__)
emilmont 77:869cf507173a 620
emilmont 77:869cf507173a 621 /**
emilmont 77:869cf507173a 622 * @brief Clear the SD's interrupt pending bits.
Kojto 122:f9eeca106725 623 * @param __HANDLE__: SD Handle
emilmont 77:869cf507173a 624 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
emilmont 77:869cf507173a 625 * This parameter can be one or a combination of the following values:
emilmont 77:869cf507173a 626 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
emilmont 77:869cf507173a 627 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
emilmont 77:869cf507173a 628 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
emilmont 77:869cf507173a 629 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
emilmont 77:869cf507173a 630 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
emilmont 77:869cf507173a 631 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
emilmont 77:869cf507173a 632 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
emilmont 77:869cf507173a 633 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
emilmont 77:869cf507173a 634 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
emilmont 77:869cf507173a 635 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
emilmont 77:869cf507173a 636 * bus mode interrupt
emilmont 77:869cf507173a 637 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
emilmont 77:869cf507173a 638 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
emilmont 77:869cf507173a 639 * @retval None
emilmont 77:869cf507173a 640 */
emilmont 77:869cf507173a 641 #define __HAL_SD_SDIO_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
emilmont 77:869cf507173a 642 /**
emilmont 77:869cf507173a 643 * @}
emilmont 77:869cf507173a 644 */
emilmont 77:869cf507173a 645
emilmont 77:869cf507173a 646 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 647 /** @defgroup SD_Exported_Functions SD Exported Functions
Kojto 90:cb3d968589d8 648 * @{
Kojto 90:cb3d968589d8 649 */
Kojto 99:dbbf35b96557 650
Kojto 99:dbbf35b96557 651 /** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 90:cb3d968589d8 652 * @{
Kojto 90:cb3d968589d8 653 */
emilmont 77:869cf507173a 654 HAL_SD_ErrorTypedef HAL_SD_Init(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *SDCardInfo);
emilmont 77:869cf507173a 655 HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd);
bogdanm 81:7d30d6019079 656 void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
bogdanm 81:7d30d6019079 657 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
Kojto 90:cb3d968589d8 658 /**
Kojto 90:cb3d968589d8 659 * @}
Kojto 90:cb3d968589d8 660 */
Kojto 99:dbbf35b96557 661
Kojto 99:dbbf35b96557 662 /** @defgroup SD_Exported_Functions_Group2 I/O operation functions
Kojto 90:cb3d968589d8 663 * @{
Kojto 90:cb3d968589d8 664 */
emilmont 77:869cf507173a 665 /* Blocking mode: Polling */
emilmont 77:869cf507173a 666 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
emilmont 77:869cf507173a 667 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
emilmont 77:869cf507173a 668 HAL_SD_ErrorTypedef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint64_t startaddr, uint64_t endaddr);
emilmont 77:869cf507173a 669
emilmont 77:869cf507173a 670 /* Non-Blocking mode: Interrupt */
emilmont 77:869cf507173a 671 void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
emilmont 77:869cf507173a 672
emilmont 77:869cf507173a 673 /* Callback in non blocking modes (DMA) */
bogdanm 81:7d30d6019079 674 void HAL_SD_DMA_RxCpltCallback(DMA_HandleTypeDef *hdma);
bogdanm 81:7d30d6019079 675 void HAL_SD_DMA_RxErrorCallback(DMA_HandleTypeDef *hdma);
bogdanm 81:7d30d6019079 676 void HAL_SD_DMA_TxCpltCallback(DMA_HandleTypeDef *hdma);
bogdanm 81:7d30d6019079 677 void HAL_SD_DMA_TxErrorCallback(DMA_HandleTypeDef *hdma);
bogdanm 81:7d30d6019079 678 void HAL_SD_XferCpltCallback(SD_HandleTypeDef *hsd);
bogdanm 81:7d30d6019079 679 void HAL_SD_XferErrorCallback(SD_HandleTypeDef *hsd);
emilmont 77:869cf507173a 680
emilmont 77:869cf507173a 681 /* Non-Blocking mode: DMA */
emilmont 77:869cf507173a 682 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
emilmont 77:869cf507173a 683 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
emilmont 77:869cf507173a 684 HAL_SD_ErrorTypedef HAL_SD_CheckWriteOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
emilmont 77:869cf507173a 685 HAL_SD_ErrorTypedef HAL_SD_CheckReadOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
Kojto 90:cb3d968589d8 686 /**
Kojto 90:cb3d968589d8 687 * @}
Kojto 90:cb3d968589d8 688 */
Kojto 99:dbbf35b96557 689
Kojto 99:dbbf35b96557 690 /** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions
Kojto 90:cb3d968589d8 691 * @{
Kojto 90:cb3d968589d8 692 */
emilmont 77:869cf507173a 693 HAL_SD_ErrorTypedef HAL_SD_Get_CardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *pCardInfo);
emilmont 77:869cf507173a 694 HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32_t WideMode);
emilmont 77:869cf507173a 695 HAL_SD_ErrorTypedef HAL_SD_StopTransfer(SD_HandleTypeDef *hsd);
emilmont 77:869cf507173a 696 HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd);
Kojto 90:cb3d968589d8 697 /**
Kojto 90:cb3d968589d8 698 * @}
Kojto 90:cb3d968589d8 699 */
Kojto 90:cb3d968589d8 700
Kojto 90:cb3d968589d8 701 /* Peripheral State functions ************************************************/
Kojto 99:dbbf35b96557 702 /** @defgroup SD_Exported_Functions_Group4 Peripheral State functions
Kojto 90:cb3d968589d8 703 * @{
Kojto 90:cb3d968589d8 704 */
emilmont 77:869cf507173a 705 HAL_SD_ErrorTypedef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus);
emilmont 77:869cf507173a 706 HAL_SD_ErrorTypedef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pCardStatus);
emilmont 77:869cf507173a 707 HAL_SD_TransferStateTypedef HAL_SD_GetStatus(SD_HandleTypeDef *hsd);
Kojto 90:cb3d968589d8 708 /**
Kojto 90:cb3d968589d8 709 * @}
Kojto 90:cb3d968589d8 710 */
Kojto 90:cb3d968589d8 711
Kojto 90:cb3d968589d8 712 /**
Kojto 90:cb3d968589d8 713 * @}
Kojto 90:cb3d968589d8 714 */
Kojto 90:cb3d968589d8 715
Kojto 99:dbbf35b96557 716 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 717 /** @defgroup SD_Private_Types SD Private Types
Kojto 99:dbbf35b96557 718 * @{
Kojto 99:dbbf35b96557 719 */
Kojto 99:dbbf35b96557 720
Kojto 99:dbbf35b96557 721 /**
Kojto 99:dbbf35b96557 722 * @}
Kojto 99:dbbf35b96557 723 */
Kojto 99:dbbf35b96557 724
Kojto 99:dbbf35b96557 725 /* Private defines -----------------------------------------------------------*/
Kojto 99:dbbf35b96557 726 /** @defgroup SD_Private_Defines SD Private Defines
Kojto 99:dbbf35b96557 727 * @{
Kojto 99:dbbf35b96557 728 */
Kojto 99:dbbf35b96557 729
Kojto 99:dbbf35b96557 730 /**
Kojto 99:dbbf35b96557 731 * @}
Kojto 99:dbbf35b96557 732 */
Kojto 99:dbbf35b96557 733
Kojto 99:dbbf35b96557 734 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 735 /** @defgroup SD_Private_Variables SD Private Variables
Kojto 99:dbbf35b96557 736 * @{
Kojto 99:dbbf35b96557 737 */
Kojto 99:dbbf35b96557 738
Kojto 99:dbbf35b96557 739 /**
Kojto 99:dbbf35b96557 740 * @}
Kojto 99:dbbf35b96557 741 */
Kojto 99:dbbf35b96557 742
Kojto 99:dbbf35b96557 743 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 744 /** @defgroup SD_Private_Constants SD Private Constants
Kojto 99:dbbf35b96557 745 * @{
Kojto 99:dbbf35b96557 746 */
Kojto 99:dbbf35b96557 747
Kojto 99:dbbf35b96557 748 /**
Kojto 99:dbbf35b96557 749 * @}
Kojto 99:dbbf35b96557 750 */
Kojto 99:dbbf35b96557 751
Kojto 99:dbbf35b96557 752 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 753 /** @defgroup SD_Private_Macros SD Private Macros
Kojto 99:dbbf35b96557 754 * @{
Kojto 99:dbbf35b96557 755 */
Kojto 99:dbbf35b96557 756
Kojto 99:dbbf35b96557 757 /**
Kojto 99:dbbf35b96557 758 * @}
Kojto 99:dbbf35b96557 759 */
Kojto 99:dbbf35b96557 760
Kojto 99:dbbf35b96557 761 /* Private functions prototypes ----------------------------------------------*/
Kojto 99:dbbf35b96557 762 /** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes
Kojto 99:dbbf35b96557 763 * @{
Kojto 99:dbbf35b96557 764 */
Kojto 99:dbbf35b96557 765
Kojto 99:dbbf35b96557 766 /**
Kojto 99:dbbf35b96557 767 * @}
Kojto 99:dbbf35b96557 768 */
Kojto 99:dbbf35b96557 769
Kojto 99:dbbf35b96557 770 /* Private functions ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 771 /** @defgroup SD_Private_Functions SD Private Functions
Kojto 99:dbbf35b96557 772 * @{
Kojto 99:dbbf35b96557 773 */
Kojto 99:dbbf35b96557 774
Kojto 99:dbbf35b96557 775 /**
Kojto 99:dbbf35b96557 776 * @}
Kojto 99:dbbf35b96557 777 */
Kojto 99:dbbf35b96557 778
emilmont 77:869cf507173a 779 /**
emilmont 77:869cf507173a 780 * @}
emilmont 77:869cf507173a 781 */
emilmont 77:869cf507173a 782
emilmont 77:869cf507173a 783 /**
emilmont 77:869cf507173a 784 * @}
Kojto 99:dbbf35b96557 785 */
Kojto 110:165afa46840b 786 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
Kojto 122:f9eeca106725 787 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx ||
Kojto 122:f9eeca106725 788 STM32F412Rx || STM32F412Cx */
emilmont 77:869cf507173a 789 #ifdef __cplusplus
emilmont 77:869cf507173a 790 }
emilmont 77:869cf507173a 791 #endif
emilmont 77:869cf507173a 792
Kojto 99:dbbf35b96557 793 #endif /* __STM32F4xx_HAL_SD_H */
emilmont 77:869cf507173a 794
emilmont 77:869cf507173a 795 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/