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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_NUCLEO_F401RE/stm32f4xx_hal_dma2d.h@122:f9eeca106725, 2016-07-07 (annotated)

Committer:
Kojto
Date:
Thu Jul 07 14:34:11 2016 +0100
Revision:
122:f9eeca106725
Parent:
110:165afa46840b 
Release 122 of the mbed library



Changes:

- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4

- Thread safety addition - mbed API should contain a statement about thread safety

- critical section API addition

- CAS API (core_util_atomic_incr/decr)

- DEVICE_ are generated from targets.json file, device.h deprecated

- Callback replaces FunctionPointer to provide std like interface

- mbed HAL API docs improvements

- toolchain - prexif attributes with MBED_

            - add new attributes - packed, weak, forcedinline, align

- target.json - contains targets definitions

- ST - L1XX - Cube update to 1.5

     - SPI clock selection fix (clock from APB domain)

     - F7 - Cube update v1.4.0

     - L0 -  baudrate init fix

     - L1 - Cube update v1.5

     - F3 - baudrate init fix, 3 targets CAN support

     - F4 - Cube update v1.12.0, 3 targets CAN support

     - L4XX - Cube update v1.5.1

     - F0 - update Cube to v1.5.0

     - L4 - 2 targets (L476RG/VG) CAN support

- NXP - pwm clock fix for KSDK2 MCU

      - LPC2368 - remove ARM toolchain support - due to regression

      - KSDK2 - fix SPI , I2C address and repeat start

- Silabs - some fixes backported from mbed 3

- Renesas - RZ_A1H - SystemCoreClockUpdate addition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_dma2d.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.5.0
Kojto 122:f9eeca106725 6 * @date 06-May-2016
emilmont 77:869cf507173a 7 * @brief Header file of DMA2D HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
Kojto 122:f9eeca106725 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_DMA2D_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_DMA2D_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
Kojto 110:165afa46840b 46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 110:165afa46840b 47 defined(STM32F469xx) || defined(STM32F479xx)
emilmont 77:869cf507173a 48 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 49 #include "stm32f4xx_hal_def.h"
emilmont 77:869cf507173a 50
emilmont 77:869cf507173a 51 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 52 * @{
emilmont 77:869cf507173a 53 */
emilmont 77:869cf507173a 54
Kojto 122:f9eeca106725 55 /** @addtogroup DMA2D DMA2D
Kojto 99:dbbf35b96557 56 * @brief DMA2D HAL module driver
emilmont 77:869cf507173a 57 * @{
Kojto 99:dbbf35b96557 58 */
Kojto 99:dbbf35b96557 59
emilmont 77:869cf507173a 60 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 61 /** @defgroup DMA2D_Exported_Types DMA2D Exported Types
Kojto 99:dbbf35b96557 62 * @{
Kojto 99:dbbf35b96557 63 */
Kojto 122:f9eeca106725 64 #define MAX_DMA2D_LAYER 2U
bogdanm 85:024bf7f99721 65
emilmont 77:869cf507173a 66 /**
bogdanm 85:024bf7f99721 67 * @brief DMA2D color Structure definition
emilmont 77:869cf507173a 68 */
emilmont 77:869cf507173a 69 typedef struct
emilmont 77:869cf507173a 70 {
emilmont 77:869cf507173a 71 uint32_t Blue; /*!< Configures the blue value.
emilmont 77:869cf507173a 72 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
emilmont 77:869cf507173a 73
bogdanm 85:024bf7f99721 74 uint32_t Green; /*!< Configures the green value.
emilmont 77:869cf507173a 75 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
bogdanm 85:024bf7f99721 76
bogdanm 85:024bf7f99721 77 uint32_t Red; /*!< Configures the red value.
emilmont 77:869cf507173a 78 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
emilmont 77:869cf507173a 79 } DMA2D_ColorTypeDef;
emilmont 77:869cf507173a 80
emilmont 77:869cf507173a 81 /**
bogdanm 85:024bf7f99721 82 * @brief DMA2D CLUT Structure definition
emilmont 77:869cf507173a 83 */
emilmont 77:869cf507173a 84 typedef struct
emilmont 77:869cf507173a 85 {
bogdanm 85:024bf7f99721 86 uint32_t *pCLUT; /*!< Configures the DMA2D CLUT memory address.*/
emilmont 77:869cf507173a 87
Kojto 122:f9eeca106725 88 uint32_t CLUTColorMode; /*!< Configures the DMA2D CLUT color mode.
Kojto 122:f9eeca106725 89 This parameter can be one value of @ref DMA2D_CLUT_CM. */
bogdanm 85:024bf7f99721 90
Kojto 122:f9eeca106725 91 uint32_t Size; /*!< Configures the DMA2D CLUT size.
bogdanm 85:024bf7f99721 92 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
emilmont 77:869cf507173a 93 } DMA2D_CLUTCfgTypeDef;
emilmont 77:869cf507173a 94
emilmont 77:869cf507173a 95 /**
bogdanm 85:024bf7f99721 96 * @brief DMA2D Init structure definition
emilmont 77:869cf507173a 97 */
emilmont 77:869cf507173a 98 typedef struct
emilmont 77:869cf507173a 99 {
Kojto 122:f9eeca106725 100 uint32_t Mode; /*!< Configures the DMA2D transfer mode.
Kojto 122:f9eeca106725 101 This parameter can be one value of @ref DMA2D_Mode. */
bogdanm 85:024bf7f99721 102
Kojto 122:f9eeca106725 103 uint32_t ColorMode; /*!< Configures the color format of the output image.
Kojto 122:f9eeca106725 104 This parameter can be one value of @ref DMA2D_Output_Color_Mode. */
emilmont 77:869cf507173a 105
Kojto 122:f9eeca106725 106 uint32_t OutputOffset; /*!< Specifies the Offset value.
Kojto 122:f9eeca106725 107 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
Kojto 122:f9eeca106725 108
emilmont 77:869cf507173a 109 } DMA2D_InitTypeDef;
emilmont 77:869cf507173a 110
emilmont 77:869cf507173a 111 /**
bogdanm 85:024bf7f99721 112 * @brief DMA2D Layer structure definition
emilmont 77:869cf507173a 113 */
emilmont 77:869cf507173a 114 typedef struct
emilmont 77:869cf507173a 115 {
Kojto 122:f9eeca106725 116 uint32_t InputOffset; /*!< Configures the DMA2D foreground or background offset.
emilmont 77:869cf507173a 117 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
emilmont 77:869cf507173a 118
Kojto 122:f9eeca106725 119 uint32_t InputColorMode; /*!< Configures the DMA2D foreground or background color mode.
Kojto 122:f9eeca106725 120 This parameter can be one value of @ref DMA2D_Input_Color_Mode. */
bogdanm 85:024bf7f99721 121
Kojto 122:f9eeca106725 122 uint32_t AlphaMode; /*!< Configures the DMA2D foreground or background alpha mode.
Kojto 122:f9eeca106725 123 This parameter can be one value of @ref DMA2D_Alpha_Mode. */
emilmont 77:869cf507173a 124
Kojto 122:f9eeca106725 125 uint32_t InputAlpha; /*!< Specifies the DMA2D foreground or background alpha value and color value in case of A8 or A4 color mode.
Kojto 122:f9eeca106725 126 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF except for the color modes detailed below.
Kojto 122:f9eeca106725 127 @note In case of A8 or A4 color mode (ARGB), this parameter must be a number between
Kojto 122:f9eeca106725 128 Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF where
Kojto 122:f9eeca106725 129 - InputAlpha[24:31] is the alpha value ALPHA[0:7]
Kojto 122:f9eeca106725 130 - InputAlpha[16:23] is the red value RED[0:7]
Kojto 122:f9eeca106725 131 - InputAlpha[8:15] is the green value GREEN[0:7]
Kojto 122:f9eeca106725 132 - InputAlpha[0:7] is the blue value BLUE[0:7]. */
Kojto 122:f9eeca106725 133
emilmont 77:869cf507173a 134 } DMA2D_LayerCfgTypeDef;
emilmont 77:869cf507173a 135
emilmont 77:869cf507173a 136 /**
bogdanm 85:024bf7f99721 137 * @brief HAL DMA2D State structures definition
bogdanm 85:024bf7f99721 138 */
emilmont 77:869cf507173a 139 typedef enum
emilmont 77:869cf507173a 140 {
Kojto 122:f9eeca106725 141 HAL_DMA2D_STATE_RESET = 0x00U, /*!< DMA2D not yet initialized or disabled */
Kojto 122:f9eeca106725 142 HAL_DMA2D_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
Kojto 122:f9eeca106725 143 HAL_DMA2D_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
Kojto 122:f9eeca106725 144 HAL_DMA2D_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
Kojto 122:f9eeca106725 145 HAL_DMA2D_STATE_ERROR = 0x04U, /*!< DMA2D state error */
Kojto 122:f9eeca106725 146 HAL_DMA2D_STATE_SUSPEND = 0x05U /*!< DMA2D process is suspended */
emilmont 77:869cf507173a 147 }HAL_DMA2D_StateTypeDef;
emilmont 77:869cf507173a 148
Kojto 122:f9eeca106725 149 /**
bogdanm 85:024bf7f99721 150 * @brief DMA2D handle Structure definition
bogdanm 85:024bf7f99721 151 */
emilmont 77:869cf507173a 152 typedef struct __DMA2D_HandleTypeDef
bogdanm 85:024bf7f99721 153 {
Kojto 122:f9eeca106725 154 DMA2D_TypeDef *Instance; /*!< DMA2D register base address. */
bogdanm 85:024bf7f99721 155
Kojto 122:f9eeca106725 156 DMA2D_InitTypeDef Init; /*!< DMA2D communication parameters. */
bogdanm 85:024bf7f99721 157
Kojto 122:f9eeca106725 158 void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer complete callback. */
bogdanm 85:024bf7f99721 159
Kojto 122:f9eeca106725 160 void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback. */
bogdanm 85:024bf7f99721 161
Kojto 122:f9eeca106725 162 DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /*!< DMA2D Layers parameters */
bogdanm 85:024bf7f99721 163
Kojto 122:f9eeca106725 164 HAL_LockTypeDef Lock; /*!< DMA2D lock. */
bogdanm 85:024bf7f99721 165
Kojto 122:f9eeca106725 166 __IO HAL_DMA2D_StateTypeDef State; /*!< DMA2D transfer state. */
bogdanm 85:024bf7f99721 167
Kojto 122:f9eeca106725 168 __IO uint32_t ErrorCode; /*!< DMA2D error code. */
bogdanm 85:024bf7f99721 169 } DMA2D_HandleTypeDef;
emilmont 77:869cf507173a 170 /**
emilmont 77:869cf507173a 171 * @}
emilmont 77:869cf507173a 172 */
emilmont 77:869cf507173a 173
Kojto 99:dbbf35b96557 174 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 175 /** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants
Kojto 99:dbbf35b96557 176 * @{
Kojto 99:dbbf35b96557 177 */
Kojto 99:dbbf35b96557 178
Kojto 99:dbbf35b96557 179 /** @defgroup DMA2D_Error_Code DMA2D Error Code
emilmont 77:869cf507173a 180 * @{
emilmont 77:869cf507173a 181 */
Kojto 122:f9eeca106725 182 #define HAL_DMA2D_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
Kojto 122:f9eeca106725 183 #define HAL_DMA2D_ERROR_TE ((uint32_t)0x00000001U) /*!< Transfer error */
Kojto 122:f9eeca106725 184 #define HAL_DMA2D_ERROR_CE ((uint32_t)0x00000002U) /*!< Configuration error */
Kojto 122:f9eeca106725 185 #define HAL_DMA2D_ERROR_CAE ((uint32_t)0x00000004U) /*!< CLUT access error */
Kojto 122:f9eeca106725 186 #define HAL_DMA2D_ERROR_TIMEOUT ((uint32_t)0x00000020U) /*!< Timeout error */
emilmont 77:869cf507173a 187 /**
emilmont 77:869cf507173a 188 * @}
emilmont 77:869cf507173a 189 */
bogdanm 85:024bf7f99721 190
Kojto 99:dbbf35b96557 191 /** @defgroup DMA2D_Mode DMA2D Mode
emilmont 77:869cf507173a 192 * @{
emilmont 77:869cf507173a 193 */
Kojto 122:f9eeca106725 194 #define DMA2D_M2M ((uint32_t)0x00000000U) /*!< DMA2D memory to memory transfer mode */
Kojto 122:f9eeca106725 195 #define DMA2D_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
Kojto 122:f9eeca106725 196 #define DMA2D_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
Kojto 122:f9eeca106725 197 #define DMA2D_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
emilmont 77:869cf507173a 198 /**
emilmont 77:869cf507173a 199 * @}
emilmont 77:869cf507173a 200 */
emilmont 77:869cf507173a 201
Kojto 122:f9eeca106725 202 /** @defgroup DMA2D_Output_Color_Mode DMA2D Output Color Mode
emilmont 77:869cf507173a 203 * @{
emilmont 77:869cf507173a 204 */
Kojto 122:f9eeca106725 205 #define DMA2D_OUTPUT_ARGB8888 ((uint32_t)0x00000000U) /*!< ARGB8888 DMA2D color mode */
Kojto 122:f9eeca106725 206 #define DMA2D_OUTPUT_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 DMA2D color mode */
Kojto 122:f9eeca106725 207 #define DMA2D_OUTPUT_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 DMA2D color mode */
Kojto 122:f9eeca106725 208 #define DMA2D_OUTPUT_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 DMA2D color mode */
Kojto 122:f9eeca106725 209 #define DMA2D_OUTPUT_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 DMA2D color mode */
emilmont 77:869cf507173a 210 /**
emilmont 77:869cf507173a 211 * @}
emilmont 77:869cf507173a 212 */
emilmont 77:869cf507173a 213
Kojto 99:dbbf35b96557 214 /** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode
emilmont 77:869cf507173a 215 * @{
emilmont 77:869cf507173a 216 */
Kojto 122:f9eeca106725 217 #define DMA2D_INPUT_ARGB8888 ((uint32_t)0x00000000U) /*!< ARGB8888 color mode */
Kojto 122:f9eeca106725 218 #define DMA2D_INPUT_RGB888 ((uint32_t)0x00000001U) /*!< RGB888 color mode */
Kojto 122:f9eeca106725 219 #define DMA2D_INPUT_RGB565 ((uint32_t)0x00000002U) /*!< RGB565 color mode */
Kojto 122:f9eeca106725 220 #define DMA2D_INPUT_ARGB1555 ((uint32_t)0x00000003U) /*!< ARGB1555 color mode */
Kojto 122:f9eeca106725 221 #define DMA2D_INPUT_ARGB4444 ((uint32_t)0x00000004U) /*!< ARGB4444 color mode */
Kojto 122:f9eeca106725 222 #define DMA2D_INPUT_L8 ((uint32_t)0x00000005U) /*!< L8 color mode */
Kojto 122:f9eeca106725 223 #define DMA2D_INPUT_AL44 ((uint32_t)0x00000006U) /*!< AL44 color mode */
Kojto 122:f9eeca106725 224 #define DMA2D_INPUT_AL88 ((uint32_t)0x00000007U) /*!< AL88 color mode */
Kojto 122:f9eeca106725 225 #define DMA2D_INPUT_L4 ((uint32_t)0x00000008U) /*!< L4 color mode */
Kojto 122:f9eeca106725 226 #define DMA2D_INPUT_A8 ((uint32_t)0x00000009U) /*!< A8 color mode */
Kojto 122:f9eeca106725 227 #define DMA2D_INPUT_A4 ((uint32_t)0x0000000AU) /*!< A4 color mode */
emilmont 77:869cf507173a 228 /**
emilmont 77:869cf507173a 229 * @}
emilmont 77:869cf507173a 230 */
emilmont 77:869cf507173a 231
Kojto 122:f9eeca106725 232 /** @defgroup DMA2D_Alpha_Mode DMA2D Alpha Mode
emilmont 77:869cf507173a 233 * @{
emilmont 77:869cf507173a 234 */
Kojto 122:f9eeca106725 235 #define DMA2D_NO_MODIF_ALPHA ((uint32_t)0x00000000U) /*!< No modification of the alpha channel value */
Kojto 122:f9eeca106725 236 #define DMA2D_REPLACE_ALPHA ((uint32_t)0x00000001U) /*!< Replace original alpha channel value by programmed alpha value */
Kojto 122:f9eeca106725 237 #define DMA2D_COMBINE_ALPHA ((uint32_t)0x00000002U) /*!< Replace original alpha channel value by programmed alpha value
Kojto 122:f9eeca106725 238 with original alpha channel value */
emilmont 77:869cf507173a 239 /**
emilmont 77:869cf507173a 240 * @}
Kojto 122:f9eeca106725 241 */
emilmont 77:869cf507173a 242
Kojto 122:f9eeca106725 243 /** @defgroup DMA2D_CLUT_CM DMA2D CLUT Color Mode
emilmont 77:869cf507173a 244 * @{
emilmont 77:869cf507173a 245 */
Kojto 122:f9eeca106725 246 #define DMA2D_CCM_ARGB8888 ((uint32_t)0x00000000U) /*!< ARGB8888 DMA2D CLUT color mode */
Kojto 122:f9eeca106725 247 #define DMA2D_CCM_RGB888 ((uint32_t)0x00000001U) /*!< RGB888 DMA2D CLUT color mode */
emilmont 77:869cf507173a 248 /**
emilmont 77:869cf507173a 249 * @}
bogdanm 85:024bf7f99721 250 */
bogdanm 85:024bf7f99721 251
Kojto 122:f9eeca106725 252 /** @defgroup DMA2D_Interrupts DMA2D Interrupts
emilmont 77:869cf507173a 253 * @{
emilmont 77:869cf507173a 254 */
Kojto 122:f9eeca106725 255 #define DMA2D_IT_CE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
Kojto 122:f9eeca106725 256 #define DMA2D_IT_CTC DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
Kojto 122:f9eeca106725 257 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
Kojto 122:f9eeca106725 258 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
Kojto 122:f9eeca106725 259 #define DMA2D_IT_TC DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
Kojto 122:f9eeca106725 260 #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
emilmont 77:869cf507173a 261 /**
emilmont 77:869cf507173a 262 * @}
emilmont 77:869cf507173a 263 */
bogdanm 85:024bf7f99721 264
Kojto 122:f9eeca106725 265 /** @defgroup DMA2D_Flags DMA2D Flags
emilmont 77:869cf507173a 266 * @{
emilmont 77:869cf507173a 267 */
Kojto 122:f9eeca106725 268 #define DMA2D_FLAG_CE DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
Kojto 122:f9eeca106725 269 #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
Kojto 122:f9eeca106725 270 #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
Kojto 122:f9eeca106725 271 #define DMA2D_FLAG_TW DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
Kojto 122:f9eeca106725 272 #define DMA2D_FLAG_TC DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
Kojto 122:f9eeca106725 273 #define DMA2D_FLAG_TE DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
Kojto 122:f9eeca106725 274 /**
Kojto 122:f9eeca106725 275 * @}
Kojto 122:f9eeca106725 276 */
Kojto 122:f9eeca106725 277
Kojto 122:f9eeca106725 278 /** @defgroup DMA2D_Aliases DMA2D API Aliases
Kojto 122:f9eeca106725 279 * @{
Kojto 122:f9eeca106725 280 */
Kojto 122:f9eeca106725 281 #define HAL_DMA2D_DisableCLUT HAL_DMA2D_CLUTLoading_Abort /*!< Aliased to HAL_DMA2D_CLUTLoading_Abort for compatibility with legacy code */
emilmont 77:869cf507173a 282 /**
emilmont 77:869cf507173a 283 * @}
emilmont 77:869cf507173a 284 */
emilmont 77:869cf507173a 285
emilmont 77:869cf507173a 286 /**
emilmont 77:869cf507173a 287 * @}
emilmont 77:869cf507173a 288 */
Kojto 122:f9eeca106725 289 /* Exported macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 290 /** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros
Kojto 99:dbbf35b96557 291 * @{
Kojto 99:dbbf35b96557 292 */
bogdanm 85:024bf7f99721 293
bogdanm 85:024bf7f99721 294 /** @brief Reset DMA2D handle state
bogdanm 85:024bf7f99721 295 * @param __HANDLE__: specifies the DMA2D handle.
bogdanm 85:024bf7f99721 296 * @retval None
bogdanm 85:024bf7f99721 297 */
bogdanm 85:024bf7f99721 298 #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
bogdanm 85:024bf7f99721 299
emilmont 77:869cf507173a 300 /**
emilmont 77:869cf507173a 301 * @brief Enable the DMA2D.
emilmont 77:869cf507173a 302 * @param __HANDLE__: DMA2D handle
emilmont 77:869cf507173a 303 * @retval None.
emilmont 77:869cf507173a 304 */
emilmont 77:869cf507173a 305 #define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)
emilmont 77:869cf507173a 306
emilmont 77:869cf507173a 307 /* Interrupt & Flag management */
emilmont 77:869cf507173a 308 /**
emilmont 77:869cf507173a 309 * @brief Get the DMA2D pending flags.
emilmont 77:869cf507173a 310 * @param __HANDLE__: DMA2D handle
Kojto 122:f9eeca106725 311 * @param __FLAG__: flag to check.
emilmont 77:869cf507173a 312 * This parameter can be any combination of the following values:
emilmont 77:869cf507173a 313 * @arg DMA2D_FLAG_CE: Configuration error flag
Kojto 122:f9eeca106725 314 * @arg DMA2D_FLAG_CTC: CLUT transfer complete flag
Kojto 122:f9eeca106725 315 * @arg DMA2D_FLAG_CAE: CLUT access error flag
emilmont 77:869cf507173a 316 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
emilmont 77:869cf507173a 317 * @arg DMA2D_FLAG_TC: Transfer complete flag
emilmont 77:869cf507173a 318 * @arg DMA2D_FLAG_TE: Transfer error flag
emilmont 77:869cf507173a 319 * @retval The state of FLAG.
emilmont 77:869cf507173a 320 */
emilmont 77:869cf507173a 321 #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
emilmont 77:869cf507173a 322
emilmont 77:869cf507173a 323 /**
Kojto 122:f9eeca106725 324 * @brief Clear the DMA2D pending flags.
emilmont 77:869cf507173a 325 * @param __HANDLE__: DMA2D handle
emilmont 77:869cf507173a 326 * @param __FLAG__: specifies the flag to clear.
emilmont 77:869cf507173a 327 * This parameter can be any combination of the following values:
emilmont 77:869cf507173a 328 * @arg DMA2D_FLAG_CE: Configuration error flag
Kojto 122:f9eeca106725 329 * @arg DMA2D_FLAG_CTC: CLUT transfer complete flag
Kojto 122:f9eeca106725 330 * @arg DMA2D_FLAG_CAE: CLUT access error flag
emilmont 77:869cf507173a 331 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
emilmont 77:869cf507173a 332 * @arg DMA2D_FLAG_TC: Transfer complete flag
Kojto 122:f9eeca106725 333 * @arg DMA2D_FLAG_TE: Transfer error flag
emilmont 77:869cf507173a 334 * @retval None
emilmont 77:869cf507173a 335 */
Kojto 90:cb3d968589d8 336 #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
emilmont 77:869cf507173a 337
emilmont 77:869cf507173a 338 /**
Kojto 122:f9eeca106725 339 * @brief Enable the specified DMA2D interrupts.
emilmont 77:869cf507173a 340 * @param __HANDLE__: DMA2D handle
Kojto 122:f9eeca106725 341 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be enabled.
emilmont 77:869cf507173a 342 * This parameter can be any combination of the following values:
emilmont 77:869cf507173a 343 * @arg DMA2D_IT_CE: Configuration error interrupt mask
Kojto 122:f9eeca106725 344 * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
Kojto 122:f9eeca106725 345 * @arg DMA2D_IT_CAE: CLUT access error interrupt mask
emilmont 77:869cf507173a 346 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
emilmont 77:869cf507173a 347 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
emilmont 77:869cf507173a 348 * @arg DMA2D_IT_TE: Transfer error interrupt mask
emilmont 77:869cf507173a 349 * @retval None
emilmont 77:869cf507173a 350 */
emilmont 77:869cf507173a 351 #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
emilmont 77:869cf507173a 352
emilmont 77:869cf507173a 353 /**
Kojto 122:f9eeca106725 354 * @brief Disable the specified DMA2D interrupts.
emilmont 77:869cf507173a 355 * @param __HANDLE__: DMA2D handle
Kojto 122:f9eeca106725 356 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be disabled.
emilmont 77:869cf507173a 357 * This parameter can be any combination of the following values:
emilmont 77:869cf507173a 358 * @arg DMA2D_IT_CE: Configuration error interrupt mask
Kojto 122:f9eeca106725 359 * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
Kojto 122:f9eeca106725 360 * @arg DMA2D_IT_CAE: CLUT access error interrupt mask
emilmont 77:869cf507173a 361 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
emilmont 77:869cf507173a 362 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
emilmont 77:869cf507173a 363 * @arg DMA2D_IT_TE: Transfer error interrupt mask
emilmont 77:869cf507173a 364 * @retval None
emilmont 77:869cf507173a 365 */
emilmont 77:869cf507173a 366 #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
emilmont 77:869cf507173a 367
emilmont 77:869cf507173a 368 /**
Kojto 122:f9eeca106725 369 * @brief Check whether the specified DMA2D interrupt source is enabled or not.
emilmont 77:869cf507173a 370 * @param __HANDLE__: DMA2D handle
emilmont 77:869cf507173a 371 * @param __INTERRUPT__: specifies the DMA2D interrupt source to check.
emilmont 77:869cf507173a 372 * This parameter can be one of the following values:
emilmont 77:869cf507173a 373 * @arg DMA2D_IT_CE: Configuration error interrupt mask
Kojto 122:f9eeca106725 374 * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
Kojto 122:f9eeca106725 375 * @arg DMA2D_IT_CAE: CLUT access error interrupt mask
emilmont 77:869cf507173a 376 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
emilmont 77:869cf507173a 377 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
emilmont 77:869cf507173a 378 * @arg DMA2D_IT_TE: Transfer error interrupt mask
Kojto 122:f9eeca106725 379 * @retval The state of INTERRUPT source.
emilmont 77:869cf507173a 380 */
bogdanm 81:7d30d6019079 381 #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
Kojto 122:f9eeca106725 382
Kojto 99:dbbf35b96557 383 /**
Kojto 99:dbbf35b96557 384 * @}
Kojto 99:dbbf35b96557 385 */
emilmont 77:869cf507173a 386
Kojto 122:f9eeca106725 387 /* Exported functions --------------------------------------------------------*/
Kojto 122:f9eeca106725 388 /** @addtogroup DMA2D_Exported_Functions DMA2D Exported Functions
Kojto 122:f9eeca106725 389 * @{
Kojto 122:f9eeca106725 390 */
Kojto 122:f9eeca106725 391
Kojto 122:f9eeca106725 392 /** @addtogroup DMA2D_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 99:dbbf35b96557 393 * @{
Kojto 99:dbbf35b96557 394 */
Kojto 122:f9eeca106725 395
emilmont 77:869cf507173a 396 /* Initialization and de-initialization functions *******************************/
Kojto 122:f9eeca106725 397 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);
emilmont 77:869cf507173a 398 HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 399 void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
Kojto 122:f9eeca106725 400 void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);
Kojto 122:f9eeca106725 401
Kojto 122:f9eeca106725 402 /**
Kojto 122:f9eeca106725 403 * @}
Kojto 122:f9eeca106725 404 */
Kojto 122:f9eeca106725 405
Kojto 122:f9eeca106725 406 /** @addtogroup DMA2D_Exported_Functions_Group2 IO operation functions
Kojto 122:f9eeca106725 407 * @{
Kojto 122:f9eeca106725 408 */
emilmont 77:869cf507173a 409
emilmont 77:869cf507173a 410 /* IO operation functions *******************************************************/
Kojto 99:dbbf35b96557 411 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
Kojto 99:dbbf35b96557 412 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
Kojto 99:dbbf35b96557 413 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
Kojto 99:dbbf35b96557 414 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
emilmont 77:869cf507173a 415 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
emilmont 77:869cf507173a 416 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
emilmont 77:869cf507173a 417 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 418 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
Kojto 122:f9eeca106725 419 HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
Kojto 122:f9eeca106725 420 HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
Kojto 122:f9eeca106725 421 HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Abort(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
Kojto 122:f9eeca106725 422 HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Suspend(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
Kojto 122:f9eeca106725 423 HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Resume(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
emilmont 77:869cf507173a 424 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
emilmont 77:869cf507173a 425 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 426 void HAL_DMA2D_LineEventCallback(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 427 void HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 428
Kojto 122:f9eeca106725 429 /**
Kojto 122:f9eeca106725 430 * @}
Kojto 122:f9eeca106725 431 */
Kojto 122:f9eeca106725 432
Kojto 122:f9eeca106725 433 /** @addtogroup DMA2D_Exported_Functions_Group3 Peripheral Control functions
Kojto 122:f9eeca106725 434 * @{
Kojto 122:f9eeca106725 435 */
emilmont 77:869cf507173a 436
emilmont 77:869cf507173a 437 /* Peripheral Control functions *************************************************/
Kojto 122:f9eeca106725 438 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
Kojto 122:f9eeca106725 439 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
Kojto 122:f9eeca106725 440 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
Kojto 122:f9eeca106725 441 HAL_StatusTypeDef HAL_DMA2D_EnableDeadTime(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 442 HAL_StatusTypeDef HAL_DMA2D_DisableDeadTime(DMA2D_HandleTypeDef *hdma2d);
Kojto 122:f9eeca106725 443 HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t DeadTime);
Kojto 122:f9eeca106725 444
Kojto 122:f9eeca106725 445 /**
Kojto 122:f9eeca106725 446 * @}
Kojto 122:f9eeca106725 447 */
Kojto 122:f9eeca106725 448
Kojto 122:f9eeca106725 449 /** @addtogroup DMA2D_Exported_Functions_Group4 Peripheral State and Error functions
Kojto 122:f9eeca106725 450 * @{
Kojto 122:f9eeca106725 451 */
emilmont 77:869cf507173a 452
emilmont 77:869cf507173a 453 /* Peripheral State functions ***************************************************/
emilmont 77:869cf507173a 454 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
emilmont 77:869cf507173a 455 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
Kojto 99:dbbf35b96557 456
Kojto 99:dbbf35b96557 457 /**
Kojto 99:dbbf35b96557 458 * @}
Kojto 99:dbbf35b96557 459 */
Kojto 99:dbbf35b96557 460
Kojto 99:dbbf35b96557 461 /**
Kojto 99:dbbf35b96557 462 * @}
Kojto 99:dbbf35b96557 463 */
Kojto 99:dbbf35b96557 464
Kojto 122:f9eeca106725 465 /* Private constants ---------------------------------------------------------*/
Kojto 122:f9eeca106725 466
Kojto 122:f9eeca106725 467 /** @addtogroup DMA2D_Private_Constants DMA2D Private Constants
Kojto 99:dbbf35b96557 468 * @{
Kojto 99:dbbf35b96557 469 */
Kojto 99:dbbf35b96557 470
Kojto 122:f9eeca106725 471 /** @defgroup DMA2D_Maximum_Line_WaterMark DMA2D Maximum Line Watermark
Kojto 122:f9eeca106725 472 * @{
Kojto 122:f9eeca106725 473 */
Kojto 122:f9eeca106725 474 #define DMA2D_LINE_WATERMARK_MAX DMA2D_LWR_LW /*!< DMA2D maximum line watermark */
Kojto 122:f9eeca106725 475 /**
Kojto 122:f9eeca106725 476 * @}
Kojto 122:f9eeca106725 477 */
Kojto 122:f9eeca106725 478
Kojto 122:f9eeca106725 479 /** @defgroup DMA2D_Color_Value DMA2D Color Value
Kojto 122:f9eeca106725 480 * @{
Kojto 122:f9eeca106725 481 */
Kojto 122:f9eeca106725 482 #define DMA2D_COLOR_VALUE ((uint32_t)0x000000FFU) /*!< Color value mask */
Kojto 122:f9eeca106725 483 /**
Kojto 122:f9eeca106725 484 * @}
Kojto 122:f9eeca106725 485 */
Kojto 122:f9eeca106725 486
Kojto 122:f9eeca106725 487 /** @defgroup DMA2D_Max_Layer DMA2D Maximum Number of Layers
Kojto 122:f9eeca106725 488 * @{
Kojto 122:f9eeca106725 489 */
Kojto 122:f9eeca106725 490 #define DMA2D_MAX_LAYER 2U /*!< DMA2D maximum number of layers */
Kojto 122:f9eeca106725 491 /**
Kojto 122:f9eeca106725 492 * @}
Kojto 122:f9eeca106725 493 */
Kojto 122:f9eeca106725 494
Kojto 122:f9eeca106725 495 /** @defgroup DMA2D_Offset DMA2D Offset
Kojto 122:f9eeca106725 496 * @{
Kojto 122:f9eeca106725 497 */
Kojto 122:f9eeca106725 498 #define DMA2D_OFFSET DMA2D_FGOR_LO /*!< Line Offset */
Kojto 99:dbbf35b96557 499 /**
Kojto 99:dbbf35b96557 500 * @}
Kojto 99:dbbf35b96557 501 */
Kojto 99:dbbf35b96557 502
Kojto 122:f9eeca106725 503 /** @defgroup DMA2D_Size DMA2D Size
Kojto 99:dbbf35b96557 504 * @{
Kojto 99:dbbf35b96557 505 */
Kojto 122:f9eeca106725 506 #define DMA2D_PIXEL (DMA2D_NLR_PL >> 16U) /*!< DMA2D number of pixels per line */
Kojto 122:f9eeca106725 507 #define DMA2D_LINE DMA2D_NLR_NL /*!< DMA2D number of lines */
Kojto 122:f9eeca106725 508 /**
Kojto 122:f9eeca106725 509 * @}
Kojto 122:f9eeca106725 510 */
Kojto 122:f9eeca106725 511
Kojto 122:f9eeca106725 512 /** @defgroup DMA2D_CLUT_Size DMA2D CLUT Size
Kojto 122:f9eeca106725 513 * @{
Kojto 122:f9eeca106725 514 */
Kojto 122:f9eeca106725 515 #define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8U) /*!< DMA2D CLUT size */
Kojto 122:f9eeca106725 516 /**
Kojto 122:f9eeca106725 517 * @}
Kojto 122:f9eeca106725 518 */
Kojto 99:dbbf35b96557 519
Kojto 99:dbbf35b96557 520 /**
Kojto 99:dbbf35b96557 521 * @}
Kojto 99:dbbf35b96557 522 */
Kojto 99:dbbf35b96557 523
Kojto 99:dbbf35b96557 524 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 525 /** @defgroup DMA2D_Private_Macros DMA2D Private Macros
Kojto 99:dbbf35b96557 526 * @{
Kojto 99:dbbf35b96557 527 */
Kojto 122:f9eeca106725 528 #define IS_DMA2D_LAYER(LAYER) ((LAYER) <= DMA2D_MAX_LAYER)
Kojto 99:dbbf35b96557 529 #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
Kojto 99:dbbf35b96557 530 ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
Kojto 122:f9eeca106725 531 #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_OUTPUT_ARGB8888) || ((MODE_ARGB) == DMA2D_OUTPUT_RGB888) || \
Kojto 122:f9eeca106725 532 ((MODE_ARGB) == DMA2D_OUTPUT_RGB565) || ((MODE_ARGB) == DMA2D_OUTPUT_ARGB1555) || \
Kojto 122:f9eeca106725 533 ((MODE_ARGB) == DMA2D_OUTPUT_ARGB4444))
Kojto 122:f9eeca106725 534 #define IS_DMA2D_COLOR(COLOR) ((COLOR) <= DMA2D_COLOR_VALUE)
Kojto 99:dbbf35b96557 535 #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE)
Kojto 99:dbbf35b96557 536 #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL)
Kojto 99:dbbf35b96557 537 #define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET)
Kojto 122:f9eeca106725 538 #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == DMA2D_INPUT_ARGB8888) || ((INPUT_CM) == DMA2D_INPUT_RGB888) || \
Kojto 122:f9eeca106725 539 ((INPUT_CM) == DMA2D_INPUT_RGB565) || ((INPUT_CM) == DMA2D_INPUT_ARGB1555) || \
Kojto 122:f9eeca106725 540 ((INPUT_CM) == DMA2D_INPUT_ARGB4444) || ((INPUT_CM) == DMA2D_INPUT_L8) || \
Kojto 122:f9eeca106725 541 ((INPUT_CM) == DMA2D_INPUT_AL44) || ((INPUT_CM) == DMA2D_INPUT_AL88) || \
Kojto 122:f9eeca106725 542 ((INPUT_CM) == DMA2D_INPUT_L4) || ((INPUT_CM) == DMA2D_INPUT_A8) || \
Kojto 122:f9eeca106725 543 ((INPUT_CM) == DMA2D_INPUT_A4))
Kojto 99:dbbf35b96557 544 #define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \
Kojto 99:dbbf35b96557 545 ((AlphaMode) == DMA2D_REPLACE_ALPHA) || \
Kojto 99:dbbf35b96557 546 ((AlphaMode) == DMA2D_COMBINE_ALPHA))
Kojto 122:f9eeca106725 547
Kojto 99:dbbf35b96557 548 #define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))
Kojto 99:dbbf35b96557 549 #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
Kojto 122:f9eeca106725 550 #define IS_DMA2D_LINEWATERMARK(LineWatermark) ((LineWatermark) <= DMA2D_LINE_WATERMARK_MAX)
Kojto 122:f9eeca106725 551 #define IS_DMA2D_IT(IT) (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \
Kojto 122:f9eeca106725 552 ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \
Kojto 122:f9eeca106725 553 ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE))
Kojto 122:f9eeca106725 554 #define IS_DMA2D_GET_FLAG(FLAG) (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \
Kojto 122:f9eeca106725 555 ((FLAG) == DMA2D_FLAG_TW) || ((FLAG) == DMA2D_FLAG_TC) || \
Kojto 122:f9eeca106725 556 ((FLAG) == DMA2D_FLAG_TE) || ((FLAG) == DMA2D_FLAG_CE))
Kojto 99:dbbf35b96557 557 /**
Kojto 99:dbbf35b96557 558 * @}
Kojto 99:dbbf35b96557 559 */
emilmont 77:869cf507173a 560
emilmont 77:869cf507173a 561 /**
emilmont 77:869cf507173a 562 * @}
Kojto 122:f9eeca106725 563 */
emilmont 77:869cf507173a 564
emilmont 77:869cf507173a 565 /**
emilmont 77:869cf507173a 566 * @}
emilmont 77:869cf507173a 567 */
Kojto 99:dbbf35b96557 568
Kojto 110:165afa46840b 569 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
Kojto 99:dbbf35b96557 570
emilmont 77:869cf507173a 571 #ifdef __cplusplus
emilmont 77:869cf507173a 572 }
emilmont 77:869cf507173a 573 #endif
emilmont 77:869cf507173a 574
emilmont 77:869cf507173a 575 #endif /* __STM32F4xx_HAL_DMA2D_H */
emilmont 77:869cf507173a 576
emilmont 77:869cf507173a 577 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/