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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_NUCLEO_F303K8/stm32f3xx_hal_dma.h@122:f9eeca106725, 2016-07-07 (annotated)

Committer:
Kojto
Date:
Thu Jul 07 14:34:11 2016 +0100
Revision:
122:f9eeca106725
Parent:
109:9296ab0bfc11
Child:
123:b0220dba8be7
Release 122 of the mbed library



Changes:

- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4

- Thread safety addition - mbed API should contain a statement about thread safety

- critical section API addition

- CAS API (core_util_atomic_incr/decr)

- DEVICE_ are generated from targets.json file, device.h deprecated

- Callback replaces FunctionPointer to provide std like interface

- mbed HAL API docs improvements

- toolchain - prexif attributes with MBED_

            - add new attributes - packed, weak, forcedinline, align

- target.json - contains targets definitions

- ST - L1XX - Cube update to 1.5

     - SPI clock selection fix (clock from APB domain)

     - F7 - Cube update v1.4.0

     - L0 -  baudrate init fix

     - L1 - Cube update v1.5

     - F3 - baudrate init fix, 3 targets CAN support

     - F4 - Cube update v1.12.0, 3 targets CAN support

     - L4XX - Cube update v1.5.1

     - F0 - update Cube to v1.5.0

     - L4 - 2 targets (L476RG/VG) CAN support

- NXP - pwm clock fix for KSDK2 MCU

      - LPC2368 - remove ARM toolchain support - due to regression

      - KSDK2 - fix SPI , I2C address and repeat start

- Silabs - some fixes backported from mbed 3

- Renesas - RZ_A1H - SystemCoreClockUpdate addition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 109:9296ab0bfc11 1 /**
Kojto 109:9296ab0bfc11 2 ******************************************************************************
Kojto 109:9296ab0bfc11 3 * @file stm32f3xx_hal_dma.h
Kojto 109:9296ab0bfc11 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.2.1
Kojto 122:f9eeca106725 6 * @date 29-April-2015
Kojto 109:9296ab0bfc11 7 * @brief Header file of DMA HAL module.
Kojto 109:9296ab0bfc11 8 ******************************************************************************
Kojto 109:9296ab0bfc11 9 * @attention
Kojto 109:9296ab0bfc11 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 109:9296ab0bfc11 12 *
Kojto 109:9296ab0bfc11 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 109:9296ab0bfc11 14 * are permitted provided that the following conditions are met:
Kojto 109:9296ab0bfc11 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 109:9296ab0bfc11 16 * this list of conditions and the following disclaimer.
Kojto 109:9296ab0bfc11 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 109:9296ab0bfc11 18 * this list of conditions and the following disclaimer in the documentation
Kojto 109:9296ab0bfc11 19 * and/or other materials provided with the distribution.
Kojto 109:9296ab0bfc11 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 109:9296ab0bfc11 21 * may be used to endorse or promote products derived from this software
Kojto 109:9296ab0bfc11 22 * without specific prior written permission.
Kojto 109:9296ab0bfc11 23 *
Kojto 109:9296ab0bfc11 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 109:9296ab0bfc11 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 109:9296ab0bfc11 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 109:9296ab0bfc11 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 109:9296ab0bfc11 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 109:9296ab0bfc11 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 109:9296ab0bfc11 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 109:9296ab0bfc11 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 109:9296ab0bfc11 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 109:9296ab0bfc11 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 109:9296ab0bfc11 34 *
Kojto 109:9296ab0bfc11 35 ******************************************************************************
Kojto 109:9296ab0bfc11 36 */
Kojto 109:9296ab0bfc11 37
Kojto 109:9296ab0bfc11 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 109:9296ab0bfc11 39 #ifndef __STM32F3xx_HAL_DMA_H
Kojto 109:9296ab0bfc11 40 #define __STM32F3xx_HAL_DMA_H
Kojto 109:9296ab0bfc11 41
Kojto 109:9296ab0bfc11 42 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 43 extern "C" {
Kojto 109:9296ab0bfc11 44 #endif
Kojto 109:9296ab0bfc11 45
Kojto 109:9296ab0bfc11 46 /* Includes ------------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 47 #include "stm32f3xx_hal_def.h"
Kojto 109:9296ab0bfc11 48
Kojto 109:9296ab0bfc11 49 /** @addtogroup STM32F3xx_HAL_Driver
Kojto 109:9296ab0bfc11 50 * @{
Kojto 109:9296ab0bfc11 51 */
Kojto 109:9296ab0bfc11 52
Kojto 122:f9eeca106725 53 /** @addtogroup DMA
Kojto 109:9296ab0bfc11 54 * @{
Kojto 109:9296ab0bfc11 55 */
Kojto 109:9296ab0bfc11 56
Kojto 109:9296ab0bfc11 57 /* Exported types ------------------------------------------------------------*/
Kojto 122:f9eeca106725 58
Kojto 109:9296ab0bfc11 59 /** @defgroup DMA_Exported_Types DMA Exported Types
Kojto 109:9296ab0bfc11 60 * @{
Kojto 109:9296ab0bfc11 61 */
Kojto 109:9296ab0bfc11 62
Kojto 109:9296ab0bfc11 63 /**
Kojto 109:9296ab0bfc11 64 * @brief DMA Configuration Structure definition
Kojto 109:9296ab0bfc11 65 */
Kojto 109:9296ab0bfc11 66 typedef struct
Kojto 109:9296ab0bfc11 67 {
Kojto 109:9296ab0bfc11 68 uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
Kojto 109:9296ab0bfc11 69 from memory to memory or from peripheral to memory.
Kojto 109:9296ab0bfc11 70 This parameter can be a value of @ref DMA_Data_transfer_direction */
Kojto 109:9296ab0bfc11 71
Kojto 109:9296ab0bfc11 72 uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
Kojto 109:9296ab0bfc11 73 This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
Kojto 109:9296ab0bfc11 74
Kojto 109:9296ab0bfc11 75 uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
Kojto 109:9296ab0bfc11 76 This parameter can be a value of @ref DMA_Memory_incremented_mode */
Kojto 109:9296ab0bfc11 77
Kojto 109:9296ab0bfc11 78 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
Kojto 109:9296ab0bfc11 79 This parameter can be a value of @ref DMA_Peripheral_data_size */
Kojto 109:9296ab0bfc11 80
Kojto 109:9296ab0bfc11 81 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
Kojto 109:9296ab0bfc11 82 This parameter can be a value of @ref DMA_Memory_data_size */
Kojto 109:9296ab0bfc11 83
Kojto 109:9296ab0bfc11 84 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
Kojto 109:9296ab0bfc11 85 This parameter can be a value of @ref DMA_mode
Kojto 109:9296ab0bfc11 86 @note The circular buffer mode cannot be used if the memory-to-memory
Kojto 109:9296ab0bfc11 87 data transfer is configured on the selected Channel */
Kojto 109:9296ab0bfc11 88
Kojto 109:9296ab0bfc11 89 uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
Kojto 109:9296ab0bfc11 90 This parameter can be a value of @ref DMA_Priority_level */
Kojto 109:9296ab0bfc11 91 } DMA_InitTypeDef;
Kojto 109:9296ab0bfc11 92
Kojto 109:9296ab0bfc11 93 /**
Kojto 109:9296ab0bfc11 94 * @brief DMA Configuration enumeration values definition
Kojto 109:9296ab0bfc11 95 */
Kojto 109:9296ab0bfc11 96 typedef enum
Kojto 109:9296ab0bfc11 97 {
Kojto 109:9296ab0bfc11 98 DMA_MODE = 0, /*!< Control related DMA mode Parameter in DMA_InitTypeDef */
Kojto 109:9296ab0bfc11 99 DMA_PRIORITY = 1, /*!< Control related priority level Parameter in DMA_InitTypeDef */
Kojto 109:9296ab0bfc11 100
Kojto 109:9296ab0bfc11 101 } DMA_ControlTypeDef;
Kojto 109:9296ab0bfc11 102
Kojto 109:9296ab0bfc11 103 /**
Kojto 109:9296ab0bfc11 104 * @brief HAL DMA State structures definition
Kojto 109:9296ab0bfc11 105 */
Kojto 109:9296ab0bfc11 106 typedef enum
Kojto 109:9296ab0bfc11 107 {
Kojto 109:9296ab0bfc11 108 HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */
Kojto 122:f9eeca106725 109 HAL_DMA_STATE_READY = 0x01, /*!< DMA initialized and ready for use */
Kojto 109:9296ab0bfc11 110 HAL_DMA_STATE_READY_HALF = 0x11, /*!< DMA Half process success */
Kojto 109:9296ab0bfc11 111 HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */
Kojto 109:9296ab0bfc11 112 HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */
Kojto 109:9296ab0bfc11 113 HAL_DMA_STATE_ERROR = 0x04, /*!< DMA error state */
Kojto 109:9296ab0bfc11 114 }HAL_DMA_StateTypeDef;
Kojto 109:9296ab0bfc11 115
Kojto 109:9296ab0bfc11 116 /**
Kojto 109:9296ab0bfc11 117 * @brief HAL DMA Error Code structure definition
Kojto 109:9296ab0bfc11 118 */
Kojto 109:9296ab0bfc11 119 typedef enum
Kojto 109:9296ab0bfc11 120 {
Kojto 109:9296ab0bfc11 121 HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */
Kojto 109:9296ab0bfc11 122 HAL_DMA_HALF_TRANSFER = 0x01, /*!< Half Transfer */
Kojto 109:9296ab0bfc11 123 }HAL_DMA_LevelCompleteTypeDef;
Kojto 122:f9eeca106725 124
Kojto 109:9296ab0bfc11 125 /**
Kojto 109:9296ab0bfc11 126 * @brief DMA handle Structure definition
Kojto 109:9296ab0bfc11 127 */
Kojto 109:9296ab0bfc11 128 typedef struct __DMA_HandleTypeDef
Kojto 109:9296ab0bfc11 129 {
Kojto 122:f9eeca106725 130 DMA_Channel_TypeDef *Instance; /*!< Register base address */
Kojto 109:9296ab0bfc11 131
Kojto 109:9296ab0bfc11 132 DMA_InitTypeDef Init; /*!< DMA communication parameters */
Kojto 109:9296ab0bfc11 133
Kojto 109:9296ab0bfc11 134 HAL_LockTypeDef Lock; /*!< DMA locking object */
Kojto 109:9296ab0bfc11 135
Kojto 109:9296ab0bfc11 136 HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
Kojto 109:9296ab0bfc11 137
Kojto 109:9296ab0bfc11 138 void *Parent; /*!< Parent object state */
Kojto 109:9296ab0bfc11 139
Kojto 109:9296ab0bfc11 140 void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
Kojto 109:9296ab0bfc11 141
Kojto 109:9296ab0bfc11 142 void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
Kojto 122:f9eeca106725 143
Kojto 109:9296ab0bfc11 144 void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
Kojto 109:9296ab0bfc11 145
Kojto 122:f9eeca106725 146 void (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer abort callback */
Kojto 109:9296ab0bfc11 147
Kojto 122:f9eeca106725 148 __IO uint32_t ErrorCode; /*!< DMA Error code */
Kojto 109:9296ab0bfc11 149 } DMA_HandleTypeDef;
Kojto 109:9296ab0bfc11 150 /**
Kojto 109:9296ab0bfc11 151 * @}
Kojto 109:9296ab0bfc11 152 */
Kojto 109:9296ab0bfc11 153
Kojto 109:9296ab0bfc11 154 /* Exported constants --------------------------------------------------------*/
Kojto 122:f9eeca106725 155
Kojto 109:9296ab0bfc11 156 /** @defgroup DMA_Exported_Constants DMA Exported Constants
Kojto 109:9296ab0bfc11 157 * @{
Kojto 109:9296ab0bfc11 158 */
Kojto 109:9296ab0bfc11 159
Kojto 122:f9eeca106725 160 /** @defgroup DMA_Error_Code DMA Error Code
Kojto 109:9296ab0bfc11 161 * @{
Kojto 109:9296ab0bfc11 162 */
Kojto 122:f9eeca106725 163 #define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
Kojto 122:f9eeca106725 164 #define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
Kojto 122:f9eeca106725 165 #define HAL_DMA_ERROR_NO_XFER ((uint32_t)0x00000004) /*!< no ongoin transfer */
Kojto 122:f9eeca106725 166 #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
Kojto 109:9296ab0bfc11 167 /**
Kojto 109:9296ab0bfc11 168 * @}
Kojto 109:9296ab0bfc11 169 */
Kojto 109:9296ab0bfc11 170
Kojto 122:f9eeca106725 171 /** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
Kojto 109:9296ab0bfc11 172 * @{
Kojto 109:9296ab0bfc11 173 */
Kojto 109:9296ab0bfc11 174 #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */
Kojto 109:9296ab0bfc11 175 #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */
Kojto 122:f9eeca106725 176 #define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_CCR_MEM2MEM) /*!< Memory to memory direction */
Kojto 109:9296ab0bfc11 177
Kojto 109:9296ab0bfc11 178 /**
Kojto 109:9296ab0bfc11 179 * @}
Kojto 109:9296ab0bfc11 180 */
Kojto 109:9296ab0bfc11 181
Kojto 109:9296ab0bfc11 182 /** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
Kojto 109:9296ab0bfc11 183 * @{
Kojto 109:9296ab0bfc11 184 */
Kojto 109:9296ab0bfc11 185 #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */
Kojto 109:9296ab0bfc11 186 #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */
Kojto 109:9296ab0bfc11 187 /**
Kojto 109:9296ab0bfc11 188 * @}
Kojto 109:9296ab0bfc11 189 */
Kojto 109:9296ab0bfc11 190
Kojto 109:9296ab0bfc11 191 /** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
Kojto 109:9296ab0bfc11 192 * @{
Kojto 109:9296ab0bfc11 193 */
Kojto 109:9296ab0bfc11 194 #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */
Kojto 109:9296ab0bfc11 195 #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */
Kojto 109:9296ab0bfc11 196 /**
Kojto 109:9296ab0bfc11 197 * @}
Kojto 109:9296ab0bfc11 198 */
Kojto 109:9296ab0bfc11 199
Kojto 109:9296ab0bfc11 200 /** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
Kojto 109:9296ab0bfc11 201 * @{
Kojto 109:9296ab0bfc11 202 */
Kojto 109:9296ab0bfc11 203 #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */
Kojto 109:9296ab0bfc11 204 #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */
Kojto 109:9296ab0bfc11 205 #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */
Kojto 109:9296ab0bfc11 206 /**
Kojto 109:9296ab0bfc11 207 * @}
Kojto 109:9296ab0bfc11 208 */
Kojto 109:9296ab0bfc11 209
Kojto 109:9296ab0bfc11 210 /** @defgroup DMA_Memory_data_size DMA Memory data size
Kojto 109:9296ab0bfc11 211 * @{
Kojto 109:9296ab0bfc11 212 */
Kojto 109:9296ab0bfc11 213 #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */
Kojto 109:9296ab0bfc11 214 #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */
Kojto 109:9296ab0bfc11 215 #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */
Kojto 109:9296ab0bfc11 216 /**
Kojto 109:9296ab0bfc11 217 * @}
Kojto 109:9296ab0bfc11 218 */
Kojto 109:9296ab0bfc11 219
Kojto 109:9296ab0bfc11 220 /** @defgroup DMA_mode DMA mode
Kojto 109:9296ab0bfc11 221 * @{
Kojto 109:9296ab0bfc11 222 */
Kojto 122:f9eeca106725 223 #define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */
Kojto 122:f9eeca106725 224 #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular mode */
Kojto 109:9296ab0bfc11 225 /**
Kojto 109:9296ab0bfc11 226 * @}
Kojto 109:9296ab0bfc11 227 */
Kojto 109:9296ab0bfc11 228
Kojto 109:9296ab0bfc11 229 /** @defgroup DMA_Priority_level DMA Priority level
Kojto 109:9296ab0bfc11 230 * @{
Kojto 109:9296ab0bfc11 231 */
Kojto 109:9296ab0bfc11 232 #define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */
Kojto 109:9296ab0bfc11 233 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */
Kojto 109:9296ab0bfc11 234 #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */
Kojto 109:9296ab0bfc11 235 #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */
Kojto 109:9296ab0bfc11 236 /**
Kojto 109:9296ab0bfc11 237 * @}
Kojto 109:9296ab0bfc11 238 */
Kojto 109:9296ab0bfc11 239
Kojto 109:9296ab0bfc11 240
Kojto 109:9296ab0bfc11 241 /** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
Kojto 109:9296ab0bfc11 242 * @{
Kojto 109:9296ab0bfc11 243 */
Kojto 109:9296ab0bfc11 244 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
Kojto 109:9296ab0bfc11 245 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
Kojto 109:9296ab0bfc11 246 #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE)
Kojto 109:9296ab0bfc11 247 /**
Kojto 109:9296ab0bfc11 248 * @}
Kojto 109:9296ab0bfc11 249 */
Kojto 109:9296ab0bfc11 250
Kojto 109:9296ab0bfc11 251 /** @defgroup DMA_flag_definitions DMA flag definitions
Kojto 109:9296ab0bfc11 252 * @{
Kojto 109:9296ab0bfc11 253 */
Kojto 109:9296ab0bfc11 254 #define DMA_FLAG_GL1 ((uint32_t)0x00000001)
Kojto 109:9296ab0bfc11 255 #define DMA_FLAG_TC1 ((uint32_t)0x00000002)
Kojto 109:9296ab0bfc11 256 #define DMA_FLAG_HT1 ((uint32_t)0x00000004)
Kojto 109:9296ab0bfc11 257 #define DMA_FLAG_TE1 ((uint32_t)0x00000008)
Kojto 109:9296ab0bfc11 258 #define DMA_FLAG_GL2 ((uint32_t)0x00000010)
Kojto 109:9296ab0bfc11 259 #define DMA_FLAG_TC2 ((uint32_t)0x00000020)
Kojto 109:9296ab0bfc11 260 #define DMA_FLAG_HT2 ((uint32_t)0x00000040)
Kojto 109:9296ab0bfc11 261 #define DMA_FLAG_TE2 ((uint32_t)0x00000080)
Kojto 109:9296ab0bfc11 262 #define DMA_FLAG_GL3 ((uint32_t)0x00000100)
Kojto 109:9296ab0bfc11 263 #define DMA_FLAG_TC3 ((uint32_t)0x00000200)
Kojto 109:9296ab0bfc11 264 #define DMA_FLAG_HT3 ((uint32_t)0x00000400)
Kojto 109:9296ab0bfc11 265 #define DMA_FLAG_TE3 ((uint32_t)0x00000800)
Kojto 109:9296ab0bfc11 266 #define DMA_FLAG_GL4 ((uint32_t)0x00001000)
Kojto 109:9296ab0bfc11 267 #define DMA_FLAG_TC4 ((uint32_t)0x00002000)
Kojto 109:9296ab0bfc11 268 #define DMA_FLAG_HT4 ((uint32_t)0x00004000)
Kojto 109:9296ab0bfc11 269 #define DMA_FLAG_TE4 ((uint32_t)0x00008000)
Kojto 109:9296ab0bfc11 270 #define DMA_FLAG_GL5 ((uint32_t)0x00010000)
Kojto 109:9296ab0bfc11 271 #define DMA_FLAG_TC5 ((uint32_t)0x00020000)
Kojto 109:9296ab0bfc11 272 #define DMA_FLAG_HT5 ((uint32_t)0x00040000)
Kojto 109:9296ab0bfc11 273 #define DMA_FLAG_TE5 ((uint32_t)0x00080000)
Kojto 109:9296ab0bfc11 274 #define DMA_FLAG_GL6 ((uint32_t)0x00100000)
Kojto 109:9296ab0bfc11 275 #define DMA_FLAG_TC6 ((uint32_t)0x00200000)
Kojto 109:9296ab0bfc11 276 #define DMA_FLAG_HT6 ((uint32_t)0x00400000)
Kojto 109:9296ab0bfc11 277 #define DMA_FLAG_TE6 ((uint32_t)0x00800000)
Kojto 109:9296ab0bfc11 278 #define DMA_FLAG_GL7 ((uint32_t)0x01000000)
Kojto 109:9296ab0bfc11 279 #define DMA_FLAG_TC7 ((uint32_t)0x02000000)
Kojto 109:9296ab0bfc11 280 #define DMA_FLAG_HT7 ((uint32_t)0x04000000)
Kojto 109:9296ab0bfc11 281 #define DMA_FLAG_TE7 ((uint32_t)0x08000000)
Kojto 109:9296ab0bfc11 282 /**
Kojto 109:9296ab0bfc11 283 * @}
Kojto 109:9296ab0bfc11 284 */
Kojto 109:9296ab0bfc11 285
Kojto 109:9296ab0bfc11 286 /**
Kojto 109:9296ab0bfc11 287 * @}
Kojto 109:9296ab0bfc11 288 */
Kojto 109:9296ab0bfc11 289
Kojto 122:f9eeca106725 290
Kojto 122:f9eeca106725 291 /* Exported macro ------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 292 /** @defgroup DMA_Exported_Macros DMA Exported Macros
Kojto 109:9296ab0bfc11 293 * @{
Kojto 109:9296ab0bfc11 294 */
Kojto 109:9296ab0bfc11 295
Kojto 109:9296ab0bfc11 296 /** @brief Reset DMA handle state
Kojto 109:9296ab0bfc11 297 * @param __HANDLE__: DMA handle.
Kojto 109:9296ab0bfc11 298 * @retval None
Kojto 109:9296ab0bfc11 299 */
Kojto 109:9296ab0bfc11 300 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
Kojto 109:9296ab0bfc11 301
Kojto 109:9296ab0bfc11 302 /**
Kojto 109:9296ab0bfc11 303 * @brief Enable the specified DMA Channel.
Kojto 109:9296ab0bfc11 304 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 305 * @retval None.
Kojto 109:9296ab0bfc11 306 */
Kojto 122:f9eeca106725 307 #define __HAL_DMA_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN))
Kojto 109:9296ab0bfc11 308
Kojto 109:9296ab0bfc11 309 /**
Kojto 109:9296ab0bfc11 310 * @brief Disable the specified DMA Channel.
Kojto 109:9296ab0bfc11 311 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 312 * @retval None.
Kojto 109:9296ab0bfc11 313 */
Kojto 122:f9eeca106725 314 #define __HAL_DMA_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN))
Kojto 109:9296ab0bfc11 315
Kojto 109:9296ab0bfc11 316
Kojto 109:9296ab0bfc11 317 /* Interrupt & Flag management */
Kojto 109:9296ab0bfc11 318
Kojto 109:9296ab0bfc11 319 /**
Kojto 109:9296ab0bfc11 320 * @brief Enables the specified DMA Channel interrupts.
Kojto 109:9296ab0bfc11 321 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 322 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
Kojto 109:9296ab0bfc11 323 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 324 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 109:9296ab0bfc11 325 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 109:9296ab0bfc11 326 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 109:9296ab0bfc11 327 * @retval None
Kojto 109:9296ab0bfc11 328 */
Kojto 122:f9eeca106725 329 #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CCR, (__INTERRUPT__)))
Kojto 109:9296ab0bfc11 330
Kojto 109:9296ab0bfc11 331 /**
Kojto 109:9296ab0bfc11 332 * @brief Disables the specified DMA Channel interrupts.
Kojto 109:9296ab0bfc11 333 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 334 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
Kojto 109:9296ab0bfc11 335 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 336 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 109:9296ab0bfc11 337 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 109:9296ab0bfc11 338 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 109:9296ab0bfc11 339 * @retval None
Kojto 109:9296ab0bfc11 340 */
Kojto 122:f9eeca106725 341 #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CCR , (__INTERRUPT__)))
Kojto 109:9296ab0bfc11 342
Kojto 109:9296ab0bfc11 343 /**
Kojto 122:f9eeca106725 344 * @brief Checks whether the specified DMA Channel interrupt is enabled or disabled.
Kojto 109:9296ab0bfc11 345 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 346 * @param __INTERRUPT__: specifies the DMA interrupt source to check.
Kojto 109:9296ab0bfc11 347 * This parameter can be one of the following values:
Kojto 109:9296ab0bfc11 348 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 109:9296ab0bfc11 349 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 109:9296ab0bfc11 350 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 109:9296ab0bfc11 351 * @retval The state of DMA_IT (SET or RESET).
Kojto 109:9296ab0bfc11 352 */
Kojto 109:9296ab0bfc11 353 #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CCR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
Kojto 109:9296ab0bfc11 354
Kojto 109:9296ab0bfc11 355 /**
Kojto 122:f9eeca106725 356 * @brief Returns the number of remaining data units in the current DMAy Channelx transfer.
Kojto 122:f9eeca106725 357 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 358 *
Kojto 122:f9eeca106725 359 * @retval The number of remaining data units in the current DMA Channel transfer.
Kojto 122:f9eeca106725 360 */
Kojto 122:f9eeca106725 361 #define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR)
Kojto 122:f9eeca106725 362
Kojto 122:f9eeca106725 363 /**
Kojto 109:9296ab0bfc11 364 * @}
Kojto 109:9296ab0bfc11 365 */
Kojto 109:9296ab0bfc11 366
Kojto 109:9296ab0bfc11 367 /* Include DMA HAL Extended module */
Kojto 109:9296ab0bfc11 368 #include "stm32f3xx_hal_dma_ex.h"
Kojto 109:9296ab0bfc11 369
Kojto 109:9296ab0bfc11 370 /* Exported functions --------------------------------------------------------*/
Kojto 109:9296ab0bfc11 371 /** @addtogroup DMA_Exported_Functions DMA Exported Functions
Kojto 109:9296ab0bfc11 372 * @{
Kojto 109:9296ab0bfc11 373 */
Kojto 109:9296ab0bfc11 374
Kojto 109:9296ab0bfc11 375 /** @addtogroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 109:9296ab0bfc11 376 * @{
Kojto 109:9296ab0bfc11 377 */
Kojto 109:9296ab0bfc11 378 /* Initialization and de-initialization functions *****************************/
Kojto 122:f9eeca106725 379 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
Kojto 109:9296ab0bfc11 380 HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
Kojto 109:9296ab0bfc11 381 /**
Kojto 109:9296ab0bfc11 382 * @}
Kojto 109:9296ab0bfc11 383 */
Kojto 109:9296ab0bfc11 384
Kojto 109:9296ab0bfc11 385 /** @addtogroup DMA_Exported_Functions_Group2 Input and Output operation functions
Kojto 109:9296ab0bfc11 386 * @{
Kojto 109:9296ab0bfc11 387 */
Kojto 109:9296ab0bfc11 388 /* IO operation functions *****************************************************/
Kojto 109:9296ab0bfc11 389 HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
Kojto 109:9296ab0bfc11 390 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
Kojto 109:9296ab0bfc11 391 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
Kojto 122:f9eeca106725 392 HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
Kojto 109:9296ab0bfc11 393 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
Kojto 109:9296ab0bfc11 394 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
Kojto 109:9296ab0bfc11 395 /**
Kojto 109:9296ab0bfc11 396 * @}
Kojto 109:9296ab0bfc11 397 */
Kojto 109:9296ab0bfc11 398
Kojto 109:9296ab0bfc11 399 /** @addtogroup DMA_Exported_Functions_Group3 Peripheral State functions
Kojto 109:9296ab0bfc11 400 * @{
Kojto 109:9296ab0bfc11 401 */
Kojto 109:9296ab0bfc11 402 /* Peripheral State and Error functions ***************************************/
Kojto 109:9296ab0bfc11 403 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
Kojto 109:9296ab0bfc11 404 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
Kojto 109:9296ab0bfc11 405 /**
Kojto 109:9296ab0bfc11 406 * @}
Kojto 109:9296ab0bfc11 407 */
Kojto 109:9296ab0bfc11 408
Kojto 109:9296ab0bfc11 409 /**
Kojto 109:9296ab0bfc11 410 * @}
Kojto 109:9296ab0bfc11 411 */
Kojto 122:f9eeca106725 412 /* Private macros ------------------------------------------------------------*/
Kojto 122:f9eeca106725 413 /** @defgroup DMA_Private_Macros DMA Private Macros
Kojto 122:f9eeca106725 414 * @brief DMA private macros
Kojto 122:f9eeca106725 415 * @{
Kojto 122:f9eeca106725 416 */
Kojto 122:f9eeca106725 417
Kojto 122:f9eeca106725 418 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
Kojto 122:f9eeca106725 419
Kojto 122:f9eeca106725 420 #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
Kojto 122:f9eeca106725 421 ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
Kojto 122:f9eeca106725 422 ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
Kojto 122:f9eeca106725 423
Kojto 122:f9eeca106725 424 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
Kojto 122:f9eeca106725 425 ((STATE) == DMA_PINC_DISABLE))
Kojto 122:f9eeca106725 426
Kojto 122:f9eeca106725 427 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
Kojto 122:f9eeca106725 428 ((STATE) == DMA_MINC_DISABLE))
Kojto 122:f9eeca106725 429
Kojto 122:f9eeca106725 430 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
Kojto 122:f9eeca106725 431 ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
Kojto 122:f9eeca106725 432 ((SIZE) == DMA_PDATAALIGN_WORD))
Kojto 122:f9eeca106725 433
Kojto 122:f9eeca106725 434 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
Kojto 122:f9eeca106725 435 ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
Kojto 122:f9eeca106725 436 ((SIZE) == DMA_MDATAALIGN_WORD ))
Kojto 122:f9eeca106725 437
Kojto 122:f9eeca106725 438 #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
Kojto 122:f9eeca106725 439 ((MODE) == DMA_CIRCULAR))
Kojto 122:f9eeca106725 440
Kojto 122:f9eeca106725 441 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
Kojto 122:f9eeca106725 442 ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
Kojto 122:f9eeca106725 443 ((PRIORITY) == DMA_PRIORITY_HIGH) || \
Kojto 122:f9eeca106725 444 ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
Kojto 122:f9eeca106725 445
Kojto 122:f9eeca106725 446 /**
Kojto 122:f9eeca106725 447 * @}
Kojto 122:f9eeca106725 448 */
Kojto 122:f9eeca106725 449
Kojto 109:9296ab0bfc11 450
Kojto 109:9296ab0bfc11 451 /**
Kojto 109:9296ab0bfc11 452 * @}
Kojto 109:9296ab0bfc11 453 */
Kojto 109:9296ab0bfc11 454
Kojto 109:9296ab0bfc11 455 /**
Kojto 109:9296ab0bfc11 456 * @}
Kojto 109:9296ab0bfc11 457 */
Kojto 109:9296ab0bfc11 458
Kojto 109:9296ab0bfc11 459 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 460 }
Kojto 109:9296ab0bfc11 461 #endif
Kojto 109:9296ab0bfc11 462
Kojto 109:9296ab0bfc11 463 #endif /* __STM32F3xx_HAL_DMA_H */
Kojto 109:9296ab0bfc11 464
Kojto 109:9296ab0bfc11 465 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/