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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_MTS_MDOT_F411RE/stm32f4xx_hal_pwr.h@122:f9eeca106725, 2016-07-07 (annotated)

Committer:
Kojto
Date:
Thu Jul 07 14:34:11 2016 +0100
Revision:
122:f9eeca106725
Parent:
110:165afa46840b 
Release 122 of the mbed library



Changes:

- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4

- Thread safety addition - mbed API should contain a statement about thread safety

- critical section API addition

- CAS API (core_util_atomic_incr/decr)

- DEVICE_ are generated from targets.json file, device.h deprecated

- Callback replaces FunctionPointer to provide std like interface

- mbed HAL API docs improvements

- toolchain - prexif attributes with MBED_

            - add new attributes - packed, weak, forcedinline, align

- target.json - contains targets definitions

- ST - L1XX - Cube update to 1.5

     - SPI clock selection fix (clock from APB domain)

     - F7 - Cube update v1.4.0

     - L0 -  baudrate init fix

     - L1 - Cube update v1.5

     - F3 - baudrate init fix, 3 targets CAN support

     - F4 - Cube update v1.12.0, 3 targets CAN support

     - L4XX - Cube update v1.5.1

     - F0 - update Cube to v1.5.0

     - L4 - 2 targets (L476RG/VG) CAN support

- NXP - pwm clock fix for KSDK2 MCU

      - LPC2368 - remove ARM toolchain support - due to regression

      - KSDK2 - fix SPI , I2C address and repeat start

- Silabs - some fixes backported from mbed 3

- Renesas - RZ_A1H - SystemCoreClockUpdate addition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 93:e188a91d3eaa 1 /**
Kojto 93:e188a91d3eaa 2 ******************************************************************************
Kojto 93:e188a91d3eaa 3 * @file stm32f4xx_hal_pwr.h
Kojto 93:e188a91d3eaa 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.5.0
Kojto 122:f9eeca106725 6 * @date 06-May-2016
Kojto 93:e188a91d3eaa 7 * @brief Header file of PWR HAL module.
Kojto 93:e188a91d3eaa 8 ******************************************************************************
Kojto 93:e188a91d3eaa 9 * @attention
Kojto 93:e188a91d3eaa 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 93:e188a91d3eaa 12 *
Kojto 93:e188a91d3eaa 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 93:e188a91d3eaa 14 * are permitted provided that the following conditions are met:
Kojto 93:e188a91d3eaa 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 93:e188a91d3eaa 16 * this list of conditions and the following disclaimer.
Kojto 93:e188a91d3eaa 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 93:e188a91d3eaa 18 * this list of conditions and the following disclaimer in the documentation
Kojto 93:e188a91d3eaa 19 * and/or other materials provided with the distribution.
Kojto 93:e188a91d3eaa 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 93:e188a91d3eaa 21 * may be used to endorse or promote products derived from this software
Kojto 93:e188a91d3eaa 22 * without specific prior written permission.
Kojto 93:e188a91d3eaa 23 *
Kojto 93:e188a91d3eaa 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 93:e188a91d3eaa 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 93:e188a91d3eaa 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 93:e188a91d3eaa 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 93:e188a91d3eaa 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 93:e188a91d3eaa 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 93:e188a91d3eaa 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 93:e188a91d3eaa 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 93:e188a91d3eaa 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 93:e188a91d3eaa 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 93:e188a91d3eaa 34 *
Kojto 93:e188a91d3eaa 35 ******************************************************************************
Kojto 93:e188a91d3eaa 36 */
Kojto 93:e188a91d3eaa 37
Kojto 93:e188a91d3eaa 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 93:e188a91d3eaa 39 #ifndef __STM32F4xx_HAL_PWR_H
Kojto 93:e188a91d3eaa 40 #define __STM32F4xx_HAL_PWR_H
Kojto 93:e188a91d3eaa 41
Kojto 93:e188a91d3eaa 42 #ifdef __cplusplus
Kojto 93:e188a91d3eaa 43 extern "C" {
Kojto 93:e188a91d3eaa 44 #endif
Kojto 93:e188a91d3eaa 45
Kojto 93:e188a91d3eaa 46 /* Includes ------------------------------------------------------------------*/
Kojto 93:e188a91d3eaa 47 #include "stm32f4xx_hal_def.h"
Kojto 93:e188a91d3eaa 48
Kojto 93:e188a91d3eaa 49 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 93:e188a91d3eaa 50 * @{
Kojto 93:e188a91d3eaa 51 */
Kojto 93:e188a91d3eaa 52
Kojto 93:e188a91d3eaa 53 /** @addtogroup PWR
Kojto 93:e188a91d3eaa 54 * @{
Kojto 93:e188a91d3eaa 55 */
Kojto 93:e188a91d3eaa 56
Kojto 93:e188a91d3eaa 57 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 58
Kojto 99:dbbf35b96557 59 /** @defgroup PWR_Exported_Types PWR Exported Types
Kojto 99:dbbf35b96557 60 * @{
Kojto 99:dbbf35b96557 61 */
Kojto 99:dbbf35b96557 62
Kojto 93:e188a91d3eaa 63 /**
Kojto 93:e188a91d3eaa 64 * @brief PWR PVD configuration structure definition
Kojto 93:e188a91d3eaa 65 */
Kojto 93:e188a91d3eaa 66 typedef struct
Kojto 93:e188a91d3eaa 67 {
Kojto 93:e188a91d3eaa 68 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
Kojto 93:e188a91d3eaa 69 This parameter can be a value of @ref PWR_PVD_detection_level */
Kojto 93:e188a91d3eaa 70
Kojto 93:e188a91d3eaa 71 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
Kojto 93:e188a91d3eaa 72 This parameter can be a value of @ref PWR_PVD_Mode */
Kojto 93:e188a91d3eaa 73 }PWR_PVDTypeDef;
Kojto 93:e188a91d3eaa 74
Kojto 93:e188a91d3eaa 75 /**
Kojto 93:e188a91d3eaa 76 * @}
Kojto 93:e188a91d3eaa 77 */
Kojto 93:e188a91d3eaa 78
Kojto 99:dbbf35b96557 79 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 80 /** @defgroup PWR_Exported_Constants PWR Exported Constants
Kojto 99:dbbf35b96557 81 * @{
Kojto 99:dbbf35b96557 82 */
Kojto 99:dbbf35b96557 83
Kojto 99:dbbf35b96557 84 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
Kojto 99:dbbf35b96557 85 * @{
Kojto 99:dbbf35b96557 86 */
Kojto 122:f9eeca106725 87 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00000100U)
Kojto 99:dbbf35b96557 88 /**
Kojto 99:dbbf35b96557 89 * @}
Kojto 99:dbbf35b96557 90 */
Kojto 99:dbbf35b96557 91
Kojto 99:dbbf35b96557 92 /** @defgroup PWR_PVD_detection_level PWR PVD detection level
Kojto 93:e188a91d3eaa 93 * @{
Kojto 93:e188a91d3eaa 94 */
Kojto 93:e188a91d3eaa 95 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
Kojto 93:e188a91d3eaa 96 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
Kojto 93:e188a91d3eaa 97 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
Kojto 93:e188a91d3eaa 98 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
Kojto 93:e188a91d3eaa 99 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
Kojto 93:e188a91d3eaa 100 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
Kojto 93:e188a91d3eaa 101 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
Kojto 99:dbbf35b96557 102 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage
Kojto 99:dbbf35b96557 103 (Compare internally to VREFINT) */
Kojto 93:e188a91d3eaa 104 /**
Kojto 93:e188a91d3eaa 105 * @}
Kojto 93:e188a91d3eaa 106 */
Kojto 93:e188a91d3eaa 107
Kojto 99:dbbf35b96557 108 /** @defgroup PWR_PVD_Mode PWR PVD Mode
Kojto 93:e188a91d3eaa 109 * @{
Kojto 93:e188a91d3eaa 110 */
Kojto 122:f9eeca106725 111 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000U) /*!< basic mode is used */
Kojto 122:f9eeca106725 112 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */
Kojto 122:f9eeca106725 113 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */
Kojto 122:f9eeca106725 114 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
Kojto 122:f9eeca106725 115 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001U) /*!< Event Mode with Rising edge trigger detection */
Kojto 122:f9eeca106725 116 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002U) /*!< Event Mode with Falling edge trigger detection */
Kojto 122:f9eeca106725 117 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */
Kojto 93:e188a91d3eaa 118 /**
Kojto 93:e188a91d3eaa 119 * @}
Kojto 99:dbbf35b96557 120 */
Kojto 93:e188a91d3eaa 121
Kojto 99:dbbf35b96557 122
Kojto 99:dbbf35b96557 123 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
Kojto 93:e188a91d3eaa 124 * @{
Kojto 93:e188a91d3eaa 125 */
Kojto 122:f9eeca106725 126 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000U)
Kojto 93:e188a91d3eaa 127 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
Kojto 93:e188a91d3eaa 128 /**
Kojto 93:e188a91d3eaa 129 * @}
Kojto 93:e188a91d3eaa 130 */
Kojto 93:e188a91d3eaa 131
Kojto 99:dbbf35b96557 132 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
Kojto 93:e188a91d3eaa 133 * @{
Kojto 93:e188a91d3eaa 134 */
Kojto 122:f9eeca106725 135 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01U)
Kojto 122:f9eeca106725 136 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02U)
Kojto 93:e188a91d3eaa 137 /**
Kojto 93:e188a91d3eaa 138 * @}
Kojto 93:e188a91d3eaa 139 */
Kojto 93:e188a91d3eaa 140
Kojto 99:dbbf35b96557 141 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
Kojto 93:e188a91d3eaa 142 * @{
Kojto 93:e188a91d3eaa 143 */
Kojto 122:f9eeca106725 144 #define PWR_STOPENTRY_WFI ((uint8_t)0x01U)
Kojto 122:f9eeca106725 145 #define PWR_STOPENTRY_WFE ((uint8_t)0x02U)
Kojto 93:e188a91d3eaa 146 /**
Kojto 93:e188a91d3eaa 147 * @}
Kojto 93:e188a91d3eaa 148 */
Kojto 93:e188a91d3eaa 149
Kojto 99:dbbf35b96557 150 /** @defgroup PWR_Flag PWR Flag
Kojto 93:e188a91d3eaa 151 * @{
Kojto 93:e188a91d3eaa 152 */
Kojto 93:e188a91d3eaa 153 #define PWR_FLAG_WU PWR_CSR_WUF
Kojto 93:e188a91d3eaa 154 #define PWR_FLAG_SB PWR_CSR_SBF
Kojto 93:e188a91d3eaa 155 #define PWR_FLAG_PVDO PWR_CSR_PVDO
Kojto 93:e188a91d3eaa 156 #define PWR_FLAG_BRR PWR_CSR_BRR
Kojto 93:e188a91d3eaa 157 #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
Kojto 93:e188a91d3eaa 158 /**
Kojto 93:e188a91d3eaa 159 * @}
Kojto 93:e188a91d3eaa 160 */
Kojto 93:e188a91d3eaa 161
Kojto 93:e188a91d3eaa 162 /**
Kojto 93:e188a91d3eaa 163 * @}
Kojto 93:e188a91d3eaa 164 */
Kojto 93:e188a91d3eaa 165
Kojto 93:e188a91d3eaa 166 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 167 /** @defgroup PWR_Exported_Macro PWR Exported Macro
Kojto 99:dbbf35b96557 168 * @{
Kojto 99:dbbf35b96557 169 */
Kojto 93:e188a91d3eaa 170
Kojto 93:e188a91d3eaa 171 /** @brief Check PWR flag is set or not.
Kojto 93:e188a91d3eaa 172 * @param __FLAG__: specifies the flag to check.
Kojto 93:e188a91d3eaa 173 * This parameter can be one of the following values:
Kojto 93:e188a91d3eaa 174 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
Kojto 93:e188a91d3eaa 175 * was received from the WKUP pin or from the RTC alarm (Alarm A
Kojto 93:e188a91d3eaa 176 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
Kojto 93:e188a91d3eaa 177 * An additional wakeup event is detected if the WKUP pin is enabled
Kojto 93:e188a91d3eaa 178 * (by setting the EWUP bit) when the WKUP pin level is already high.
Kojto 93:e188a91d3eaa 179 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
Kojto 93:e188a91d3eaa 180 * resumed from StandBy mode.
Kojto 93:e188a91d3eaa 181 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
Kojto 93:e188a91d3eaa 182 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
Kojto 93:e188a91d3eaa 183 * For this reason, this bit is equal to 0 after Standby or reset
Kojto 93:e188a91d3eaa 184 * until the PVDE bit is set.
Kojto 93:e188a91d3eaa 185 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
Kojto 93:e188a91d3eaa 186 * when the device wakes up from Standby mode or by a system reset
Kojto 93:e188a91d3eaa 187 * or power reset.
Kojto 93:e188a91d3eaa 188 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
Kojto 93:e188a91d3eaa 189 * scaling output selection is ready.
Kojto 93:e188a91d3eaa 190 * @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto 93:e188a91d3eaa 191 */
Kojto 93:e188a91d3eaa 192 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
Kojto 93:e188a91d3eaa 193
Kojto 93:e188a91d3eaa 194 /** @brief Clear the PWR's pending flags.
Kojto 93:e188a91d3eaa 195 * @param __FLAG__: specifies the flag to clear.
Kojto 93:e188a91d3eaa 196 * This parameter can be one of the following values:
Kojto 93:e188a91d3eaa 197 * @arg PWR_FLAG_WU: Wake Up flag
Kojto 93:e188a91d3eaa 198 * @arg PWR_FLAG_SB: StandBy flag
Kojto 93:e188a91d3eaa 199 */
Kojto 122:f9eeca106725 200 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U)
Kojto 93:e188a91d3eaa 201
Kojto 99:dbbf35b96557 202 /**
Kojto 99:dbbf35b96557 203 * @brief Enable the PVD Exti Line 16.
Kojto 99:dbbf35b96557 204 * @retval None.
Kojto 99:dbbf35b96557 205 */
Kojto 99:dbbf35b96557 206 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
Kojto 99:dbbf35b96557 207
Kojto 99:dbbf35b96557 208 /**
Kojto 99:dbbf35b96557 209 * @brief Disable the PVD EXTI Line 16.
Kojto 99:dbbf35b96557 210 * @retval None.
Kojto 99:dbbf35b96557 211 */
Kojto 99:dbbf35b96557 212 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
Kojto 99:dbbf35b96557 213
Kojto 93:e188a91d3eaa 214 /**
Kojto 99:dbbf35b96557 215 * @brief Enable event on PVD Exti Line 16.
Kojto 99:dbbf35b96557 216 * @retval None.
Kojto 99:dbbf35b96557 217 */
Kojto 99:dbbf35b96557 218 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
Kojto 99:dbbf35b96557 219
Kojto 99:dbbf35b96557 220 /**
Kojto 99:dbbf35b96557 221 * @brief Disable event on PVD Exti Line 16.
Kojto 99:dbbf35b96557 222 * @retval None.
Kojto 99:dbbf35b96557 223 */
Kojto 99:dbbf35b96557 224 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
Kojto 99:dbbf35b96557 225
Kojto 99:dbbf35b96557 226 /**
Kojto 99:dbbf35b96557 227 * @brief Enable the PVD Extended Interrupt Rising Trigger.
Kojto 93:e188a91d3eaa 228 * @retval None.
Kojto 93:e188a91d3eaa 229 */
Kojto 99:dbbf35b96557 230 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
Kojto 99:dbbf35b96557 231
Kojto 99:dbbf35b96557 232 /**
Kojto 99:dbbf35b96557 233 * @brief Disable the PVD Extended Interrupt Rising Trigger.
Kojto 99:dbbf35b96557 234 * @retval None.
Kojto 99:dbbf35b96557 235 */
Kojto 99:dbbf35b96557 236 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
Kojto 99:dbbf35b96557 237
Kojto 99:dbbf35b96557 238 /**
Kojto 99:dbbf35b96557 239 * @brief Enable the PVD Extended Interrupt Falling Trigger.
Kojto 99:dbbf35b96557 240 * @retval None.
Kojto 99:dbbf35b96557 241 */
Kojto 99:dbbf35b96557 242 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
Kojto 99:dbbf35b96557 243
Kojto 93:e188a91d3eaa 244
Kojto 93:e188a91d3eaa 245 /**
Kojto 99:dbbf35b96557 246 * @brief Disable the PVD Extended Interrupt Falling Trigger.
Kojto 93:e188a91d3eaa 247 * @retval None.
Kojto 93:e188a91d3eaa 248 */
Kojto 99:dbbf35b96557 249 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
Kojto 99:dbbf35b96557 250
Kojto 99:dbbf35b96557 251
Kojto 99:dbbf35b96557 252 /**
Kojto 99:dbbf35b96557 253 * @brief PVD EXTI line configuration: set rising & falling edge trigger.
Kojto 99:dbbf35b96557 254 * @retval None.
Kojto 99:dbbf35b96557 255 */
Kojto 122:f9eeca106725 256 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\
Kojto 122:f9eeca106725 257 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\
Kojto 122:f9eeca106725 258 }while(0)
Kojto 99:dbbf35b96557 259
Kojto 99:dbbf35b96557 260 /**
Kojto 99:dbbf35b96557 261 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
Kojto 99:dbbf35b96557 262 * This parameter can be:
Kojto 99:dbbf35b96557 263 * @retval None.
Kojto 99:dbbf35b96557 264 */
Kojto 122:f9eeca106725 265 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\
Kojto 122:f9eeca106725 266 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\
Kojto 122:f9eeca106725 267 }while(0)
Kojto 93:e188a91d3eaa 268
Kojto 93:e188a91d3eaa 269 /**
Kojto 93:e188a91d3eaa 270 * @brief checks whether the specified PVD Exti interrupt flag is set or not.
Kojto 93:e188a91d3eaa 271 * @retval EXTI PVD Line Status.
Kojto 93:e188a91d3eaa 272 */
Kojto 99:dbbf35b96557 273 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
Kojto 93:e188a91d3eaa 274
Kojto 93:e188a91d3eaa 275 /**
Kojto 93:e188a91d3eaa 276 * @brief Clear the PVD Exti flag.
Kojto 93:e188a91d3eaa 277 * @retval None.
Kojto 93:e188a91d3eaa 278 */
Kojto 99:dbbf35b96557 279 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
Kojto 93:e188a91d3eaa 280
Kojto 93:e188a91d3eaa 281 /**
Kojto 99:dbbf35b96557 282 * @brief Generates a Software interrupt on PVD EXTI line.
Kojto 93:e188a91d3eaa 283 * @retval None
Kojto 93:e188a91d3eaa 284 */
Kojto 99:dbbf35b96557 285 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
Kojto 99:dbbf35b96557 286
Kojto 99:dbbf35b96557 287 /**
Kojto 99:dbbf35b96557 288 * @}
Kojto 99:dbbf35b96557 289 */
Kojto 93:e188a91d3eaa 290
Kojto 93:e188a91d3eaa 291 /* Include PWR HAL Extension module */
Kojto 93:e188a91d3eaa 292 #include "stm32f4xx_hal_pwr_ex.h"
Kojto 93:e188a91d3eaa 293
Kojto 93:e188a91d3eaa 294 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 295 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
Kojto 99:dbbf35b96557 296 * @{
Kojto 99:dbbf35b96557 297 */
Kojto 99:dbbf35b96557 298
Kojto 99:dbbf35b96557 299 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 99:dbbf35b96557 300 * @{
Kojto 99:dbbf35b96557 301 */
Kojto 93:e188a91d3eaa 302 /* Initialization and de-initialization functions *****************************/
Kojto 93:e188a91d3eaa 303 void HAL_PWR_DeInit(void);
Kojto 93:e188a91d3eaa 304 void HAL_PWR_EnableBkUpAccess(void);
Kojto 93:e188a91d3eaa 305 void HAL_PWR_DisableBkUpAccess(void);
Kojto 99:dbbf35b96557 306 /**
Kojto 99:dbbf35b96557 307 * @}
Kojto 99:dbbf35b96557 308 */
Kojto 93:e188a91d3eaa 309
Kojto 99:dbbf35b96557 310 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
Kojto 99:dbbf35b96557 311 * @{
Kojto 99:dbbf35b96557 312 */
Kojto 93:e188a91d3eaa 313 /* Peripheral Control functions **********************************************/
Kojto 93:e188a91d3eaa 314 /* PVD configuration */
Kojto 99:dbbf35b96557 315 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
Kojto 93:e188a91d3eaa 316 void HAL_PWR_EnablePVD(void);
Kojto 93:e188a91d3eaa 317 void HAL_PWR_DisablePVD(void);
Kojto 93:e188a91d3eaa 318
Kojto 93:e188a91d3eaa 319 /* WakeUp pins configuration */
Kojto 93:e188a91d3eaa 320 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
Kojto 93:e188a91d3eaa 321 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
Kojto 93:e188a91d3eaa 322
Kojto 93:e188a91d3eaa 323 /* Low Power modes entry */
Kojto 93:e188a91d3eaa 324 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
Kojto 93:e188a91d3eaa 325 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
Kojto 93:e188a91d3eaa 326 void HAL_PWR_EnterSTANDBYMode(void);
Kojto 93:e188a91d3eaa 327
Kojto 99:dbbf35b96557 328 /* Power PVD IRQ Handler */
Kojto 93:e188a91d3eaa 329 void HAL_PWR_PVD_IRQHandler(void);
Kojto 93:e188a91d3eaa 330 void HAL_PWR_PVDCallback(void);
Kojto 93:e188a91d3eaa 331
Kojto 99:dbbf35b96557 332 /* Cortex System Control functions *******************************************/
Kojto 99:dbbf35b96557 333 void HAL_PWR_EnableSleepOnExit(void);
Kojto 99:dbbf35b96557 334 void HAL_PWR_DisableSleepOnExit(void);
Kojto 99:dbbf35b96557 335 void HAL_PWR_EnableSEVOnPend(void);
Kojto 99:dbbf35b96557 336 void HAL_PWR_DisableSEVOnPend(void);
Kojto 99:dbbf35b96557 337 /**
Kojto 99:dbbf35b96557 338 * @}
Kojto 99:dbbf35b96557 339 */
Kojto 99:dbbf35b96557 340
Kojto 99:dbbf35b96557 341 /**
Kojto 99:dbbf35b96557 342 * @}
Kojto 99:dbbf35b96557 343 */
Kojto 99:dbbf35b96557 344
Kojto 99:dbbf35b96557 345 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 346 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 347 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 348 /** @defgroup PWR_Private_Constants PWR Private Constants
Kojto 99:dbbf35b96557 349 * @{
Kojto 99:dbbf35b96557 350 */
Kojto 99:dbbf35b96557 351
Kojto 99:dbbf35b96557 352 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
Kojto 99:dbbf35b96557 353 * @{
Kojto 99:dbbf35b96557 354 */
Kojto 99:dbbf35b96557 355 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
Kojto 99:dbbf35b96557 356 /**
Kojto 99:dbbf35b96557 357 * @}
Kojto 99:dbbf35b96557 358 */
Kojto 99:dbbf35b96557 359
Kojto 99:dbbf35b96557 360 /** @defgroup PWR_register_alias_address PWR Register alias address
Kojto 99:dbbf35b96557 361 * @{
Kojto 99:dbbf35b96557 362 */
Kojto 99:dbbf35b96557 363 /* ------------- PWR registers bit address in the alias region ---------------*/
Kojto 99:dbbf35b96557 364 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
Kojto 122:f9eeca106725 365 #define PWR_CR_OFFSET 0x00U
Kojto 122:f9eeca106725 366 #define PWR_CSR_OFFSET 0x04U
Kojto 99:dbbf35b96557 367 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
Kojto 99:dbbf35b96557 368 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
Kojto 99:dbbf35b96557 369 /**
Kojto 99:dbbf35b96557 370 * @}
Kojto 99:dbbf35b96557 371 */
Kojto 99:dbbf35b96557 372
Kojto 99:dbbf35b96557 373 /** @defgroup PWR_CR_register_alias PWR CR Register alias address
Kojto 99:dbbf35b96557 374 * @{
Kojto 99:dbbf35b96557 375 */
Kojto 99:dbbf35b96557 376 /* --- CR Register ---*/
Kojto 99:dbbf35b96557 377 /* Alias word address of DBP bit */
Kojto 99:dbbf35b96557 378 #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP)
Kojto 122:f9eeca106725 379 #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U))
Kojto 99:dbbf35b96557 380
Kojto 99:dbbf35b96557 381 /* Alias word address of PVDE bit */
Kojto 99:dbbf35b96557 382 #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE)
Kojto 122:f9eeca106725 383 #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U))
Kojto 99:dbbf35b96557 384
Kojto 99:dbbf35b96557 385 /* Alias word address of PMODE bit */
Kojto 99:dbbf35b96557 386 #define PMODE_BIT_NUMBER POSITION_VAL(PWR_CR_PMODE)
Kojto 122:f9eeca106725 387 #define CR_PMODE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PMODE_BIT_NUMBER * 4U))
Kojto 99:dbbf35b96557 388 /**
Kojto 99:dbbf35b96557 389 * @}
Kojto 99:dbbf35b96557 390 */
Kojto 99:dbbf35b96557 391
Kojto 99:dbbf35b96557 392 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
Kojto 99:dbbf35b96557 393 * @{
Kojto 99:dbbf35b96557 394 */
Kojto 99:dbbf35b96557 395 /* --- CSR Register ---*/
Kojto 99:dbbf35b96557 396 /* Alias word address of EWUP bit */
Kojto 99:dbbf35b96557 397 #define EWUP_BIT_NUMBER POSITION_VAL(PWR_CSR_EWUP)
Kojto 122:f9eeca106725 398 #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U))
Kojto 99:dbbf35b96557 399 /**
Kojto 99:dbbf35b96557 400 * @}
Kojto 99:dbbf35b96557 401 */
Kojto 99:dbbf35b96557 402
Kojto 99:dbbf35b96557 403 /**
Kojto 99:dbbf35b96557 404 * @}
Kojto 99:dbbf35b96557 405 */
Kojto 99:dbbf35b96557 406 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 407 /** @defgroup PWR_Private_Macros PWR Private Macros
Kojto 99:dbbf35b96557 408 * @{
Kojto 99:dbbf35b96557 409 */
Kojto 99:dbbf35b96557 410
Kojto 99:dbbf35b96557 411 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
Kojto 99:dbbf35b96557 412 * @{
Kojto 99:dbbf35b96557 413 */
Kojto 99:dbbf35b96557 414 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
Kojto 99:dbbf35b96557 415 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
Kojto 99:dbbf35b96557 416 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
Kojto 99:dbbf35b96557 417 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
Kojto 99:dbbf35b96557 418 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
Kojto 99:dbbf35b96557 419 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
Kojto 99:dbbf35b96557 420 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
Kojto 99:dbbf35b96557 421 ((MODE) == PWR_PVD_MODE_NORMAL))
Kojto 99:dbbf35b96557 422 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
Kojto 99:dbbf35b96557 423 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
Kojto 99:dbbf35b96557 424 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
Kojto 99:dbbf35b96557 425 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
Kojto 99:dbbf35b96557 426 /**
Kojto 99:dbbf35b96557 427 * @}
Kojto 99:dbbf35b96557 428 */
Kojto 99:dbbf35b96557 429
Kojto 99:dbbf35b96557 430 /**
Kojto 99:dbbf35b96557 431 * @}
Kojto 99:dbbf35b96557 432 */
Kojto 93:e188a91d3eaa 433
Kojto 93:e188a91d3eaa 434 /**
Kojto 93:e188a91d3eaa 435 * @}
Kojto 93:e188a91d3eaa 436 */
Kojto 93:e188a91d3eaa 437
Kojto 93:e188a91d3eaa 438 /**
Kojto 93:e188a91d3eaa 439 * @}
Kojto 93:e188a91d3eaa 440 */
Kojto 93:e188a91d3eaa 441
Kojto 93:e188a91d3eaa 442 #ifdef __cplusplus
Kojto 93:e188a91d3eaa 443 }
Kojto 93:e188a91d3eaa 444 #endif
Kojto 93:e188a91d3eaa 445
Kojto 93:e188a91d3eaa 446
Kojto 93:e188a91d3eaa 447 #endif /* __STM32F4xx_HAL_PWR_H */
Kojto 93:e188a91d3eaa 448
Kojto 93:e188a91d3eaa 449 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/