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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_B96B_F446VE/stm32f4xx_ll_sdmmc.h@122:f9eeca106725, 2016-07-07 (annotated)

Committer:
Kojto
Date:
Thu Jul 07 14:34:11 2016 +0100
Revision:
122:f9eeca106725
Parent:
112:6f327212ef96 
Release 122 of the mbed library



Changes:

- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4

- Thread safety addition - mbed API should contain a statement about thread safety

- critical section API addition

- CAS API (core_util_atomic_incr/decr)

- DEVICE_ are generated from targets.json file, device.h deprecated

- Callback replaces FunctionPointer to provide std like interface

- mbed HAL API docs improvements

- toolchain - prexif attributes with MBED_

            - add new attributes - packed, weak, forcedinline, align

- target.json - contains targets definitions

- ST - L1XX - Cube update to 1.5

     - SPI clock selection fix (clock from APB domain)

     - F7 - Cube update v1.4.0

     - L0 -  baudrate init fix

     - L1 - Cube update v1.5

     - F3 - baudrate init fix, 3 targets CAN support

     - F4 - Cube update v1.12.0, 3 targets CAN support

     - L4XX - Cube update v1.5.1

     - F0 - update Cube to v1.5.0

     - L4 - 2 targets (L476RG/VG) CAN support

- NXP - pwm clock fix for KSDK2 MCU

      - LPC2368 - remove ARM toolchain support - due to regression

      - KSDK2 - fix SPI , I2C address and repeat start

- Silabs - some fixes backported from mbed 3

- Renesas - RZ_A1H - SystemCoreClockUpdate addition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 112:6f327212ef96 1 /**
Kojto 112:6f327212ef96 2 ******************************************************************************
Kojto 112:6f327212ef96 3 * @file stm32f4xx_ll_sdmmc.h
Kojto 112:6f327212ef96 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.5.0
Kojto 122:f9eeca106725 6 * @date 06-May-2016
Kojto 112:6f327212ef96 7 * @brief Header file of SDMMC HAL module.
Kojto 112:6f327212ef96 8 ******************************************************************************
Kojto 112:6f327212ef96 9 * @attention
Kojto 112:6f327212ef96 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 112:6f327212ef96 12 *
Kojto 112:6f327212ef96 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 112:6f327212ef96 14 * are permitted provided that the following conditions are met:
Kojto 112:6f327212ef96 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 112:6f327212ef96 16 * this list of conditions and the following disclaimer.
Kojto 112:6f327212ef96 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 112:6f327212ef96 18 * this list of conditions and the following disclaimer in the documentation
Kojto 112:6f327212ef96 19 * and/or other materials provided with the distribution.
Kojto 112:6f327212ef96 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 112:6f327212ef96 21 * may be used to endorse or promote products derived from this software
Kojto 112:6f327212ef96 22 * without specific prior written permission.
Kojto 112:6f327212ef96 23 *
Kojto 112:6f327212ef96 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 112:6f327212ef96 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 112:6f327212ef96 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 112:6f327212ef96 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 112:6f327212ef96 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 112:6f327212ef96 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 112:6f327212ef96 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 112:6f327212ef96 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 112:6f327212ef96 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 112:6f327212ef96 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 112:6f327212ef96 34 *
Kojto 112:6f327212ef96 35 ******************************************************************************
Kojto 112:6f327212ef96 36 */
Kojto 112:6f327212ef96 37
Kojto 112:6f327212ef96 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 112:6f327212ef96 39 #ifndef __STM32F4xx_LL_SDMMC_H
Kojto 112:6f327212ef96 40 #define __STM32F4xx_LL_SDMMC_H
Kojto 112:6f327212ef96 41
Kojto 112:6f327212ef96 42 #ifdef __cplusplus
Kojto 112:6f327212ef96 43 extern "C" {
Kojto 112:6f327212ef96 44 #endif
Kojto 112:6f327212ef96 45 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
Kojto 112:6f327212ef96 46 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
Kojto 112:6f327212ef96 47 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
Kojto 122:f9eeca106725 48 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
Kojto 122:f9eeca106725 49 defined(STM32F412Rx) || defined(STM32F412Cx)
Kojto 112:6f327212ef96 50 /* Includes ------------------------------------------------------------------*/
Kojto 112:6f327212ef96 51 #include "stm32f4xx_hal_def.h"
Kojto 112:6f327212ef96 52
Kojto 112:6f327212ef96 53 /** @addtogroup STM32F4xx_Driver
Kojto 112:6f327212ef96 54 * @{
Kojto 112:6f327212ef96 55 */
Kojto 112:6f327212ef96 56
Kojto 112:6f327212ef96 57 /** @addtogroup SDMMC_LL
Kojto 112:6f327212ef96 58 * @{
Kojto 112:6f327212ef96 59 */
Kojto 112:6f327212ef96 60
Kojto 112:6f327212ef96 61 /* Exported types ------------------------------------------------------------*/
Kojto 112:6f327212ef96 62 /** @defgroup SDMMC_LL_Exported_Types SDMMC_LL Exported Types
Kojto 112:6f327212ef96 63 * @{
Kojto 112:6f327212ef96 64 */
Kojto 112:6f327212ef96 65
Kojto 112:6f327212ef96 66 /**
Kojto 112:6f327212ef96 67 * @brief SDMMC Configuration Structure definition
Kojto 112:6f327212ef96 68 */
Kojto 112:6f327212ef96 69 typedef struct
Kojto 112:6f327212ef96 70 {
Kojto 112:6f327212ef96 71 uint32_t ClockEdge; /*!< Specifies the clock transition on which the bit capture is made.
Kojto 112:6f327212ef96 72 This parameter can be a value of @ref SDIO_Clock_Edge */
Kojto 112:6f327212ef96 73
Kojto 112:6f327212ef96 74 uint32_t ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is
Kojto 112:6f327212ef96 75 enabled or disabled.
Kojto 112:6f327212ef96 76 This parameter can be a value of @ref SDIO_Clock_Bypass */
Kojto 112:6f327212ef96 77
Kojto 112:6f327212ef96 78 uint32_t ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or
Kojto 112:6f327212ef96 79 disabled when the bus is idle.
Kojto 112:6f327212ef96 80 This parameter can be a value of @ref SDIO_Clock_Power_Save */
Kojto 112:6f327212ef96 81
Kojto 112:6f327212ef96 82 uint32_t BusWide; /*!< Specifies the SDIO bus width.
Kojto 112:6f327212ef96 83 This parameter can be a value of @ref SDIO_Bus_Wide */
Kojto 112:6f327212ef96 84
Kojto 112:6f327212ef96 85 uint32_t HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled.
Kojto 112:6f327212ef96 86 This parameter can be a value of @ref SDIO_Hardware_Flow_Control */
Kojto 112:6f327212ef96 87
Kojto 112:6f327212ef96 88 uint32_t ClockDiv; /*!< Specifies the clock frequency of the SDIO controller.
Kojto 122:f9eeca106725 89 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
Kojto 112:6f327212ef96 90
Kojto 112:6f327212ef96 91 }SDIO_InitTypeDef;
Kojto 112:6f327212ef96 92
Kojto 112:6f327212ef96 93
Kojto 112:6f327212ef96 94 /**
Kojto 112:6f327212ef96 95 * @brief SDIO Command Control structure
Kojto 112:6f327212ef96 96 */
Kojto 122:f9eeca106725 97 typedef struct
Kojto 112:6f327212ef96 98 {
Kojto 112:6f327212ef96 99 uint32_t Argument; /*!< Specifies the SDIO command argument which is sent
Kojto 112:6f327212ef96 100 to a card as part of a command message. If a command
Kojto 112:6f327212ef96 101 contains an argument, it must be loaded into this register
Kojto 112:6f327212ef96 102 before writing the command to the command register. */
Kojto 112:6f327212ef96 103
Kojto 112:6f327212ef96 104 uint32_t CmdIndex; /*!< Specifies the SDIO command index. It must be Min_Data = 0 and
Kojto 112:6f327212ef96 105 Max_Data = 64 */
Kojto 112:6f327212ef96 106
Kojto 112:6f327212ef96 107 uint32_t Response; /*!< Specifies the SDIO response type.
Kojto 112:6f327212ef96 108 This parameter can be a value of @ref SDIO_Response_Type */
Kojto 112:6f327212ef96 109
Kojto 112:6f327212ef96 110 uint32_t WaitForInterrupt; /*!< Specifies whether SDIO wait for interrupt request is
Kojto 112:6f327212ef96 111 enabled or disabled.
Kojto 112:6f327212ef96 112 This parameter can be a value of @ref SDIO_Wait_Interrupt_State */
Kojto 112:6f327212ef96 113
Kojto 112:6f327212ef96 114 uint32_t CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM)
Kojto 112:6f327212ef96 115 is enabled or disabled.
Kojto 112:6f327212ef96 116 This parameter can be a value of @ref SDIO_CPSM_State */
Kojto 112:6f327212ef96 117 }SDIO_CmdInitTypeDef;
Kojto 112:6f327212ef96 118
Kojto 112:6f327212ef96 119
Kojto 112:6f327212ef96 120 /**
Kojto 112:6f327212ef96 121 * @brief SDIO Data Control structure
Kojto 112:6f327212ef96 122 */
Kojto 112:6f327212ef96 123 typedef struct
Kojto 112:6f327212ef96 124 {
Kojto 112:6f327212ef96 125 uint32_t DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */
Kojto 112:6f327212ef96 126
Kojto 112:6f327212ef96 127 uint32_t DataLength; /*!< Specifies the number of data bytes to be transferred. */
Kojto 112:6f327212ef96 128
Kojto 112:6f327212ef96 129 uint32_t DataBlockSize; /*!< Specifies the data block size for block transfer.
Kojto 112:6f327212ef96 130 This parameter can be a value of @ref SDIO_Data_Block_Size */
Kojto 112:6f327212ef96 131
Kojto 112:6f327212ef96 132 uint32_t TransferDir; /*!< Specifies the data transfer direction, whether the transfer
Kojto 112:6f327212ef96 133 is a read or write.
Kojto 112:6f327212ef96 134 This parameter can be a value of @ref SDIO_Transfer_Direction */
Kojto 112:6f327212ef96 135
Kojto 112:6f327212ef96 136 uint32_t TransferMode; /*!< Specifies whether data transfer is in stream or block mode.
Kojto 112:6f327212ef96 137 This parameter can be a value of @ref SDIO_Transfer_Type */
Kojto 112:6f327212ef96 138
Kojto 112:6f327212ef96 139 uint32_t DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM)
Kojto 112:6f327212ef96 140 is enabled or disabled.
Kojto 112:6f327212ef96 141 This parameter can be a value of @ref SDIO_DPSM_State */
Kojto 112:6f327212ef96 142 }SDIO_DataInitTypeDef;
Kojto 112:6f327212ef96 143
Kojto 112:6f327212ef96 144 /**
Kojto 112:6f327212ef96 145 * @}
Kojto 112:6f327212ef96 146 */
Kojto 112:6f327212ef96 147
Kojto 112:6f327212ef96 148 /* Exported constants --------------------------------------------------------*/
Kojto 112:6f327212ef96 149 /** @defgroup SDMMC_LL_Exported_Constants SDMMC_LL Exported Constants
Kojto 112:6f327212ef96 150 * @{
Kojto 112:6f327212ef96 151 */
Kojto 112:6f327212ef96 152
Kojto 112:6f327212ef96 153 /** @defgroup SDIO_Clock_Edge Clock Edge
Kojto 112:6f327212ef96 154 * @{
Kojto 112:6f327212ef96 155 */
Kojto 122:f9eeca106725 156 #define SDIO_CLOCK_EDGE_RISING ((uint32_t)0x00000000U)
Kojto 112:6f327212ef96 157 #define SDIO_CLOCK_EDGE_FALLING SDIO_CLKCR_NEGEDGE
Kojto 112:6f327212ef96 158
Kojto 112:6f327212ef96 159 #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_CLOCK_EDGE_RISING) || \
Kojto 112:6f327212ef96 160 ((EDGE) == SDIO_CLOCK_EDGE_FALLING))
Kojto 112:6f327212ef96 161 /**
Kojto 112:6f327212ef96 162 * @}
Kojto 112:6f327212ef96 163 */
Kojto 112:6f327212ef96 164
Kojto 112:6f327212ef96 165 /** @defgroup SDIO_Clock_Bypass Clock Bypass
Kojto 112:6f327212ef96 166 * @{
Kojto 112:6f327212ef96 167 */
Kojto 122:f9eeca106725 168 #define SDIO_CLOCK_BYPASS_DISABLE ((uint32_t)0x00000000U)
Kojto 112:6f327212ef96 169 #define SDIO_CLOCK_BYPASS_ENABLE SDIO_CLKCR_BYPASS
Kojto 112:6f327212ef96 170
Kojto 112:6f327212ef96 171 #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_CLOCK_BYPASS_DISABLE) || \
Kojto 112:6f327212ef96 172 ((BYPASS) == SDIO_CLOCK_BYPASS_ENABLE))
Kojto 112:6f327212ef96 173 /**
Kojto 112:6f327212ef96 174 * @}
Kojto 112:6f327212ef96 175 */
Kojto 112:6f327212ef96 176
Kojto 112:6f327212ef96 177 /** @defgroup SDIO_Clock_Power_Save Clock Power Saving
Kojto 112:6f327212ef96 178 * @{
Kojto 112:6f327212ef96 179 */
Kojto 122:f9eeca106725 180 #define SDIO_CLOCK_POWER_SAVE_DISABLE ((uint32_t)0x00000000U)
Kojto 112:6f327212ef96 181 #define SDIO_CLOCK_POWER_SAVE_ENABLE SDIO_CLKCR_PWRSAV
Kojto 112:6f327212ef96 182
Kojto 112:6f327212ef96 183 #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_CLOCK_POWER_SAVE_DISABLE) || \
Kojto 112:6f327212ef96 184 ((SAVE) == SDIO_CLOCK_POWER_SAVE_ENABLE))
Kojto 112:6f327212ef96 185 /**
Kojto 112:6f327212ef96 186 * @}
Kojto 112:6f327212ef96 187 */
Kojto 112:6f327212ef96 188
Kojto 112:6f327212ef96 189 /** @defgroup SDIO_Bus_Wide Bus Width
Kojto 112:6f327212ef96 190 * @{
Kojto 112:6f327212ef96 191 */
Kojto 122:f9eeca106725 192 #define SDIO_BUS_WIDE_1B ((uint32_t)0x00000000U)
Kojto 112:6f327212ef96 193 #define SDIO_BUS_WIDE_4B SDIO_CLKCR_WIDBUS_0
Kojto 112:6f327212ef96 194 #define SDIO_BUS_WIDE_8B SDIO_CLKCR_WIDBUS_1
Kojto 112:6f327212ef96 195
Kojto 112:6f327212ef96 196 #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BUS_WIDE_1B) || \
Kojto 112:6f327212ef96 197 ((WIDE) == SDIO_BUS_WIDE_4B) || \
Kojto 112:6f327212ef96 198 ((WIDE) == SDIO_BUS_WIDE_8B))
Kojto 112:6f327212ef96 199 /**
Kojto 112:6f327212ef96 200 * @}
Kojto 112:6f327212ef96 201 */
Kojto 112:6f327212ef96 202
Kojto 112:6f327212ef96 203 /** @defgroup SDIO_Hardware_Flow_Control Hardware Flow Control
Kojto 112:6f327212ef96 204 * @{
Kojto 112:6f327212ef96 205 */
Kojto 122:f9eeca106725 206 #define SDIO_HARDWARE_FLOW_CONTROL_DISABLE ((uint32_t)0x00000000U)
Kojto 112:6f327212ef96 207 #define SDIO_HARDWARE_FLOW_CONTROL_ENABLE SDIO_CLKCR_HWFC_EN
Kojto 112:6f327212ef96 208
Kojto 112:6f327212ef96 209 #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HARDWARE_FLOW_CONTROL_DISABLE) || \
Kojto 112:6f327212ef96 210 ((CONTROL) == SDIO_HARDWARE_FLOW_CONTROL_ENABLE))
Kojto 112:6f327212ef96 211 /**
Kojto 112:6f327212ef96 212 * @}
Kojto 112:6f327212ef96 213 */
Kojto 112:6f327212ef96 214
Kojto 112:6f327212ef96 215 /** @defgroup SDIO_Clock_Division Clock Division
Kojto 112:6f327212ef96 216 * @{
Kojto 112:6f327212ef96 217 */
Kojto 122:f9eeca106725 218 #define IS_SDIO_CLKDIV(DIV) ((DIV) <= 0xFFU)
Kojto 112:6f327212ef96 219 /**
Kojto 112:6f327212ef96 220 * @}
Kojto 112:6f327212ef96 221 */
Kojto 112:6f327212ef96 222
Kojto 112:6f327212ef96 223 /** @defgroup SDIO_Command_Index Command Index
Kojto 112:6f327212ef96 224 * @{
Kojto 112:6f327212ef96 225 */
Kojto 122:f9eeca106725 226 #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40U)
Kojto 112:6f327212ef96 227 /**
Kojto 112:6f327212ef96 228 * @}
Kojto 112:6f327212ef96 229 */
Kojto 112:6f327212ef96 230
Kojto 112:6f327212ef96 231 /** @defgroup SDIO_Response_Type Response Type
Kojto 112:6f327212ef96 232 * @{
Kojto 112:6f327212ef96 233 */
Kojto 122:f9eeca106725 234 #define SDIO_RESPONSE_NO ((uint32_t)0x00000000U)
Kojto 112:6f327212ef96 235 #define SDIO_RESPONSE_SHORT SDIO_CMD_WAITRESP_0
Kojto 112:6f327212ef96 236 #define SDIO_RESPONSE_LONG SDIO_CMD_WAITRESP
Kojto 112:6f327212ef96 237
Kojto 112:6f327212ef96 238 #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_RESPONSE_NO) || \
Kojto 112:6f327212ef96 239 ((RESPONSE) == SDIO_RESPONSE_SHORT) || \
Kojto 112:6f327212ef96 240 ((RESPONSE) == SDIO_RESPONSE_LONG))
Kojto 112:6f327212ef96 241 /**
Kojto 112:6f327212ef96 242 * @}
Kojto 112:6f327212ef96 243 */
Kojto 112:6f327212ef96 244
Kojto 112:6f327212ef96 245 /** @defgroup SDIO_Wait_Interrupt_State Wait Interrupt
Kojto 112:6f327212ef96 246 * @{
Kojto 112:6f327212ef96 247 */
Kojto 122:f9eeca106725 248 #define SDIO_WAIT_NO ((uint32_t)0x00000000U)
Kojto 112:6f327212ef96 249 #define SDIO_WAIT_IT SDIO_CMD_WAITINT
Kojto 112:6f327212ef96 250 #define SDIO_WAIT_PEND SDIO_CMD_WAITPEND
Kojto 112:6f327212ef96 251
Kojto 112:6f327212ef96 252 #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_WAIT_NO) || \
Kojto 112:6f327212ef96 253 ((WAIT) == SDIO_WAIT_IT) || \
Kojto 112:6f327212ef96 254 ((WAIT) == SDIO_WAIT_PEND))
Kojto 112:6f327212ef96 255 /**
Kojto 112:6f327212ef96 256 * @}
Kojto 112:6f327212ef96 257 */
Kojto 112:6f327212ef96 258
Kojto 112:6f327212ef96 259 /** @defgroup SDIO_CPSM_State CPSM State
Kojto 112:6f327212ef96 260 * @{
Kojto 112:6f327212ef96 261 */
Kojto 122:f9eeca106725 262 #define SDIO_CPSM_DISABLE ((uint32_t)0x00000000U)
Kojto 112:6f327212ef96 263 #define SDIO_CPSM_ENABLE SDIO_CMD_CPSMEN
Kojto 112:6f327212ef96 264
Kojto 112:6f327212ef96 265 #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_DISABLE) || \
Kojto 112:6f327212ef96 266 ((CPSM) == SDIO_CPSM_ENABLE))
Kojto 112:6f327212ef96 267 /**
Kojto 112:6f327212ef96 268 * @}
Kojto 112:6f327212ef96 269 */
Kojto 112:6f327212ef96 270
Kojto 112:6f327212ef96 271 /** @defgroup SDIO_Response_Registers Response Register
Kojto 112:6f327212ef96 272 * @{
Kojto 112:6f327212ef96 273 */
Kojto 122:f9eeca106725 274 #define SDIO_RESP1 ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 275 #define SDIO_RESP2 ((uint32_t)0x00000004U)
Kojto 122:f9eeca106725 276 #define SDIO_RESP3 ((uint32_t)0x00000008U)
Kojto 122:f9eeca106725 277 #define SDIO_RESP4 ((uint32_t)0x0000000CU)
Kojto 112:6f327212ef96 278
Kojto 112:6f327212ef96 279 #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || \
Kojto 112:6f327212ef96 280 ((RESP) == SDIO_RESP2) || \
Kojto 112:6f327212ef96 281 ((RESP) == SDIO_RESP3) || \
Kojto 112:6f327212ef96 282 ((RESP) == SDIO_RESP4))
Kojto 112:6f327212ef96 283 /**
Kojto 112:6f327212ef96 284 * @}
Kojto 112:6f327212ef96 285 */
Kojto 112:6f327212ef96 286
Kojto 112:6f327212ef96 287 /** @defgroup SDIO_Data_Length Data Lenght
Kojto 112:6f327212ef96 288 * @{
Kojto 112:6f327212ef96 289 */
Kojto 122:f9eeca106725 290 #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFFU)
Kojto 112:6f327212ef96 291 /**
Kojto 112:6f327212ef96 292 * @}
Kojto 112:6f327212ef96 293 */
Kojto 112:6f327212ef96 294
Kojto 112:6f327212ef96 295 /** @defgroup SDIO_Data_Block_Size Data Block Size
Kojto 112:6f327212ef96 296 * @{
Kojto 112:6f327212ef96 297 */
Kojto 122:f9eeca106725 298 #define SDIO_DATABLOCK_SIZE_1B ((uint32_t)0x00000000U)
Kojto 112:6f327212ef96 299 #define SDIO_DATABLOCK_SIZE_2B SDIO_DCTRL_DBLOCKSIZE_0
Kojto 112:6f327212ef96 300 #define SDIO_DATABLOCK_SIZE_4B SDIO_DCTRL_DBLOCKSIZE_1
Kojto 122:f9eeca106725 301 #define SDIO_DATABLOCK_SIZE_8B ((uint32_t)0x00000030U)
Kojto 112:6f327212ef96 302 #define SDIO_DATABLOCK_SIZE_16B SDIO_DCTRL_DBLOCKSIZE_2
Kojto 122:f9eeca106725 303 #define SDIO_DATABLOCK_SIZE_32B ((uint32_t)0x00000050U)
Kojto 122:f9eeca106725 304 #define SDIO_DATABLOCK_SIZE_64B ((uint32_t)0x00000060U)
Kojto 122:f9eeca106725 305 #define SDIO_DATABLOCK_SIZE_128B ((uint32_t)0x00000070U)
Kojto 112:6f327212ef96 306 #define SDIO_DATABLOCK_SIZE_256B SDIO_DCTRL_DBLOCKSIZE_3
Kojto 122:f9eeca106725 307 #define SDIO_DATABLOCK_SIZE_512B ((uint32_t)0x00000090U)
Kojto 122:f9eeca106725 308 #define SDIO_DATABLOCK_SIZE_1024B ((uint32_t)0x000000A0U)
Kojto 122:f9eeca106725 309 #define SDIO_DATABLOCK_SIZE_2048B ((uint32_t)0x000000B0U)
Kojto 122:f9eeca106725 310 #define SDIO_DATABLOCK_SIZE_4096B ((uint32_t)0x000000C0U)
Kojto 122:f9eeca106725 311 #define SDIO_DATABLOCK_SIZE_8192B ((uint32_t)0x000000D0U)
Kojto 122:f9eeca106725 312 #define SDIO_DATABLOCK_SIZE_16384B ((uint32_t)0x000000E0U)
Kojto 112:6f327212ef96 313
Kojto 112:6f327212ef96 314 #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DATABLOCK_SIZE_1B) || \
Kojto 112:6f327212ef96 315 ((SIZE) == SDIO_DATABLOCK_SIZE_2B) || \
Kojto 112:6f327212ef96 316 ((SIZE) == SDIO_DATABLOCK_SIZE_4B) || \
Kojto 112:6f327212ef96 317 ((SIZE) == SDIO_DATABLOCK_SIZE_8B) || \
Kojto 112:6f327212ef96 318 ((SIZE) == SDIO_DATABLOCK_SIZE_16B) || \
Kojto 112:6f327212ef96 319 ((SIZE) == SDIO_DATABLOCK_SIZE_32B) || \
Kojto 112:6f327212ef96 320 ((SIZE) == SDIO_DATABLOCK_SIZE_64B) || \
Kojto 112:6f327212ef96 321 ((SIZE) == SDIO_DATABLOCK_SIZE_128B) || \
Kojto 112:6f327212ef96 322 ((SIZE) == SDIO_DATABLOCK_SIZE_256B) || \
Kojto 112:6f327212ef96 323 ((SIZE) == SDIO_DATABLOCK_SIZE_512B) || \
Kojto 112:6f327212ef96 324 ((SIZE) == SDIO_DATABLOCK_SIZE_1024B) || \
Kojto 112:6f327212ef96 325 ((SIZE) == SDIO_DATABLOCK_SIZE_2048B) || \
Kojto 112:6f327212ef96 326 ((SIZE) == SDIO_DATABLOCK_SIZE_4096B) || \
Kojto 112:6f327212ef96 327 ((SIZE) == SDIO_DATABLOCK_SIZE_8192B) || \
Kojto 112:6f327212ef96 328 ((SIZE) == SDIO_DATABLOCK_SIZE_16384B))
Kojto 112:6f327212ef96 329 /**
Kojto 112:6f327212ef96 330 * @}
Kojto 112:6f327212ef96 331 */
Kojto 112:6f327212ef96 332
Kojto 112:6f327212ef96 333 /** @defgroup SDIO_Transfer_Direction Transfer Direction
Kojto 112:6f327212ef96 334 * @{
Kojto 112:6f327212ef96 335 */
Kojto 122:f9eeca106725 336 #define SDIO_TRANSFER_DIR_TO_CARD ((uint32_t)0x00000000U)
Kojto 112:6f327212ef96 337 #define SDIO_TRANSFER_DIR_TO_SDIO SDIO_DCTRL_DTDIR
Kojto 112:6f327212ef96 338
Kojto 112:6f327212ef96 339 #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TRANSFER_DIR_TO_CARD) || \
Kojto 112:6f327212ef96 340 ((DIR) == SDIO_TRANSFER_DIR_TO_SDIO))
Kojto 112:6f327212ef96 341 /**
Kojto 112:6f327212ef96 342 * @}
Kojto 112:6f327212ef96 343 */
Kojto 112:6f327212ef96 344
Kojto 112:6f327212ef96 345 /** @defgroup SDIO_Transfer_Type Transfer Type
Kojto 112:6f327212ef96 346 * @{
Kojto 112:6f327212ef96 347 */
Kojto 122:f9eeca106725 348 #define SDIO_TRANSFER_MODE_BLOCK ((uint32_t)0x00000000U)
Kojto 112:6f327212ef96 349 #define SDIO_TRANSFER_MODE_STREAM SDIO_DCTRL_DTMODE
Kojto 112:6f327212ef96 350
Kojto 112:6f327212ef96 351 #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TRANSFER_MODE_BLOCK) || \
Kojto 112:6f327212ef96 352 ((MODE) == SDIO_TRANSFER_MODE_STREAM))
Kojto 112:6f327212ef96 353 /**
Kojto 112:6f327212ef96 354 * @}
Kojto 112:6f327212ef96 355 */
Kojto 112:6f327212ef96 356
Kojto 112:6f327212ef96 357 /** @defgroup SDIO_DPSM_State DPSM State
Kojto 112:6f327212ef96 358 * @{
Kojto 112:6f327212ef96 359 */
Kojto 122:f9eeca106725 360 #define SDIO_DPSM_DISABLE ((uint32_t)0x00000000U)
Kojto 112:6f327212ef96 361 #define SDIO_DPSM_ENABLE SDIO_DCTRL_DTEN
Kojto 112:6f327212ef96 362
Kojto 112:6f327212ef96 363 #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_DISABLE) ||\
Kojto 112:6f327212ef96 364 ((DPSM) == SDIO_DPSM_ENABLE))
Kojto 112:6f327212ef96 365 /**
Kojto 112:6f327212ef96 366 * @}
Kojto 112:6f327212ef96 367 */
Kojto 112:6f327212ef96 368
Kojto 112:6f327212ef96 369 /** @defgroup SDIO_Read_Wait_Mode Read Wait Mode
Kojto 112:6f327212ef96 370 * @{
Kojto 112:6f327212ef96 371 */
Kojto 122:f9eeca106725 372 #define SDIO_READ_WAIT_MODE_DATA2 ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 373 #define SDIO_READ_WAIT_MODE_CLK ((uint32_t)0x00000001U)
Kojto 112:6f327212ef96 374
Kojto 112:6f327212ef96 375 #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_READ_WAIT_MODE_CLK) || \
Kojto 112:6f327212ef96 376 ((MODE) == SDIO_READ_WAIT_MODE_DATA2))
Kojto 112:6f327212ef96 377 /**
Kojto 112:6f327212ef96 378 * @}
Kojto 112:6f327212ef96 379 */
Kojto 112:6f327212ef96 380
Kojto 112:6f327212ef96 381 /** @defgroup SDIO_Interrupt_sources Interrupt Sources
Kojto 112:6f327212ef96 382 * @{
Kojto 112:6f327212ef96 383 */
Kojto 112:6f327212ef96 384 #define SDIO_IT_CCRCFAIL SDIO_STA_CCRCFAIL
Kojto 112:6f327212ef96 385 #define SDIO_IT_DCRCFAIL SDIO_STA_DCRCFAIL
Kojto 112:6f327212ef96 386 #define SDIO_IT_CTIMEOUT SDIO_STA_CTIMEOUT
Kojto 112:6f327212ef96 387 #define SDIO_IT_DTIMEOUT SDIO_STA_DTIMEOUT
Kojto 112:6f327212ef96 388 #define SDIO_IT_TXUNDERR SDIO_STA_TXUNDERR
Kojto 112:6f327212ef96 389 #define SDIO_IT_RXOVERR SDIO_STA_RXOVERR
Kojto 112:6f327212ef96 390 #define SDIO_IT_CMDREND SDIO_STA_CMDREND
Kojto 112:6f327212ef96 391 #define SDIO_IT_CMDSENT SDIO_STA_CMDSENT
Kojto 112:6f327212ef96 392 #define SDIO_IT_DATAEND SDIO_STA_DATAEND
Kojto 112:6f327212ef96 393 #define SDIO_IT_STBITERR SDIO_STA_STBITERR
Kojto 112:6f327212ef96 394 #define SDIO_IT_DBCKEND SDIO_STA_DBCKEND
Kojto 112:6f327212ef96 395 #define SDIO_IT_CMDACT SDIO_STA_CMDACT
Kojto 112:6f327212ef96 396 #define SDIO_IT_TXACT SDIO_STA_TXACT
Kojto 112:6f327212ef96 397 #define SDIO_IT_RXACT SDIO_STA_RXACT
Kojto 112:6f327212ef96 398 #define SDIO_IT_TXFIFOHE SDIO_STA_TXFIFOHE
Kojto 112:6f327212ef96 399 #define SDIO_IT_RXFIFOHF SDIO_STA_RXFIFOHF
Kojto 112:6f327212ef96 400 #define SDIO_IT_TXFIFOF SDIO_STA_TXFIFOF
Kojto 112:6f327212ef96 401 #define SDIO_IT_RXFIFOF SDIO_STA_RXFIFOF
Kojto 112:6f327212ef96 402 #define SDIO_IT_TXFIFOE SDIO_STA_TXFIFOE
Kojto 112:6f327212ef96 403 #define SDIO_IT_RXFIFOE SDIO_STA_RXFIFOE
Kojto 112:6f327212ef96 404 #define SDIO_IT_TXDAVL SDIO_STA_TXDAVL
Kojto 112:6f327212ef96 405 #define SDIO_IT_RXDAVL SDIO_STA_RXDAVL
Kojto 112:6f327212ef96 406 #define SDIO_IT_SDIOIT SDIO_STA_SDIOIT
Kojto 112:6f327212ef96 407 #define SDIO_IT_CEATAEND SDIO_STA_CEATAEND
Kojto 112:6f327212ef96 408 /**
Kojto 112:6f327212ef96 409 * @}
Kojto 112:6f327212ef96 410 */
Kojto 112:6f327212ef96 411
Kojto 112:6f327212ef96 412 /** @defgroup SDIO_Flags Flags
Kojto 112:6f327212ef96 413 * @{
Kojto 112:6f327212ef96 414 */
Kojto 112:6f327212ef96 415 #define SDIO_FLAG_CCRCFAIL SDIO_STA_CCRCFAIL
Kojto 112:6f327212ef96 416 #define SDIO_FLAG_DCRCFAIL SDIO_STA_DCRCFAIL
Kojto 112:6f327212ef96 417 #define SDIO_FLAG_CTIMEOUT SDIO_STA_CTIMEOUT
Kojto 112:6f327212ef96 418 #define SDIO_FLAG_DTIMEOUT SDIO_STA_DTIMEOUT
Kojto 112:6f327212ef96 419 #define SDIO_FLAG_TXUNDERR SDIO_STA_TXUNDERR
Kojto 112:6f327212ef96 420 #define SDIO_FLAG_RXOVERR SDIO_STA_RXOVERR
Kojto 112:6f327212ef96 421 #define SDIO_FLAG_CMDREND SDIO_STA_CMDREND
Kojto 112:6f327212ef96 422 #define SDIO_FLAG_CMDSENT SDIO_STA_CMDSENT
Kojto 112:6f327212ef96 423 #define SDIO_FLAG_DATAEND SDIO_STA_DATAEND
Kojto 112:6f327212ef96 424 #define SDIO_FLAG_STBITERR SDIO_STA_STBITERR
Kojto 112:6f327212ef96 425 #define SDIO_FLAG_DBCKEND SDIO_STA_DBCKEND
Kojto 112:6f327212ef96 426 #define SDIO_FLAG_CMDACT SDIO_STA_CMDACT
Kojto 112:6f327212ef96 427 #define SDIO_FLAG_TXACT SDIO_STA_TXACT
Kojto 112:6f327212ef96 428 #define SDIO_FLAG_RXACT SDIO_STA_RXACT
Kojto 112:6f327212ef96 429 #define SDIO_FLAG_TXFIFOHE SDIO_STA_TXFIFOHE
Kojto 112:6f327212ef96 430 #define SDIO_FLAG_RXFIFOHF SDIO_STA_RXFIFOHF
Kojto 112:6f327212ef96 431 #define SDIO_FLAG_TXFIFOF SDIO_STA_TXFIFOF
Kojto 112:6f327212ef96 432 #define SDIO_FLAG_RXFIFOF SDIO_STA_RXFIFOF
Kojto 112:6f327212ef96 433 #define SDIO_FLAG_TXFIFOE SDIO_STA_TXFIFOE
Kojto 112:6f327212ef96 434 #define SDIO_FLAG_RXFIFOE SDIO_STA_RXFIFOE
Kojto 112:6f327212ef96 435 #define SDIO_FLAG_TXDAVL SDIO_STA_TXDAVL
Kojto 112:6f327212ef96 436 #define SDIO_FLAG_RXDAVL SDIO_STA_RXDAVL
Kojto 112:6f327212ef96 437 #define SDIO_FLAG_SDIOIT SDIO_STA_SDIOIT
Kojto 112:6f327212ef96 438 #define SDIO_FLAG_CEATAEND SDIO_STA_CEATAEND
Kojto 112:6f327212ef96 439 /**
Kojto 112:6f327212ef96 440 * @}
Kojto 112:6f327212ef96 441 */
Kojto 112:6f327212ef96 442
Kojto 112:6f327212ef96 443 /**
Kojto 112:6f327212ef96 444 * @}
Kojto 112:6f327212ef96 445 */
Kojto 112:6f327212ef96 446 /* Exported macro ------------------------------------------------------------*/
Kojto 112:6f327212ef96 447 /** @defgroup SDMMC_LL_Exported_macros SDMMC_LL Exported Macros
Kojto 112:6f327212ef96 448 * @{
Kojto 112:6f327212ef96 449 */
Kojto 112:6f327212ef96 450
Kojto 112:6f327212ef96 451 /** @defgroup SDMMC_LL_Alias_Region Bit Address in the alias region
Kojto 112:6f327212ef96 452 * @{
Kojto 112:6f327212ef96 453 */
Kojto 112:6f327212ef96 454 /* ------------ SDIO registers bit address in the alias region -------------- */
Kojto 112:6f327212ef96 455 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
Kojto 112:6f327212ef96 456
Kojto 112:6f327212ef96 457 /* --- CLKCR Register ---*/
Kojto 112:6f327212ef96 458 /* Alias word address of CLKEN bit */
Kojto 122:f9eeca106725 459 #define CLKCR_OFFSET (SDIO_OFFSET + 0x04U)
Kojto 122:f9eeca106725 460 #define CLKEN_BITNUMBER 0x08U
Kojto 122:f9eeca106725 461 #define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32U) + (CLKEN_BITNUMBER * 4U))
Kojto 112:6f327212ef96 462
Kojto 112:6f327212ef96 463 /* --- CMD Register ---*/
Kojto 112:6f327212ef96 464 /* Alias word address of SDIOSUSPEND bit */
Kojto 122:f9eeca106725 465 #define CMD_OFFSET (SDIO_OFFSET + 0x0CU)
Kojto 122:f9eeca106725 466 #define SDIOSUSPEND_BITNUMBER 0x0BU
Kojto 122:f9eeca106725 467 #define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32U) + (SDIOSUSPEND_BITNUMBER * 4U))
Kojto 112:6f327212ef96 468
Kojto 112:6f327212ef96 469 /* Alias word address of ENCMDCOMPL bit */
Kojto 122:f9eeca106725 470 #define ENCMDCOMPL_BITNUMBER 0x0CU
Kojto 122:f9eeca106725 471 #define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32U) + (ENCMDCOMPL_BITNUMBER * 4U))
Kojto 112:6f327212ef96 472
Kojto 112:6f327212ef96 473 /* Alias word address of NIEN bit */
Kojto 122:f9eeca106725 474 #define NIEN_BITNUMBER 0x0DU
Kojto 122:f9eeca106725 475 #define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32U) + (NIEN_BITNUMBER * 4U))
Kojto 112:6f327212ef96 476
Kojto 112:6f327212ef96 477 /* Alias word address of ATACMD bit */
Kojto 122:f9eeca106725 478 #define ATACMD_BITNUMBER 0x0EU
Kojto 122:f9eeca106725 479 #define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32U) + (ATACMD_BITNUMBER * 4U))
Kojto 112:6f327212ef96 480
Kojto 112:6f327212ef96 481 /* --- DCTRL Register ---*/
Kojto 112:6f327212ef96 482 /* Alias word address of DMAEN bit */
Kojto 122:f9eeca106725 483 #define DCTRL_OFFSET (SDIO_OFFSET + 0x2CU)
Kojto 122:f9eeca106725 484 #define DMAEN_BITNUMBER 0x03U
Kojto 122:f9eeca106725 485 #define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (DMAEN_BITNUMBER * 4U))
Kojto 112:6f327212ef96 486
Kojto 112:6f327212ef96 487 /* Alias word address of RWSTART bit */
Kojto 122:f9eeca106725 488 #define RWSTART_BITNUMBER 0x08U
Kojto 122:f9eeca106725 489 #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (RWSTART_BITNUMBER * 4U))
Kojto 112:6f327212ef96 490
Kojto 112:6f327212ef96 491 /* Alias word address of RWSTOP bit */
Kojto 122:f9eeca106725 492 #define RWSTOP_BITNUMBER 0x09U
Kojto 122:f9eeca106725 493 #define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (RWSTOP_BITNUMBER * 4U))
Kojto 112:6f327212ef96 494
Kojto 112:6f327212ef96 495 /* Alias word address of RWMOD bit */
Kojto 122:f9eeca106725 496 #define RWMOD_BITNUMBER 0x0AU
Kojto 122:f9eeca106725 497 #define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (RWMOD_BITNUMBER * 4U))
Kojto 112:6f327212ef96 498
Kojto 112:6f327212ef96 499 /* Alias word address of SDIOEN bit */
Kojto 122:f9eeca106725 500 #define SDIOEN_BITNUMBER 0x0BU
Kojto 122:f9eeca106725 501 #define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (SDIOEN_BITNUMBER * 4U))
Kojto 112:6f327212ef96 502 /**
Kojto 112:6f327212ef96 503 * @}
Kojto 112:6f327212ef96 504 */
Kojto 112:6f327212ef96 505
Kojto 112:6f327212ef96 506 /** @defgroup SDMMC_LL_Register Bits And Addresses Definitions
Kojto 112:6f327212ef96 507 * @brief SDMMC_LL registers bit address in the alias region
Kojto 112:6f327212ef96 508 * @{
Kojto 112:6f327212ef96 509 */
Kojto 112:6f327212ef96 510
Kojto 112:6f327212ef96 511 /* ---------------------- SDIO registers bit mask --------------------------- */
Kojto 112:6f327212ef96 512 /* --- CLKCR Register ---*/
Kojto 112:6f327212ef96 513 /* CLKCR register clear mask */
Kojto 112:6f327212ef96 514 #define CLKCR_CLEAR_MASK ((uint32_t)(SDIO_CLKCR_CLKDIV | SDIO_CLKCR_PWRSAV |\
Kojto 112:6f327212ef96 515 SDIO_CLKCR_BYPASS | SDIO_CLKCR_WIDBUS |\
Kojto 112:6f327212ef96 516 SDIO_CLKCR_NEGEDGE | SDIO_CLKCR_HWFC_EN))
Kojto 112:6f327212ef96 517
Kojto 112:6f327212ef96 518 /* --- PWRCTRL Register ---*/
Kojto 112:6f327212ef96 519 /* --- DCTRL Register ---*/
Kojto 112:6f327212ef96 520 /* SDIO DCTRL Clear Mask */
Kojto 112:6f327212ef96 521 #define DCTRL_CLEAR_MASK ((uint32_t)(SDIO_DCTRL_DTEN | SDIO_DCTRL_DTDIR |\
Kojto 112:6f327212ef96 522 SDIO_DCTRL_DTMODE | SDIO_DCTRL_DBLOCKSIZE))
Kojto 112:6f327212ef96 523
Kojto 112:6f327212ef96 524 /* --- CMD Register ---*/
Kojto 112:6f327212ef96 525 /* CMD Register clear mask */
Kojto 112:6f327212ef96 526 #define CMD_CLEAR_MASK ((uint32_t)(SDIO_CMD_CMDINDEX | SDIO_CMD_WAITRESP |\
Kojto 112:6f327212ef96 527 SDIO_CMD_WAITINT | SDIO_CMD_WAITPEND |\
Kojto 112:6f327212ef96 528 SDIO_CMD_CPSMEN | SDIO_CMD_SDIOSUSPEND))
Kojto 112:6f327212ef96 529
Kojto 112:6f327212ef96 530 /* SDIO RESP Registers Address */
Kojto 122:f9eeca106725 531 #define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14U))
Kojto 112:6f327212ef96 532
Kojto 112:6f327212ef96 533 /* SDIO Initialization Frequency (400KHz max) */
Kojto 122:f9eeca106725 534 #define SDIO_INIT_CLK_DIV ((uint8_t)0x76U)
Kojto 112:6f327212ef96 535
Kojto 112:6f327212ef96 536 /* SDIO Data Transfer Frequency (25MHz max) */
Kojto 122:f9eeca106725 537 #define SDIO_TRANSFER_CLK_DIV ((uint8_t)0x00U)
Kojto 112:6f327212ef96 538 /**
Kojto 112:6f327212ef96 539 * @}
Kojto 112:6f327212ef96 540 */
Kojto 112:6f327212ef96 541
Kojto 112:6f327212ef96 542 /** @defgroup SDMMC_LL_Interrupt_Clock Interrupt And Clock Configuration
Kojto 112:6f327212ef96 543 * @brief macros to handle interrupts and specific clock configurations
Kojto 112:6f327212ef96 544 * @{
Kojto 112:6f327212ef96 545 */
Kojto 112:6f327212ef96 546
Kojto 112:6f327212ef96 547 /**
Kojto 112:6f327212ef96 548 * @brief Enable the SDIO device.
Kojto 112:6f327212ef96 549 * @retval None
Kojto 112:6f327212ef96 550 */
Kojto 112:6f327212ef96 551 #define __SDIO_ENABLE() (*(__IO uint32_t *)CLKCR_CLKEN_BB = ENABLE)
Kojto 112:6f327212ef96 552
Kojto 112:6f327212ef96 553 /**
Kojto 112:6f327212ef96 554 * @brief Disable the SDIO device.
Kojto 112:6f327212ef96 555 * @retval None
Kojto 112:6f327212ef96 556 */
Kojto 112:6f327212ef96 557 #define __SDIO_DISABLE() (*(__IO uint32_t *)CLKCR_CLKEN_BB = DISABLE)
Kojto 112:6f327212ef96 558
Kojto 112:6f327212ef96 559 /**
Kojto 112:6f327212ef96 560 * @brief Enable the SDIO DMA transfer.
Kojto 112:6f327212ef96 561 * @retval None
Kojto 112:6f327212ef96 562 */
Kojto 112:6f327212ef96 563 #define __SDIO_DMA_ENABLE() (*(__IO uint32_t *)DCTRL_DMAEN_BB = ENABLE)
Kojto 112:6f327212ef96 564
Kojto 112:6f327212ef96 565 /**
Kojto 112:6f327212ef96 566 * @brief Disable the SDIO DMA transfer.
Kojto 112:6f327212ef96 567 * @retval None
Kojto 112:6f327212ef96 568 */
Kojto 112:6f327212ef96 569 #define __SDIO_DMA_DISABLE() (*(__IO uint32_t *)DCTRL_DMAEN_BB = DISABLE)
Kojto 112:6f327212ef96 570
Kojto 112:6f327212ef96 571 /**
Kojto 112:6f327212ef96 572 * @brief Enable the SDIO device interrupt.
Kojto 112:6f327212ef96 573 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 112:6f327212ef96 574 * @param __INTERRUPT__ : specifies the SDIO interrupt sources to be enabled.
Kojto 112:6f327212ef96 575 * This parameter can be one or a combination of the following values:
Kojto 112:6f327212ef96 576 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
Kojto 112:6f327212ef96 577 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
Kojto 112:6f327212ef96 578 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
Kojto 112:6f327212ef96 579 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
Kojto 112:6f327212ef96 580 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
Kojto 112:6f327212ef96 581 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
Kojto 112:6f327212ef96 582 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
Kojto 112:6f327212ef96 583 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
Kojto 112:6f327212ef96 584 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
Kojto 112:6f327212ef96 585 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
Kojto 112:6f327212ef96 586 * bus mode interrupt
Kojto 112:6f327212ef96 587 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
Kojto 112:6f327212ef96 588 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
Kojto 112:6f327212ef96 589 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
Kojto 112:6f327212ef96 590 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
Kojto 112:6f327212ef96 591 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
Kojto 112:6f327212ef96 592 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
Kojto 112:6f327212ef96 593 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
Kojto 112:6f327212ef96 594 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
Kojto 112:6f327212ef96 595 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
Kojto 112:6f327212ef96 596 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
Kojto 112:6f327212ef96 597 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
Kojto 112:6f327212ef96 598 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
Kojto 112:6f327212ef96 599 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
Kojto 112:6f327212ef96 600 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
Kojto 112:6f327212ef96 601 * @retval None
Kojto 112:6f327212ef96 602 */
Kojto 112:6f327212ef96 603 #define __SDIO_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK |= (__INTERRUPT__))
Kojto 112:6f327212ef96 604
Kojto 112:6f327212ef96 605 /**
Kojto 112:6f327212ef96 606 * @brief Disable the SDIO device interrupt.
Kojto 112:6f327212ef96 607 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 112:6f327212ef96 608 * @param __INTERRUPT__ : specifies the SDIO interrupt sources to be disabled.
Kojto 112:6f327212ef96 609 * This parameter can be one or a combination of the following values:
Kojto 112:6f327212ef96 610 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
Kojto 112:6f327212ef96 611 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
Kojto 112:6f327212ef96 612 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
Kojto 112:6f327212ef96 613 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
Kojto 112:6f327212ef96 614 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
Kojto 112:6f327212ef96 615 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
Kojto 112:6f327212ef96 616 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
Kojto 112:6f327212ef96 617 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
Kojto 112:6f327212ef96 618 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
Kojto 112:6f327212ef96 619 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
Kojto 112:6f327212ef96 620 * bus mode interrupt
Kojto 112:6f327212ef96 621 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
Kojto 112:6f327212ef96 622 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
Kojto 112:6f327212ef96 623 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
Kojto 112:6f327212ef96 624 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
Kojto 112:6f327212ef96 625 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
Kojto 112:6f327212ef96 626 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
Kojto 112:6f327212ef96 627 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
Kojto 112:6f327212ef96 628 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
Kojto 112:6f327212ef96 629 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
Kojto 112:6f327212ef96 630 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
Kojto 112:6f327212ef96 631 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
Kojto 112:6f327212ef96 632 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
Kojto 112:6f327212ef96 633 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
Kojto 112:6f327212ef96 634 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
Kojto 112:6f327212ef96 635 * @retval None
Kojto 112:6f327212ef96 636 */
Kojto 112:6f327212ef96 637 #define __SDIO_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK &= ~(__INTERRUPT__))
Kojto 112:6f327212ef96 638
Kojto 112:6f327212ef96 639 /**
Kojto 112:6f327212ef96 640 * @brief Checks whether the specified SDIO flag is set or not.
Kojto 112:6f327212ef96 641 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 112:6f327212ef96 642 * @param __FLAG__: specifies the flag to check.
Kojto 112:6f327212ef96 643 * This parameter can be one of the following values:
Kojto 112:6f327212ef96 644 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
Kojto 112:6f327212ef96 645 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
Kojto 112:6f327212ef96 646 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
Kojto 112:6f327212ef96 647 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
Kojto 112:6f327212ef96 648 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
Kojto 112:6f327212ef96 649 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
Kojto 112:6f327212ef96 650 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
Kojto 112:6f327212ef96 651 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
Kojto 112:6f327212ef96 652 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
Kojto 112:6f327212ef96 653 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
Kojto 112:6f327212ef96 654 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
Kojto 112:6f327212ef96 655 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
Kojto 112:6f327212ef96 656 * @arg SDIO_FLAG_TXACT: Data transmit in progress
Kojto 112:6f327212ef96 657 * @arg SDIO_FLAG_RXACT: Data receive in progress
Kojto 112:6f327212ef96 658 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
Kojto 112:6f327212ef96 659 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
Kojto 112:6f327212ef96 660 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
Kojto 112:6f327212ef96 661 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
Kojto 112:6f327212ef96 662 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
Kojto 112:6f327212ef96 663 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
Kojto 112:6f327212ef96 664 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
Kojto 112:6f327212ef96 665 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
Kojto 112:6f327212ef96 666 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
Kojto 112:6f327212ef96 667 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
Kojto 112:6f327212ef96 668 * @retval The new state of SDIO_FLAG (SET or RESET).
Kojto 112:6f327212ef96 669 */
Kojto 112:6f327212ef96 670 #define __SDIO_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->STA &(__FLAG__)) != RESET)
Kojto 112:6f327212ef96 671
Kojto 112:6f327212ef96 672
Kojto 112:6f327212ef96 673 /**
Kojto 112:6f327212ef96 674 * @brief Clears the SDIO pending flags.
Kojto 112:6f327212ef96 675 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 112:6f327212ef96 676 * @param __FLAG__: specifies the flag to clear.
Kojto 112:6f327212ef96 677 * This parameter can be one or a combination of the following values:
Kojto 112:6f327212ef96 678 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
Kojto 112:6f327212ef96 679 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
Kojto 112:6f327212ef96 680 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
Kojto 112:6f327212ef96 681 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
Kojto 112:6f327212ef96 682 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
Kojto 112:6f327212ef96 683 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
Kojto 112:6f327212ef96 684 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
Kojto 112:6f327212ef96 685 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
Kojto 112:6f327212ef96 686 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
Kojto 112:6f327212ef96 687 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
Kojto 112:6f327212ef96 688 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
Kojto 112:6f327212ef96 689 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
Kojto 112:6f327212ef96 690 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
Kojto 112:6f327212ef96 691 * @retval None
Kojto 112:6f327212ef96 692 */
Kojto 112:6f327212ef96 693 #define __SDIO_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->ICR = (__FLAG__))
Kojto 112:6f327212ef96 694
Kojto 112:6f327212ef96 695 /**
Kojto 112:6f327212ef96 696 * @brief Checks whether the specified SDIO interrupt has occurred or not.
Kojto 112:6f327212ef96 697 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 112:6f327212ef96 698 * @param __INTERRUPT__: specifies the SDIO interrupt source to check.
Kojto 112:6f327212ef96 699 * This parameter can be one of the following values:
Kojto 112:6f327212ef96 700 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
Kojto 112:6f327212ef96 701 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
Kojto 112:6f327212ef96 702 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
Kojto 112:6f327212ef96 703 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
Kojto 112:6f327212ef96 704 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
Kojto 112:6f327212ef96 705 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
Kojto 112:6f327212ef96 706 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
Kojto 112:6f327212ef96 707 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
Kojto 112:6f327212ef96 708 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
Kojto 112:6f327212ef96 709 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
Kojto 112:6f327212ef96 710 * bus mode interrupt
Kojto 112:6f327212ef96 711 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
Kojto 112:6f327212ef96 712 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
Kojto 112:6f327212ef96 713 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
Kojto 112:6f327212ef96 714 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
Kojto 112:6f327212ef96 715 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
Kojto 112:6f327212ef96 716 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
Kojto 112:6f327212ef96 717 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
Kojto 112:6f327212ef96 718 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
Kojto 112:6f327212ef96 719 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
Kojto 112:6f327212ef96 720 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
Kojto 112:6f327212ef96 721 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
Kojto 112:6f327212ef96 722 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
Kojto 112:6f327212ef96 723 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
Kojto 112:6f327212ef96 724 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
Kojto 112:6f327212ef96 725 * @retval The new state of SDIO_IT (SET or RESET).
Kojto 112:6f327212ef96 726 */
Kojto 112:6f327212ef96 727 #define __SDIO_GET_IT (__INSTANCE__, __INTERRUPT__) (((__INSTANCE__)->STA &(__INTERRUPT__)) == (__INTERRUPT__))
Kojto 112:6f327212ef96 728
Kojto 112:6f327212ef96 729 /**
Kojto 112:6f327212ef96 730 * @brief Clears the SDIO's interrupt pending bits.
Kojto 112:6f327212ef96 731 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 112:6f327212ef96 732 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
Kojto 112:6f327212ef96 733 * This parameter can be one or a combination of the following values:
Kojto 112:6f327212ef96 734 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
Kojto 112:6f327212ef96 735 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
Kojto 112:6f327212ef96 736 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
Kojto 112:6f327212ef96 737 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
Kojto 112:6f327212ef96 738 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
Kojto 112:6f327212ef96 739 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
Kojto 112:6f327212ef96 740 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
Kojto 112:6f327212ef96 741 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
Kojto 112:6f327212ef96 742 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
Kojto 112:6f327212ef96 743 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
Kojto 112:6f327212ef96 744 * bus mode interrupt
Kojto 112:6f327212ef96 745 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
Kojto 112:6f327212ef96 746 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
Kojto 112:6f327212ef96 747 * @retval None
Kojto 112:6f327212ef96 748 */
Kojto 112:6f327212ef96 749 #define __SDIO_CLEAR_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->ICR = (__INTERRUPT__))
Kojto 112:6f327212ef96 750
Kojto 112:6f327212ef96 751 /**
Kojto 112:6f327212ef96 752 * @brief Enable Start the SD I/O Read Wait operation.
Kojto 112:6f327212ef96 753 * @retval None
Kojto 112:6f327212ef96 754 */
Kojto 112:6f327212ef96 755 #define __SDIO_START_READWAIT_ENABLE() (*(__IO uint32_t *) DCTRL_RWSTART_BB = ENABLE)
Kojto 112:6f327212ef96 756
Kojto 112:6f327212ef96 757 /**
Kojto 112:6f327212ef96 758 * @brief Disable Start the SD I/O Read Wait operations.
Kojto 112:6f327212ef96 759 * @retval None
Kojto 112:6f327212ef96 760 */
Kojto 112:6f327212ef96 761 #define __SDIO_START_READWAIT_DISABLE() (*(__IO uint32_t *) DCTRL_RWSTART_BB = DISABLE)
Kojto 112:6f327212ef96 762
Kojto 112:6f327212ef96 763 /**
Kojto 112:6f327212ef96 764 * @brief Enable Start the SD I/O Read Wait operation.
Kojto 112:6f327212ef96 765 * @retval None
Kojto 112:6f327212ef96 766 */
Kojto 112:6f327212ef96 767 #define __SDIO_STOP_READWAIT_ENABLE() (*(__IO uint32_t *) DCTRL_RWSTOP_BB = ENABLE)
Kojto 112:6f327212ef96 768
Kojto 112:6f327212ef96 769 /**
Kojto 112:6f327212ef96 770 * @brief Disable Stop the SD I/O Read Wait operations.
Kojto 112:6f327212ef96 771 * @retval None
Kojto 112:6f327212ef96 772 */
Kojto 112:6f327212ef96 773 #define __SDIO_STOP_READWAIT_DISABLE() (*(__IO uint32_t *) DCTRL_RWSTOP_BB = DISABLE)
Kojto 112:6f327212ef96 774
Kojto 112:6f327212ef96 775 /**
Kojto 112:6f327212ef96 776 * @brief Enable the SD I/O Mode Operation.
Kojto 112:6f327212ef96 777 * @retval None
Kojto 112:6f327212ef96 778 */
Kojto 112:6f327212ef96 779 #define __SDIO_OPERATION_ENABLE() (*(__IO uint32_t *) DCTRL_SDIOEN_BB = ENABLE)
Kojto 112:6f327212ef96 780
Kojto 112:6f327212ef96 781 /**
Kojto 112:6f327212ef96 782 * @brief Disable the SD I/O Mode Operation.
Kojto 112:6f327212ef96 783 * @retval None
Kojto 112:6f327212ef96 784 */
Kojto 112:6f327212ef96 785 #define __SDIO_OPERATION_DISABLE() (*(__IO uint32_t *) DCTRL_SDIOEN_BB = DISABLE)
Kojto 112:6f327212ef96 786
Kojto 112:6f327212ef96 787 /**
Kojto 112:6f327212ef96 788 * @brief Enable the SD I/O Suspend command sending.
Kojto 112:6f327212ef96 789 * @retval None
Kojto 112:6f327212ef96 790 */
Kojto 112:6f327212ef96 791 #define __SDIO_SUSPEND_CMD_ENABLE() (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = ENABLE)
Kojto 112:6f327212ef96 792
Kojto 112:6f327212ef96 793 /**
Kojto 112:6f327212ef96 794 * @brief Disable the SD I/O Suspend command sending.
Kojto 112:6f327212ef96 795 * @retval None
Kojto 112:6f327212ef96 796 */
Kojto 112:6f327212ef96 797 #define __SDIO_SUSPEND_CMD_DISABLE() (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = DISABLE)
Kojto 112:6f327212ef96 798
Kojto 112:6f327212ef96 799 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
Kojto 112:6f327212ef96 800 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 122:f9eeca106725 801 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F412Zx) ||\
Kojto 122:f9eeca106725 802 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
Kojto 112:6f327212ef96 803 /**
Kojto 112:6f327212ef96 804 * @brief Enable the command completion signal.
Kojto 112:6f327212ef96 805 * @retval None
Kojto 112:6f327212ef96 806 */
Kojto 112:6f327212ef96 807 #define __SDIO_CEATA_CMD_COMPLETION_ENABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = ENABLE)
Kojto 112:6f327212ef96 808
Kojto 112:6f327212ef96 809 /**
Kojto 112:6f327212ef96 810 * @brief Disable the command completion signal.
Kojto 112:6f327212ef96 811 * @retval None
Kojto 112:6f327212ef96 812 */
Kojto 112:6f327212ef96 813 #define __SDIO_CEATA_CMD_COMPLETION_DISABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = DISABLE)
Kojto 112:6f327212ef96 814
Kojto 112:6f327212ef96 815 /**
Kojto 112:6f327212ef96 816 * @brief Enable the CE-ATA interrupt.
Kojto 112:6f327212ef96 817 * @retval None
Kojto 112:6f327212ef96 818 */
Kojto 122:f9eeca106725 819 #define __SDIO_CEATA_ENABLE_IT() (*(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)0U)
Kojto 112:6f327212ef96 820
Kojto 112:6f327212ef96 821 /**
Kojto 112:6f327212ef96 822 * @brief Disable the CE-ATA interrupt.
Kojto 112:6f327212ef96 823 * @retval None
Kojto 112:6f327212ef96 824 */
Kojto 122:f9eeca106725 825 #define __SDIO_CEATA_DISABLE_IT() (*(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)1U)
Kojto 112:6f327212ef96 826
Kojto 112:6f327212ef96 827 /**
Kojto 112:6f327212ef96 828 * @brief Enable send CE-ATA command (CMD61).
Kojto 112:6f327212ef96 829 * @retval None
Kojto 112:6f327212ef96 830 */
Kojto 112:6f327212ef96 831 #define __SDIO_CEATA_SENDCMD_ENABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = ENABLE)
Kojto 112:6f327212ef96 832
Kojto 112:6f327212ef96 833 /**
Kojto 112:6f327212ef96 834 * @brief Disable send CE-ATA command (CMD61).
Kojto 112:6f327212ef96 835 * @retval None
Kojto 112:6f327212ef96 836 */
Kojto 112:6f327212ef96 837 #define __SDIO_CEATA_SENDCMD_DISABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = DISABLE)
Kojto 112:6f327212ef96 838 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE ||\
Kojto 122:f9eeca106725 839 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F412Zx || STM32F412Vx || STM32F412Rx ||\
Kojto 122:f9eeca106725 840 STM32F412Cx */
Kojto 112:6f327212ef96 841 /**
Kojto 112:6f327212ef96 842 * @}
Kojto 112:6f327212ef96 843 */
Kojto 112:6f327212ef96 844
Kojto 112:6f327212ef96 845 /**
Kojto 112:6f327212ef96 846 * @}
Kojto 112:6f327212ef96 847 */
Kojto 112:6f327212ef96 848
Kojto 112:6f327212ef96 849 /* Exported functions --------------------------------------------------------*/
Kojto 112:6f327212ef96 850 /** @addtogroup SDMMC_LL_Exported_Functions
Kojto 112:6f327212ef96 851 * @{
Kojto 112:6f327212ef96 852 */
Kojto 112:6f327212ef96 853
Kojto 112:6f327212ef96 854 /* Initialization/de-initialization functions **********************************/
Kojto 112:6f327212ef96 855 /** @addtogroup HAL_SDMMC_LL_Group1
Kojto 112:6f327212ef96 856 * @{
Kojto 112:6f327212ef96 857 */
Kojto 112:6f327212ef96 858 HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init);
Kojto 112:6f327212ef96 859 /**
Kojto 112:6f327212ef96 860 * @}
Kojto 112:6f327212ef96 861 */
Kojto 112:6f327212ef96 862
Kojto 112:6f327212ef96 863 /* I/O operation functions *****************************************************/
Kojto 112:6f327212ef96 864 /** @addtogroup HAL_SDMMC_LL_Group2
Kojto 112:6f327212ef96 865 * @{
Kojto 112:6f327212ef96 866 */
Kojto 112:6f327212ef96 867 /* Blocking mode: Polling */
Kojto 112:6f327212ef96 868 uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx);
Kojto 112:6f327212ef96 869 HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData);
Kojto 112:6f327212ef96 870 /**
Kojto 112:6f327212ef96 871 * @}
Kojto 112:6f327212ef96 872 */
Kojto 112:6f327212ef96 873
Kojto 112:6f327212ef96 874 /* Peripheral Control functions ************************************************/
Kojto 112:6f327212ef96 875 /** @addtogroup HAL_SDMMC_LL_Group3
Kojto 112:6f327212ef96 876 * @{
Kojto 112:6f327212ef96 877 */
Kojto 112:6f327212ef96 878 HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx);
Kojto 112:6f327212ef96 879 HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx);
Kojto 112:6f327212ef96 880 uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx);
Kojto 112:6f327212ef96 881
Kojto 112:6f327212ef96 882 /* Command path state machine (CPSM) management functions */
Kojto 112:6f327212ef96 883 HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *SDIO_CmdInitStruct);
Kojto 112:6f327212ef96 884 uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx);
Kojto 112:6f327212ef96 885 uint32_t SDIO_GetResponse(uint32_t SDIO_RESP);
Kojto 112:6f327212ef96 886
Kojto 112:6f327212ef96 887 /* Data path state machine (DPSM) management functions */
Kojto 112:6f327212ef96 888 HAL_StatusTypeDef SDIO_DataConfig(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* SDIO_DataInitStruct);
Kojto 112:6f327212ef96 889 uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx);
Kojto 112:6f327212ef96 890 uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx);
Kojto 112:6f327212ef96 891
Kojto 112:6f327212ef96 892 /* SDIO IO Cards mode management functions */
Kojto 112:6f327212ef96 893 HAL_StatusTypeDef SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode);
Kojto 112:6f327212ef96 894
Kojto 112:6f327212ef96 895 /**
Kojto 112:6f327212ef96 896 * @}
Kojto 112:6f327212ef96 897 */
Kojto 112:6f327212ef96 898
Kojto 112:6f327212ef96 899 /**
Kojto 112:6f327212ef96 900 * @}
Kojto 112:6f327212ef96 901 */
Kojto 112:6f327212ef96 902
Kojto 112:6f327212ef96 903 /**
Kojto 112:6f327212ef96 904 * @}
Kojto 112:6f327212ef96 905 */
Kojto 112:6f327212ef96 906
Kojto 112:6f327212ef96 907 /**
Kojto 112:6f327212ef96 908 * @}
Kojto 112:6f327212ef96 909 */
Kojto 112:6f327212ef96 910 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
Kojto 122:f9eeca106725 911 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx ||
Kojto 122:f9eeca106725 912 STM32F412Rx || STM32F412Cx */
Kojto 112:6f327212ef96 913 #ifdef __cplusplus
Kojto 112:6f327212ef96 914 }
Kojto 112:6f327212ef96 915 #endif
Kojto 112:6f327212ef96 916
Kojto 112:6f327212ef96 917 #endif /* __STM32F4xx_LL_SDMMC_H */
Kojto 112:6f327212ef96 918
Kojto 112:6f327212ef96 919 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/