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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_ARCH_MAX/stm32f4xx_hal_adc.h@122:f9eeca106725, 2016-07-07 (annotated)

Committer:
Kojto
Date:
Thu Jul 07 14:34:11 2016 +0100
Revision:
122:f9eeca106725
Parent:
110:165afa46840b 
Release 122 of the mbed library



Changes:

- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4

- Thread safety addition - mbed API should contain a statement about thread safety

- critical section API addition

- CAS API (core_util_atomic_incr/decr)

- DEVICE_ are generated from targets.json file, device.h deprecated

- Callback replaces FunctionPointer to provide std like interface

- mbed HAL API docs improvements

- toolchain - prexif attributes with MBED_

            - add new attributes - packed, weak, forcedinline, align

- target.json - contains targets definitions

- ST - L1XX - Cube update to 1.5

     - SPI clock selection fix (clock from APB domain)

     - F7 - Cube update v1.4.0

     - L0 -  baudrate init fix

     - L1 - Cube update v1.5

     - F3 - baudrate init fix, 3 targets CAN support

     - F4 - Cube update v1.12.0, 3 targets CAN support

     - L4XX - Cube update v1.5.1

     - F0 - update Cube to v1.5.0

     - L4 - 2 targets (L476RG/VG) CAN support

- NXP - pwm clock fix for KSDK2 MCU

      - LPC2368 - remove ARM toolchain support - due to regression

      - KSDK2 - fix SPI , I2C address and repeat start

- Silabs - some fixes backported from mbed 3

- Renesas - RZ_A1H - SystemCoreClockUpdate addition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 89:552587b429a1 1 /**
bogdanm 89:552587b429a1 2 ******************************************************************************
bogdanm 89:552587b429a1 3 * @file stm32f4xx_hal_adc.h
bogdanm 89:552587b429a1 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.5.0
Kojto 122:f9eeca106725 6 * @date 06-May-2016
Kojto 110:165afa46840b 7 * @brief Header file containing functions prototypes of ADC HAL library.
bogdanm 89:552587b429a1 8 ******************************************************************************
bogdanm 89:552587b429a1 9 * @attention
bogdanm 89:552587b429a1 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm 89:552587b429a1 12 *
bogdanm 89:552587b429a1 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 89:552587b429a1 14 * are permitted provided that the following conditions are met:
bogdanm 89:552587b429a1 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 89:552587b429a1 16 * this list of conditions and the following disclaimer.
bogdanm 89:552587b429a1 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 89:552587b429a1 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 89:552587b429a1 19 * and/or other materials provided with the distribution.
bogdanm 89:552587b429a1 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 89:552587b429a1 21 * may be used to endorse or promote products derived from this software
bogdanm 89:552587b429a1 22 * without specific prior written permission.
bogdanm 89:552587b429a1 23 *
bogdanm 89:552587b429a1 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 89:552587b429a1 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 89:552587b429a1 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 89:552587b429a1 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 89:552587b429a1 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 89:552587b429a1 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 89:552587b429a1 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 89:552587b429a1 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 89:552587b429a1 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 89:552587b429a1 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 89:552587b429a1 34 *
bogdanm 89:552587b429a1 35 ******************************************************************************
bogdanm 89:552587b429a1 36 */
bogdanm 89:552587b429a1 37
bogdanm 89:552587b429a1 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 89:552587b429a1 39 #ifndef __STM32F4xx_ADC_H
bogdanm 89:552587b429a1 40 #define __STM32F4xx_ADC_H
bogdanm 89:552587b429a1 41
bogdanm 89:552587b429a1 42 #ifdef __cplusplus
bogdanm 89:552587b429a1 43 extern "C" {
bogdanm 89:552587b429a1 44 #endif
bogdanm 89:552587b429a1 45
bogdanm 89:552587b429a1 46 /* Includes ------------------------------------------------------------------*/
bogdanm 89:552587b429a1 47 #include "stm32f4xx_hal_def.h"
bogdanm 89:552587b429a1 48
bogdanm 89:552587b429a1 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 89:552587b429a1 50 * @{
bogdanm 89:552587b429a1 51 */
bogdanm 89:552587b429a1 52
bogdanm 89:552587b429a1 53 /** @addtogroup ADC
bogdanm 89:552587b429a1 54 * @{
bogdanm 89:552587b429a1 55 */
bogdanm 89:552587b429a1 56
bogdanm 89:552587b429a1 57 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 58 /** @defgroup ADC_Exported_Types ADC Exported Types
Kojto 99:dbbf35b96557 59 * @{
Kojto 99:dbbf35b96557 60 */
bogdanm 89:552587b429a1 61
bogdanm 89:552587b429a1 62 /**
Kojto 122:f9eeca106725 63 * @brief Structure definition of ADC and regular group initialization
Kojto 122:f9eeca106725 64 * @note Parameters of this structure are shared within 2 scopes:
Kojto 122:f9eeca106725 65 * - Scope entire ADC (affects regular and injected groups): ClockPrescaler, Resolution, ScanConvMode, DataAlign, ScanConvMode, EOCSelection, LowPowerAutoWait, LowPowerAutoPowerOff, ChannelsBank.
Kojto 122:f9eeca106725 66 * - Scope regular group: ContinuousConvMode, NbrOfConversion, DiscontinuousConvMode, NbrOfDiscConversion, ExternalTrigConvEdge, ExternalTrigConv.
Kojto 122:f9eeca106725 67 * @note The setting of these parameters with function HAL_ADC_Init() is conditioned to ADC state.
Kojto 122:f9eeca106725 68 * ADC state can be either:
Kojto 122:f9eeca106725 69 * - For all parameters: ADC disabled
Kojto 122:f9eeca106725 70 * - For all parameters except 'Resolution', 'ScanConvMode', 'DiscontinuousConvMode', 'NbrOfDiscConversion' : ADC enabled without conversion on going on regular group.
Kojto 122:f9eeca106725 71 * - For parameters 'ExternalTrigConv' and 'ExternalTrigConvEdge': ADC enabled, even with conversion on going.
Kojto 122:f9eeca106725 72 * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
Kojto 122:f9eeca106725 73 * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly).
Kojto 122:f9eeca106725 74 */
bogdanm 89:552587b429a1 75 typedef struct
bogdanm 89:552587b429a1 76 {
Kojto 122:f9eeca106725 77 uint32_t ClockPrescaler; /*!< Select ADC clock prescaler. The clock is common for
bogdanm 89:552587b429a1 78 all the ADCs.
bogdanm 89:552587b429a1 79 This parameter can be a value of @ref ADC_ClockPrescaler */
Kojto 122:f9eeca106725 80 uint32_t Resolution; /*!< Configures the ADC resolution.
bogdanm 89:552587b429a1 81 This parameter can be a value of @ref ADC_Resolution */
Kojto 122:f9eeca106725 82 uint32_t DataAlign; /*!< Specifies ADC data alignment to right (MSB on register bit 11 and LSB on register bit 0) (default setting)
Kojto 122:f9eeca106725 83 or to left (if regular group: MSB on register bit 15 and LSB on register bit 4, if injected group (MSB kept as signed value due to potential negative value after offset application): MSB on register bit 14 and LSB on register bit 3).
Kojto 122:f9eeca106725 84 This parameter can be a value of @ref ADC_Data_align */
Kojto 122:f9eeca106725 85 uint32_t ScanConvMode; /*!< Configures the sequencer of regular and injected groups.
Kojto 122:f9eeca106725 86 This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts.
Kojto 122:f9eeca106725 87 If disabled: Conversion is performed in single mode (one channel converted, the one defined in rank 1).
Kojto 122:f9eeca106725 88 Parameters 'NbrOfConversion' and 'InjectedNbrOfConversion' are discarded (equivalent to set to 1).
Kojto 122:f9eeca106725 89 If enabled: Conversions are performed in sequence mode (multiple ranks defined by 'NbrOfConversion'/'InjectedNbrOfConversion' and each channel rank).
Kojto 122:f9eeca106725 90 Scan direction is upward: from rank1 to rank 'n'.
Kojto 122:f9eeca106725 91 This parameter can be set to ENABLE or DISABLE */
Kojto 122:f9eeca106725 92 uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion by polling and interruption: end of conversion of each rank or complete sequence.
Kojto 122:f9eeca106725 93 This parameter can be a value of @ref ADC_EOCSelection.
Kojto 122:f9eeca106725 94 Note: For injected group, end of conversion (flag&IT) is raised only at the end of the sequence.
Kojto 122:f9eeca106725 95 Therefore, if end of conversion is set to end of each conversion, injected group should not be used with interruption (HAL_ADCEx_InjectedStart_IT)
Kojto 122:f9eeca106725 96 or polling (HAL_ADCEx_InjectedStart and HAL_ADCEx_InjectedPollForConversion). By the way, polling is still possible since driver will use an estimated timing for end of injected conversion.
Kojto 122:f9eeca106725 97 Note: If overrun feature is intended to be used, use ADC in mode 'interruption' (function HAL_ADC_Start_IT() ) with parameter EOCSelection set to end of each conversion or in mode 'transfer by DMA' (function HAL_ADC_Start_DMA()).
Kojto 122:f9eeca106725 98 If overrun feature is intended to be bypassed, use ADC in mode 'polling' or 'interruption' with parameter EOCSelection must be set to end of sequence */
Kojto 122:f9eeca106725 99 uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
Kojto 122:f9eeca106725 100 after the selected trigger occurred (software start or external trigger).
bogdanm 89:552587b429a1 101 This parameter can be set to ENABLE or DISABLE. */
Kojto 122:f9eeca106725 102 uint32_t NbrOfConversion; /*!< Specifies the number of ranks that will be converted within the regular group sequencer.
Kojto 122:f9eeca106725 103 To use regular group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
bogdanm 89:552587b429a1 104 This parameter must be a number between Min_Data = 1 and Max_Data = 16. */
Kojto 122:f9eeca106725 105 uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
Kojto 122:f9eeca106725 106 Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
Kojto 122:f9eeca106725 107 Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
bogdanm 89:552587b429a1 108 This parameter can be set to ENABLE or DISABLE. */
Kojto 122:f9eeca106725 109 uint32_t NbrOfDiscConversion; /*!< Specifies the number of discontinuous conversions in which the main sequence of regular group (parameter NbrOfConversion) will be subdivided.
Kojto 122:f9eeca106725 110 If parameter 'DiscontinuousConvMode' is disabled, this parameter is discarded.
bogdanm 89:552587b429a1 111 This parameter must be a number between Min_Data = 1 and Max_Data = 8. */
Kojto 99:dbbf35b96557 112 uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group.
Kojto 99:dbbf35b96557 113 If set to ADC_SOFTWARE_START, external triggers are disabled.
Kojto 122:f9eeca106725 114 If set to external trigger source, triggering is on event rising edge by default.
Kojto 122:f9eeca106725 115 This parameter can be a value of @ref ADC_External_trigger_Source_Regular */
Kojto 99:dbbf35b96557 116 uint32_t ExternalTrigConvEdge; /*!< Selects the external trigger edge of regular group.
Kojto 99:dbbf35b96557 117 If trigger is set to ADC_SOFTWARE_START, this parameter is discarded.
Kojto 122:f9eeca106725 118 This parameter can be a value of @ref ADC_External_trigger_edge_Regular */
Kojto 122:f9eeca106725 119 uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
Kojto 122:f9eeca106725 120 or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
Kojto 122:f9eeca106725 121 Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached.
Kojto 122:f9eeca106725 122 Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled without continuous mode or external trigger that could launch a conversion).
Kojto 122:f9eeca106725 123 This parameter can be set to ENABLE or DISABLE. */
bogdanm 89:552587b429a1 124 }ADC_InitTypeDef;
bogdanm 89:552587b429a1 125
Kojto 122:f9eeca106725 126
Kojto 122:f9eeca106725 127
bogdanm 89:552587b429a1 128 /**
Kojto 122:f9eeca106725 129 * @brief Structure definition of ADC channel for regular group
Kojto 122:f9eeca106725 130 * @note The setting of these parameters with function HAL_ADC_ConfigChannel() is conditioned to ADC state.
Kojto 122:f9eeca106725 131 * ADC can be either disabled or enabled without conversion on going on regular group.
bogdanm 89:552587b429a1 132 */
bogdanm 89:552587b429a1 133 typedef struct
bogdanm 89:552587b429a1 134 {
Kojto 122:f9eeca106725 135 uint32_t Channel; /*!< Specifies the channel to configure into ADC regular group.
Kojto 122:f9eeca106725 136 This parameter can be a value of @ref ADC_channels */
Kojto 122:f9eeca106725 137 uint32_t Rank; /*!< Specifies the rank in the regular group sequencer.
Kojto 122:f9eeca106725 138 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */
Kojto 122:f9eeca106725 139 uint32_t SamplingTime; /*!< Sampling time value to be set for the selected channel.
Kojto 122:f9eeca106725 140 Unit: ADC clock cycles
Kojto 122:f9eeca106725 141 Conversion time is the addition of sampling time and processing time (12 ADC clock cycles at ADC resolution 12 bits, 11 cycles at 10 bits, 9 cycles at 8 bits, 7 cycles at 6 bits).
Kojto 122:f9eeca106725 142 This parameter can be a value of @ref ADC_sampling_times
Kojto 122:f9eeca106725 143 Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
Kojto 122:f9eeca106725 144 If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
Kojto 122:f9eeca106725 145 Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
Kojto 122:f9eeca106725 146 sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
Kojto 122:f9eeca106725 147 Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */
Kojto 122:f9eeca106725 148 uint32_t Offset; /*!< Reserved for future use, can be set to 0 */
bogdanm 89:552587b429a1 149 }ADC_ChannelConfTypeDef;
bogdanm 89:552587b429a1 150
bogdanm 89:552587b429a1 151 /**
Kojto 99:dbbf35b96557 152 * @brief ADC Configuration multi-mode structure definition
bogdanm 89:552587b429a1 153 */
bogdanm 89:552587b429a1 154 typedef struct
bogdanm 89:552587b429a1 155 {
bogdanm 89:552587b429a1 156 uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode.
bogdanm 89:552587b429a1 157 This parameter can be a value of @ref ADC_analog_watchdog_selection */
bogdanm 89:552587b429a1 158 uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
bogdanm 89:552587b429a1 159 This parameter must be a 12-bit value. */
bogdanm 89:552587b429a1 160 uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
bogdanm 89:552587b429a1 161 This parameter must be a 12-bit value. */
bogdanm 89:552587b429a1 162 uint32_t Channel; /*!< Configures ADC channel for the analog watchdog.
bogdanm 89:552587b429a1 163 This parameter has an effect only if watchdog mode is configured on single channel
bogdanm 89:552587b429a1 164 This parameter can be a value of @ref ADC_channels */
bogdanm 89:552587b429a1 165 uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured
bogdanm 89:552587b429a1 166 is interrupt mode or in polling mode.
bogdanm 89:552587b429a1 167 This parameter can be set to ENABLE or DISABLE */
bogdanm 89:552587b429a1 168 uint32_t WatchdogNumber; /*!< Reserved for future use, can be set to 0 */
bogdanm 89:552587b429a1 169 }ADC_AnalogWDGConfTypeDef;
Kojto 122:f9eeca106725 170
Kojto 122:f9eeca106725 171 /**
Kojto 122:f9eeca106725 172 * @brief HAL ADC state machine: ADC states definition (bitfields)
Kojto 122:f9eeca106725 173 */
Kojto 122:f9eeca106725 174 /* States of ADC global scope */
Kojto 122:f9eeca106725 175 #define HAL_ADC_STATE_RESET ((uint32_t)0x00000000U) /*!< ADC not yet initialized or disabled */
Kojto 122:f9eeca106725 176 #define HAL_ADC_STATE_READY ((uint32_t)0x00000001U) /*!< ADC peripheral ready for use */
Kojto 122:f9eeca106725 177 #define HAL_ADC_STATE_BUSY_INTERNAL ((uint32_t)0x00000002U) /*!< ADC is busy to internal process (initialization, calibration) */
Kojto 122:f9eeca106725 178 #define HAL_ADC_STATE_TIMEOUT ((uint32_t)0x00000004U) /*!< TimeOut occurrence */
Kojto 122:f9eeca106725 179
Kojto 122:f9eeca106725 180 /* States of ADC errors */
Kojto 122:f9eeca106725 181 #define HAL_ADC_STATE_ERROR_INTERNAL ((uint32_t)0x00000010U) /*!< Internal error occurrence */
Kojto 122:f9eeca106725 182 #define HAL_ADC_STATE_ERROR_CONFIG ((uint32_t)0x00000020U) /*!< Configuration error occurrence */
Kojto 122:f9eeca106725 183 #define HAL_ADC_STATE_ERROR_DMA ((uint32_t)0x00000040U) /*!< DMA error occurrence */
Kojto 122:f9eeca106725 184
Kojto 122:f9eeca106725 185 /* States of ADC group regular */
Kojto 122:f9eeca106725 186 #define HAL_ADC_STATE_REG_BUSY ((uint32_t)0x00000100U) /*!< A conversion on group regular is ongoing or can occur (either by continuous mode,
Kojto 122:f9eeca106725 187 external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available)) */
Kojto 122:f9eeca106725 188 #define HAL_ADC_STATE_REG_EOC ((uint32_t)0x00000200U) /*!< Conversion data available on group regular */
Kojto 122:f9eeca106725 189 #define HAL_ADC_STATE_REG_OVR ((uint32_t)0x00000400U) /*!< Overrun occurrence */
Kojto 122:f9eeca106725 190
Kojto 122:f9eeca106725 191 /* States of ADC group injected */
Kojto 122:f9eeca106725 192 #define HAL_ADC_STATE_INJ_BUSY ((uint32_t)0x00001000U) /*!< A conversion on group injected is ongoing or can occur (either by auto-injection mode,
Kojto 122:f9eeca106725 193 external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available)) */
Kojto 122:f9eeca106725 194 #define HAL_ADC_STATE_INJ_EOC ((uint32_t)0x00002000U) /*!< Conversion data available on group injected */
Kojto 122:f9eeca106725 195
Kojto 122:f9eeca106725 196 /* States of ADC analog watchdogs */
Kojto 122:f9eeca106725 197 #define HAL_ADC_STATE_AWD1 ((uint32_t)0x00010000U) /*!< Out-of-window occurrence of analog watchdog 1 */
Kojto 122:f9eeca106725 198 #define HAL_ADC_STATE_AWD2 ((uint32_t)0x00020000U) /*!< Not available on STM32F4 device: Out-of-window occurrence of analog watchdog 2 */
Kojto 122:f9eeca106725 199 #define HAL_ADC_STATE_AWD3 ((uint32_t)0x00040000U) /*!< Not available on STM32F4 device: Out-of-window occurrence of analog watchdog 3 */
Kojto 122:f9eeca106725 200
Kojto 122:f9eeca106725 201 /* States of ADC multi-mode */
Kojto 122:f9eeca106725 202 #define HAL_ADC_STATE_MULTIMODE_SLAVE ((uint32_t)0x00100000U) /*!< Not available on STM32F4 device: ADC in multimode slave state, controlled by another ADC master ( */
Kojto 122:f9eeca106725 203
Kojto 122:f9eeca106725 204
Kojto 122:f9eeca106725 205 /**
Kojto 122:f9eeca106725 206 * @brief ADC handle Structure definition
Kojto 122:f9eeca106725 207 */
Kojto 122:f9eeca106725 208 typedef struct
Kojto 122:f9eeca106725 209 {
Kojto 122:f9eeca106725 210 ADC_TypeDef *Instance; /*!< Register base address */
Kojto 122:f9eeca106725 211
Kojto 122:f9eeca106725 212 ADC_InitTypeDef Init; /*!< ADC required parameters */
Kojto 122:f9eeca106725 213
Kojto 122:f9eeca106725 214 __IO uint32_t NbrOfCurrentConversionRank; /*!< ADC number of current conversion rank */
Kojto 122:f9eeca106725 215
Kojto 122:f9eeca106725 216 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer DMA Handler */
Kojto 122:f9eeca106725 217
Kojto 122:f9eeca106725 218 HAL_LockTypeDef Lock; /*!< ADC locking object */
Kojto 122:f9eeca106725 219
Kojto 122:f9eeca106725 220 __IO uint32_t State; /*!< ADC communication state */
Kojto 122:f9eeca106725 221
Kojto 122:f9eeca106725 222 __IO uint32_t ErrorCode; /*!< ADC Error code */
Kojto 122:f9eeca106725 223 }ADC_HandleTypeDef;
Kojto 99:dbbf35b96557 224 /**
Kojto 99:dbbf35b96557 225 * @}
Kojto 99:dbbf35b96557 226 */
bogdanm 89:552587b429a1 227
bogdanm 89:552587b429a1 228 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 229 /** @defgroup ADC_Exported_Constants ADC Exported Constants
bogdanm 89:552587b429a1 230 * @{
bogdanm 89:552587b429a1 231 */
bogdanm 89:552587b429a1 232
Kojto 99:dbbf35b96557 233 /** @defgroup ADC_Error_Code ADC Error Code
bogdanm 89:552587b429a1 234 * @{
Kojto 99:dbbf35b96557 235 */
Kojto 122:f9eeca106725 236 #define HAL_ADC_ERROR_NONE ((uint32_t)0x00U) /*!< No error */
Kojto 122:f9eeca106725 237 #define HAL_ADC_ERROR_INTERNAL ((uint32_t)0x01U) /*!< ADC IP internal error: if problem of clocking,
Kojto 122:f9eeca106725 238 enable/disable, erroneous state */
Kojto 122:f9eeca106725 239 #define HAL_ADC_ERROR_OVR ((uint32_t)0x02U) /*!< Overrun error */
Kojto 122:f9eeca106725 240 #define HAL_ADC_ERROR_DMA ((uint32_t)0x04U) /*!< DMA transfer error */
bogdanm 89:552587b429a1 241 /**
bogdanm 89:552587b429a1 242 * @}
Kojto 122:f9eeca106725 243 */
bogdanm 89:552587b429a1 244
bogdanm 89:552587b429a1 245
Kojto 99:dbbf35b96557 246 /** @defgroup ADC_ClockPrescaler ADC Clock Prescaler
bogdanm 89:552587b429a1 247 * @{
bogdanm 89:552587b429a1 248 */
Kojto 122:f9eeca106725 249 #define ADC_CLOCK_SYNC_PCLK_DIV2 ((uint32_t)0x00000000U)
Kojto 110:165afa46840b 250 #define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CCR_ADCPRE_0)
Kojto 110:165afa46840b 251 #define ADC_CLOCK_SYNC_PCLK_DIV6 ((uint32_t)ADC_CCR_ADCPRE_1)
Kojto 110:165afa46840b 252 #define ADC_CLOCK_SYNC_PCLK_DIV8 ((uint32_t)ADC_CCR_ADCPRE)
bogdanm 89:552587b429a1 253 /**
bogdanm 89:552587b429a1 254 * @}
bogdanm 89:552587b429a1 255 */
bogdanm 89:552587b429a1 256
Kojto 99:dbbf35b96557 257 /** @defgroup ADC_delay_between_2_sampling_phases ADC Delay Between 2 Sampling Phases
bogdanm 92:4fc01daae5a5 258 * @{
bogdanm 92:4fc01daae5a5 259 */
Kojto 122:f9eeca106725 260 #define ADC_TWOSAMPLINGDELAY_5CYCLES ((uint32_t)0x00000000U)
bogdanm 92:4fc01daae5a5 261 #define ADC_TWOSAMPLINGDELAY_6CYCLES ((uint32_t)ADC_CCR_DELAY_0)
bogdanm 92:4fc01daae5a5 262 #define ADC_TWOSAMPLINGDELAY_7CYCLES ((uint32_t)ADC_CCR_DELAY_1)
bogdanm 92:4fc01daae5a5 263 #define ADC_TWOSAMPLINGDELAY_8CYCLES ((uint32_t)(ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
bogdanm 92:4fc01daae5a5 264 #define ADC_TWOSAMPLINGDELAY_9CYCLES ((uint32_t)ADC_CCR_DELAY_2)
bogdanm 92:4fc01daae5a5 265 #define ADC_TWOSAMPLINGDELAY_10CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_0))
bogdanm 92:4fc01daae5a5 266 #define ADC_TWOSAMPLINGDELAY_11CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1))
bogdanm 92:4fc01daae5a5 267 #define ADC_TWOSAMPLINGDELAY_12CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
bogdanm 92:4fc01daae5a5 268 #define ADC_TWOSAMPLINGDELAY_13CYCLES ((uint32_t)ADC_CCR_DELAY_3)
bogdanm 92:4fc01daae5a5 269 #define ADC_TWOSAMPLINGDELAY_14CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_0))
bogdanm 92:4fc01daae5a5 270 #define ADC_TWOSAMPLINGDELAY_15CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1))
bogdanm 92:4fc01daae5a5 271 #define ADC_TWOSAMPLINGDELAY_16CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
bogdanm 92:4fc01daae5a5 272 #define ADC_TWOSAMPLINGDELAY_17CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2))
bogdanm 92:4fc01daae5a5 273 #define ADC_TWOSAMPLINGDELAY_18CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2 | ADC_CCR_DELAY_0))
bogdanm 92:4fc01daae5a5 274 #define ADC_TWOSAMPLINGDELAY_19CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1))
bogdanm 92:4fc01daae5a5 275 #define ADC_TWOSAMPLINGDELAY_20CYCLES ((uint32_t)ADC_CCR_DELAY)
bogdanm 92:4fc01daae5a5 276 /**
bogdanm 92:4fc01daae5a5 277 * @}
bogdanm 92:4fc01daae5a5 278 */
bogdanm 92:4fc01daae5a5 279
Kojto 99:dbbf35b96557 280 /** @defgroup ADC_Resolution ADC Resolution
bogdanm 89:552587b429a1 281 * @{
bogdanm 89:552587b429a1 282 */
Kojto 122:f9eeca106725 283 #define ADC_RESOLUTION_12B ((uint32_t)0x00000000U)
Kojto 99:dbbf35b96557 284 #define ADC_RESOLUTION_10B ((uint32_t)ADC_CR1_RES_0)
Kojto 99:dbbf35b96557 285 #define ADC_RESOLUTION_8B ((uint32_t)ADC_CR1_RES_1)
Kojto 99:dbbf35b96557 286 #define ADC_RESOLUTION_6B ((uint32_t)ADC_CR1_RES)
bogdanm 89:552587b429a1 287 /**
bogdanm 89:552587b429a1 288 * @}
bogdanm 89:552587b429a1 289 */
bogdanm 89:552587b429a1 290
Kojto 99:dbbf35b96557 291 /** @defgroup ADC_External_trigger_edge_Regular ADC External Trigger Edge Regular
bogdanm 89:552587b429a1 292 * @{
bogdanm 89:552587b429a1 293 */
Kojto 122:f9eeca106725 294 #define ADC_EXTERNALTRIGCONVEDGE_NONE ((uint32_t)0x00000000U)
bogdanm 89:552587b429a1 295 #define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CR2_EXTEN_0)
bogdanm 89:552587b429a1 296 #define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CR2_EXTEN_1)
bogdanm 89:552587b429a1 297 #define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_EXTEN)
bogdanm 89:552587b429a1 298 /**
bogdanm 89:552587b429a1 299 * @}
bogdanm 89:552587b429a1 300 */
bogdanm 89:552587b429a1 301
Kojto 99:dbbf35b96557 302 /** @defgroup ADC_External_trigger_Source_Regular ADC External Trigger Source Regular
bogdanm 89:552587b429a1 303 * @{
Kojto 99:dbbf35b96557 304 */
Kojto 99:dbbf35b96557 305 /* Note: Parameter ADC_SOFTWARE_START is a software parameter used for */
Kojto 99:dbbf35b96557 306 /* compatibility with other STM32 devices. */
Kojto 122:f9eeca106725 307 #define ADC_EXTERNALTRIGCONV_T1_CC1 ((uint32_t)0x00000000U)
bogdanm 89:552587b429a1 308 #define ADC_EXTERNALTRIGCONV_T1_CC2 ((uint32_t)ADC_CR2_EXTSEL_0)
bogdanm 89:552587b429a1 309 #define ADC_EXTERNALTRIGCONV_T1_CC3 ((uint32_t)ADC_CR2_EXTSEL_1)
bogdanm 89:552587b429a1 310 #define ADC_EXTERNALTRIGCONV_T2_CC2 ((uint32_t)(ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
bogdanm 89:552587b429a1 311 #define ADC_EXTERNALTRIGCONV_T2_CC3 ((uint32_t)ADC_CR2_EXTSEL_2)
bogdanm 89:552587b429a1 312 #define ADC_EXTERNALTRIGCONV_T2_CC4 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_0))
bogdanm 89:552587b429a1 313 #define ADC_EXTERNALTRIGCONV_T2_TRGO ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1))
bogdanm 89:552587b429a1 314 #define ADC_EXTERNALTRIGCONV_T3_CC1 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
bogdanm 89:552587b429a1 315 #define ADC_EXTERNALTRIGCONV_T3_TRGO ((uint32_t)ADC_CR2_EXTSEL_3)
bogdanm 89:552587b429a1 316 #define ADC_EXTERNALTRIGCONV_T4_CC4 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_0))
bogdanm 89:552587b429a1 317 #define ADC_EXTERNALTRIGCONV_T5_CC1 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_1))
bogdanm 89:552587b429a1 318 #define ADC_EXTERNALTRIGCONV_T5_CC2 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
bogdanm 89:552587b429a1 319 #define ADC_EXTERNALTRIGCONV_T5_CC3 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_2))
bogdanm 89:552587b429a1 320 #define ADC_EXTERNALTRIGCONV_T8_CC1 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_0))
bogdanm 89:552587b429a1 321 #define ADC_EXTERNALTRIGCONV_T8_TRGO ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1))
bogdanm 89:552587b429a1 322 #define ADC_EXTERNALTRIGCONV_Ext_IT11 ((uint32_t)ADC_CR2_EXTSEL)
Kojto 122:f9eeca106725 323 #define ADC_SOFTWARE_START ((uint32_t)ADC_CR2_EXTSEL + 1U)
bogdanm 89:552587b429a1 324 /**
bogdanm 89:552587b429a1 325 * @}
bogdanm 89:552587b429a1 326 */
bogdanm 89:552587b429a1 327
Kojto 122:f9eeca106725 328 /** @defgroup ADC_Data_align ADC Data Align
bogdanm 89:552587b429a1 329 * @{
bogdanm 89:552587b429a1 330 */
Kojto 122:f9eeca106725 331 #define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000U)
bogdanm 89:552587b429a1 332 #define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CR2_ALIGN)
bogdanm 89:552587b429a1 333 /**
bogdanm 89:552587b429a1 334 * @}
bogdanm 89:552587b429a1 335 */
bogdanm 89:552587b429a1 336
Kojto 99:dbbf35b96557 337 /** @defgroup ADC_channels ADC Common Channels
bogdanm 89:552587b429a1 338 * @{
bogdanm 89:552587b429a1 339 */
Kojto 122:f9eeca106725 340 #define ADC_CHANNEL_0 ((uint32_t)0x00000000U)
bogdanm 89:552587b429a1 341 #define ADC_CHANNEL_1 ((uint32_t)ADC_CR1_AWDCH_0)
bogdanm 89:552587b429a1 342 #define ADC_CHANNEL_2 ((uint32_t)ADC_CR1_AWDCH_1)
bogdanm 89:552587b429a1 343 #define ADC_CHANNEL_3 ((uint32_t)(ADC_CR1_AWDCH_1 | ADC_CR1_AWDCH_0))
bogdanm 89:552587b429a1 344 #define ADC_CHANNEL_4 ((uint32_t)ADC_CR1_AWDCH_2)
bogdanm 89:552587b429a1 345 #define ADC_CHANNEL_5 ((uint32_t)(ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_0))
bogdanm 89:552587b429a1 346 #define ADC_CHANNEL_6 ((uint32_t)(ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_1))
bogdanm 89:552587b429a1 347 #define ADC_CHANNEL_7 ((uint32_t)(ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_1 | ADC_CR1_AWDCH_0))
bogdanm 89:552587b429a1 348 #define ADC_CHANNEL_8 ((uint32_t)ADC_CR1_AWDCH_3)
bogdanm 89:552587b429a1 349 #define ADC_CHANNEL_9 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_0))
bogdanm 89:552587b429a1 350 #define ADC_CHANNEL_10 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_1))
bogdanm 89:552587b429a1 351 #define ADC_CHANNEL_11 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_1 | ADC_CR1_AWDCH_0))
bogdanm 89:552587b429a1 352 #define ADC_CHANNEL_12 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_2))
bogdanm 89:552587b429a1 353 #define ADC_CHANNEL_13 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_0))
bogdanm 89:552587b429a1 354 #define ADC_CHANNEL_14 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_1))
bogdanm 89:552587b429a1 355 #define ADC_CHANNEL_15 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_1 | ADC_CR1_AWDCH_0))
bogdanm 89:552587b429a1 356 #define ADC_CHANNEL_16 ((uint32_t)ADC_CR1_AWDCH_4)
bogdanm 89:552587b429a1 357 #define ADC_CHANNEL_17 ((uint32_t)(ADC_CR1_AWDCH_4 | ADC_CR1_AWDCH_0))
bogdanm 89:552587b429a1 358 #define ADC_CHANNEL_18 ((uint32_t)(ADC_CR1_AWDCH_4 | ADC_CR1_AWDCH_1))
bogdanm 89:552587b429a1 359
bogdanm 89:552587b429a1 360 #define ADC_CHANNEL_VREFINT ((uint32_t)ADC_CHANNEL_17)
Kojto 122:f9eeca106725 361 #define ADC_CHANNEL_VBAT ((uint32_t)ADC_CHANNEL_18)
bogdanm 89:552587b429a1 362 /**
bogdanm 89:552587b429a1 363 * @}
bogdanm 89:552587b429a1 364 */
bogdanm 89:552587b429a1 365
Kojto 99:dbbf35b96557 366 /** @defgroup ADC_sampling_times ADC Sampling Times
bogdanm 89:552587b429a1 367 * @{
bogdanm 89:552587b429a1 368 */
Kojto 122:f9eeca106725 369 #define ADC_SAMPLETIME_3CYCLES ((uint32_t)0x00000000U)
bogdanm 89:552587b429a1 370 #define ADC_SAMPLETIME_15CYCLES ((uint32_t)ADC_SMPR1_SMP10_0)
bogdanm 89:552587b429a1 371 #define ADC_SAMPLETIME_28CYCLES ((uint32_t)ADC_SMPR1_SMP10_1)
bogdanm 89:552587b429a1 372 #define ADC_SAMPLETIME_56CYCLES ((uint32_t)(ADC_SMPR1_SMP10_1 | ADC_SMPR1_SMP10_0))
bogdanm 89:552587b429a1 373 #define ADC_SAMPLETIME_84CYCLES ((uint32_t)ADC_SMPR1_SMP10_2)
bogdanm 89:552587b429a1 374 #define ADC_SAMPLETIME_112CYCLES ((uint32_t)(ADC_SMPR1_SMP10_2 | ADC_SMPR1_SMP10_0))
bogdanm 89:552587b429a1 375 #define ADC_SAMPLETIME_144CYCLES ((uint32_t)(ADC_SMPR1_SMP10_2 | ADC_SMPR1_SMP10_1))
bogdanm 89:552587b429a1 376 #define ADC_SAMPLETIME_480CYCLES ((uint32_t)ADC_SMPR1_SMP10)
bogdanm 89:552587b429a1 377 /**
bogdanm 89:552587b429a1 378 * @}
bogdanm 89:552587b429a1 379 */
bogdanm 89:552587b429a1 380
Kojto 99:dbbf35b96557 381 /** @defgroup ADC_EOCSelection ADC EOC Selection
bogdanm 89:552587b429a1 382 * @{
bogdanm 89:552587b429a1 383 */
Kojto 122:f9eeca106725 384 #define ADC_EOC_SEQ_CONV ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 385 #define ADC_EOC_SINGLE_CONV ((uint32_t)0x00000001U)
Kojto 122:f9eeca106725 386 #define ADC_EOC_SINGLE_SEQ_CONV ((uint32_t)0x00000002U) /*!< reserved for future use */
bogdanm 89:552587b429a1 387 /**
bogdanm 89:552587b429a1 388 * @}
bogdanm 89:552587b429a1 389 */
bogdanm 89:552587b429a1 390
Kojto 99:dbbf35b96557 391 /** @defgroup ADC_Event_type ADC Event Type
bogdanm 89:552587b429a1 392 * @{
bogdanm 89:552587b429a1 393 */
Kojto 99:dbbf35b96557 394 #define ADC_AWD_EVENT ((uint32_t)ADC_FLAG_AWD)
Kojto 99:dbbf35b96557 395 #define ADC_OVR_EVENT ((uint32_t)ADC_FLAG_OVR)
bogdanm 89:552587b429a1 396 /**
bogdanm 89:552587b429a1 397 * @}
bogdanm 89:552587b429a1 398 */
bogdanm 89:552587b429a1 399
Kojto 99:dbbf35b96557 400 /** @defgroup ADC_analog_watchdog_selection ADC Analog Watchdog Selection
bogdanm 89:552587b429a1 401 * @{
bogdanm 89:552587b429a1 402 */
bogdanm 89:552587b429a1 403 #define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CR1_AWDSGL | ADC_CR1_AWDEN))
bogdanm 89:552587b429a1 404 #define ADC_ANALOGWATCHDOG_SINGLE_INJEC ((uint32_t)(ADC_CR1_AWDSGL | ADC_CR1_JAWDEN))
bogdanm 89:552587b429a1 405 #define ADC_ANALOGWATCHDOG_SINGLE_REGINJEC ((uint32_t)(ADC_CR1_AWDSGL | ADC_CR1_AWDEN | ADC_CR1_JAWDEN))
bogdanm 89:552587b429a1 406 #define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t)ADC_CR1_AWDEN)
bogdanm 89:552587b429a1 407 #define ADC_ANALOGWATCHDOG_ALL_INJEC ((uint32_t)ADC_CR1_JAWDEN)
bogdanm 89:552587b429a1 408 #define ADC_ANALOGWATCHDOG_ALL_REGINJEC ((uint32_t)(ADC_CR1_AWDEN | ADC_CR1_JAWDEN))
Kojto 122:f9eeca106725 409 #define ADC_ANALOGWATCHDOG_NONE ((uint32_t)0x00000000U)
bogdanm 89:552587b429a1 410 /**
bogdanm 89:552587b429a1 411 * @}
bogdanm 89:552587b429a1 412 */
bogdanm 89:552587b429a1 413
Kojto 99:dbbf35b96557 414 /** @defgroup ADC_interrupts_definition ADC Interrupts Definition
bogdanm 89:552587b429a1 415 * @{
bogdanm 89:552587b429a1 416 */
Kojto 122:f9eeca106725 417 #define ADC_IT_EOC ((uint32_t)ADC_CR1_EOCIE)
Kojto 122:f9eeca106725 418 #define ADC_IT_AWD ((uint32_t)ADC_CR1_AWDIE)
bogdanm 89:552587b429a1 419 #define ADC_IT_JEOC ((uint32_t)ADC_CR1_JEOCIE)
Kojto 122:f9eeca106725 420 #define ADC_IT_OVR ((uint32_t)ADC_CR1_OVRIE)
bogdanm 89:552587b429a1 421 /**
bogdanm 89:552587b429a1 422 * @}
bogdanm 89:552587b429a1 423 */
bogdanm 89:552587b429a1 424
Kojto 99:dbbf35b96557 425 /** @defgroup ADC_flags_definition ADC Flags Definition
bogdanm 89:552587b429a1 426 * @{
bogdanm 89:552587b429a1 427 */
bogdanm 89:552587b429a1 428 #define ADC_FLAG_AWD ((uint32_t)ADC_SR_AWD)
bogdanm 89:552587b429a1 429 #define ADC_FLAG_EOC ((uint32_t)ADC_SR_EOC)
bogdanm 89:552587b429a1 430 #define ADC_FLAG_JEOC ((uint32_t)ADC_SR_JEOC)
bogdanm 89:552587b429a1 431 #define ADC_FLAG_JSTRT ((uint32_t)ADC_SR_JSTRT)
bogdanm 89:552587b429a1 432 #define ADC_FLAG_STRT ((uint32_t)ADC_SR_STRT)
bogdanm 89:552587b429a1 433 #define ADC_FLAG_OVR ((uint32_t)ADC_SR_OVR)
bogdanm 89:552587b429a1 434 /**
bogdanm 89:552587b429a1 435 * @}
bogdanm 89:552587b429a1 436 */
bogdanm 89:552587b429a1 437
Kojto 99:dbbf35b96557 438 /** @defgroup ADC_channels_type ADC Channels Type
bogdanm 89:552587b429a1 439 * @{
bogdanm 89:552587b429a1 440 */
Kojto 122:f9eeca106725 441 #define ADC_ALL_CHANNELS ((uint32_t)0x00000001U)
Kojto 122:f9eeca106725 442 #define ADC_REGULAR_CHANNELS ((uint32_t)0x00000002U) /*!< reserved for future use */
Kojto 122:f9eeca106725 443 #define ADC_INJECTED_CHANNELS ((uint32_t)0x00000003U) /*!< reserved for future use */
bogdanm 89:552587b429a1 444 /**
bogdanm 89:552587b429a1 445 * @}
bogdanm 89:552587b429a1 446 */
bogdanm 89:552587b429a1 447
bogdanm 89:552587b429a1 448 /**
bogdanm 89:552587b429a1 449 * @}
bogdanm 89:552587b429a1 450 */
bogdanm 89:552587b429a1 451
bogdanm 89:552587b429a1 452 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 453 /** @defgroup ADC_Exported_Macros ADC Exported Macros
Kojto 99:dbbf35b96557 454 * @{
Kojto 99:dbbf35b96557 455 */
bogdanm 89:552587b429a1 456
bogdanm 89:552587b429a1 457 /** @brief Reset ADC handle state
bogdanm 89:552587b429a1 458 * @param __HANDLE__: ADC handle
bogdanm 89:552587b429a1 459 * @retval None
bogdanm 89:552587b429a1 460 */
bogdanm 89:552587b429a1 461 #define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
bogdanm 89:552587b429a1 462
bogdanm 89:552587b429a1 463 /**
bogdanm 89:552587b429a1 464 * @brief Enable the ADC peripheral.
bogdanm 89:552587b429a1 465 * @param __HANDLE__: ADC handle
bogdanm 89:552587b429a1 466 * @retval None
bogdanm 89:552587b429a1 467 */
bogdanm 89:552587b429a1 468 #define __HAL_ADC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR2 |= ADC_CR2_ADON)
bogdanm 89:552587b429a1 469
bogdanm 89:552587b429a1 470 /**
bogdanm 89:552587b429a1 471 * @brief Disable the ADC peripheral.
bogdanm 89:552587b429a1 472 * @param __HANDLE__: ADC handle
bogdanm 89:552587b429a1 473 * @retval None
bogdanm 89:552587b429a1 474 */
bogdanm 89:552587b429a1 475 #define __HAL_ADC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= ~ADC_CR2_ADON)
bogdanm 89:552587b429a1 476
bogdanm 89:552587b429a1 477 /**
bogdanm 89:552587b429a1 478 * @brief Enable the ADC end of conversion interrupt.
bogdanm 89:552587b429a1 479 * @param __HANDLE__: specifies the ADC Handle.
bogdanm 89:552587b429a1 480 * @param __INTERRUPT__: ADC Interrupt.
bogdanm 89:552587b429a1 481 * @retval None
bogdanm 89:552587b429a1 482 */
bogdanm 89:552587b429a1 483 #define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1) |= (__INTERRUPT__))
bogdanm 89:552587b429a1 484
bogdanm 89:552587b429a1 485 /**
bogdanm 89:552587b429a1 486 * @brief Disable the ADC end of conversion interrupt.
bogdanm 89:552587b429a1 487 * @param __HANDLE__: specifies the ADC Handle.
bogdanm 89:552587b429a1 488 * @param __INTERRUPT__: ADC interrupt.
bogdanm 89:552587b429a1 489 * @retval None
bogdanm 89:552587b429a1 490 */
bogdanm 89:552587b429a1 491 #define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1) &= ~(__INTERRUPT__))
bogdanm 89:552587b429a1 492
bogdanm 89:552587b429a1 493 /** @brief Check if the specified ADC interrupt source is enabled or disabled.
bogdanm 89:552587b429a1 494 * @param __HANDLE__: specifies the ADC Handle.
bogdanm 89:552587b429a1 495 * @param __INTERRUPT__: specifies the ADC interrupt source to check.
bogdanm 89:552587b429a1 496 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 89:552587b429a1 497 */
Kojto 99:dbbf35b96557 498 #define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__))
bogdanm 89:552587b429a1 499
bogdanm 89:552587b429a1 500 /**
bogdanm 89:552587b429a1 501 * @brief Clear the ADC's pending flags.
bogdanm 89:552587b429a1 502 * @param __HANDLE__: specifies the ADC Handle.
bogdanm 89:552587b429a1 503 * @param __FLAG__: ADC flag.
bogdanm 89:552587b429a1 504 * @retval None
bogdanm 89:552587b429a1 505 */
bogdanm 92:4fc01daae5a5 506 #define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = ~(__FLAG__))
bogdanm 89:552587b429a1 507
bogdanm 89:552587b429a1 508 /**
bogdanm 89:552587b429a1 509 * @brief Get the selected ADC's flag status.
bogdanm 89:552587b429a1 510 * @param __HANDLE__: specifies the ADC Handle.
bogdanm 89:552587b429a1 511 * @param __FLAG__: ADC flag.
bogdanm 89:552587b429a1 512 * @retval None
bogdanm 89:552587b429a1 513 */
bogdanm 89:552587b429a1 514 #define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
bogdanm 89:552587b429a1 515
bogdanm 89:552587b429a1 516 /**
Kojto 99:dbbf35b96557 517 * @}
bogdanm 89:552587b429a1 518 */
bogdanm 89:552587b429a1 519
bogdanm 89:552587b429a1 520 /* Include ADC HAL Extension module */
bogdanm 89:552587b429a1 521 #include "stm32f4xx_hal_adc_ex.h"
bogdanm 89:552587b429a1 522
bogdanm 89:552587b429a1 523 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 524 /** @addtogroup ADC_Exported_Functions
Kojto 99:dbbf35b96557 525 * @{
Kojto 99:dbbf35b96557 526 */
Kojto 99:dbbf35b96557 527
Kojto 99:dbbf35b96557 528 /** @addtogroup ADC_Exported_Functions_Group1
Kojto 99:dbbf35b96557 529 * @{
Kojto 99:dbbf35b96557 530 */
bogdanm 89:552587b429a1 531 /* Initialization/de-initialization functions ***********************************/
bogdanm 89:552587b429a1 532 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc);
bogdanm 89:552587b429a1 533 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
Kojto 99:dbbf35b96557 534 void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 535 void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 536 /**
Kojto 99:dbbf35b96557 537 * @}
Kojto 99:dbbf35b96557 538 */
bogdanm 89:552587b429a1 539
Kojto 99:dbbf35b96557 540 /** @addtogroup ADC_Exported_Functions_Group2
Kojto 99:dbbf35b96557 541 * @{
Kojto 99:dbbf35b96557 542 */
bogdanm 89:552587b429a1 543 /* I/O operation functions ******************************************************/
bogdanm 89:552587b429a1 544 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc);
bogdanm 89:552587b429a1 545 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
bogdanm 89:552587b429a1 546 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
bogdanm 89:552587b429a1 547
bogdanm 89:552587b429a1 548 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
bogdanm 89:552587b429a1 549
bogdanm 89:552587b429a1 550 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
bogdanm 89:552587b429a1 551 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
bogdanm 89:552587b429a1 552
Kojto 99:dbbf35b96557 553 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
bogdanm 89:552587b429a1 554
bogdanm 89:552587b429a1 555 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
bogdanm 89:552587b429a1 556 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
bogdanm 89:552587b429a1 557
Kojto 99:dbbf35b96557 558 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
bogdanm 89:552587b429a1 559
Kojto 99:dbbf35b96557 560 void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 561 void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 562 void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 563 void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
Kojto 99:dbbf35b96557 564 /**
Kojto 99:dbbf35b96557 565 * @}
Kojto 99:dbbf35b96557 566 */
bogdanm 89:552587b429a1 567
Kojto 99:dbbf35b96557 568 /** @addtogroup ADC_Exported_Functions_Group3
Kojto 99:dbbf35b96557 569 * @{
Kojto 99:dbbf35b96557 570 */
bogdanm 89:552587b429a1 571 /* Peripheral Control functions *************************************************/
bogdanm 89:552587b429a1 572 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
bogdanm 89:552587b429a1 573 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
Kojto 99:dbbf35b96557 574 /**
Kojto 99:dbbf35b96557 575 * @}
Kojto 99:dbbf35b96557 576 */
bogdanm 89:552587b429a1 577
Kojto 99:dbbf35b96557 578 /** @addtogroup ADC_Exported_Functions_Group4
Kojto 99:dbbf35b96557 579 * @{
Kojto 99:dbbf35b96557 580 */
bogdanm 89:552587b429a1 581 /* Peripheral State functions ***************************************************/
Kojto 122:f9eeca106725 582 uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 583 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
Kojto 99:dbbf35b96557 584 /**
Kojto 99:dbbf35b96557 585 * @}
Kojto 99:dbbf35b96557 586 */
Kojto 99:dbbf35b96557 587
Kojto 99:dbbf35b96557 588 /**
Kojto 99:dbbf35b96557 589 * @}
Kojto 99:dbbf35b96557 590 */
Kojto 99:dbbf35b96557 591 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 592 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 593 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 594 /** @defgroup ADC_Private_Constants ADC Private Constants
Kojto 99:dbbf35b96557 595 * @{
Kojto 99:dbbf35b96557 596 */
Kojto 99:dbbf35b96557 597 /* Delay for ADC stabilization time. */
Kojto 99:dbbf35b96557 598 /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */
Kojto 99:dbbf35b96557 599 /* Unit: us */
Kojto 122:f9eeca106725 600 #define ADC_STAB_DELAY_US ((uint32_t) 3U)
Kojto 99:dbbf35b96557 601 /* Delay for temperature sensor stabilization time. */
Kojto 99:dbbf35b96557 602 /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
Kojto 99:dbbf35b96557 603 /* Unit: us */
Kojto 122:f9eeca106725 604 #define ADC_TEMPSENSOR_DELAY_US ((uint32_t) 10U)
Kojto 99:dbbf35b96557 605 /**
Kojto 99:dbbf35b96557 606 * @}
Kojto 99:dbbf35b96557 607 */
Kojto 99:dbbf35b96557 608
Kojto 122:f9eeca106725 609 /* Private macro ------------------------------------------------------------*/
Kojto 122:f9eeca106725 610
Kojto 99:dbbf35b96557 611 /** @defgroup ADC_Private_Macros ADC Private Macros
Kojto 99:dbbf35b96557 612 * @{
Kojto 99:dbbf35b96557 613 */
Kojto 122:f9eeca106725 614 /* Macro reserved for internal HAL driver usage, not intended to be used in
Kojto 122:f9eeca106725 615 code of final user */
Kojto 122:f9eeca106725 616
Kojto 122:f9eeca106725 617 /**
Kojto 122:f9eeca106725 618 * @brief Verification of ADC state: enabled or disabled
Kojto 122:f9eeca106725 619 * @param __HANDLE__: ADC handle
Kojto 122:f9eeca106725 620 * @retval SET (ADC enabled) or RESET (ADC disabled)
Kojto 122:f9eeca106725 621 */
Kojto 122:f9eeca106725 622 #define ADC_IS_ENABLE(__HANDLE__) \
Kojto 122:f9eeca106725 623 ((( ((__HANDLE__)->Instance->SR & ADC_SR_ADONS) == ADC_SR_ADONS ) \
Kojto 122:f9eeca106725 624 ) ? SET : RESET)
Kojto 122:f9eeca106725 625
Kojto 122:f9eeca106725 626 /**
Kojto 122:f9eeca106725 627 * @brief Test if conversion trigger of regular group is software start
Kojto 122:f9eeca106725 628 * or external trigger.
Kojto 122:f9eeca106725 629 * @param __HANDLE__: ADC handle
Kojto 122:f9eeca106725 630 * @retval SET (software start) or RESET (external trigger)
Kojto 122:f9eeca106725 631 */
Kojto 122:f9eeca106725 632 #define ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__) \
Kojto 122:f9eeca106725 633 (((__HANDLE__)->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
Kojto 122:f9eeca106725 634
Kojto 122:f9eeca106725 635 /**
Kojto 122:f9eeca106725 636 * @brief Test if conversion trigger of injected group is software start
Kojto 122:f9eeca106725 637 * or external trigger.
Kojto 122:f9eeca106725 638 * @param __HANDLE__: ADC handle
Kojto 122:f9eeca106725 639 * @retval SET (software start) or RESET (external trigger)
Kojto 122:f9eeca106725 640 */
Kojto 122:f9eeca106725 641 #define ADC_IS_SOFTWARE_START_INJECTED(__HANDLE__) \
Kojto 122:f9eeca106725 642 (((__HANDLE__)->Instance->CR2 & ADC_CR2_JEXTEN) == RESET)
Kojto 122:f9eeca106725 643
Kojto 122:f9eeca106725 644 /**
Kojto 122:f9eeca106725 645 * @brief Simultaneously clears and sets specific bits of the handle State
Kojto 122:f9eeca106725 646 * @note: ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(),
Kojto 122:f9eeca106725 647 * the first parameter is the ADC handle State, the second parameter is the
Kojto 122:f9eeca106725 648 * bit field to clear, the third and last parameter is the bit field to set.
Kojto 122:f9eeca106725 649 * @retval None
Kojto 122:f9eeca106725 650 */
Kojto 122:f9eeca106725 651 #define ADC_STATE_CLR_SET MODIFY_REG
Kojto 122:f9eeca106725 652
Kojto 122:f9eeca106725 653 /**
Kojto 122:f9eeca106725 654 * @brief Clear ADC error code (set it to error code: "no error")
Kojto 122:f9eeca106725 655 * @param __HANDLE__: ADC handle
Kojto 122:f9eeca106725 656 * @retval None
Kojto 122:f9eeca106725 657 */
Kojto 122:f9eeca106725 658 #define ADC_CLEAR_ERRORCODE(__HANDLE__) \
Kojto 122:f9eeca106725 659 ((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE)
Kojto 122:f9eeca106725 660
Kojto 122:f9eeca106725 661
Kojto 110:165afa46840b 662 #define IS_ADC_CLOCKPRESCALER(ADC_CLOCK) (((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV2) || \
Kojto 110:165afa46840b 663 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV4) || \
Kojto 110:165afa46840b 664 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV6) || \
Kojto 110:165afa46840b 665 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV8))
Kojto 99:dbbf35b96557 666 #define IS_ADC_SAMPLING_DELAY(DELAY) (((DELAY) == ADC_TWOSAMPLINGDELAY_5CYCLES) || \
Kojto 99:dbbf35b96557 667 ((DELAY) == ADC_TWOSAMPLINGDELAY_6CYCLES) || \
Kojto 99:dbbf35b96557 668 ((DELAY) == ADC_TWOSAMPLINGDELAY_7CYCLES) || \
Kojto 99:dbbf35b96557 669 ((DELAY) == ADC_TWOSAMPLINGDELAY_8CYCLES) || \
Kojto 99:dbbf35b96557 670 ((DELAY) == ADC_TWOSAMPLINGDELAY_9CYCLES) || \
Kojto 99:dbbf35b96557 671 ((DELAY) == ADC_TWOSAMPLINGDELAY_10CYCLES) || \
Kojto 99:dbbf35b96557 672 ((DELAY) == ADC_TWOSAMPLINGDELAY_11CYCLES) || \
Kojto 99:dbbf35b96557 673 ((DELAY) == ADC_TWOSAMPLINGDELAY_12CYCLES) || \
Kojto 99:dbbf35b96557 674 ((DELAY) == ADC_TWOSAMPLINGDELAY_13CYCLES) || \
Kojto 99:dbbf35b96557 675 ((DELAY) == ADC_TWOSAMPLINGDELAY_14CYCLES) || \
Kojto 99:dbbf35b96557 676 ((DELAY) == ADC_TWOSAMPLINGDELAY_15CYCLES) || \
Kojto 99:dbbf35b96557 677 ((DELAY) == ADC_TWOSAMPLINGDELAY_16CYCLES) || \
Kojto 99:dbbf35b96557 678 ((DELAY) == ADC_TWOSAMPLINGDELAY_17CYCLES) || \
Kojto 99:dbbf35b96557 679 ((DELAY) == ADC_TWOSAMPLINGDELAY_18CYCLES) || \
Kojto 99:dbbf35b96557 680 ((DELAY) == ADC_TWOSAMPLINGDELAY_19CYCLES) || \
Kojto 99:dbbf35b96557 681 ((DELAY) == ADC_TWOSAMPLINGDELAY_20CYCLES))
Kojto 99:dbbf35b96557 682 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_12B) || \
Kojto 99:dbbf35b96557 683 ((RESOLUTION) == ADC_RESOLUTION_10B) || \
Kojto 99:dbbf35b96557 684 ((RESOLUTION) == ADC_RESOLUTION_8B) || \
Kojto 99:dbbf35b96557 685 ((RESOLUTION) == ADC_RESOLUTION_6B))
Kojto 99:dbbf35b96557 686 #define IS_ADC_EXT_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGCONVEDGE_NONE) || \
Kojto 99:dbbf35b96557 687 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISING) || \
Kojto 99:dbbf35b96557 688 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_FALLING) || \
Kojto 99:dbbf35b96557 689 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING))
Kojto 99:dbbf35b96557 690 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
Kojto 99:dbbf35b96557 691 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
Kojto 99:dbbf35b96557 692 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3) || \
Kojto 99:dbbf35b96557 693 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
Kojto 99:dbbf35b96557 694 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3) || \
Kojto 99:dbbf35b96557 695 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC4) || \
Kojto 99:dbbf35b96557 696 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_TRGO) || \
Kojto 99:dbbf35b96557 697 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1) || \
Kojto 99:dbbf35b96557 698 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
Kojto 99:dbbf35b96557 699 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
Kojto 99:dbbf35b96557 700 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1) || \
Kojto 99:dbbf35b96557 701 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC2) || \
Kojto 99:dbbf35b96557 702 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3) || \
Kojto 99:dbbf35b96557 703 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1) || \
Kojto 99:dbbf35b96557 704 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \
Kojto 99:dbbf35b96557 705 ((REGTRIG) == ADC_EXTERNALTRIGCONV_Ext_IT11)|| \
Kojto 99:dbbf35b96557 706 ((REGTRIG) == ADC_SOFTWARE_START))
Kojto 99:dbbf35b96557 707 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) || \
Kojto 99:dbbf35b96557 708 ((ALIGN) == ADC_DATAALIGN_LEFT))
Kojto 99:dbbf35b96557 709 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_3CYCLES) || \
Kojto 99:dbbf35b96557 710 ((TIME) == ADC_SAMPLETIME_15CYCLES) || \
Kojto 99:dbbf35b96557 711 ((TIME) == ADC_SAMPLETIME_28CYCLES) || \
Kojto 99:dbbf35b96557 712 ((TIME) == ADC_SAMPLETIME_56CYCLES) || \
Kojto 99:dbbf35b96557 713 ((TIME) == ADC_SAMPLETIME_84CYCLES) || \
Kojto 99:dbbf35b96557 714 ((TIME) == ADC_SAMPLETIME_112CYCLES) || \
Kojto 99:dbbf35b96557 715 ((TIME) == ADC_SAMPLETIME_144CYCLES) || \
Kojto 99:dbbf35b96557 716 ((TIME) == ADC_SAMPLETIME_480CYCLES))
Kojto 99:dbbf35b96557 717 #define IS_ADC_EOCSelection(EOCSelection) (((EOCSelection) == ADC_EOC_SINGLE_CONV) || \
Kojto 99:dbbf35b96557 718 ((EOCSelection) == ADC_EOC_SEQ_CONV) || \
Kojto 99:dbbf35b96557 719 ((EOCSelection) == ADC_EOC_SINGLE_SEQ_CONV))
Kojto 99:dbbf35b96557 720 #define IS_ADC_EVENT_TYPE(EVENT) (((EVENT) == ADC_AWD_EVENT) || \
Kojto 99:dbbf35b96557 721 ((EVENT) == ADC_OVR_EVENT))
Kojto 99:dbbf35b96557 722 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \
Kojto 99:dbbf35b96557 723 ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_INJEC) || \
Kojto 99:dbbf35b96557 724 ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC) || \
Kojto 99:dbbf35b96557 725 ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG) || \
Kojto 99:dbbf35b96557 726 ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_INJEC) || \
Kojto 99:dbbf35b96557 727 ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REGINJEC) || \
Kojto 99:dbbf35b96557 728 ((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE))
Kojto 99:dbbf35b96557 729 #define IS_ADC_CHANNELS_TYPE(CHANNEL_TYPE) (((CHANNEL_TYPE) == ADC_ALL_CHANNELS) || \
Kojto 99:dbbf35b96557 730 ((CHANNEL_TYPE) == ADC_REGULAR_CHANNELS) || \
Kojto 99:dbbf35b96557 731 ((CHANNEL_TYPE) == ADC_INJECTED_CHANNELS))
Kojto 122:f9eeca106725 732 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= ((uint32_t)0xFFFU))
Kojto 99:dbbf35b96557 733
Kojto 122:f9eeca106725 734 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1U)) && ((LENGTH) <= ((uint32_t)16U)))
Kojto 122:f9eeca106725 735 #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= ((uint32_t)1U)) && ((RANK) <= ((uint32_t)16U)))
Kojto 122:f9eeca106725 736 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= ((uint32_t)1U)) && ((NUMBER) <= ((uint32_t)8U)))
Kojto 99:dbbf35b96557 737 #define IS_ADC_RANGE(RESOLUTION, ADC_VALUE) \
Kojto 122:f9eeca106725 738 ((((RESOLUTION) == ADC_RESOLUTION_12B) && ((ADC_VALUE) <= ((uint32_t)0x0FFFU))) || \
Kojto 122:f9eeca106725 739 (((RESOLUTION) == ADC_RESOLUTION_10B) && ((ADC_VALUE) <= ((uint32_t)0x03FFU))) || \
Kojto 122:f9eeca106725 740 (((RESOLUTION) == ADC_RESOLUTION_8B) && ((ADC_VALUE) <= ((uint32_t)0x00FFU))) || \
Kojto 122:f9eeca106725 741 (((RESOLUTION) == ADC_RESOLUTION_6B) && ((ADC_VALUE) <= ((uint32_t)0x003FU))))
Kojto 99:dbbf35b96557 742
Kojto 99:dbbf35b96557 743 /**
Kojto 99:dbbf35b96557 744 * @brief Set ADC Regular channel sequence length.
Kojto 99:dbbf35b96557 745 * @param _NbrOfConversion_: Regular channel sequence length.
Kojto 99:dbbf35b96557 746 * @retval None
Kojto 99:dbbf35b96557 747 */
Kojto 122:f9eeca106725 748 #define ADC_SQR1(_NbrOfConversion_) (((_NbrOfConversion_) - (uint8_t)1U) << 20U)
Kojto 99:dbbf35b96557 749
Kojto 99:dbbf35b96557 750 /**
Kojto 99:dbbf35b96557 751 * @brief Set the ADC's sample time for channel numbers between 10 and 18.
Kojto 99:dbbf35b96557 752 * @param _SAMPLETIME_: Sample time parameter.
Kojto 99:dbbf35b96557 753 * @param _CHANNELNB_: Channel number.
Kojto 99:dbbf35b96557 754 * @retval None
Kojto 99:dbbf35b96557 755 */
Kojto 122:f9eeca106725 756 #define ADC_SMPR1(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3U * (((uint32_t)((uint16_t)(_CHANNELNB_))) - 10U)))
Kojto 99:dbbf35b96557 757
Kojto 99:dbbf35b96557 758 /**
Kojto 99:dbbf35b96557 759 * @brief Set the ADC's sample time for channel numbers between 0 and 9.
Kojto 99:dbbf35b96557 760 * @param _SAMPLETIME_: Sample time parameter.
Kojto 99:dbbf35b96557 761 * @param _CHANNELNB_: Channel number.
Kojto 99:dbbf35b96557 762 * @retval None
Kojto 99:dbbf35b96557 763 */
Kojto 122:f9eeca106725 764 #define ADC_SMPR2(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3U * ((uint32_t)((uint16_t)(_CHANNELNB_)))))
Kojto 99:dbbf35b96557 765
Kojto 99:dbbf35b96557 766 /**
Kojto 99:dbbf35b96557 767 * @brief Set the selected regular channel rank for rank between 1 and 6.
Kojto 99:dbbf35b96557 768 * @param _CHANNELNB_: Channel number.
Kojto 99:dbbf35b96557 769 * @param _RANKNB_: Rank number.
Kojto 99:dbbf35b96557 770 * @retval None
Kojto 99:dbbf35b96557 771 */
Kojto 122:f9eeca106725 772 #define ADC_SQR3_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 1U)))
Kojto 99:dbbf35b96557 773
Kojto 99:dbbf35b96557 774 /**
Kojto 99:dbbf35b96557 775 * @brief Set the selected regular channel rank for rank between 7 and 12.
Kojto 99:dbbf35b96557 776 * @param _CHANNELNB_: Channel number.
Kojto 99:dbbf35b96557 777 * @param _RANKNB_: Rank number.
Kojto 99:dbbf35b96557 778 * @retval None
Kojto 99:dbbf35b96557 779 */
Kojto 122:f9eeca106725 780 #define ADC_SQR2_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 7U)))
Kojto 99:dbbf35b96557 781
Kojto 99:dbbf35b96557 782 /**
Kojto 99:dbbf35b96557 783 * @brief Set the selected regular channel rank for rank between 13 and 16.
Kojto 99:dbbf35b96557 784 * @param _CHANNELNB_: Channel number.
Kojto 99:dbbf35b96557 785 * @param _RANKNB_: Rank number.
Kojto 99:dbbf35b96557 786 * @retval None
Kojto 99:dbbf35b96557 787 */
Kojto 122:f9eeca106725 788 #define ADC_SQR1_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 13U)))
Kojto 99:dbbf35b96557 789
Kojto 99:dbbf35b96557 790 /**
Kojto 99:dbbf35b96557 791 * @brief Enable ADC continuous conversion mode.
Kojto 99:dbbf35b96557 792 * @param _CONTINUOUS_MODE_: Continuous mode.
Kojto 99:dbbf35b96557 793 * @retval None
Kojto 99:dbbf35b96557 794 */
Kojto 122:f9eeca106725 795 #define ADC_CR2_CONTINUOUS(_CONTINUOUS_MODE_) ((_CONTINUOUS_MODE_) << 1U)
Kojto 99:dbbf35b96557 796
Kojto 99:dbbf35b96557 797 /**
Kojto 99:dbbf35b96557 798 * @brief Configures the number of discontinuous conversions for the regular group channels.
Kojto 99:dbbf35b96557 799 * @param _NBR_DISCONTINUOUSCONV_: Number of discontinuous conversions.
Kojto 99:dbbf35b96557 800 * @retval None
Kojto 99:dbbf35b96557 801 */
Kojto 122:f9eeca106725 802 #define ADC_CR1_DISCONTINUOUS(_NBR_DISCONTINUOUSCONV_) (((_NBR_DISCONTINUOUSCONV_) - 1U) << POSITION_VAL(ADC_CR1_DISCNUM))
Kojto 99:dbbf35b96557 803
Kojto 99:dbbf35b96557 804 /**
Kojto 99:dbbf35b96557 805 * @brief Enable ADC scan mode.
Kojto 99:dbbf35b96557 806 * @param _SCANCONV_MODE_: Scan conversion mode.
Kojto 99:dbbf35b96557 807 * @retval None
Kojto 99:dbbf35b96557 808 */
Kojto 122:f9eeca106725 809 #define ADC_CR1_SCANCONV(_SCANCONV_MODE_) ((_SCANCONV_MODE_) << 8U)
Kojto 99:dbbf35b96557 810
Kojto 99:dbbf35b96557 811 /**
Kojto 99:dbbf35b96557 812 * @brief Enable the ADC end of conversion selection.
Kojto 99:dbbf35b96557 813 * @param _EOCSelection_MODE_: End of conversion selection mode.
Kojto 99:dbbf35b96557 814 * @retval None
Kojto 99:dbbf35b96557 815 */
Kojto 122:f9eeca106725 816 #define ADC_CR2_EOCSelection(_EOCSelection_MODE_) ((_EOCSelection_MODE_) << 10U)
Kojto 99:dbbf35b96557 817
Kojto 99:dbbf35b96557 818 /**
Kojto 99:dbbf35b96557 819 * @brief Enable the ADC DMA continuous request.
Kojto 99:dbbf35b96557 820 * @param _DMAContReq_MODE_: DMA continuous request mode.
Kojto 99:dbbf35b96557 821 * @retval None
Kojto 99:dbbf35b96557 822 */
Kojto 122:f9eeca106725 823 #define ADC_CR2_DMAContReq(_DMAContReq_MODE_) ((_DMAContReq_MODE_) << 9U)
Kojto 99:dbbf35b96557 824
Kojto 99:dbbf35b96557 825 /**
Kojto 99:dbbf35b96557 826 * @brief Return resolution bits in CR1 register.
Kojto 99:dbbf35b96557 827 * @param __HANDLE__: ADC handle
Kojto 99:dbbf35b96557 828 * @retval None
Kojto 99:dbbf35b96557 829 */
Kojto 99:dbbf35b96557 830 #define ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CR1) & ADC_CR1_RES)
Kojto 99:dbbf35b96557 831
Kojto 99:dbbf35b96557 832 /**
Kojto 99:dbbf35b96557 833 * @}
Kojto 99:dbbf35b96557 834 */
Kojto 99:dbbf35b96557 835
Kojto 99:dbbf35b96557 836 /* Private functions ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 837 /** @defgroup ADC_Private_Functions ADC Private Functions
Kojto 99:dbbf35b96557 838 * @{
Kojto 99:dbbf35b96557 839 */
Kojto 99:dbbf35b96557 840
Kojto 99:dbbf35b96557 841 /**
Kojto 99:dbbf35b96557 842 * @}
Kojto 99:dbbf35b96557 843 */
bogdanm 89:552587b429a1 844
bogdanm 89:552587b429a1 845 /**
bogdanm 89:552587b429a1 846 * @}
bogdanm 89:552587b429a1 847 */
bogdanm 89:552587b429a1 848
bogdanm 89:552587b429a1 849 /**
bogdanm 89:552587b429a1 850 * @}
bogdanm 89:552587b429a1 851 */
bogdanm 89:552587b429a1 852
bogdanm 89:552587b429a1 853 #ifdef __cplusplus
bogdanm 89:552587b429a1 854 }
bogdanm 89:552587b429a1 855 #endif
bogdanm 89:552587b429a1 856
bogdanm 89:552587b429a1 857 #endif /*__STM32F4xx_ADC_H */
bogdanm 89:552587b429a1 858
bogdanm 89:552587b429a1 859
bogdanm 89:552587b429a1 860 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/