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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_NUCLEO_L011K4/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_spi.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Release 136 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure  https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 136:ef9c61f8c49f 1 /**
Kojto 136:ef9c61f8c49f 2 ******************************************************************************
Kojto 136:ef9c61f8c49f 3 * @file stm32l0xx_ll_spi.h
Kojto 136:ef9c61f8c49f 4 * @author MCD Application Team
Kojto 136:ef9c61f8c49f 5 * @version V1.7.0
Kojto 136:ef9c61f8c49f 6 * @date 31-May-2016
Kojto 136:ef9c61f8c49f 7 * @brief Header file of SPI LL module.
Kojto 136:ef9c61f8c49f 8 ******************************************************************************
Kojto 136:ef9c61f8c49f 9 * @attention
Kojto 136:ef9c61f8c49f 10 *
Kojto 136:ef9c61f8c49f 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 136:ef9c61f8c49f 12 *
Kojto 136:ef9c61f8c49f 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 136:ef9c61f8c49f 14 * are permitted provided that the following conditions are met:
Kojto 136:ef9c61f8c49f 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 136:ef9c61f8c49f 16 * this list of conditions and the following disclaimer.
Kojto 136:ef9c61f8c49f 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 136:ef9c61f8c49f 18 * this list of conditions and the following disclaimer in the documentation
Kojto 136:ef9c61f8c49f 19 * and/or other materials provided with the distribution.
Kojto 136:ef9c61f8c49f 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 136:ef9c61f8c49f 21 * may be used to endorse or promote products derived from this software
Kojto 136:ef9c61f8c49f 22 * without specific prior written permission.
Kojto 136:ef9c61f8c49f 23 *
Kojto 136:ef9c61f8c49f 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 136:ef9c61f8c49f 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 136:ef9c61f8c49f 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 136:ef9c61f8c49f 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 136:ef9c61f8c49f 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 136:ef9c61f8c49f 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 136:ef9c61f8c49f 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 136:ef9c61f8c49f 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 136:ef9c61f8c49f 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 136:ef9c61f8c49f 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 136:ef9c61f8c49f 34 *
Kojto 136:ef9c61f8c49f 35 ******************************************************************************
Kojto 136:ef9c61f8c49f 36 */
Kojto 136:ef9c61f8c49f 37
Kojto 136:ef9c61f8c49f 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 136:ef9c61f8c49f 39 #ifndef __STM32L0xx_LL_SPI_H
Kojto 136:ef9c61f8c49f 40 #define __STM32L0xx_LL_SPI_H
Kojto 136:ef9c61f8c49f 41
Kojto 136:ef9c61f8c49f 42 #ifdef __cplusplus
Kojto 136:ef9c61f8c49f 43 extern "C" {
Kojto 136:ef9c61f8c49f 44 #endif
Kojto 136:ef9c61f8c49f 45
Kojto 136:ef9c61f8c49f 46 /* Includes ------------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 47 #include "stm32l0xx.h"
Kojto 136:ef9c61f8c49f 48
Kojto 136:ef9c61f8c49f 49 /** @addtogroup STM32L0xx_LL_Driver
Kojto 136:ef9c61f8c49f 50 * @{
Kojto 136:ef9c61f8c49f 51 */
Kojto 136:ef9c61f8c49f 52
Kojto 136:ef9c61f8c49f 53 #if defined (SPI1) || defined (SPI2)
Kojto 136:ef9c61f8c49f 54
Kojto 136:ef9c61f8c49f 55 /** @defgroup SPI_LL SPI
Kojto 136:ef9c61f8c49f 56 * @{
Kojto 136:ef9c61f8c49f 57 */
Kojto 136:ef9c61f8c49f 58
Kojto 136:ef9c61f8c49f 59 /* Private types -------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 60 /* Private variables ---------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 61 /* Private macros ------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 62
Kojto 136:ef9c61f8c49f 63 /* Exported types ------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 64 #if defined(USE_FULL_LL_DRIVER)
Kojto 136:ef9c61f8c49f 65 /** @defgroup SPI_LL_ES_INIT SPI Exported Init structure
Kojto 136:ef9c61f8c49f 66 * @{
Kojto 136:ef9c61f8c49f 67 */
Kojto 136:ef9c61f8c49f 68
Kojto 136:ef9c61f8c49f 69 /**
Kojto 136:ef9c61f8c49f 70 * @brief SPI Init structures definition
Kojto 136:ef9c61f8c49f 71 */
Kojto 136:ef9c61f8c49f 72 typedef struct
Kojto 136:ef9c61f8c49f 73 {
Kojto 136:ef9c61f8c49f 74 uint32_t TransferDirection; /*!< Specifies the SPI unidirectional or bidirectional data mode.
Kojto 136:ef9c61f8c49f 75 This parameter can be a value of @ref SPI_LL_EC_TRANSFER_MODE.
Kojto 136:ef9c61f8c49f 76
Kojto 136:ef9c61f8c49f 77 This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferDirection().*/
Kojto 136:ef9c61f8c49f 78
Kojto 136:ef9c61f8c49f 79 uint32_t Mode; /*!< Specifies the SPI mode (Master/Slave).
Kojto 136:ef9c61f8c49f 80 This parameter can be a value of @ref SPI_LL_EC_MODE.
Kojto 136:ef9c61f8c49f 81
Kojto 136:ef9c61f8c49f 82 This feature can be modified afterwards using unitary function @ref LL_SPI_SetMode().*/
Kojto 136:ef9c61f8c49f 83
Kojto 136:ef9c61f8c49f 84 uint32_t DataWidth; /*!< Specifies the SPI data width.
Kojto 136:ef9c61f8c49f 85 This parameter can be a value of @ref SPI_LL_EC_DATAWIDTH.
Kojto 136:ef9c61f8c49f 86
Kojto 136:ef9c61f8c49f 87 This feature can be modified afterwards using unitary function @ref LL_SPI_SetDataWidth().*/
Kojto 136:ef9c61f8c49f 88
Kojto 136:ef9c61f8c49f 89 uint32_t ClockPolarity; /*!< Specifies the serial clock steady state.
Kojto 136:ef9c61f8c49f 90 This parameter can be a value of @ref SPI_LL_EC_POLARITY.
Kojto 136:ef9c61f8c49f 91
Kojto 136:ef9c61f8c49f 92 This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPolarity().*/
Kojto 136:ef9c61f8c49f 93
Kojto 136:ef9c61f8c49f 94 uint32_t ClockPhase; /*!< Specifies the clock active edge for the bit capture.
Kojto 136:ef9c61f8c49f 95 This parameter can be a value of @ref SPI_LL_EC_PHASE.
Kojto 136:ef9c61f8c49f 96
Kojto 136:ef9c61f8c49f 97 This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPhase().*/
Kojto 136:ef9c61f8c49f 98
Kojto 136:ef9c61f8c49f 99 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (NSS pin) or by software using the SSI bit.
Kojto 136:ef9c61f8c49f 100 This parameter can be a value of @ref SPI_LL_EC_NSS_MODE.
Kojto 136:ef9c61f8c49f 101
Kojto 136:ef9c61f8c49f 102 This feature can be modified afterwards using unitary function @ref LL_SPI_SetNSSMode().*/
Kojto 136:ef9c61f8c49f 103
Kojto 136:ef9c61f8c49f 104 uint32_t BaudRate; /*!< Specifies the BaudRate prescaler value which will be used to configure the transmit and receive SCK clock.
Kojto 136:ef9c61f8c49f 105 This parameter can be a value of @ref SPI_LL_EC_BAUDRATEPRESCALER.
Kojto 136:ef9c61f8c49f 106 @note The communication clock is derived from the master clock. The slave clock does not need to be set.
Kojto 136:ef9c61f8c49f 107
Kojto 136:ef9c61f8c49f 108 This feature can be modified afterwards using unitary function @ref LL_SPI_SetBaudRatePrescaler().*/
Kojto 136:ef9c61f8c49f 109
Kojto 136:ef9c61f8c49f 110 uint32_t BitOrder; /*!< Specifies whether data transfers start from MSB or LSB bit.
Kojto 136:ef9c61f8c49f 111 This parameter can be a value of @ref SPI_LL_EC_BIT_ORDER.
Kojto 136:ef9c61f8c49f 112
Kojto 136:ef9c61f8c49f 113 This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferBitOrder().*/
Kojto 136:ef9c61f8c49f 114
Kojto 136:ef9c61f8c49f 115 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
Kojto 136:ef9c61f8c49f 116 This parameter can be a value of @ref SPI_LL_EC_CRC_CALCULATION.
Kojto 136:ef9c61f8c49f 117
Kojto 136:ef9c61f8c49f 118 This feature can be modified afterwards using unitary functions @ref LL_SPI_EnableCRC() and @ref LL_SPI_DisableCRC().*/
Kojto 136:ef9c61f8c49f 119
Kojto 136:ef9c61f8c49f 120 uint32_t CRCPoly; /*!< Specifies the polynomial used for the CRC calculation.
Kojto 136:ef9c61f8c49f 121 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF.
Kojto 136:ef9c61f8c49f 122
Kojto 136:ef9c61f8c49f 123 This feature can be modified afterwards using unitary function @ref LL_SPI_SetCRCPolynomial().*/
Kojto 136:ef9c61f8c49f 124
Kojto 136:ef9c61f8c49f 125 } LL_SPI_InitTypeDef;
Kojto 136:ef9c61f8c49f 126
Kojto 136:ef9c61f8c49f 127 /**
Kojto 136:ef9c61f8c49f 128 * @}
Kojto 136:ef9c61f8c49f 129 */
Kojto 136:ef9c61f8c49f 130 #endif /* USE_FULL_LL_DRIVER */
Kojto 136:ef9c61f8c49f 131
Kojto 136:ef9c61f8c49f 132 /* Exported constants --------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 133 /** @defgroup SPI_LL_Exported_Constants SPI Exported Constants
Kojto 136:ef9c61f8c49f 134 * @{
Kojto 136:ef9c61f8c49f 135 */
Kojto 136:ef9c61f8c49f 136
Kojto 136:ef9c61f8c49f 137 /** @defgroup SPI_LL_EC_GET_FLAG Get Flags Defines
Kojto 136:ef9c61f8c49f 138 * @brief Flags defines which can be used with LL_SPI_ReadReg function
Kojto 136:ef9c61f8c49f 139 * @{
Kojto 136:ef9c61f8c49f 140 */
Kojto 136:ef9c61f8c49f 141 #define LL_SPI_SR_RXNE SPI_SR_RXNE /*!< Rx buffer not empty flag */
Kojto 136:ef9c61f8c49f 142 #define LL_SPI_SR_TXE SPI_SR_TXE /*!< Tx buffer empty flag */
Kojto 136:ef9c61f8c49f 143 #define LL_SPI_SR_BSY SPI_SR_BSY /*!< Busy flag */
Kojto 136:ef9c61f8c49f 144 #define LL_SPI_SR_UDR SPI_SR_UDR /*!< Underrun flag */
Kojto 136:ef9c61f8c49f 145 #define LL_SPI_SR_CRCERR SPI_SR_CRCERR /*!< CRC error flag */
Kojto 136:ef9c61f8c49f 146 #define LL_SPI_SR_MODF SPI_SR_MODF /*!< Mode fault flag */
Kojto 136:ef9c61f8c49f 147 #define LL_SPI_SR_OVR SPI_SR_OVR /*!< Overrun flag */
Kojto 136:ef9c61f8c49f 148 #define LL_SPI_SR_FRE SPI_SR_FRE /*!< TI mode frame format error flag */
Kojto 136:ef9c61f8c49f 149 /**
Kojto 136:ef9c61f8c49f 150 * @}
Kojto 136:ef9c61f8c49f 151 */
Kojto 136:ef9c61f8c49f 152
Kojto 136:ef9c61f8c49f 153 /** @defgroup SPI_LL_EC_IT IT Defines
Kojto 136:ef9c61f8c49f 154 * @brief IT defines which can be used with LL_SPI_ReadReg and LL_SPI_WriteReg functions
Kojto 136:ef9c61f8c49f 155 * @{
Kojto 136:ef9c61f8c49f 156 */
Kojto 136:ef9c61f8c49f 157 #define LL_SPI_CR2_RXNEIE SPI_CR2_RXNEIE /*!< Rx buffer not empty interrupt enable */
Kojto 136:ef9c61f8c49f 158 #define LL_SPI_CR2_TXEIE SPI_CR2_TXEIE /*!< Tx buffer empty interrupt enable */
Kojto 136:ef9c61f8c49f 159 #define LL_SPI_CR2_ERRIE SPI_CR2_ERRIE /*!< Error interrupt enable */
Kojto 136:ef9c61f8c49f 160 /**
Kojto 136:ef9c61f8c49f 161 * @}
Kojto 136:ef9c61f8c49f 162 */
Kojto 136:ef9c61f8c49f 163
Kojto 136:ef9c61f8c49f 164 /** @defgroup SPI_LL_EC_MODE Operation Mode
Kojto 136:ef9c61f8c49f 165 * @{
Kojto 136:ef9c61f8c49f 166 */
Kojto 136:ef9c61f8c49f 167 #define LL_SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) /*!< Master configuration */
Kojto 136:ef9c61f8c49f 168 #define LL_SPI_MODE_SLAVE ((uint32_t)0x00000000U) /*!< Slave configuration */
Kojto 136:ef9c61f8c49f 169 /**
Kojto 136:ef9c61f8c49f 170 * @}
Kojto 136:ef9c61f8c49f 171 */
Kojto 136:ef9c61f8c49f 172
Kojto 136:ef9c61f8c49f 173 /** @defgroup SPI_LL_EC_PROTOCOL Serial Protocol
Kojto 136:ef9c61f8c49f 174 * @{
Kojto 136:ef9c61f8c49f 175 */
Kojto 136:ef9c61f8c49f 176 #define LL_SPI_PROTOCOL_MOTOROLA ((uint32_t)0x00000000U) /*!< Motorola mode. Used as default value */
Kojto 136:ef9c61f8c49f 177 #define LL_SPI_PROTOCOL_TI (SPI_CR2_FRF) /*!< TI mode */
Kojto 136:ef9c61f8c49f 178 /**
Kojto 136:ef9c61f8c49f 179 * @}
Kojto 136:ef9c61f8c49f 180 */
Kojto 136:ef9c61f8c49f 181
Kojto 136:ef9c61f8c49f 182 /** @defgroup SPI_LL_EC_PHASE Clock Phase
Kojto 136:ef9c61f8c49f 183 * @{
Kojto 136:ef9c61f8c49f 184 */
Kojto 136:ef9c61f8c49f 185 #define LL_SPI_PHASE_1EDGE ((uint32_t)0x00000000U) /*!< First clock transition is the first data capture edge */
Kojto 136:ef9c61f8c49f 186 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition is the first data capture edge */
Kojto 136:ef9c61f8c49f 187 /**
Kojto 136:ef9c61f8c49f 188 * @}
Kojto 136:ef9c61f8c49f 189 */
Kojto 136:ef9c61f8c49f 190
Kojto 136:ef9c61f8c49f 191 /** @defgroup SPI_LL_EC_POLARITY Clock Polarity
Kojto 136:ef9c61f8c49f 192 * @{
Kojto 136:ef9c61f8c49f 193 */
Kojto 136:ef9c61f8c49f 194 #define LL_SPI_POLARITY_LOW ((uint32_t)0x00000000U) /*!< Clock to 0 when idle */
Kojto 136:ef9c61f8c49f 195 #define LL_SPI_POLARITY_HIGH (SPI_CR1_CPOL) /*!< Clock to 1 when idle */
Kojto 136:ef9c61f8c49f 196 /**
Kojto 136:ef9c61f8c49f 197 * @}
Kojto 136:ef9c61f8c49f 198 */
Kojto 136:ef9c61f8c49f 199
Kojto 136:ef9c61f8c49f 200 /** @defgroup SPI_LL_EC_BAUDRATEPRESCALER Baud Rate Prescaler
Kojto 136:ef9c61f8c49f 201 * @{
Kojto 136:ef9c61f8c49f 202 */
Kojto 136:ef9c61f8c49f 203 #define LL_SPI_BAUDRATEPRESCALER_DIV2 ((uint32_t)0x00000000U) /*!< BaudRate control equal to fPCLK/2 */
Kojto 136:ef9c61f8c49f 204 #define LL_SPI_BAUDRATEPRESCALER_DIV4 (SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/4 */
Kojto 136:ef9c61f8c49f 205 #define LL_SPI_BAUDRATEPRESCALER_DIV8 (SPI_CR1_BR_1) /*!< BaudRate control equal to fPCLK/8 */
Kojto 136:ef9c61f8c49f 206 #define LL_SPI_BAUDRATEPRESCALER_DIV16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/16 */
Kojto 136:ef9c61f8c49f 207 #define LL_SPI_BAUDRATEPRESCALER_DIV32 (SPI_CR1_BR_2) /*!< BaudRate control equal to fPCLK/32 */
Kojto 136:ef9c61f8c49f 208 #define LL_SPI_BAUDRATEPRESCALER_DIV64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/64 */
Kojto 136:ef9c61f8c49f 209 #define LL_SPI_BAUDRATEPRESCALER_DIV128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) /*!< BaudRate control equal to fPCLK/128 */
Kojto 136:ef9c61f8c49f 210 #define LL_SPI_BAUDRATEPRESCALER_DIV256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/256 */
Kojto 136:ef9c61f8c49f 211 /**
Kojto 136:ef9c61f8c49f 212 * @}
Kojto 136:ef9c61f8c49f 213 */
Kojto 136:ef9c61f8c49f 214
Kojto 136:ef9c61f8c49f 215 /** @defgroup SPI_LL_EC_BIT_ORDER Transmission Bit Order
Kojto 136:ef9c61f8c49f 216 * @{
Kojto 136:ef9c61f8c49f 217 */
Kojto 136:ef9c61f8c49f 218 #define LL_SPI_LSB_FIRST (SPI_CR1_LSBFIRST) /*!< Data is transmitted/received with the LSB first */
Kojto 136:ef9c61f8c49f 219 #define LL_SPI_MSB_FIRST ((uint32_t)0x00000000U) /*!< Data is transmitted/received with the MSB first */
Kojto 136:ef9c61f8c49f 220 /**
Kojto 136:ef9c61f8c49f 221 * @}
Kojto 136:ef9c61f8c49f 222 */
Kojto 136:ef9c61f8c49f 223
Kojto 136:ef9c61f8c49f 224 /** @defgroup SPI_LL_EC_TRANSFER_MODE Transfer Mode
Kojto 136:ef9c61f8c49f 225 * @{
Kojto 136:ef9c61f8c49f 226 */
Kojto 136:ef9c61f8c49f 227 #define LL_SPI_FULL_DUPLEX ((uint32_t)0x00000000U) /*!< Full-Duplex mode. Rx and Tx transfer on 2 lines */
Kojto 136:ef9c61f8c49f 228 #define LL_SPI_SIMPLEX_RX (SPI_CR1_RXONLY) /*!< Simplex Rx mode. Rx transfer only on 1 line */
Kojto 136:ef9c61f8c49f 229 #define LL_SPI_HALF_DUPLEX_RX (SPI_CR1_BIDIMODE) /*!< Half-Duplex Rx mode. Rx transfer on 1 line */
Kojto 136:ef9c61f8c49f 230 #define LL_SPI_HALF_DUPLEX_TX (SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE) /*!< Half-Duplex Tx mode. Tx transfer on 1 line */
Kojto 136:ef9c61f8c49f 231 /**
Kojto 136:ef9c61f8c49f 232 * @}
Kojto 136:ef9c61f8c49f 233 */
Kojto 136:ef9c61f8c49f 234
Kojto 136:ef9c61f8c49f 235 /** @defgroup SPI_LL_EC_NSS_MODE Slave Select Pin Mode
Kojto 136:ef9c61f8c49f 236 * @{
Kojto 136:ef9c61f8c49f 237 */
Kojto 136:ef9c61f8c49f 238 #define LL_SPI_NSS_SOFT (SPI_CR1_SSM) /*!< NSS managed internally. NSS pin not used and free */
Kojto 136:ef9c61f8c49f 239 #define LL_SPI_NSS_HARD_INPUT ((uint32_t)0x00000000U) /*!< NSS pin used in Input. Only used in Master mode */
Kojto 136:ef9c61f8c49f 240 #define LL_SPI_NSS_HARD_OUTPUT (((uint32_t)SPI_CR2_SSOE << 16U)) /*!< NSS pin used in Output. Only used in Slave mode as chip select */
Kojto 136:ef9c61f8c49f 241 /**
Kojto 136:ef9c61f8c49f 242 * @}
Kojto 136:ef9c61f8c49f 243 */
Kojto 136:ef9c61f8c49f 244
Kojto 136:ef9c61f8c49f 245 /** @defgroup SPI_LL_EC_DATAWIDTH Datawidth
Kojto 136:ef9c61f8c49f 246 * @{
Kojto 136:ef9c61f8c49f 247 */
Kojto 136:ef9c61f8c49f 248 #define LL_SPI_DATAWIDTH_8BIT ((uint32_t)0x00000000U) /*!< Data length for SPI transfer: 8 bits */
Kojto 136:ef9c61f8c49f 249 #define LL_SPI_DATAWIDTH_16BIT (SPI_CR1_DFF) /*!< Data length for SPI transfer: 16 bits */
Kojto 136:ef9c61f8c49f 250 /**
Kojto 136:ef9c61f8c49f 251 * @}
Kojto 136:ef9c61f8c49f 252 */
Kojto 136:ef9c61f8c49f 253 #if defined(USE_FULL_LL_DRIVER)
Kojto 136:ef9c61f8c49f 254
Kojto 136:ef9c61f8c49f 255 /** @defgroup SPI_LL_EC_CRC_CALCULATION CRC Calculation
Kojto 136:ef9c61f8c49f 256 * @{
Kojto 136:ef9c61f8c49f 257 */
Kojto 136:ef9c61f8c49f 258 #define LL_SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000U) /*!< CRC calculation disabled */
Kojto 136:ef9c61f8c49f 259 #define LL_SPI_CRCCALCULATION_ENABLE (SPI_CR1_CRCEN) /*!< CRC calculation enabled */
Kojto 136:ef9c61f8c49f 260 /**
Kojto 136:ef9c61f8c49f 261 * @}
Kojto 136:ef9c61f8c49f 262 */
Kojto 136:ef9c61f8c49f 263 #endif /* USE_FULL_LL_DRIVER */
Kojto 136:ef9c61f8c49f 264
Kojto 136:ef9c61f8c49f 265 /**
Kojto 136:ef9c61f8c49f 266 * @}
Kojto 136:ef9c61f8c49f 267 */
Kojto 136:ef9c61f8c49f 268
Kojto 136:ef9c61f8c49f 269 /* Exported macro ------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 270 /** @defgroup SPI_LL_Exported_Macros SPI Exported Macros
Kojto 136:ef9c61f8c49f 271 * @{
Kojto 136:ef9c61f8c49f 272 */
Kojto 136:ef9c61f8c49f 273
Kojto 136:ef9c61f8c49f 274 /** @defgroup SPI_LL_EM_WRITE_READ Common Write and read registers Macros
Kojto 136:ef9c61f8c49f 275 * @{
Kojto 136:ef9c61f8c49f 276 */
Kojto 136:ef9c61f8c49f 277
Kojto 136:ef9c61f8c49f 278 /**
Kojto 136:ef9c61f8c49f 279 * @brief Write a value in SPI register
Kojto 136:ef9c61f8c49f 280 * @param __INSTANCE__ SPI Instance
Kojto 136:ef9c61f8c49f 281 * @param __REG__ Register to be written
Kojto 136:ef9c61f8c49f 282 * @param __VALUE__ Value to be written in the register
Kojto 136:ef9c61f8c49f 283 * @retval None
Kojto 136:ef9c61f8c49f 284 */
Kojto 136:ef9c61f8c49f 285 #define LL_SPI_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
Kojto 136:ef9c61f8c49f 286
Kojto 136:ef9c61f8c49f 287 /**
Kojto 136:ef9c61f8c49f 288 * @brief Read a value in SPI register
Kojto 136:ef9c61f8c49f 289 * @param __INSTANCE__ SPI Instance
Kojto 136:ef9c61f8c49f 290 * @param __REG__ Register to be read
Kojto 136:ef9c61f8c49f 291 * @retval Register value
Kojto 136:ef9c61f8c49f 292 */
Kojto 136:ef9c61f8c49f 293 #define LL_SPI_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
Kojto 136:ef9c61f8c49f 294 /**
Kojto 136:ef9c61f8c49f 295 * @}
Kojto 136:ef9c61f8c49f 296 */
Kojto 136:ef9c61f8c49f 297
Kojto 136:ef9c61f8c49f 298 /**
Kojto 136:ef9c61f8c49f 299 * @}
Kojto 136:ef9c61f8c49f 300 */
Kojto 136:ef9c61f8c49f 301
Kojto 136:ef9c61f8c49f 302 /* Exported functions --------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 303 /** @defgroup SPI_LL_Exported_Functions SPI Exported Functions
Kojto 136:ef9c61f8c49f 304 * @{
Kojto 136:ef9c61f8c49f 305 */
Kojto 136:ef9c61f8c49f 306
Kojto 136:ef9c61f8c49f 307 /** @defgroup SPI_LL_EF_Configuration Configuration
Kojto 136:ef9c61f8c49f 308 * @{
Kojto 136:ef9c61f8c49f 309 */
Kojto 136:ef9c61f8c49f 310
Kojto 136:ef9c61f8c49f 311 /**
Kojto 136:ef9c61f8c49f 312 * @brief Enable SPI peripheral
Kojto 136:ef9c61f8c49f 313 * @rmtoll CR1 SPE LL_SPI_Enable
Kojto 136:ef9c61f8c49f 314 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 315 * @retval None
Kojto 136:ef9c61f8c49f 316 */
Kojto 136:ef9c61f8c49f 317 __STATIC_INLINE void LL_SPI_Enable(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 318 {
Kojto 136:ef9c61f8c49f 319 SET_BIT(SPIx->CR1, SPI_CR1_SPE);
Kojto 136:ef9c61f8c49f 320 }
Kojto 136:ef9c61f8c49f 321
Kojto 136:ef9c61f8c49f 322 /**
Kojto 136:ef9c61f8c49f 323 * @brief Disable SPI peripheral
Kojto 136:ef9c61f8c49f 324 * @note When disabling the SPI, follow the procedure described in the Reference Manual.
Kojto 136:ef9c61f8c49f 325 * @rmtoll CR1 SPE LL_SPI_Disable
Kojto 136:ef9c61f8c49f 326 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 327 * @retval None
Kojto 136:ef9c61f8c49f 328 */
Kojto 136:ef9c61f8c49f 329 __STATIC_INLINE void LL_SPI_Disable(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 330 {
Kojto 136:ef9c61f8c49f 331 CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE);
Kojto 136:ef9c61f8c49f 332 }
Kojto 136:ef9c61f8c49f 333
Kojto 136:ef9c61f8c49f 334 /**
Kojto 136:ef9c61f8c49f 335 * @brief Check if SPI peripheral is enabled
Kojto 136:ef9c61f8c49f 336 * @rmtoll CR1 SPE LL_SPI_IsEnabled
Kojto 136:ef9c61f8c49f 337 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 338 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 339 */
Kojto 136:ef9c61f8c49f 340 __STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 341 {
Kojto 136:ef9c61f8c49f 342 return (READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE));
Kojto 136:ef9c61f8c49f 343 }
Kojto 136:ef9c61f8c49f 344
Kojto 136:ef9c61f8c49f 345 /**
Kojto 136:ef9c61f8c49f 346 * @brief Set SPI operation mode to Master or Slave
Kojto 136:ef9c61f8c49f 347 * @note This bit should not be changed when communication is ongoing.
Kojto 136:ef9c61f8c49f 348 * @rmtoll CR1 MSTR LL_SPI_SetMode\n
Kojto 136:ef9c61f8c49f 349 * CR1 SSI LL_SPI_SetMode
Kojto 136:ef9c61f8c49f 350 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 351 * @param Mode This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 352 * @arg @ref LL_SPI_MODE_MASTER
Kojto 136:ef9c61f8c49f 353 * @arg @ref LL_SPI_MODE_SLAVE
Kojto 136:ef9c61f8c49f 354 * @retval None
Kojto 136:ef9c61f8c49f 355 */
Kojto 136:ef9c61f8c49f 356 __STATIC_INLINE void LL_SPI_SetMode(SPI_TypeDef *SPIx, uint32_t Mode)
Kojto 136:ef9c61f8c49f 357 {
Kojto 136:ef9c61f8c49f 358 MODIFY_REG(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI, Mode);
Kojto 136:ef9c61f8c49f 359 }
Kojto 136:ef9c61f8c49f 360
Kojto 136:ef9c61f8c49f 361 /**
Kojto 136:ef9c61f8c49f 362 * @brief Get SPI operation mode (Master or Slave)
Kojto 136:ef9c61f8c49f 363 * @rmtoll CR1 MSTR LL_SPI_GetMode\n
Kojto 136:ef9c61f8c49f 364 * CR1 SSI LL_SPI_GetMode
Kojto 136:ef9c61f8c49f 365 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 366 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 367 * @arg @ref LL_SPI_MODE_MASTER
Kojto 136:ef9c61f8c49f 368 * @arg @ref LL_SPI_MODE_SLAVE
Kojto 136:ef9c61f8c49f 369 */
Kojto 136:ef9c61f8c49f 370 __STATIC_INLINE uint32_t LL_SPI_GetMode(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 371 {
Kojto 136:ef9c61f8c49f 372 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI));
Kojto 136:ef9c61f8c49f 373 }
Kojto 136:ef9c61f8c49f 374
Kojto 136:ef9c61f8c49f 375 /**
Kojto 136:ef9c61f8c49f 376 * @brief Set serial protocol used
Kojto 136:ef9c61f8c49f 377 * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
Kojto 136:ef9c61f8c49f 378 * @rmtoll CR2 FRF LL_SPI_SetStandard
Kojto 136:ef9c61f8c49f 379 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 380 * @param Standard This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 381 * @arg @ref LL_SPI_PROTOCOL_MOTOROLA
Kojto 136:ef9c61f8c49f 382 * @arg @ref LL_SPI_PROTOCOL_TI
Kojto 136:ef9c61f8c49f 383 * @retval None
Kojto 136:ef9c61f8c49f 384 */
Kojto 136:ef9c61f8c49f 385 __STATIC_INLINE void LL_SPI_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard)
Kojto 136:ef9c61f8c49f 386 {
Kojto 136:ef9c61f8c49f 387 MODIFY_REG(SPIx->CR2, SPI_CR2_FRF, Standard);
Kojto 136:ef9c61f8c49f 388 }
Kojto 136:ef9c61f8c49f 389
Kojto 136:ef9c61f8c49f 390 /**
Kojto 136:ef9c61f8c49f 391 * @brief Get serial protocol used
Kojto 136:ef9c61f8c49f 392 * @rmtoll CR2 FRF LL_SPI_GetStandard
Kojto 136:ef9c61f8c49f 393 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 394 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 395 * @arg @ref LL_SPI_PROTOCOL_MOTOROLA
Kojto 136:ef9c61f8c49f 396 * @arg @ref LL_SPI_PROTOCOL_TI
Kojto 136:ef9c61f8c49f 397 */
Kojto 136:ef9c61f8c49f 398 __STATIC_INLINE uint32_t LL_SPI_GetStandard(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 399 {
Kojto 136:ef9c61f8c49f 400 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF));
Kojto 136:ef9c61f8c49f 401 }
Kojto 136:ef9c61f8c49f 402
Kojto 136:ef9c61f8c49f 403 /**
Kojto 136:ef9c61f8c49f 404 * @brief Set clock phase
Kojto 136:ef9c61f8c49f 405 * @note This bit should not be changed when communication is ongoing.
Kojto 136:ef9c61f8c49f 406 * This bit is not used in SPI TI mode.
Kojto 136:ef9c61f8c49f 407 * @rmtoll CR1 CPHA LL_SPI_SetClockPhase
Kojto 136:ef9c61f8c49f 408 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 409 * @param ClockPhase This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 410 * @arg @ref LL_SPI_PHASE_1EDGE
Kojto 136:ef9c61f8c49f 411 * @arg @ref LL_SPI_PHASE_2EDGE
Kojto 136:ef9c61f8c49f 412 * @retval None
Kojto 136:ef9c61f8c49f 413 */
Kojto 136:ef9c61f8c49f 414 __STATIC_INLINE void LL_SPI_SetClockPhase(SPI_TypeDef *SPIx, uint32_t ClockPhase)
Kojto 136:ef9c61f8c49f 415 {
Kojto 136:ef9c61f8c49f 416 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase);
Kojto 136:ef9c61f8c49f 417 }
Kojto 136:ef9c61f8c49f 418
Kojto 136:ef9c61f8c49f 419 /**
Kojto 136:ef9c61f8c49f 420 * @brief Get clock phase
Kojto 136:ef9c61f8c49f 421 * @rmtoll CR1 CPHA LL_SPI_GetClockPhase
Kojto 136:ef9c61f8c49f 422 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 423 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 424 * @arg @ref LL_SPI_PHASE_1EDGE
Kojto 136:ef9c61f8c49f 425 * @arg @ref LL_SPI_PHASE_2EDGE
Kojto 136:ef9c61f8c49f 426 */
Kojto 136:ef9c61f8c49f 427 __STATIC_INLINE uint32_t LL_SPI_GetClockPhase(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 428 {
Kojto 136:ef9c61f8c49f 429 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA));
Kojto 136:ef9c61f8c49f 430 }
Kojto 136:ef9c61f8c49f 431
Kojto 136:ef9c61f8c49f 432 /**
Kojto 136:ef9c61f8c49f 433 * @brief Set clock polarity
Kojto 136:ef9c61f8c49f 434 * @note This bit should not be changed when communication is ongoing.
Kojto 136:ef9c61f8c49f 435 * This bit is not used in SPI TI mode.
Kojto 136:ef9c61f8c49f 436 * @rmtoll CR1 CPOL LL_SPI_SetClockPolarity
Kojto 136:ef9c61f8c49f 437 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 438 * @param ClockPolarity This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 439 * @arg @ref LL_SPI_POLARITY_LOW
Kojto 136:ef9c61f8c49f 440 * @arg @ref LL_SPI_POLARITY_HIGH
Kojto 136:ef9c61f8c49f 441 * @retval None
Kojto 136:ef9c61f8c49f 442 */
Kojto 136:ef9c61f8c49f 443 __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity)
Kojto 136:ef9c61f8c49f 444 {
Kojto 136:ef9c61f8c49f 445 MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity);
Kojto 136:ef9c61f8c49f 446 }
Kojto 136:ef9c61f8c49f 447
Kojto 136:ef9c61f8c49f 448 /**
Kojto 136:ef9c61f8c49f 449 * @brief Get clock polarity
Kojto 136:ef9c61f8c49f 450 * @rmtoll CR1 CPOL LL_SPI_GetClockPolarity
Kojto 136:ef9c61f8c49f 451 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 452 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 453 * @arg @ref LL_SPI_POLARITY_LOW
Kojto 136:ef9c61f8c49f 454 * @arg @ref LL_SPI_POLARITY_HIGH
Kojto 136:ef9c61f8c49f 455 */
Kojto 136:ef9c61f8c49f 456 __STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 457 {
Kojto 136:ef9c61f8c49f 458 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPOL));
Kojto 136:ef9c61f8c49f 459 }
Kojto 136:ef9c61f8c49f 460
Kojto 136:ef9c61f8c49f 461 /**
Kojto 136:ef9c61f8c49f 462 * @brief Set baud rate prescaler
Kojto 136:ef9c61f8c49f 463 * @note These bits should not be changed when communication is ongoing. SPI BaudRate = fPCLK/Prescaler.
Kojto 136:ef9c61f8c49f 464 * @rmtoll CR1 BR LL_SPI_SetBaudRatePrescaler
Kojto 136:ef9c61f8c49f 465 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 466 * @param BaudRate This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 467 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2
Kojto 136:ef9c61f8c49f 468 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4
Kojto 136:ef9c61f8c49f 469 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV8
Kojto 136:ef9c61f8c49f 470 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV16
Kojto 136:ef9c61f8c49f 471 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV32
Kojto 136:ef9c61f8c49f 472 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV64
Kojto 136:ef9c61f8c49f 473 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128
Kojto 136:ef9c61f8c49f 474 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256
Kojto 136:ef9c61f8c49f 475 * @retval None
Kojto 136:ef9c61f8c49f 476 */
Kojto 136:ef9c61f8c49f 477 __STATIC_INLINE void LL_SPI_SetBaudRatePrescaler(SPI_TypeDef *SPIx, uint32_t BaudRate)
Kojto 136:ef9c61f8c49f 478 {
Kojto 136:ef9c61f8c49f 479 MODIFY_REG(SPIx->CR1, SPI_CR1_BR, BaudRate);
Kojto 136:ef9c61f8c49f 480 }
Kojto 136:ef9c61f8c49f 481
Kojto 136:ef9c61f8c49f 482 /**
Kojto 136:ef9c61f8c49f 483 * @brief Get baud rate prescaler
Kojto 136:ef9c61f8c49f 484 * @rmtoll CR1 BR LL_SPI_GetBaudRatePrescaler
Kojto 136:ef9c61f8c49f 485 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 486 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 487 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2
Kojto 136:ef9c61f8c49f 488 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4
Kojto 136:ef9c61f8c49f 489 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV8
Kojto 136:ef9c61f8c49f 490 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV16
Kojto 136:ef9c61f8c49f 491 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV32
Kojto 136:ef9c61f8c49f 492 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV64
Kojto 136:ef9c61f8c49f 493 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128
Kojto 136:ef9c61f8c49f 494 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256
Kojto 136:ef9c61f8c49f 495 */
Kojto 136:ef9c61f8c49f 496 __STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 497 {
Kojto 136:ef9c61f8c49f 498 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_BR));
Kojto 136:ef9c61f8c49f 499 }
Kojto 136:ef9c61f8c49f 500
Kojto 136:ef9c61f8c49f 501 /**
Kojto 136:ef9c61f8c49f 502 * @brief Set transfer bit order
Kojto 136:ef9c61f8c49f 503 * @note This bit should not be changed when communication is ongoing. This bit is not used in SPI TI mode.
Kojto 136:ef9c61f8c49f 504 * @rmtoll CR1 LSBFIRST LL_SPI_SetTransferBitOrder
Kojto 136:ef9c61f8c49f 505 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 506 * @param BitOrder This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 507 * @arg @ref LL_SPI_LSB_FIRST
Kojto 136:ef9c61f8c49f 508 * @arg @ref LL_SPI_MSB_FIRST
Kojto 136:ef9c61f8c49f 509 * @retval None
Kojto 136:ef9c61f8c49f 510 */
Kojto 136:ef9c61f8c49f 511 __STATIC_INLINE void LL_SPI_SetTransferBitOrder(SPI_TypeDef *SPIx, uint32_t BitOrder)
Kojto 136:ef9c61f8c49f 512 {
Kojto 136:ef9c61f8c49f 513 MODIFY_REG(SPIx->CR1, SPI_CR1_LSBFIRST, BitOrder);
Kojto 136:ef9c61f8c49f 514 }
Kojto 136:ef9c61f8c49f 515
Kojto 136:ef9c61f8c49f 516 /**
Kojto 136:ef9c61f8c49f 517 * @brief Get transfer bit order
Kojto 136:ef9c61f8c49f 518 * @rmtoll CR1 LSBFIRST LL_SPI_GetTransferBitOrder
Kojto 136:ef9c61f8c49f 519 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 520 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 521 * @arg @ref LL_SPI_LSB_FIRST
Kojto 136:ef9c61f8c49f 522 * @arg @ref LL_SPI_MSB_FIRST
Kojto 136:ef9c61f8c49f 523 */
Kojto 136:ef9c61f8c49f 524 __STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 525 {
Kojto 136:ef9c61f8c49f 526 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_LSBFIRST));
Kojto 136:ef9c61f8c49f 527 }
Kojto 136:ef9c61f8c49f 528
Kojto 136:ef9c61f8c49f 529 /**
Kojto 136:ef9c61f8c49f 530 * @brief Set transfer direction mode
Kojto 136:ef9c61f8c49f 531 * @note For Half-Duplex mode, Rx Direction is set by default.
Kojto 136:ef9c61f8c49f 532 * In master mode, the MOSI pin is used and in slave mode, the MISO pin is used for Half-Duplex.
Kojto 136:ef9c61f8c49f 533 * @rmtoll CR1 RXONLY LL_SPI_SetTransferDirection\n
Kojto 136:ef9c61f8c49f 534 * CR1 BIDIMODE LL_SPI_SetTransferDirection\n
Kojto 136:ef9c61f8c49f 535 * CR1 BIDIOE LL_SPI_SetTransferDirection
Kojto 136:ef9c61f8c49f 536 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 537 * @param TransferDirection This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 538 * @arg @ref LL_SPI_FULL_DUPLEX
Kojto 136:ef9c61f8c49f 539 * @arg @ref LL_SPI_SIMPLEX_RX
Kojto 136:ef9c61f8c49f 540 * @arg @ref LL_SPI_HALF_DUPLEX_RX
Kojto 136:ef9c61f8c49f 541 * @arg @ref LL_SPI_HALF_DUPLEX_TX
Kojto 136:ef9c61f8c49f 542 * @retval None
Kojto 136:ef9c61f8c49f 543 */
Kojto 136:ef9c61f8c49f 544 __STATIC_INLINE void LL_SPI_SetTransferDirection(SPI_TypeDef *SPIx, uint32_t TransferDirection)
Kojto 136:ef9c61f8c49f 545 {
Kojto 136:ef9c61f8c49f 546 MODIFY_REG(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE, TransferDirection);
Kojto 136:ef9c61f8c49f 547 }
Kojto 136:ef9c61f8c49f 548
Kojto 136:ef9c61f8c49f 549 /**
Kojto 136:ef9c61f8c49f 550 * @brief Get transfer direction mode
Kojto 136:ef9c61f8c49f 551 * @rmtoll CR1 RXONLY LL_SPI_GetTransferDirection\n
Kojto 136:ef9c61f8c49f 552 * CR1 BIDIMODE LL_SPI_GetTransferDirection\n
Kojto 136:ef9c61f8c49f 553 * CR1 BIDIOE LL_SPI_GetTransferDirection
Kojto 136:ef9c61f8c49f 554 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 555 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 556 * @arg @ref LL_SPI_FULL_DUPLEX
Kojto 136:ef9c61f8c49f 557 * @arg @ref LL_SPI_SIMPLEX_RX
Kojto 136:ef9c61f8c49f 558 * @arg @ref LL_SPI_HALF_DUPLEX_RX
Kojto 136:ef9c61f8c49f 559 * @arg @ref LL_SPI_HALF_DUPLEX_TX
Kojto 136:ef9c61f8c49f 560 */
Kojto 136:ef9c61f8c49f 561 __STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 562 {
Kojto 136:ef9c61f8c49f 563 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE));
Kojto 136:ef9c61f8c49f 564 }
Kojto 136:ef9c61f8c49f 565
Kojto 136:ef9c61f8c49f 566 /**
Kojto 136:ef9c61f8c49f 567 * @brief Set frame data width
Kojto 136:ef9c61f8c49f 568 * @rmtoll CR1 DFF LL_SPI_SetDataWidth
Kojto 136:ef9c61f8c49f 569 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 570 * @param DataWidth This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 571 * @arg @ref LL_SPI_DATAWIDTH_8BIT
Kojto 136:ef9c61f8c49f 572 * @arg @ref LL_SPI_DATAWIDTH_16BIT
Kojto 136:ef9c61f8c49f 573 * @retval None
Kojto 136:ef9c61f8c49f 574 */
Kojto 136:ef9c61f8c49f 575 __STATIC_INLINE void LL_SPI_SetDataWidth(SPI_TypeDef *SPIx, uint32_t DataWidth)
Kojto 136:ef9c61f8c49f 576 {
Kojto 136:ef9c61f8c49f 577 MODIFY_REG(SPIx->CR1, SPI_CR1_DFF, DataWidth);
Kojto 136:ef9c61f8c49f 578 }
Kojto 136:ef9c61f8c49f 579
Kojto 136:ef9c61f8c49f 580 /**
Kojto 136:ef9c61f8c49f 581 * @brief Get frame data width
Kojto 136:ef9c61f8c49f 582 * @rmtoll CR1 DFF LL_SPI_GetDataWidth
Kojto 136:ef9c61f8c49f 583 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 584 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 585 * @arg @ref LL_SPI_DATAWIDTH_8BIT
Kojto 136:ef9c61f8c49f 586 * @arg @ref LL_SPI_DATAWIDTH_16BIT
Kojto 136:ef9c61f8c49f 587 */
Kojto 136:ef9c61f8c49f 588 __STATIC_INLINE uint32_t LL_SPI_GetDataWidth(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 589 {
Kojto 136:ef9c61f8c49f 590 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_DFF));
Kojto 136:ef9c61f8c49f 591 }
Kojto 136:ef9c61f8c49f 592
Kojto 136:ef9c61f8c49f 593 /**
Kojto 136:ef9c61f8c49f 594 * @}
Kojto 136:ef9c61f8c49f 595 */
Kojto 136:ef9c61f8c49f 596
Kojto 136:ef9c61f8c49f 597 /** @defgroup SPI_LL_EF_CRC_Management CRC Management
Kojto 136:ef9c61f8c49f 598 * @{
Kojto 136:ef9c61f8c49f 599 */
Kojto 136:ef9c61f8c49f 600
Kojto 136:ef9c61f8c49f 601 /**
Kojto 136:ef9c61f8c49f 602 * @brief Enable CRC
Kojto 136:ef9c61f8c49f 603 * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
Kojto 136:ef9c61f8c49f 604 * @rmtoll CR1 CRCEN LL_SPI_EnableCRC
Kojto 136:ef9c61f8c49f 605 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 606 * @retval None
Kojto 136:ef9c61f8c49f 607 */
Kojto 136:ef9c61f8c49f 608 __STATIC_INLINE void LL_SPI_EnableCRC(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 609 {
Kojto 136:ef9c61f8c49f 610 SET_BIT(SPIx->CR1, SPI_CR1_CRCEN);
Kojto 136:ef9c61f8c49f 611 }
Kojto 136:ef9c61f8c49f 612
Kojto 136:ef9c61f8c49f 613 /**
Kojto 136:ef9c61f8c49f 614 * @brief Disable CRC
Kojto 136:ef9c61f8c49f 615 * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
Kojto 136:ef9c61f8c49f 616 * @rmtoll CR1 CRCEN LL_SPI_DisableCRC
Kojto 136:ef9c61f8c49f 617 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 618 * @retval None
Kojto 136:ef9c61f8c49f 619 */
Kojto 136:ef9c61f8c49f 620 __STATIC_INLINE void LL_SPI_DisableCRC(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 621 {
Kojto 136:ef9c61f8c49f 622 CLEAR_BIT(SPIx->CR1, SPI_CR1_CRCEN);
Kojto 136:ef9c61f8c49f 623 }
Kojto 136:ef9c61f8c49f 624
Kojto 136:ef9c61f8c49f 625 /**
Kojto 136:ef9c61f8c49f 626 * @brief Check if CRC is enabled
Kojto 136:ef9c61f8c49f 627 * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
Kojto 136:ef9c61f8c49f 628 * @rmtoll CR1 CRCEN LL_SPI_IsEnabledCRC
Kojto 136:ef9c61f8c49f 629 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 630 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 631 */
Kojto 136:ef9c61f8c49f 632 __STATIC_INLINE uint32_t LL_SPI_IsEnabledCRC(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 633 {
Kojto 136:ef9c61f8c49f 634 return (READ_BIT(SPIx->CR1, SPI_CR1_CRCEN) == (SPI_CR1_CRCEN));
Kojto 136:ef9c61f8c49f 635 }
Kojto 136:ef9c61f8c49f 636
Kojto 136:ef9c61f8c49f 637 /**
Kojto 136:ef9c61f8c49f 638 * @brief Set CRCNext to transfer CRC on the line
Kojto 136:ef9c61f8c49f 639 * @note This bit has to be written as soon as the last data is written in the SPIx_DR register.
Kojto 136:ef9c61f8c49f 640 * @rmtoll CR1 CRCNEXT LL_SPI_SetCRCNext
Kojto 136:ef9c61f8c49f 641 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 642 * @retval None
Kojto 136:ef9c61f8c49f 643 */
Kojto 136:ef9c61f8c49f 644 __STATIC_INLINE void LL_SPI_SetCRCNext(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 645 {
Kojto 136:ef9c61f8c49f 646 SET_BIT(SPIx->CR1, SPI_CR1_CRCNEXT);
Kojto 136:ef9c61f8c49f 647 }
Kojto 136:ef9c61f8c49f 648
Kojto 136:ef9c61f8c49f 649 /**
Kojto 136:ef9c61f8c49f 650 * @brief Set polynomial for CRC calculation
Kojto 136:ef9c61f8c49f 651 * @rmtoll CRCPR CRCPOLY LL_SPI_SetCRCPolynomial
Kojto 136:ef9c61f8c49f 652 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 653 * @param CRCPoly This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF
Kojto 136:ef9c61f8c49f 654 * @retval None
Kojto 136:ef9c61f8c49f 655 */
Kojto 136:ef9c61f8c49f 656 __STATIC_INLINE void LL_SPI_SetCRCPolynomial(SPI_TypeDef *SPIx, uint32_t CRCPoly)
Kojto 136:ef9c61f8c49f 657 {
Kojto 136:ef9c61f8c49f 658 WRITE_REG(SPIx->CRCPR, (uint16_t)CRCPoly);
Kojto 136:ef9c61f8c49f 659 }
Kojto 136:ef9c61f8c49f 660
Kojto 136:ef9c61f8c49f 661 /**
Kojto 136:ef9c61f8c49f 662 * @brief Get polynomial for CRC calculation
Kojto 136:ef9c61f8c49f 663 * @rmtoll CRCPR CRCPOLY LL_SPI_GetCRCPolynomial
Kojto 136:ef9c61f8c49f 664 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 665 * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
Kojto 136:ef9c61f8c49f 666 */
Kojto 136:ef9c61f8c49f 667 __STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 668 {
Kojto 136:ef9c61f8c49f 669 return (uint32_t)(READ_REG(SPIx->CRCPR));
Kojto 136:ef9c61f8c49f 670 }
Kojto 136:ef9c61f8c49f 671
Kojto 136:ef9c61f8c49f 672 /**
Kojto 136:ef9c61f8c49f 673 * @brief Get Rx CRC
Kojto 136:ef9c61f8c49f 674 * @rmtoll RXCRCR RXCRC LL_SPI_GetRxCRC
Kojto 136:ef9c61f8c49f 675 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 676 * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
Kojto 136:ef9c61f8c49f 677 */
Kojto 136:ef9c61f8c49f 678 __STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 679 {
Kojto 136:ef9c61f8c49f 680 return (uint32_t)(READ_REG(SPIx->RXCRCR));
Kojto 136:ef9c61f8c49f 681 }
Kojto 136:ef9c61f8c49f 682
Kojto 136:ef9c61f8c49f 683 /**
Kojto 136:ef9c61f8c49f 684 * @brief Get Tx CRC
Kojto 136:ef9c61f8c49f 685 * @rmtoll TXCRCR TXCRC LL_SPI_GetTxCRC
Kojto 136:ef9c61f8c49f 686 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 687 * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
Kojto 136:ef9c61f8c49f 688 */
Kojto 136:ef9c61f8c49f 689 __STATIC_INLINE uint32_t LL_SPI_GetTxCRC(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 690 {
Kojto 136:ef9c61f8c49f 691 return (uint32_t)(READ_REG(SPIx->TXCRCR));
Kojto 136:ef9c61f8c49f 692 }
Kojto 136:ef9c61f8c49f 693
Kojto 136:ef9c61f8c49f 694 /**
Kojto 136:ef9c61f8c49f 695 * @}
Kojto 136:ef9c61f8c49f 696 */
Kojto 136:ef9c61f8c49f 697
Kojto 136:ef9c61f8c49f 698 /** @defgroup SPI_LL_EF_NSS_Management Slave Select Pin Management
Kojto 136:ef9c61f8c49f 699 * @{
Kojto 136:ef9c61f8c49f 700 */
Kojto 136:ef9c61f8c49f 701
Kojto 136:ef9c61f8c49f 702 /**
Kojto 136:ef9c61f8c49f 703 * @brief Set NSS mode
Kojto 136:ef9c61f8c49f 704 * @note LL_SPI_NSS_SOFT Mode is not used in SPI TI mode.
Kojto 136:ef9c61f8c49f 705 * @rmtoll CR1 SSM LL_SPI_SetNSSMode\n
Kojto 136:ef9c61f8c49f 706 * @rmtoll CR2 SSOE LL_SPI_SetNSSMode
Kojto 136:ef9c61f8c49f 707 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 708 * @param NSS This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 709 * @arg @ref LL_SPI_NSS_SOFT
Kojto 136:ef9c61f8c49f 710 * @arg @ref LL_SPI_NSS_HARD_INPUT
Kojto 136:ef9c61f8c49f 711 * @arg @ref LL_SPI_NSS_HARD_OUTPUT
Kojto 136:ef9c61f8c49f 712 * @retval None
Kojto 136:ef9c61f8c49f 713 */
Kojto 136:ef9c61f8c49f 714 __STATIC_INLINE void LL_SPI_SetNSSMode(SPI_TypeDef *SPIx, uint32_t NSS)
Kojto 136:ef9c61f8c49f 715 {
Kojto 136:ef9c61f8c49f 716 MODIFY_REG(SPIx->CR1, SPI_CR1_SSM, NSS);
Kojto 136:ef9c61f8c49f 717 MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, ((uint32_t)(NSS >> 16U)));
Kojto 136:ef9c61f8c49f 718 }
Kojto 136:ef9c61f8c49f 719
Kojto 136:ef9c61f8c49f 720 /**
Kojto 136:ef9c61f8c49f 721 * @brief Get NSS mode
Kojto 136:ef9c61f8c49f 722 * @rmtoll CR1 SSM LL_SPI_GetNSSMode\n
Kojto 136:ef9c61f8c49f 723 * @rmtoll CR2 SSOE LL_SPI_GetNSSMode
Kojto 136:ef9c61f8c49f 724 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 725 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 726 * @arg @ref LL_SPI_NSS_SOFT
Kojto 136:ef9c61f8c49f 727 * @arg @ref LL_SPI_NSS_HARD_INPUT
Kojto 136:ef9c61f8c49f 728 * @arg @ref LL_SPI_NSS_HARD_OUTPUT
Kojto 136:ef9c61f8c49f 729 */
Kojto 136:ef9c61f8c49f 730 __STATIC_INLINE uint32_t LL_SPI_GetNSSMode(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 731 {
Kojto 136:ef9c61f8c49f 732 register uint32_t Ssm = (READ_BIT(SPIx->CR1, SPI_CR1_SSM));
Kojto 136:ef9c61f8c49f 733 register uint32_t Ssoe = (READ_BIT(SPIx->CR2, SPI_CR2_SSOE) << 16U);
Kojto 136:ef9c61f8c49f 734 return (Ssm | Ssoe);
Kojto 136:ef9c61f8c49f 735 }
Kojto 136:ef9c61f8c49f 736
Kojto 136:ef9c61f8c49f 737 /**
Kojto 136:ef9c61f8c49f 738 * @}
Kojto 136:ef9c61f8c49f 739 */
Kojto 136:ef9c61f8c49f 740
Kojto 136:ef9c61f8c49f 741 /** @defgroup SPI_LL_EF_FLAG_Management FLAG Management
Kojto 136:ef9c61f8c49f 742 * @{
Kojto 136:ef9c61f8c49f 743 */
Kojto 136:ef9c61f8c49f 744
Kojto 136:ef9c61f8c49f 745 /**
Kojto 136:ef9c61f8c49f 746 * @brief Check if Rx buffer is not empty
Kojto 136:ef9c61f8c49f 747 * @rmtoll SR RXNE LL_SPI_IsActiveFlag_RXNE
Kojto 136:ef9c61f8c49f 748 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 749 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 750 */
Kojto 136:ef9c61f8c49f 751 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 752 {
Kojto 136:ef9c61f8c49f 753 return (READ_BIT(SPIx->SR, SPI_SR_RXNE) == (SPI_SR_RXNE));
Kojto 136:ef9c61f8c49f 754 }
Kojto 136:ef9c61f8c49f 755
Kojto 136:ef9c61f8c49f 756 /**
Kojto 136:ef9c61f8c49f 757 * @brief Check if Tx buffer is empty
Kojto 136:ef9c61f8c49f 758 * @rmtoll SR TXE LL_SPI_IsActiveFlag_TXE
Kojto 136:ef9c61f8c49f 759 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 760 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 761 */
Kojto 136:ef9c61f8c49f 762 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 763 {
Kojto 136:ef9c61f8c49f 764 return (READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE));
Kojto 136:ef9c61f8c49f 765 }
Kojto 136:ef9c61f8c49f 766
Kojto 136:ef9c61f8c49f 767 /**
Kojto 136:ef9c61f8c49f 768 * @brief Get CRC error flag
Kojto 136:ef9c61f8c49f 769 * @rmtoll SR CRCERR LL_SPI_IsActiveFlag_CRCERR
Kojto 136:ef9c61f8c49f 770 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 771 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 772 */
Kojto 136:ef9c61f8c49f 773 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 774 {
Kojto 136:ef9c61f8c49f 775 return (READ_BIT(SPIx->SR, SPI_SR_CRCERR) == (SPI_SR_CRCERR));
Kojto 136:ef9c61f8c49f 776 }
Kojto 136:ef9c61f8c49f 777
Kojto 136:ef9c61f8c49f 778 /**
Kojto 136:ef9c61f8c49f 779 * @brief Get mode fault error flag
Kojto 136:ef9c61f8c49f 780 * @rmtoll SR MODF LL_SPI_IsActiveFlag_MODF
Kojto 136:ef9c61f8c49f 781 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 782 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 783 */
Kojto 136:ef9c61f8c49f 784 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 785 {
Kojto 136:ef9c61f8c49f 786 return (READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF));
Kojto 136:ef9c61f8c49f 787 }
Kojto 136:ef9c61f8c49f 788
Kojto 136:ef9c61f8c49f 789 /**
Kojto 136:ef9c61f8c49f 790 * @brief Get overrun error flag
Kojto 136:ef9c61f8c49f 791 * @rmtoll SR OVR LL_SPI_IsActiveFlag_OVR
Kojto 136:ef9c61f8c49f 792 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 793 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 794 */
Kojto 136:ef9c61f8c49f 795 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 796 {
Kojto 136:ef9c61f8c49f 797 return (READ_BIT(SPIx->SR, SPI_SR_OVR) == (SPI_SR_OVR));
Kojto 136:ef9c61f8c49f 798 }
Kojto 136:ef9c61f8c49f 799
Kojto 136:ef9c61f8c49f 800 /**
Kojto 136:ef9c61f8c49f 801 * @brief Get busy flag
Kojto 136:ef9c61f8c49f 802 * @note The BSY flag is cleared under any one of the following conditions:
Kojto 136:ef9c61f8c49f 803 * -When the SPI is correctly disabled
Kojto 136:ef9c61f8c49f 804 * -When a fault is detected in Master mode (MODF bit set to 1)
Kojto 136:ef9c61f8c49f 805 * -In Master mode, when it finishes a data transmission and no new data is ready to be
Kojto 136:ef9c61f8c49f 806 * sent
Kojto 136:ef9c61f8c49f 807 * -In Slave mode, when the BSY flag is set to '0' for at least one SPI clock cycle between
Kojto 136:ef9c61f8c49f 808 * each data transfer.
Kojto 136:ef9c61f8c49f 809 * @rmtoll SR BSY LL_SPI_IsActiveFlag_BSY
Kojto 136:ef9c61f8c49f 810 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 811 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 812 */
Kojto 136:ef9c61f8c49f 813 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 814 {
Kojto 136:ef9c61f8c49f 815 return (READ_BIT(SPIx->SR, SPI_SR_BSY) == (SPI_SR_BSY));
Kojto 136:ef9c61f8c49f 816 }
Kojto 136:ef9c61f8c49f 817
Kojto 136:ef9c61f8c49f 818 /**
Kojto 136:ef9c61f8c49f 819 * @brief Get frame format error flag
Kojto 136:ef9c61f8c49f 820 * @rmtoll SR FRE LL_SPI_IsActiveFlag_FRE
Kojto 136:ef9c61f8c49f 821 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 822 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 823 */
Kojto 136:ef9c61f8c49f 824 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 825 {
Kojto 136:ef9c61f8c49f 826 return (READ_BIT(SPIx->SR, SPI_SR_FRE) == (SPI_SR_FRE));
Kojto 136:ef9c61f8c49f 827 }
Kojto 136:ef9c61f8c49f 828
Kojto 136:ef9c61f8c49f 829 /**
Kojto 136:ef9c61f8c49f 830 * @brief Clear CRC error flag
Kojto 136:ef9c61f8c49f 831 * @rmtoll SR CRCERR LL_SPI_ClearFlag_CRCERR
Kojto 136:ef9c61f8c49f 832 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 833 * @retval None
Kojto 136:ef9c61f8c49f 834 */
Kojto 136:ef9c61f8c49f 835 __STATIC_INLINE void LL_SPI_ClearFlag_CRCERR(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 836 {
Kojto 136:ef9c61f8c49f 837 CLEAR_BIT(SPIx->SR, SPI_SR_CRCERR);
Kojto 136:ef9c61f8c49f 838 }
Kojto 136:ef9c61f8c49f 839
Kojto 136:ef9c61f8c49f 840 /**
Kojto 136:ef9c61f8c49f 841 * @brief Clear mode fault error flag
Kojto 136:ef9c61f8c49f 842 * @note Clearing this flag is done by a read access to the SPIx_SR
Kojto 136:ef9c61f8c49f 843 * register followed by a write access to the SPIx_CR1 register
Kojto 136:ef9c61f8c49f 844 * @rmtoll SR MODF LL_SPI_ClearFlag_MODF
Kojto 136:ef9c61f8c49f 845 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 846 * @retval None
Kojto 136:ef9c61f8c49f 847 */
Kojto 136:ef9c61f8c49f 848 __STATIC_INLINE void LL_SPI_ClearFlag_MODF(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 849 {
Kojto 136:ef9c61f8c49f 850 __IO uint32_t tmpreg;
Kojto 136:ef9c61f8c49f 851 tmpreg = SPIx->SR;
Kojto 136:ef9c61f8c49f 852 (void) tmpreg;
Kojto 136:ef9c61f8c49f 853 tmpreg = CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE);
Kojto 136:ef9c61f8c49f 854 (void) tmpreg;
Kojto 136:ef9c61f8c49f 855 }
Kojto 136:ef9c61f8c49f 856
Kojto 136:ef9c61f8c49f 857 /**
Kojto 136:ef9c61f8c49f 858 * @brief Clear overrun error flag
Kojto 136:ef9c61f8c49f 859 * @note Clearing this flag is done by a read access to the SPIx_DR
Kojto 136:ef9c61f8c49f 860 * register followed by a read access to the SPIx_SR register
Kojto 136:ef9c61f8c49f 861 * @rmtoll SR OVR LL_SPI_ClearFlag_OVR
Kojto 136:ef9c61f8c49f 862 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 863 * @retval None
Kojto 136:ef9c61f8c49f 864 */
Kojto 136:ef9c61f8c49f 865 __STATIC_INLINE void LL_SPI_ClearFlag_OVR(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 866 {
Kojto 136:ef9c61f8c49f 867 __IO uint32_t tmpreg;
Kojto 136:ef9c61f8c49f 868 tmpreg = SPIx->DR;
Kojto 136:ef9c61f8c49f 869 (void) tmpreg;
Kojto 136:ef9c61f8c49f 870 tmpreg = SPIx->SR;
Kojto 136:ef9c61f8c49f 871 (void) tmpreg;
Kojto 136:ef9c61f8c49f 872 }
Kojto 136:ef9c61f8c49f 873
Kojto 136:ef9c61f8c49f 874 /**
Kojto 136:ef9c61f8c49f 875 * @brief Clear frame format error flag
Kojto 136:ef9c61f8c49f 876 * @note Clearing this flag is done by reading SPIx_SR register
Kojto 136:ef9c61f8c49f 877 * @rmtoll SR FRE LL_SPI_ClearFlag_FRE
Kojto 136:ef9c61f8c49f 878 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 879 * @retval None
Kojto 136:ef9c61f8c49f 880 */
Kojto 136:ef9c61f8c49f 881 __STATIC_INLINE void LL_SPI_ClearFlag_FRE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 882 {
Kojto 136:ef9c61f8c49f 883 __IO uint32_t tmpreg;
Kojto 136:ef9c61f8c49f 884 tmpreg = SPIx->SR;
Kojto 136:ef9c61f8c49f 885 (void) tmpreg;
Kojto 136:ef9c61f8c49f 886 }
Kojto 136:ef9c61f8c49f 887
Kojto 136:ef9c61f8c49f 888 /**
Kojto 136:ef9c61f8c49f 889 * @}
Kojto 136:ef9c61f8c49f 890 */
Kojto 136:ef9c61f8c49f 891
Kojto 136:ef9c61f8c49f 892 /** @defgroup SPI_LL_EF_IT_Management Interrupt Management
Kojto 136:ef9c61f8c49f 893 * @{
Kojto 136:ef9c61f8c49f 894 */
Kojto 136:ef9c61f8c49f 895
Kojto 136:ef9c61f8c49f 896 /**
Kojto 136:ef9c61f8c49f 897 * @brief Enable error interrupt
Kojto 136:ef9c61f8c49f 898 * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode).
Kojto 136:ef9c61f8c49f 899 * @rmtoll CR2 ERRIE LL_SPI_EnableIT_ERR
Kojto 136:ef9c61f8c49f 900 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 901 * @retval None
Kojto 136:ef9c61f8c49f 902 */
Kojto 136:ef9c61f8c49f 903 __STATIC_INLINE void LL_SPI_EnableIT_ERR(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 904 {
Kojto 136:ef9c61f8c49f 905 SET_BIT(SPIx->CR2, SPI_CR2_ERRIE);
Kojto 136:ef9c61f8c49f 906 }
Kojto 136:ef9c61f8c49f 907
Kojto 136:ef9c61f8c49f 908 /**
Kojto 136:ef9c61f8c49f 909 * @brief Enable Rx buffer not empty interrupt
Kojto 136:ef9c61f8c49f 910 * @rmtoll CR2 RXNEIE LL_SPI_EnableIT_RXNE
Kojto 136:ef9c61f8c49f 911 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 912 * @retval None
Kojto 136:ef9c61f8c49f 913 */
Kojto 136:ef9c61f8c49f 914 __STATIC_INLINE void LL_SPI_EnableIT_RXNE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 915 {
Kojto 136:ef9c61f8c49f 916 SET_BIT(SPIx->CR2, SPI_CR2_RXNEIE);
Kojto 136:ef9c61f8c49f 917 }
Kojto 136:ef9c61f8c49f 918
Kojto 136:ef9c61f8c49f 919 /**
Kojto 136:ef9c61f8c49f 920 * @brief Enable Tx buffer empty interrupt
Kojto 136:ef9c61f8c49f 921 * @rmtoll CR2 TXEIE LL_SPI_EnableIT_TXE
Kojto 136:ef9c61f8c49f 922 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 923 * @retval None
Kojto 136:ef9c61f8c49f 924 */
Kojto 136:ef9c61f8c49f 925 __STATIC_INLINE void LL_SPI_EnableIT_TXE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 926 {
Kojto 136:ef9c61f8c49f 927 SET_BIT(SPIx->CR2, SPI_CR2_TXEIE);
Kojto 136:ef9c61f8c49f 928 }
Kojto 136:ef9c61f8c49f 929
Kojto 136:ef9c61f8c49f 930 /**
Kojto 136:ef9c61f8c49f 931 * @brief Disable error interrupt
Kojto 136:ef9c61f8c49f 932 * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode).
Kojto 136:ef9c61f8c49f 933 * @rmtoll CR2 ERRIE LL_SPI_DisableIT_ERR
Kojto 136:ef9c61f8c49f 934 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 935 * @retval None
Kojto 136:ef9c61f8c49f 936 */
Kojto 136:ef9c61f8c49f 937 __STATIC_INLINE void LL_SPI_DisableIT_ERR(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 938 {
Kojto 136:ef9c61f8c49f 939 CLEAR_BIT(SPIx->CR2, SPI_CR2_ERRIE);
Kojto 136:ef9c61f8c49f 940 }
Kojto 136:ef9c61f8c49f 941
Kojto 136:ef9c61f8c49f 942 /**
Kojto 136:ef9c61f8c49f 943 * @brief Disable Rx buffer not empty interrupt
Kojto 136:ef9c61f8c49f 944 * @rmtoll CR2 RXNEIE LL_SPI_DisableIT_RXNE
Kojto 136:ef9c61f8c49f 945 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 946 * @retval None
Kojto 136:ef9c61f8c49f 947 */
Kojto 136:ef9c61f8c49f 948 __STATIC_INLINE void LL_SPI_DisableIT_RXNE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 949 {
Kojto 136:ef9c61f8c49f 950 CLEAR_BIT(SPIx->CR2, SPI_CR2_RXNEIE);
Kojto 136:ef9c61f8c49f 951 }
Kojto 136:ef9c61f8c49f 952
Kojto 136:ef9c61f8c49f 953 /**
Kojto 136:ef9c61f8c49f 954 * @brief Disable Tx buffer empty interrupt
Kojto 136:ef9c61f8c49f 955 * @rmtoll CR2 TXEIE LL_SPI_DisableIT_TXE
Kojto 136:ef9c61f8c49f 956 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 957 * @retval None
Kojto 136:ef9c61f8c49f 958 */
Kojto 136:ef9c61f8c49f 959 __STATIC_INLINE void LL_SPI_DisableIT_TXE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 960 {
Kojto 136:ef9c61f8c49f 961 CLEAR_BIT(SPIx->CR2, SPI_CR2_TXEIE);
Kojto 136:ef9c61f8c49f 962 }
Kojto 136:ef9c61f8c49f 963
Kojto 136:ef9c61f8c49f 964 /**
Kojto 136:ef9c61f8c49f 965 * @brief Check if error interrupt is enabled
Kojto 136:ef9c61f8c49f 966 * @rmtoll CR2 ERRIE LL_SPI_IsEnabledIT_ERR
Kojto 136:ef9c61f8c49f 967 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 968 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 969 */
Kojto 136:ef9c61f8c49f 970 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 971 {
Kojto 136:ef9c61f8c49f 972 return (READ_BIT(SPIx->CR2, SPI_CR2_ERRIE) == (SPI_CR2_ERRIE));
Kojto 136:ef9c61f8c49f 973 }
Kojto 136:ef9c61f8c49f 974
Kojto 136:ef9c61f8c49f 975 /**
Kojto 136:ef9c61f8c49f 976 * @brief Check if Rx buffer not empty interrupt is enabled
Kojto 136:ef9c61f8c49f 977 * @rmtoll CR2 RXNEIE LL_SPI_IsEnabledIT_RXNE
Kojto 136:ef9c61f8c49f 978 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 979 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 980 */
Kojto 136:ef9c61f8c49f 981 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 982 {
Kojto 136:ef9c61f8c49f 983 return (READ_BIT(SPIx->CR2, SPI_CR2_RXNEIE) == (SPI_CR2_RXNEIE));
Kojto 136:ef9c61f8c49f 984 }
Kojto 136:ef9c61f8c49f 985
Kojto 136:ef9c61f8c49f 986 /**
Kojto 136:ef9c61f8c49f 987 * @brief Check if Tx buffer empty interrupt
Kojto 136:ef9c61f8c49f 988 * @rmtoll CR2 TXEIE LL_SPI_IsEnabledIT_TXE
Kojto 136:ef9c61f8c49f 989 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 990 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 991 */
Kojto 136:ef9c61f8c49f 992 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 993 {
Kojto 136:ef9c61f8c49f 994 return (READ_BIT(SPIx->CR2, SPI_CR2_TXEIE) == (SPI_CR2_TXEIE));
Kojto 136:ef9c61f8c49f 995 }
Kojto 136:ef9c61f8c49f 996
Kojto 136:ef9c61f8c49f 997 /**
Kojto 136:ef9c61f8c49f 998 * @}
Kojto 136:ef9c61f8c49f 999 */
Kojto 136:ef9c61f8c49f 1000
Kojto 136:ef9c61f8c49f 1001 /** @defgroup SPI_LL_EF_DMA_Management DMA Management
Kojto 136:ef9c61f8c49f 1002 * @{
Kojto 136:ef9c61f8c49f 1003 */
Kojto 136:ef9c61f8c49f 1004
Kojto 136:ef9c61f8c49f 1005 /**
Kojto 136:ef9c61f8c49f 1006 * @brief Enable DMA Rx
Kojto 136:ef9c61f8c49f 1007 * @rmtoll CR2 RXDMAEN LL_SPI_EnableDMAReq_RX
Kojto 136:ef9c61f8c49f 1008 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1009 * @retval None
Kojto 136:ef9c61f8c49f 1010 */
Kojto 136:ef9c61f8c49f 1011 __STATIC_INLINE void LL_SPI_EnableDMAReq_RX(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1012 {
Kojto 136:ef9c61f8c49f 1013 SET_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);
Kojto 136:ef9c61f8c49f 1014 }
Kojto 136:ef9c61f8c49f 1015
Kojto 136:ef9c61f8c49f 1016 /**
Kojto 136:ef9c61f8c49f 1017 * @brief Disable DMA Rx
Kojto 136:ef9c61f8c49f 1018 * @rmtoll CR2 RXDMAEN LL_SPI_DisableDMAReq_RX
Kojto 136:ef9c61f8c49f 1019 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1020 * @retval None
Kojto 136:ef9c61f8c49f 1021 */
Kojto 136:ef9c61f8c49f 1022 __STATIC_INLINE void LL_SPI_DisableDMAReq_RX(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1023 {
Kojto 136:ef9c61f8c49f 1024 CLEAR_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);
Kojto 136:ef9c61f8c49f 1025 }
Kojto 136:ef9c61f8c49f 1026
Kojto 136:ef9c61f8c49f 1027 /**
Kojto 136:ef9c61f8c49f 1028 * @brief Check if DMA Rx is enabled
Kojto 136:ef9c61f8c49f 1029 * @rmtoll CR2 RXDMAEN LL_SPI_IsEnabledDMAReq_RX
Kojto 136:ef9c61f8c49f 1030 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1031 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1032 */
Kojto 136:ef9c61f8c49f 1033 __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1034 {
Kojto 136:ef9c61f8c49f 1035 return (READ_BIT(SPIx->CR2, SPI_CR2_RXDMAEN) == (SPI_CR2_RXDMAEN));
Kojto 136:ef9c61f8c49f 1036 }
Kojto 136:ef9c61f8c49f 1037
Kojto 136:ef9c61f8c49f 1038 /**
Kojto 136:ef9c61f8c49f 1039 * @brief Enable DMA Tx
Kojto 136:ef9c61f8c49f 1040 * @rmtoll CR2 TXDMAEN LL_SPI_EnableDMAReq_TX
Kojto 136:ef9c61f8c49f 1041 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1042 * @retval None
Kojto 136:ef9c61f8c49f 1043 */
Kojto 136:ef9c61f8c49f 1044 __STATIC_INLINE void LL_SPI_EnableDMAReq_TX(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1045 {
Kojto 136:ef9c61f8c49f 1046 SET_BIT(SPIx->CR2, SPI_CR2_TXDMAEN);
Kojto 136:ef9c61f8c49f 1047 }
Kojto 136:ef9c61f8c49f 1048
Kojto 136:ef9c61f8c49f 1049 /**
Kojto 136:ef9c61f8c49f 1050 * @brief Disable DMA Tx
Kojto 136:ef9c61f8c49f 1051 * @rmtoll CR2 TXDMAEN LL_SPI_DisableDMAReq_TX
Kojto 136:ef9c61f8c49f 1052 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1053 * @retval None
Kojto 136:ef9c61f8c49f 1054 */
Kojto 136:ef9c61f8c49f 1055 __STATIC_INLINE void LL_SPI_DisableDMAReq_TX(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1056 {
Kojto 136:ef9c61f8c49f 1057 CLEAR_BIT(SPIx->CR2, SPI_CR2_TXDMAEN);
Kojto 136:ef9c61f8c49f 1058 }
Kojto 136:ef9c61f8c49f 1059
Kojto 136:ef9c61f8c49f 1060 /**
Kojto 136:ef9c61f8c49f 1061 * @brief Check if DMA Tx is enabled
Kojto 136:ef9c61f8c49f 1062 * @rmtoll CR2 TXDMAEN LL_SPI_IsEnabledDMAReq_TX
Kojto 136:ef9c61f8c49f 1063 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1064 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1065 */
Kojto 136:ef9c61f8c49f 1066 __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1067 {
Kojto 136:ef9c61f8c49f 1068 return (READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN));
Kojto 136:ef9c61f8c49f 1069 }
Kojto 136:ef9c61f8c49f 1070
Kojto 136:ef9c61f8c49f 1071 /**
Kojto 136:ef9c61f8c49f 1072 * @brief Get the data register address used for DMA transfer
Kojto 136:ef9c61f8c49f 1073 * @rmtoll DR DR LL_SPI_DMA_GetRegAddr
Kojto 136:ef9c61f8c49f 1074 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1075 * @retval Address of data register
Kojto 136:ef9c61f8c49f 1076 */
Kojto 136:ef9c61f8c49f 1077 __STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1078 {
Kojto 136:ef9c61f8c49f 1079 return (uint32_t) & (SPIx->DR);
Kojto 136:ef9c61f8c49f 1080 }
Kojto 136:ef9c61f8c49f 1081
Kojto 136:ef9c61f8c49f 1082 /**
Kojto 136:ef9c61f8c49f 1083 * @}
Kojto 136:ef9c61f8c49f 1084 */
Kojto 136:ef9c61f8c49f 1085
Kojto 136:ef9c61f8c49f 1086 /** @defgroup SPI_LL_EF_DATA_Management DATA Management
Kojto 136:ef9c61f8c49f 1087 * @{
Kojto 136:ef9c61f8c49f 1088 */
Kojto 136:ef9c61f8c49f 1089
Kojto 136:ef9c61f8c49f 1090 /**
Kojto 136:ef9c61f8c49f 1091 * @brief Read 8-Bits in the data register
Kojto 136:ef9c61f8c49f 1092 * @rmtoll DR DR LL_SPI_ReceiveData8
Kojto 136:ef9c61f8c49f 1093 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1094 * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFF
Kojto 136:ef9c61f8c49f 1095 */
Kojto 136:ef9c61f8c49f 1096 __STATIC_INLINE uint8_t LL_SPI_ReceiveData8(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1097 {
Kojto 136:ef9c61f8c49f 1098 return (uint8_t)(READ_REG(SPIx->DR));
Kojto 136:ef9c61f8c49f 1099 }
Kojto 136:ef9c61f8c49f 1100
Kojto 136:ef9c61f8c49f 1101 /**
Kojto 136:ef9c61f8c49f 1102 * @brief Read 16-Bits in the data register
Kojto 136:ef9c61f8c49f 1103 * @rmtoll DR DR LL_SPI_ReceiveData16
Kojto 136:ef9c61f8c49f 1104 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1105 * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFFFF
Kojto 136:ef9c61f8c49f 1106 */
Kojto 136:ef9c61f8c49f 1107 __STATIC_INLINE uint16_t LL_SPI_ReceiveData16(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1108 {
Kojto 136:ef9c61f8c49f 1109 return (uint16_t)(READ_REG(SPIx->DR));
Kojto 136:ef9c61f8c49f 1110 }
Kojto 136:ef9c61f8c49f 1111
Kojto 136:ef9c61f8c49f 1112 /**
Kojto 136:ef9c61f8c49f 1113 * @brief Write 8-Bits in the data register
Kojto 136:ef9c61f8c49f 1114 * @rmtoll DR DR LL_SPI_TransmitData8
Kojto 136:ef9c61f8c49f 1115 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1116 * @param TxData Value between Min_Data=0x00 and Max_Data=0xFF
Kojto 136:ef9c61f8c49f 1117 * @retval None
Kojto 136:ef9c61f8c49f 1118 */
Kojto 136:ef9c61f8c49f 1119 __STATIC_INLINE void LL_SPI_TransmitData8(SPI_TypeDef *SPIx, uint8_t TxData)
Kojto 136:ef9c61f8c49f 1120 {
Kojto 136:ef9c61f8c49f 1121 *((__IO uint8_t *)&SPIx->DR) = TxData;
Kojto 136:ef9c61f8c49f 1122 }
Kojto 136:ef9c61f8c49f 1123
Kojto 136:ef9c61f8c49f 1124 /**
Kojto 136:ef9c61f8c49f 1125 * @brief Write 16-Bits in the data register
Kojto 136:ef9c61f8c49f 1126 * @rmtoll DR DR LL_SPI_TransmitData16
Kojto 136:ef9c61f8c49f 1127 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1128 * @param TxData Value between Min_Data=0x00 and Max_Data=0xFFFF
Kojto 136:ef9c61f8c49f 1129 * @retval None
Kojto 136:ef9c61f8c49f 1130 */
Kojto 136:ef9c61f8c49f 1131 __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData)
Kojto 136:ef9c61f8c49f 1132 {
Kojto 136:ef9c61f8c49f 1133 *((__IO uint16_t *)&SPIx->DR) = TxData;
Kojto 136:ef9c61f8c49f 1134 }
Kojto 136:ef9c61f8c49f 1135
Kojto 136:ef9c61f8c49f 1136 /**
Kojto 136:ef9c61f8c49f 1137 * @}
Kojto 136:ef9c61f8c49f 1138 */
Kojto 136:ef9c61f8c49f 1139 #if defined(USE_FULL_LL_DRIVER)
Kojto 136:ef9c61f8c49f 1140 /** @defgroup SPI_LL_EF_Init Initialization and de-initialization functions
Kojto 136:ef9c61f8c49f 1141 * @{
Kojto 136:ef9c61f8c49f 1142 */
Kojto 136:ef9c61f8c49f 1143
Kojto 136:ef9c61f8c49f 1144 ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx);
Kojto 136:ef9c61f8c49f 1145 ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct);
Kojto 136:ef9c61f8c49f 1146 void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct);
Kojto 136:ef9c61f8c49f 1147
Kojto 136:ef9c61f8c49f 1148 /**
Kojto 136:ef9c61f8c49f 1149 * @}
Kojto 136:ef9c61f8c49f 1150 */
Kojto 136:ef9c61f8c49f 1151 #endif /* USE_FULL_LL_DRIVER */
Kojto 136:ef9c61f8c49f 1152 /**
Kojto 136:ef9c61f8c49f 1153 * @}
Kojto 136:ef9c61f8c49f 1154 */
Kojto 136:ef9c61f8c49f 1155
Kojto 136:ef9c61f8c49f 1156 /**
Kojto 136:ef9c61f8c49f 1157 * @}
Kojto 136:ef9c61f8c49f 1158 */
Kojto 136:ef9c61f8c49f 1159
Kojto 136:ef9c61f8c49f 1160 #if defined(SPI_I2S_SUPPORT)
Kojto 136:ef9c61f8c49f 1161 /** @defgroup I2S_LL I2S
Kojto 136:ef9c61f8c49f 1162 * @{
Kojto 136:ef9c61f8c49f 1163 */
Kojto 136:ef9c61f8c49f 1164
Kojto 136:ef9c61f8c49f 1165 /* Private variables ---------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 1166 /* Private constants ---------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 1167 /* Private macros ------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 1168
Kojto 136:ef9c61f8c49f 1169 /* Exported types ------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 1170 #if defined(USE_FULL_LL_DRIVER)
Kojto 136:ef9c61f8c49f 1171 /** @defgroup I2S_LL_ES_INIT I2S Exported Init structure
Kojto 136:ef9c61f8c49f 1172 * @{
Kojto 136:ef9c61f8c49f 1173 */
Kojto 136:ef9c61f8c49f 1174
Kojto 136:ef9c61f8c49f 1175 /**
Kojto 136:ef9c61f8c49f 1176 * @brief I2S Init structure definition
Kojto 136:ef9c61f8c49f 1177 */
Kojto 136:ef9c61f8c49f 1178
Kojto 136:ef9c61f8c49f 1179 typedef struct
Kojto 136:ef9c61f8c49f 1180 {
Kojto 136:ef9c61f8c49f 1181 uint32_t Mode; /*!< Specifies the I2S operating mode.
Kojto 136:ef9c61f8c49f 1182 This parameter can be a value of @ref I2S_LL_EC_MODE
Kojto 136:ef9c61f8c49f 1183
Kojto 136:ef9c61f8c49f 1184 This feature can be modified afterwards using unitary function @ref LL_I2S_SetTransferMode().*/
Kojto 136:ef9c61f8c49f 1185
Kojto 136:ef9c61f8c49f 1186 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
Kojto 136:ef9c61f8c49f 1187 This parameter can be a value of @ref I2S_LL_EC_STANDARD
Kojto 136:ef9c61f8c49f 1188
Kojto 136:ef9c61f8c49f 1189 This feature can be modified afterwards using unitary function @ref LL_I2S_SetStandard().*/
Kojto 136:ef9c61f8c49f 1190
Kojto 136:ef9c61f8c49f 1191
Kojto 136:ef9c61f8c49f 1192 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
Kojto 136:ef9c61f8c49f 1193 This parameter can be a value of @ref I2S_LL_EC_DATA_FORMAT
Kojto 136:ef9c61f8c49f 1194
Kojto 136:ef9c61f8c49f 1195 This feature can be modified afterwards using unitary function @ref LL_I2S_SetDataFormat().*/
Kojto 136:ef9c61f8c49f 1196
Kojto 136:ef9c61f8c49f 1197
Kojto 136:ef9c61f8c49f 1198 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
Kojto 136:ef9c61f8c49f 1199 This parameter can be a value of @ref I2S_LL_EC_MCLK_OUTPUT
Kojto 136:ef9c61f8c49f 1200
Kojto 136:ef9c61f8c49f 1201 This feature can be modified afterwards using unitary functions @ref LL_I2S_EnableMasterClock() or @ref LL_I2S_DisableMasterClock.*/
Kojto 136:ef9c61f8c49f 1202
Kojto 136:ef9c61f8c49f 1203
Kojto 136:ef9c61f8c49f 1204 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
Kojto 136:ef9c61f8c49f 1205 This parameter can be a value of @ref I2S_LL_EC_AUDIO_FREQ
Kojto 136:ef9c61f8c49f 1206
Kojto 136:ef9c61f8c49f 1207 Audio Frequency can be modified afterwards using Reference manual formulas to calculate Prescaler Linear, Parity
Kojto 136:ef9c61f8c49f 1208 and unitary functions @ref LL_I2S_SetPrescalerLinear() and @ref LL_I2S_SetPrescalerParity() to set it.*/
Kojto 136:ef9c61f8c49f 1209
Kojto 136:ef9c61f8c49f 1210
Kojto 136:ef9c61f8c49f 1211 uint32_t ClockPolarity; /*!< Specifies the idle state of the I2S clock.
Kojto 136:ef9c61f8c49f 1212 This parameter can be a value of @ref I2S_LL_EC_POLARITY
Kojto 136:ef9c61f8c49f 1213
Kojto 136:ef9c61f8c49f 1214 This feature can be modified afterwards using unitary function @ref LL_I2S_SetClockPolarity().*/
Kojto 136:ef9c61f8c49f 1215
Kojto 136:ef9c61f8c49f 1216 } LL_I2S_InitTypeDef;
Kojto 136:ef9c61f8c49f 1217
Kojto 136:ef9c61f8c49f 1218 /**
Kojto 136:ef9c61f8c49f 1219 * @}
Kojto 136:ef9c61f8c49f 1220 */
Kojto 136:ef9c61f8c49f 1221 #endif /*USE_FULL_LL_DRIVER*/
Kojto 136:ef9c61f8c49f 1222
Kojto 136:ef9c61f8c49f 1223 /* Exported constants --------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 1224 /** @defgroup I2S_LL_Exported_Constants I2S Exported Constants
Kojto 136:ef9c61f8c49f 1225 * @{
Kojto 136:ef9c61f8c49f 1226 */
Kojto 136:ef9c61f8c49f 1227
Kojto 136:ef9c61f8c49f 1228 /** @defgroup I2S_LL_EC_GET_FLAG Get Flags Defines
Kojto 136:ef9c61f8c49f 1229 * @brief Flags defines which can be used with LL_I2S_ReadReg function
Kojto 136:ef9c61f8c49f 1230 * @{
Kojto 136:ef9c61f8c49f 1231 */
Kojto 136:ef9c61f8c49f 1232 #define LL_I2S_SR_RXNE LL_SPI_SR_RXNE /*!< Rx buffer not empty flag */
Kojto 136:ef9c61f8c49f 1233 #define LL_I2S_SR_TXE LL_SPI_SR_TXE /*!< Tx buffer empty flag */
Kojto 136:ef9c61f8c49f 1234 #define LL_I2S_SR_BSY LL_SPI_SR_BSY /*!< Busy flag */
Kojto 136:ef9c61f8c49f 1235 #define LL_I2S_SR_UDR LL_SPI_SR_UDR /*!< Underrun flag */
Kojto 136:ef9c61f8c49f 1236 #define LL_I2S_SR_OVR LL_SPI_SR_OVR /*!< Overrun flag */
Kojto 136:ef9c61f8c49f 1237 #define LL_I2S_SR_FRE LL_SPI_SR_FRE /*!< TI mode frame format error flag */
Kojto 136:ef9c61f8c49f 1238 /**
Kojto 136:ef9c61f8c49f 1239 * @}
Kojto 136:ef9c61f8c49f 1240 */
Kojto 136:ef9c61f8c49f 1241
Kojto 136:ef9c61f8c49f 1242 /** @defgroup SPI_LL_EC_IT IT Defines
Kojto 136:ef9c61f8c49f 1243 * @brief IT defines which can be used with LL_SPI_ReadReg and LL_SPI_WriteReg functions
Kojto 136:ef9c61f8c49f 1244 * @{
Kojto 136:ef9c61f8c49f 1245 */
Kojto 136:ef9c61f8c49f 1246 #define LL_I2S_CR2_RXNEIE LL_SPI_CR2_RXNEIE /*!< Rx buffer not empty interrupt enable */
Kojto 136:ef9c61f8c49f 1247 #define LL_I2S_CR2_TXEIE LL_SPI_CR2_TXEIE /*!< Tx buffer empty interrupt enable */
Kojto 136:ef9c61f8c49f 1248 #define LL_I2S_CR2_ERRIE LL_SPI_CR2_ERRIE /*!< Error interrupt enable */
Kojto 136:ef9c61f8c49f 1249 /**
Kojto 136:ef9c61f8c49f 1250 * @}
Kojto 136:ef9c61f8c49f 1251 */
Kojto 136:ef9c61f8c49f 1252
Kojto 136:ef9c61f8c49f 1253 /** @defgroup I2S_LL_EC_DATA_FORMAT Data format
Kojto 136:ef9c61f8c49f 1254 * @{
Kojto 136:ef9c61f8c49f 1255 */
Kojto 136:ef9c61f8c49f 1256 #define LL_I2S_DATAFORMAT_16B ((uint32_t)0x00000000U) /*!< Data length 16 bits, Channel lenght 16bit */
Kojto 136:ef9c61f8c49f 1257 #define LL_I2S_DATAFORMAT_16B_EXTENDED (SPI_I2SCFGR_CHLEN) /*!< Data length 16 bits, Channel lenght 32bit */
Kojto 136:ef9c61f8c49f 1258 #define LL_I2S_DATAFORMAT_24B (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0) /*!< Data length 24 bits, Channel lenght 32bit */
Kojto 136:ef9c61f8c49f 1259 #define LL_I2S_DATAFORMAT_32B (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1) /*!< Data length 16 bits, Channel lenght 32bit */
Kojto 136:ef9c61f8c49f 1260 /**
Kojto 136:ef9c61f8c49f 1261 * @}
Kojto 136:ef9c61f8c49f 1262 */
Kojto 136:ef9c61f8c49f 1263
Kojto 136:ef9c61f8c49f 1264 /** @defgroup I2S_LL_EC_POLARITY Clock Polarity
Kojto 136:ef9c61f8c49f 1265 * @{
Kojto 136:ef9c61f8c49f 1266 */
Kojto 136:ef9c61f8c49f 1267 #define LL_I2S_POLARITY_LOW ((uint32_t)0x00000000U) /*!< Clock steady state is low level */
Kojto 136:ef9c61f8c49f 1268 #define LL_I2S_POLARITY_HIGH (SPI_I2SCFGR_CKPOL) /*!< Clock steady state is high level */
Kojto 136:ef9c61f8c49f 1269 /**
Kojto 136:ef9c61f8c49f 1270 * @}
Kojto 136:ef9c61f8c49f 1271 */
Kojto 136:ef9c61f8c49f 1272
Kojto 136:ef9c61f8c49f 1273 /** @defgroup I2S_LL_EC_STANDARD I2s Standard
Kojto 136:ef9c61f8c49f 1274 * @{
Kojto 136:ef9c61f8c49f 1275 */
Kojto 136:ef9c61f8c49f 1276 #define LL_I2S_STANDARD_PHILIPS ((uint32_t)0x00000000U) /*!< I2S standard philips */
Kojto 136:ef9c61f8c49f 1277 #define LL_I2S_STANDARD_MSB (SPI_I2SCFGR_I2SSTD_0) /*!< MSB justified standard (left justified) */
Kojto 136:ef9c61f8c49f 1278 #define LL_I2S_STANDARD_LSB (SPI_I2SCFGR_I2SSTD_1) /*!< LSB justified standard (right justified) */
Kojto 136:ef9c61f8c49f 1279 #define LL_I2S_STANDARD_PCM_SHORT (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1) /*!< PCM standard, short frame synchronization */
Kojto 136:ef9c61f8c49f 1280 #define LL_I2S_STANDARD_PCM_LONG (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC) /*!< PCM standard, long frame synchronization */
Kojto 136:ef9c61f8c49f 1281 /**
Kojto 136:ef9c61f8c49f 1282 * @}
Kojto 136:ef9c61f8c49f 1283 */
Kojto 136:ef9c61f8c49f 1284
Kojto 136:ef9c61f8c49f 1285 /** @defgroup I2S_LL_EC_MODE Operation Mode
Kojto 136:ef9c61f8c49f 1286 * @{
Kojto 136:ef9c61f8c49f 1287 */
Kojto 136:ef9c61f8c49f 1288 #define LL_I2S_MODE_SLAVE_TX ((uint32_t)0x00000000U) /*!< Slave Tx configuration */
Kojto 136:ef9c61f8c49f 1289 #define LL_I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0) /*!< Slave Rx configuration */
Kojto 136:ef9c61f8c49f 1290 #define LL_I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1) /*!< Master Tx configuration */
Kojto 136:ef9c61f8c49f 1291 #define LL_I2S_MODE_MASTER_RX (SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1) /*!< Master Rx configuration */
Kojto 136:ef9c61f8c49f 1292 /**
Kojto 136:ef9c61f8c49f 1293 * @}
Kojto 136:ef9c61f8c49f 1294 */
Kojto 136:ef9c61f8c49f 1295
Kojto 136:ef9c61f8c49f 1296 /** @defgroup I2S_LL_EC_PRESCALER_FACTOR Prescaler Factor
Kojto 136:ef9c61f8c49f 1297 * @{
Kojto 136:ef9c61f8c49f 1298 */
Kojto 136:ef9c61f8c49f 1299 #define LL_I2S_PRESCALER_PARITY_EVEN ((uint32_t)0x00000000U) /*!< Odd factor: Real divider value is = I2SDIV * 2 */
Kojto 136:ef9c61f8c49f 1300 #define LL_I2S_PRESCALER_PARITY_ODD (SPI_I2SPR_ODD >> 8U) /*!< Odd factor: Real divider value is = (I2SDIV * 2)+1 */
Kojto 136:ef9c61f8c49f 1301 /**
Kojto 136:ef9c61f8c49f 1302 * @}
Kojto 136:ef9c61f8c49f 1303 */
Kojto 136:ef9c61f8c49f 1304
Kojto 136:ef9c61f8c49f 1305 #if defined(USE_FULL_LL_DRIVER)
Kojto 136:ef9c61f8c49f 1306
Kojto 136:ef9c61f8c49f 1307 /** @defgroup I2S_LL_EC_MCLK_OUTPUT MCLK Output
Kojto 136:ef9c61f8c49f 1308 * @{
Kojto 136:ef9c61f8c49f 1309 */
Kojto 136:ef9c61f8c49f 1310 #define LL_I2S_MCLK_OUTPUT_DISABLE ((uint32_t)0x00000000U) /*!< Master clock output is disabled */
Kojto 136:ef9c61f8c49f 1311 #define LL_I2S_MCLK_OUTPUT_ENABLE (SPI_I2SPR_MCKOE) /*!< Master clock output is enabled */
Kojto 136:ef9c61f8c49f 1312 /**
Kojto 136:ef9c61f8c49f 1313 * @}
Kojto 136:ef9c61f8c49f 1314 */
Kojto 136:ef9c61f8c49f 1315
Kojto 136:ef9c61f8c49f 1316 /** @defgroup I2S_LL_EC_AUDIO_FREQ Audio Frequency
Kojto 136:ef9c61f8c49f 1317 * @{
Kojto 136:ef9c61f8c49f 1318 */
Kojto 136:ef9c61f8c49f 1319
Kojto 136:ef9c61f8c49f 1320 #define LL_I2S_AUDIOFREQ_192K ((uint32_t)192000) /*!< Audio Frequency configuration 192000 Hz */
Kojto 136:ef9c61f8c49f 1321 #define LL_I2S_AUDIOFREQ_96K ((uint32_t) 96000) /*!< Audio Frequency configuration 96000 Hz */
Kojto 136:ef9c61f8c49f 1322 #define LL_I2S_AUDIOFREQ_48K ((uint32_t) 48000) /*!< Audio Frequency configuration 48000 Hz */
Kojto 136:ef9c61f8c49f 1323 #define LL_I2S_AUDIOFREQ_44K ((uint32_t) 44100) /*!< Audio Frequency configuration 44100 Hz */
Kojto 136:ef9c61f8c49f 1324 #define LL_I2S_AUDIOFREQ_32K ((uint32_t) 32000) /*!< Audio Frequency configuration 32000 Hz */
Kojto 136:ef9c61f8c49f 1325 #define LL_I2S_AUDIOFREQ_22K ((uint32_t) 22050) /*!< Audio Frequency configuration 22050 Hz */
Kojto 136:ef9c61f8c49f 1326 #define LL_I2S_AUDIOFREQ_16K ((uint32_t) 16000) /*!< Audio Frequency configuration 16000 Hz */
Kojto 136:ef9c61f8c49f 1327 #define LL_I2S_AUDIOFREQ_11K ((uint32_t) 11025) /*!< Audio Frequency configuration 11025 Hz */
Kojto 136:ef9c61f8c49f 1328 #define LL_I2S_AUDIOFREQ_8K ((uint32_t) 8000) /*!< Audio Frequency configuration 8000 Hz */
Kojto 136:ef9c61f8c49f 1329 #define LL_I2S_AUDIOFREQ_DEFAULT ((uint32_t) 2) /*!< Audio Freq not specified. Register I2SDIV = 2 */
Kojto 136:ef9c61f8c49f 1330 /**
Kojto 136:ef9c61f8c49f 1331 * @}
Kojto 136:ef9c61f8c49f 1332 */
Kojto 136:ef9c61f8c49f 1333 #endif /* USE_FULL_LL_DRIVER */
Kojto 136:ef9c61f8c49f 1334
Kojto 136:ef9c61f8c49f 1335 /**
Kojto 136:ef9c61f8c49f 1336 * @}
Kojto 136:ef9c61f8c49f 1337 */
Kojto 136:ef9c61f8c49f 1338
Kojto 136:ef9c61f8c49f 1339 /* Exported macro ------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 1340 /** @defgroup I2S_LL_Exported_Macros I2S Exported Macros
Kojto 136:ef9c61f8c49f 1341 * @{
Kojto 136:ef9c61f8c49f 1342 */
Kojto 136:ef9c61f8c49f 1343
Kojto 136:ef9c61f8c49f 1344 /** @defgroup I2S_LL_EM_WRITE_READ Common Write and read registers Macros
Kojto 136:ef9c61f8c49f 1345 * @{
Kojto 136:ef9c61f8c49f 1346 */
Kojto 136:ef9c61f8c49f 1347
Kojto 136:ef9c61f8c49f 1348 /**
Kojto 136:ef9c61f8c49f 1349 * @brief Write a value in I2S register
Kojto 136:ef9c61f8c49f 1350 * @param __INSTANCE__ I2S Instance
Kojto 136:ef9c61f8c49f 1351 * @param __REG__ Register to be written
Kojto 136:ef9c61f8c49f 1352 * @param __VALUE__ Value to be written in the register
Kojto 136:ef9c61f8c49f 1353 * @retval None
Kojto 136:ef9c61f8c49f 1354 */
Kojto 136:ef9c61f8c49f 1355 #define LL_I2S_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
Kojto 136:ef9c61f8c49f 1356
Kojto 136:ef9c61f8c49f 1357 /**
Kojto 136:ef9c61f8c49f 1358 * @brief Read a value in I2S register
Kojto 136:ef9c61f8c49f 1359 * @param __INSTANCE__ I2S Instance
Kojto 136:ef9c61f8c49f 1360 * @param __REG__ Register to be read
Kojto 136:ef9c61f8c49f 1361 * @retval Register value
Kojto 136:ef9c61f8c49f 1362 */
Kojto 136:ef9c61f8c49f 1363 #define LL_I2S_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
Kojto 136:ef9c61f8c49f 1364 /**
Kojto 136:ef9c61f8c49f 1365 * @}
Kojto 136:ef9c61f8c49f 1366 */
Kojto 136:ef9c61f8c49f 1367
Kojto 136:ef9c61f8c49f 1368 /**
Kojto 136:ef9c61f8c49f 1369 * @}
Kojto 136:ef9c61f8c49f 1370 */
Kojto 136:ef9c61f8c49f 1371
Kojto 136:ef9c61f8c49f 1372
Kojto 136:ef9c61f8c49f 1373 /* Exported functions --------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 1374
Kojto 136:ef9c61f8c49f 1375 /** @defgroup I2S_LL_Exported_Functions I2S Exported Functions
Kojto 136:ef9c61f8c49f 1376 * @{
Kojto 136:ef9c61f8c49f 1377 */
Kojto 136:ef9c61f8c49f 1378
Kojto 136:ef9c61f8c49f 1379 /** @defgroup I2S_LL_EF_Configuration Configuration
Kojto 136:ef9c61f8c49f 1380 * @{
Kojto 136:ef9c61f8c49f 1381 */
Kojto 136:ef9c61f8c49f 1382
Kojto 136:ef9c61f8c49f 1383 /**
Kojto 136:ef9c61f8c49f 1384 * @brief Select I2S mode and Enable I2S peripheral
Kojto 136:ef9c61f8c49f 1385 * @rmtoll I2SCFGR I2SMOD LL_I2S_Enable\n
Kojto 136:ef9c61f8c49f 1386 * I2SCFGR I2SE LL_I2S_Enable
Kojto 136:ef9c61f8c49f 1387 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1388 * @retval None
Kojto 136:ef9c61f8c49f 1389 */
Kojto 136:ef9c61f8c49f 1390 __STATIC_INLINE void LL_I2S_Enable(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1391 {
Kojto 136:ef9c61f8c49f 1392 SET_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD | SPI_I2SCFGR_I2SE);
Kojto 136:ef9c61f8c49f 1393 }
Kojto 136:ef9c61f8c49f 1394
Kojto 136:ef9c61f8c49f 1395 /**
Kojto 136:ef9c61f8c49f 1396 * @brief Disable I2S peripheral
Kojto 136:ef9c61f8c49f 1397 * @rmtoll I2SCFGR I2SE LL_I2S_Disable
Kojto 136:ef9c61f8c49f 1398 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1399 * @retval None
Kojto 136:ef9c61f8c49f 1400 */
Kojto 136:ef9c61f8c49f 1401 __STATIC_INLINE void LL_I2S_Disable(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1402 {
Kojto 136:ef9c61f8c49f 1403 CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD | SPI_I2SCFGR_I2SE);
Kojto 136:ef9c61f8c49f 1404 }
Kojto 136:ef9c61f8c49f 1405
Kojto 136:ef9c61f8c49f 1406 /**
Kojto 136:ef9c61f8c49f 1407 * @brief Check if I2S peripheral is enabled
Kojto 136:ef9c61f8c49f 1408 * @rmtoll I2SCFGR I2SE LL_I2S_IsEnabled
Kojto 136:ef9c61f8c49f 1409 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1410 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1411 */
Kojto 136:ef9c61f8c49f 1412 __STATIC_INLINE uint32_t LL_I2S_IsEnabled(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1413 {
Kojto 136:ef9c61f8c49f 1414 return (READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SE) == (SPI_I2SCFGR_I2SE));
Kojto 136:ef9c61f8c49f 1415 }
Kojto 136:ef9c61f8c49f 1416
Kojto 136:ef9c61f8c49f 1417 /**
Kojto 136:ef9c61f8c49f 1418 * @brief Set I2S Data frame length
Kojto 136:ef9c61f8c49f 1419 * @rmtoll I2SCFGR DATLEN LL_I2S_SetDataFormat\n
Kojto 136:ef9c61f8c49f 1420 * I2SCFGR CHLEN LL_I2S_SetDataFormat
Kojto 136:ef9c61f8c49f 1421 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1422 * @param DataFormat This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1423 * @arg @ref LL_I2S_DATAFORMAT_16B
Kojto 136:ef9c61f8c49f 1424 * @arg @ref LL_I2S_DATAFORMAT_16B_EXTENDED
Kojto 136:ef9c61f8c49f 1425 * @arg @ref LL_I2S_DATAFORMAT_24B
Kojto 136:ef9c61f8c49f 1426 * @arg @ref LL_I2S_DATAFORMAT_32B
Kojto 136:ef9c61f8c49f 1427 * @retval None
Kojto 136:ef9c61f8c49f 1428 */
Kojto 136:ef9c61f8c49f 1429 __STATIC_INLINE void LL_I2S_SetDataFormat(SPI_TypeDef *SPIx, uint32_t DataFormat)
Kojto 136:ef9c61f8c49f 1430 {
Kojto 136:ef9c61f8c49f 1431 MODIFY_REG(SPIx->I2SCFGR, SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN, DataFormat);
Kojto 136:ef9c61f8c49f 1432 }
Kojto 136:ef9c61f8c49f 1433
Kojto 136:ef9c61f8c49f 1434 /**
Kojto 136:ef9c61f8c49f 1435 * @brief Get I2S Data frame length
Kojto 136:ef9c61f8c49f 1436 * @rmtoll I2SCFGR DATLEN LL_I2S_GetDataFormat\n
Kojto 136:ef9c61f8c49f 1437 * I2SCFGR CHLEN LL_I2S_GetDataFormat
Kojto 136:ef9c61f8c49f 1438 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1439 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1440 * @arg @ref LL_I2S_DATAFORMAT_16B
Kojto 136:ef9c61f8c49f 1441 * @arg @ref LL_I2S_DATAFORMAT_16B_EXTENDED
Kojto 136:ef9c61f8c49f 1442 * @arg @ref LL_I2S_DATAFORMAT_24B
Kojto 136:ef9c61f8c49f 1443 * @arg @ref LL_I2S_DATAFORMAT_32B
Kojto 136:ef9c61f8c49f 1444 */
Kojto 136:ef9c61f8c49f 1445 __STATIC_INLINE uint32_t LL_I2S_GetDataFormat(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1446 {
Kojto 136:ef9c61f8c49f 1447 return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN));
Kojto 136:ef9c61f8c49f 1448 }
Kojto 136:ef9c61f8c49f 1449
Kojto 136:ef9c61f8c49f 1450 /**
Kojto 136:ef9c61f8c49f 1451 * @brief Set I2S clock polarity
Kojto 136:ef9c61f8c49f 1452 * @rmtoll I2SCFGR CKPOL LL_I2S_SetClockPolarity
Kojto 136:ef9c61f8c49f 1453 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1454 * @param ClockPolarity This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1455 * @arg @ref LL_I2S_POLARITY_LOW
Kojto 136:ef9c61f8c49f 1456 * @arg @ref LL_I2S_POLARITY_HIGH
Kojto 136:ef9c61f8c49f 1457 * @retval None
Kojto 136:ef9c61f8c49f 1458 */
Kojto 136:ef9c61f8c49f 1459 __STATIC_INLINE void LL_I2S_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity)
Kojto 136:ef9c61f8c49f 1460 {
Kojto 136:ef9c61f8c49f 1461 SET_BIT(SPIx->I2SCFGR, ClockPolarity);
Kojto 136:ef9c61f8c49f 1462 }
Kojto 136:ef9c61f8c49f 1463
Kojto 136:ef9c61f8c49f 1464 /**
Kojto 136:ef9c61f8c49f 1465 * @brief Get I2S clock polarity
Kojto 136:ef9c61f8c49f 1466 * @rmtoll I2SCFGR CKPOL LL_I2S_GetClockPolarity
Kojto 136:ef9c61f8c49f 1467 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1468 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1469 * @arg @ref LL_I2S_POLARITY_LOW
Kojto 136:ef9c61f8c49f 1470 * @arg @ref LL_I2S_POLARITY_HIGH
Kojto 136:ef9c61f8c49f 1471 */
Kojto 136:ef9c61f8c49f 1472 __STATIC_INLINE uint32_t LL_I2S_GetClockPolarity(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1473 {
Kojto 136:ef9c61f8c49f 1474 return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_CKPOL));
Kojto 136:ef9c61f8c49f 1475 }
Kojto 136:ef9c61f8c49f 1476
Kojto 136:ef9c61f8c49f 1477 /**
Kojto 136:ef9c61f8c49f 1478 * @brief Set I2S Standard Protocol
Kojto 136:ef9c61f8c49f 1479 * @rmtoll I2SCFGR I2SSTD LL_I2S_SetStandard\n
Kojto 136:ef9c61f8c49f 1480 * I2SCFGR PCMSYNC LL_I2S_SetStandard
Kojto 136:ef9c61f8c49f 1481 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1482 * @param Standard This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1483 * @arg @ref LL_I2S_STANDARD_PHILIPS
Kojto 136:ef9c61f8c49f 1484 * @arg @ref LL_I2S_STANDARD_MSB
Kojto 136:ef9c61f8c49f 1485 * @arg @ref LL_I2S_STANDARD_LSB
Kojto 136:ef9c61f8c49f 1486 * @arg @ref LL_I2S_STANDARD_PCM_SHORT
Kojto 136:ef9c61f8c49f 1487 * @arg @ref LL_I2S_STANDARD_PCM_LONG
Kojto 136:ef9c61f8c49f 1488 * @retval None
Kojto 136:ef9c61f8c49f 1489 */
Kojto 136:ef9c61f8c49f 1490 __STATIC_INLINE void LL_I2S_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard)
Kojto 136:ef9c61f8c49f 1491 {
Kojto 136:ef9c61f8c49f 1492 MODIFY_REG(SPIx->I2SCFGR, SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC, Standard);
Kojto 136:ef9c61f8c49f 1493 }
Kojto 136:ef9c61f8c49f 1494
Kojto 136:ef9c61f8c49f 1495 /**
Kojto 136:ef9c61f8c49f 1496 * @brief Get I2S Standard Protocol
Kojto 136:ef9c61f8c49f 1497 * @rmtoll I2SCFGR I2SSTD LL_I2S_GetStandard\n
Kojto 136:ef9c61f8c49f 1498 * I2SCFGR PCMSYNC LL_I2S_GetStandard
Kojto 136:ef9c61f8c49f 1499 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1500 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1501 * @arg @ref LL_I2S_STANDARD_PHILIPS
Kojto 136:ef9c61f8c49f 1502 * @arg @ref LL_I2S_STANDARD_MSB
Kojto 136:ef9c61f8c49f 1503 * @arg @ref LL_I2S_STANDARD_LSB
Kojto 136:ef9c61f8c49f 1504 * @arg @ref LL_I2S_STANDARD_PCM_SHORT
Kojto 136:ef9c61f8c49f 1505 * @arg @ref LL_I2S_STANDARD_PCM_LONG
Kojto 136:ef9c61f8c49f 1506 */
Kojto 136:ef9c61f8c49f 1507 __STATIC_INLINE uint32_t LL_I2S_GetStandard(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1508 {
Kojto 136:ef9c61f8c49f 1509 return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC));
Kojto 136:ef9c61f8c49f 1510 }
Kojto 136:ef9c61f8c49f 1511
Kojto 136:ef9c61f8c49f 1512 /**
Kojto 136:ef9c61f8c49f 1513 * @brief Set I2S Transfer Mode
Kojto 136:ef9c61f8c49f 1514 * @rmtoll I2SCFGR I2SCFG LL_I2S_SetTransferMode
Kojto 136:ef9c61f8c49f 1515 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1516 * @param Mode This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1517 * @arg @ref LL_I2S_MODE_SLAVE_TX
Kojto 136:ef9c61f8c49f 1518 * @arg @ref LL_I2S_MODE_SLAVE_RX
Kojto 136:ef9c61f8c49f 1519 * @arg @ref LL_I2S_MODE_MASTER_TX
Kojto 136:ef9c61f8c49f 1520 * @arg @ref LL_I2S_MODE_MASTER_RX
Kojto 136:ef9c61f8c49f 1521 * @retval None
Kojto 136:ef9c61f8c49f 1522 */
Kojto 136:ef9c61f8c49f 1523 __STATIC_INLINE void LL_I2S_SetTransferMode(SPI_TypeDef *SPIx, uint32_t Mode)
Kojto 136:ef9c61f8c49f 1524 {
Kojto 136:ef9c61f8c49f 1525 MODIFY_REG(SPIx->I2SCFGR, SPI_I2SCFGR_I2SCFG, Mode);
Kojto 136:ef9c61f8c49f 1526 }
Kojto 136:ef9c61f8c49f 1527
Kojto 136:ef9c61f8c49f 1528 /**
Kojto 136:ef9c61f8c49f 1529 * @brief Get I2S Transfer Mode
Kojto 136:ef9c61f8c49f 1530 * @rmtoll I2SCFGR I2SCFG LL_I2S_GetTransferMode
Kojto 136:ef9c61f8c49f 1531 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1532 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1533 * @arg @ref LL_I2S_MODE_SLAVE_TX
Kojto 136:ef9c61f8c49f 1534 * @arg @ref LL_I2S_MODE_SLAVE_RX
Kojto 136:ef9c61f8c49f 1535 * @arg @ref LL_I2S_MODE_MASTER_TX
Kojto 136:ef9c61f8c49f 1536 * @arg @ref LL_I2S_MODE_MASTER_RX
Kojto 136:ef9c61f8c49f 1537 */
Kojto 136:ef9c61f8c49f 1538 __STATIC_INLINE uint32_t LL_I2S_GetTransferMode(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1539 {
Kojto 136:ef9c61f8c49f 1540 return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SCFG));
Kojto 136:ef9c61f8c49f 1541 }
Kojto 136:ef9c61f8c49f 1542
Kojto 136:ef9c61f8c49f 1543 /**
Kojto 136:ef9c61f8c49f 1544 * @brief Set I2S linear prescaler
Kojto 136:ef9c61f8c49f 1545 * @rmtoll I2SPR I2SDIV LL_I2S_SetPrescalerLinear
Kojto 136:ef9c61f8c49f 1546 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1547 * @param PrescalerLinear Value between Min_Data=0x02 and Max_Data=0xFF
Kojto 136:ef9c61f8c49f 1548 * @retval None
Kojto 136:ef9c61f8c49f 1549 */
Kojto 136:ef9c61f8c49f 1550 __STATIC_INLINE void LL_I2S_SetPrescalerLinear(SPI_TypeDef *SPIx, uint8_t PrescalerLinear)
Kojto 136:ef9c61f8c49f 1551 {
Kojto 136:ef9c61f8c49f 1552 MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_I2SDIV, PrescalerLinear);
Kojto 136:ef9c61f8c49f 1553 }
Kojto 136:ef9c61f8c49f 1554
Kojto 136:ef9c61f8c49f 1555 /**
Kojto 136:ef9c61f8c49f 1556 * @brief Get I2S linear prescaler
Kojto 136:ef9c61f8c49f 1557 * @rmtoll I2SPR I2SDIV LL_I2S_GetPrescalerLinear
Kojto 136:ef9c61f8c49f 1558 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1559 * @retval PrescalerLinear Value between Min_Data=0x02 and Max_Data=0xFF
Kojto 136:ef9c61f8c49f 1560 */
Kojto 136:ef9c61f8c49f 1561 __STATIC_INLINE uint32_t LL_I2S_GetPrescalerLinear(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1562 {
Kojto 136:ef9c61f8c49f 1563 return (uint32_t)(READ_BIT(SPIx->I2SPR, SPI_I2SPR_I2SDIV));
Kojto 136:ef9c61f8c49f 1564 }
Kojto 136:ef9c61f8c49f 1565
Kojto 136:ef9c61f8c49f 1566 /**
Kojto 136:ef9c61f8c49f 1567 * @brief Set I2S parity prescaler
Kojto 136:ef9c61f8c49f 1568 * @rmtoll I2SPR ODD LL_I2S_SetPrescalerParity
Kojto 136:ef9c61f8c49f 1569 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1570 * @param PrescalerParity This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1571 * @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
Kojto 136:ef9c61f8c49f 1572 * @arg @ref LL_I2S_PRESCALER_PARITY_ODD
Kojto 136:ef9c61f8c49f 1573 * @retval None
Kojto 136:ef9c61f8c49f 1574 */
Kojto 136:ef9c61f8c49f 1575 __STATIC_INLINE void LL_I2S_SetPrescalerParity(SPI_TypeDef *SPIx, uint32_t PrescalerParity)
Kojto 136:ef9c61f8c49f 1576 {
Kojto 136:ef9c61f8c49f 1577 MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_ODD, PrescalerParity << 8U);
Kojto 136:ef9c61f8c49f 1578 }
Kojto 136:ef9c61f8c49f 1579
Kojto 136:ef9c61f8c49f 1580 /**
Kojto 136:ef9c61f8c49f 1581 * @brief Get I2S parity prescaler
Kojto 136:ef9c61f8c49f 1582 * @rmtoll I2SPR ODD LL_I2S_GetPrescalerParity
Kojto 136:ef9c61f8c49f 1583 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1584 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1585 * @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
Kojto 136:ef9c61f8c49f 1586 * @arg @ref LL_I2S_PRESCALER_PARITY_ODD
Kojto 136:ef9c61f8c49f 1587 */
Kojto 136:ef9c61f8c49f 1588 __STATIC_INLINE uint32_t LL_I2S_GetPrescalerParity(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1589 {
Kojto 136:ef9c61f8c49f 1590 return (uint32_t)(READ_BIT(SPIx->I2SPR, SPI_I2SPR_ODD) >> 8U);
Kojto 136:ef9c61f8c49f 1591 }
Kojto 136:ef9c61f8c49f 1592
Kojto 136:ef9c61f8c49f 1593 /**
Kojto 136:ef9c61f8c49f 1594 * @brief Enable the Master Clock Ouput (Pin MCK)
Kojto 136:ef9c61f8c49f 1595 * @rmtoll I2SPR MCKOE LL_I2S_EnableMasterClock
Kojto 136:ef9c61f8c49f 1596 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1597 * @retval None
Kojto 136:ef9c61f8c49f 1598 */
Kojto 136:ef9c61f8c49f 1599 __STATIC_INLINE void LL_I2S_EnableMasterClock(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1600 {
Kojto 136:ef9c61f8c49f 1601 SET_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE);
Kojto 136:ef9c61f8c49f 1602 }
Kojto 136:ef9c61f8c49f 1603
Kojto 136:ef9c61f8c49f 1604 /**
Kojto 136:ef9c61f8c49f 1605 * @brief Disable the Master Clock Ouput (Pin MCK)
Kojto 136:ef9c61f8c49f 1606 * @rmtoll I2SPR MCKOE LL_I2S_DisableMasterClock
Kojto 136:ef9c61f8c49f 1607 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1608 * @retval None
Kojto 136:ef9c61f8c49f 1609 */
Kojto 136:ef9c61f8c49f 1610 __STATIC_INLINE void LL_I2S_DisableMasterClock(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1611 {
Kojto 136:ef9c61f8c49f 1612 CLEAR_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE);
Kojto 136:ef9c61f8c49f 1613 }
Kojto 136:ef9c61f8c49f 1614
Kojto 136:ef9c61f8c49f 1615 /**
Kojto 136:ef9c61f8c49f 1616 * @brief Check if the Master Clock Ouput (Pin MCK) is enabled
Kojto 136:ef9c61f8c49f 1617 * @rmtoll I2SPR MCKOE LL_I2S_IsEnabledMasterClock
Kojto 136:ef9c61f8c49f 1618 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1619 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1620 */
Kojto 136:ef9c61f8c49f 1621 __STATIC_INLINE uint32_t LL_I2S_IsEnabledMasterClock(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1622 {
Kojto 136:ef9c61f8c49f 1623 return (READ_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE) == (SPI_I2SPR_MCKOE));
Kojto 136:ef9c61f8c49f 1624 }
Kojto 136:ef9c61f8c49f 1625
Kojto 136:ef9c61f8c49f 1626 #if defined(SPI_I2SCFGR_ASTRTEN)
Kojto 136:ef9c61f8c49f 1627 /**
Kojto 136:ef9c61f8c49f 1628 * @brief Enable Asynchronous Start
Kojto 136:ef9c61f8c49f 1629 * @rmtoll I2SCFGR ASTRTEN LL_I2S_EnableAsyncStart
Kojto 136:ef9c61f8c49f 1630 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1631 * @retval None
Kojto 136:ef9c61f8c49f 1632 */
Kojto 136:ef9c61f8c49f 1633 __STATIC_INLINE void LL_I2S_EnableAsyncStart(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1634 {
Kojto 136:ef9c61f8c49f 1635 SET_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_ASTRTEN);
Kojto 136:ef9c61f8c49f 1636 }
Kojto 136:ef9c61f8c49f 1637
Kojto 136:ef9c61f8c49f 1638 /**
Kojto 136:ef9c61f8c49f 1639 * @brief Disable Asynchronous Start
Kojto 136:ef9c61f8c49f 1640 * @rmtoll I2SCFGR ASTRTEN LL_I2S_DisableAsyncStart
Kojto 136:ef9c61f8c49f 1641 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1642 * @retval None
Kojto 136:ef9c61f8c49f 1643 */
Kojto 136:ef9c61f8c49f 1644 __STATIC_INLINE void LL_I2S_DisableAsyncStart(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1645 {
Kojto 136:ef9c61f8c49f 1646 CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_ASTRTEN);
Kojto 136:ef9c61f8c49f 1647 }
Kojto 136:ef9c61f8c49f 1648
Kojto 136:ef9c61f8c49f 1649 /**
Kojto 136:ef9c61f8c49f 1650 * @brief Check if Asynchronous Start is enabled
Kojto 136:ef9c61f8c49f 1651 * @rmtoll I2SCFGR ASTRTEN LL_I2S_IsEnabledAsyncStart
Kojto 136:ef9c61f8c49f 1652 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1653 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1654 */
Kojto 136:ef9c61f8c49f 1655 __STATIC_INLINE uint32_t LL_I2S_IsEnabledAsyncStart(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1656 {
Kojto 136:ef9c61f8c49f 1657 return (READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_ASTRTEN) == (SPI_I2SCFGR_ASTRTEN));
Kojto 136:ef9c61f8c49f 1658 }
Kojto 136:ef9c61f8c49f 1659 #endif /* SPI_I2SCFGR_ASTRTEN */
Kojto 136:ef9c61f8c49f 1660
Kojto 136:ef9c61f8c49f 1661 /**
Kojto 136:ef9c61f8c49f 1662 * @}
Kojto 136:ef9c61f8c49f 1663 */
Kojto 136:ef9c61f8c49f 1664
Kojto 136:ef9c61f8c49f 1665 /** @defgroup I2S_LL_EF_FLAG FLAG Management
Kojto 136:ef9c61f8c49f 1666 * @{
Kojto 136:ef9c61f8c49f 1667 */
Kojto 136:ef9c61f8c49f 1668
Kojto 136:ef9c61f8c49f 1669 /**
Kojto 136:ef9c61f8c49f 1670 * @brief Check if Rx buffer is not empty
Kojto 136:ef9c61f8c49f 1671 * @rmtoll SR RXNE LL_I2S_IsActiveFlag_RXNE
Kojto 136:ef9c61f8c49f 1672 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1673 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1674 */
Kojto 136:ef9c61f8c49f 1675 __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_RXNE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1676 {
Kojto 136:ef9c61f8c49f 1677 return LL_SPI_IsActiveFlag_RXNE(SPIx);
Kojto 136:ef9c61f8c49f 1678 }
Kojto 136:ef9c61f8c49f 1679
Kojto 136:ef9c61f8c49f 1680 /**
Kojto 136:ef9c61f8c49f 1681 * @brief Check if Tx buffer is empty
Kojto 136:ef9c61f8c49f 1682 * @rmtoll SR TXE LL_I2S_IsActiveFlag_TXE
Kojto 136:ef9c61f8c49f 1683 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1684 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1685 */
Kojto 136:ef9c61f8c49f 1686 __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_TXE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1687 {
Kojto 136:ef9c61f8c49f 1688 return LL_SPI_IsActiveFlag_TXE(SPIx);
Kojto 136:ef9c61f8c49f 1689 }
Kojto 136:ef9c61f8c49f 1690
Kojto 136:ef9c61f8c49f 1691 /**
Kojto 136:ef9c61f8c49f 1692 * @brief Get Busy flag
Kojto 136:ef9c61f8c49f 1693 * @rmtoll SR BSY LL_I2S_IsActiveFlag_BSY
Kojto 136:ef9c61f8c49f 1694 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1695 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1696 */
Kojto 136:ef9c61f8c49f 1697 __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_BSY(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1698 {
Kojto 136:ef9c61f8c49f 1699 return LL_SPI_IsActiveFlag_BSY(SPIx);
Kojto 136:ef9c61f8c49f 1700 }
Kojto 136:ef9c61f8c49f 1701
Kojto 136:ef9c61f8c49f 1702 /**
Kojto 136:ef9c61f8c49f 1703 * @brief Get Overrun error flag
Kojto 136:ef9c61f8c49f 1704 * @rmtoll SR OVR LL_I2S_IsActiveFlag_OVR
Kojto 136:ef9c61f8c49f 1705 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1706 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1707 */
Kojto 136:ef9c61f8c49f 1708 __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_OVR(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1709 {
Kojto 136:ef9c61f8c49f 1710 return LL_SPI_IsActiveFlag_OVR(SPIx);
Kojto 136:ef9c61f8c49f 1711 }
Kojto 136:ef9c61f8c49f 1712
Kojto 136:ef9c61f8c49f 1713 /**
Kojto 136:ef9c61f8c49f 1714 * @brief Get Underrun error flag
Kojto 136:ef9c61f8c49f 1715 * @rmtoll SR UDR LL_I2S_IsActiveFlag_UDR
Kojto 136:ef9c61f8c49f 1716 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1717 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1718 */
Kojto 136:ef9c61f8c49f 1719 __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_UDR(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1720 {
Kojto 136:ef9c61f8c49f 1721 return (READ_BIT(SPIx->SR, SPI_SR_UDR) == (SPI_SR_UDR));
Kojto 136:ef9c61f8c49f 1722 }
Kojto 136:ef9c61f8c49f 1723
Kojto 136:ef9c61f8c49f 1724 /**
Kojto 136:ef9c61f8c49f 1725 * @brief Get Frame format error flag
Kojto 136:ef9c61f8c49f 1726 * @rmtoll SR FRE LL_I2S_IsActiveFlag_FRE
Kojto 136:ef9c61f8c49f 1727 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1728 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1729 */
Kojto 136:ef9c61f8c49f 1730 __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_FRE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1731 {
Kojto 136:ef9c61f8c49f 1732 return LL_SPI_IsActiveFlag_FRE(SPIx);
Kojto 136:ef9c61f8c49f 1733 }
Kojto 136:ef9c61f8c49f 1734
Kojto 136:ef9c61f8c49f 1735 /**
Kojto 136:ef9c61f8c49f 1736 * @brief Get Channel side flag.
Kojto 136:ef9c61f8c49f 1737 * @note 0: Channel Left has to be transmitted or has been received\n
Kojto 136:ef9c61f8c49f 1738 * 1: Channel Right has to be transmitted or has been received\n
Kojto 136:ef9c61f8c49f 1739 * It has no significance in PCM mode.
Kojto 136:ef9c61f8c49f 1740 * @rmtoll SR CHSIDE LL_I2S_IsActiveFlag_CHSIDE
Kojto 136:ef9c61f8c49f 1741 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1742 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1743 */
Kojto 136:ef9c61f8c49f 1744 __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_CHSIDE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1745 {
Kojto 136:ef9c61f8c49f 1746 return (READ_BIT(SPIx->SR, SPI_SR_CHSIDE) == (SPI_SR_CHSIDE));
Kojto 136:ef9c61f8c49f 1747 }
Kojto 136:ef9c61f8c49f 1748
Kojto 136:ef9c61f8c49f 1749 /**
Kojto 136:ef9c61f8c49f 1750 * @brief Clear Overrun error flag
Kojto 136:ef9c61f8c49f 1751 * @rmtoll SR OVR LL_I2S_ClearFlag_OVR
Kojto 136:ef9c61f8c49f 1752 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1753 * @retval None
Kojto 136:ef9c61f8c49f 1754 */
Kojto 136:ef9c61f8c49f 1755 __STATIC_INLINE void LL_I2S_ClearFlag_OVR(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1756 {
Kojto 136:ef9c61f8c49f 1757 LL_SPI_ClearFlag_OVR(SPIx);
Kojto 136:ef9c61f8c49f 1758 }
Kojto 136:ef9c61f8c49f 1759
Kojto 136:ef9c61f8c49f 1760 /**
Kojto 136:ef9c61f8c49f 1761 * @brief Clear Underrun error flag
Kojto 136:ef9c61f8c49f 1762 * @rmtoll SR UDR LL_I2S_ClearFlag_UDR
Kojto 136:ef9c61f8c49f 1763 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1764 * @retval None
Kojto 136:ef9c61f8c49f 1765 */
Kojto 136:ef9c61f8c49f 1766 __STATIC_INLINE void LL_I2S_ClearFlag_UDR(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1767 {
Kojto 136:ef9c61f8c49f 1768 __IO uint32_t tmpreg;
Kojto 136:ef9c61f8c49f 1769 tmpreg = SPIx->SR;
Kojto 136:ef9c61f8c49f 1770 (void)tmpreg;
Kojto 136:ef9c61f8c49f 1771 }
Kojto 136:ef9c61f8c49f 1772
Kojto 136:ef9c61f8c49f 1773 /**
Kojto 136:ef9c61f8c49f 1774 * @brief Clear Frame format error flag
Kojto 136:ef9c61f8c49f 1775 * @rmtoll SR FRE LL_I2S_ClearFlag_FRE
Kojto 136:ef9c61f8c49f 1776 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1777 * @retval None
Kojto 136:ef9c61f8c49f 1778 */
Kojto 136:ef9c61f8c49f 1779 __STATIC_INLINE void LL_I2S_ClearFlag_FRE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1780 {
Kojto 136:ef9c61f8c49f 1781 LL_SPI_ClearFlag_FRE(SPIx);
Kojto 136:ef9c61f8c49f 1782 }
Kojto 136:ef9c61f8c49f 1783
Kojto 136:ef9c61f8c49f 1784 /**
Kojto 136:ef9c61f8c49f 1785 * @}
Kojto 136:ef9c61f8c49f 1786 */
Kojto 136:ef9c61f8c49f 1787
Kojto 136:ef9c61f8c49f 1788 /** @defgroup I2S_LL_EF_IT Interrupt Management
Kojto 136:ef9c61f8c49f 1789 * @{
Kojto 136:ef9c61f8c49f 1790 */
Kojto 136:ef9c61f8c49f 1791
Kojto 136:ef9c61f8c49f 1792 /**
Kojto 136:ef9c61f8c49f 1793 * @brief Enable error IT
Kojto 136:ef9c61f8c49f 1794 * @note This bit controls the generation of an interrupt when an error condition occurs (OVR, UDR and FRE in I2S mode).
Kojto 136:ef9c61f8c49f 1795 * @rmtoll CR2 ERRIE LL_I2S_EnableIT_ERR
Kojto 136:ef9c61f8c49f 1796 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1797 * @retval None
Kojto 136:ef9c61f8c49f 1798 */
Kojto 136:ef9c61f8c49f 1799 __STATIC_INLINE void LL_I2S_EnableIT_ERR(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1800 {
Kojto 136:ef9c61f8c49f 1801 LL_SPI_EnableIT_ERR(SPIx);
Kojto 136:ef9c61f8c49f 1802 }
Kojto 136:ef9c61f8c49f 1803
Kojto 136:ef9c61f8c49f 1804 /**
Kojto 136:ef9c61f8c49f 1805 * @brief Enable Rx buffer not empty IT
Kojto 136:ef9c61f8c49f 1806 * @rmtoll CR2 RXNEIE LL_I2S_EnableIT_RXNE
Kojto 136:ef9c61f8c49f 1807 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1808 * @retval None
Kojto 136:ef9c61f8c49f 1809 */
Kojto 136:ef9c61f8c49f 1810 __STATIC_INLINE void LL_I2S_EnableIT_RXNE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1811 {
Kojto 136:ef9c61f8c49f 1812 LL_SPI_EnableIT_RXNE(SPIx);
Kojto 136:ef9c61f8c49f 1813 }
Kojto 136:ef9c61f8c49f 1814
Kojto 136:ef9c61f8c49f 1815 /**
Kojto 136:ef9c61f8c49f 1816 * @brief Enable Tx buffer empty IT
Kojto 136:ef9c61f8c49f 1817 * @rmtoll CR2 TXEIE LL_I2S_EnableIT_TXE
Kojto 136:ef9c61f8c49f 1818 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1819 * @retval None
Kojto 136:ef9c61f8c49f 1820 */
Kojto 136:ef9c61f8c49f 1821 __STATIC_INLINE void LL_I2S_EnableIT_TXE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1822 {
Kojto 136:ef9c61f8c49f 1823 LL_SPI_EnableIT_TXE(SPIx);
Kojto 136:ef9c61f8c49f 1824 }
Kojto 136:ef9c61f8c49f 1825
Kojto 136:ef9c61f8c49f 1826 /**
Kojto 136:ef9c61f8c49f 1827 * @brief Disable Error IT
Kojto 136:ef9c61f8c49f 1828 * @note This bit controls the generation of an interrupt when an error condition occurs (OVR, UDR and FRE in I2S mode).
Kojto 136:ef9c61f8c49f 1829 * @rmtoll CR2 ERRIE LL_I2S_DisableIT_ERR
Kojto 136:ef9c61f8c49f 1830 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1831 * @retval None
Kojto 136:ef9c61f8c49f 1832 */
Kojto 136:ef9c61f8c49f 1833 __STATIC_INLINE void LL_I2S_DisableIT_ERR(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1834 {
Kojto 136:ef9c61f8c49f 1835 LL_SPI_DisableIT_ERR(SPIx);
Kojto 136:ef9c61f8c49f 1836 }
Kojto 136:ef9c61f8c49f 1837
Kojto 136:ef9c61f8c49f 1838 /**
Kojto 136:ef9c61f8c49f 1839 * @brief Disable Rx buffer not empty IT
Kojto 136:ef9c61f8c49f 1840 * @rmtoll CR2 RXNEIE LL_I2S_DisableIT_RXNE
Kojto 136:ef9c61f8c49f 1841 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1842 * @retval None
Kojto 136:ef9c61f8c49f 1843 */
Kojto 136:ef9c61f8c49f 1844 __STATIC_INLINE void LL_I2S_DisableIT_RXNE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1845 {
Kojto 136:ef9c61f8c49f 1846 LL_SPI_DisableIT_RXNE(SPIx);
Kojto 136:ef9c61f8c49f 1847 }
Kojto 136:ef9c61f8c49f 1848
Kojto 136:ef9c61f8c49f 1849 /**
Kojto 136:ef9c61f8c49f 1850 * @brief Disable Tx buffer empty IT
Kojto 136:ef9c61f8c49f 1851 * @rmtoll CR2 TXEIE LL_I2S_DisableIT_TXE
Kojto 136:ef9c61f8c49f 1852 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1853 * @retval None
Kojto 136:ef9c61f8c49f 1854 */
Kojto 136:ef9c61f8c49f 1855 __STATIC_INLINE void LL_I2S_DisableIT_TXE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1856 {
Kojto 136:ef9c61f8c49f 1857 LL_SPI_DisableIT_TXE(SPIx);
Kojto 136:ef9c61f8c49f 1858 }
Kojto 136:ef9c61f8c49f 1859
Kojto 136:ef9c61f8c49f 1860 /**
Kojto 136:ef9c61f8c49f 1861 * @brief Check if ERR IT is enabled
Kojto 136:ef9c61f8c49f 1862 * @rmtoll CR2 ERRIE LL_I2S_IsEnabledIT_ERR
Kojto 136:ef9c61f8c49f 1863 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1864 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1865 */
Kojto 136:ef9c61f8c49f 1866 __STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_ERR(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1867 {
Kojto 136:ef9c61f8c49f 1868 return LL_SPI_IsEnabledIT_ERR(SPIx);
Kojto 136:ef9c61f8c49f 1869 }
Kojto 136:ef9c61f8c49f 1870
Kojto 136:ef9c61f8c49f 1871 /**
Kojto 136:ef9c61f8c49f 1872 * @brief Check if RXNE IT is enabled
Kojto 136:ef9c61f8c49f 1873 * @rmtoll CR2 RXNEIE LL_I2S_IsEnabledIT_RXNE
Kojto 136:ef9c61f8c49f 1874 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1875 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1876 */
Kojto 136:ef9c61f8c49f 1877 __STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_RXNE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1878 {
Kojto 136:ef9c61f8c49f 1879 return LL_SPI_IsEnabledIT_RXNE(SPIx);
Kojto 136:ef9c61f8c49f 1880 }
Kojto 136:ef9c61f8c49f 1881
Kojto 136:ef9c61f8c49f 1882 /**
Kojto 136:ef9c61f8c49f 1883 * @brief Check if TXE IT is enabled
Kojto 136:ef9c61f8c49f 1884 * @rmtoll CR2 TXEIE LL_I2S_IsEnabledIT_TXE
Kojto 136:ef9c61f8c49f 1885 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1886 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1887 */
Kojto 136:ef9c61f8c49f 1888 __STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_TXE(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1889 {
Kojto 136:ef9c61f8c49f 1890 return LL_SPI_IsEnabledIT_TXE(SPIx);
Kojto 136:ef9c61f8c49f 1891 }
Kojto 136:ef9c61f8c49f 1892
Kojto 136:ef9c61f8c49f 1893 /**
Kojto 136:ef9c61f8c49f 1894 * @}
Kojto 136:ef9c61f8c49f 1895 */
Kojto 136:ef9c61f8c49f 1896
Kojto 136:ef9c61f8c49f 1897 /** @defgroup I2S_LL_EF_DMA DMA Management
Kojto 136:ef9c61f8c49f 1898 * @{
Kojto 136:ef9c61f8c49f 1899 */
Kojto 136:ef9c61f8c49f 1900
Kojto 136:ef9c61f8c49f 1901 /**
Kojto 136:ef9c61f8c49f 1902 * @brief Enable DMA Rx
Kojto 136:ef9c61f8c49f 1903 * @rmtoll CR2 RXDMAEN LL_I2S_EnableDMAReq_RX
Kojto 136:ef9c61f8c49f 1904 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1905 * @retval None
Kojto 136:ef9c61f8c49f 1906 */
Kojto 136:ef9c61f8c49f 1907 __STATIC_INLINE void LL_I2S_EnableDMAReq_RX(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1908 {
Kojto 136:ef9c61f8c49f 1909 LL_SPI_EnableDMAReq_RX(SPIx);
Kojto 136:ef9c61f8c49f 1910 }
Kojto 136:ef9c61f8c49f 1911
Kojto 136:ef9c61f8c49f 1912 /**
Kojto 136:ef9c61f8c49f 1913 * @brief Disable DMA Rx
Kojto 136:ef9c61f8c49f 1914 * @rmtoll CR2 RXDMAEN LL_I2S_DisableDMAReq_RX
Kojto 136:ef9c61f8c49f 1915 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1916 * @retval None
Kojto 136:ef9c61f8c49f 1917 */
Kojto 136:ef9c61f8c49f 1918 __STATIC_INLINE void LL_I2S_DisableDMAReq_RX(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1919 {
Kojto 136:ef9c61f8c49f 1920 LL_SPI_DisableDMAReq_RX(SPIx);
Kojto 136:ef9c61f8c49f 1921 }
Kojto 136:ef9c61f8c49f 1922
Kojto 136:ef9c61f8c49f 1923 /**
Kojto 136:ef9c61f8c49f 1924 * @brief Check if DMA Rx is enabled
Kojto 136:ef9c61f8c49f 1925 * @rmtoll CR2 RXDMAEN LL_I2S_IsEnabledDMAReq_RX
Kojto 136:ef9c61f8c49f 1926 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1927 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1928 */
Kojto 136:ef9c61f8c49f 1929 __STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1930 {
Kojto 136:ef9c61f8c49f 1931 return LL_SPI_IsEnabledDMAReq_RX(SPIx);
Kojto 136:ef9c61f8c49f 1932 }
Kojto 136:ef9c61f8c49f 1933
Kojto 136:ef9c61f8c49f 1934 /**
Kojto 136:ef9c61f8c49f 1935 * @brief Enable DMA Tx
Kojto 136:ef9c61f8c49f 1936 * @rmtoll CR2 TXDMAEN LL_I2S_EnableDMAReq_TX
Kojto 136:ef9c61f8c49f 1937 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1938 * @retval None
Kojto 136:ef9c61f8c49f 1939 */
Kojto 136:ef9c61f8c49f 1940 __STATIC_INLINE void LL_I2S_EnableDMAReq_TX(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1941 {
Kojto 136:ef9c61f8c49f 1942 LL_SPI_EnableDMAReq_TX(SPIx);
Kojto 136:ef9c61f8c49f 1943 }
Kojto 136:ef9c61f8c49f 1944
Kojto 136:ef9c61f8c49f 1945 /**
Kojto 136:ef9c61f8c49f 1946 * @brief Disable DMA Tx
Kojto 136:ef9c61f8c49f 1947 * @rmtoll CR2 TXDMAEN LL_I2S_DisableDMAReq_TX
Kojto 136:ef9c61f8c49f 1948 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1949 * @retval None
Kojto 136:ef9c61f8c49f 1950 */
Kojto 136:ef9c61f8c49f 1951 __STATIC_INLINE void LL_I2S_DisableDMAReq_TX(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1952 {
Kojto 136:ef9c61f8c49f 1953 LL_SPI_DisableDMAReq_TX(SPIx);
Kojto 136:ef9c61f8c49f 1954 }
Kojto 136:ef9c61f8c49f 1955
Kojto 136:ef9c61f8c49f 1956 /**
Kojto 136:ef9c61f8c49f 1957 * @brief Check if DMA Tx is enabled
Kojto 136:ef9c61f8c49f 1958 * @rmtoll CR2 TXDMAEN LL_I2S_IsEnabledDMAReq_TX
Kojto 136:ef9c61f8c49f 1959 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1960 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1961 */
Kojto 136:ef9c61f8c49f 1962 __STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1963 {
Kojto 136:ef9c61f8c49f 1964 return LL_SPI_IsEnabledDMAReq_TX(SPIx);
Kojto 136:ef9c61f8c49f 1965 }
Kojto 136:ef9c61f8c49f 1966
Kojto 136:ef9c61f8c49f 1967 /**
Kojto 136:ef9c61f8c49f 1968 * @}
Kojto 136:ef9c61f8c49f 1969 */
Kojto 136:ef9c61f8c49f 1970
Kojto 136:ef9c61f8c49f 1971 /** @defgroup I2S_LL_EF_DATA DATA Management
Kojto 136:ef9c61f8c49f 1972 * @{
Kojto 136:ef9c61f8c49f 1973 */
Kojto 136:ef9c61f8c49f 1974
Kojto 136:ef9c61f8c49f 1975 /**
Kojto 136:ef9c61f8c49f 1976 * @brief Read 16-Bits in data register
Kojto 136:ef9c61f8c49f 1977 * @rmtoll DR DR LL_I2S_ReceiveData16
Kojto 136:ef9c61f8c49f 1978 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1979 * @retval RxData Value between Min_Data=0x0000 and Max_Data=0xFFFF
Kojto 136:ef9c61f8c49f 1980 */
Kojto 136:ef9c61f8c49f 1981 __STATIC_INLINE uint16_t LL_I2S_ReceiveData16(SPI_TypeDef *SPIx)
Kojto 136:ef9c61f8c49f 1982 {
Kojto 136:ef9c61f8c49f 1983 return LL_SPI_ReceiveData16(SPIx);
Kojto 136:ef9c61f8c49f 1984 }
Kojto 136:ef9c61f8c49f 1985
Kojto 136:ef9c61f8c49f 1986 /**
Kojto 136:ef9c61f8c49f 1987 * @brief Write 16-Bits in data register
Kojto 136:ef9c61f8c49f 1988 * @rmtoll DR DR LL_I2S_TransmitData16
Kojto 136:ef9c61f8c49f 1989 * @param SPIx SPI Instance
Kojto 136:ef9c61f8c49f 1990 * @param TxData Value between Min_Data=0x0000 and Max_Data=0xFFFF
Kojto 136:ef9c61f8c49f 1991 * @retval None
Kojto 136:ef9c61f8c49f 1992 */
Kojto 136:ef9c61f8c49f 1993 __STATIC_INLINE void LL_I2S_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData)
Kojto 136:ef9c61f8c49f 1994 {
Kojto 136:ef9c61f8c49f 1995 LL_SPI_TransmitData16(SPIx, TxData);
Kojto 136:ef9c61f8c49f 1996 }
Kojto 136:ef9c61f8c49f 1997
Kojto 136:ef9c61f8c49f 1998 /**
Kojto 136:ef9c61f8c49f 1999 * @}
Kojto 136:ef9c61f8c49f 2000 */
Kojto 136:ef9c61f8c49f 2001
Kojto 136:ef9c61f8c49f 2002 #if defined(USE_FULL_LL_DRIVER)
Kojto 136:ef9c61f8c49f 2003 /** @defgroup I2S_LL_EF_Init Initialization and de-initialization functions
Kojto 136:ef9c61f8c49f 2004 * @{
Kojto 136:ef9c61f8c49f 2005 */
Kojto 136:ef9c61f8c49f 2006
Kojto 136:ef9c61f8c49f 2007 ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx);
Kojto 136:ef9c61f8c49f 2008 ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct);
Kojto 136:ef9c61f8c49f 2009 void LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct);
Kojto 136:ef9c61f8c49f 2010 void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity);
Kojto 136:ef9c61f8c49f 2011
Kojto 136:ef9c61f8c49f 2012 /**
Kojto 136:ef9c61f8c49f 2013 * @}
Kojto 136:ef9c61f8c49f 2014 */
Kojto 136:ef9c61f8c49f 2015 #endif /* USE_FULL_LL_DRIVER */
Kojto 136:ef9c61f8c49f 2016
Kojto 136:ef9c61f8c49f 2017 /**
Kojto 136:ef9c61f8c49f 2018 * @}
Kojto 136:ef9c61f8c49f 2019 */
Kojto 136:ef9c61f8c49f 2020
Kojto 136:ef9c61f8c49f 2021 /**
Kojto 136:ef9c61f8c49f 2022 * @}
Kojto 136:ef9c61f8c49f 2023 */
Kojto 136:ef9c61f8c49f 2024 #endif /* SPI_I2S_SUPPORT */
Kojto 136:ef9c61f8c49f 2025
Kojto 136:ef9c61f8c49f 2026 #endif /* defined (SPI1) || defined (SPI2) */
Kojto 136:ef9c61f8c49f 2027
Kojto 136:ef9c61f8c49f 2028 /**
Kojto 136:ef9c61f8c49f 2029 * @}
Kojto 136:ef9c61f8c49f 2030 */
Kojto 136:ef9c61f8c49f 2031
Kojto 136:ef9c61f8c49f 2032 #ifdef __cplusplus
Kojto 136:ef9c61f8c49f 2033 }
Kojto 136:ef9c61f8c49f 2034 #endif
Kojto 136:ef9c61f8c49f 2035
Kojto 136:ef9c61f8c49f 2036 #endif /* __STM32L0xx_LL_SPI_H */
Kojto 136:ef9c61f8c49f 2037
Kojto 136:ef9c61f8c49f 2038 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/