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TARGET_NUCLEO_F302R8/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_dac.h@136:ef9c61f8c49f, 2017-02-14 (annotated)
- Committer:
- Kojto
- Date:
- Tue Feb 14 11:24:20 2017 +0000
- Revision:
- 136:ef9c61f8c49f
- Parent:
- 135:176b8275d35d
Release 136 of the mbed library
Ports for Upcoming Targets
Fixes and Changes
3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432
3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181
3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626
3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628
3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629
3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632
3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642
3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664
3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655
3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657
3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658
3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685
3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692
3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621
3649: [STM32F7] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3649
3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695
3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 126:abea610beb85 | 1 | /** |
| AnnaBridge | 126:abea610beb85 | 2 | ****************************************************************************** |
| AnnaBridge | 126:abea610beb85 | 3 | * @file stm32f3xx_hal_dac.h |
| AnnaBridge | 126:abea610beb85 | 4 | * @author MCD Application Team |
| <> | 135:176b8275d35d | 5 | * @version V1.4.0 |
| <> | 135:176b8275d35d | 6 | * @date 16-December-2016 |
| AnnaBridge | 126:abea610beb85 | 7 | * @brief Header file of DAC HAL module. |
| AnnaBridge | 126:abea610beb85 | 8 | ****************************************************************************** |
| AnnaBridge | 126:abea610beb85 | 9 | * @attention |
| AnnaBridge | 126:abea610beb85 | 10 | * |
| AnnaBridge | 126:abea610beb85 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| AnnaBridge | 126:abea610beb85 | 12 | * |
| AnnaBridge | 126:abea610beb85 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 126:abea610beb85 | 14 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 126:abea610beb85 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 126:abea610beb85 | 16 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 126:abea610beb85 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 126:abea610beb85 | 18 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 126:abea610beb85 | 19 | * and/or other materials provided with the distribution. |
| AnnaBridge | 126:abea610beb85 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 126:abea610beb85 | 21 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 126:abea610beb85 | 22 | * without specific prior written permission. |
| AnnaBridge | 126:abea610beb85 | 23 | * |
| AnnaBridge | 126:abea610beb85 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 126:abea610beb85 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 126:abea610beb85 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 126:abea610beb85 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 126:abea610beb85 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 126:abea610beb85 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 126:abea610beb85 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 126:abea610beb85 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 126:abea610beb85 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 126:abea610beb85 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 126:abea610beb85 | 34 | * |
| AnnaBridge | 126:abea610beb85 | 35 | ****************************************************************************** |
| AnnaBridge | 126:abea610beb85 | 36 | */ |
| AnnaBridge | 126:abea610beb85 | 37 | |
| AnnaBridge | 126:abea610beb85 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 39 | #ifndef __STM32F3xx_HAL_DAC_H |
| AnnaBridge | 126:abea610beb85 | 40 | #define __STM32F3xx_HAL_DAC_H |
| AnnaBridge | 126:abea610beb85 | 41 | |
| AnnaBridge | 126:abea610beb85 | 42 | #ifdef __cplusplus |
| AnnaBridge | 126:abea610beb85 | 43 | extern "C" { |
| AnnaBridge | 126:abea610beb85 | 44 | #endif |
| AnnaBridge | 126:abea610beb85 | 45 | |
| AnnaBridge | 126:abea610beb85 | 46 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 47 | #include "stm32f3xx_hal_def.h" |
| AnnaBridge | 126:abea610beb85 | 48 | |
| AnnaBridge | 126:abea610beb85 | 49 | /** @addtogroup STM32F3xx_HAL_Driver |
| AnnaBridge | 126:abea610beb85 | 50 | * @{ |
| AnnaBridge | 126:abea610beb85 | 51 | */ |
| AnnaBridge | 126:abea610beb85 | 52 | |
| AnnaBridge | 126:abea610beb85 | 53 | /** @addtogroup DAC |
| AnnaBridge | 126:abea610beb85 | 54 | * @{ |
| AnnaBridge | 126:abea610beb85 | 55 | */ |
| AnnaBridge | 126:abea610beb85 | 56 | |
| AnnaBridge | 126:abea610beb85 | 57 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 58 | |
| AnnaBridge | 126:abea610beb85 | 59 | /** @defgroup DAC_Exported_Types DAC Exported Types |
| AnnaBridge | 126:abea610beb85 | 60 | * @{ |
| AnnaBridge | 126:abea610beb85 | 61 | */ |
| AnnaBridge | 126:abea610beb85 | 62 | |
| AnnaBridge | 126:abea610beb85 | 63 | /** |
| AnnaBridge | 126:abea610beb85 | 64 | * @brief HAL State structures definition |
| AnnaBridge | 126:abea610beb85 | 65 | */ |
| AnnaBridge | 126:abea610beb85 | 66 | typedef enum |
| AnnaBridge | 126:abea610beb85 | 67 | { |
| <> | 135:176b8275d35d | 68 | HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ |
| <> | 135:176b8275d35d | 69 | HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ |
| <> | 135:176b8275d35d | 70 | HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ |
| <> | 135:176b8275d35d | 71 | HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ |
| AnnaBridge | 126:abea610beb85 | 72 | HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */ |
| AnnaBridge | 126:abea610beb85 | 73 | |
| AnnaBridge | 126:abea610beb85 | 74 | }HAL_DAC_StateTypeDef; |
| AnnaBridge | 126:abea610beb85 | 75 | |
| AnnaBridge | 126:abea610beb85 | 76 | /** |
| AnnaBridge | 126:abea610beb85 | 77 | * @brief DAC Configuration regular Channel structure definition |
| AnnaBridge | 126:abea610beb85 | 78 | */ |
| AnnaBridge | 126:abea610beb85 | 79 | typedef struct |
| AnnaBridge | 126:abea610beb85 | 80 | { |
| AnnaBridge | 126:abea610beb85 | 81 | uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. |
| AnnaBridge | 126:abea610beb85 | 82 | This parameter can be a value of @ref DACEx_trigger_selection */ |
| AnnaBridge | 126:abea610beb85 | 83 | |
| AnnaBridge | 126:abea610beb85 | 84 | uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. |
| AnnaBridge | 126:abea610beb85 | 85 | This parameter can be a value of @ref DAC_output_buffer |
| AnnaBridge | 126:abea610beb85 | 86 | For a given DAC channel, is this paramater applies then DAC_OutputSwitch |
| AnnaBridge | 126:abea610beb85 | 87 | does not apply */ |
| AnnaBridge | 126:abea610beb85 | 88 | |
| AnnaBridge | 126:abea610beb85 | 89 | uint32_t DAC_OutputSwitch; /*!< Specifies whether the DAC channel output switch is enabled or disabled. |
| AnnaBridge | 126:abea610beb85 | 90 | This parameter can be a value of @ref DAC_OutputSwitch |
| AnnaBridge | 126:abea610beb85 | 91 | For a given DAC channel, is this paramater applies then DAC_OutputBuffer |
| AnnaBridge | 126:abea610beb85 | 92 | does not apply */ |
| AnnaBridge | 126:abea610beb85 | 93 | |
| AnnaBridge | 126:abea610beb85 | 94 | }DAC_ChannelConfTypeDef; |
| AnnaBridge | 126:abea610beb85 | 95 | |
| AnnaBridge | 126:abea610beb85 | 96 | /** |
| AnnaBridge | 126:abea610beb85 | 97 | * @brief DAC handle Structure definition |
| AnnaBridge | 126:abea610beb85 | 98 | */ |
| AnnaBridge | 126:abea610beb85 | 99 | typedef struct __DAC_HandleTypeDef |
| AnnaBridge | 126:abea610beb85 | 100 | { |
| AnnaBridge | 126:abea610beb85 | 101 | DAC_TypeDef *Instance; /*!< Register base address */ |
| AnnaBridge | 126:abea610beb85 | 102 | |
| AnnaBridge | 126:abea610beb85 | 103 | __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ |
| AnnaBridge | 126:abea610beb85 | 104 | |
| AnnaBridge | 126:abea610beb85 | 105 | HAL_LockTypeDef Lock; /*!< DAC locking object */ |
| AnnaBridge | 126:abea610beb85 | 106 | |
| <> | 135:176b8275d35d | 107 | DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1U */ |
| AnnaBridge | 126:abea610beb85 | 108 | |
| <> | 135:176b8275d35d | 109 | DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2U */ |
| AnnaBridge | 126:abea610beb85 | 110 | |
| AnnaBridge | 126:abea610beb85 | 111 | __IO uint32_t ErrorCode; /*!< DAC Error code */ |
| AnnaBridge | 126:abea610beb85 | 112 | |
| AnnaBridge | 126:abea610beb85 | 113 | }DAC_HandleTypeDef; |
| AnnaBridge | 126:abea610beb85 | 114 | /** |
| AnnaBridge | 126:abea610beb85 | 115 | * @} |
| AnnaBridge | 126:abea610beb85 | 116 | */ |
| AnnaBridge | 126:abea610beb85 | 117 | |
| AnnaBridge | 126:abea610beb85 | 118 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 119 | /** @defgroup DAC_Exported_Constants DAC Exported Constants |
| AnnaBridge | 126:abea610beb85 | 120 | * @{ |
| AnnaBridge | 126:abea610beb85 | 121 | */ |
| AnnaBridge | 126:abea610beb85 | 122 | |
| AnnaBridge | 126:abea610beb85 | 123 | /** @defgroup DAC_Error_Code DAC Error Code |
| AnnaBridge | 126:abea610beb85 | 124 | * @{ |
| AnnaBridge | 126:abea610beb85 | 125 | */ |
| AnnaBridge | 126:abea610beb85 | 126 | #define HAL_DAC_ERROR_NONE 0x00 /*!< No error */ |
| AnnaBridge | 126:abea610beb85 | 127 | #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DMA underrun error */ |
| AnnaBridge | 126:abea610beb85 | 128 | #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DMA underrun error */ |
| AnnaBridge | 126:abea610beb85 | 129 | #define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */ |
| AnnaBridge | 126:abea610beb85 | 130 | /** |
| AnnaBridge | 126:abea610beb85 | 131 | * @} |
| AnnaBridge | 126:abea610beb85 | 132 | */ |
| AnnaBridge | 126:abea610beb85 | 133 | |
| AnnaBridge | 126:abea610beb85 | 134 | /** @defgroup DAC_lfsrunmask_triangleamplitude DAC lfsrunmask triangleamplitude |
| AnnaBridge | 126:abea610beb85 | 135 | * @{ |
| AnnaBridge | 126:abea610beb85 | 136 | */ |
| <> | 135:176b8275d35d | 137 | #define DAC_LFSRUNMASK_BIT0 (0x00000000U) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */ |
| AnnaBridge | 126:abea610beb85 | 138 | #define DAC_LFSRUNMASK_BITS1_0 ((uint32_t)DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */ |
| AnnaBridge | 126:abea610beb85 | 139 | #define DAC_LFSRUNMASK_BITS2_0 ((uint32_t)DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */ |
| AnnaBridge | 126:abea610beb85 | 140 | #define DAC_LFSRUNMASK_BITS3_0 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0)/*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */ |
| AnnaBridge | 126:abea610beb85 | 141 | #define DAC_LFSRUNMASK_BITS4_0 ((uint32_t)DAC_CR_MAMP1_2) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */ |
| AnnaBridge | 126:abea610beb85 | 142 | #define DAC_LFSRUNMASK_BITS5_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */ |
| AnnaBridge | 126:abea610beb85 | 143 | #define DAC_LFSRUNMASK_BITS6_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */ |
| AnnaBridge | 126:abea610beb85 | 144 | #define DAC_LFSRUNMASK_BITS7_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */ |
| AnnaBridge | 126:abea610beb85 | 145 | #define DAC_LFSRUNMASK_BITS8_0 ((uint32_t)DAC_CR_MAMP1_3) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */ |
| AnnaBridge | 126:abea610beb85 | 146 | #define DAC_LFSRUNMASK_BITS9_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */ |
| AnnaBridge | 126:abea610beb85 | 147 | #define DAC_LFSRUNMASK_BITS10_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */ |
| AnnaBridge | 126:abea610beb85 | 148 | #define DAC_LFSRUNMASK_BITS11_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */ |
| <> | 135:176b8275d35d | 149 | #define DAC_TRIANGLEAMPLITUDE_1 (0x00000000U) /*!< Select max triangle amplitude of 1U */ |
| <> | 135:176b8275d35d | 150 | #define DAC_TRIANGLEAMPLITUDE_3 ((uint32_t)DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 3U */ |
| <> | 135:176b8275d35d | 151 | #define DAC_TRIANGLEAMPLITUDE_7 ((uint32_t)DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 7U */ |
| <> | 135:176b8275d35d | 152 | #define DAC_TRIANGLEAMPLITUDE_15 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 15U */ |
| <> | 135:176b8275d35d | 153 | #define DAC_TRIANGLEAMPLITUDE_31 ((uint32_t)DAC_CR_MAMP1_2) /*!< Select max triangle amplitude of 31U */ |
| <> | 135:176b8275d35d | 154 | #define DAC_TRIANGLEAMPLITUDE_63 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 63U */ |
| <> | 135:176b8275d35d | 155 | #define DAC_TRIANGLEAMPLITUDE_127 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 127U */ |
| <> | 135:176b8275d35d | 156 | #define DAC_TRIANGLEAMPLITUDE_255 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 255U */ |
| <> | 135:176b8275d35d | 157 | #define DAC_TRIANGLEAMPLITUDE_511 ((uint32_t)DAC_CR_MAMP1_3) /*!< Select max triangle amplitude of 511U */ |
| <> | 135:176b8275d35d | 158 | #define DAC_TRIANGLEAMPLITUDE_1023 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 1023U */ |
| <> | 135:176b8275d35d | 159 | #define DAC_TRIANGLEAMPLITUDE_2047 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 2047U */ |
| <> | 135:176b8275d35d | 160 | #define DAC_TRIANGLEAMPLITUDE_4095 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 4095U */ |
| AnnaBridge | 126:abea610beb85 | 161 | |
| AnnaBridge | 126:abea610beb85 | 162 | /** |
| AnnaBridge | 126:abea610beb85 | 163 | * @} |
| AnnaBridge | 126:abea610beb85 | 164 | */ |
| AnnaBridge | 126:abea610beb85 | 165 | |
| AnnaBridge | 126:abea610beb85 | 166 | /** @defgroup DAC_output_buffer DAC output buffer |
| AnnaBridge | 126:abea610beb85 | 167 | * @{ |
| AnnaBridge | 126:abea610beb85 | 168 | */ |
| <> | 135:176b8275d35d | 169 | #define DAC_OUTPUTBUFFER_ENABLE (0x00000000U) |
| AnnaBridge | 126:abea610beb85 | 170 | #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1) |
| AnnaBridge | 126:abea610beb85 | 171 | |
| AnnaBridge | 126:abea610beb85 | 172 | /** |
| AnnaBridge | 126:abea610beb85 | 173 | * @} |
| AnnaBridge | 126:abea610beb85 | 174 | */ |
| AnnaBridge | 126:abea610beb85 | 175 | |
| AnnaBridge | 126:abea610beb85 | 176 | #if defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) |
| AnnaBridge | 126:abea610beb85 | 177 | /** @defgroup DAC_output_switch DAC output switch |
| AnnaBridge | 126:abea610beb85 | 178 | * @{ |
| AnnaBridge | 126:abea610beb85 | 179 | */ |
| <> | 135:176b8275d35d | 180 | #define DAC_OUTPUTSWITCH_DISABLE (0x00000000U) |
| AnnaBridge | 126:abea610beb85 | 181 | #define DAC_OUTPUTSWITCH_ENABLE ((uint32_t)DAC_CR_OUTEN1) |
| AnnaBridge | 126:abea610beb85 | 182 | |
| AnnaBridge | 126:abea610beb85 | 183 | /** |
| AnnaBridge | 126:abea610beb85 | 184 | * @} |
| AnnaBridge | 126:abea610beb85 | 185 | */ |
| AnnaBridge | 126:abea610beb85 | 186 | |
| AnnaBridge | 126:abea610beb85 | 187 | #endif /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ |
| AnnaBridge | 126:abea610beb85 | 188 | /** @defgroup DAC_data_alignement DAC data alignement |
| AnnaBridge | 126:abea610beb85 | 189 | * @{ |
| AnnaBridge | 126:abea610beb85 | 190 | */ |
| <> | 135:176b8275d35d | 191 | #define DAC_ALIGN_12B_R (0x00000000U) |
| <> | 135:176b8275d35d | 192 | #define DAC_ALIGN_12B_L (0x00000004U) |
| <> | 135:176b8275d35d | 193 | #define DAC_ALIGN_8B_R (0x00000008U) |
| AnnaBridge | 126:abea610beb85 | 194 | |
| AnnaBridge | 126:abea610beb85 | 195 | /** |
| AnnaBridge | 126:abea610beb85 | 196 | * @} |
| AnnaBridge | 126:abea610beb85 | 197 | */ |
| AnnaBridge | 126:abea610beb85 | 198 | |
| AnnaBridge | 126:abea610beb85 | 199 | /** @defgroup DAC_flags_definition DAC flags definition |
| AnnaBridge | 126:abea610beb85 | 200 | * @{ |
| AnnaBridge | 126:abea610beb85 | 201 | */ |
| AnnaBridge | 126:abea610beb85 | 202 | #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
| AnnaBridge | 126:abea610beb85 | 203 | #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
| AnnaBridge | 126:abea610beb85 | 204 | /** |
| AnnaBridge | 126:abea610beb85 | 205 | * @} |
| AnnaBridge | 126:abea610beb85 | 206 | */ |
| AnnaBridge | 126:abea610beb85 | 207 | |
| AnnaBridge | 126:abea610beb85 | 208 | /** @defgroup DAC_interrupts_definition DAC interrupts definition |
| AnnaBridge | 126:abea610beb85 | 209 | * @{ |
| AnnaBridge | 126:abea610beb85 | 210 | */ |
| AnnaBridge | 126:abea610beb85 | 211 | #define DAC_IT_DMAUDR1 ((uint32_t)DAC_CR_DMAUDRIE1) |
| AnnaBridge | 126:abea610beb85 | 212 | #define DAC_IT_DMAUDR2 ((uint32_t)DAC_CR_DMAUDRIE2) |
| AnnaBridge | 126:abea610beb85 | 213 | |
| AnnaBridge | 126:abea610beb85 | 214 | /** |
| AnnaBridge | 126:abea610beb85 | 215 | * @} |
| AnnaBridge | 126:abea610beb85 | 216 | */ |
| AnnaBridge | 126:abea610beb85 | 217 | |
| AnnaBridge | 126:abea610beb85 | 218 | /** |
| AnnaBridge | 126:abea610beb85 | 219 | * @} |
| AnnaBridge | 126:abea610beb85 | 220 | */ |
| AnnaBridge | 126:abea610beb85 | 221 | |
| AnnaBridge | 126:abea610beb85 | 222 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 223 | |
| AnnaBridge | 126:abea610beb85 | 224 | /** @defgroup DAC_Exported_Macros DAC Exported Macros |
| AnnaBridge | 126:abea610beb85 | 225 | * @{ |
| AnnaBridge | 126:abea610beb85 | 226 | */ |
| AnnaBridge | 126:abea610beb85 | 227 | |
| AnnaBridge | 126:abea610beb85 | 228 | /** @brief Reset DAC handle state |
| AnnaBridge | 126:abea610beb85 | 229 | * @param __HANDLE__: specifies the DAC handle. |
| AnnaBridge | 126:abea610beb85 | 230 | * @retval None |
| AnnaBridge | 126:abea610beb85 | 231 | */ |
| AnnaBridge | 126:abea610beb85 | 232 | #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) |
| AnnaBridge | 126:abea610beb85 | 233 | |
| AnnaBridge | 126:abea610beb85 | 234 | /** @brief Enable the DAC channel |
| AnnaBridge | 126:abea610beb85 | 235 | * @param __HANDLE__: specifies the DAC handle. |
| AnnaBridge | 126:abea610beb85 | 236 | * @param __DAC_Channel__: specifies the DAC channel |
| AnnaBridge | 126:abea610beb85 | 237 | * @retval None |
| AnnaBridge | 126:abea610beb85 | 238 | */ |
| AnnaBridge | 126:abea610beb85 | 239 | #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ |
| AnnaBridge | 126:abea610beb85 | 240 | ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__))) |
| AnnaBridge | 126:abea610beb85 | 241 | |
| AnnaBridge | 126:abea610beb85 | 242 | /** @brief Disable the DAC channel |
| AnnaBridge | 126:abea610beb85 | 243 | * @param __HANDLE__: specifies the DAC handle |
| AnnaBridge | 126:abea610beb85 | 244 | * @param __DAC_Channel__: specifies the DAC channel. |
| AnnaBridge | 126:abea610beb85 | 245 | * @retval None |
| AnnaBridge | 126:abea610beb85 | 246 | */ |
| AnnaBridge | 126:abea610beb85 | 247 | #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ |
| AnnaBridge | 126:abea610beb85 | 248 | ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__))) |
| AnnaBridge | 126:abea610beb85 | 249 | |
| AnnaBridge | 126:abea610beb85 | 250 | /** @brief Set DHR12R1 alignment |
| AnnaBridge | 126:abea610beb85 | 251 | * @param __ALIGNMENT__: specifies the DAC alignment |
| AnnaBridge | 126:abea610beb85 | 252 | * @retval None |
| AnnaBridge | 126:abea610beb85 | 253 | */ |
| <> | 135:176b8275d35d | 254 | #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) ((0x00000008U) + (__ALIGNMENT__)) |
| AnnaBridge | 126:abea610beb85 | 255 | |
| AnnaBridge | 126:abea610beb85 | 256 | /** @brief Set DHR12R2 alignment |
| AnnaBridge | 126:abea610beb85 | 257 | * @param __ALIGNMENT__: specifies the DAC alignment |
| AnnaBridge | 126:abea610beb85 | 258 | * @retval None |
| AnnaBridge | 126:abea610beb85 | 259 | */ |
| <> | 135:176b8275d35d | 260 | #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) ((0x00000014U) + (__ALIGNMENT__)) |
| AnnaBridge | 126:abea610beb85 | 261 | |
| AnnaBridge | 126:abea610beb85 | 262 | /** @brief Set DHR12RD alignment |
| AnnaBridge | 126:abea610beb85 | 263 | * @param __ALIGNMENT__: specifies the DAC alignment |
| AnnaBridge | 126:abea610beb85 | 264 | * @retval None |
| AnnaBridge | 126:abea610beb85 | 265 | */ |
| <> | 135:176b8275d35d | 266 | #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) ((0x00000020U) + (__ALIGNMENT__)) |
| AnnaBridge | 126:abea610beb85 | 267 | |
| AnnaBridge | 126:abea610beb85 | 268 | /** @brief Enable the DAC interrupt |
| AnnaBridge | 126:abea610beb85 | 269 | * @param __HANDLE__: specifies the DAC handle |
| AnnaBridge | 126:abea610beb85 | 270 | * @param __INTERRUPT__: specifies the DAC interrupt. |
| AnnaBridge | 126:abea610beb85 | 271 | * This parameter can be any combination of the following values: |
| AnnaBridge | 126:abea610beb85 | 272 | * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
| AnnaBridge | 126:abea610beb85 | 273 | * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt |
| AnnaBridge | 126:abea610beb85 | 274 | * @retval None |
| AnnaBridge | 126:abea610beb85 | 275 | */ |
| AnnaBridge | 126:abea610beb85 | 276 | #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) |
| AnnaBridge | 126:abea610beb85 | 277 | |
| AnnaBridge | 126:abea610beb85 | 278 | /** @brief Disable the DAC interrupt |
| AnnaBridge | 126:abea610beb85 | 279 | * @param __HANDLE__: specifies the DAC handle |
| AnnaBridge | 126:abea610beb85 | 280 | * @param __INTERRUPT__: specifies the DAC interrupt. |
| AnnaBridge | 126:abea610beb85 | 281 | * This parameter can be any combination of the following values: |
| AnnaBridge | 126:abea610beb85 | 282 | * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
| AnnaBridge | 126:abea610beb85 | 283 | * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt |
| AnnaBridge | 126:abea610beb85 | 284 | * @retval None |
| AnnaBridge | 126:abea610beb85 | 285 | */ |
| AnnaBridge | 126:abea610beb85 | 286 | #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) |
| AnnaBridge | 126:abea610beb85 | 287 | |
| AnnaBridge | 126:abea610beb85 | 288 | /** @brief Check whether the specified DAC interrupt source is enabled or not |
| AnnaBridge | 126:abea610beb85 | 289 | * @param __HANDLE__: DAC handle |
| AnnaBridge | 126:abea610beb85 | 290 | * @param __INTERRUPT__: DAC interrupt source to check |
| AnnaBridge | 126:abea610beb85 | 291 | * This parameter can be any combination of the following values: |
| AnnaBridge | 126:abea610beb85 | 292 | * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
| AnnaBridge | 126:abea610beb85 | 293 | * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt |
| AnnaBridge | 126:abea610beb85 | 294 | * @retval State of interruption (SET or RESET) |
| AnnaBridge | 126:abea610beb85 | 295 | */ |
| AnnaBridge | 126:abea610beb85 | 296 | #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) |
| AnnaBridge | 126:abea610beb85 | 297 | |
| AnnaBridge | 126:abea610beb85 | 298 | /** @brief Get the selected DAC's flag status |
| AnnaBridge | 126:abea610beb85 | 299 | * @param __HANDLE__: specifies the DAC handle. |
| AnnaBridge | 126:abea610beb85 | 300 | * @param __FLAG__: specifies the DAC flag to get. |
| AnnaBridge | 126:abea610beb85 | 301 | * This parameter can be any combination of the following values: |
| AnnaBridge | 126:abea610beb85 | 302 | * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag |
| AnnaBridge | 126:abea610beb85 | 303 | * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag |
| AnnaBridge | 126:abea610beb85 | 304 | * @retval None |
| AnnaBridge | 126:abea610beb85 | 305 | */ |
| AnnaBridge | 126:abea610beb85 | 306 | #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 126:abea610beb85 | 307 | |
| AnnaBridge | 126:abea610beb85 | 308 | /** @brief Clear the DAC's flag |
| AnnaBridge | 126:abea610beb85 | 309 | * @param __HANDLE__: specifies the DAC handle. |
| AnnaBridge | 126:abea610beb85 | 310 | * @param __FLAG__: specifies the DAC flag to clear. |
| AnnaBridge | 126:abea610beb85 | 311 | * This parameter can be any combination of the following values: |
| AnnaBridge | 126:abea610beb85 | 312 | * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag |
| AnnaBridge | 126:abea610beb85 | 313 | * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag |
| AnnaBridge | 126:abea610beb85 | 314 | * @retval None |
| AnnaBridge | 126:abea610beb85 | 315 | */ |
| AnnaBridge | 126:abea610beb85 | 316 | #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) |
| AnnaBridge | 126:abea610beb85 | 317 | |
| AnnaBridge | 126:abea610beb85 | 318 | /** |
| AnnaBridge | 126:abea610beb85 | 319 | * @} |
| AnnaBridge | 126:abea610beb85 | 320 | */ |
| AnnaBridge | 126:abea610beb85 | 321 | |
| AnnaBridge | 126:abea610beb85 | 322 | /* Private macro -------------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 323 | |
| AnnaBridge | 126:abea610beb85 | 324 | /** @addtogroup DAC_Private_Macros |
| AnnaBridge | 126:abea610beb85 | 325 | * @{ |
| AnnaBridge | 126:abea610beb85 | 326 | */ |
| AnnaBridge | 126:abea610beb85 | 327 | |
| AnnaBridge | 126:abea610beb85 | 328 | #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \ |
| AnnaBridge | 126:abea610beb85 | 329 | ((VALUE) == DAC_LFSRUNMASK_BITS1_0) || \ |
| AnnaBridge | 126:abea610beb85 | 330 | ((VALUE) == DAC_LFSRUNMASK_BITS2_0) || \ |
| AnnaBridge | 126:abea610beb85 | 331 | ((VALUE) == DAC_LFSRUNMASK_BITS3_0) || \ |
| AnnaBridge | 126:abea610beb85 | 332 | ((VALUE) == DAC_LFSRUNMASK_BITS4_0) || \ |
| AnnaBridge | 126:abea610beb85 | 333 | ((VALUE) == DAC_LFSRUNMASK_BITS5_0) || \ |
| AnnaBridge | 126:abea610beb85 | 334 | ((VALUE) == DAC_LFSRUNMASK_BITS6_0) || \ |
| AnnaBridge | 126:abea610beb85 | 335 | ((VALUE) == DAC_LFSRUNMASK_BITS7_0) || \ |
| AnnaBridge | 126:abea610beb85 | 336 | ((VALUE) == DAC_LFSRUNMASK_BITS8_0) || \ |
| AnnaBridge | 126:abea610beb85 | 337 | ((VALUE) == DAC_LFSRUNMASK_BITS9_0) || \ |
| AnnaBridge | 126:abea610beb85 | 338 | ((VALUE) == DAC_LFSRUNMASK_BITS10_0) || \ |
| AnnaBridge | 126:abea610beb85 | 339 | ((VALUE) == DAC_LFSRUNMASK_BITS11_0) || \ |
| AnnaBridge | 126:abea610beb85 | 340 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_1) || \ |
| AnnaBridge | 126:abea610beb85 | 341 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_3) || \ |
| AnnaBridge | 126:abea610beb85 | 342 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_7) || \ |
| AnnaBridge | 126:abea610beb85 | 343 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_15) || \ |
| AnnaBridge | 126:abea610beb85 | 344 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_31) || \ |
| AnnaBridge | 126:abea610beb85 | 345 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_63) || \ |
| AnnaBridge | 126:abea610beb85 | 346 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_127) || \ |
| AnnaBridge | 126:abea610beb85 | 347 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_255) || \ |
| AnnaBridge | 126:abea610beb85 | 348 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_511) || \ |
| AnnaBridge | 126:abea610beb85 | 349 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_1023) || \ |
| AnnaBridge | 126:abea610beb85 | 350 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_2047) || \ |
| AnnaBridge | 126:abea610beb85 | 351 | ((VALUE) == DAC_TRIANGLEAMPLITUDE_4095)) |
| AnnaBridge | 126:abea610beb85 | 352 | |
| AnnaBridge | 126:abea610beb85 | 353 | #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ |
| AnnaBridge | 126:abea610beb85 | 354 | ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) |
| AnnaBridge | 126:abea610beb85 | 355 | |
| AnnaBridge | 126:abea610beb85 | 356 | #if defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) |
| AnnaBridge | 126:abea610beb85 | 357 | #define IS_DAC_OUTPUT_SWITCH_STATE(STATE) (((STATE) == DAC_OUTPUTSWITCH_DISABLE) || \ |
| AnnaBridge | 126:abea610beb85 | 358 | ((STATE) == DAC_OUTPUTSWITCH_ENABLE)) |
| AnnaBridge | 126:abea610beb85 | 359 | |
| AnnaBridge | 126:abea610beb85 | 360 | #endif /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ |
| AnnaBridge | 126:abea610beb85 | 361 | #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ |
| AnnaBridge | 126:abea610beb85 | 362 | ((ALIGN) == DAC_ALIGN_12B_L) || \ |
| AnnaBridge | 126:abea610beb85 | 363 | ((ALIGN) == DAC_ALIGN_8B_R)) |
| AnnaBridge | 126:abea610beb85 | 364 | |
| <> | 135:176b8275d35d | 365 | #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U) |
| AnnaBridge | 126:abea610beb85 | 366 | |
| AnnaBridge | 126:abea610beb85 | 367 | |
| AnnaBridge | 126:abea610beb85 | 368 | |
| AnnaBridge | 126:abea610beb85 | 369 | /** |
| AnnaBridge | 126:abea610beb85 | 370 | * @} |
| AnnaBridge | 126:abea610beb85 | 371 | */ |
| AnnaBridge | 126:abea610beb85 | 372 | |
| AnnaBridge | 126:abea610beb85 | 373 | |
| AnnaBridge | 126:abea610beb85 | 374 | /* Include DAC HAL Extended module */ |
| AnnaBridge | 126:abea610beb85 | 375 | #include "stm32f3xx_hal_dac_ex.h" |
| AnnaBridge | 126:abea610beb85 | 376 | |
| AnnaBridge | 126:abea610beb85 | 377 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 378 | |
| AnnaBridge | 126:abea610beb85 | 379 | /** @addtogroup DAC_Exported_Functions |
| AnnaBridge | 126:abea610beb85 | 380 | * @{ |
| AnnaBridge | 126:abea610beb85 | 381 | */ |
| AnnaBridge | 126:abea610beb85 | 382 | |
| AnnaBridge | 126:abea610beb85 | 383 | /** @addtogroup DAC_Exported_Functions_Group1 |
| AnnaBridge | 126:abea610beb85 | 384 | * @{ |
| AnnaBridge | 126:abea610beb85 | 385 | */ |
| AnnaBridge | 126:abea610beb85 | 386 | /* Initialization and de-initialization functions *****************************/ |
| AnnaBridge | 126:abea610beb85 | 387 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 126:abea610beb85 | 388 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 126:abea610beb85 | 389 | void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 126:abea610beb85 | 390 | void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 126:abea610beb85 | 391 | |
| AnnaBridge | 126:abea610beb85 | 392 | /** |
| AnnaBridge | 126:abea610beb85 | 393 | * @} |
| AnnaBridge | 126:abea610beb85 | 394 | */ |
| AnnaBridge | 126:abea610beb85 | 395 | |
| AnnaBridge | 126:abea610beb85 | 396 | /** @addtogroup DAC_Exported_Functions_Group2 |
| AnnaBridge | 126:abea610beb85 | 397 | * @{ |
| AnnaBridge | 126:abea610beb85 | 398 | */ |
| AnnaBridge | 126:abea610beb85 | 399 | /* IO operation functions *****************************************************/ |
| AnnaBridge | 126:abea610beb85 | 400 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 401 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 402 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment); |
| AnnaBridge | 126:abea610beb85 | 403 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 404 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 405 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 406 | |
| AnnaBridge | 126:abea610beb85 | 407 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 126:abea610beb85 | 408 | void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 126:abea610beb85 | 409 | void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 126:abea610beb85 | 410 | void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); |
| AnnaBridge | 126:abea610beb85 | 411 | void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); |
| AnnaBridge | 126:abea610beb85 | 412 | |
| AnnaBridge | 126:abea610beb85 | 413 | /** |
| AnnaBridge | 126:abea610beb85 | 414 | * @} |
| AnnaBridge | 126:abea610beb85 | 415 | */ |
| AnnaBridge | 126:abea610beb85 | 416 | |
| AnnaBridge | 126:abea610beb85 | 417 | /** @addtogroup DAC_Exported_Functions_Group3 |
| AnnaBridge | 126:abea610beb85 | 418 | * @{ |
| AnnaBridge | 126:abea610beb85 | 419 | */ |
| AnnaBridge | 126:abea610beb85 | 420 | /* Peripheral Control functions ***********************************************/ |
| AnnaBridge | 126:abea610beb85 | 421 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); |
| AnnaBridge | 126:abea610beb85 | 422 | |
| AnnaBridge | 126:abea610beb85 | 423 | /** |
| AnnaBridge | 126:abea610beb85 | 424 | * @} |
| AnnaBridge | 126:abea610beb85 | 425 | */ |
| AnnaBridge | 126:abea610beb85 | 426 | |
| AnnaBridge | 126:abea610beb85 | 427 | /** @addtogroup DAC_Exported_Functions_Group4 |
| AnnaBridge | 126:abea610beb85 | 428 | * @{ |
| AnnaBridge | 126:abea610beb85 | 429 | */ |
| AnnaBridge | 126:abea610beb85 | 430 | /* Peripheral State and Error functions ***************************************/ |
| AnnaBridge | 126:abea610beb85 | 431 | HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 126:abea610beb85 | 432 | uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); |
| AnnaBridge | 126:abea610beb85 | 433 | |
| AnnaBridge | 126:abea610beb85 | 434 | /** |
| AnnaBridge | 126:abea610beb85 | 435 | * @} |
| AnnaBridge | 126:abea610beb85 | 436 | */ |
| AnnaBridge | 126:abea610beb85 | 437 | |
| AnnaBridge | 126:abea610beb85 | 438 | /** |
| AnnaBridge | 126:abea610beb85 | 439 | * @} |
| AnnaBridge | 126:abea610beb85 | 440 | */ |
| AnnaBridge | 126:abea610beb85 | 441 | |
| AnnaBridge | 126:abea610beb85 | 442 | /** |
| AnnaBridge | 126:abea610beb85 | 443 | * @} |
| AnnaBridge | 126:abea610beb85 | 444 | */ |
| AnnaBridge | 126:abea610beb85 | 445 | |
| AnnaBridge | 126:abea610beb85 | 446 | /** |
| AnnaBridge | 126:abea610beb85 | 447 | * @} |
| AnnaBridge | 126:abea610beb85 | 448 | */ |
| AnnaBridge | 126:abea610beb85 | 449 | |
| AnnaBridge | 126:abea610beb85 | 450 | #ifdef __cplusplus |
| AnnaBridge | 126:abea610beb85 | 451 | } |
| AnnaBridge | 126:abea610beb85 | 452 | #endif |
| AnnaBridge | 126:abea610beb85 | 453 | |
| AnnaBridge | 126:abea610beb85 | 454 | #endif /*__STM32F3xx_HAL_DAC_H */ |
| AnnaBridge | 126:abea610beb85 | 455 | |
| AnnaBridge | 126:abea610beb85 | 456 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
