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TARGET_NUCLEO_F302R8/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal.h@136:ef9c61f8c49f, 2017-02-14 (annotated)
- Committer:
- Kojto
- Date:
- Tue Feb 14 11:24:20 2017 +0000
- Revision:
- 136:ef9c61f8c49f
- Parent:
- 135:176b8275d35d
Release 136 of the mbed library
Ports for Upcoming Targets
Fixes and Changes
3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432
3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181
3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626
3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628
3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629
3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632
3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642
3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664
3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655
3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657
3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658
3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685
3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692
3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621
3649: [STM32F7] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3649
3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695
3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 86:04dd9b1680ae | 1 | /** |
bogdanm | 86:04dd9b1680ae | 2 | ****************************************************************************** |
bogdanm | 86:04dd9b1680ae | 3 | * @file stm32f3xx_hal.h |
bogdanm | 86:04dd9b1680ae | 4 | * @author MCD Application Team |
<> | 135:176b8275d35d | 5 | * @version V1.4.0 |
<> | 135:176b8275d35d | 6 | * @date 16-December-2016 |
bogdanm | 86:04dd9b1680ae | 7 | * @brief This file contains all the functions prototypes for the HAL |
bogdanm | 86:04dd9b1680ae | 8 | * module driver. |
bogdanm | 86:04dd9b1680ae | 9 | ****************************************************************************** |
bogdanm | 86:04dd9b1680ae | 10 | * @attention |
bogdanm | 86:04dd9b1680ae | 11 | * |
Kojto | 122:f9eeca106725 | 12 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
bogdanm | 86:04dd9b1680ae | 13 | * |
bogdanm | 86:04dd9b1680ae | 14 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 86:04dd9b1680ae | 15 | * are permitted provided that the following conditions are met: |
bogdanm | 86:04dd9b1680ae | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 86:04dd9b1680ae | 17 | * this list of conditions and the following disclaimer. |
bogdanm | 86:04dd9b1680ae | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 86:04dd9b1680ae | 19 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 86:04dd9b1680ae | 20 | * and/or other materials provided with the distribution. |
bogdanm | 86:04dd9b1680ae | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 86:04dd9b1680ae | 22 | * may be used to endorse or promote products derived from this software |
bogdanm | 86:04dd9b1680ae | 23 | * without specific prior written permission. |
bogdanm | 86:04dd9b1680ae | 24 | * |
bogdanm | 86:04dd9b1680ae | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 86:04dd9b1680ae | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 86:04dd9b1680ae | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 86:04dd9b1680ae | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 86:04dd9b1680ae | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 86:04dd9b1680ae | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 86:04dd9b1680ae | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 86:04dd9b1680ae | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 86:04dd9b1680ae | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 86:04dd9b1680ae | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 86:04dd9b1680ae | 35 | * |
bogdanm | 86:04dd9b1680ae | 36 | ****************************************************************************** |
bogdanm | 86:04dd9b1680ae | 37 | */ |
bogdanm | 86:04dd9b1680ae | 38 | |
bogdanm | 86:04dd9b1680ae | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 86:04dd9b1680ae | 40 | #ifndef __STM32F3xx_HAL_H |
bogdanm | 86:04dd9b1680ae | 41 | #define __STM32F3xx_HAL_H |
bogdanm | 86:04dd9b1680ae | 42 | |
bogdanm | 86:04dd9b1680ae | 43 | #ifdef __cplusplus |
bogdanm | 86:04dd9b1680ae | 44 | extern "C" { |
bogdanm | 86:04dd9b1680ae | 45 | #endif |
bogdanm | 86:04dd9b1680ae | 46 | |
bogdanm | 86:04dd9b1680ae | 47 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 86:04dd9b1680ae | 48 | #include "stm32f3xx_hal_conf.h" |
bogdanm | 86:04dd9b1680ae | 49 | |
bogdanm | 86:04dd9b1680ae | 50 | /** @addtogroup STM32F3xx_HAL_Driver |
bogdanm | 86:04dd9b1680ae | 51 | * @{ |
bogdanm | 86:04dd9b1680ae | 52 | */ |
bogdanm | 86:04dd9b1680ae | 53 | |
bogdanm | 86:04dd9b1680ae | 54 | /** @addtogroup HAL |
bogdanm | 86:04dd9b1680ae | 55 | * @{ |
bogdanm | 86:04dd9b1680ae | 56 | */ |
bogdanm | 86:04dd9b1680ae | 57 | |
Kojto | 122:f9eeca106725 | 58 | /* Private macros ------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 59 | /** @addtogroup HAL_Private_Macros |
Kojto | 122:f9eeca106725 | 60 | * @{ |
Kojto | 122:f9eeca106725 | 61 | */ |
Kojto | 122:f9eeca106725 | 62 | #define IS_SYSCFG_FASTMODEPLUS(__PIN__) ((((__PIN__) & SYSCFG_FASTMODEPLUS_PB6) == SYSCFG_FASTMODEPLUS_PB6) || \ |
Kojto | 122:f9eeca106725 | 63 | (((__PIN__) & SYSCFG_FASTMODEPLUS_PB7) == SYSCFG_FASTMODEPLUS_PB7) || \ |
Kojto | 122:f9eeca106725 | 64 | (((__PIN__) & SYSCFG_FASTMODEPLUS_PB8) == SYSCFG_FASTMODEPLUS_PB8) || \ |
Kojto | 122:f9eeca106725 | 65 | (((__PIN__) & SYSCFG_FASTMODEPLUS_PB9) == SYSCFG_FASTMODEPLUS_PB9)) |
Kojto | 122:f9eeca106725 | 66 | /** |
Kojto | 122:f9eeca106725 | 67 | * @} |
Kojto | 122:f9eeca106725 | 68 | */ |
Kojto | 122:f9eeca106725 | 69 | |
bogdanm | 86:04dd9b1680ae | 70 | /* Exported types ------------------------------------------------------------*/ |
bogdanm | 86:04dd9b1680ae | 71 | /* Exported constants --------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 72 | /** @defgroup HAL_Exported_Constants HAL Exported Constants |
bogdanm | 92:4fc01daae5a5 | 73 | * @{ |
bogdanm | 92:4fc01daae5a5 | 74 | */ |
bogdanm | 92:4fc01daae5a5 | 75 | /** @defgroup SYSCFG_BitAddress_AliasRegion SYSCFG registers bit address in the alias region |
bogdanm | 86:04dd9b1680ae | 76 | * @brief SYSCFG registers bit address in the alias region |
bogdanm | 86:04dd9b1680ae | 77 | * @{ |
bogdanm | 86:04dd9b1680ae | 78 | */ |
bogdanm | 86:04dd9b1680ae | 79 | /* ------------ SYSCFG registers bit address in the alias region -------------*/ |
bogdanm | 86:04dd9b1680ae | 80 | #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE) |
bogdanm | 86:04dd9b1680ae | 81 | /* --- CFGR2 Register ---*/ |
bogdanm | 86:04dd9b1680ae | 82 | /* Alias word address of BYP_ADDR_PAR bit */ |
<> | 135:176b8275d35d | 83 | #define CFGR2_OFFSET (SYSCFG_OFFSET + 0x18U) |
bogdanm | 86:04dd9b1680ae | 84 | #define BYPADDRPAR_BitNumber 0x04 |
<> | 135:176b8275d35d | 85 | #define CFGR2_BYPADDRPAR_BB (PERIPH_BB_BASE + (CFGR2_OFFSET * 32U) + (BYPADDRPAR_BitNumber * 4U)) |
bogdanm | 86:04dd9b1680ae | 86 | /** |
bogdanm | 86:04dd9b1680ae | 87 | * @} |
bogdanm | 86:04dd9b1680ae | 88 | */ |
bogdanm | 86:04dd9b1680ae | 89 | |
bogdanm | 86:04dd9b1680ae | 90 | #if defined(SYSCFG_CFGR1_DMA_RMP) |
Kojto | 122:f9eeca106725 | 91 | /** @defgroup HAL_DMA_Remapping HAL DMA Remapping |
bogdanm | 86:04dd9b1680ae | 92 | * Elements values convention: 0xXXYYYYYY |
bogdanm | 86:04dd9b1680ae | 93 | * - YYYYYY : Position in the register |
bogdanm | 86:04dd9b1680ae | 94 | * - XX : Register index |
bogdanm | 86:04dd9b1680ae | 95 | * - 00: CFGR1 register in SYSCFG |
bogdanm | 86:04dd9b1680ae | 96 | * - 01: CFGR3 register in SYSCFG (not available on STM32F373xC/STM32F378xx devices) |
bogdanm | 86:04dd9b1680ae | 97 | * @{ |
bogdanm | 86:04dd9b1680ae | 98 | */ |
<> | 135:176b8275d35d | 99 | #define HAL_REMAPDMA_ADC24_DMA2_CH34 (0x00000100U) /*!< ADC24 DMA remap (STM32F303xB/C/E, STM32F358xx and STM32F398xx devices) |
<> | 135:176b8275d35d | 100 | 1: Remap (ADC24 DMA requests mapped on DMA2 channels 3 and 4U) */ |
<> | 135:176b8275d35d | 101 | #define HAL_REMAPDMA_TIM16_DMA1_CH6 (0x00000800U) /*!< TIM16 DMA request remap |
<> | 135:176b8275d35d | 102 | 1: Remap (TIM16_CH1 and TIM16_UP DMA requests mapped on DMA1 channel 6U) */ |
<> | 135:176b8275d35d | 103 | #define HAL_REMAPDMA_TIM17_DMA1_CH7 (0x00001000U) /*!< TIM17 DMA request remap |
<> | 135:176b8275d35d | 104 | 1: Remap (TIM17_CH1 and TIM17_UP DMA requests mapped on DMA1 channel 7U) */ |
<> | 135:176b8275d35d | 105 | #define HAL_REMAPDMA_TIM6_DAC1_CH1_DMA1_CH3 (0x00002000U) /*!< TIM6 and DAC channel1 DMA remap (STM32F303xB/C/E, STM32F358xx and STM32F398xx devices) |
<> | 135:176b8275d35d | 106 | 1: Remap (TIM6_UP and DAC_CH1 DMA requests mapped on DMA1 channel 3U) */ |
<> | 135:176b8275d35d | 107 | #define HAL_REMAPDMA_TIM7_DAC1_CH2_DMA1_CH4 (0x00004000U) /*!< TIM7 and DAC channel2 DMA remap (STM32F303xB/C/E, STM32F358xx and STM32F398xx devices) |
<> | 135:176b8275d35d | 108 | 1: Remap (TIM7_UP and DAC_CH2 DMA requests mapped on DMA1 channel 4U) */ |
<> | 135:176b8275d35d | 109 | #define HAL_REMAPDMA_DAC2_CH1_DMA1_CH5 (0x00008000U) /*!< DAC2 channel1 DMA remap (STM32F303x4/6U/8 devices only) |
<> | 135:176b8275d35d | 110 | 1: Remap (DAC2_CH1 DMA requests mapped on DMA1 channel 5U) */ |
<> | 135:176b8275d35d | 111 | #define HAL_REMAPDMA_TIM18_DAC2_CH1_DMA1_CH5 (0x00008000U) /*!< DAC2 channel1 DMA remap (STM32F303x4/6U/8 devices only) |
<> | 135:176b8275d35d | 112 | 1: Remap (DAC2_CH1 DMA requests mapped on DMA1 channel 5U) */ |
bogdanm | 86:04dd9b1680ae | 113 | #if defined(SYSCFG_CFGR3_DMA_RMP) |
bogdanm | 86:04dd9b1680ae | 114 | #if !defined(HAL_REMAP_CFGR3_MASK) |
<> | 135:176b8275d35d | 115 | #define HAL_REMAP_CFGR3_MASK (0x01000000U) |
bogdanm | 86:04dd9b1680ae | 116 | #endif |
bogdanm | 86:04dd9b1680ae | 117 | |
<> | 135:176b8275d35d | 118 | #define HAL_REMAPDMA_SPI1_RX_DMA1_CH2 (0x01000003U) /*!< SPI1_RX DMA remap (STM32F303x4/6U/8 devices only) |
<> | 135:176b8275d35d | 119 | 11: Map on DMA1 channel 2U */ |
<> | 135:176b8275d35d | 120 | #define HAL_REMAPDMA_SPI1_RX_DMA1_CH4 (0x01000001U) /*!< SPI1_RX DMA remap (STM32F303x4/6U/8 devices only) |
<> | 135:176b8275d35d | 121 | 01: Map on DMA1 channel 4U */ |
<> | 135:176b8275d35d | 122 | #define HAL_REMAPDMA_SPI1_RX_DMA1_CH6 (0x01000002U) /*!< SPI1_RX DMA remap (STM32F303x4/6U/8 devices only) |
<> | 135:176b8275d35d | 123 | 10: Map on DMA1 channel 6U */ |
<> | 135:176b8275d35d | 124 | #define HAL_REMAPDMA_SPI1_TX_DMA1_CH3 (0x0100000CU) /*!< SPI1_TX DMA remap (STM32F303x4/6U/8 devices only) |
<> | 135:176b8275d35d | 125 | 11: Map on DMA1 channel 3U */ |
<> | 135:176b8275d35d | 126 | #define HAL_REMAPDMA_SPI1_TX_DMA1_CH5 (0x01000004U) /*!< SPI1_TX DMA remap (STM32F303x4/6U/8 devices only) |
<> | 135:176b8275d35d | 127 | 01: Map on DMA1 channel 5U */ |
<> | 135:176b8275d35d | 128 | #define HAL_REMAPDMA_SPI1_TX_DMA1_CH7 (0x01000008U) /*!< SPI1_TX DMA remap (STM32F303x4/6U/8 devices only) |
<> | 135:176b8275d35d | 129 | 10: Map on DMA1 channel 7U */ |
<> | 135:176b8275d35d | 130 | #define HAL_REMAPDMA_I2C1_RX_DMA1_CH7 (0x01000030U) /*!< I2C1_RX DMA remap (STM32F303x4/6U/8 devices only) |
<> | 135:176b8275d35d | 131 | 11: Map on DMA1 channel 7U */ |
<> | 135:176b8275d35d | 132 | #define HAL_REMAPDMA_I2C1_RX_DMA1_CH3 (0x01000010U) /*!< I2C1_RX DMA remap (STM32F303x4/6U/8 devices only) |
<> | 135:176b8275d35d | 133 | 01: Map on DMA1 channel 3U */ |
<> | 135:176b8275d35d | 134 | #define HAL_REMAPDMA_I2C1_RX_DMA1_CH5 (0x01000020U) /*!< I2C1_RX DMA remap (STM32F303x4/6U/8 devices only) |
<> | 135:176b8275d35d | 135 | 10: Map on DMA1 channel 5U */ |
<> | 135:176b8275d35d | 136 | #define HAL_REMAPDMA_I2C1_TX_DMA1_CH6 (0x010000C0U) /*!< I2C1_TX DMA remap (STM32F303x4/6U/8 devices only) |
<> | 135:176b8275d35d | 137 | 11: Map on DMA1 channel 6U */ |
<> | 135:176b8275d35d | 138 | #define HAL_REMAPDMA_I2C1_TX_DMA1_CH2 (0x01000040U) /*!< I2C1_TX DMA remap (STM32F303x4/6U/8 devices only) |
<> | 135:176b8275d35d | 139 | 01: Map on DMA1 channel 2U */ |
<> | 135:176b8275d35d | 140 | #define HAL_REMAPDMA_I2C1_TX_DMA1_CH4 (0x01000080U) /*!< I2C1_TX DMA remap (STM32F303x4/6U/8 devices only) |
<> | 135:176b8275d35d | 141 | 10: Map on DMA1 channel 4U */ |
<> | 135:176b8275d35d | 142 | #define HAL_REMAPDMA_ADC2_DMA1_CH2 (0x01000100U) /*!< ADC2 DMA remap |
bogdanm | 86:04dd9b1680ae | 143 | x0: No remap (ADC2 on DMA2) |
<> | 135:176b8275d35d | 144 | 10: Map on DMA1 channel 2U */ |
<> | 135:176b8275d35d | 145 | #define HAL_REMAPDMA_ADC2_DMA1_CH4 (0x01000300U) /*!< ADC2 DMA remap |
<> | 135:176b8275d35d | 146 | 11: Map on DMA1 channel 4U */ |
bogdanm | 86:04dd9b1680ae | 147 | #endif /* SYSCFG_CFGR3_DMA_RMP */ |
bogdanm | 86:04dd9b1680ae | 148 | |
bogdanm | 92:4fc01daae5a5 | 149 | #if defined(SYSCFG_CFGR3_DMA_RMP) |
Kojto | 122:f9eeca106725 | 150 | #define IS_DMA_REMAP(RMP) ((((RMP) & HAL_REMAPDMA_ADC24_DMA2_CH34) == HAL_REMAPDMA_ADC24_DMA2_CH34) || \ |
bogdanm | 86:04dd9b1680ae | 151 | (((RMP) & HAL_REMAPDMA_TIM16_DMA1_CH6) == HAL_REMAPDMA_TIM16_DMA1_CH6) || \ |
bogdanm | 86:04dd9b1680ae | 152 | (((RMP) & HAL_REMAPDMA_TIM17_DMA1_CH7) == HAL_REMAPDMA_TIM17_DMA1_CH7) || \ |
bogdanm | 86:04dd9b1680ae | 153 | (((RMP) & HAL_REMAPDMA_TIM6_DAC1_CH1_DMA1_CH3) == HAL_REMAPDMA_TIM6_DAC1_CH1_DMA1_CH3) || \ |
bogdanm | 86:04dd9b1680ae | 154 | (((RMP) & HAL_REMAPDMA_TIM7_DAC1_CH2_DMA1_CH4) == HAL_REMAPDMA_TIM7_DAC1_CH2_DMA1_CH4) || \ |
bogdanm | 86:04dd9b1680ae | 155 | (((RMP) & HAL_REMAPDMA_DAC2_CH1_DMA1_CH5) == HAL_REMAPDMA_DAC2_CH1_DMA1_CH5) || \ |
bogdanm | 86:04dd9b1680ae | 156 | (((RMP) & HAL_REMAPDMA_TIM18_DAC2_CH1_DMA1_CH5) == HAL_REMAPDMA_TIM18_DAC2_CH1_DMA1_CH5) || \ |
bogdanm | 86:04dd9b1680ae | 157 | (((RMP) & HAL_REMAPDMA_SPI1_RX_DMA1_CH2) == HAL_REMAPDMA_SPI1_RX_DMA1_CH2) || \ |
bogdanm | 86:04dd9b1680ae | 158 | (((RMP) & HAL_REMAPDMA_SPI1_RX_DMA1_CH4) == HAL_REMAPDMA_SPI1_RX_DMA1_CH4) || \ |
bogdanm | 86:04dd9b1680ae | 159 | (((RMP) & HAL_REMAPDMA_SPI1_RX_DMA1_CH6) == HAL_REMAPDMA_SPI1_RX_DMA1_CH6) || \ |
bogdanm | 86:04dd9b1680ae | 160 | (((RMP) & HAL_REMAPDMA_SPI1_TX_DMA1_CH3) == HAL_REMAPDMA_SPI1_TX_DMA1_CH3) || \ |
bogdanm | 86:04dd9b1680ae | 161 | (((RMP) & HAL_REMAPDMA_SPI1_TX_DMA1_CH5) == HAL_REMAPDMA_SPI1_TX_DMA1_CH5) || \ |
bogdanm | 86:04dd9b1680ae | 162 | (((RMP) & HAL_REMAPDMA_SPI1_TX_DMA1_CH7) == HAL_REMAPDMA_SPI1_TX_DMA1_CH7) || \ |
bogdanm | 86:04dd9b1680ae | 163 | (((RMP) & HAL_REMAPDMA_I2C1_RX_DMA1_CH7) == HAL_REMAPDMA_I2C1_RX_DMA1_CH7) || \ |
bogdanm | 86:04dd9b1680ae | 164 | (((RMP) & HAL_REMAPDMA_I2C1_RX_DMA1_CH3) == HAL_REMAPDMA_I2C1_RX_DMA1_CH3) || \ |
bogdanm | 86:04dd9b1680ae | 165 | (((RMP) & HAL_REMAPDMA_I2C1_RX_DMA1_CH5) == HAL_REMAPDMA_I2C1_RX_DMA1_CH5) || \ |
bogdanm | 86:04dd9b1680ae | 166 | (((RMP) & HAL_REMAPDMA_I2C1_TX_DMA1_CH6) == HAL_REMAPDMA_I2C1_TX_DMA1_CH6) || \ |
bogdanm | 86:04dd9b1680ae | 167 | (((RMP) & HAL_REMAPDMA_I2C1_TX_DMA1_CH2) == HAL_REMAPDMA_I2C1_TX_DMA1_CH2) || \ |
bogdanm | 86:04dd9b1680ae | 168 | (((RMP) & HAL_REMAPDMA_I2C1_TX_DMA1_CH4) == HAL_REMAPDMA_I2C1_TX_DMA1_CH4) || \ |
bogdanm | 86:04dd9b1680ae | 169 | (((RMP) & HAL_REMAPDMA_ADC2_DMA1_CH2) == HAL_REMAPDMA_ADC2_DMA1_CH2) || \ |
bogdanm | 86:04dd9b1680ae | 170 | (((RMP) & HAL_REMAPDMA_ADC2_DMA1_CH4) == HAL_REMAPDMA_ADC2_DMA1_CH4)) |
bogdanm | 92:4fc01daae5a5 | 171 | #else |
Kojto | 122:f9eeca106725 | 172 | #define IS_DMA_REMAP(RMP) ((((RMP) & HAL_REMAPDMA_ADC24_DMA2_CH34) == HAL_REMAPDMA_ADC24_DMA2_CH34) || \ |
bogdanm | 86:04dd9b1680ae | 173 | (((RMP) & HAL_REMAPDMA_TIM16_DMA1_CH6) == HAL_REMAPDMA_TIM16_DMA1_CH6) || \ |
bogdanm | 86:04dd9b1680ae | 174 | (((RMP) & HAL_REMAPDMA_TIM17_DMA1_CH7) == HAL_REMAPDMA_TIM17_DMA1_CH7) || \ |
bogdanm | 86:04dd9b1680ae | 175 | (((RMP) & HAL_REMAPDMA_TIM6_DAC1_CH1_DMA1_CH3) == HAL_REMAPDMA_TIM6_DAC1_CH1_DMA1_CH3) || \ |
bogdanm | 86:04dd9b1680ae | 176 | (((RMP) & HAL_REMAPDMA_TIM7_DAC1_CH2_DMA1_CH4) == HAL_REMAPDMA_TIM7_DAC1_CH2_DMA1_CH4) || \ |
bogdanm | 86:04dd9b1680ae | 177 | (((RMP) & HAL_REMAPDMA_DAC2_CH1_DMA1_CH5) == HAL_REMAPDMA_DAC2_CH1_DMA1_CH5) || \ |
bogdanm | 86:04dd9b1680ae | 178 | (((RMP) & HAL_REMAPDMA_TIM18_DAC2_CH1_DMA1_CH5) == HAL_REMAPDMA_TIM18_DAC2_CH1_DMA1_CH5)) |
bogdanm | 86:04dd9b1680ae | 179 | #endif /* SYSCFG_CFGR3_DMA_RMP && SYSCFG_CFGR1_DMA_RMP*/ |
bogdanm | 86:04dd9b1680ae | 180 | /** |
bogdanm | 86:04dd9b1680ae | 181 | * @} |
bogdanm | 86:04dd9b1680ae | 182 | */ |
bogdanm | 86:04dd9b1680ae | 183 | #endif /* SYSCFG_CFGR1_DMA_RMP */ |
bogdanm | 86:04dd9b1680ae | 184 | |
Kojto | 122:f9eeca106725 | 185 | /** @defgroup HAL_Trigger_Remapping HAL Trigger Remapping |
bogdanm | 86:04dd9b1680ae | 186 | * Elements values convention: 0xXXYYYYYY |
bogdanm | 86:04dd9b1680ae | 187 | * - YYYYYY : Position in the register |
bogdanm | 86:04dd9b1680ae | 188 | * - XX : Register index |
bogdanm | 86:04dd9b1680ae | 189 | * - 00: CFGR1 register in SYSCFG |
bogdanm | 86:04dd9b1680ae | 190 | * - 01: CFGR3 register in SYSCFG |
bogdanm | 86:04dd9b1680ae | 191 | * @{ |
bogdanm | 86:04dd9b1680ae | 192 | */ |
<> | 135:176b8275d35d | 193 | #define HAL_REMAPTRIGGER_DAC1_TRIG (0x00000080U) /*!< DAC trigger remap (when TSEL = 001 on STM32F303xB/C and STM32F358xx devices) |
bogdanm | 86:04dd9b1680ae | 194 | 0: No remap (DAC trigger is TIM8_TRGO) |
bogdanm | 86:04dd9b1680ae | 195 | 1: Remap (DAC trigger is TIM3_TRGO) */ |
<> | 135:176b8275d35d | 196 | #define HAL_REMAPTRIGGER_TIM1_ITR3 (0x00000040U) /*!< TIM1 ITR3 trigger remap |
bogdanm | 86:04dd9b1680ae | 197 | 0: No remap |
bogdanm | 86:04dd9b1680ae | 198 | 1: Remap (TIM1_TRG3 = TIM17_OC) */ |
bogdanm | 86:04dd9b1680ae | 199 | #if defined(SYSCFG_CFGR3_TRIGGER_RMP) |
bogdanm | 86:04dd9b1680ae | 200 | #if !defined(HAL_REMAP_CFGR3_MASK) |
<> | 135:176b8275d35d | 201 | #define HAL_REMAP_CFGR3_MASK (0x01000000U) |
bogdanm | 86:04dd9b1680ae | 202 | #endif |
<> | 135:176b8275d35d | 203 | #define HAL_REMAPTRIGGER_DAC1_TRIG3 (0x01010000U) /*!< DAC1_CH1 / DAC1_CH2 Trigger remap |
bogdanm | 86:04dd9b1680ae | 204 | 0: Remap (DAC trigger is TIM15_TRGO) |
bogdanm | 86:04dd9b1680ae | 205 | 1: Remap (DAC trigger is HRTIM1_DAC1_TRIG1) */ |
<> | 135:176b8275d35d | 206 | #define HAL_REMAPTRIGGER_DAC1_TRIG5 (0x01020000U) /*!< DAC1_CH1 / DAC1_CH2 Trigger remap |
bogdanm | 86:04dd9b1680ae | 207 | 0: No remap |
bogdanm | 86:04dd9b1680ae | 208 | 1: Remap (DAC trigger is HRTIM1_DAC1_TRIG2) */ |
bogdanm | 86:04dd9b1680ae | 209 | #define IS_HAL_REMAPTRIGGER(RMP) ((((RMP) & HAL_REMAPTRIGGER_DAC1) == HAL_REMAPTRIGGER_DAC1) || \ |
bogdanm | 86:04dd9b1680ae | 210 | (((RMP) & HAL_REMAPTRIGGER_TIM1_ITR3) == HAL_REMAPTRIGGER_TIM1_ITR3) || \ |
bogdanm | 86:04dd9b1680ae | 211 | (((RMP) & HAL_REMAPTRIGGER_DAC1_TRIG3) == HAL_REMAPTRIGGER_DAC1_TRIG3) || \ |
bogdanm | 86:04dd9b1680ae | 212 | (((RMP) & HAL_REMAPTRIGGER_DAC1_TRIG5) == HAL_REMAPTRIGGER_DAC1_TRIG5)) |
bogdanm | 86:04dd9b1680ae | 213 | #else |
bogdanm | 86:04dd9b1680ae | 214 | #define IS_HAL_REMAPTRIGGER(RMP) ((((RMP) & HAL_REMAPTRIGGER_DAC1) == HAL_REMAPTRIGGER_DAC1) || \ |
bogdanm | 86:04dd9b1680ae | 215 | (((RMP) & HAL_REMAPTRIGGER_TIM1_ITR3) == HAL_REMAPTRIGGER_TIM1_ITR3)) |
bogdanm | 86:04dd9b1680ae | 216 | #endif /* SYSCFG_CFGR3_TRIGGER_RMP */ |
bogdanm | 86:04dd9b1680ae | 217 | /** |
bogdanm | 86:04dd9b1680ae | 218 | * @} |
bogdanm | 86:04dd9b1680ae | 219 | */ |
bogdanm | 86:04dd9b1680ae | 220 | |
Kojto | 122:f9eeca106725 | 221 | #if defined (STM32F302xE) |
Kojto | 122:f9eeca106725 | 222 | /** @defgroup HAL_ADC_Trigger_Remapping HAL ADC Trigger Remapping |
Kojto | 122:f9eeca106725 | 223 | * @{ |
Kojto | 122:f9eeca106725 | 224 | */ |
Kojto | 122:f9eeca106725 | 225 | #define HAL_REMAPADCTRIGGER_ADC12_EXT2 SYSCFG_CFGR4_ADC12_EXT2_RMP /*!< Input trigger of ADC12 regular channel EXT2 |
Kojto | 122:f9eeca106725 | 226 | 0: No remap (TIM1_CC3) |
Kojto | 122:f9eeca106725 | 227 | 1: Remap (TIM20_TRGO) */ |
Kojto | 122:f9eeca106725 | 228 | #define HAL_REMAPADCTRIGGER_ADC12_EXT3 SYSCFG_CFGR4_ADC12_EXT3_RMP /*!< Input trigger of ADC12 regular channel EXT3 |
Kojto | 122:f9eeca106725 | 229 | 0: No remap (TIM2_CC2) |
Kojto | 122:f9eeca106725 | 230 | 1: Remap (TIM20_TRGO2) */ |
Kojto | 122:f9eeca106725 | 231 | #define HAL_REMAPADCTRIGGER_ADC12_EXT5 SYSCFG_CFGR4_ADC12_EXT5_RMP /*!< Input trigger of ADC12 regular channel EXT5 |
Kojto | 122:f9eeca106725 | 232 | 0: No remap (TIM4_CC4) |
Kojto | 122:f9eeca106725 | 233 | 1: Remap (TIM20_CC1) */ |
Kojto | 122:f9eeca106725 | 234 | #define HAL_REMAPADCTRIGGER_ADC12_EXT13 SYSCFG_CFGR4_ADC12_EXT13_RMP /*!< Input trigger of ADC12 regular channel EXT13 |
Kojto | 122:f9eeca106725 | 235 | 0: No remap (TIM6_TRGO) |
Kojto | 122:f9eeca106725 | 236 | 1: Remap (TIM20_CC2) */ |
Kojto | 122:f9eeca106725 | 237 | #define HAL_REMAPADCTRIGGER_ADC12_EXT15 SYSCFG_CFGR4_ADC12_EXT15_RMP /*!< Input trigger of ADC12 regular channel EXT15 |
Kojto | 122:f9eeca106725 | 238 | 0: No remap (TIM3_CC4) |
Kojto | 122:f9eeca106725 | 239 | 1: Remap (TIM20_CC3) */ |
Kojto | 122:f9eeca106725 | 240 | #define HAL_REMAPADCTRIGGER_ADC12_JEXT3 SYSCFG_CFGR4_ADC12_JEXT3_RMP /*!< Input trigger of ADC12 injected channel JEXT3 |
Kojto | 122:f9eeca106725 | 241 | 0: No remap (TIM2_CC1) |
Kojto | 122:f9eeca106725 | 242 | 1: Remap (TIM20_TRGO) */ |
Kojto | 122:f9eeca106725 | 243 | #define HAL_REMAPADCTRIGGER_ADC12_JEXT6 SYSCFG_CFGR4_ADC12_JEXT6_RMP /*!< Input trigger of ADC12 injected channel JEXT6 |
<> | 135:176b8275d35d | 244 | 0: No remap (EXTI line 15U) |
Kojto | 122:f9eeca106725 | 245 | 1: Remap (TIM20_TRGO2) */ |
Kojto | 122:f9eeca106725 | 246 | #define HAL_REMAPADCTRIGGER_ADC12_JEXT13 SYSCFG_CFGR4_ADC12_JEXT13_RMP /*!< Input trigger of ADC12 injected channel JEXT13 |
Kojto | 122:f9eeca106725 | 247 | 0: No remap (TIM3_CC1) |
Kojto | 122:f9eeca106725 | 248 | 1: Remap (TIM20_CC4) */ |
Kojto | 122:f9eeca106725 | 249 | |
Kojto | 122:f9eeca106725 | 250 | #define IS_HAL_REMAPADCTRIGGER(RMP) ((((RMP) & HAL_REMAPADCTRIGGER_ADC12_EXT2) == HAL_REMAPADCTRIGGER_ADC12_EXT2) || \ |
Kojto | 122:f9eeca106725 | 251 | (((RMP) & HAL_REMAPADCTRIGGER_ADC12_EXT3) == HAL_REMAPADCTRIGGER_ADC12_EXT3) || \ |
Kojto | 122:f9eeca106725 | 252 | (((RMP) & HAL_REMAPADCTRIGGER_ADC12_EXT5) == HAL_REMAPADCTRIGGER_ADC12_EXT5) || \ |
<> | 135:176b8275d35d | 253 | (((RMP) & HAL_REMAPADCTRIGGER_ADC12_EXT13U) == HAL_REMAPADCTRIGGER_ADC12_EXT13U) || \ |
<> | 135:176b8275d35d | 254 | (((RMP) & HAL_REMAPADCTRIGGER_ADC12_EXT15U) == HAL_REMAPADCTRIGGER_ADC12_EXT15U) || \ |
Kojto | 122:f9eeca106725 | 255 | (((RMP) & HAL_REMAPADCTRIGGER_ADC12_JEXT3) == HAL_REMAPADCTRIGGER_ADC12_JEXT3) || \ |
Kojto | 122:f9eeca106725 | 256 | (((RMP) & HAL_REMAPADCTRIGGER_ADC12_JEXT6) == HAL_REMAPADCTRIGGER_ADC12_JEXT6) || \ |
<> | 135:176b8275d35d | 257 | (((RMP) & HAL_REMAPADCTRIGGER_ADC12_JEXT13U) == HAL_REMAPADCTRIGGER_ADC12_JEXT13U)) |
Kojto | 122:f9eeca106725 | 258 | /** |
Kojto | 122:f9eeca106725 | 259 | * @} |
Kojto | 122:f9eeca106725 | 260 | */ |
Kojto | 122:f9eeca106725 | 261 | #endif /* STM32F302xE */ |
Kojto | 122:f9eeca106725 | 262 | |
bogdanm | 92:4fc01daae5a5 | 263 | #if defined (STM32F303xE) || defined (STM32F398xx) |
Kojto | 122:f9eeca106725 | 264 | /** @defgroup HAL_ADC_Trigger_Remapping HAL ADC Trigger Remapping |
bogdanm | 92:4fc01daae5a5 | 265 | * @{ |
bogdanm | 92:4fc01daae5a5 | 266 | */ |
bogdanm | 92:4fc01daae5a5 | 267 | #define HAL_REMAPADCTRIGGER_ADC12_EXT2 SYSCFG_CFGR4_ADC12_EXT2_RMP /*!< Input trigger of ADC12 regular channel EXT2 |
bogdanm | 92:4fc01daae5a5 | 268 | 0: No remap (TIM1_CC3) |
bogdanm | 92:4fc01daae5a5 | 269 | 1: Remap (TIM20_TRGO) */ |
bogdanm | 92:4fc01daae5a5 | 270 | #define HAL_REMAPADCTRIGGER_ADC12_EXT3 SYSCFG_CFGR4_ADC12_EXT3_RMP /*!< Input trigger of ADC12 regular channel EXT3 |
bogdanm | 92:4fc01daae5a5 | 271 | 0: No remap (TIM2_CC2) |
bogdanm | 92:4fc01daae5a5 | 272 | 1: Remap (TIM20_TRGO2) */ |
bogdanm | 92:4fc01daae5a5 | 273 | #define HAL_REMAPADCTRIGGER_ADC12_EXT5 SYSCFG_CFGR4_ADC12_EXT5_RMP /*!< Input trigger of ADC12 regular channel EXT5 |
bogdanm | 92:4fc01daae5a5 | 274 | 0: No remap (TIM4_CC4) |
bogdanm | 92:4fc01daae5a5 | 275 | 1: Remap (TIM20_CC1) */ |
bogdanm | 92:4fc01daae5a5 | 276 | #define HAL_REMAPADCTRIGGER_ADC12_EXT13 SYSCFG_CFGR4_ADC12_EXT13_RMP /*!< Input trigger of ADC12 regular channel EXT13 |
bogdanm | 92:4fc01daae5a5 | 277 | 0: No remap (TIM6_TRGO) |
bogdanm | 92:4fc01daae5a5 | 278 | 1: Remap (TIM20_CC2) */ |
bogdanm | 92:4fc01daae5a5 | 279 | #define HAL_REMAPADCTRIGGER_ADC12_EXT15 SYSCFG_CFGR4_ADC12_EXT15_RMP /*!< Input trigger of ADC12 regular channel EXT15 |
bogdanm | 92:4fc01daae5a5 | 280 | 0: No remap (TIM3_CC4) |
bogdanm | 92:4fc01daae5a5 | 281 | 1: Remap (TIM20_CC3) */ |
bogdanm | 92:4fc01daae5a5 | 282 | #define HAL_REMAPADCTRIGGER_ADC12_JEXT3 SYSCFG_CFGR4_ADC12_JEXT3_RMP /*!< Input trigger of ADC12 injected channel JEXT3 |
bogdanm | 92:4fc01daae5a5 | 283 | 0: No remap (TIM2_CC1) |
bogdanm | 92:4fc01daae5a5 | 284 | 1: Remap (TIM20_TRGO) */ |
bogdanm | 92:4fc01daae5a5 | 285 | #define HAL_REMAPADCTRIGGER_ADC12_JEXT6 SYSCFG_CFGR4_ADC12_JEXT6_RMP /*!< Input trigger of ADC12 injected channel JEXT6 |
<> | 135:176b8275d35d | 286 | 0: No remap (EXTI line 15U) |
bogdanm | 92:4fc01daae5a5 | 287 | 1: Remap (TIM20_TRGO2) */ |
bogdanm | 92:4fc01daae5a5 | 288 | #define HAL_REMAPADCTRIGGER_ADC12_JEXT13 SYSCFG_CFGR4_ADC12_JEXT13_RMP /*!< Input trigger of ADC12 injected channel JEXT13 |
bogdanm | 92:4fc01daae5a5 | 289 | 0: No remap (TIM3_CC1) |
bogdanm | 92:4fc01daae5a5 | 290 | 1: Remap (TIM20_CC4) */ |
bogdanm | 92:4fc01daae5a5 | 291 | #define HAL_REMAPADCTRIGGER_ADC34_EXT5 SYSCFG_CFGR4_ADC34_EXT5_RMP /*!< Input trigger of ADC34 regular channel EXT5 |
<> | 135:176b8275d35d | 292 | 0: No remap (EXTI line 2U) |
bogdanm | 92:4fc01daae5a5 | 293 | 1: Remap (TIM20_TRGO) */ |
bogdanm | 92:4fc01daae5a5 | 294 | #define HAL_REMAPADCTRIGGER_ADC34_EXT6 SYSCFG_CFGR4_ADC34_EXT6_RMP /*!< Input trigger of ADC34 regular channel EXT6 |
bogdanm | 92:4fc01daae5a5 | 295 | 0: No remap (TIM4_CC1) |
bogdanm | 92:4fc01daae5a5 | 296 | 1: Remap (TIM20_TRGO2) */ |
bogdanm | 92:4fc01daae5a5 | 297 | #define HAL_REMAPADCTRIGGER_ADC34_EXT15 SYSCFG_CFGR4_ADC34_EXT15_RMP /*!< Input trigger of ADC34 regular channel EXT15 |
bogdanm | 92:4fc01daae5a5 | 298 | 0: No remap (TIM2_CC1) |
bogdanm | 92:4fc01daae5a5 | 299 | 1: Remap (TIM20_CC1) */ |
bogdanm | 92:4fc01daae5a5 | 300 | #define HAL_REMAPADCTRIGGER_ADC34_JEXT5 SYSCFG_CFGR4_ADC34_JEXT5_RMP /*!< Input trigger of ADC34 injected channel JEXT5 |
bogdanm | 92:4fc01daae5a5 | 301 | 0: No remap (TIM4_CC3) |
bogdanm | 92:4fc01daae5a5 | 302 | 1: Remap (TIM20_TRGO) */ |
bogdanm | 92:4fc01daae5a5 | 303 | #define HAL_REMAPADCTRIGGER_ADC34_JEXT11 SYSCFG_CFGR4_ADC34_JEXT11_RMP /*!< Input trigger of ADC34 injected channel JEXT11 |
bogdanm | 92:4fc01daae5a5 | 304 | 0: No remap (TIM1_CC3) |
bogdanm | 92:4fc01daae5a5 | 305 | 1: Remap (TIM20_TRGO2) */ |
bogdanm | 92:4fc01daae5a5 | 306 | #define HAL_REMAPADCTRIGGER_ADC34_JEXT14 SYSCFG_CFGR4_ADC34_JEXT14_RMP /*!< Input trigger of ADC34 injected channel JEXT14 |
bogdanm | 92:4fc01daae5a5 | 307 | 0: No remap (TIM7_TRGO) |
bogdanm | 92:4fc01daae5a5 | 308 | 1: Remap (TIM20_CC2) */ |
bogdanm | 92:4fc01daae5a5 | 309 | |
bogdanm | 92:4fc01daae5a5 | 310 | #define IS_HAL_REMAPADCTRIGGER(RMP) ((((RMP) & HAL_REMAPADCTRIGGER_ADC12_EXT2) == HAL_REMAPADCTRIGGER_ADC12_EXT2) || \ |
bogdanm | 92:4fc01daae5a5 | 311 | (((RMP) & HAL_REMAPADCTRIGGER_ADC12_EXT3) == HAL_REMAPADCTRIGGER_ADC12_EXT3) || \ |
bogdanm | 92:4fc01daae5a5 | 312 | (((RMP) & HAL_REMAPADCTRIGGER_ADC12_EXT5) == HAL_REMAPADCTRIGGER_ADC12_EXT5) || \ |
<> | 135:176b8275d35d | 313 | (((RMP) & HAL_REMAPADCTRIGGER_ADC12_EXT13U) == HAL_REMAPADCTRIGGER_ADC12_EXT13U) || \ |
<> | 135:176b8275d35d | 314 | (((RMP) & HAL_REMAPADCTRIGGER_ADC12_EXT15U) == HAL_REMAPADCTRIGGER_ADC12_EXT15U) || \ |
bogdanm | 92:4fc01daae5a5 | 315 | (((RMP) & HAL_REMAPADCTRIGGER_ADC12_JEXT3) == HAL_REMAPADCTRIGGER_ADC12_JEXT3) || \ |
bogdanm | 92:4fc01daae5a5 | 316 | (((RMP) & HAL_REMAPADCTRIGGER_ADC12_JEXT6) == HAL_REMAPADCTRIGGER_ADC12_JEXT6) || \ |
<> | 135:176b8275d35d | 317 | (((RMP) & HAL_REMAPADCTRIGGER_ADC12_JEXT13U) == HAL_REMAPADCTRIGGER_ADC12_JEXT13U) || \ |
bogdanm | 92:4fc01daae5a5 | 318 | (((RMP) & HAL_REMAPADCTRIGGER_ADC34_EXT5) == HAL_REMAPADCTRIGGER_ADC34_EXT5) || \ |
bogdanm | 92:4fc01daae5a5 | 319 | (((RMP) & HAL_REMAPADCTRIGGER_ADC34_EXT6) == HAL_REMAPADCTRIGGER_ADC34_EXT6) || \ |
<> | 135:176b8275d35d | 320 | (((RMP) & HAL_REMAPADCTRIGGER_ADC34_EXT15U) == HAL_REMAPADCTRIGGER_ADC34_EXT15U) || \ |
bogdanm | 92:4fc01daae5a5 | 321 | (((RMP) & HAL_REMAPADCTRIGGER_ADC34_JEXT5) == HAL_REMAPADCTRIGGER_ADC34_JEXT5) || \ |
<> | 135:176b8275d35d | 322 | (((RMP) & HAL_REMAPADCTRIGGER_ADC34_JEXT11U) == HAL_REMAPADCTRIGGER_ADC34_JEXT11U) || \ |
<> | 135:176b8275d35d | 323 | (((RMP) & HAL_REMAPADCTRIGGER_ADC34_JEXT14U) == HAL_REMAPADCTRIGGER_ADC34_JEXT14U)) |
bogdanm | 92:4fc01daae5a5 | 324 | /** |
bogdanm | 92:4fc01daae5a5 | 325 | * @} |
bogdanm | 92:4fc01daae5a5 | 326 | */ |
bogdanm | 92:4fc01daae5a5 | 327 | #endif /* STM32F303xE || STM32F398xx */ |
bogdanm | 92:4fc01daae5a5 | 328 | |
Kojto | 122:f9eeca106725 | 329 | /** @defgroup SYSCFG_FastModePlus_GPIO Fast-mode Plus on GPIO |
bogdanm | 86:04dd9b1680ae | 330 | * @{ |
bogdanm | 86:04dd9b1680ae | 331 | */ |
bogdanm | 86:04dd9b1680ae | 332 | |
Kojto | 122:f9eeca106725 | 333 | /** @brief Fast-mode Plus driving capability on a specific GPIO |
Kojto | 122:f9eeca106725 | 334 | */ |
bogdanm | 86:04dd9b1680ae | 335 | #if defined(SYSCFG_CFGR1_I2C_PB6_FMP) |
Kojto | 122:f9eeca106725 | 336 | #define SYSCFG_FASTMODEPLUS_PB6 ((uint32_t)SYSCFG_CFGR1_I2C_PB6_FMP) /*!< Enable Fast-mode Plus on PB6 */ |
bogdanm | 86:04dd9b1680ae | 337 | #endif /* SYSCFG_CFGR1_I2C_PB6_FMP */ |
bogdanm | 86:04dd9b1680ae | 338 | |
bogdanm | 86:04dd9b1680ae | 339 | #if defined(SYSCFG_CFGR1_I2C_PB7_FMP) |
Kojto | 122:f9eeca106725 | 340 | #define SYSCFG_FASTMODEPLUS_PB7 ((uint32_t)SYSCFG_CFGR1_I2C_PB7_FMP) /*!< Enable Fast-mode Plus on PB7 */ |
bogdanm | 86:04dd9b1680ae | 341 | #endif /* SYSCFG_CFGR1_I2C_PB7_FMP */ |
bogdanm | 86:04dd9b1680ae | 342 | |
bogdanm | 86:04dd9b1680ae | 343 | #if defined(SYSCFG_CFGR1_I2C_PB8_FMP) |
Kojto | 122:f9eeca106725 | 344 | #define SYSCFG_FASTMODEPLUS_PB8 ((uint32_t)SYSCFG_CFGR1_I2C_PB8_FMP) /*!< Enable Fast-mode Plus on PB8 */ |
bogdanm | 86:04dd9b1680ae | 345 | #endif /* SYSCFG_CFGR1_I2C_PB8_FMP */ |
bogdanm | 86:04dd9b1680ae | 346 | |
bogdanm | 86:04dd9b1680ae | 347 | #if defined(SYSCFG_CFGR1_I2C_PB9_FMP) |
Kojto | 122:f9eeca106725 | 348 | #define SYSCFG_FASTMODEPLUS_PB9 ((uint32_t)SYSCFG_CFGR1_I2C_PB9_FMP) /*!< Enable Fast-mode Plus on PB9 */ |
bogdanm | 86:04dd9b1680ae | 349 | #endif /* SYSCFG_CFGR1_I2C_PB9_FMP */ |
bogdanm | 86:04dd9b1680ae | 350 | /** |
bogdanm | 86:04dd9b1680ae | 351 | * @} |
bogdanm | 86:04dd9b1680ae | 352 | */ |
bogdanm | 86:04dd9b1680ae | 353 | |
bogdanm | 86:04dd9b1680ae | 354 | #if defined(SYSCFG_RCR_PAGE0) |
bogdanm | 86:04dd9b1680ae | 355 | /* CCM-SRAM defined */ |
Kojto | 122:f9eeca106725 | 356 | /** @defgroup HAL_Page_Write_Protection HAL CCM RAM page write protection |
bogdanm | 86:04dd9b1680ae | 357 | * @{ |
bogdanm | 86:04dd9b1680ae | 358 | */ |
<> | 135:176b8275d35d | 359 | #define HAL_SYSCFG_WP_PAGE0 (SYSCFG_RCR_PAGE0) /*!< ICODE SRAM Write protection page 0U */ |
<> | 135:176b8275d35d | 360 | #define HAL_SYSCFG_WP_PAGE1 (SYSCFG_RCR_PAGE1) /*!< ICODE SRAM Write protection page 1U */ |
<> | 135:176b8275d35d | 361 | #define HAL_SYSCFG_WP_PAGE2 (SYSCFG_RCR_PAGE2) /*!< ICODE SRAM Write protection page 2U */ |
<> | 135:176b8275d35d | 362 | #define HAL_SYSCFG_WP_PAGE3 (SYSCFG_RCR_PAGE3) /*!< ICODE SRAM Write protection page 3U */ |
bogdanm | 86:04dd9b1680ae | 363 | #if defined(SYSCFG_RCR_PAGE4) |
bogdanm | 86:04dd9b1680ae | 364 | /* More than 4KB CCM-SRAM defined */ |
<> | 135:176b8275d35d | 365 | #define HAL_SYSCFG_WP_PAGE4 (SYSCFG_RCR_PAGE4) /*!< ICODE SRAM Write protection page 4U */ |
<> | 135:176b8275d35d | 366 | #define HAL_SYSCFG_WP_PAGE5 (SYSCFG_RCR_PAGE5) /*!< ICODE SRAM Write protection page 5U */ |
<> | 135:176b8275d35d | 367 | #define HAL_SYSCFG_WP_PAGE6 (SYSCFG_RCR_PAGE6) /*!< ICODE SRAM Write protection page 6U */ |
<> | 135:176b8275d35d | 368 | #define HAL_SYSCFG_WP_PAGE7 (SYSCFG_RCR_PAGE7) /*!< ICODE SRAM Write protection page 7U */ |
bogdanm | 86:04dd9b1680ae | 369 | #endif /* SYSCFG_RCR_PAGE4 */ |
bogdanm | 92:4fc01daae5a5 | 370 | #if defined(SYSCFG_RCR_PAGE8) |
<> | 135:176b8275d35d | 371 | #define HAL_SYSCFG_WP_PAGE8 (SYSCFG_RCR_PAGE8) /*!< ICODE SRAM Write protection page 8U */ |
<> | 135:176b8275d35d | 372 | #define HAL_SYSCFG_WP_PAGE9 (SYSCFG_RCR_PAGE9) /*!< ICODE SRAM Write protection page 9U */ |
<> | 135:176b8275d35d | 373 | #define HAL_SYSCFG_WP_PAGE10 (SYSCFG_RCR_PAGE10U) /*!< ICODE SRAM Write protection page 10U */ |
<> | 135:176b8275d35d | 374 | #define HAL_SYSCFG_WP_PAGE11 (SYSCFG_RCR_PAGE11U) /*!< ICODE SRAM Write protection page 11U */ |
<> | 135:176b8275d35d | 375 | #define HAL_SYSCFG_WP_PAGE12 (SYSCFG_RCR_PAGE12U) /*!< ICODE SRAM Write protection page 12U */ |
<> | 135:176b8275d35d | 376 | #define HAL_SYSCFG_WP_PAGE13 (SYSCFG_RCR_PAGE13U) /*!< ICODE SRAM Write protection page 13U */ |
<> | 135:176b8275d35d | 377 | #define HAL_SYSCFG_WP_PAGE14 (SYSCFG_RCR_PAGE14U) /*!< ICODE SRAM Write protection page 14U */ |
<> | 135:176b8275d35d | 378 | #define HAL_SYSCFG_WP_PAGE15 (SYSCFG_RCR_PAGE15U) /*!< ICODE SRAM Write protection page 15U */ |
bogdanm | 92:4fc01daae5a5 | 379 | #endif /* SYSCFG_RCR_PAGE8 */ |
bogdanm | 86:04dd9b1680ae | 380 | |
bogdanm | 92:4fc01daae5a5 | 381 | #if defined(SYSCFG_RCR_PAGE8) |
<> | 135:176b8275d35d | 382 | #define IS_HAL_SYSCFG_WP_PAGE(__PAGE__) (((__PAGE__) > 0U) && ((__PAGE__) <= 0xFFFFU)) |
bogdanm | 92:4fc01daae5a5 | 383 | #elif defined(SYSCFG_RCR_PAGE4) |
<> | 135:176b8275d35d | 384 | #define IS_HAL_SYSCFG_WP_PAGE(__PAGE__) (((__PAGE__) > 0U) && ((__PAGE__) <= 0x00FFU)) |
bogdanm | 86:04dd9b1680ae | 385 | #else |
<> | 135:176b8275d35d | 386 | #define IS_HAL_SYSCFG_WP_PAGE(__PAGE__) (((__PAGE__) > 0U) && ((__PAGE__) <= 0x000FU)) |
bogdanm | 92:4fc01daae5a5 | 387 | #endif /* SYSCFG_RCR_PAGE8 */ |
bogdanm | 86:04dd9b1680ae | 388 | /** |
bogdanm | 86:04dd9b1680ae | 389 | * @} |
bogdanm | 86:04dd9b1680ae | 390 | */ |
bogdanm | 86:04dd9b1680ae | 391 | #endif /* SYSCFG_RCR_PAGE0 */ |
bogdanm | 86:04dd9b1680ae | 392 | |
Kojto | 122:f9eeca106725 | 393 | /** @defgroup HAL_SYSCFG_Interrupts HAL SYSCFG Interrupts |
bogdanm | 86:04dd9b1680ae | 394 | * @{ |
bogdanm | 86:04dd9b1680ae | 395 | */ |
bogdanm | 86:04dd9b1680ae | 396 | #define HAL_SYSCFG_IT_FPU_IOC (SYSCFG_CFGR1_FPU_IE_0) /*!< Floating Point Unit Invalid operation Interrupt */ |
bogdanm | 86:04dd9b1680ae | 397 | #define HAL_SYSCFG_IT_FPU_DZC (SYSCFG_CFGR1_FPU_IE_1) /*!< Floating Point Unit Divide-by-zero Interrupt */ |
bogdanm | 86:04dd9b1680ae | 398 | #define HAL_SYSCFG_IT_FPU_UFC (SYSCFG_CFGR1_FPU_IE_2) /*!< Floating Point Unit Underflow Interrupt */ |
bogdanm | 86:04dd9b1680ae | 399 | #define HAL_SYSCFG_IT_FPU_OFC (SYSCFG_CFGR1_FPU_IE_3) /*!< Floating Point Unit Overflow Interrupt */ |
bogdanm | 86:04dd9b1680ae | 400 | #define HAL_SYSCFG_IT_FPU_IDC (SYSCFG_CFGR1_FPU_IE_4) /*!< Floating Point Unit Input denormal Interrupt */ |
bogdanm | 86:04dd9b1680ae | 401 | #define HAL_SYSCFG_IT_FPU_IXC (SYSCFG_CFGR1_FPU_IE_5) /*!< Floating Point Unit Inexact Interrupt */ |
bogdanm | 86:04dd9b1680ae | 402 | |
bogdanm | 86:04dd9b1680ae | 403 | #define IS_HAL_SYSCFG_INTERRUPT(__INTERRUPT__) ((((__INTERRUPT__) & SYSCFG_CFGR1_FPU_IE_0) == SYSCFG_CFGR1_FPU_IE_0) || \ |
bogdanm | 86:04dd9b1680ae | 404 | (((__INTERRUPT__) & SYSCFG_CFGR1_FPU_IE_1) == SYSCFG_CFGR1_FPU_IE_1) || \ |
bogdanm | 86:04dd9b1680ae | 405 | (((__INTERRUPT__) & SYSCFG_CFGR1_FPU_IE_2) == SYSCFG_CFGR1_FPU_IE_2) || \ |
bogdanm | 86:04dd9b1680ae | 406 | (((__INTERRUPT__) & SYSCFG_CFGR1_FPU_IE_3) == SYSCFG_CFGR1_FPU_IE_3) || \ |
bogdanm | 86:04dd9b1680ae | 407 | (((__INTERRUPT__) & SYSCFG_CFGR1_FPU_IE_4) == SYSCFG_CFGR1_FPU_IE_4) || \ |
bogdanm | 86:04dd9b1680ae | 408 | (((__INTERRUPT__) & SYSCFG_CFGR1_FPU_IE_5) == SYSCFG_CFGR1_FPU_IE_5)) |
bogdanm | 86:04dd9b1680ae | 409 | |
bogdanm | 86:04dd9b1680ae | 410 | /** |
bogdanm | 86:04dd9b1680ae | 411 | * @} |
bogdanm | 86:04dd9b1680ae | 412 | */ |
bogdanm | 92:4fc01daae5a5 | 413 | |
bogdanm | 92:4fc01daae5a5 | 414 | /** |
bogdanm | 92:4fc01daae5a5 | 415 | * @} |
bogdanm | 92:4fc01daae5a5 | 416 | */ |
bogdanm | 86:04dd9b1680ae | 417 | |
Kojto | 122:f9eeca106725 | 418 | /* Exported macros -----------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 419 | /** @defgroup HAL_Exported_Macros HAL Exported Macros |
bogdanm | 92:4fc01daae5a5 | 420 | * @{ |
bogdanm | 86:04dd9b1680ae | 421 | */ |
bogdanm | 86:04dd9b1680ae | 422 | |
bogdanm | 92:4fc01daae5a5 | 423 | /** @defgroup Debug_MCU_APB1_Freeze Freeze/Unfreeze APB1 Peripherals in Debug mode |
bogdanm | 92:4fc01daae5a5 | 424 | * @{ |
bogdanm | 92:4fc01daae5a5 | 425 | */ |
bogdanm | 86:04dd9b1680ae | 426 | #if defined(DBGMCU_APB1_FZ_DBG_TIM2_STOP) |
Kojto | 122:f9eeca106725 | 427 | #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP)) |
Kojto | 122:f9eeca106725 | 428 | #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP)) |
bogdanm | 86:04dd9b1680ae | 429 | #endif /* DBGMCU_APB1_FZ_DBG_TIM2_STOP */ |
bogdanm | 86:04dd9b1680ae | 430 | |
bogdanm | 86:04dd9b1680ae | 431 | #if defined(DBGMCU_APB1_FZ_DBG_TIM3_STOP) |
Kojto | 122:f9eeca106725 | 432 | #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP)) |
Kojto | 122:f9eeca106725 | 433 | #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP)) |
bogdanm | 86:04dd9b1680ae | 434 | #endif /* DBGMCU_APB1_FZ_DBG_TIM3_STOP */ |
bogdanm | 86:04dd9b1680ae | 435 | |
bogdanm | 86:04dd9b1680ae | 436 | #if defined(DBGMCU_APB1_FZ_DBG_TIM4_STOP) |
Kojto | 122:f9eeca106725 | 437 | #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP)) |
Kojto | 122:f9eeca106725 | 438 | #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP)) |
bogdanm | 86:04dd9b1680ae | 439 | #endif /* DBGMCU_APB1_FZ_DBG_TIM4_STOP */ |
bogdanm | 86:04dd9b1680ae | 440 | |
bogdanm | 86:04dd9b1680ae | 441 | #if defined(DBGMCU_APB1_FZ_DBG_TIM5_STOP) |
Kojto | 122:f9eeca106725 | 442 | #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP)) |
Kojto | 122:f9eeca106725 | 443 | #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP)) |
bogdanm | 86:04dd9b1680ae | 444 | #endif /* DBGMCU_APB1_FZ_DBG_TIM5_STOP */ |
bogdanm | 86:04dd9b1680ae | 445 | |
bogdanm | 86:04dd9b1680ae | 446 | #if defined(DBGMCU_APB1_FZ_DBG_TIM6_STOP) |
Kojto | 122:f9eeca106725 | 447 | #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP)) |
Kojto | 122:f9eeca106725 | 448 | #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP)) |
bogdanm | 86:04dd9b1680ae | 449 | #endif /* DBGMCU_APB1_FZ_DBG_TIM6_STOP */ |
bogdanm | 86:04dd9b1680ae | 450 | |
bogdanm | 86:04dd9b1680ae | 451 | #if defined(DBGMCU_APB1_FZ_DBG_TIM7_STOP) |
Kojto | 122:f9eeca106725 | 452 | #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP)) |
Kojto | 122:f9eeca106725 | 453 | #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP)) |
bogdanm | 86:04dd9b1680ae | 454 | #endif /* DBGMCU_APB1_FZ_DBG_TIM7_STOP */ |
bogdanm | 86:04dd9b1680ae | 455 | |
bogdanm | 86:04dd9b1680ae | 456 | #if defined(DBGMCU_APB1_FZ_DBG_TIM12_STOP) |
Kojto | 122:f9eeca106725 | 457 | #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP)) |
Kojto | 122:f9eeca106725 | 458 | #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP)) |
bogdanm | 86:04dd9b1680ae | 459 | #endif /* DBGMCU_APB1_FZ_DBG_TIM12_STOP */ |
bogdanm | 86:04dd9b1680ae | 460 | |
bogdanm | 86:04dd9b1680ae | 461 | #if defined(DBGMCU_APB1_FZ_DBG_TIM13_STOP) |
Kojto | 122:f9eeca106725 | 462 | #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP)) |
Kojto | 122:f9eeca106725 | 463 | #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP)) |
bogdanm | 86:04dd9b1680ae | 464 | #endif /* DBGMCU_APB1_FZ_DBG_TIM13_STOP */ |
bogdanm | 86:04dd9b1680ae | 465 | |
bogdanm | 86:04dd9b1680ae | 466 | #if defined(DBGMCU_APB1_FZ_DBG_TIM14_STOP) |
Kojto | 122:f9eeca106725 | 467 | #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP)) |
Kojto | 122:f9eeca106725 | 468 | #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP)) |
bogdanm | 86:04dd9b1680ae | 469 | #endif /* DBGMCU_APB1_FZ_DBG_TIM14_STOP */ |
bogdanm | 86:04dd9b1680ae | 470 | |
bogdanm | 92:4fc01daae5a5 | 471 | #if defined(DBGMCU_APB1_FZ_DBG_TIM18_STOP) |
bogdanm | 92:4fc01daae5a5 | 472 | #define __HAL_FREEZE_TIM18_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM18_STOP)) |
bogdanm | 92:4fc01daae5a5 | 473 | #define __HAL_UNFREEZE_TIM18_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM18_STOP)) |
bogdanm | 92:4fc01daae5a5 | 474 | #endif /* DBGMCU_APB1_FZ_DBG_TIM14_STOP */ |
bogdanm | 86:04dd9b1680ae | 475 | |
bogdanm | 92:4fc01daae5a5 | 476 | #if defined(DBGMCU_APB1_FZ_DBG_RTC_STOP) |
Kojto | 122:f9eeca106725 | 477 | #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP)) |
Kojto | 122:f9eeca106725 | 478 | #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP)) |
bogdanm | 92:4fc01daae5a5 | 479 | #endif /* DBGMCU_APB1_FZ_DBG_RTC_STOP */ |
bogdanm | 86:04dd9b1680ae | 480 | |
bogdanm | 92:4fc01daae5a5 | 481 | #if defined(DBGMCU_APB1_FZ_DBG_WWDG_STOP) |
Kojto | 122:f9eeca106725 | 482 | #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP)) |
Kojto | 122:f9eeca106725 | 483 | #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP)) |
bogdanm | 92:4fc01daae5a5 | 484 | #endif /* DBGMCU_APB1_FZ_DBG_WWDG_STOP */ |
bogdanm | 86:04dd9b1680ae | 485 | |
bogdanm | 92:4fc01daae5a5 | 486 | #if defined(DBGMCU_APB1_FZ_DBG_IWDG_STOP) |
Kojto | 122:f9eeca106725 | 487 | #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP)) |
Kojto | 122:f9eeca106725 | 488 | #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP)) |
bogdanm | 92:4fc01daae5a5 | 489 | #endif /* DBGMCU_APB1_FZ_DBG_IWDG_STOP */ |
bogdanm | 86:04dd9b1680ae | 490 | |
bogdanm | 86:04dd9b1680ae | 491 | #if defined(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT) |
Kojto | 122:f9eeca106725 | 492 | #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) |
Kojto | 122:f9eeca106725 | 493 | #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) |
bogdanm | 86:04dd9b1680ae | 494 | #endif /* DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT */ |
bogdanm | 86:04dd9b1680ae | 495 | |
bogdanm | 86:04dd9b1680ae | 496 | #if defined(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT) |
Kojto | 122:f9eeca106725 | 497 | #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) |
Kojto | 122:f9eeca106725 | 498 | #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) |
bogdanm | 86:04dd9b1680ae | 499 | #endif /* DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT */ |
bogdanm | 86:04dd9b1680ae | 500 | |
bogdanm | 86:04dd9b1680ae | 501 | #if defined(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT) |
Kojto | 122:f9eeca106725 | 502 | #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) |
Kojto | 122:f9eeca106725 | 503 | #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) |
bogdanm | 86:04dd9b1680ae | 504 | #endif /* DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT */ |
bogdanm | 86:04dd9b1680ae | 505 | |
bogdanm | 86:04dd9b1680ae | 506 | #if defined(DBGMCU_APB1_FZ_DBG_CAN_STOP) |
bogdanm | 86:04dd9b1680ae | 507 | #define __HAL_FREEZE_CAN_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN_STOP)) |
bogdanm | 86:04dd9b1680ae | 508 | #define __HAL_UNFREEZE_CAN_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN_STOP)) |
bogdanm | 86:04dd9b1680ae | 509 | #endif /* DBGMCU_APB1_FZ_DBG_CAN_STOP */ |
bogdanm | 92:4fc01daae5a5 | 510 | /** |
bogdanm | 92:4fc01daae5a5 | 511 | * @} |
bogdanm | 92:4fc01daae5a5 | 512 | */ |
bogdanm | 92:4fc01daae5a5 | 513 | |
bogdanm | 92:4fc01daae5a5 | 514 | /** @defgroup Debug_MCU_APB2_Freeze Freeze/Unfreeze APB2 Peripherals in Debug mode |
bogdanm | 92:4fc01daae5a5 | 515 | * @{ |
bogdanm | 92:4fc01daae5a5 | 516 | */ |
bogdanm | 92:4fc01daae5a5 | 517 | #if defined(DBGMCU_APB2_FZ_DBG_TIM1_STOP) |
Kojto | 122:f9eeca106725 | 518 | #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP)) |
Kojto | 122:f9eeca106725 | 519 | #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP)) |
bogdanm | 92:4fc01daae5a5 | 520 | #endif /* DBGMCU_APB2_FZ_DBG_TIM1_STOP */ |
bogdanm | 86:04dd9b1680ae | 521 | |
bogdanm | 92:4fc01daae5a5 | 522 | #if defined(DBGMCU_APB2_FZ_DBG_TIM8_STOP) |
Kojto | 122:f9eeca106725 | 523 | #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP)) |
Kojto | 122:f9eeca106725 | 524 | #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP)) |
bogdanm | 92:4fc01daae5a5 | 525 | #endif /* DBGMCU_APB2_FZ_DBG_TIM8_STOP */ |
bogdanm | 86:04dd9b1680ae | 526 | |
bogdanm | 92:4fc01daae5a5 | 527 | #if defined(DBGMCU_APB2_FZ_DBG_TIM15_STOP) |
Kojto | 122:f9eeca106725 | 528 | #define __HAL_DBGMCU_FREEZE_TIM15() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM15_STOP)) |
Kojto | 122:f9eeca106725 | 529 | #define __HAL_DBGMCU_UNFREEZE_TIM15() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM15_STOP)) |
bogdanm | 92:4fc01daae5a5 | 530 | #endif /* DBGMCU_APB2_FZ_DBG_TIM15_STOP */ |
bogdanm | 92:4fc01daae5a5 | 531 | |
bogdanm | 92:4fc01daae5a5 | 532 | #if defined(DBGMCU_APB2_FZ_DBG_TIM16_STOP) |
Kojto | 122:f9eeca106725 | 533 | #define __HAL_DBGMCU_FREEZE_TIM16() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM16_STOP)) |
Kojto | 122:f9eeca106725 | 534 | #define __HAL_DBGMCU_UNFREEZE_TIM16() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM16_STOP)) |
bogdanm | 92:4fc01daae5a5 | 535 | #endif /* DBGMCU_APB2_FZ_DBG_TIM16_STOP */ |
bogdanm | 92:4fc01daae5a5 | 536 | |
bogdanm | 92:4fc01daae5a5 | 537 | #if defined(DBGMCU_APB2_FZ_DBG_TIM17_STOP) |
Kojto | 122:f9eeca106725 | 538 | #define __HAL_DBGMCU_FREEZE_TIM17() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM17_STOP)) |
Kojto | 122:f9eeca106725 | 539 | #define __HAL_DBGMCU_UNFREEZE_TIM17() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM17_STOP)) |
bogdanm | 92:4fc01daae5a5 | 540 | #endif /* DBGMCU_APB2_FZ_DBG_TIM17_STOP */ |
bogdanm | 92:4fc01daae5a5 | 541 | |
bogdanm | 92:4fc01daae5a5 | 542 | #if defined(DBGMCU_APB2_FZ_DBG_TIM19_STOP) |
bogdanm | 92:4fc01daae5a5 | 543 | #define __HAL_FREEZE_TIM19_DBGMCU() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM19_STOP)) |
bogdanm | 92:4fc01daae5a5 | 544 | #define __HAL_UNFREEZE_TIM19_DBGMCU() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM19_STOP)) |
bogdanm | 92:4fc01daae5a5 | 545 | #endif /* DBGMCU_APB2_FZ_DBG_TIM19_STOP */ |
bogdanm | 92:4fc01daae5a5 | 546 | |
bogdanm | 92:4fc01daae5a5 | 547 | #if defined(DBGMCU_APB2_FZ_DBG_TIM20_STOP) |
Kojto | 122:f9eeca106725 | 548 | #define __HAL_FREEZE_TIM20_DBGMCU() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM20_STOP)) |
Kojto | 122:f9eeca106725 | 549 | #define __HAL_UNFREEZE_TIM20_DBGMCU() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM20_STOP)) |
bogdanm | 92:4fc01daae5a5 | 550 | #endif /* DBGMCU_APB2_FZ_DBG_TIM20_STOP */ |
Kojto | 122:f9eeca106725 | 551 | |
Kojto | 122:f9eeca106725 | 552 | #if defined(DBGMCU_APB2_FZ_DBG_HRTIM1_STOP) |
Kojto | 122:f9eeca106725 | 553 | #define __HAL_FREEZE_HRTIM1_DBGMCU() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_HRTIM1_STOP)) |
Kojto | 122:f9eeca106725 | 554 | #define __HAL_UNFREEZE_HRTIM1_DBGMCU() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_HRTIM1_STOP)) |
Kojto | 122:f9eeca106725 | 555 | #endif /* DBGMCU_APB2_FZ_DBG_HRTIM1_STOP */ |
bogdanm | 92:4fc01daae5a5 | 556 | /** |
bogdanm | 92:4fc01daae5a5 | 557 | * @} |
bogdanm | 92:4fc01daae5a5 | 558 | */ |
bogdanm | 92:4fc01daae5a5 | 559 | |
bogdanm | 92:4fc01daae5a5 | 560 | /** @defgroup Memory_Mapping_Selection Memory Mapping Selection |
bogdanm | 92:4fc01daae5a5 | 561 | * @{ |
bogdanm | 92:4fc01daae5a5 | 562 | */ |
bogdanm | 86:04dd9b1680ae | 563 | #if defined(SYSCFG_CFGR1_MEM_MODE) |
bogdanm | 86:04dd9b1680ae | 564 | /** @brief Main Flash memory mapped at 0x00000000 |
bogdanm | 86:04dd9b1680ae | 565 | */ |
Kojto | 122:f9eeca106725 | 566 | #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE)) |
bogdanm | 86:04dd9b1680ae | 567 | #endif /* SYSCFG_CFGR1_MEM_MODE */ |
bogdanm | 86:04dd9b1680ae | 568 | |
bogdanm | 86:04dd9b1680ae | 569 | #if defined(SYSCFG_CFGR1_MEM_MODE_0) |
bogdanm | 86:04dd9b1680ae | 570 | /** @brief System Flash memory mapped at 0x00000000 |
bogdanm | 86:04dd9b1680ae | 571 | */ |
Kojto | 122:f9eeca106725 | 572 | #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \ |
bogdanm | 86:04dd9b1680ae | 573 | SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE_0; \ |
<> | 135:176b8275d35d | 574 | }while(0U) |
bogdanm | 86:04dd9b1680ae | 575 | #endif /* SYSCFG_CFGR1_MEM_MODE_0 */ |
bogdanm | 86:04dd9b1680ae | 576 | |
bogdanm | 86:04dd9b1680ae | 577 | #if defined(SYSCFG_CFGR1_MEM_MODE_0) && defined(SYSCFG_CFGR1_MEM_MODE_1) |
bogdanm | 86:04dd9b1680ae | 578 | /** @brief Embedded SRAM mapped at 0x00000000 |
bogdanm | 86:04dd9b1680ae | 579 | */ |
Kojto | 122:f9eeca106725 | 580 | #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \ |
bogdanm | 86:04dd9b1680ae | 581 | SYSCFG->CFGR1 |= (SYSCFG_CFGR1_MEM_MODE_0 | SYSCFG_CFGR1_MEM_MODE_1); \ |
<> | 135:176b8275d35d | 582 | }while(0U) |
bogdanm | 86:04dd9b1680ae | 583 | #endif /* SYSCFG_CFGR1_MEM_MODE_0 && SYSCFG_CFGR1_MEM_MODE_1 */ |
bogdanm | 86:04dd9b1680ae | 584 | |
bogdanm | 92:4fc01daae5a5 | 585 | #if defined(SYSCFG_CFGR1_MEM_MODE_2) |
Kojto | 122:f9eeca106725 | 586 | #define __HAL_SYSCFG_FMC_BANK() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \ |
bogdanm | 92:4fc01daae5a5 | 587 | SYSCFG->CFGR1 |= (SYSCFG_CFGR1_MEM_MODE_2); \ |
<> | 135:176b8275d35d | 588 | }while(0U) |
bogdanm | 92:4fc01daae5a5 | 589 | #endif /* SYSCFG_CFGR1_MEM_MODE_2 */ |
bogdanm | 92:4fc01daae5a5 | 590 | /** |
bogdanm | 92:4fc01daae5a5 | 591 | * @} |
bogdanm | 92:4fc01daae5a5 | 592 | */ |
bogdanm | 92:4fc01daae5a5 | 593 | |
bogdanm | 92:4fc01daae5a5 | 594 | /** @defgroup Encoder_Mode Encoder Mode |
bogdanm | 92:4fc01daae5a5 | 595 | * @{ |
bogdanm | 92:4fc01daae5a5 | 596 | */ |
bogdanm | 86:04dd9b1680ae | 597 | #if defined(SYSCFG_CFGR1_ENCODER_MODE) |
bogdanm | 86:04dd9b1680ae | 598 | /** @brief No Encoder mode |
bogdanm | 86:04dd9b1680ae | 599 | */ |
bogdanm | 86:04dd9b1680ae | 600 | #define __HAL_REMAPENCODER_NONE() (SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_ENCODER_MODE)) |
bogdanm | 86:04dd9b1680ae | 601 | #endif /* SYSCFG_CFGR1_ENCODER_MODE */ |
bogdanm | 86:04dd9b1680ae | 602 | |
bogdanm | 86:04dd9b1680ae | 603 | #if defined(SYSCFG_CFGR1_ENCODER_MODE_0) |
bogdanm | 86:04dd9b1680ae | 604 | /** @brief Encoder mode : TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively |
bogdanm | 86:04dd9b1680ae | 605 | */ |
bogdanm | 86:04dd9b1680ae | 606 | #define __HAL_REMAPENCODER_TIM2() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_ENCODER_MODE); \ |
bogdanm | 86:04dd9b1680ae | 607 | SYSCFG->CFGR1 |= SYSCFG_CFGR1_ENCODER_MODE_0; \ |
<> | 135:176b8275d35d | 608 | }while(0U) |
bogdanm | 86:04dd9b1680ae | 609 | #endif /* SYSCFG_CFGR1_ENCODER_MODE_0 */ |
bogdanm | 86:04dd9b1680ae | 610 | |
bogdanm | 86:04dd9b1680ae | 611 | #if defined(SYSCFG_CFGR1_ENCODER_MODE_1) |
bogdanm | 86:04dd9b1680ae | 612 | /** @brief Encoder mode : TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively |
bogdanm | 86:04dd9b1680ae | 613 | */ |
bogdanm | 86:04dd9b1680ae | 614 | #define __HAL_REMAPENCODER_TIM3() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_ENCODER_MODE); \ |
bogdanm | 86:04dd9b1680ae | 615 | SYSCFG->CFGR1 |= SYSCFG_CFGR1_ENCODER_MODE_1; \ |
<> | 135:176b8275d35d | 616 | }while(0U) |
bogdanm | 86:04dd9b1680ae | 617 | #endif /* SYSCFG_CFGR1_ENCODER_MODE_1 */ |
bogdanm | 86:04dd9b1680ae | 618 | |
bogdanm | 86:04dd9b1680ae | 619 | #if defined(SYSCFG_CFGR1_ENCODER_MODE_0) && defined(SYSCFG_CFGR1_ENCODER_MODE_1) |
bogdanm | 86:04dd9b1680ae | 620 | /** @brief Encoder mode : TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 (STM32F303xB/C and STM32F358xx devices) |
bogdanm | 86:04dd9b1680ae | 621 | */ |
bogdanm | 86:04dd9b1680ae | 622 | #define __HAL_REMAPENCODER_TIM4() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_ENCODER_MODE); \ |
bogdanm | 86:04dd9b1680ae | 623 | SYSCFG->CFGR1 |= (SYSCFG_CFGR1_ENCODER_MODE_0 | SYSCFG_CFGR1_ENCODER_MODE_1); \ |
<> | 135:176b8275d35d | 624 | }while(0U) |
bogdanm | 86:04dd9b1680ae | 625 | #endif /* SYSCFG_CFGR1_ENCODER_MODE_0 && SYSCFG_CFGR1_ENCODER_MODE_1 */ |
bogdanm | 92:4fc01daae5a5 | 626 | /** |
bogdanm | 92:4fc01daae5a5 | 627 | * @} |
bogdanm | 92:4fc01daae5a5 | 628 | */ |
bogdanm | 92:4fc01daae5a5 | 629 | |
bogdanm | 92:4fc01daae5a5 | 630 | /** @defgroup DMA_Remap_Enable DMA Remap Enable |
bogdanm | 92:4fc01daae5a5 | 631 | * @{ |
bogdanm | 92:4fc01daae5a5 | 632 | */ |
bogdanm | 86:04dd9b1680ae | 633 | #if defined(SYSCFG_CFGR3_DMA_RMP) && defined(SYSCFG_CFGR1_DMA_RMP) |
bogdanm | 86:04dd9b1680ae | 634 | /** @brief DMA remapping enable/disable macros |
bogdanm | 86:04dd9b1680ae | 635 | * @param __DMA_REMAP__: This parameter can be a value of @ref HAL_DMA_Remapping |
bogdanm | 86:04dd9b1680ae | 636 | */ |
Kojto | 122:f9eeca106725 | 637 | #define __HAL_DMA_REMAP_CHANNEL_ENABLE(__DMA_REMAP__) do {assert_param(IS_DMA_REMAP((__DMA_REMAP__))); \ |
bogdanm | 86:04dd9b1680ae | 638 | (((__DMA_REMAP__) & HAL_REMAP_CFGR3_MASK) ? \ |
bogdanm | 86:04dd9b1680ae | 639 | (SYSCFG->CFGR3 |= ((__DMA_REMAP__) & ~HAL_REMAP_CFGR3_MASK)) : \ |
bogdanm | 86:04dd9b1680ae | 640 | (SYSCFG->CFGR1 |= (__DMA_REMAP__))); \ |
<> | 135:176b8275d35d | 641 | }while(0U) |
Kojto | 122:f9eeca106725 | 642 | #define __HAL_DMA_REMAP_CHANNEL_DISABLE(__DMA_REMAP__) do {assert_param(IS_DMA_REMAP((__DMA_REMAP__))); \ |
bogdanm | 86:04dd9b1680ae | 643 | (((__DMA_REMAP__) & HAL_REMAP_CFGR3_MASK) ? \ |
bogdanm | 86:04dd9b1680ae | 644 | (SYSCFG->CFGR3 &= (~(__DMA_REMAP__) | HAL_REMAP_CFGR3_MASK)) : \ |
bogdanm | 86:04dd9b1680ae | 645 | (SYSCFG->CFGR1 &= ~(__DMA_REMAP__))); \ |
<> | 135:176b8275d35d | 646 | }while(0U) |
bogdanm | 86:04dd9b1680ae | 647 | #elif defined(SYSCFG_CFGR1_DMA_RMP) |
bogdanm | 86:04dd9b1680ae | 648 | /** @brief DMA remapping enable/disable macros |
bogdanm | 86:04dd9b1680ae | 649 | * @param __DMA_REMAP__: This parameter can be a value of @ref HAL_DMA_Remapping |
bogdanm | 86:04dd9b1680ae | 650 | */ |
Kojto | 122:f9eeca106725 | 651 | #define __HAL_DMA_REMAP_CHANNEL_ENABLE(__DMA_REMAP__) do {assert_param(IS_DMA_REMAP((__DMA_REMAP__))); \ |
bogdanm | 86:04dd9b1680ae | 652 | SYSCFG->CFGR1 |= (__DMA_REMAP__); \ |
<> | 135:176b8275d35d | 653 | }while(0U) |
Kojto | 122:f9eeca106725 | 654 | #define __HAL_DMA_REMAP_CHANNEL_DISABLE(__DMA_REMAP__) do {assert_param(IS_DMA_REMAP((__DMA_REMAP__))); \ |
bogdanm | 86:04dd9b1680ae | 655 | SYSCFG->CFGR1 &= ~(__DMA_REMAP__); \ |
<> | 135:176b8275d35d | 656 | }while(0U) |
bogdanm | 86:04dd9b1680ae | 657 | #endif /* SYSCFG_CFGR3_DMA_RMP || SYSCFG_CFGR1_DMA_RMP */ |
bogdanm | 92:4fc01daae5a5 | 658 | /** |
bogdanm | 92:4fc01daae5a5 | 659 | * @} |
bogdanm | 92:4fc01daae5a5 | 660 | */ |
bogdanm | 92:4fc01daae5a5 | 661 | |
Kojto | 122:f9eeca106725 | 662 | /** @defgroup FastModePlus_GPIO Fast-mode Plus on GPIO |
bogdanm | 92:4fc01daae5a5 | 663 | * @{ |
bogdanm | 92:4fc01daae5a5 | 664 | */ |
Kojto | 122:f9eeca106725 | 665 | /** @brief Fast-mode Plus driving capability enable/disable macros |
Kojto | 122:f9eeca106725 | 666 | * @param __FASTMODEPLUS__: This parameter can be a value of @ref SYSCFG_FastModePlus_GPIO values. |
Kojto | 122:f9eeca106725 | 667 | * That you can find above these macros. |
bogdanm | 86:04dd9b1680ae | 668 | */ |
Kojto | 122:f9eeca106725 | 669 | #define __HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\ |
Kojto | 122:f9eeca106725 | 670 | SET_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\ |
<> | 135:176b8275d35d | 671 | }while(0U) |
bogdanm | 86:04dd9b1680ae | 672 | |
Kojto | 122:f9eeca106725 | 673 | #define __HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\ |
Kojto | 122:f9eeca106725 | 674 | CLEAR_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\ |
<> | 135:176b8275d35d | 675 | }while(0U) |
bogdanm | 92:4fc01daae5a5 | 676 | /** |
bogdanm | 92:4fc01daae5a5 | 677 | * @} |
bogdanm | 92:4fc01daae5a5 | 678 | */ |
bogdanm | 86:04dd9b1680ae | 679 | |
bogdanm | 92:4fc01daae5a5 | 680 | /** @defgroup Floating_Point_Unit_Interrupts_Enable Floating Point Unit Interrupts Enable |
bogdanm | 92:4fc01daae5a5 | 681 | * @{ |
bogdanm | 92:4fc01daae5a5 | 682 | */ |
bogdanm | 86:04dd9b1680ae | 683 | /** @brief SYSCFG interrupt enable/disable macros |
bogdanm | 86:04dd9b1680ae | 684 | * @param __INTERRUPT__: This parameter can be a value of @ref HAL_SYSCFG_Interrupts |
bogdanm | 86:04dd9b1680ae | 685 | */ |
bogdanm | 86:04dd9b1680ae | 686 | #define __HAL_SYSCFG_INTERRUPT_ENABLE(__INTERRUPT__) do {assert_param(IS_HAL_SYSCFG_INTERRUPT((__INTERRUPT__))); \ |
bogdanm | 86:04dd9b1680ae | 687 | SYSCFG->CFGR1 |= (__INTERRUPT__); \ |
<> | 135:176b8275d35d | 688 | }while(0U) |
bogdanm | 86:04dd9b1680ae | 689 | |
bogdanm | 86:04dd9b1680ae | 690 | #define __HAL_SYSCFG_INTERRUPT_DISABLE(__INTERRUPT__) do {assert_param(IS_HAL_SYSCFG_INTERRUPT((__INTERRUPT__))); \ |
bogdanm | 86:04dd9b1680ae | 691 | SYSCFG->CFGR1 &= ~(__INTERRUPT__); \ |
<> | 135:176b8275d35d | 692 | }while(0U) |
bogdanm | 92:4fc01daae5a5 | 693 | /** |
bogdanm | 92:4fc01daae5a5 | 694 | * @} |
bogdanm | 92:4fc01daae5a5 | 695 | */ |
bogdanm | 92:4fc01daae5a5 | 696 | |
bogdanm | 86:04dd9b1680ae | 697 | #if defined(SYSCFG_CFGR1_USB_IT_RMP) |
bogdanm | 92:4fc01daae5a5 | 698 | /** @defgroup USB_Interrupt_Remap USB Interrupt Remap |
bogdanm | 92:4fc01daae5a5 | 699 | * @{ |
bogdanm | 92:4fc01daae5a5 | 700 | */ |
bogdanm | 86:04dd9b1680ae | 701 | /** @brief USB interrupt remapping enable/disable macros |
bogdanm | 86:04dd9b1680ae | 702 | */ |
bogdanm | 86:04dd9b1680ae | 703 | #define __HAL_REMAPINTERRUPT_USB_ENABLE() (SYSCFG->CFGR1 |= (SYSCFG_CFGR1_USB_IT_RMP)) |
bogdanm | 86:04dd9b1680ae | 704 | #define __HAL_REMAPINTERRUPT_USB_DISABLE() (SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_USB_IT_RMP)) |
bogdanm | 92:4fc01daae5a5 | 705 | /** |
bogdanm | 92:4fc01daae5a5 | 706 | * @} |
bogdanm | 92:4fc01daae5a5 | 707 | */ |
bogdanm | 86:04dd9b1680ae | 708 | #endif /* SYSCFG_CFGR1_USB_IT_RMP */ |
bogdanm | 92:4fc01daae5a5 | 709 | |
bogdanm | 86:04dd9b1680ae | 710 | #if defined(SYSCFG_CFGR1_VBAT) |
bogdanm | 92:4fc01daae5a5 | 711 | /** @defgroup VBAT_Monitoring_Enable VBAT Monitoring Enable |
bogdanm | 92:4fc01daae5a5 | 712 | * @{ |
bogdanm | 92:4fc01daae5a5 | 713 | */ |
bogdanm | 86:04dd9b1680ae | 714 | /** @brief SYSCFG interrupt enable/disable macros |
bogdanm | 86:04dd9b1680ae | 715 | */ |
bogdanm | 86:04dd9b1680ae | 716 | #define __HAL_SYSCFG_VBAT_MONITORING_ENABLE() (SYSCFG->CFGR1 |= (SYSCFG_CFGR1_VBAT)) |
bogdanm | 86:04dd9b1680ae | 717 | #define __HAL_SYSCFG_VBAT_MONITORING_DISABLE() (SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_VBAT)) |
bogdanm | 92:4fc01daae5a5 | 718 | /** |
bogdanm | 92:4fc01daae5a5 | 719 | * @} |
bogdanm | 92:4fc01daae5a5 | 720 | */ |
bogdanm | 86:04dd9b1680ae | 721 | #endif /* SYSCFG_CFGR1_VBAT */ |
bogdanm | 92:4fc01daae5a5 | 722 | |
bogdanm | 86:04dd9b1680ae | 723 | #if defined(SYSCFG_CFGR2_LOCKUP_LOCK) |
bogdanm | 92:4fc01daae5a5 | 724 | /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable |
bogdanm | 92:4fc01daae5a5 | 725 | * @{ |
bogdanm | 92:4fc01daae5a5 | 726 | */ |
bogdanm | 86:04dd9b1680ae | 727 | /** @brief SYSCFG Break Lockup lock |
bogdanm | 86:04dd9b1680ae | 728 | * Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/15/16/17 Break input |
bogdanm | 86:04dd9b1680ae | 729 | * @note The selected configuration is locked and can be unlocked by system reset |
bogdanm | 86:04dd9b1680ae | 730 | */ |
bogdanm | 86:04dd9b1680ae | 731 | #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \ |
bogdanm | 86:04dd9b1680ae | 732 | SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \ |
<> | 135:176b8275d35d | 733 | }while(0U) |
bogdanm | 92:4fc01daae5a5 | 734 | /** |
bogdanm | 92:4fc01daae5a5 | 735 | * @} |
bogdanm | 92:4fc01daae5a5 | 736 | */ |
bogdanm | 86:04dd9b1680ae | 737 | #endif /* SYSCFG_CFGR2_LOCKUP_LOCK */ |
bogdanm | 92:4fc01daae5a5 | 738 | |
bogdanm | 86:04dd9b1680ae | 739 | #if defined(SYSCFG_CFGR2_PVD_LOCK) |
bogdanm | 92:4fc01daae5a5 | 740 | /** @defgroup PVD_Lock_Enable PVD Lock |
bogdanm | 92:4fc01daae5a5 | 741 | * @{ |
bogdanm | 92:4fc01daae5a5 | 742 | */ |
bogdanm | 86:04dd9b1680ae | 743 | /** @brief SYSCFG Break PVD lock |
bogdanm | 86:04dd9b1680ae | 744 | * Enables and locks the PVD connection with Timer1/8/15/16/17 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register |
bogdanm | 86:04dd9b1680ae | 745 | * @note The selected configuration is locked and can be unlocked by system reset |
bogdanm | 86:04dd9b1680ae | 746 | */ |
bogdanm | 86:04dd9b1680ae | 747 | #define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \ |
bogdanm | 86:04dd9b1680ae | 748 | SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \ |
<> | 135:176b8275d35d | 749 | }while(0U) |
bogdanm | 92:4fc01daae5a5 | 750 | /** |
bogdanm | 92:4fc01daae5a5 | 751 | * @} |
bogdanm | 92:4fc01daae5a5 | 752 | */ |
bogdanm | 86:04dd9b1680ae | 753 | #endif /* SYSCFG_CFGR2_PVD_LOCK */ |
bogdanm | 86:04dd9b1680ae | 754 | |
bogdanm | 86:04dd9b1680ae | 755 | #if defined(SYSCFG_CFGR2_SRAM_PARITY_LOCK) |
bogdanm | 92:4fc01daae5a5 | 756 | /** @defgroup SRAM_Parity_Lock SRAM Parity Lock |
bogdanm | 92:4fc01daae5a5 | 757 | * @{ |
bogdanm | 92:4fc01daae5a5 | 758 | */ |
bogdanm | 86:04dd9b1680ae | 759 | /** @brief SYSCFG Break SRAM PARITY lock |
bogdanm | 86:04dd9b1680ae | 760 | * Enables and locks the SRAM_PARITY error signal with Break Input of TIMER1/8/15/16/17 |
bogdanm | 86:04dd9b1680ae | 761 | * @note The selected configuration is locked and can be unlocked by system reset |
bogdanm | 86:04dd9b1680ae | 762 | */ |
bogdanm | 86:04dd9b1680ae | 763 | #define __HAL_SYSCFG_BREAK_SRAMPARITY_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_SRAM_PARITY_LOCK); \ |
bogdanm | 86:04dd9b1680ae | 764 | SYSCFG->CFGR2 |= SYSCFG_CFGR2_SRAM_PARITY_LOCK; \ |
<> | 135:176b8275d35d | 765 | }while(0U) |
bogdanm | 92:4fc01daae5a5 | 766 | /** |
bogdanm | 92:4fc01daae5a5 | 767 | * @} |
bogdanm | 92:4fc01daae5a5 | 768 | */ |
bogdanm | 86:04dd9b1680ae | 769 | #endif /* SYSCFG_CFGR2_SRAM_PARITY_LOCK */ |
bogdanm | 92:4fc01daae5a5 | 770 | |
bogdanm | 92:4fc01daae5a5 | 771 | /** @defgroup Trigger_Remapping_Enable Trigger Remapping Enable |
bogdanm | 92:4fc01daae5a5 | 772 | * @{ |
bogdanm | 92:4fc01daae5a5 | 773 | */ |
bogdanm | 86:04dd9b1680ae | 774 | #if defined(SYSCFG_CFGR3_TRIGGER_RMP) |
bogdanm | 86:04dd9b1680ae | 775 | /** @brief Trigger remapping enable/disable macros |
bogdanm | 86:04dd9b1680ae | 776 | * @param __TRIGGER_REMAP__: This parameter can be a value of @ref HAL_Trigger_Remapping |
bogdanm | 86:04dd9b1680ae | 777 | */ |
bogdanm | 86:04dd9b1680ae | 778 | #define __HAL_REMAPTRIGGER_ENABLE(__TRIGGER_REMAP__) do {assert_param(IS_HAL_REMAPTRIGGER((__TRIGGER_REMAP__))); \ |
bogdanm | 86:04dd9b1680ae | 779 | (((__TRIGGER_REMAP__) & HAL_REMAP_CFGR3_MASK) ? \ |
bogdanm | 86:04dd9b1680ae | 780 | (SYSCFG->CFGR3 |= ((__TRIGGER_REMAP__) & ~HAL_REMAP_CFGR3_MASK)) : \ |
bogdanm | 86:04dd9b1680ae | 781 | (SYSCFG->CFGR1 |= (__TRIGGER_REMAP__))); \ |
<> | 135:176b8275d35d | 782 | }while(0U) |
bogdanm | 86:04dd9b1680ae | 783 | #define __HAL_REMAPTRIGGER_DISABLE(__TRIGGER_REMAP__) do {assert_param(IS_HAL_REMAPTRIGGER((__TRIGGER_REMAP__))); \ |
bogdanm | 86:04dd9b1680ae | 784 | (((__TRIGGER_REMAP__) & HAL_REMAP_CFGR3_MASK) ? \ |
bogdanm | 86:04dd9b1680ae | 785 | (SYSCFG->CFGR3 &= (~(__TRIGGER_REMAP__) | HAL_REMAP_CFGR3_MASK)) : \ |
bogdanm | 86:04dd9b1680ae | 786 | (SYSCFG->CFGR1 &= ~(__TRIGGER_REMAP__))); \ |
<> | 135:176b8275d35d | 787 | }while(0U) |
bogdanm | 86:04dd9b1680ae | 788 | #else |
bogdanm | 86:04dd9b1680ae | 789 | /** @brief Trigger remapping enable/disable macros |
bogdanm | 86:04dd9b1680ae | 790 | * @param __TRIGGER_REMAP__: This parameter can be a value of @ref HAL_Trigger_Remapping |
bogdanm | 86:04dd9b1680ae | 791 | */ |
bogdanm | 86:04dd9b1680ae | 792 | #define __HAL_REMAPTRIGGER_ENABLE(__TRIGGER_REMAP__) do {assert_param(IS_HAL_REMAPTRIGGER((__TRIGGER_REMAP__))); \ |
bogdanm | 86:04dd9b1680ae | 793 | (SYSCFG->CFGR1 |= (__TRIGGER_REMAP__)); \ |
<> | 135:176b8275d35d | 794 | }while(0U) |
bogdanm | 86:04dd9b1680ae | 795 | #define __HAL_REMAPTRIGGER_DISABLE(__TRIGGER_REMAP__) do {assert_param(IS_HAL_REMAPTRIGGER((__TRIGGER_REMAP__))); \ |
bogdanm | 86:04dd9b1680ae | 796 | (SYSCFG->CFGR1 &= ~(__TRIGGER_REMAP__)); \ |
<> | 135:176b8275d35d | 797 | }while(0U) |
bogdanm | 86:04dd9b1680ae | 798 | #endif /* SYSCFG_CFGR3_TRIGGER_RMP */ |
bogdanm | 92:4fc01daae5a5 | 799 | /** |
bogdanm | 92:4fc01daae5a5 | 800 | * @} |
bogdanm | 92:4fc01daae5a5 | 801 | */ |
bogdanm | 92:4fc01daae5a5 | 802 | |
bogdanm | 92:4fc01daae5a5 | 803 | #if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx) |
bogdanm | 92:4fc01daae5a5 | 804 | /** @defgroup ADC_Trigger_Remapping_Enable ADC Trigger Remapping Enable |
bogdanm | 92:4fc01daae5a5 | 805 | * @{ |
bogdanm | 92:4fc01daae5a5 | 806 | */ |
bogdanm | 92:4fc01daae5a5 | 807 | /** @brief ADC trigger remapping enable/disable macros |
bogdanm | 92:4fc01daae5a5 | 808 | * @param __ADCTRIGGER_REMAP__: This parameter can be a value of @ref HAL_ADC_Trigger_Remapping |
bogdanm | 92:4fc01daae5a5 | 809 | */ |
bogdanm | 92:4fc01daae5a5 | 810 | #define __HAL_REMAPADCTRIGGER_ENABLE(__ADCTRIGGER_REMAP__) do {assert_param(IS_HAL_REMAPADCTRIGGER((__ADCTRIGGER_REMAP__))); \ |
bogdanm | 92:4fc01daae5a5 | 811 | (SYSCFG->CFGR4 |= (__ADCTRIGGER_REMAP__)); \ |
<> | 135:176b8275d35d | 812 | }while(0U) |
bogdanm | 92:4fc01daae5a5 | 813 | #define __HAL_REMAPADCTRIGGER_DISABLE(__ADCTRIGGER_REMAP__) do {assert_param(IS_HAL_REMAPADCTRIGGER((__ADCTRIGGER_REMAP__))); \ |
bogdanm | 92:4fc01daae5a5 | 814 | (SYSCFG->CFGR4 &= ~(__ADCTRIGGER_REMAP__)); \ |
<> | 135:176b8275d35d | 815 | }while(0U) |
bogdanm | 92:4fc01daae5a5 | 816 | /** |
bogdanm | 92:4fc01daae5a5 | 817 | * @} |
bogdanm | 92:4fc01daae5a5 | 818 | */ |
bogdanm | 92:4fc01daae5a5 | 819 | #endif /* STM32F302xE || STM32F303xE || STM32F398xx */ |
bogdanm | 86:04dd9b1680ae | 820 | |
bogdanm | 86:04dd9b1680ae | 821 | #if defined(SYSCFG_CFGR2_BYP_ADDR_PAR) |
bogdanm | 92:4fc01daae5a5 | 822 | /** @defgroup RAM_Parity_Check_Disable RAM Parity Check Disable |
bogdanm | 92:4fc01daae5a5 | 823 | * @{ |
bogdanm | 92:4fc01daae5a5 | 824 | */ |
bogdanm | 86:04dd9b1680ae | 825 | /** |
bogdanm | 86:04dd9b1680ae | 826 | * @brief Parity check on RAM disable macro |
bogdanm | 86:04dd9b1680ae | 827 | * @note Disabling the parity check on RAM locks the configuration bit. |
bogdanm | 86:04dd9b1680ae | 828 | * To re-enable the parity check on RAM perform a system reset. |
bogdanm | 86:04dd9b1680ae | 829 | */ |
<> | 135:176b8275d35d | 830 | #define __HAL_SYSCFG_RAM_PARITYCHECK_DISABLE() (*(__IO uint32_t *) CFGR2_BYPADDRPAR_BB = 0x00000001U) |
bogdanm | 92:4fc01daae5a5 | 831 | /** |
bogdanm | 92:4fc01daae5a5 | 832 | * @} |
bogdanm | 92:4fc01daae5a5 | 833 | */ |
bogdanm | 86:04dd9b1680ae | 834 | #endif /* SYSCFG_CFGR2_BYP_ADDR_PAR */ |
bogdanm | 92:4fc01daae5a5 | 835 | |
bogdanm | 86:04dd9b1680ae | 836 | #if defined(SYSCFG_RCR_PAGE0) |
bogdanm | 92:4fc01daae5a5 | 837 | /** @defgroup CCM_RAM_Page_Write_Protection_Enable CCM RAM page write protection enable |
bogdanm | 92:4fc01daae5a5 | 838 | * @{ |
bogdanm | 92:4fc01daae5a5 | 839 | */ |
bogdanm | 86:04dd9b1680ae | 840 | /** @brief CCM RAM page write protection enable macro |
bogdanm | 86:04dd9b1680ae | 841 | * @param __PAGE_WP__: This parameter can be a value of @ref HAL_Page_Write_Protection |
bogdanm | 86:04dd9b1680ae | 842 | * @note write protection can only be disabled by a system reset |
bogdanm | 86:04dd9b1680ae | 843 | */ |
bogdanm | 86:04dd9b1680ae | 844 | #define __HAL_SYSCFG_SRAM_WRP_ENABLE(__PAGE_WP__) do {assert_param(IS_HAL_SYSCFG_WP_PAGE((__PAGE_WP__))); \ |
bogdanm | 86:04dd9b1680ae | 845 | SYSCFG->RCR |= (__PAGE_WP__); \ |
<> | 135:176b8275d35d | 846 | }while(0U) |
bogdanm | 92:4fc01daae5a5 | 847 | /** |
bogdanm | 92:4fc01daae5a5 | 848 | * @} |
bogdanm | 92:4fc01daae5a5 | 849 | */ |
bogdanm | 86:04dd9b1680ae | 850 | #endif /* SYSCFG_RCR_PAGE0 */ |
bogdanm | 92:4fc01daae5a5 | 851 | |
bogdanm | 92:4fc01daae5a5 | 852 | /** |
bogdanm | 92:4fc01daae5a5 | 853 | * @} |
bogdanm | 92:4fc01daae5a5 | 854 | */ |
bogdanm | 92:4fc01daae5a5 | 855 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 856 | /** @addtogroup HAL_Exported_Functions HAL Exported Functions |
bogdanm | 92:4fc01daae5a5 | 857 | * @{ |
bogdanm | 92:4fc01daae5a5 | 858 | */ |
bogdanm | 86:04dd9b1680ae | 859 | |
bogdanm | 92:4fc01daae5a5 | 860 | /** @addtogroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions |
bogdanm | 92:4fc01daae5a5 | 861 | * @brief Initialization and de-initialization functions |
bogdanm | 92:4fc01daae5a5 | 862 | * @{ |
bogdanm | 92:4fc01daae5a5 | 863 | */ |
bogdanm | 86:04dd9b1680ae | 864 | /* Initialization and de-initialization functions ******************************/ |
bogdanm | 86:04dd9b1680ae | 865 | HAL_StatusTypeDef HAL_Init(void); |
bogdanm | 86:04dd9b1680ae | 866 | HAL_StatusTypeDef HAL_DeInit(void); |
bogdanm | 86:04dd9b1680ae | 867 | void HAL_MspInit(void); |
bogdanm | 86:04dd9b1680ae | 868 | void HAL_MspDeInit(void); |
bogdanm | 86:04dd9b1680ae | 869 | HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority); |
bogdanm | 92:4fc01daae5a5 | 870 | /** |
bogdanm | 92:4fc01daae5a5 | 871 | * @} |
bogdanm | 92:4fc01daae5a5 | 872 | */ |
bogdanm | 92:4fc01daae5a5 | 873 | |
bogdanm | 92:4fc01daae5a5 | 874 | /** @addtogroup HAL_Exported_Functions_Group2 HAL Control functions |
bogdanm | 92:4fc01daae5a5 | 875 | * @brief HAL Control functions |
bogdanm | 92:4fc01daae5a5 | 876 | * @{ |
bogdanm | 92:4fc01daae5a5 | 877 | */ |
bogdanm | 86:04dd9b1680ae | 878 | /* Peripheral Control functions ************************************************/ |
bogdanm | 86:04dd9b1680ae | 879 | void HAL_IncTick(void); |
bogdanm | 86:04dd9b1680ae | 880 | void HAL_Delay(__IO uint32_t Delay); |
bogdanm | 86:04dd9b1680ae | 881 | void HAL_SuspendTick(void); |
bogdanm | 86:04dd9b1680ae | 882 | void HAL_ResumeTick(void); |
bogdanm | 86:04dd9b1680ae | 883 | uint32_t HAL_GetTick(void); |
bogdanm | 86:04dd9b1680ae | 884 | uint32_t HAL_GetHalVersion(void); |
bogdanm | 86:04dd9b1680ae | 885 | uint32_t HAL_GetREVID(void); |
bogdanm | 86:04dd9b1680ae | 886 | uint32_t HAL_GetDEVID(void); |
Kojto | 122:f9eeca106725 | 887 | void HAL_DBGMCU_EnableDBGSleepMode(void); |
Kojto | 122:f9eeca106725 | 888 | void HAL_DBGMCU_DisableDBGSleepMode(void); |
Kojto | 122:f9eeca106725 | 889 | void HAL_DBGMCU_EnableDBGStopMode(void); |
Kojto | 122:f9eeca106725 | 890 | void HAL_DBGMCU_DisableDBGStopMode(void); |
Kojto | 122:f9eeca106725 | 891 | void HAL_DBGMCU_EnableDBGStandbyMode(void); |
Kojto | 122:f9eeca106725 | 892 | void HAL_DBGMCU_DisableDBGStandbyMode(void); |
bogdanm | 92:4fc01daae5a5 | 893 | /** |
bogdanm | 92:4fc01daae5a5 | 894 | * @} |
bogdanm | 92:4fc01daae5a5 | 895 | */ |
bogdanm | 86:04dd9b1680ae | 896 | |
bogdanm | 92:4fc01daae5a5 | 897 | /** |
bogdanm | 92:4fc01daae5a5 | 898 | * @} |
bogdanm | 92:4fc01daae5a5 | 899 | */ |
bogdanm | 86:04dd9b1680ae | 900 | |
bogdanm | 86:04dd9b1680ae | 901 | /** |
bogdanm | 86:04dd9b1680ae | 902 | * @} |
bogdanm | 86:04dd9b1680ae | 903 | */ |
bogdanm | 86:04dd9b1680ae | 904 | |
bogdanm | 86:04dd9b1680ae | 905 | /** |
bogdanm | 86:04dd9b1680ae | 906 | * @} |
bogdanm | 86:04dd9b1680ae | 907 | */ |
bogdanm | 86:04dd9b1680ae | 908 | |
bogdanm | 86:04dd9b1680ae | 909 | #ifdef __cplusplus |
bogdanm | 86:04dd9b1680ae | 910 | } |
bogdanm | 86:04dd9b1680ae | 911 | #endif |
bogdanm | 86:04dd9b1680ae | 912 | |
bogdanm | 86:04dd9b1680ae | 913 | #endif /* __STM32F3xx_HAL_H */ |
bogdanm | 86:04dd9b1680ae | 914 | |
bogdanm | 86:04dd9b1680ae | 915 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |