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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MOTE_L152RC/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_ll_iwdg.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
128:9bcdf88f62b0
Child:
165:d1b4690b3f8b
Release 136 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure  https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /**
<> 128:9bcdf88f62b0 2 ******************************************************************************
<> 128:9bcdf88f62b0 3 * @file stm32l1xx_ll_iwdg.h
<> 128:9bcdf88f62b0 4 * @author MCD Application Team
<> 128:9bcdf88f62b0 5 * @version V1.2.0
<> 128:9bcdf88f62b0 6 * @date 01-July-2016
<> 128:9bcdf88f62b0 7 * @brief Header file of IWDG LL module.
<> 128:9bcdf88f62b0 8 ******************************************************************************
<> 128:9bcdf88f62b0 9 * @attention
<> 128:9bcdf88f62b0 10 *
<> 128:9bcdf88f62b0 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 128:9bcdf88f62b0 12 *
<> 128:9bcdf88f62b0 13 * Redistribution and use in source and binary forms, with or without modification,
<> 128:9bcdf88f62b0 14 * are permitted provided that the following conditions are met:
<> 128:9bcdf88f62b0 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 128:9bcdf88f62b0 16 * this list of conditions and the following disclaimer.
<> 128:9bcdf88f62b0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 128:9bcdf88f62b0 18 * this list of conditions and the following disclaimer in the documentation
<> 128:9bcdf88f62b0 19 * and/or other materials provided with the distribution.
<> 128:9bcdf88f62b0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 128:9bcdf88f62b0 21 * may be used to endorse or promote products derived from this software
<> 128:9bcdf88f62b0 22 * without specific prior written permission.
<> 128:9bcdf88f62b0 23 *
<> 128:9bcdf88f62b0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 128:9bcdf88f62b0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 128:9bcdf88f62b0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 128:9bcdf88f62b0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 128:9bcdf88f62b0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 128:9bcdf88f62b0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 128:9bcdf88f62b0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 128:9bcdf88f62b0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 128:9bcdf88f62b0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 128:9bcdf88f62b0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 128:9bcdf88f62b0 34 *
<> 128:9bcdf88f62b0 35 ******************************************************************************
<> 128:9bcdf88f62b0 36 */
<> 128:9bcdf88f62b0 37
<> 128:9bcdf88f62b0 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 128:9bcdf88f62b0 39 #ifndef __STM32L1xx_LL_IWDG_H
<> 128:9bcdf88f62b0 40 #define __STM32L1xx_LL_IWDG_H
<> 128:9bcdf88f62b0 41
<> 128:9bcdf88f62b0 42 #ifdef __cplusplus
<> 128:9bcdf88f62b0 43 extern "C" {
<> 128:9bcdf88f62b0 44 #endif
<> 128:9bcdf88f62b0 45
<> 128:9bcdf88f62b0 46 /* Includes ------------------------------------------------------------------*/
<> 128:9bcdf88f62b0 47 #include "stm32l1xx.h"
<> 128:9bcdf88f62b0 48
<> 128:9bcdf88f62b0 49 /** @addtogroup STM32L1xx_LL_Driver
<> 128:9bcdf88f62b0 50 * @{
<> 128:9bcdf88f62b0 51 */
<> 128:9bcdf88f62b0 52
<> 128:9bcdf88f62b0 53 #if defined(IWDG)
<> 128:9bcdf88f62b0 54
<> 128:9bcdf88f62b0 55 /** @defgroup IWDG_LL IWDG
<> 128:9bcdf88f62b0 56 * @{
<> 128:9bcdf88f62b0 57 */
<> 128:9bcdf88f62b0 58
<> 128:9bcdf88f62b0 59 /* Private types -------------------------------------------------------------*/
<> 128:9bcdf88f62b0 60 /* Private variables ---------------------------------------------------------*/
<> 128:9bcdf88f62b0 61
<> 128:9bcdf88f62b0 62 /* Private constants ---------------------------------------------------------*/
<> 128:9bcdf88f62b0 63 /** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
<> 128:9bcdf88f62b0 64 * @{
<> 128:9bcdf88f62b0 65 */
<> 128:9bcdf88f62b0 66
<> 128:9bcdf88f62b0 67 #define LL_IWDG_KEY_RELOAD ((uint32_t)0x0000AAAAU) /*!< IWDG Reload Counter Enable */
<> 128:9bcdf88f62b0 68 #define LL_IWDG_KEY_ENABLE ((uint32_t)0x0000CCCCU) /*!< IWDG Peripheral Enable */
<> 128:9bcdf88f62b0 69 #define LL_IWDG_KEY_WR_ACCESS_ENABLE ((uint32_t)0x00005555U) /*!< IWDG KR Write Access Enable */
<> 128:9bcdf88f62b0 70 #define LL_IWDG_KEY_WR_ACCESS_DISABLE ((uint32_t)0x00000000U) /*!< IWDG KR Write Access Disable */
<> 128:9bcdf88f62b0 71
<> 128:9bcdf88f62b0 72 /**
<> 128:9bcdf88f62b0 73 * @}
<> 128:9bcdf88f62b0 74 */
<> 128:9bcdf88f62b0 75
<> 128:9bcdf88f62b0 76 /* Private macros ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 77
<> 128:9bcdf88f62b0 78 /* Exported types ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 79 /* Exported constants --------------------------------------------------------*/
<> 128:9bcdf88f62b0 80 /** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants
<> 128:9bcdf88f62b0 81 * @{
<> 128:9bcdf88f62b0 82 */
<> 128:9bcdf88f62b0 83
<> 128:9bcdf88f62b0 84 /** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines
<> 128:9bcdf88f62b0 85 * @brief Flags defines which can be used with LL_IWDG_ReadReg function
<> 128:9bcdf88f62b0 86 * @{
<> 128:9bcdf88f62b0 87 */
<> 128:9bcdf88f62b0 88 #define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */
<> 128:9bcdf88f62b0 89 #define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */
<> 128:9bcdf88f62b0 90
<> 128:9bcdf88f62b0 91 /**
<> 128:9bcdf88f62b0 92 * @}
<> 128:9bcdf88f62b0 93 */
<> 128:9bcdf88f62b0 94
<> 128:9bcdf88f62b0 95 /** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider
<> 128:9bcdf88f62b0 96 * @{
<> 128:9bcdf88f62b0 97 */
<> 128:9bcdf88f62b0 98 #define LL_IWDG_PRESCALER_4 ((uint32_t)0x00000000U) /*!< Divider by 4 */
<> 128:9bcdf88f62b0 99 #define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */
<> 128:9bcdf88f62b0 100 #define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */
<> 128:9bcdf88f62b0 101 #define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */
<> 128:9bcdf88f62b0 102 #define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */
<> 128:9bcdf88f62b0 103 #define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */
<> 128:9bcdf88f62b0 104 #define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */
<> 128:9bcdf88f62b0 105 /**
<> 128:9bcdf88f62b0 106 * @}
<> 128:9bcdf88f62b0 107 */
<> 128:9bcdf88f62b0 108
<> 128:9bcdf88f62b0 109 /**
<> 128:9bcdf88f62b0 110 * @}
<> 128:9bcdf88f62b0 111 */
<> 128:9bcdf88f62b0 112
<> 128:9bcdf88f62b0 113 /* Exported macro ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 114 /** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros
<> 128:9bcdf88f62b0 115 * @{
<> 128:9bcdf88f62b0 116 */
<> 128:9bcdf88f62b0 117
<> 128:9bcdf88f62b0 118 /** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros
<> 128:9bcdf88f62b0 119 * @{
<> 128:9bcdf88f62b0 120 */
<> 128:9bcdf88f62b0 121
<> 128:9bcdf88f62b0 122 /**
<> 128:9bcdf88f62b0 123 * @brief Write a value in IWDG register
<> 128:9bcdf88f62b0 124 * @param __INSTANCE__ IWDG Instance
<> 128:9bcdf88f62b0 125 * @param __REG__ Register to be written
<> 128:9bcdf88f62b0 126 * @param __VALUE__ Value to be written in the register
<> 128:9bcdf88f62b0 127 * @retval None
<> 128:9bcdf88f62b0 128 */
<> 128:9bcdf88f62b0 129 #define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
<> 128:9bcdf88f62b0 130
<> 128:9bcdf88f62b0 131 /**
<> 128:9bcdf88f62b0 132 * @brief Read a value in IWDG register
<> 128:9bcdf88f62b0 133 * @param __INSTANCE__ IWDG Instance
<> 128:9bcdf88f62b0 134 * @param __REG__ Register to be read
<> 128:9bcdf88f62b0 135 * @retval Register value
<> 128:9bcdf88f62b0 136 */
<> 128:9bcdf88f62b0 137 #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
<> 128:9bcdf88f62b0 138 /**
<> 128:9bcdf88f62b0 139 * @}
<> 128:9bcdf88f62b0 140 */
<> 128:9bcdf88f62b0 141
<> 128:9bcdf88f62b0 142 /**
<> 128:9bcdf88f62b0 143 * @}
<> 128:9bcdf88f62b0 144 */
<> 128:9bcdf88f62b0 145
<> 128:9bcdf88f62b0 146
<> 128:9bcdf88f62b0 147 /* Exported functions --------------------------------------------------------*/
<> 128:9bcdf88f62b0 148 /** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions
<> 128:9bcdf88f62b0 149 * @{
<> 128:9bcdf88f62b0 150 */
<> 128:9bcdf88f62b0 151 /** @defgroup IWDG_LL_EF_Configuration Configuration
<> 128:9bcdf88f62b0 152 * @{
<> 128:9bcdf88f62b0 153 */
<> 128:9bcdf88f62b0 154
<> 128:9bcdf88f62b0 155 /**
<> 128:9bcdf88f62b0 156 * @brief Start the Independent Watchdog
<> 128:9bcdf88f62b0 157 * @note Except if the hardware watchdog option is selected
<> 128:9bcdf88f62b0 158 * @rmtoll KR KEY LL_IWDG_Enable
<> 128:9bcdf88f62b0 159 * @param IWDGx IWDG Instance
<> 128:9bcdf88f62b0 160 * @retval None
<> 128:9bcdf88f62b0 161 */
<> 128:9bcdf88f62b0 162 __STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
<> 128:9bcdf88f62b0 163 {
<> 128:9bcdf88f62b0 164 WRITE_REG(IWDG->KR, LL_IWDG_KEY_ENABLE);
<> 128:9bcdf88f62b0 165 }
<> 128:9bcdf88f62b0 166
<> 128:9bcdf88f62b0 167 /**
<> 128:9bcdf88f62b0 168 * @brief Reloads IWDG counter with value defined in the reload register
<> 128:9bcdf88f62b0 169 * @rmtoll KR KEY LL_IWDG_ReloadCounter
<> 128:9bcdf88f62b0 170 * @param IWDGx IWDG Instance
<> 128:9bcdf88f62b0 171 * @retval None
<> 128:9bcdf88f62b0 172 */
<> 128:9bcdf88f62b0 173 __STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
<> 128:9bcdf88f62b0 174 {
<> 128:9bcdf88f62b0 175 WRITE_REG(IWDG->KR, LL_IWDG_KEY_RELOAD);
<> 128:9bcdf88f62b0 176 }
<> 128:9bcdf88f62b0 177
<> 128:9bcdf88f62b0 178 /**
<> 128:9bcdf88f62b0 179 * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
<> 128:9bcdf88f62b0 180 * @rmtoll KR KEY LL_IWDG_EnableWriteAccess
<> 128:9bcdf88f62b0 181 * @param IWDGx IWDG Instance
<> 128:9bcdf88f62b0 182 * @retval None
<> 128:9bcdf88f62b0 183 */
<> 128:9bcdf88f62b0 184 __STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
<> 128:9bcdf88f62b0 185 {
<> 128:9bcdf88f62b0 186 WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
<> 128:9bcdf88f62b0 187 }
<> 128:9bcdf88f62b0 188
<> 128:9bcdf88f62b0 189 /**
<> 128:9bcdf88f62b0 190 * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
<> 128:9bcdf88f62b0 191 * @rmtoll KR KEY LL_IWDG_DisableWriteAccess
<> 128:9bcdf88f62b0 192 * @param IWDGx IWDG Instance
<> 128:9bcdf88f62b0 193 * @retval None
<> 128:9bcdf88f62b0 194 */
<> 128:9bcdf88f62b0 195 __STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
<> 128:9bcdf88f62b0 196 {
<> 128:9bcdf88f62b0 197 WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
<> 128:9bcdf88f62b0 198 }
<> 128:9bcdf88f62b0 199
<> 128:9bcdf88f62b0 200 /**
<> 128:9bcdf88f62b0 201 * @brief Select the prescaler of the IWDG
<> 128:9bcdf88f62b0 202 * @rmtoll PR PR LL_IWDG_SetPrescaler
<> 128:9bcdf88f62b0 203 * @param IWDGx IWDG Instance
<> 128:9bcdf88f62b0 204 * @param Prescaler This parameter can be one of the following values:
<> 128:9bcdf88f62b0 205 * @arg @ref LL_IWDG_PRESCALER_4
<> 128:9bcdf88f62b0 206 * @arg @ref LL_IWDG_PRESCALER_8
<> 128:9bcdf88f62b0 207 * @arg @ref LL_IWDG_PRESCALER_16
<> 128:9bcdf88f62b0 208 * @arg @ref LL_IWDG_PRESCALER_32
<> 128:9bcdf88f62b0 209 * @arg @ref LL_IWDG_PRESCALER_64
<> 128:9bcdf88f62b0 210 * @arg @ref LL_IWDG_PRESCALER_128
<> 128:9bcdf88f62b0 211 * @arg @ref LL_IWDG_PRESCALER_256
<> 128:9bcdf88f62b0 212 * @retval None
<> 128:9bcdf88f62b0 213 */
<> 128:9bcdf88f62b0 214 __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
<> 128:9bcdf88f62b0 215 {
<> 128:9bcdf88f62b0 216 WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
<> 128:9bcdf88f62b0 217 }
<> 128:9bcdf88f62b0 218
<> 128:9bcdf88f62b0 219 /**
<> 128:9bcdf88f62b0 220 * @brief Get the selected prescaler of the IWDG
<> 128:9bcdf88f62b0 221 * @rmtoll PR PR LL_IWDG_GetPrescaler
<> 128:9bcdf88f62b0 222 * @param IWDGx IWDG Instance
<> 128:9bcdf88f62b0 223 * @retval Returned value can be one of the following values:
<> 128:9bcdf88f62b0 224 * @arg @ref LL_IWDG_PRESCALER_4
<> 128:9bcdf88f62b0 225 * @arg @ref LL_IWDG_PRESCALER_8
<> 128:9bcdf88f62b0 226 * @arg @ref LL_IWDG_PRESCALER_16
<> 128:9bcdf88f62b0 227 * @arg @ref LL_IWDG_PRESCALER_32
<> 128:9bcdf88f62b0 228 * @arg @ref LL_IWDG_PRESCALER_64
<> 128:9bcdf88f62b0 229 * @arg @ref LL_IWDG_PRESCALER_128
<> 128:9bcdf88f62b0 230 * @arg @ref LL_IWDG_PRESCALER_256
<> 128:9bcdf88f62b0 231 */
<> 128:9bcdf88f62b0 232 __STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
<> 128:9bcdf88f62b0 233 {
<> 128:9bcdf88f62b0 234 return (uint32_t)(READ_REG(IWDGx->PR));
<> 128:9bcdf88f62b0 235 }
<> 128:9bcdf88f62b0 236
<> 128:9bcdf88f62b0 237 /**
<> 128:9bcdf88f62b0 238 * @brief Specify the IWDG down-counter reload value
<> 128:9bcdf88f62b0 239 * @rmtoll RLR RL LL_IWDG_SetReloadCounter
<> 128:9bcdf88f62b0 240 * @param IWDGx IWDG Instance
<> 128:9bcdf88f62b0 241 * @param Counter Value between Min_Data=0 and Max_Data=0x0FFF
<> 128:9bcdf88f62b0 242 * @retval None
<> 128:9bcdf88f62b0 243 */
<> 128:9bcdf88f62b0 244 __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
<> 128:9bcdf88f62b0 245 {
<> 128:9bcdf88f62b0 246 WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
<> 128:9bcdf88f62b0 247 }
<> 128:9bcdf88f62b0 248
<> 128:9bcdf88f62b0 249 /**
<> 128:9bcdf88f62b0 250 * @brief Get the specified IWDG down-counter reload value
<> 128:9bcdf88f62b0 251 * @rmtoll RLR RL LL_IWDG_GetReloadCounter
<> 128:9bcdf88f62b0 252 * @param IWDGx IWDG Instance
<> 128:9bcdf88f62b0 253 * @retval Value between Min_Data=0 and Max_Data=0x0FFF
<> 128:9bcdf88f62b0 254 */
<> 128:9bcdf88f62b0 255 __STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
<> 128:9bcdf88f62b0 256 {
<> 128:9bcdf88f62b0 257 return (uint32_t)(READ_REG(IWDGx->RLR));
<> 128:9bcdf88f62b0 258 }
<> 128:9bcdf88f62b0 259
<> 128:9bcdf88f62b0 260
<> 128:9bcdf88f62b0 261 /**
<> 128:9bcdf88f62b0 262 * @}
<> 128:9bcdf88f62b0 263 */
<> 128:9bcdf88f62b0 264
<> 128:9bcdf88f62b0 265 /** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management
<> 128:9bcdf88f62b0 266 * @{
<> 128:9bcdf88f62b0 267 */
<> 128:9bcdf88f62b0 268
<> 128:9bcdf88f62b0 269 /**
<> 128:9bcdf88f62b0 270 * @brief Check if flag Prescaler Value Update is set or not
<> 128:9bcdf88f62b0 271 * @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU
<> 128:9bcdf88f62b0 272 * @param IWDGx IWDG Instance
<> 128:9bcdf88f62b0 273 * @retval State of bit (1 or 0).
<> 128:9bcdf88f62b0 274 */
<> 128:9bcdf88f62b0 275 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
<> 128:9bcdf88f62b0 276 {
<> 128:9bcdf88f62b0 277 return (READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU));
<> 128:9bcdf88f62b0 278 }
<> 128:9bcdf88f62b0 279
<> 128:9bcdf88f62b0 280 /**
<> 128:9bcdf88f62b0 281 * @brief Check if flag Reload Value Update is set or not
<> 128:9bcdf88f62b0 282 * @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU
<> 128:9bcdf88f62b0 283 * @param IWDGx IWDG Instance
<> 128:9bcdf88f62b0 284 * @retval State of bit (1 or 0).
<> 128:9bcdf88f62b0 285 */
<> 128:9bcdf88f62b0 286 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
<> 128:9bcdf88f62b0 287 {
<> 128:9bcdf88f62b0 288 return (READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU));
<> 128:9bcdf88f62b0 289 }
<> 128:9bcdf88f62b0 290
<> 128:9bcdf88f62b0 291
<> 128:9bcdf88f62b0 292 /**
<> 128:9bcdf88f62b0 293 * @brief Check if all flags Prescaler, Reload & Window Value Update are reset or not
<> 128:9bcdf88f62b0 294 * @rmtoll SR PVU LL_IWDG_IsReady\n
<> 128:9bcdf88f62b0 295 * SR RVU LL_IWDG_IsReady
<> 128:9bcdf88f62b0 296 * @param IWDGx IWDG Instance
<> 128:9bcdf88f62b0 297 * @retval State of bits (1 or 0).
<> 128:9bcdf88f62b0 298 */
<> 128:9bcdf88f62b0 299 __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
<> 128:9bcdf88f62b0 300 {
<> 128:9bcdf88f62b0 301 return (READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU) == 0U);
<> 128:9bcdf88f62b0 302 }
<> 128:9bcdf88f62b0 303
<> 128:9bcdf88f62b0 304 /**
<> 128:9bcdf88f62b0 305 * @}
<> 128:9bcdf88f62b0 306 */
<> 128:9bcdf88f62b0 307
<> 128:9bcdf88f62b0 308
<> 128:9bcdf88f62b0 309 /**
<> 128:9bcdf88f62b0 310 * @}
<> 128:9bcdf88f62b0 311 */
<> 128:9bcdf88f62b0 312
<> 128:9bcdf88f62b0 313 /**
<> 128:9bcdf88f62b0 314 * @}
<> 128:9bcdf88f62b0 315 */
<> 128:9bcdf88f62b0 316
<> 128:9bcdf88f62b0 317 #endif /* IWDG) */
<> 128:9bcdf88f62b0 318
<> 128:9bcdf88f62b0 319 /**
<> 128:9bcdf88f62b0 320 * @}
<> 128:9bcdf88f62b0 321 */
<> 128:9bcdf88f62b0 322
<> 128:9bcdf88f62b0 323 #ifdef __cplusplus
<> 128:9bcdf88f62b0 324 }
<> 128:9bcdf88f62b0 325 #endif
<> 128:9bcdf88f62b0 326
<> 128:9bcdf88f62b0 327 #endif /* __STM32L1xx_LL_IWDG_H */
<> 128:9bcdf88f62b0 328
<> 128:9bcdf88f62b0 329 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/