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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MOTE_L152RC/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_usart.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
128:9bcdf88f62b0
Child:
165:d1b4690b3f8b
Release 136 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure  https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /**
<> 128:9bcdf88f62b0 2 ******************************************************************************
<> 128:9bcdf88f62b0 3 * @file stm32l1xx_hal_usart.h
<> 128:9bcdf88f62b0 4 * @author MCD Application Team
<> 128:9bcdf88f62b0 5 * @version V1.2.0
<> 128:9bcdf88f62b0 6 * @date 01-July-2016
<> 128:9bcdf88f62b0 7 * @brief This file contains all the functions prototypes for the USART
<> 128:9bcdf88f62b0 8 * firmware library.
<> 128:9bcdf88f62b0 9 ******************************************************************************
<> 128:9bcdf88f62b0 10 * @attention
<> 128:9bcdf88f62b0 11 *
<> 128:9bcdf88f62b0 12 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 128:9bcdf88f62b0 13 *
<> 128:9bcdf88f62b0 14 * Redistribution and use in source and binary forms, with or without modification,
<> 128:9bcdf88f62b0 15 * are permitted provided that the following conditions are met:
<> 128:9bcdf88f62b0 16 * 1. Redistributions of source code must retain the above copyright notice,
<> 128:9bcdf88f62b0 17 * this list of conditions and the following disclaimer.
<> 128:9bcdf88f62b0 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 128:9bcdf88f62b0 19 * this list of conditions and the following disclaimer in the documentation
<> 128:9bcdf88f62b0 20 * and/or other materials provided with the distribution.
<> 128:9bcdf88f62b0 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 128:9bcdf88f62b0 22 * may be used to endorse or promote products derived from this software
<> 128:9bcdf88f62b0 23 * without specific prior written permission.
<> 128:9bcdf88f62b0 24 *
<> 128:9bcdf88f62b0 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 128:9bcdf88f62b0 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 128:9bcdf88f62b0 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 128:9bcdf88f62b0 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 128:9bcdf88f62b0 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 128:9bcdf88f62b0 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 128:9bcdf88f62b0 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 128:9bcdf88f62b0 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 128:9bcdf88f62b0 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 128:9bcdf88f62b0 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 128:9bcdf88f62b0 35 *
<> 128:9bcdf88f62b0 36 ******************************************************************************
<> 128:9bcdf88f62b0 37 */
<> 128:9bcdf88f62b0 38
<> 128:9bcdf88f62b0 39 /* Define to prevent recursive inclusion -------------------------------------*/
<> 128:9bcdf88f62b0 40 #ifndef __STM32L1xx_HAL_USART_H
<> 128:9bcdf88f62b0 41 #define __STM32L1xx_HAL_USART_H
<> 128:9bcdf88f62b0 42
<> 128:9bcdf88f62b0 43 #ifdef __cplusplus
<> 128:9bcdf88f62b0 44 extern "C" {
<> 128:9bcdf88f62b0 45 #endif
<> 128:9bcdf88f62b0 46
<> 128:9bcdf88f62b0 47 /* Includes ------------------------------------------------------------------*/
<> 128:9bcdf88f62b0 48 #include "stm32l1xx_hal_def.h"
<> 128:9bcdf88f62b0 49
<> 128:9bcdf88f62b0 50 /** @addtogroup STM32L1xx_HAL_Driver
<> 128:9bcdf88f62b0 51 * @{
<> 128:9bcdf88f62b0 52 */
<> 128:9bcdf88f62b0 53
<> 128:9bcdf88f62b0 54 /** @addtogroup USART
<> 128:9bcdf88f62b0 55 * @{
<> 128:9bcdf88f62b0 56 */
<> 128:9bcdf88f62b0 57
<> 128:9bcdf88f62b0 58 /* Exported types ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 59 /** @defgroup USART_Exported_Types USART Exported Types
<> 128:9bcdf88f62b0 60 * @{
<> 128:9bcdf88f62b0 61 */
<> 128:9bcdf88f62b0 62
<> 128:9bcdf88f62b0 63
<> 128:9bcdf88f62b0 64 /**
<> 128:9bcdf88f62b0 65 * @brief USART Init Structure definition
<> 128:9bcdf88f62b0 66 */
<> 128:9bcdf88f62b0 67 typedef struct
<> 128:9bcdf88f62b0 68 {
<> 128:9bcdf88f62b0 69 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
<> 128:9bcdf88f62b0 70 The baud rate is computed using the following formula:
<> 128:9bcdf88f62b0 71 - IntegerDivider = ((PCLKx) / (8 * (husart->Init.BaudRate)))
<> 128:9bcdf88f62b0 72 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8) + 0.5 */
<> 128:9bcdf88f62b0 73
<> 128:9bcdf88f62b0 74 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 128:9bcdf88f62b0 75 This parameter can be a value of @ref USART_Word_Length */
<> 128:9bcdf88f62b0 76
<> 128:9bcdf88f62b0 77 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
<> 128:9bcdf88f62b0 78 This parameter can be a value of @ref USART_Stop_Bits */
<> 128:9bcdf88f62b0 79
<> 128:9bcdf88f62b0 80 uint32_t Parity; /*!< Specifies the parity mode.
<> 128:9bcdf88f62b0 81 This parameter can be a value of @ref USART_Parity
<> 128:9bcdf88f62b0 82 @note When parity is enabled, the computed parity is inserted
<> 128:9bcdf88f62b0 83 at the MSB position of the transmitted data (9th bit when
<> 128:9bcdf88f62b0 84 the word length is set to 9 data bits; 8th bit when the
<> 128:9bcdf88f62b0 85 word length is set to 8 data bits). */
<> 128:9bcdf88f62b0 86
<> 128:9bcdf88f62b0 87 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
<> 128:9bcdf88f62b0 88 This parameter can be a value of @ref USART_Mode */
<> 128:9bcdf88f62b0 89
<> 128:9bcdf88f62b0 90 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
<> 128:9bcdf88f62b0 91 This parameter can be a value of @ref USART_Clock_Polarity */
<> 128:9bcdf88f62b0 92
<> 128:9bcdf88f62b0 93 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
<> 128:9bcdf88f62b0 94 This parameter can be a value of @ref USART_Clock_Phase */
<> 128:9bcdf88f62b0 95
<> 128:9bcdf88f62b0 96 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
<> 128:9bcdf88f62b0 97 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
<> 128:9bcdf88f62b0 98 This parameter can be a value of @ref USART_Last_Bit */
<> 128:9bcdf88f62b0 99 }USART_InitTypeDef;
<> 128:9bcdf88f62b0 100
<> 128:9bcdf88f62b0 101 /**
<> 128:9bcdf88f62b0 102 * @brief HAL State structures definition
<> 128:9bcdf88f62b0 103 */
<> 128:9bcdf88f62b0 104 typedef enum
<> 128:9bcdf88f62b0 105 {
<> 128:9bcdf88f62b0 106 HAL_USART_STATE_RESET = 0x00, /*!< Peripheral is not initialized */
<> 128:9bcdf88f62b0 107 HAL_USART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
<> 128:9bcdf88f62b0 108 HAL_USART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
<> 128:9bcdf88f62b0 109 HAL_USART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
<> 128:9bcdf88f62b0 110 HAL_USART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
<> 128:9bcdf88f62b0 111 HAL_USART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission Reception process is ongoing */
<> 128:9bcdf88f62b0 112 HAL_USART_STATE_TIMEOUT = 0x03, /*!< Timeout state */
<> 128:9bcdf88f62b0 113 HAL_USART_STATE_ERROR = 0x04 /*!< Error */
<> 128:9bcdf88f62b0 114 }HAL_USART_StateTypeDef;
<> 128:9bcdf88f62b0 115
<> 128:9bcdf88f62b0 116
<> 128:9bcdf88f62b0 117 /**
<> 128:9bcdf88f62b0 118 * @brief USART handle Structure definition
<> 128:9bcdf88f62b0 119 */
<> 128:9bcdf88f62b0 120 typedef struct
<> 128:9bcdf88f62b0 121 {
<> 128:9bcdf88f62b0 122 USART_TypeDef *Instance; /*!< USART registers base address */
<> 128:9bcdf88f62b0 123
<> 128:9bcdf88f62b0 124 USART_InitTypeDef Init; /*!< Usart communication parameters */
<> 128:9bcdf88f62b0 125
<> 128:9bcdf88f62b0 126 uint8_t *pTxBuffPtr; /*!< Pointer to Usart Tx transfer Buffer */
<> 128:9bcdf88f62b0 127
<> 128:9bcdf88f62b0 128 uint16_t TxXferSize; /*!< Usart Tx Transfer size */
<> 128:9bcdf88f62b0 129
<> 128:9bcdf88f62b0 130 __IO uint16_t TxXferCount; /*!< Usart Tx Transfer Counter */
<> 128:9bcdf88f62b0 131
<> 128:9bcdf88f62b0 132 uint8_t *pRxBuffPtr; /*!< Pointer to Usart Rx transfer Buffer */
<> 128:9bcdf88f62b0 133
<> 128:9bcdf88f62b0 134 uint16_t RxXferSize; /*!< Usart Rx Transfer size */
<> 128:9bcdf88f62b0 135
<> 128:9bcdf88f62b0 136 __IO uint16_t RxXferCount; /*!< Usart Rx Transfer Counter */
<> 128:9bcdf88f62b0 137
<> 128:9bcdf88f62b0 138 DMA_HandleTypeDef *hdmatx; /*!< Usart Tx DMA Handle parameters */
<> 128:9bcdf88f62b0 139
<> 128:9bcdf88f62b0 140 DMA_HandleTypeDef *hdmarx; /*!< Usart Rx DMA Handle parameters */
<> 128:9bcdf88f62b0 141
<> 128:9bcdf88f62b0 142 HAL_LockTypeDef Lock; /*!< Locking object */
<> 128:9bcdf88f62b0 143
<> 128:9bcdf88f62b0 144 __IO HAL_USART_StateTypeDef State; /*!< Usart communication state */
<> 128:9bcdf88f62b0 145
<> 128:9bcdf88f62b0 146 __IO uint32_t ErrorCode; /*!< USART Error code */
<> 128:9bcdf88f62b0 147
<> 128:9bcdf88f62b0 148 }USART_HandleTypeDef;
<> 128:9bcdf88f62b0 149
<> 128:9bcdf88f62b0 150 /**
<> 128:9bcdf88f62b0 151 * @}
<> 128:9bcdf88f62b0 152 */
<> 128:9bcdf88f62b0 153
<> 128:9bcdf88f62b0 154 /* Exported constants --------------------------------------------------------*/
<> 128:9bcdf88f62b0 155 /** @defgroup USART_Exported_Constants USART Exported constants
<> 128:9bcdf88f62b0 156 * @{
<> 128:9bcdf88f62b0 157 */
<> 128:9bcdf88f62b0 158
<> 128:9bcdf88f62b0 159 /** @defgroup USART_Error_Codes USART Error Codes
<> 128:9bcdf88f62b0 160 * @{
<> 128:9bcdf88f62b0 161 */
<> 128:9bcdf88f62b0 162 #define HAL_USART_ERROR_NONE ((uint32_t)0x00) /*!< No error */
<> 128:9bcdf88f62b0 163 #define HAL_USART_ERROR_PE ((uint32_t)0x01) /*!< Parity error */
<> 128:9bcdf88f62b0 164 #define HAL_USART_ERROR_NE ((uint32_t)0x02) /*!< Noise error */
<> 128:9bcdf88f62b0 165 #define HAL_USART_ERROR_FE ((uint32_t)0x04) /*!< frame error */
<> 128:9bcdf88f62b0 166 #define HAL_USART_ERROR_ORE ((uint32_t)0x08) /*!< Overrun error */
<> 128:9bcdf88f62b0 167 #define HAL_USART_ERROR_DMA ((uint32_t)0x10) /*!< DMA transfer error */
<> 128:9bcdf88f62b0 168 /**
<> 128:9bcdf88f62b0 169 * @}
<> 128:9bcdf88f62b0 170 */
<> 128:9bcdf88f62b0 171
<> 128:9bcdf88f62b0 172 /** @defgroup USART_Word_Length USART Word Length
<> 128:9bcdf88f62b0 173 * @{
<> 128:9bcdf88f62b0 174 */
<> 128:9bcdf88f62b0 175 #define USART_WORDLENGTH_8B ((uint32_t)0x00000000)
<> 128:9bcdf88f62b0 176 #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
<> 128:9bcdf88f62b0 177 /**
<> 128:9bcdf88f62b0 178 * @}
<> 128:9bcdf88f62b0 179 */
<> 128:9bcdf88f62b0 180
<> 128:9bcdf88f62b0 181 /** @defgroup USART_Stop_Bits USART Number of Stop Bits
<> 128:9bcdf88f62b0 182 * @{
<> 128:9bcdf88f62b0 183 */
<> 128:9bcdf88f62b0 184 #define USART_STOPBITS_1 ((uint32_t)0x00000000)
<> 128:9bcdf88f62b0 185 #define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0)
<> 128:9bcdf88f62b0 186 #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
<> 128:9bcdf88f62b0 187 #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1))
<> 128:9bcdf88f62b0 188 /**
<> 128:9bcdf88f62b0 189 * @}
<> 128:9bcdf88f62b0 190 */
<> 128:9bcdf88f62b0 191
<> 128:9bcdf88f62b0 192 /** @defgroup USART_Parity USART Parity
<> 128:9bcdf88f62b0 193 * @{
<> 128:9bcdf88f62b0 194 */
<> 128:9bcdf88f62b0 195 #define USART_PARITY_NONE ((uint32_t)0x00000000)
<> 128:9bcdf88f62b0 196 #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
<> 128:9bcdf88f62b0 197 #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
<> 128:9bcdf88f62b0 198 /**
<> 128:9bcdf88f62b0 199 * @}
<> 128:9bcdf88f62b0 200 */
<> 128:9bcdf88f62b0 201
<> 128:9bcdf88f62b0 202 /** @defgroup USART_Mode USART Mode
<> 128:9bcdf88f62b0 203 * @{
<> 128:9bcdf88f62b0 204 */
<> 128:9bcdf88f62b0 205 #define USART_MODE_RX ((uint32_t)USART_CR1_RE)
<> 128:9bcdf88f62b0 206 #define USART_MODE_TX ((uint32_t)USART_CR1_TE)
<> 128:9bcdf88f62b0 207 #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
<> 128:9bcdf88f62b0 208
<> 128:9bcdf88f62b0 209 /**
<> 128:9bcdf88f62b0 210 * @}
<> 128:9bcdf88f62b0 211 */
<> 128:9bcdf88f62b0 212
<> 128:9bcdf88f62b0 213 /** @defgroup USART_Clock USART Clock
<> 128:9bcdf88f62b0 214 * @{
<> 128:9bcdf88f62b0 215 */
<> 128:9bcdf88f62b0 216 #define USART_CLOCK_DISABLE ((uint32_t)0x00000000)
<> 128:9bcdf88f62b0 217 #define USART_CLOCK_ENABLE ((uint32_t)USART_CR2_CLKEN)
<> 128:9bcdf88f62b0 218 /**
<> 128:9bcdf88f62b0 219 * @}
<> 128:9bcdf88f62b0 220 */
<> 128:9bcdf88f62b0 221
<> 128:9bcdf88f62b0 222 /** @defgroup USART_Clock_Polarity USART Clock Polarity
<> 128:9bcdf88f62b0 223 * @{
<> 128:9bcdf88f62b0 224 */
<> 128:9bcdf88f62b0 225 #define USART_POLARITY_LOW ((uint32_t)0x00000000)
<> 128:9bcdf88f62b0 226 #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL)
<> 128:9bcdf88f62b0 227 /**
<> 128:9bcdf88f62b0 228 * @}
<> 128:9bcdf88f62b0 229 */
<> 128:9bcdf88f62b0 230
<> 128:9bcdf88f62b0 231 /** @defgroup USART_Clock_Phase USART Clock Phase
<> 128:9bcdf88f62b0 232 * @{
<> 128:9bcdf88f62b0 233 */
<> 128:9bcdf88f62b0 234 #define USART_PHASE_1EDGE ((uint32_t)0x00000000)
<> 128:9bcdf88f62b0 235 #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA)
<> 128:9bcdf88f62b0 236 /**
<> 128:9bcdf88f62b0 237 * @}
<> 128:9bcdf88f62b0 238 */
<> 128:9bcdf88f62b0 239
<> 128:9bcdf88f62b0 240 /** @defgroup USART_Last_Bit USART Last Bit
<> 128:9bcdf88f62b0 241 * @{
<> 128:9bcdf88f62b0 242 */
<> 128:9bcdf88f62b0 243 #define USART_LASTBIT_DISABLE ((uint32_t)0x00000000)
<> 128:9bcdf88f62b0 244 #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL)
<> 128:9bcdf88f62b0 245 /**
<> 128:9bcdf88f62b0 246 * @}
<> 128:9bcdf88f62b0 247 */
<> 128:9bcdf88f62b0 248
<> 128:9bcdf88f62b0 249 /** @defgroup USART_NACK_State USART NACK State
<> 128:9bcdf88f62b0 250 * @{
<> 128:9bcdf88f62b0 251 */
<> 128:9bcdf88f62b0 252 #define USART_NACK_ENABLE ((uint32_t)USART_CR3_NACK)
<> 128:9bcdf88f62b0 253 #define USART_NACK_DISABLE ((uint32_t)0x00000000)
<> 128:9bcdf88f62b0 254 /**
<> 128:9bcdf88f62b0 255 * @}
<> 128:9bcdf88f62b0 256 */
<> 128:9bcdf88f62b0 257
<> 128:9bcdf88f62b0 258 /** @defgroup USART_Flags USART Flags
<> 128:9bcdf88f62b0 259 * Elements values convention: 0xXXXX
<> 128:9bcdf88f62b0 260 * - 0xXXXX : Flag mask in the SR register
<> 128:9bcdf88f62b0 261 * @{
<> 128:9bcdf88f62b0 262 */
<> 128:9bcdf88f62b0 263
<> 128:9bcdf88f62b0 264 #define USART_FLAG_CTS ((uint32_t)USART_SR_CTS)
<> 128:9bcdf88f62b0 265 #define USART_FLAG_LBD ((uint32_t)USART_SR_LBD)
<> 128:9bcdf88f62b0 266 #define USART_FLAG_TXE ((uint32_t)USART_SR_TXE)
<> 128:9bcdf88f62b0 267 #define USART_FLAG_TC ((uint32_t)USART_SR_TC)
<> 128:9bcdf88f62b0 268 #define USART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
<> 128:9bcdf88f62b0 269 #define USART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
<> 128:9bcdf88f62b0 270 #define USART_FLAG_ORE ((uint32_t)USART_SR_ORE)
<> 128:9bcdf88f62b0 271 #define USART_FLAG_NE ((uint32_t)USART_SR_NE)
<> 128:9bcdf88f62b0 272 #define USART_FLAG_FE ((uint32_t)USART_SR_FE)
<> 128:9bcdf88f62b0 273 #define USART_FLAG_PE ((uint32_t)USART_SR_PE)
<> 128:9bcdf88f62b0 274 /**
<> 128:9bcdf88f62b0 275 * @}
<> 128:9bcdf88f62b0 276 */
<> 128:9bcdf88f62b0 277
<> 128:9bcdf88f62b0 278 /** @defgroup USART_Interrupt_definition USART Interrupts Definition
<> 128:9bcdf88f62b0 279 * Elements values convention: 0xY000XXXX
<> 128:9bcdf88f62b0 280 * - XXXX : Interrupt mask (16 bits) in the Y register
<> 128:9bcdf88f62b0 281 * - Y : Interrupt source register (4bits)
<> 128:9bcdf88f62b0 282 * - 0001: CR1 register
<> 128:9bcdf88f62b0 283 * - 0010: CR2 register
<> 128:9bcdf88f62b0 284 * - 0011: CR3 register
<> 128:9bcdf88f62b0 285 *
<> 128:9bcdf88f62b0 286 * @{
<> 128:9bcdf88f62b0 287 */
<> 128:9bcdf88f62b0 288
<> 128:9bcdf88f62b0 289 #define USART_IT_PE ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_PEIE))
<> 128:9bcdf88f62b0 290 #define USART_IT_TXE ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_TXEIE))
<> 128:9bcdf88f62b0 291 #define USART_IT_TC ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_TCIE))
<> 128:9bcdf88f62b0 292 #define USART_IT_RXNE ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_RXNEIE))
<> 128:9bcdf88f62b0 293 #define USART_IT_IDLE ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_IDLEIE))
<> 128:9bcdf88f62b0 294
<> 128:9bcdf88f62b0 295 #define USART_IT_LBD ((uint32_t)(USART_CR2_REG_INDEX << 28 | USART_CR2_LBDIE))
<> 128:9bcdf88f62b0 296
<> 128:9bcdf88f62b0 297 #define USART_IT_CTS ((uint32_t)(USART_CR3_REG_INDEX << 28 | USART_CR3_CTSIE))
<> 128:9bcdf88f62b0 298 #define USART_IT_ERR ((uint32_t)(USART_CR3_REG_INDEX << 28 | USART_CR3_EIE))
<> 128:9bcdf88f62b0 299
<> 128:9bcdf88f62b0 300
<> 128:9bcdf88f62b0 301 /**
<> 128:9bcdf88f62b0 302 * @}
<> 128:9bcdf88f62b0 303 */
<> 128:9bcdf88f62b0 304
<> 128:9bcdf88f62b0 305 /**
<> 128:9bcdf88f62b0 306 * @}
<> 128:9bcdf88f62b0 307 */
<> 128:9bcdf88f62b0 308
<> 128:9bcdf88f62b0 309
<> 128:9bcdf88f62b0 310 /* Exported macro ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 311 /** @defgroup USART_Exported_Macros USART Exported Macros
<> 128:9bcdf88f62b0 312 * @{
<> 128:9bcdf88f62b0 313 */
<> 128:9bcdf88f62b0 314
<> 128:9bcdf88f62b0 315
<> 128:9bcdf88f62b0 316 /** @brief Reset USART handle state
<> 128:9bcdf88f62b0 317 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 318 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 128:9bcdf88f62b0 319 * @retval None
<> 128:9bcdf88f62b0 320 */
<> 128:9bcdf88f62b0 321 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
<> 128:9bcdf88f62b0 322
<> 128:9bcdf88f62b0 323 /** @brief Check whether the specified USART flag is set or not.
<> 128:9bcdf88f62b0 324 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 325 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 128:9bcdf88f62b0 326 * @param __FLAG__: specifies the flag to check.
<> 128:9bcdf88f62b0 327 * This parameter can be one of the following values:
<> 128:9bcdf88f62b0 328 * @arg USART_FLAG_TXE: Transmit data register empty flag
<> 128:9bcdf88f62b0 329 * @arg USART_FLAG_TC: Transmission Complete flag
<> 128:9bcdf88f62b0 330 * @arg USART_FLAG_RXNE: Receive data register not empty flag
<> 128:9bcdf88f62b0 331 * @arg USART_FLAG_IDLE: Idle Line detection flag
<> 128:9bcdf88f62b0 332 * @arg USART_FLAG_ORE: OverRun Error flag
<> 128:9bcdf88f62b0 333 * @arg USART_FLAG_NE: Noise Error flag
<> 128:9bcdf88f62b0 334 * @arg USART_FLAG_FE: Framing Error flag
<> 128:9bcdf88f62b0 335 * @arg USART_FLAG_PE: Parity Error flag
<> 128:9bcdf88f62b0 336 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 128:9bcdf88f62b0 337 */
<> 128:9bcdf88f62b0 338
<> 128:9bcdf88f62b0 339 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
<> 128:9bcdf88f62b0 340
<> 128:9bcdf88f62b0 341 /** @brief Clear the specified USART pending flags.
<> 128:9bcdf88f62b0 342 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 343 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 128:9bcdf88f62b0 344 * @param __FLAG__: specifies the flag to check.
<> 128:9bcdf88f62b0 345 * This parameter can be any combination of the following values:
<> 128:9bcdf88f62b0 346 * @arg USART_FLAG_TC: Transmission Complete flag.
<> 128:9bcdf88f62b0 347 * @arg USART_FLAG_RXNE: Receive data register not empty flag.
<> 128:9bcdf88f62b0 348 *
<> 128:9bcdf88f62b0 349 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
<> 128:9bcdf88f62b0 350 * error) and IDLE (Idle line detected) flags are cleared by software
<> 128:9bcdf88f62b0 351 * sequence: a read operation to USART_SR register followed by a read
<> 128:9bcdf88f62b0 352 * operation to USART_DR register.
<> 128:9bcdf88f62b0 353 * @note RXNE flag can be also cleared by a read to the USART_DR register.
<> 128:9bcdf88f62b0 354 * @note TC flag can be also cleared by software sequence: a read operation to
<> 128:9bcdf88f62b0 355 * USART_SR register followed by a write operation to USART_DR register.
<> 128:9bcdf88f62b0 356 * @note TXE flag is cleared only by a write to the USART_DR register.
<> 128:9bcdf88f62b0 357 *
<> 128:9bcdf88f62b0 358 * @retval None
<> 128:9bcdf88f62b0 359 */
<> 128:9bcdf88f62b0 360 #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
<> 128:9bcdf88f62b0 361
<> 128:9bcdf88f62b0 362 /** @brief Clear the USART PE pending flag.
<> 128:9bcdf88f62b0 363 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 364 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 128:9bcdf88f62b0 365 * @retval None
<> 128:9bcdf88f62b0 366 */
<> 128:9bcdf88f62b0 367 #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) \
<> 128:9bcdf88f62b0 368 do{ \
<> 128:9bcdf88f62b0 369 __IO uint32_t tmpreg; \
<> 128:9bcdf88f62b0 370 tmpreg = (__HANDLE__)->Instance->SR; \
<> 128:9bcdf88f62b0 371 tmpreg = (__HANDLE__)->Instance->DR; \
<> 128:9bcdf88f62b0 372 UNUSED(tmpreg); \
<> 128:9bcdf88f62b0 373 }while(0)
<> 128:9bcdf88f62b0 374
<> 128:9bcdf88f62b0 375
<> 128:9bcdf88f62b0 376 /** @brief Clear the USART FE pending flag.
<> 128:9bcdf88f62b0 377 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 378 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 128:9bcdf88f62b0 379 * @retval None
<> 128:9bcdf88f62b0 380 */
<> 128:9bcdf88f62b0 381 #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 128:9bcdf88f62b0 382
<> 128:9bcdf88f62b0 383 /** @brief Clear the USART NE pending flag.
<> 128:9bcdf88f62b0 384 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 385 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 128:9bcdf88f62b0 386 * @retval None
<> 128:9bcdf88f62b0 387 */
<> 128:9bcdf88f62b0 388 #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 128:9bcdf88f62b0 389
<> 128:9bcdf88f62b0 390 /** @brief Clear the USART ORE pending flag.
<> 128:9bcdf88f62b0 391 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 392 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 128:9bcdf88f62b0 393 * @retval None
<> 128:9bcdf88f62b0 394 */
<> 128:9bcdf88f62b0 395 #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 128:9bcdf88f62b0 396
<> 128:9bcdf88f62b0 397 /** @brief Clear the USART IDLE pending flag.
<> 128:9bcdf88f62b0 398 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 399 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 128:9bcdf88f62b0 400 * @retval None
<> 128:9bcdf88f62b0 401 */
<> 128:9bcdf88f62b0 402 #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 128:9bcdf88f62b0 403
<> 128:9bcdf88f62b0 404 /** @brief Enable the specified Usart interrupts.
<> 128:9bcdf88f62b0 405 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 406 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 128:9bcdf88f62b0 407 * @param __INTERRUPT__: specifies the USART interrupt source to enable.
<> 128:9bcdf88f62b0 408 * This parameter can be one of the following values:
<> 128:9bcdf88f62b0 409 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 128:9bcdf88f62b0 410 * @arg USART_IT_TC: Transmission complete interrupt
<> 128:9bcdf88f62b0 411 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 128:9bcdf88f62b0 412 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 128:9bcdf88f62b0 413 * @arg USART_IT_PE: Parity Error interrupt
<> 128:9bcdf88f62b0 414 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 128:9bcdf88f62b0 415 * @retval None
<> 128:9bcdf88f62b0 416 */
<> 128:9bcdf88f62b0 417 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & USART_IT_MASK)): \
<> 128:9bcdf88f62b0 418 (((__INTERRUPT__) >> 28) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & USART_IT_MASK)): \
<> 128:9bcdf88f62b0 419 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & USART_IT_MASK)))
<> 128:9bcdf88f62b0 420
<> 128:9bcdf88f62b0 421
<> 128:9bcdf88f62b0 422 /** @brief Disable the specified Usart interrupts.
<> 128:9bcdf88f62b0 423 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 424 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 128:9bcdf88f62b0 425 * @param __INTERRUPT__: specifies the USART interrupt source to disable.
<> 128:9bcdf88f62b0 426 * This parameter can be one of the following values:
<> 128:9bcdf88f62b0 427 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 128:9bcdf88f62b0 428 * @arg USART_IT_TC: Transmission complete interrupt
<> 128:9bcdf88f62b0 429 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 128:9bcdf88f62b0 430 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 128:9bcdf88f62b0 431 * @arg USART_IT_PE: Parity Error interrupt
<> 128:9bcdf88f62b0 432 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 128:9bcdf88f62b0 433 * @retval None
<> 128:9bcdf88f62b0 434 */
<> 128:9bcdf88f62b0 435 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
<> 128:9bcdf88f62b0 436 (((__INTERRUPT__) >> 28) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
<> 128:9bcdf88f62b0 437 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK)))
<> 128:9bcdf88f62b0 438
<> 128:9bcdf88f62b0 439
<> 128:9bcdf88f62b0 440
<> 128:9bcdf88f62b0 441 /** @brief Check whether the specified Usart interrupt has occurred or not.
<> 128:9bcdf88f62b0 442 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 443 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 128:9bcdf88f62b0 444 * @param __IT__: specifies the USART interrupt source to check.
<> 128:9bcdf88f62b0 445 * This parameter can be one of the following values:
<> 128:9bcdf88f62b0 446 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 128:9bcdf88f62b0 447 * @arg USART_IT_TC: Transmission complete interrupt
<> 128:9bcdf88f62b0 448 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 128:9bcdf88f62b0 449 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 128:9bcdf88f62b0 450 * @arg USART_IT_ERR: Error interrupt
<> 128:9bcdf88f62b0 451 * @arg USART_IT_PE: Parity Error interrupt
<> 128:9bcdf88f62b0 452 * @retval The new state of __IT__ (TRUE or FALSE).
<> 128:9bcdf88f62b0 453 */
<> 128:9bcdf88f62b0 454 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == USART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == USART_CR2_REG_INDEX)? \
<> 128:9bcdf88f62b0 455 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK))
<> 128:9bcdf88f62b0 456
<> 128:9bcdf88f62b0 457 /** @brief Enables the USART one bit sample method
<> 128:9bcdf88f62b0 458 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 459 * @retval None
<> 128:9bcdf88f62b0 460 */
<> 128:9bcdf88f62b0 461 #define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR3, (USART_CR3_ONEBIT))
<> 128:9bcdf88f62b0 462
<> 128:9bcdf88f62b0 463 /** @brief Disables the UART one bit sample method
<> 128:9bcdf88f62b0 464 * @param __HANDLE__: specifies the UART Handle.
<> 128:9bcdf88f62b0 465 * @retval None
<> 128:9bcdf88f62b0 466 */
<> 128:9bcdf88f62b0 467 #define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR3,(USART_CR3_ONEBIT))
<> 128:9bcdf88f62b0 468
<> 128:9bcdf88f62b0 469 /** @brief Enable USART
<> 128:9bcdf88f62b0 470 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 471 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 128:9bcdf88f62b0 472 * @retval None
<> 128:9bcdf88f62b0 473 */
<> 128:9bcdf88f62b0 474 #define __HAL_USART_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1,(USART_CR1_UE))
<> 128:9bcdf88f62b0 475
<> 128:9bcdf88f62b0 476 /** @brief Disable USART
<> 128:9bcdf88f62b0 477 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 478 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 128:9bcdf88f62b0 479 * @retval None
<> 128:9bcdf88f62b0 480 */
<> 128:9bcdf88f62b0 481 #define __HAL_USART_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1,(USART_CR1_UE))
<> 128:9bcdf88f62b0 482
<> 128:9bcdf88f62b0 483
<> 128:9bcdf88f62b0 484 /**
<> 128:9bcdf88f62b0 485 * @}
<> 128:9bcdf88f62b0 486 */
<> 128:9bcdf88f62b0 487
<> 128:9bcdf88f62b0 488
<> 128:9bcdf88f62b0 489 /* Private macros --------------------------------------------------------*/
<> 128:9bcdf88f62b0 490 /** @defgroup USART_Private_Macros USART Private Macros
<> 128:9bcdf88f62b0 491 * @{
<> 128:9bcdf88f62b0 492 */
<> 128:9bcdf88f62b0 493
<> 128:9bcdf88f62b0 494 #define USART_CR1_REG_INDEX 1
<> 128:9bcdf88f62b0 495 #define USART_CR2_REG_INDEX 2
<> 128:9bcdf88f62b0 496 #define USART_CR3_REG_INDEX 3
<> 128:9bcdf88f62b0 497
<> 128:9bcdf88f62b0 498 #define USART_DIV(__PCLK__, __BAUD__) (((__PCLK__)*25)/(2*(__BAUD__)))
<> 128:9bcdf88f62b0 499 #define USART_DIVMANT(__PCLK__, __BAUD__) (USART_DIV((__PCLK__), (__BAUD__))/100)
<> 128:9bcdf88f62b0 500 #define USART_DIVFRAQ(__PCLK__, __BAUD__) (((USART_DIV((__PCLK__), (__BAUD__)) - (USART_DIVMANT((__PCLK__), (__BAUD__)) * 100)) * 16 + 50) / 100)
<> 128:9bcdf88f62b0 501 #define USART_BRR(__PCLK__, __BAUD__) ((USART_DIVMANT((__PCLK__), (__BAUD__)) << 4)|(USART_DIVFRAQ((__PCLK__), (__BAUD__)) & 0x07))
<> 128:9bcdf88f62b0 502
<> 128:9bcdf88f62b0 503 /** Check USART Baud rate
<> 128:9bcdf88f62b0 504 * __BAUDRATE__: Baudrate specified by the user
<> 128:9bcdf88f62b0 505 * The maximum Baud Rate is derived from the maximum clock on APB (i.e. 32 MHz)
<> 128:9bcdf88f62b0 506 * divided by the smallest oversampling used on the USART (i.e. 8)
<> 128:9bcdf88f62b0 507 * return : TRUE or FALSE
<> 128:9bcdf88f62b0 508 */
<> 128:9bcdf88f62b0 509 #define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 4000001)
<> 128:9bcdf88f62b0 510
<> 128:9bcdf88f62b0 511 #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WORDLENGTH_8B) || \
<> 128:9bcdf88f62b0 512 ((LENGTH) == USART_WORDLENGTH_9B))
<> 128:9bcdf88f62b0 513
<> 128:9bcdf88f62b0 514 #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_STOPBITS_1) || \
<> 128:9bcdf88f62b0 515 ((STOPBITS) == USART_STOPBITS_0_5) || \
<> 128:9bcdf88f62b0 516 ((STOPBITS) == USART_STOPBITS_1_5) || \
<> 128:9bcdf88f62b0 517 ((STOPBITS) == USART_STOPBITS_2))
<> 128:9bcdf88f62b0 518
<> 128:9bcdf88f62b0 519 #define IS_USART_PARITY(PARITY) (((PARITY) == USART_PARITY_NONE) || \
<> 128:9bcdf88f62b0 520 ((PARITY) == USART_PARITY_EVEN) || \
<> 128:9bcdf88f62b0 521 ((PARITY) == USART_PARITY_ODD))
<> 128:9bcdf88f62b0 522
<> 128:9bcdf88f62b0 523 #define IS_USART_MODE(MODE) ((((MODE) & (~((uint32_t)USART_MODE_TX_RX))) == 0x00) && ((MODE) != (uint32_t)0x00000000))
<> 128:9bcdf88f62b0 524
<> 128:9bcdf88f62b0 525 #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_CLOCK_DISABLE) || \
<> 128:9bcdf88f62b0 526 ((CLOCK) == USART_CLOCK_ENABLE))
<> 128:9bcdf88f62b0 527
<> 128:9bcdf88f62b0 528 #define IS_USART_POLARITY(CPOL) (((CPOL) == USART_POLARITY_LOW) || ((CPOL) == USART_POLARITY_HIGH))
<> 128:9bcdf88f62b0 529
<> 128:9bcdf88f62b0 530 #define IS_USART_PHASE(CPHA) (((CPHA) == USART_PHASE_1EDGE) || ((CPHA) == USART_PHASE_2EDGE))
<> 128:9bcdf88f62b0 531
<> 128:9bcdf88f62b0 532 #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LASTBIT_DISABLE) || \
<> 128:9bcdf88f62b0 533 ((LASTBIT) == USART_LASTBIT_ENABLE))
<> 128:9bcdf88f62b0 534
<> 128:9bcdf88f62b0 535 #define IS_USART_NACK_STATE(NACK) (((NACK) == USART_NACK_ENABLE) || \
<> 128:9bcdf88f62b0 536 ((NACK) == USART_NACK_DISABLE))
<> 128:9bcdf88f62b0 537
<> 128:9bcdf88f62b0 538 /** USART interruptions flag mask
<> 128:9bcdf88f62b0 539 *
<> 128:9bcdf88f62b0 540 */
<> 128:9bcdf88f62b0 541 #define USART_IT_MASK ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \
<> 128:9bcdf88f62b0 542 USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE )
<> 128:9bcdf88f62b0 543
<> 128:9bcdf88f62b0 544 /**
<> 128:9bcdf88f62b0 545 * @}
<> 128:9bcdf88f62b0 546 */
<> 128:9bcdf88f62b0 547
<> 128:9bcdf88f62b0 548
<> 128:9bcdf88f62b0 549 /* Exported functions --------------------------------------------------------*/
<> 128:9bcdf88f62b0 550
<> 128:9bcdf88f62b0 551 /** @addtogroup USART_Exported_Functions USART Exported Functions
<> 128:9bcdf88f62b0 552 * @{
<> 128:9bcdf88f62b0 553 */
<> 128:9bcdf88f62b0 554
<> 128:9bcdf88f62b0 555 /** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions
<> 128:9bcdf88f62b0 556 * @{
<> 128:9bcdf88f62b0 557 */
<> 128:9bcdf88f62b0 558
<> 128:9bcdf88f62b0 559 /* Initialization and de-initialization functions ******************************/
<> 128:9bcdf88f62b0 560 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 561 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 562 void HAL_USART_MspInit(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 563 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 564
<> 128:9bcdf88f62b0 565 /**
<> 128:9bcdf88f62b0 566 * @}
<> 128:9bcdf88f62b0 567 */
<> 128:9bcdf88f62b0 568
<> 128:9bcdf88f62b0 569 /** @addtogroup USART_Exported_Functions_Group2 IO operation functions
<> 128:9bcdf88f62b0 570 * @{
<> 128:9bcdf88f62b0 571 */
<> 128:9bcdf88f62b0 572
<> 128:9bcdf88f62b0 573 /* IO operation functions *******************************************************/
<> 128:9bcdf88f62b0 574 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
<> 128:9bcdf88f62b0 575 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
<> 128:9bcdf88f62b0 576 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
<> 128:9bcdf88f62b0 577 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
<> 128:9bcdf88f62b0 578 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
<> 128:9bcdf88f62b0 579 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
<> 128:9bcdf88f62b0 580 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
<> 128:9bcdf88f62b0 581 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
<> 128:9bcdf88f62b0 582 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
<> 128:9bcdf88f62b0 583 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 584 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 585 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 586 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 587 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 588 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 589 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 590 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 591 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 592 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 593
<> 128:9bcdf88f62b0 594 /**
<> 128:9bcdf88f62b0 595 * @}
<> 128:9bcdf88f62b0 596 */
<> 128:9bcdf88f62b0 597
<> 128:9bcdf88f62b0 598 /* Peripheral Control functions ***********************************************/
<> 128:9bcdf88f62b0 599
<> 128:9bcdf88f62b0 600 /** @addtogroup USART_Exported_Functions_Group3 Peripheral State and Errors functions
<> 128:9bcdf88f62b0 601 * @{
<> 128:9bcdf88f62b0 602 */
<> 128:9bcdf88f62b0 603
<> 128:9bcdf88f62b0 604 /* Peripheral State and Error functions ***************************************/
<> 128:9bcdf88f62b0 605 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 606 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
<> 128:9bcdf88f62b0 607
<> 128:9bcdf88f62b0 608 /**
<> 128:9bcdf88f62b0 609 * @}
<> 128:9bcdf88f62b0 610 */
<> 128:9bcdf88f62b0 611
<> 128:9bcdf88f62b0 612 /**
<> 128:9bcdf88f62b0 613 * @}
<> 128:9bcdf88f62b0 614 */
<> 128:9bcdf88f62b0 615
<> 128:9bcdf88f62b0 616 /**
<> 128:9bcdf88f62b0 617 * @}
<> 128:9bcdf88f62b0 618 */
<> 128:9bcdf88f62b0 619
<> 128:9bcdf88f62b0 620 /**
<> 128:9bcdf88f62b0 621 * @}
<> 128:9bcdf88f62b0 622 */
<> 128:9bcdf88f62b0 623
<> 128:9bcdf88f62b0 624 #ifdef __cplusplus
<> 128:9bcdf88f62b0 625 }
<> 128:9bcdf88f62b0 626 #endif
<> 128:9bcdf88f62b0 627
<> 128:9bcdf88f62b0 628 #endif /* __STM32L1xx_HAL_USART_H */
<> 128:9bcdf88f62b0 629
<> 128:9bcdf88f62b0 630 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/