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TARGET_MOTE_L152RC/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_rtc_ex.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:: Kojto
Date:: Tue Feb 14 11:24:20 2017 +0000
Revision:: 136:ef9c61f8c49f
Parent:: 128:9bcdf88f62b0
Child:: 165:d1b4690b3f8b

Release 136 of the mbed library

Ports for Upcoming Targets

Fixes and Changes

3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

User	Revision	Line number	New contents of line
<>	128:9bcdf88f62b0	1	/**
<>	128:9bcdf88f62b0	2	******************************************************************************
<>	128:9bcdf88f62b0	3	* @file stm32l1xx_hal_rtc_ex.h
<>	128:9bcdf88f62b0	4	* @author MCD Application Team
<>	128:9bcdf88f62b0	5	* @version V1.2.0
<>	128:9bcdf88f62b0	6	* @date 01-July-2016
<>	128:9bcdf88f62b0	7	* @brief Header file of RTC HAL Extension module.
<>	128:9bcdf88f62b0	8	******************************************************************************
<>	128:9bcdf88f62b0	9	* @attention
<>	128:9bcdf88f62b0	10	*
<>	128:9bcdf88f62b0	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<>	128:9bcdf88f62b0	12	*
<>	128:9bcdf88f62b0	13	* Redistribution and use in source and binary forms, with or without modification,
<>	128:9bcdf88f62b0	14	* are permitted provided that the following conditions are met:
<>	128:9bcdf88f62b0	15	* 1. Redistributions of source code must retain the above copyright notice,
<>	128:9bcdf88f62b0	16	* this list of conditions and the following disclaimer.
<>	128:9bcdf88f62b0	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
<>	128:9bcdf88f62b0	18	* this list of conditions and the following disclaimer in the documentation
<>	128:9bcdf88f62b0	19	* and/or other materials provided with the distribution.
<>	128:9bcdf88f62b0	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
<>	128:9bcdf88f62b0	21	* may be used to endorse or promote products derived from this software
<>	128:9bcdf88f62b0	22	* without specific prior written permission.
<>	128:9bcdf88f62b0	23	*
<>	128:9bcdf88f62b0	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<>	128:9bcdf88f62b0	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<>	128:9bcdf88f62b0	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<>	128:9bcdf88f62b0	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<>	128:9bcdf88f62b0	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<>	128:9bcdf88f62b0	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<>	128:9bcdf88f62b0	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<>	128:9bcdf88f62b0	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<>	128:9bcdf88f62b0	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<>	128:9bcdf88f62b0	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<>	128:9bcdf88f62b0	34	*
<>	128:9bcdf88f62b0	35	******************************************************************************
<>	128:9bcdf88f62b0	36	*/
<>	128:9bcdf88f62b0	37
<>	128:9bcdf88f62b0	38	/* Define to prevent recursive inclusion -------------------------------------*/
<>	128:9bcdf88f62b0	39	#ifndef __STM32L1xx_HAL_RTC_EX_H
<>	128:9bcdf88f62b0	40	#define __STM32L1xx_HAL_RTC_EX_H
<>	128:9bcdf88f62b0	41
<>	128:9bcdf88f62b0	42	#ifdef __cplusplus
<>	128:9bcdf88f62b0	43	extern "C" {
<>	128:9bcdf88f62b0	44	#endif
<>	128:9bcdf88f62b0	45
<>	128:9bcdf88f62b0	46	/* Includes ------------------------------------------------------------------*/
<>	128:9bcdf88f62b0	47	#include "stm32l1xx_hal_def.h"
<>	128:9bcdf88f62b0	48
<>	128:9bcdf88f62b0	49	/** @addtogroup STM32L1xx_HAL_Driver
<>	128:9bcdf88f62b0	50	* @{
<>	128:9bcdf88f62b0	51	*/
<>	128:9bcdf88f62b0	52
<>	128:9bcdf88f62b0	53	/** @addtogroup RTCEx
<>	128:9bcdf88f62b0	54	* @{
<>	128:9bcdf88f62b0	55	*/
<>	128:9bcdf88f62b0	56
<>	128:9bcdf88f62b0	57	/* Exported types ------------------------------------------------------------*/
<>	128:9bcdf88f62b0	58	/** @defgroup RTCEx_Exported_Types RTCEx Exported Types
<>	128:9bcdf88f62b0	59	* @{
<>	128:9bcdf88f62b0	60	*/
<>	128:9bcdf88f62b0	61
<>	128:9bcdf88f62b0	62	/**
<>	128:9bcdf88f62b0	63	* @brief RTC Tamper structure definition
<>	128:9bcdf88f62b0	64	*/
<>	128:9bcdf88f62b0	65	typedef struct
<>	128:9bcdf88f62b0	66	{
<>	128:9bcdf88f62b0	67	uint32_t Tamper; /*!< Specifies the Tamper Pin.
<>	128:9bcdf88f62b0	68	This parameter can be a value of @ref RTCEx_Tamper_Pins_Definitions */
<>	128:9bcdf88f62b0	69
<>	128:9bcdf88f62b0	70	uint32_t Trigger; /*!< Specifies the Tamper Trigger.
<>	128:9bcdf88f62b0	71	This parameter can be a value of @ref RTCEx_Tamper_Trigger_Definitions */
<>	128:9bcdf88f62b0	72
<>	128:9bcdf88f62b0	73	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	74	uint32_t Filter; /*!< Specifies the RTC Filter Tamper.
<>	128:9bcdf88f62b0	75	This parameter can be a value of @ref RTCEx_Tamper_Filter_Definitions */
<>	128:9bcdf88f62b0	76
<>	128:9bcdf88f62b0	77	uint32_t SamplingFrequency; /*!< Specifies the sampling frequency.
<>	128:9bcdf88f62b0	78	This parameter can be a value of @ref RTCEx_Tamper_Sampling_Frequencies_Definitions */
<>	128:9bcdf88f62b0	79
<>	128:9bcdf88f62b0	80	uint32_t PrechargeDuration; /*!< Specifies the Precharge Duration .
<>	128:9bcdf88f62b0	81	This parameter can be a value of @ref RTCEx_Tamper_Pin_Precharge_Duration_Definitions */
<>	128:9bcdf88f62b0	82
<>	128:9bcdf88f62b0	83	uint32_t TamperPullUp; /*!< Specifies the Tamper PullUp .
<>	128:9bcdf88f62b0	84	This parameter can be a value of @ref RTCEx_Tamper_Pull_Up_Definitions */
<>	128:9bcdf88f62b0	85
<>	128:9bcdf88f62b0	86	uint32_t TimeStampOnTamperDetection; /*!< Specifies the TimeStampOnTamperDetection.
<>	128:9bcdf88f62b0	87	This parameter can be a value of @ref RTCEx_Tamper_TimeStampOnTamperDetection_Definitions */
<>	128:9bcdf88f62b0	88	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	89	}RTC_TamperTypeDef;
<>	128:9bcdf88f62b0	90
<>	128:9bcdf88f62b0	91	/**
<>	128:9bcdf88f62b0	92	* @brief RTC Time structure definition
<>	128:9bcdf88f62b0	93	*/
<>	128:9bcdf88f62b0	94	typedef struct
<>	128:9bcdf88f62b0	95	{
<>	128:9bcdf88f62b0	96	uint8_t Hours; /*!< Specifies the RTC Time Hour.
<>	128:9bcdf88f62b0	97	This parameter must be a number between Min_Data = 0 and Max_Data = 12 if the RTC_HourFormat_12 is selected
<>	128:9bcdf88f62b0	98	This parameter must be a number between Min_Data = 0 and Max_Data = 23 if the RTC_HourFormat_24 is selected */
<>	128:9bcdf88f62b0	99
<>	128:9bcdf88f62b0	100	uint8_t Minutes; /*!< Specifies the RTC Time Minutes.
<>	128:9bcdf88f62b0	101	This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
<>	128:9bcdf88f62b0	102
<>	128:9bcdf88f62b0	103	uint8_t Seconds; /*!< Specifies the RTC Time Seconds.
<>	128:9bcdf88f62b0	104	This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
<>	128:9bcdf88f62b0	105
<>	128:9bcdf88f62b0	106	uint8_t TimeFormat; /*!< Specifies the RTC AM/PM Time.
<>	128:9bcdf88f62b0	107	This parameter can be a value of @ref RTC_AM_PM_Definitions */
<>	128:9bcdf88f62b0	108
<>	128:9bcdf88f62b0	109	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	110	uint32_t SubSeconds; /*!< Specifies the RTC_SSR RTC Sub Second register content.
<>	128:9bcdf88f62b0	111	This parameter corresponds to a time unit range between [0-1] Second
<>	128:9bcdf88f62b0	112	with [1 Sec / SecondFraction +1] granularity */
<>	128:9bcdf88f62b0	113
<>	128:9bcdf88f62b0	114	uint32_t SecondFraction; /*!< Specifies the range or granularity of Sub Second register content
<>	128:9bcdf88f62b0	115	corresponding to Synchronous pre-scaler factor value (PREDIV_S)
<>	128:9bcdf88f62b0	116	This parameter corresponds to a time unit range between [0-1] Second
<>	128:9bcdf88f62b0	117	with [1 Sec / SecondFraction +1] granularity.
<>	128:9bcdf88f62b0	118	This field will be used only by HAL_RTC_GetTime function */
<>	128:9bcdf88f62b0	119	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	120
<>	128:9bcdf88f62b0	121	uint32_t DayLightSaving; /*!< Specifies RTC_DayLightSaveOperation: the value of hour adjustment.
<>	128:9bcdf88f62b0	122	This parameter can be a value of @ref RTC_DayLightSaving_Definitions */
<>	128:9bcdf88f62b0	123
<>	128:9bcdf88f62b0	124	uint32_t StoreOperation; /*!< Specifies RTC_StoreOperation value to be written in the BCK bit
<>	128:9bcdf88f62b0	125	in CR register to store the operation.
<>	128:9bcdf88f62b0	126	This parameter can be a value of @ref RTC_StoreOperation_Definitions */
<>	128:9bcdf88f62b0	127	}RTC_TimeTypeDef;
<>	128:9bcdf88f62b0	128
<>	128:9bcdf88f62b0	129	/**
<>	128:9bcdf88f62b0	130	* @brief RTC Alarm structure definition
<>	128:9bcdf88f62b0	131	*/
<>	128:9bcdf88f62b0	132	typedef struct
<>	128:9bcdf88f62b0	133	{
<>	128:9bcdf88f62b0	134	RTC_TimeTypeDef AlarmTime; /!< Specifies the RTC Alarm Time members /
<>	128:9bcdf88f62b0	135
<>	128:9bcdf88f62b0	136	uint32_t AlarmMask; /*!< Specifies the RTC Alarm Masks.
<>	128:9bcdf88f62b0	137	This parameter can be a value of @ref RTC_AlarmMask_Definitions */
<>	128:9bcdf88f62b0	138
<>	128:9bcdf88f62b0	139	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	140	uint32_t AlarmSubSecondMask; /*!< Specifies the RTC Alarm SubSeconds Masks.
<>	128:9bcdf88f62b0	141	This parameter can be a value of @ref RTC_Alarm_Sub_Seconds_Masks_Definitions */
<>	128:9bcdf88f62b0	142	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	143
<>	128:9bcdf88f62b0	144	uint32_t AlarmDateWeekDaySel; /*!< Specifies the RTC Alarm is on Date or WeekDay.
<>	128:9bcdf88f62b0	145	This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */
<>	128:9bcdf88f62b0	146
<>	128:9bcdf88f62b0	147	uint8_t AlarmDateWeekDay; /*!< Specifies the RTC Alarm Date/WeekDay.
<>	128:9bcdf88f62b0	148	If the Alarm Date is selected, this parameter must be set to a value in the 1-31 range.
<>	128:9bcdf88f62b0	149	If the Alarm WeekDay is selected, this parameter can be a value of @ref RTC_WeekDay_Definitions */
<>	128:9bcdf88f62b0	150
<>	128:9bcdf88f62b0	151	uint32_t Alarm; /*!< Specifies the alarm .
<>	128:9bcdf88f62b0	152	This parameter can be a value of @ref RTC_Alarms_Definitions */
<>	128:9bcdf88f62b0	153	}RTC_AlarmTypeDef;
<>	128:9bcdf88f62b0	154	/**
<>	128:9bcdf88f62b0	155	* @}
<>	128:9bcdf88f62b0	156	*/
<>	128:9bcdf88f62b0	157
<>	128:9bcdf88f62b0	158	/* Exported constants --------------------------------------------------------*/
<>	128:9bcdf88f62b0	159	/** @defgroup RTCEx_Exported_Constants RTCEx Exported Constants
<>	128:9bcdf88f62b0	160	* @{
<>	128:9bcdf88f62b0	161	*/
<>	128:9bcdf88f62b0	162
<>	128:9bcdf88f62b0	163	/** @defgroup RTC_Masks_Definitions Masks Definitions
<>	128:9bcdf88f62b0	164	* @{
<>	128:9bcdf88f62b0	165	*/
<>	128:9bcdf88f62b0	166	#define RTC_TR_RESERVED_MASK (0x007F7F7FU)
<>	128:9bcdf88f62b0	167	#define RTC_DR_RESERVED_MASK (0x00FFFF3FU)
<>	128:9bcdf88f62b0	168	#define RTC_INIT_MASK ((uint32_t)0xFFFFFFFFU)
<>	128:9bcdf88f62b0	169	#define RTC_RSF_MASK ((uint32_t)0xFFFFFF5FU)
<>	128:9bcdf88f62b0	170
<>	128:9bcdf88f62b0	171	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	172	#define RTC_FLAGS_MASK ((uint32_t)(RTC_FLAG_ALRAWF \| RTC_FLAG_ALRBWF \| RTC_FLAG_WUTWF \| \
<>	128:9bcdf88f62b0	173	RTC_FLAG_SHPF \| RTC_FLAG_INITS \| RTC_FLAG_RSF \| \
<>	128:9bcdf88f62b0	174	RTC_FLAG_INITF \| RTC_FLAG_ALRAF \| RTC_FLAG_ALRBF \| \
<>	128:9bcdf88f62b0	175	RTC_FLAG_WUTF \| RTC_FLAG_TSF \| RTC_FLAG_TSOVF \| \
<>	128:9bcdf88f62b0	176	RTC_FLAG_TAMP1F \| RTC_FLAG_TAMP2F \| RTC_FLAG_TAMP3F \| \
<>	128:9bcdf88f62b0	177	RTC_FLAG_RECALPF))
<>	128:9bcdf88f62b0	178	#else
<>	128:9bcdf88f62b0	179	#define RTC_FLAGS_MASK ((uint32_t)(RTC_FLAG_ALRAWF \| RTC_FLAG_ALRBWF \| RTC_FLAG_WUTWF \| \
<>	128:9bcdf88f62b0	180	RTC_FLAG_SHPF \| RTC_FLAG_INITS \| RTC_FLAG_RSF \| \
<>	128:9bcdf88f62b0	181	RTC_FLAG_INITF \| RTC_FLAG_ALRAF \| RTC_FLAG_ALRBF \| \
<>	128:9bcdf88f62b0	182	RTC_FLAG_WUTF \| RTC_FLAG_TSF \| RTC_FLAG_TSOVF \| \
<>	128:9bcdf88f62b0	183	RTC_FLAG_TAMP1F \| \
<>	128:9bcdf88f62b0	184	RTC_FLAG_RECALPF))
<>	128:9bcdf88f62b0	185
<>	128:9bcdf88f62b0	186	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	187	/**
<>	128:9bcdf88f62b0	188	* @}
<>	128:9bcdf88f62b0	189	*/
<>	128:9bcdf88f62b0	190
<>	128:9bcdf88f62b0	191	/** @defgroup RTC_Synchronous_Predivider Synchronous Predivider
<>	128:9bcdf88f62b0	192	* @{
<>	128:9bcdf88f62b0	193	*/
<>	128:9bcdf88f62b0	194	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	195	#define IS_RTC_SYNCH_PREDIV(PREDIV) ((PREDIV) <= (uint32_t)0x7FFF)
<>	128:9bcdf88f62b0	196	#elif defined(STM32L100xB) \|\| defined (STM32L151xB) \|\| defined (STM32L152xB)
<>	128:9bcdf88f62b0	197	#define IS_RTC_SYNCH_PREDIV(PREDIV) ((PREDIV) <= (uint32_t)0x1FFF)
<>	128:9bcdf88f62b0	198	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	199	/**
<>	128:9bcdf88f62b0	200	* @}
<>	128:9bcdf88f62b0	201	*/
<>	128:9bcdf88f62b0	202
<>	128:9bcdf88f62b0	203	/** @defgroup RTC_Interrupts_Definitions Interrupts Definitions
<>	128:9bcdf88f62b0	204	* @{
<>	128:9bcdf88f62b0	205	*/
<>	128:9bcdf88f62b0	206	#define RTC_IT_TS ((uint32_t)RTC_CR_TSIE)
<>	128:9bcdf88f62b0	207	#define RTC_IT_WUT ((uint32_t)RTC_CR_WUTIE)
<>	128:9bcdf88f62b0	208	#define RTC_IT_ALRB ((uint32_t)RTC_CR_ALRBIE)
<>	128:9bcdf88f62b0	209	#define RTC_IT_ALRA ((uint32_t)RTC_CR_ALRAIE)
<>	128:9bcdf88f62b0	210	#define RTC_IT_TAMP1 ((uint32_t)(RTC_TAFCR_TAMPIE \| RTC_TAFCR_TAMP1E))
<>	128:9bcdf88f62b0	211	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	212	#define RTC_IT_TAMP2 ((uint32_t)(RTC_TAFCR_TAMPIE \| RTC_TAFCR_TAMP2E))
<>	128:9bcdf88f62b0	213	#define RTC_IT_TAMP3 ((uint32_t)(RTC_TAFCR_TAMPIE \| RTC_TAFCR_TAMP3E))
<>	128:9bcdf88f62b0	214	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	215	/**
<>	128:9bcdf88f62b0	216	* @}
<>	128:9bcdf88f62b0	217	*/
<>	128:9bcdf88f62b0	218
<>	128:9bcdf88f62b0	219	/** @defgroup RTC_Flags_Definitions Flags Definitions
<>	128:9bcdf88f62b0	220	* @{
<>	128:9bcdf88f62b0	221	*/
<>	128:9bcdf88f62b0	222	#define RTC_FLAG_RECALPF ((uint32_t)RTC_ISR_RECALPF)
<>	128:9bcdf88f62b0	223	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	224	#define RTC_FLAG_TAMP3F ((uint32_t)RTC_ISR_TAMP3F)
<>	128:9bcdf88f62b0	225	#define RTC_FLAG_TAMP2F ((uint32_t)RTC_ISR_TAMP2F)
<>	128:9bcdf88f62b0	226	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	227	#define RTC_FLAG_TAMP1F ((uint32_t)RTC_ISR_TAMP1F)
<>	128:9bcdf88f62b0	228	#define RTC_FLAG_TSOVF ((uint32_t)RTC_ISR_TSOVF)
<>	128:9bcdf88f62b0	229	#define RTC_FLAG_TSF ((uint32_t)RTC_ISR_TSF)
<>	128:9bcdf88f62b0	230	#define RTC_FLAG_WUTF ((uint32_t)RTC_ISR_WUTF)
<>	128:9bcdf88f62b0	231	#define RTC_FLAG_ALRBF ((uint32_t)RTC_ISR_ALRBF)
<>	128:9bcdf88f62b0	232	#define RTC_FLAG_ALRAF ((uint32_t)RTC_ISR_ALRAF)
<>	128:9bcdf88f62b0	233	#define RTC_FLAG_INITF ((uint32_t)RTC_ISR_INITF)
<>	128:9bcdf88f62b0	234	#define RTC_FLAG_RSF ((uint32_t)RTC_ISR_RSF)
<>	128:9bcdf88f62b0	235	#define RTC_FLAG_INITS ((uint32_t)RTC_ISR_INITS)
<>	128:9bcdf88f62b0	236	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	237	#define RTC_FLAG_SHPF ((uint32_t)RTC_ISR_SHPF)
<>	128:9bcdf88f62b0	238	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	239	#define RTC_FLAG_WUTWF ((uint32_t)RTC_ISR_WUTWF)
<>	128:9bcdf88f62b0	240	#define RTC_FLAG_ALRBWF ((uint32_t)RTC_ISR_ALRBWF)
<>	128:9bcdf88f62b0	241	#define RTC_FLAG_ALRAWF ((uint32_t)RTC_ISR_ALRAWF)
<>	128:9bcdf88f62b0	242	/**
<>	128:9bcdf88f62b0	243	* @}
<>	128:9bcdf88f62b0	244	*/
<>	128:9bcdf88f62b0	245
<>	128:9bcdf88f62b0	246	/** @defgroup RTCEx_Output_selection_Definitions Output selection Definitions
<>	128:9bcdf88f62b0	247	* @{
<>	128:9bcdf88f62b0	248	*/
<>	128:9bcdf88f62b0	249	#define RTC_OUTPUT_DISABLE (0x00000000U)
<>	128:9bcdf88f62b0	250	#define RTC_OUTPUT_ALARMA (0x00200000U)
<>	128:9bcdf88f62b0	251	#define RTC_OUTPUT_ALARMB (0x00400000U)
<>	128:9bcdf88f62b0	252	#define RTC_OUTPUT_WAKEUP (0x00600000U)
<>	128:9bcdf88f62b0	253
<>	128:9bcdf88f62b0	254	#define IS_RTC_OUTPUT(OUTPUT) (((OUTPUT) == RTC_OUTPUT_DISABLE) \|\| \
<>	128:9bcdf88f62b0	255	((OUTPUT) == RTC_OUTPUT_ALARMA) \|\| \
<>	128:9bcdf88f62b0	256	((OUTPUT) == RTC_OUTPUT_ALARMB) \|\| \
<>	128:9bcdf88f62b0	257	((OUTPUT) == RTC_OUTPUT_WAKEUP))
<>	128:9bcdf88f62b0	258	/**
<>	128:9bcdf88f62b0	259	* @}
<>	128:9bcdf88f62b0	260	*/
<>	128:9bcdf88f62b0	261
<>	128:9bcdf88f62b0	262	/** @defgroup RTCEx_Backup_Registers_Definitions Backup Registers Definitions
<>	128:9bcdf88f62b0	263	* @{
<>	128:9bcdf88f62b0	264	*/
<>	128:9bcdf88f62b0	265	#if RTC_BKP_NUMBER > 0
<>	128:9bcdf88f62b0	266	#define RTC_BKP_DR0 (0x00000000U)
<>	128:9bcdf88f62b0	267	#define RTC_BKP_DR1 (0x00000001U)
<>	128:9bcdf88f62b0	268	#define RTC_BKP_DR2 (0x00000002U)
<>	128:9bcdf88f62b0	269	#define RTC_BKP_DR3 (0x00000003U)
<>	128:9bcdf88f62b0	270	#define RTC_BKP_DR4 (0x00000004U)
<>	128:9bcdf88f62b0	271	#endif /* RTC_BKP_NUMBER > 0 */
<>	128:9bcdf88f62b0	272
<>	128:9bcdf88f62b0	273	#if RTC_BKP_NUMBER > 5
<>	128:9bcdf88f62b0	274	#define RTC_BKP_DR5 (0x00000005U)
<>	128:9bcdf88f62b0	275	#define RTC_BKP_DR6 (0x00000006U)
<>	128:9bcdf88f62b0	276	#define RTC_BKP_DR7 (0x00000007U)
<>	128:9bcdf88f62b0	277	#define RTC_BKP_DR8 (0x00000008U)
<>	128:9bcdf88f62b0	278	#define RTC_BKP_DR9 (0x00000009U)
<>	128:9bcdf88f62b0	279	#define RTC_BKP_DR10 (0x0000000AU)
<>	128:9bcdf88f62b0	280	#define RTC_BKP_DR11 (0x0000000BU)
<>	128:9bcdf88f62b0	281	#define RTC_BKP_DR12 (0x0000000CU)
<>	128:9bcdf88f62b0	282	#define RTC_BKP_DR13 (0x0000000DU)
<>	128:9bcdf88f62b0	283	#define RTC_BKP_DR14 (0x0000000EU)
<>	128:9bcdf88f62b0	284	#define RTC_BKP_DR15 (0x0000000FU)
<>	128:9bcdf88f62b0	285	#define RTC_BKP_DR16 (0x00000010U)
<>	128:9bcdf88f62b0	286	#define RTC_BKP_DR17 (0x00000011U)
<>	128:9bcdf88f62b0	287	#define RTC_BKP_DR18 (0x00000012U)
<>	128:9bcdf88f62b0	288	#define RTC_BKP_DR19 (0x00000013U)
<>	128:9bcdf88f62b0	289	#endif /* RTC_BKP_NUMBER > 5 */
<>	128:9bcdf88f62b0	290
<>	128:9bcdf88f62b0	291	#if RTC_BKP_NUMBER > 20
<>	128:9bcdf88f62b0	292	#define RTC_BKP_DR20 (0x00000014U)
<>	128:9bcdf88f62b0	293	#define RTC_BKP_DR21 (0x00000015U)
<>	128:9bcdf88f62b0	294	#define RTC_BKP_DR22 (0x00000016U)
<>	128:9bcdf88f62b0	295	#define RTC_BKP_DR23 (0x00000017U)
<>	128:9bcdf88f62b0	296	#define RTC_BKP_DR24 (0x00000018U)
<>	128:9bcdf88f62b0	297	#define RTC_BKP_DR25 (0x00000019U)
<>	128:9bcdf88f62b0	298	#define RTC_BKP_DR26 (0x0000001AU)
<>	128:9bcdf88f62b0	299	#define RTC_BKP_DR27 (0x0000001BU)
<>	128:9bcdf88f62b0	300	#define RTC_BKP_DR28 (0x0000001CU)
<>	128:9bcdf88f62b0	301	#define RTC_BKP_DR29 (0x0000001DU)
<>	128:9bcdf88f62b0	302	#define RTC_BKP_DR30 (0x0000001EU)
<>	128:9bcdf88f62b0	303	#define RTC_BKP_DR31 (0x0000001FU)
<>	128:9bcdf88f62b0	304	#endif /* RTC_BKP_NUMBER > 20 */
<>	128:9bcdf88f62b0	305
<>	128:9bcdf88f62b0	306	#define IS_RTC_BKP(BKP) ((BKP) < (uint32_t) RTC_BKP_NUMBER)
<>	128:9bcdf88f62b0	307	/**
<>	128:9bcdf88f62b0	308	* @}
<>	128:9bcdf88f62b0	309	*/
<>	128:9bcdf88f62b0	310
<>	128:9bcdf88f62b0	311	/** @defgroup RTCEx_Time_Stamp_Edges_Definitions Time Stamp Edges Definitions
<>	128:9bcdf88f62b0	312	* @{
<>	128:9bcdf88f62b0	313	*/
<>	128:9bcdf88f62b0	314	#define RTC_TIMESTAMPEDGE_RISING (0x00000000U)
<>	128:9bcdf88f62b0	315	#define RTC_TIMESTAMPEDGE_FALLING (0x00000008U)
<>	128:9bcdf88f62b0	316
<>	128:9bcdf88f62b0	317	#define IS_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TIMESTAMPEDGE_RISING) \|\| \
<>	128:9bcdf88f62b0	318	((EDGE) == RTC_TIMESTAMPEDGE_FALLING))
<>	128:9bcdf88f62b0	319	/**
<>	128:9bcdf88f62b0	320	* @}
<>	128:9bcdf88f62b0	321	*/
<>	128:9bcdf88f62b0	322
<>	128:9bcdf88f62b0	323	/** @defgroup RTCEx_Tamper_Pins_Definitions Tamper Pins Definitions
<>	128:9bcdf88f62b0	324	* @{
<>	128:9bcdf88f62b0	325	*/
<>	128:9bcdf88f62b0	326	#define RTC_TAMPER_1 RTC_TAFCR_TAMP1E
<>	128:9bcdf88f62b0	327	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	328	#define RTC_TAMPER_2 RTC_TAFCR_TAMP2E
<>	128:9bcdf88f62b0	329	#define RTC_TAMPER_3 RTC_TAFCR_TAMP3E
<>	128:9bcdf88f62b0	330	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	331
<>	128:9bcdf88f62b0	332	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	333	#define IS_RTC_TAMPER(TAMPER) (((~(RTC_TAMPER_1\|RTC_TAMPER_2\|RTC_TAMPER_3) & (TAMPER)) == (uint32_t)RESET) && ((TAMPER) != (uint32_t)RESET))
<>	128:9bcdf88f62b0	334	#else
<>	128:9bcdf88f62b0	335	#define IS_RTC_TAMPER(TAMPER) ((TAMPER) == RTC_TAMPER_1)
<>	128:9bcdf88f62b0	336	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	337	/**
<>	128:9bcdf88f62b0	338	* @}
<>	128:9bcdf88f62b0	339	*/
<>	128:9bcdf88f62b0	340
<>	128:9bcdf88f62b0	341	/** @defgroup RTCEx_Tamper_Trigger_Definitions Tamper Trigger Definitions
<>	128:9bcdf88f62b0	342	* @{
<>	128:9bcdf88f62b0	343	*/
<>	128:9bcdf88f62b0	344	#define RTC_TAMPERTRIGGER_RISINGEDGE (0x00000000U)
<>	128:9bcdf88f62b0	345	#define RTC_TAMPERTRIGGER_FALLINGEDGE (0x00000002U)
<>	128:9bcdf88f62b0	346	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	347	#define RTC_TAMPERTRIGGER_LOWLEVEL RTC_TAMPERTRIGGER_RISINGEDGE
<>	128:9bcdf88f62b0	348	#define RTC_TAMPERTRIGGER_HIGHLEVEL RTC_TAMPERTRIGGER_FALLINGEDGE
<>	128:9bcdf88f62b0	349	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	350
<>	128:9bcdf88f62b0	351	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	352	#define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) \|\| \
<>	128:9bcdf88f62b0	353	((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE) \|\| \
<>	128:9bcdf88f62b0	354	((TRIGGER) == RTC_TAMPERTRIGGER_LOWLEVEL) \|\| \
<>	128:9bcdf88f62b0	355	((TRIGGER) == RTC_TAMPERTRIGGER_HIGHLEVEL))
<>	128:9bcdf88f62b0	356	#elif defined(STM32L100xB) \|\| defined (STM32L151xB) \|\| defined (STM32L152xB)
<>	128:9bcdf88f62b0	357	#define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) \|\| \
<>	128:9bcdf88f62b0	358	((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE))
<>	128:9bcdf88f62b0	359	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	360	/**
<>	128:9bcdf88f62b0	361	* @}
<>	128:9bcdf88f62b0	362	*/
<>	128:9bcdf88f62b0	363
<>	128:9bcdf88f62b0	364	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	365	/** @defgroup RTCEx_Tamper_Filter_Definitions Tamper Filter Definitions
<>	128:9bcdf88f62b0	366	* @{
<>	128:9bcdf88f62b0	367	*/
<>	128:9bcdf88f62b0	368	#define RTC_TAMPERFILTER_DISABLE (0x00000000U) /!< Tamper filter is disabled /
<>	128:9bcdf88f62b0	369
<>	128:9bcdf88f62b0	370	#define RTC_TAMPERFILTER_2SAMPLE (0x00000800U) /*!< Tamper is activated after 2
<>	128:9bcdf88f62b0	371	consecutive samples at the active level */
<>	128:9bcdf88f62b0	372	#define RTC_TAMPERFILTER_4SAMPLE (0x00001000U) /*!< Tamper is activated after 4
<>	128:9bcdf88f62b0	373	consecutive samples at the active level */
<>	128:9bcdf88f62b0	374	#define RTC_TAMPERFILTER_8SAMPLE (0x00001800U) /*!< Tamper is activated after 8
<>	128:9bcdf88f62b0	375	consecutive samples at the active level. */
<>	128:9bcdf88f62b0	376
<>	128:9bcdf88f62b0	377	#define IS_RTC_TAMPER_FILTER(FILTER) (((FILTER) == RTC_TAMPERFILTER_DISABLE) \|\| \
<>	128:9bcdf88f62b0	378	((FILTER) == RTC_TAMPERFILTER_2SAMPLE) \|\| \
<>	128:9bcdf88f62b0	379	((FILTER) == RTC_TAMPERFILTER_4SAMPLE) \|\| \
<>	128:9bcdf88f62b0	380	((FILTER) == RTC_TAMPERFILTER_8SAMPLE))
<>	128:9bcdf88f62b0	381	/**
<>	128:9bcdf88f62b0	382	* @}
<>	128:9bcdf88f62b0	383	*/
<>	128:9bcdf88f62b0	384
<>	128:9bcdf88f62b0	385	/** @defgroup RTCEx_Tamper_Sampling_Frequencies_Definitions Tamper Sampling Frequencies
<>	128:9bcdf88f62b0	386	* @{
<>	128:9bcdf88f62b0	387	*/
<>	128:9bcdf88f62b0	388	#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768 (0x00000000U) /*!< Each of the tamper inputs are sampled
<>	128:9bcdf88f62b0	389	with a frequency = RTCCLK / 32768 */
<>	128:9bcdf88f62b0	390	#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384 (0x00000100U) /*!< Each of the tamper inputs are sampled
<>	128:9bcdf88f62b0	391	with a frequency = RTCCLK / 16384 */
<>	128:9bcdf88f62b0	392	#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192 (0x00000200U) /*!< Each of the tamper inputs are sampled
<>	128:9bcdf88f62b0	393	with a frequency = RTCCLK / 8192 */
<>	128:9bcdf88f62b0	394	#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096 (0x00000300U) /*!< Each of the tamper inputs are sampled
<>	128:9bcdf88f62b0	395	with a frequency = RTCCLK / 4096 */
<>	128:9bcdf88f62b0	396	#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048 (0x00000400U) /*!< Each of the tamper inputs are sampled
<>	128:9bcdf88f62b0	397	with a frequency = RTCCLK / 2048 */
<>	128:9bcdf88f62b0	398	#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024 (0x00000500U) /*!< Each of the tamper inputs are sampled
<>	128:9bcdf88f62b0	399	with a frequency = RTCCLK / 1024 */
<>	128:9bcdf88f62b0	400	#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512 (0x00000600U) /*!< Each of the tamper inputs are sampled
<>	128:9bcdf88f62b0	401	with a frequency = RTCCLK / 512 */
<>	128:9bcdf88f62b0	402	#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256 (0x00000700U) /*!< Each of the tamper inputs are sampled
<>	128:9bcdf88f62b0	403	with a frequency = RTCCLK / 256 */
<>	128:9bcdf88f62b0	404
<>	128:9bcdf88f62b0	405	#define IS_RTC_TAMPER_SAMPLING_FREQ(FREQ) (((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768)\|\| \
<>	128:9bcdf88f62b0	406	((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384)\|\| \
<>	128:9bcdf88f62b0	407	((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192) \|\| \
<>	128:9bcdf88f62b0	408	((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096) \|\| \
<>	128:9bcdf88f62b0	409	((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048) \|\| \
<>	128:9bcdf88f62b0	410	((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024) \|\| \
<>	128:9bcdf88f62b0	411	((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512) \|\| \
<>	128:9bcdf88f62b0	412	((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256))
<>	128:9bcdf88f62b0	413	/**
<>	128:9bcdf88f62b0	414	* @}
<>	128:9bcdf88f62b0	415	*/
<>	128:9bcdf88f62b0	416
<>	128:9bcdf88f62b0	417	/** @defgroup RTCEx_Tamper_Pin_Precharge_Duration_Definitions Tamper Pin Precharge Duration
<>	128:9bcdf88f62b0	418	* @{
<>	128:9bcdf88f62b0	419	*/
<>	128:9bcdf88f62b0	420	#define RTC_TAMPERPRECHARGEDURATION_1RTCCLK (0x00000000U) /*!< Tamper pins are pre-charged before
<>	128:9bcdf88f62b0	421	sampling during 1 RTCCLK cycle */
<>	128:9bcdf88f62b0	422	#define RTC_TAMPERPRECHARGEDURATION_2RTCCLK (0x00002000U) /*!< Tamper pins are pre-charged before
<>	128:9bcdf88f62b0	423	sampling during 2 RTCCLK cycles */
<>	128:9bcdf88f62b0	424	#define RTC_TAMPERPRECHARGEDURATION_4RTCCLK (0x00004000U) /*!< Tamper pins are pre-charged before
<>	128:9bcdf88f62b0	425	sampling during 4 RTCCLK cycles */
<>	128:9bcdf88f62b0	426	#define RTC_TAMPERPRECHARGEDURATION_8RTCCLK (0x00006000U) /*!< Tamper pins are pre-charged before
<>	128:9bcdf88f62b0	427	sampling during 8 RTCCLK cycles */
<>	128:9bcdf88f62b0	428
<>	128:9bcdf88f62b0	429	#define IS_RTC_TAMPER_PRECHARGE_DURATION(DURATION) (((DURATION) == RTC_TAMPERPRECHARGEDURATION_1RTCCLK) \|\| \
<>	128:9bcdf88f62b0	430	((DURATION) == RTC_TAMPERPRECHARGEDURATION_2RTCCLK) \|\| \
<>	128:9bcdf88f62b0	431	((DURATION) == RTC_TAMPERPRECHARGEDURATION_4RTCCLK) \|\| \
<>	128:9bcdf88f62b0	432	((DURATION) == RTC_TAMPERPRECHARGEDURATION_8RTCCLK))
<>	128:9bcdf88f62b0	433	/**
<>	128:9bcdf88f62b0	434	* @}
<>	128:9bcdf88f62b0	435	*/
<>	128:9bcdf88f62b0	436
<>	128:9bcdf88f62b0	437	/** @defgroup RTCEx_Tamper_TimeStampOnTamperDetection_Definitions TimeStampOnTamperDetection Definitions
<>	128:9bcdf88f62b0	438	* @{
<>	128:9bcdf88f62b0	439	*/
<>	128:9bcdf88f62b0	440	#define RTC_TIMESTAMPONTAMPERDETECTION_ENABLE ((uint32_t)RTC_TAFCR_TAMPTS) /!< TimeStamp on Tamper Detection event saved /
<>	128:9bcdf88f62b0	441	#define RTC_TIMESTAMPONTAMPERDETECTION_DISABLE (0x00000000U) /!< TimeStamp on Tamper Detection event is not saved /
<>	128:9bcdf88f62b0	442
<>	128:9bcdf88f62b0	443	#define IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(DETECTION) (((DETECTION) == RTC_TIMESTAMPONTAMPERDETECTION_ENABLE) \|\| \
<>	128:9bcdf88f62b0	444	((DETECTION) == RTC_TIMESTAMPONTAMPERDETECTION_DISABLE))
<>	128:9bcdf88f62b0	445	/**
<>	128:9bcdf88f62b0	446	* @}
<>	128:9bcdf88f62b0	447	*/
<>	128:9bcdf88f62b0	448
<>	128:9bcdf88f62b0	449	/** @defgroup RTCEx_Tamper_Pull_Up_Definitions Tamper Pull-Up Definitions
<>	128:9bcdf88f62b0	450	* @{
<>	128:9bcdf88f62b0	451	*/
<>	128:9bcdf88f62b0	452	#define RTC_TAMPER_PULLUP_ENABLE (0x00000000U) /!< TimeStamp on Tamper Detection event saved /
<>	128:9bcdf88f62b0	453	#define RTC_TAMPER_PULLUP_DISABLE (RTC_TAFCR_TAMPPUDIS) /!< TimeStamp on Tamper Detection event is not saved /
<>	128:9bcdf88f62b0	454
<>	128:9bcdf88f62b0	455	#define IS_RTC_TAMPER_PULLUP_STATE(STATE) (((STATE) == RTC_TAMPER_PULLUP_ENABLE) \|\| \
<>	128:9bcdf88f62b0	456	((STATE) == RTC_TAMPER_PULLUP_DISABLE))
<>	128:9bcdf88f62b0	457	/**
<>	128:9bcdf88f62b0	458	* @}
<>	128:9bcdf88f62b0	459	*/
<>	128:9bcdf88f62b0	460	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	461
<>	128:9bcdf88f62b0	462	/** @defgroup RTCEx_Wakeup_Timer_Definitions Wakeup Timer Definitions
<>	128:9bcdf88f62b0	463	* @{
<>	128:9bcdf88f62b0	464	*/
<>	128:9bcdf88f62b0	465	#define RTC_WAKEUPCLOCK_RTCCLK_DIV16 (0x00000000U)
<>	128:9bcdf88f62b0	466	#define RTC_WAKEUPCLOCK_RTCCLK_DIV8 (0x00000001U)
<>	128:9bcdf88f62b0	467	#define RTC_WAKEUPCLOCK_RTCCLK_DIV4 (0x00000002U)
<>	128:9bcdf88f62b0	468	#define RTC_WAKEUPCLOCK_RTCCLK_DIV2 (0x00000003U)
<>	128:9bcdf88f62b0	469	#define RTC_WAKEUPCLOCK_CK_SPRE_16BITS (0x00000004U)
<>	128:9bcdf88f62b0	470	#define RTC_WAKEUPCLOCK_CK_SPRE_17BITS (0x00000006U)
<>	128:9bcdf88f62b0	471
<>	128:9bcdf88f62b0	472	#define IS_RTC_WAKEUP_CLOCK(CLOCK) (((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV16) \|\| \
<>	128:9bcdf88f62b0	473	((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV8) \|\| \
<>	128:9bcdf88f62b0	474	((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV4) \|\| \
<>	128:9bcdf88f62b0	475	((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV2) \|\| \
<>	128:9bcdf88f62b0	476	((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_16BITS) \|\| \
<>	128:9bcdf88f62b0	477	((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_17BITS))
<>	128:9bcdf88f62b0	478
<>	128:9bcdf88f62b0	479	#define IS_RTC_WAKEUP_COUNTER(COUNTER) ((COUNTER) <= 0xFFFF)
<>	128:9bcdf88f62b0	480	/**
<>	128:9bcdf88f62b0	481	* @}
<>	128:9bcdf88f62b0	482	*/
<>	128:9bcdf88f62b0	483
<>	128:9bcdf88f62b0	484	/** @defgroup RTCEx_Digital_Calibration_Definitions Digital Calibration Definitions
<>	128:9bcdf88f62b0	485	* @{
<>	128:9bcdf88f62b0	486	*/
<>	128:9bcdf88f62b0	487	#define RTC_CALIBSIGN_POSITIVE (0x00000000U)
<>	128:9bcdf88f62b0	488	#define RTC_CALIBSIGN_NEGATIVE (0x00000080U)
<>	128:9bcdf88f62b0	489
<>	128:9bcdf88f62b0	490	#define IS_RTC_CALIB_SIGN(SIGN) (((SIGN) == RTC_CALIBSIGN_POSITIVE) \|\| \
<>	128:9bcdf88f62b0	491	((SIGN) == RTC_CALIBSIGN_NEGATIVE))
<>	128:9bcdf88f62b0	492
<>	128:9bcdf88f62b0	493	#define IS_RTC_CALIB_VALUE(VALUE) ((VALUE) < 0x20)
<>	128:9bcdf88f62b0	494	/**
<>	128:9bcdf88f62b0	495	* @}
<>	128:9bcdf88f62b0	496	*/
<>	128:9bcdf88f62b0	497
<>	128:9bcdf88f62b0	498	/** @defgroup RTCEx_Smooth_Calib_Period_Definitions Smooth Calib Period Definitions
<>	128:9bcdf88f62b0	499	* @{
<>	128:9bcdf88f62b0	500	*/
<>	128:9bcdf88f62b0	501	#define RTC_SMOOTHCALIB_PERIOD_32SEC (0x00000000U) /*!< If RTCCLK = 32768 Hz, Smooth calibation
<>	128:9bcdf88f62b0	502	period is 32s, else 2exp20 RTCCLK seconds */
<>	128:9bcdf88f62b0	503	#define RTC_SMOOTHCALIB_PERIOD_16SEC (0x00002000U) /*!< If RTCCLK = 32768 Hz, Smooth calibation
<>	128:9bcdf88f62b0	504	period is 16s, else 2exp19 RTCCLK seconds */
<>	128:9bcdf88f62b0	505	#define RTC_SMOOTHCALIB_PERIOD_8SEC (0x00004000U) /*!< If RTCCLK = 32768 Hz, Smooth calibation
<>	128:9bcdf88f62b0	506	period is 8s, else 2exp18 RTCCLK seconds */
<>	128:9bcdf88f62b0	507
<>	128:9bcdf88f62b0	508	#define IS_RTC_SMOOTH_CALIB_PERIOD(PERIOD) (((PERIOD) == RTC_SMOOTHCALIB_PERIOD_32SEC) \|\| \
<>	128:9bcdf88f62b0	509	((PERIOD) == RTC_SMOOTHCALIB_PERIOD_16SEC) \|\| \
<>	128:9bcdf88f62b0	510	((PERIOD) == RTC_SMOOTHCALIB_PERIOD_8SEC))
<>	128:9bcdf88f62b0	511	/**
<>	128:9bcdf88f62b0	512	* @}
<>	128:9bcdf88f62b0	513	*/
<>	128:9bcdf88f62b0	514
<>	128:9bcdf88f62b0	515	/** @defgroup RTCEx_Smooth_Calib_Plus_Pulses_Definitions Smooth Calib Plus Pulses Definitions
<>	128:9bcdf88f62b0	516	* @{
<>	128:9bcdf88f62b0	517	*/
<>	128:9bcdf88f62b0	518	#define RTC_SMOOTHCALIB_PLUSPULSES_SET (0x00008000U) /*!< The number of RTCCLK pulses added
<>	128:9bcdf88f62b0	519	during a X -second window = Y - CALM[8:0]
<>	128:9bcdf88f62b0	520	with Y = 512, 256, 128 when X = 32, 16, 8 */
<>	128:9bcdf88f62b0	521	#define RTC_SMOOTHCALIB_PLUSPULSES_RESET (0x00000000U) /*!< The number of RTCCLK pulses subbstited
<>	128:9bcdf88f62b0	522	during a 32-second window = CALM[8:0] */
<>	128:9bcdf88f62b0	523
<>	128:9bcdf88f62b0	524	#define IS_RTC_SMOOTH_CALIB_PLUS(PLUS) (((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_SET) \|\| \
<>	128:9bcdf88f62b0	525	((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_RESET))
<>	128:9bcdf88f62b0	526	/**
<>	128:9bcdf88f62b0	527	* @}
<>	128:9bcdf88f62b0	528	*/
<>	128:9bcdf88f62b0	529
<>	128:9bcdf88f62b0	530	/** @defgroup RTCEx_Smooth_Calib_Minus_Pulses_Definitions Smooth Calib Minus Pulses Definitions
<>	128:9bcdf88f62b0	531	* @{
<>	128:9bcdf88f62b0	532	*/
<>	128:9bcdf88f62b0	533	#define IS_RTC_SMOOTH_CALIB_MINUS(VALUE) ((VALUE) <= 0x000001FFU)
<>	128:9bcdf88f62b0	534	/**
<>	128:9bcdf88f62b0	535	* @}
<>	128:9bcdf88f62b0	536	*/
<>	128:9bcdf88f62b0	537
<>	128:9bcdf88f62b0	538	/** @defgroup RTCEx_Add_1_Second_Parameter_Definitions Add 1 Second Parameter Definitions
<>	128:9bcdf88f62b0	539	* @{
<>	128:9bcdf88f62b0	540	*/
<>	128:9bcdf88f62b0	541	#define RTC_SHIFTADD1S_RESET (0x00000000U)
<>	128:9bcdf88f62b0	542	#define RTC_SHIFTADD1S_SET (0x80000000U)
<>	128:9bcdf88f62b0	543
<>	128:9bcdf88f62b0	544	#define IS_RTC_SHIFT_ADD1S(SEL) (((SEL) == RTC_SHIFTADD1S_RESET) \|\| \
<>	128:9bcdf88f62b0	545	((SEL) == RTC_SHIFTADD1S_SET))
<>	128:9bcdf88f62b0	546	/**
<>	128:9bcdf88f62b0	547	* @}
<>	128:9bcdf88f62b0	548	*/
<>	128:9bcdf88f62b0	549
<>	128:9bcdf88f62b0	550	/** @defgroup RTCEx_Substract_Fraction_Of_Second_Value Substract Fraction Of Second Value
<>	128:9bcdf88f62b0	551	* @{
<>	128:9bcdf88f62b0	552	*/
<>	128:9bcdf88f62b0	553	#define IS_RTC_SHIFT_SUBFS(FS) ((FS) <= 0x00007FFFU)
<>	128:9bcdf88f62b0	554	/**
<>	128:9bcdf88f62b0	555	* @}
<>	128:9bcdf88f62b0	556	*/
<>	128:9bcdf88f62b0	557
<>	128:9bcdf88f62b0	558	/** @defgroup RTCEx_Calib_Output_Selection_Definitions Calib Output Selection Definitions
<>	128:9bcdf88f62b0	559	* @{
<>	128:9bcdf88f62b0	560	*/
<>	128:9bcdf88f62b0	561	#define RTC_CALIBOUTPUT_512HZ (0x00000000U)
<>	128:9bcdf88f62b0	562	#define RTC_CALIBOUTPUT_1HZ (0x00080000U)
<>	128:9bcdf88f62b0	563
<>	128:9bcdf88f62b0	564	#define IS_RTC_CALIB_OUTPUT(OUTPUT) (((OUTPUT) == RTC_CALIBOUTPUT_512HZ) \|\| \
<>	128:9bcdf88f62b0	565	((OUTPUT) == RTC_CALIBOUTPUT_1HZ))
<>	128:9bcdf88f62b0	566	/**
<>	128:9bcdf88f62b0	567	* @}
<>	128:9bcdf88f62b0	568	*/
<>	128:9bcdf88f62b0	569
<>	128:9bcdf88f62b0	570	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	571	/** @defgroup RTC_Alarm_Sub_Seconds_Value Alarm Sub Seconds Value
<>	128:9bcdf88f62b0	572	* @{
<>	128:9bcdf88f62b0	573	*/
<>	128:9bcdf88f62b0	574	#define IS_RTC_ALARM_SUB_SECOND_VALUE(VALUE) ((VALUE) <= 0x00007FFFU)
<>	128:9bcdf88f62b0	575	/**
<>	128:9bcdf88f62b0	576	* @}
<>	128:9bcdf88f62b0	577	*/
<>	128:9bcdf88f62b0	578
<>	128:9bcdf88f62b0	579	/** @defgroup RTC_Alarm_Sub_Seconds_Masks_Definitions Alarm Sub Seconds Masks Definitions
<>	128:9bcdf88f62b0	580	* @{
<>	128:9bcdf88f62b0	581	*/
<>	128:9bcdf88f62b0	582	#define RTC_ALARMSUBSECONDMASK_ALL (0x00000000U) /*!< All Alarm SS fields are masked.
<>	128:9bcdf88f62b0	583	There is no comparison on sub seconds
<>	128:9bcdf88f62b0	584	for Alarm */
<>	128:9bcdf88f62b0	585	#define RTC_ALARMSUBSECONDMASK_SS14_1 (0x01000000U) /*!< SS[14:1] are don't care in Alarm
<>	128:9bcdf88f62b0	586	comparison. Only SS[0] is compared. */
<>	128:9bcdf88f62b0	587	#define RTC_ALARMSUBSECONDMASK_SS14_2 (0x02000000U) /*!< SS[14:2] are don't care in Alarm
<>	128:9bcdf88f62b0	588	comparison. Only SS[1:0] are compared */
<>	128:9bcdf88f62b0	589	#define RTC_ALARMSUBSECONDMASK_SS14_3 (0x03000000U) /*!< SS[14:3] are don't care in Alarm
<>	128:9bcdf88f62b0	590	comparison. Only SS[2:0] are compared */
<>	128:9bcdf88f62b0	591	#define RTC_ALARMSUBSECONDMASK_SS14_4 (0x04000000U) /*!< SS[14:4] are don't care in Alarm
<>	128:9bcdf88f62b0	592	comparison. Only SS[3:0] are compared */
<>	128:9bcdf88f62b0	593	#define RTC_ALARMSUBSECONDMASK_SS14_5 (0x05000000U) /*!< SS[14:5] are don't care in Alarm
<>	128:9bcdf88f62b0	594	comparison. Only SS[4:0] are compared */
<>	128:9bcdf88f62b0	595	#define RTC_ALARMSUBSECONDMASK_SS14_6 (0x06000000U) /*!< SS[14:6] are don't care in Alarm
<>	128:9bcdf88f62b0	596	comparison. Only SS[5:0] are compared */
<>	128:9bcdf88f62b0	597	#define RTC_ALARMSUBSECONDMASK_SS14_7 (0x07000000U) /*!< SS[14:7] are don't care in Alarm
<>	128:9bcdf88f62b0	598	comparison. Only SS[6:0] are compared */
<>	128:9bcdf88f62b0	599	#define RTC_ALARMSUBSECONDMASK_SS14_8 (0x08000000U) /*!< SS[14:8] are don't care in Alarm
<>	128:9bcdf88f62b0	600	comparison. Only SS[7:0] are compared */
<>	128:9bcdf88f62b0	601	#define RTC_ALARMSUBSECONDMASK_SS14_9 (0x09000000U) /*!< SS[14:9] are don't care in Alarm
<>	128:9bcdf88f62b0	602	comparison. Only SS[8:0] are compared */
<>	128:9bcdf88f62b0	603	#define RTC_ALARMSUBSECONDMASK_SS14_10 (0x0A000000U) /*!< SS[14:10] are don't care in Alarm
<>	128:9bcdf88f62b0	604	comparison. Only SS[9:0] are compared */
<>	128:9bcdf88f62b0	605	#define RTC_ALARMSUBSECONDMASK_SS14_11 (0x0B000000U) /*!< SS[14:11] are don't care in Alarm
<>	128:9bcdf88f62b0	606	comparison. Only SS[10:0] are compared */
<>	128:9bcdf88f62b0	607	#define RTC_ALARMSUBSECONDMASK_SS14_12 (0x0C000000U) /*!< SS[14:12] are don't care in Alarm
<>	128:9bcdf88f62b0	608	comparison.Only SS[11:0] are compared */
<>	128:9bcdf88f62b0	609	#define RTC_ALARMSUBSECONDMASK_SS14_13 (0x0D000000U) /*!< SS[14:13] are don't care in Alarm
<>	128:9bcdf88f62b0	610	comparison. Only SS[12:0] are compared */
<>	128:9bcdf88f62b0	611	#define RTC_ALARMSUBSECONDMASK_SS14 (0x0E000000U) /*!< SS[14] is don't care in Alarm
<>	128:9bcdf88f62b0	612	comparison.Only SS[13:0] are compared */
<>	128:9bcdf88f62b0	613	#define RTC_ALARMSUBSECONDMASK_NONE (0x0F000000U) /*!< SS[14:0] are compared and must match
<>	128:9bcdf88f62b0	614	to activate alarm. */
<>	128:9bcdf88f62b0	615
<>	128:9bcdf88f62b0	616	#define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == RTC_ALARMSUBSECONDMASK_ALL) \|\| \
<>	128:9bcdf88f62b0	617	((MASK) == RTC_ALARMSUBSECONDMASK_SS14_1) \|\| \
<>	128:9bcdf88f62b0	618	((MASK) == RTC_ALARMSUBSECONDMASK_SS14_2) \|\| \
<>	128:9bcdf88f62b0	619	((MASK) == RTC_ALARMSUBSECONDMASK_SS14_3) \|\| \
<>	128:9bcdf88f62b0	620	((MASK) == RTC_ALARMSUBSECONDMASK_SS14_4) \|\| \
<>	128:9bcdf88f62b0	621	((MASK) == RTC_ALARMSUBSECONDMASK_SS14_5) \|\| \
<>	128:9bcdf88f62b0	622	((MASK) == RTC_ALARMSUBSECONDMASK_SS14_6) \|\| \
<>	128:9bcdf88f62b0	623	((MASK) == RTC_ALARMSUBSECONDMASK_SS14_7) \|\| \
<>	128:9bcdf88f62b0	624	((MASK) == RTC_ALARMSUBSECONDMASK_SS14_8) \|\| \
<>	128:9bcdf88f62b0	625	((MASK) == RTC_ALARMSUBSECONDMASK_SS14_9) \|\| \
<>	128:9bcdf88f62b0	626	((MASK) == RTC_ALARMSUBSECONDMASK_SS14_10) \|\| \
<>	128:9bcdf88f62b0	627	((MASK) == RTC_ALARMSUBSECONDMASK_SS14_11) \|\| \
<>	128:9bcdf88f62b0	628	((MASK) == RTC_ALARMSUBSECONDMASK_SS14_12) \|\| \
<>	128:9bcdf88f62b0	629	((MASK) == RTC_ALARMSUBSECONDMASK_SS14_13) \|\| \
<>	128:9bcdf88f62b0	630	((MASK) == RTC_ALARMSUBSECONDMASK_SS14) \|\| \
<>	128:9bcdf88f62b0	631	((MASK) == RTC_ALARMSUBSECONDMASK_NONE))
<>	128:9bcdf88f62b0	632	/**
<>	128:9bcdf88f62b0	633	* @}
<>	128:9bcdf88f62b0	634	*/
<>	128:9bcdf88f62b0	635	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	636
<>	128:9bcdf88f62b0	637	/**
<>	128:9bcdf88f62b0	638	* @}
<>	128:9bcdf88f62b0	639	*/
<>	128:9bcdf88f62b0	640
<>	128:9bcdf88f62b0	641	/* Exported macro ------------------------------------------------------------*/
<>	128:9bcdf88f62b0	642	/** @defgroup RTCEx_Exported_Macros RTCEx Exported Macros
<>	128:9bcdf88f62b0	643	* @{
<>	128:9bcdf88f62b0	644	*/
<>	128:9bcdf88f62b0	645
<>	128:9bcdf88f62b0	646	/**
<>	128:9bcdf88f62b0	647	* @brief Enable the RTC WakeUp Timer peripheral.
<>	128:9bcdf88f62b0	648	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	649	* @retval None
<>	128:9bcdf88f62b0	650	*/
<>	128:9bcdf88f62b0	651	#define __HAL_RTC_WAKEUPTIMER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR \|= (RTC_CR_WUTE))
<>	128:9bcdf88f62b0	652
<>	128:9bcdf88f62b0	653	/**
<>	128:9bcdf88f62b0	654	* @brief Enable the RTC TimeStamp peripheral.
<>	128:9bcdf88f62b0	655	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	656	* @retval None
<>	128:9bcdf88f62b0	657	*/
<>	128:9bcdf88f62b0	658	#define __HAL_RTC_TIMESTAMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR \|= (RTC_CR_TSE))
<>	128:9bcdf88f62b0	659
<>	128:9bcdf88f62b0	660	/**
<>	128:9bcdf88f62b0	661	* @brief Disable the RTC WakeUp Timer peripheral.
<>	128:9bcdf88f62b0	662	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	663	* @retval None
<>	128:9bcdf88f62b0	664	*/
<>	128:9bcdf88f62b0	665	#define __HAL_RTC_WAKEUPTIMER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_WUTE))
<>	128:9bcdf88f62b0	666
<>	128:9bcdf88f62b0	667	/**
<>	128:9bcdf88f62b0	668	* @brief Disable the RTC TimeStamp peripheral.
<>	128:9bcdf88f62b0	669	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	670	* @retval None
<>	128:9bcdf88f62b0	671	*/
<>	128:9bcdf88f62b0	672	#define __HAL_RTC_TIMESTAMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TSE))
<>	128:9bcdf88f62b0	673
<>	128:9bcdf88f62b0	674	/**
<>	128:9bcdf88f62b0	675	* @brief Enable the Coarse calibration process.
<>	128:9bcdf88f62b0	676	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	677	* @retval None
<>	128:9bcdf88f62b0	678	*/
<>	128:9bcdf88f62b0	679	#define __HAL_RTC_COARSE_CALIB_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR \|= (RTC_CR_DCE))
<>	128:9bcdf88f62b0	680
<>	128:9bcdf88f62b0	681	/**
<>	128:9bcdf88f62b0	682	* @brief Disable the Coarse calibration process.
<>	128:9bcdf88f62b0	683	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	684	* @retval None
<>	128:9bcdf88f62b0	685	*/
<>	128:9bcdf88f62b0	686	#define __HAL_RTC_COARSE_CALIB_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_DCE))
<>	128:9bcdf88f62b0	687
<>	128:9bcdf88f62b0	688	/**
<>	128:9bcdf88f62b0	689	* @brief Enable the RTC calibration output.
<>	128:9bcdf88f62b0	690	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	691	* @retval None
<>	128:9bcdf88f62b0	692	*/
<>	128:9bcdf88f62b0	693	#define __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR \|= (RTC_CR_COE))
<>	128:9bcdf88f62b0	694
<>	128:9bcdf88f62b0	695	/**
<>	128:9bcdf88f62b0	696	* @brief Disable the calibration output.
<>	128:9bcdf88f62b0	697	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	698	* @retval None
<>	128:9bcdf88f62b0	699	*/
<>	128:9bcdf88f62b0	700	#define __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_COE))
<>	128:9bcdf88f62b0	701
<>	128:9bcdf88f62b0	702	/**
<>	128:9bcdf88f62b0	703	* @brief Enable the clock reference detection.
<>	128:9bcdf88f62b0	704	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	705	* @retval None
<>	128:9bcdf88f62b0	706	*/
<>	128:9bcdf88f62b0	707	#define __HAL_RTC_CLOCKREF_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR \|= (RTC_CR_REFCKON))
<>	128:9bcdf88f62b0	708
<>	128:9bcdf88f62b0	709	/**
<>	128:9bcdf88f62b0	710	* @brief Disable the clock reference detection.
<>	128:9bcdf88f62b0	711	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	712	* @retval None
<>	128:9bcdf88f62b0	713	*/
<>	128:9bcdf88f62b0	714	#define __HAL_RTC_CLOCKREF_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_REFCKON))
<>	128:9bcdf88f62b0	715
<>	128:9bcdf88f62b0	716	/**
<>	128:9bcdf88f62b0	717	* @brief Enable the RTC TimeStamp interrupt.
<>	128:9bcdf88f62b0	718	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	719	* @param __INTERRUPT__: specifies the RTC TimeStamp interrupt sources to be enabled or disabled.
<>	128:9bcdf88f62b0	720	* This parameter can be:
<>	128:9bcdf88f62b0	721	* @arg RTC_IT_TS: TimeStamp interrupt
<>	128:9bcdf88f62b0	722	* @retval None
<>	128:9bcdf88f62b0	723	*/
<>	128:9bcdf88f62b0	724	#define __HAL_RTC_TIMESTAMP_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR \|= (__INTERRUPT__))
<>	128:9bcdf88f62b0	725
<>	128:9bcdf88f62b0	726	/**
<>	128:9bcdf88f62b0	727	* @brief Enable the RTC WakeUpTimer interrupt.
<>	128:9bcdf88f62b0	728	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	729	* @param __INTERRUPT__: specifies the RTC WakeUpTimer interrupt sources to be enabled or disabled.
<>	128:9bcdf88f62b0	730	* This parameter can be:
<>	128:9bcdf88f62b0	731	* @arg RTC_IT_WUT: WakeUpTimer A interrupt
<>	128:9bcdf88f62b0	732	* @retval None
<>	128:9bcdf88f62b0	733	*/
<>	128:9bcdf88f62b0	734	#define __HAL_RTC_WAKEUPTIMER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR \|= (__INTERRUPT__))
<>	128:9bcdf88f62b0	735
<>	128:9bcdf88f62b0	736	/**
<>	128:9bcdf88f62b0	737	* @brief Disable the RTC TimeStamp interrupt.
<>	128:9bcdf88f62b0	738	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	739	* @param __INTERRUPT__: specifies the RTC TimeStamp interrupt sources to be enabled or disabled.
<>	128:9bcdf88f62b0	740	* This parameter can be:
<>	128:9bcdf88f62b0	741	* @arg RTC_IT_TS: TimeStamp interrupt
<>	128:9bcdf88f62b0	742	* @retval None
<>	128:9bcdf88f62b0	743	*/
<>	128:9bcdf88f62b0	744	#define __HAL_RTC_TIMESTAMP_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
<>	128:9bcdf88f62b0	745
<>	128:9bcdf88f62b0	746	/**
<>	128:9bcdf88f62b0	747	* @brief Disable the RTC WakeUpTimer interrupt.
<>	128:9bcdf88f62b0	748	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	749	* @param __INTERRUPT__: specifies the RTC WakeUpTimer interrupt sources to be enabled or disabled.
<>	128:9bcdf88f62b0	750	* This parameter can be:
<>	128:9bcdf88f62b0	751	* @arg RTC_IT_WUT: WakeUpTimer A interrupt
<>	128:9bcdf88f62b0	752	* @retval None
<>	128:9bcdf88f62b0	753	*/
<>	128:9bcdf88f62b0	754	#define __HAL_RTC_WAKEUPTIMER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
<>	128:9bcdf88f62b0	755
<>	128:9bcdf88f62b0	756	/**
<>	128:9bcdf88f62b0	757	* @brief Enable the RTC Tamper1 input detection.
<>	128:9bcdf88f62b0	758	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	759	* @retval None
<>	128:9bcdf88f62b0	760	*/
<>	128:9bcdf88f62b0	761	#define __HAL_RTC_TAMPER1_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP1E)
<>	128:9bcdf88f62b0	762
<>	128:9bcdf88f62b0	763	/**
<>	128:9bcdf88f62b0	764	* @brief Disable the RTC Tamper1 input detection.
<>	128:9bcdf88f62b0	765	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	766	* @retval None
<>	128:9bcdf88f62b0	767	*/
<>	128:9bcdf88f62b0	768	#define __HAL_RTC_TAMPER1_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP1E)
<>	128:9bcdf88f62b0	769
<>	128:9bcdf88f62b0	770	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC)\
<>	128:9bcdf88f62b0	771	\|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA)\
<>	128:9bcdf88f62b0	772	\|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA)\
<>	128:9bcdf88f62b0	773	\|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	774	/**
<>	128:9bcdf88f62b0	775	* @brief Enable the RTC Tamper2 input detection.
<>	128:9bcdf88f62b0	776	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	777	* @retval None
<>	128:9bcdf88f62b0	778	*/
<>	128:9bcdf88f62b0	779	#define __HAL_RTC_TAMPER2_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP2E)
<>	128:9bcdf88f62b0	780
<>	128:9bcdf88f62b0	781	/**
<>	128:9bcdf88f62b0	782	* @brief Disable the RTC Tamper2 input detection.
<>	128:9bcdf88f62b0	783	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	784	* @retval None
<>	128:9bcdf88f62b0	785	*/
<>	128:9bcdf88f62b0	786	#define __HAL_RTC_TAMPER2_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP2E)
<>	128:9bcdf88f62b0	787
<>	128:9bcdf88f62b0	788	/**
<>	128:9bcdf88f62b0	789	* @brief Enable the RTC Tamper3 input detection.
<>	128:9bcdf88f62b0	790	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	791	* @retval None
<>	128:9bcdf88f62b0	792	*/
<>	128:9bcdf88f62b0	793	#define __HAL_RTC_TAMPER3_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP3E)
<>	128:9bcdf88f62b0	794
<>	128:9bcdf88f62b0	795	/**
<>	128:9bcdf88f62b0	796	* @brief Disable the RTC Tamper3 input detection.
<>	128:9bcdf88f62b0	797	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	798	* @retval None
<>	128:9bcdf88f62b0	799	*/
<>	128:9bcdf88f62b0	800	#define __HAL_RTC_TAMPER3_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP3E)
<>	128:9bcdf88f62b0	801
<>	128:9bcdf88f62b0	802
<>	128:9bcdf88f62b0	803	/**
<>	128:9bcdf88f62b0	804	* @brief Check whether the specified RTC Tamper interrupt has occurred or not.
<>	128:9bcdf88f62b0	805	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	806	* @param __INTERRUPT__: specifies the RTC Tamper interrupt to check.
<>	128:9bcdf88f62b0	807	* This parameter can be:
<>	128:9bcdf88f62b0	808	* @arg RTC_IT_TAMP1: Tamper1 interrupt
<>	128:9bcdf88f62b0	809	* @arg RTC_IT_TAMP2: Tamper2 interrupt
<>	128:9bcdf88f62b0	810	* @arg RTC_IT_TAMP3: Tamper3 interrupt
<>	128:9bcdf88f62b0	811	* @retval None
<>	128:9bcdf88f62b0	812	*/
<>	128:9bcdf88f62b0	813	#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) == RTC_IT_TAMP1) ? (((((__HANDLE__)->Instance->ISR) & RTC_ISR_TAMP1F) != RESET) ? SET : RESET) : \
<>	128:9bcdf88f62b0	814	((__INTERRUPT__) == RTC_IT_TAMP2) ? (((((__HANDLE__)->Instance->ISR) & RTC_ISR_TAMP2F) != RESET) ? SET : RESET) : \
<>	128:9bcdf88f62b0	815	(((((__HANDLE__)->Instance->ISR) & RTC_ISR_TAMP3F) != RESET) ? SET : RESET))
<>	128:9bcdf88f62b0	816	#else
<>	128:9bcdf88f62b0	817	/**
<>	128:9bcdf88f62b0	818	* @brief Check whether the specified RTC Tamper interrupt has occurred or not.
<>	128:9bcdf88f62b0	819	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	820	* @param __INTERRUPT__: specifies the RTC Tamper interrupt to check.
<>	128:9bcdf88f62b0	821	* This parameter can be:
<>	128:9bcdf88f62b0	822	* @arg RTC_IT_TAMP1: Tamper1 interrupt
<>	128:9bcdf88f62b0	823	* @retval None
<>	128:9bcdf88f62b0	824	*/
<>	128:9bcdf88f62b0	825	#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & RTC_ISR_TAMP1F) != RESET) ? SET : RESET)
<>	128:9bcdf88f62b0	826
<>	128:9bcdf88f62b0	827	#endif
<>	128:9bcdf88f62b0	828
<>	128:9bcdf88f62b0	829	/**
<>	128:9bcdf88f62b0	830	* @brief Enable the RTC Tamper interrupt.
<>	128:9bcdf88f62b0	831	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	832	* @param __INTERRUPT__: specifies the RTC Tamper interrupt sources to be enabled
<>	128:9bcdf88f62b0	833	* This parameter can be any combination of the following values:
<>	128:9bcdf88f62b0	834	* @arg RTC_IT_TAMP1: Tamper1 interrupt
<>	128:9bcdf88f62b0	835	* @arg RTC_IT_TAMP2: Tamper2 interrupt (*)
<>	128:9bcdf88f62b0	836	* @arg RTC_IT_TAMP3: Tamper3 interrupt (*)
<>	128:9bcdf88f62b0	837	* @note (*) Available only on devices STM32L100xBA, STM32L151xBA, STM32L152xBA, STM32L100xC,
<>	128:9bcdf88f62b0	838	* STM32L151xC, STM32L152xC, STM32L162xC, STM32L151xCA, STM32L151xD, STM32L152xCA,
<>	128:9bcdf88f62b0	839	* STM32L152xD, STM32L162xCA, STM32L162xD, STM32L151xE, STM32L152xE, STM32L162xE
<>	128:9bcdf88f62b0	840	* STM32L151xDX, STM32L152xDX, STM32L162xDX
<>	128:9bcdf88f62b0	841	* @retval None
<>	128:9bcdf88f62b0	842	*/
<>	128:9bcdf88f62b0	843	#define __HAL_RTC_TAMPER_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT(((__HANDLE__)->Instance->TAFCR), RTC_TAFCR_TAMPIE)
<>	128:9bcdf88f62b0	844
<>	128:9bcdf88f62b0	845	/**
<>	128:9bcdf88f62b0	846	* @brief Disable the RTC Tamper interrupt.
<>	128:9bcdf88f62b0	847	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	848	* @param __INTERRUPT__: specifies the RTC Tamper interrupt sources to be disabled.
<>	128:9bcdf88f62b0	849	* This parameter can be any combination of the following values:
<>	128:9bcdf88f62b0	850	* @arg RTC_IT_TAMP1: Tamper1 interrupt
<>	128:9bcdf88f62b0	851	* @arg RTC_IT_TAMP2: Tamper2 interrupt (*)
<>	128:9bcdf88f62b0	852	* @arg RTC_IT_TAMP3: Tamper3 interrupt (*)
<>	128:9bcdf88f62b0	853	* @note (*) Available only on devices STM32L100xBA, STM32L151xBA, STM32L152xBA, STM32L100xC,
<>	128:9bcdf88f62b0	854	* STM32L151xC, STM32L152xC, STM32L162xC, STM32L151xCA, STM32L151xD, STM32L152xCA,
<>	128:9bcdf88f62b0	855	* STM32L152xD, STM32L162xCA, STM32L162xD, STM32L151xE, STM32L152xE, STM32L162xE
<>	128:9bcdf88f62b0	856	* STM32L151xDX, STM32L152xDX, STM32L162xDX
<>	128:9bcdf88f62b0	857	* @retval None
<>	128:9bcdf88f62b0	858	*/
<>	128:9bcdf88f62b0	859	#define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT(((__HANDLE__)->Instance->TAFCR), RTC_TAFCR_TAMPIE)
<>	128:9bcdf88f62b0	860
<>	128:9bcdf88f62b0	861	/**
<>	128:9bcdf88f62b0	862	* @brief Check whether the specified RTC Tamper interrupt has been enabled or not.
<>	128:9bcdf88f62b0	863	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	864	* @param __INTERRUPT__: specifies the RTC Tamper interrupt source to check.
<>	128:9bcdf88f62b0	865	* This parameter can be:
<>	128:9bcdf88f62b0	866	* @arg RTC_IT_TAMP1: Tamper1 interrupt
<>	128:9bcdf88f62b0	867	* @arg RTC_IT_TAMP2: Tamper2 interrupt (*)
<>	128:9bcdf88f62b0	868	* @arg RTC_IT_TAMP3: Tamper3 interrupt (*)
<>	128:9bcdf88f62b0	869	* @note (*) Available only on devices STM32L100xBA, STM32L151xBA, STM32L152xBA, STM32L100xC,
<>	128:9bcdf88f62b0	870	* STM32L151xC, STM32L152xC, STM32L162xC, STM32L151xCA, STM32L151xD, STM32L152xCA,
<>	128:9bcdf88f62b0	871	* STM32L152xD, STM32L162xCA, STM32L162xD, STM32L151xE, STM32L152xE, STM32L162xE
<>	128:9bcdf88f62b0	872	* STM32L151xDX, STM32L152xDX, STM32L162xDX
<>	128:9bcdf88f62b0	873	* @retval None
<>	128:9bcdf88f62b0	874	*/
<>	128:9bcdf88f62b0	875	#define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->TAFCR) & RTC_TAFCR_TAMPIE) != RESET) ? SET : RESET)
<>	128:9bcdf88f62b0	876
<>	128:9bcdf88f62b0	877	/**
<>	128:9bcdf88f62b0	878	* @brief Check whether the specified RTC WakeUpTimer interrupt has occurred or not.
<>	128:9bcdf88f62b0	879	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	880	* @param __FLAG__: specifies the RTC WakeUpTimer interrupt sources to be enabled or disabled.
<>	128:9bcdf88f62b0	881	* This parameter can be:
<>	128:9bcdf88f62b0	882	* @arg RTC_IT_WUT: WakeUpTimer A interrupt
<>	128:9bcdf88f62b0	883	* @retval None
<>	128:9bcdf88f62b0	884	*/
<>	128:9bcdf88f62b0	885	#define __HAL_RTC_WAKEUPTIMER_GET_IT(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__)>> 4)) != RESET)? SET : RESET)
<>	128:9bcdf88f62b0	886
<>	128:9bcdf88f62b0	887	/**
<>	128:9bcdf88f62b0	888	* @brief Check whether the specified RTC Wake Up timer interrupt has been enabled or not.
<>	128:9bcdf88f62b0	889	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	890	* @param __INTERRUPT__: specifies the RTC Wake Up timer interrupt sources to check.
<>	128:9bcdf88f62b0	891	* This parameter can be:
<>	128:9bcdf88f62b0	892	* @arg RTC_IT_WUT: WakeUpTimer interrupt
<>	128:9bcdf88f62b0	893	* @retval None
<>	128:9bcdf88f62b0	894	*/
<>	128:9bcdf88f62b0	895	#define __HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
<>	128:9bcdf88f62b0	896
<>	128:9bcdf88f62b0	897	/**
<>	128:9bcdf88f62b0	898	* @brief Check whether the specified RTC TimeStamp interrupt has occurred or not.
<>	128:9bcdf88f62b0	899	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	900	* @param __INTERRUPT__: specifies the RTC TimeStamp interrupt sources to be enabled or disabled.
<>	128:9bcdf88f62b0	901	* This parameter can be:
<>	128:9bcdf88f62b0	902	* @arg RTC_IT_TS: TimeStamp interrupt
<>	128:9bcdf88f62b0	903	* @retval None
<>	128:9bcdf88f62b0	904	*/
<>	128:9bcdf88f62b0	905	#define __HAL_RTC_TIMESTAMP_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 4)) != RESET)? SET : RESET)
<>	128:9bcdf88f62b0	906
<>	128:9bcdf88f62b0	907	/**
<>	128:9bcdf88f62b0	908	* @brief Check whether the specified RTC Time Stamp interrupt has been enabled or not.
<>	128:9bcdf88f62b0	909	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	910	* @param __INTERRUPT__: specifies the RTC Time Stamp interrupt source to check.
<>	128:9bcdf88f62b0	911	* This parameter can be:
<>	128:9bcdf88f62b0	912	* @arg RTC_IT_TS: TimeStamp interrupt
<>	128:9bcdf88f62b0	913	* @retval None
<>	128:9bcdf88f62b0	914	*/
<>	128:9bcdf88f62b0	915	#define __HAL_RTC_TIMESTAMP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
<>	128:9bcdf88f62b0	916
<>	128:9bcdf88f62b0	917	/**
<>	128:9bcdf88f62b0	918	* @brief Get the selected RTC TimeStamp's flag status.
<>	128:9bcdf88f62b0	919	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	920	* @param __FLAG__: specifies the RTC TimeStamp Flag sources to be enabled or disabled.
<>	128:9bcdf88f62b0	921	* This parameter can be:
<>	128:9bcdf88f62b0	922	* @arg RTC_FLAG_TSF
<>	128:9bcdf88f62b0	923	* @arg RTC_FLAG_TSOVF
<>	128:9bcdf88f62b0	924	* @retval None
<>	128:9bcdf88f62b0	925	*/
<>	128:9bcdf88f62b0	926	#define __HAL_RTC_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
<>	128:9bcdf88f62b0	927
<>	128:9bcdf88f62b0	928	/**
<>	128:9bcdf88f62b0	929	* @brief Get the selected RTC WakeUpTimer's flag status.
<>	128:9bcdf88f62b0	930	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	931	* @param __FLAG__: specifies the RTC WakeUpTimer Flag sources to be enabled or disabled.
<>	128:9bcdf88f62b0	932	* This parameter can be:
<>	128:9bcdf88f62b0	933	* @arg RTC_FLAG_WUTF
<>	128:9bcdf88f62b0	934	* @arg RTC_FLAG_WUTWF
<>	128:9bcdf88f62b0	935	* @retval None
<>	128:9bcdf88f62b0	936	*/
<>	128:9bcdf88f62b0	937	#define __HAL_RTC_WAKEUPTIMER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
<>	128:9bcdf88f62b0	938
<>	128:9bcdf88f62b0	939	/**
<>	128:9bcdf88f62b0	940	* @brief Get the selected RTC Tamper's flag status.
<>	128:9bcdf88f62b0	941	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	942	* @param __FLAG__: specifies the RTC Tamper Flag sources to be enabled or disabled.
<>	128:9bcdf88f62b0	943	* This parameter can be:
<>	128:9bcdf88f62b0	944	* @arg RTC_FLAG_TAMP1F
<>	128:9bcdf88f62b0	945	* @arg RTC_FLAG_TAMP2F (*)
<>	128:9bcdf88f62b0	946	* @arg RTC_FLAG_TAMP3F (*)
<>	128:9bcdf88f62b0	947	* @note (*) Available only on devices STM32L100xBA, STM32L151xBA, STM32L152xBA, STM32L100xC,
<>	128:9bcdf88f62b0	948	* STM32L151xC, STM32L152xC, STM32L162xC, STM32L151xCA, STM32L151xD, STM32L152xCA,
<>	128:9bcdf88f62b0	949	* STM32L152xD, STM32L162xCA, STM32L162xD, STM32L151xE, STM32L152xE, STM32L162xE
<>	128:9bcdf88f62b0	950	* STM32L151xDX, STM32L152xDX, STM32L162xDX
<>	128:9bcdf88f62b0	951	* @retval None
<>	128:9bcdf88f62b0	952	*/
<>	128:9bcdf88f62b0	953	#define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
<>	128:9bcdf88f62b0	954
<>	128:9bcdf88f62b0	955	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC)\
<>	128:9bcdf88f62b0	956	\|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA)\
<>	128:9bcdf88f62b0	957	\|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA)\
<>	128:9bcdf88f62b0	958	\|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	959	/**
<>	128:9bcdf88f62b0	960	* @brief Get the selected RTC shift operation's flag status.
<>	128:9bcdf88f62b0	961	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	962	* @param __FLAG__: specifies the RTC shift operation Flag is pending or not.
<>	128:9bcdf88f62b0	963	* This parameter can be:
<>	128:9bcdf88f62b0	964	* @arg RTC_FLAG_SHPF
<>	128:9bcdf88f62b0	965	* @retval None
<>	128:9bcdf88f62b0	966	*/
<>	128:9bcdf88f62b0	967	#define __HAL_RTC_SHIFT_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
<>	128:9bcdf88f62b0	968	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	969
<>	128:9bcdf88f62b0	970	/**
<>	128:9bcdf88f62b0	971	* @brief Clear the RTC Time Stamp's pending flags.
<>	128:9bcdf88f62b0	972	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	973	* @param __FLAG__: specifies the RTC Alarm Flag sources to be enabled or disabled.
<>	128:9bcdf88f62b0	974	* This parameter can be:
<>	128:9bcdf88f62b0	975	* @arg RTC_FLAG_TSF
<>	128:9bcdf88f62b0	976	* @retval None
<>	128:9bcdf88f62b0	977	*/
<>	128:9bcdf88f62b0	978	#define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) \| RTC_ISR_INIT)\|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
<>	128:9bcdf88f62b0	979
<>	128:9bcdf88f62b0	980	/**
<>	128:9bcdf88f62b0	981	* @brief Clear the RTC Tamper's pending flags.
<>	128:9bcdf88f62b0	982	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	983	* @param __FLAG__: specifies the RTC Tamper Flag sources to be enabled or disabled.
<>	128:9bcdf88f62b0	984	* This parameter can be:
<>	128:9bcdf88f62b0	985	* @arg RTC_FLAG_TAMP1F
<>	128:9bcdf88f62b0	986	* @arg RTC_FLAG_TAMP2F (*)
<>	128:9bcdf88f62b0	987	* @arg RTC_FLAG_TAMP3F (*)
<>	128:9bcdf88f62b0	988	* @note (*) Available only on devices STM32L100xBA, STM32L151xBA, STM32L152xBA, STM32L100xC,
<>	128:9bcdf88f62b0	989	* STM32L151xC, STM32L152xC, STM32L162xC, STM32L151xCA, STM32L151xD, STM32L152xCA,
<>	128:9bcdf88f62b0	990	* STM32L152xD, STM32L162xCA, STM32L162xD, STM32L151xE, STM32L152xE, STM32L162xE
<>	128:9bcdf88f62b0	991	* STM32L151xDX, STM32L152xDX, STM32L162xDX
<>	128:9bcdf88f62b0	992	* @retval None
<>	128:9bcdf88f62b0	993	*/
<>	128:9bcdf88f62b0	994	#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) \| RTC_ISR_INIT)\|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
<>	128:9bcdf88f62b0	995
<>	128:9bcdf88f62b0	996	/**
<>	128:9bcdf88f62b0	997	* @brief Clear the RTC Wake Up timer's pending flags.
<>	128:9bcdf88f62b0	998	* @param __HANDLE__: specifies the RTC handle.
<>	128:9bcdf88f62b0	999	* @param __FLAG__: specifies the RTC WakeUpTimer Flag to clear.
<>	128:9bcdf88f62b0	1000	* This parameter can be:
<>	128:9bcdf88f62b0	1001	* @arg RTC_FLAG_WUTF
<>	128:9bcdf88f62b0	1002	* @retval None
<>	128:9bcdf88f62b0	1003	*/
<>	128:9bcdf88f62b0	1004	#define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) \| RTC_ISR_INIT)\|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
<>	128:9bcdf88f62b0	1005
<>	128:9bcdf88f62b0	1006	/**
<>	128:9bcdf88f62b0	1007	* @brief Enable interrupt on the RTC WakeUp Timer associated Exti line.
<>	128:9bcdf88f62b0	1008	* @retval None
<>	128:9bcdf88f62b0	1009	*/
<>	128:9bcdf88f62b0	1010	#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR \|= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
<>	128:9bcdf88f62b0	1011
<>	128:9bcdf88f62b0	1012	/**
<>	128:9bcdf88f62b0	1013	* @brief Disable interrupt on the RTC WakeUp Timer associated Exti line.
<>	128:9bcdf88f62b0	1014	* @retval None
<>	128:9bcdf88f62b0	1015	*/
<>	128:9bcdf88f62b0	1016	#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
<>	128:9bcdf88f62b0	1017
<>	128:9bcdf88f62b0	1018	/**
<>	128:9bcdf88f62b0	1019	* @brief Enable event on the RTC WakeUp Timer associated Exti line.
<>	128:9bcdf88f62b0	1020	* @retval None.
<>	128:9bcdf88f62b0	1021	*/
<>	128:9bcdf88f62b0	1022	#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR \|= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
<>	128:9bcdf88f62b0	1023
<>	128:9bcdf88f62b0	1024	/**
<>	128:9bcdf88f62b0	1025	* @brief Disable event on the RTC WakeUp Timer associated Exti line.
<>	128:9bcdf88f62b0	1026	* @retval None.
<>	128:9bcdf88f62b0	1027	*/
<>	128:9bcdf88f62b0	1028	#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
<>	128:9bcdf88f62b0	1029
<>	128:9bcdf88f62b0	1030	/**
<>	128:9bcdf88f62b0	1031	* @brief Enable falling edge trigger on the RTC WakeUp Timer associated Exti line.
<>	128:9bcdf88f62b0	1032	* @retval None.
<>	128:9bcdf88f62b0	1033	*/
<>	128:9bcdf88f62b0	1034	#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR \|= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
<>	128:9bcdf88f62b0	1035
<>	128:9bcdf88f62b0	1036	/**
<>	128:9bcdf88f62b0	1037	* @brief Disable falling edge trigger on the RTC WakeUp Timer associated Exti line.
<>	128:9bcdf88f62b0	1038	* @retval None.
<>	128:9bcdf88f62b0	1039	*/
<>	128:9bcdf88f62b0	1040	#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
<>	128:9bcdf88f62b0	1041
<>	128:9bcdf88f62b0	1042	/**
<>	128:9bcdf88f62b0	1043	* @brief Enable rising edge trigger on the RTC WakeUp Timer associated Exti line.
<>	128:9bcdf88f62b0	1044	* @retval None.
<>	128:9bcdf88f62b0	1045	*/
<>	128:9bcdf88f62b0	1046	#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR \|= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
<>	128:9bcdf88f62b0	1047
<>	128:9bcdf88f62b0	1048	/**
<>	128:9bcdf88f62b0	1049	* @brief Disable rising edge trigger on the RTC WakeUp Timer associated Exti line.
<>	128:9bcdf88f62b0	1050	* @retval None.
<>	128:9bcdf88f62b0	1051	*/
<>	128:9bcdf88f62b0	1052	#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
<>	128:9bcdf88f62b0	1053
<>	128:9bcdf88f62b0	1054	/**
<>	128:9bcdf88f62b0	1055	* @brief Enable rising & falling edge trigger on the RTC WakeUp Timer associated Exti line.
<>	128:9bcdf88f62b0	1056	* @retval None.
<>	128:9bcdf88f62b0	1057	*/
<>	128:9bcdf88f62b0	1058	#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do { __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();__HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE(); } while(0);
<>	128:9bcdf88f62b0	1059
<>	128:9bcdf88f62b0	1060	/**
<>	128:9bcdf88f62b0	1061	* @brief Disable rising & falling edge trigger on the RTC WakeUp Timer associated Exti line.
<>	128:9bcdf88f62b0	1062	* This parameter can be:
<>	128:9bcdf88f62b0	1063	* @retval None.
<>	128:9bcdf88f62b0	1064	*/
<>	128:9bcdf88f62b0	1065	#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do { __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();__HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE(); } while(0);
<>	128:9bcdf88f62b0	1066
<>	128:9bcdf88f62b0	1067	/**
<>	128:9bcdf88f62b0	1068	* @brief Check whether the RTC WakeUp Timer associated Exti line interrupt flag is set or not.
<>	128:9bcdf88f62b0	1069	* @retval Line Status.
<>	128:9bcdf88f62b0	1070	*/
<>	128:9bcdf88f62b0	1071	#define __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
<>	128:9bcdf88f62b0	1072
<>	128:9bcdf88f62b0	1073	/**
<>	128:9bcdf88f62b0	1074	* @brief Clear the RTC WakeUp Timer associated Exti line flag.
<>	128:9bcdf88f62b0	1075	* @retval None.
<>	128:9bcdf88f62b0	1076	*/
<>	128:9bcdf88f62b0	1077	#define __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR = RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
<>	128:9bcdf88f62b0	1078
<>	128:9bcdf88f62b0	1079	/**
<>	128:9bcdf88f62b0	1080	* @brief Generate a Software interrupt on the RTC WakeUp Timer associated Exti line.
<>	128:9bcdf88f62b0	1081	* @retval None.
<>	128:9bcdf88f62b0	1082	*/
<>	128:9bcdf88f62b0	1083	#define __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER \|= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
<>	128:9bcdf88f62b0	1084
<>	128:9bcdf88f62b0	1085	/**
<>	128:9bcdf88f62b0	1086	* @brief Enable interrupt on the RTC Tamper and Timestamp associated Exti line.
<>	128:9bcdf88f62b0	1087	* @retval None
<>	128:9bcdf88f62b0	1088	*/
<>	128:9bcdf88f62b0	1089	#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT() (EXTI->IMR \|= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
<>	128:9bcdf88f62b0	1090
<>	128:9bcdf88f62b0	1091	/**
<>	128:9bcdf88f62b0	1092	* @brief Disable interrupt on the RTC Tamper and Timestamp associated Exti line.
<>	128:9bcdf88f62b0	1093	* @retval None
<>	128:9bcdf88f62b0	1094	*/
<>	128:9bcdf88f62b0	1095	#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT() (EXTI->IMR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
<>	128:9bcdf88f62b0	1096
<>	128:9bcdf88f62b0	1097	/**
<>	128:9bcdf88f62b0	1098	* @brief Enable event on the RTC Tamper and Timestamp associated Exti line.
<>	128:9bcdf88f62b0	1099	* @retval None.
<>	128:9bcdf88f62b0	1100	*/
<>	128:9bcdf88f62b0	1101	#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR \|= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
<>	128:9bcdf88f62b0	1102
<>	128:9bcdf88f62b0	1103	/**
<>	128:9bcdf88f62b0	1104	* @brief Disable event on the RTC Tamper and Timestamp associated Exti line.
<>	128:9bcdf88f62b0	1105	* @retval None.
<>	128:9bcdf88f62b0	1106	*/
<>	128:9bcdf88f62b0	1107	#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
<>	128:9bcdf88f62b0	1108
<>	128:9bcdf88f62b0	1109	/**
<>	128:9bcdf88f62b0	1110	* @brief Enable falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
<>	128:9bcdf88f62b0	1111	* @retval None.
<>	128:9bcdf88f62b0	1112	*/
<>	128:9bcdf88f62b0	1113	#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR \|= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
<>	128:9bcdf88f62b0	1114
<>	128:9bcdf88f62b0	1115	/**
<>	128:9bcdf88f62b0	1116	* @brief Disable falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
<>	128:9bcdf88f62b0	1117	* @retval None.
<>	128:9bcdf88f62b0	1118	*/
<>	128:9bcdf88f62b0	1119	#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
<>	128:9bcdf88f62b0	1120
<>	128:9bcdf88f62b0	1121	/**
<>	128:9bcdf88f62b0	1122	* @brief Enable rising edge trigger on the RTC Tamper and Timestamp associated Exti line.
<>	128:9bcdf88f62b0	1123	* @retval None.
<>	128:9bcdf88f62b0	1124	*/
<>	128:9bcdf88f62b0	1125	#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR \|= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
<>	128:9bcdf88f62b0	1126
<>	128:9bcdf88f62b0	1127	/**
<>	128:9bcdf88f62b0	1128	* @brief Disable rising edge trigger on the RTC Tamper and Timestamp associated Exti line.
<>	128:9bcdf88f62b0	1129	* @retval None.
<>	128:9bcdf88f62b0	1130	*/
<>	128:9bcdf88f62b0	1131	#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
<>	128:9bcdf88f62b0	1132
<>	128:9bcdf88f62b0	1133	/**
<>	128:9bcdf88f62b0	1134	* @brief Enable rising & falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
<>	128:9bcdf88f62b0	1135	* @retval None.
<>	128:9bcdf88f62b0	1136	*/
<>	128:9bcdf88f62b0	1137	#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_FALLING_EDGE() do { __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();__HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE(); } while(0);
<>	128:9bcdf88f62b0	1138
<>	128:9bcdf88f62b0	1139	/**
<>	128:9bcdf88f62b0	1140	* @brief Disable rising & falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
<>	128:9bcdf88f62b0	1141	* This parameter can be:
<>	128:9bcdf88f62b0	1142	* @retval None.
<>	128:9bcdf88f62b0	1143	*/
<>	128:9bcdf88f62b0	1144	#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_FALLING_EDGE() do { __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE();__HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE(); } while(0);
<>	128:9bcdf88f62b0	1145
<>	128:9bcdf88f62b0	1146	/**
<>	128:9bcdf88f62b0	1147	* @brief Check whether the RTC Tamper and Timestamp associated Exti line interrupt flag is set or not.
<>	128:9bcdf88f62b0	1148	* @retval Line Status.
<>	128:9bcdf88f62b0	1149	*/
<>	128:9bcdf88f62b0	1150	#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG() (EXTI->PR & RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
<>	128:9bcdf88f62b0	1151
<>	128:9bcdf88f62b0	1152	/**
<>	128:9bcdf88f62b0	1153	* @brief Clear the RTC Tamper and Timestamp associated Exti line flag.
<>	128:9bcdf88f62b0	1154	* @retval None.
<>	128:9bcdf88f62b0	1155	*/
<>	128:9bcdf88f62b0	1156	#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG() (EXTI->PR = RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
<>	128:9bcdf88f62b0	1157
<>	128:9bcdf88f62b0	1158	/**
<>	128:9bcdf88f62b0	1159	* @brief Generate a Software interrupt on the RTC Tamper and Timestamp associated Exti line
<>	128:9bcdf88f62b0	1160	* @retval None.
<>	128:9bcdf88f62b0	1161	*/
<>	128:9bcdf88f62b0	1162	#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT() (EXTI->SWIER \|= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
<>	128:9bcdf88f62b0	1163
<>	128:9bcdf88f62b0	1164	/**
<>	128:9bcdf88f62b0	1165	* @}
<>	128:9bcdf88f62b0	1166	*/
<>	128:9bcdf88f62b0	1167
<>	128:9bcdf88f62b0	1168	/* Exported functions --------------------------------------------------------*/
<>	128:9bcdf88f62b0	1169	/** @addtogroup RTCEx_Exported_Functions
<>	128:9bcdf88f62b0	1170	* @{
<>	128:9bcdf88f62b0	1171	*/
<>	128:9bcdf88f62b0	1172
<>	128:9bcdf88f62b0	1173	/* RTC TimeStamp and Tamper functions *****************************************/
<>	128:9bcdf88f62b0	1174	/** @addtogroup RTCEx_Exported_Functions_Group4
<>	128:9bcdf88f62b0	1175	* @{
<>	128:9bcdf88f62b0	1176	*/
<>	128:9bcdf88f62b0	1177	HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge);
<>	128:9bcdf88f62b0	1178	HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge);
<>	128:9bcdf88f62b0	1179	HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1180	HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef hrtc, RTC_TimeTypeDef sTimeStamp, RTC_DateTypeDef *sTimeStampDate, uint32_t Format);
<>	128:9bcdf88f62b0	1181
<>	128:9bcdf88f62b0	1182	HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef hrtc, RTC_TamperTypeDef sTamper);
<>	128:9bcdf88f62b0	1183	HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef hrtc, RTC_TamperTypeDef sTamper);
<>	128:9bcdf88f62b0	1184	HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper);
<>	128:9bcdf88f62b0	1185	void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1186
<>	128:9bcdf88f62b0	1187	void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1188	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	1189	void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1190	void HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1191	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	1192	void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1193	HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
<>	128:9bcdf88f62b0	1194	HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
<>	128:9bcdf88f62b0	1195	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	1196	HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
<>	128:9bcdf88f62b0	1197	HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
<>	128:9bcdf88f62b0	1198	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	1199	/**
<>	128:9bcdf88f62b0	1200	* @}
<>	128:9bcdf88f62b0	1201	*/
<>	128:9bcdf88f62b0	1202
<>	128:9bcdf88f62b0	1203	/* RTC Wake-up functions ******************************************************/
<>	128:9bcdf88f62b0	1204	/** @addtogroup RTCEx_Exported_Functions_Group5
<>	128:9bcdf88f62b0	1205	* @{
<>	128:9bcdf88f62b0	1206	*/
<>	128:9bcdf88f62b0	1207	HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock);
<>	128:9bcdf88f62b0	1208	HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock);
<>	128:9bcdf88f62b0	1209	uint32_t HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1210	uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1211	void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1212	void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1213	HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
<>	128:9bcdf88f62b0	1214	/**
<>	128:9bcdf88f62b0	1215	* @}
<>	128:9bcdf88f62b0	1216	*/
<>	128:9bcdf88f62b0	1217
<>	128:9bcdf88f62b0	1218	/* Extension Control functions ************************************************/
<>	128:9bcdf88f62b0	1219	/** @addtogroup RTCEx_Exported_Functions_Group7
<>	128:9bcdf88f62b0	1220	* @{
<>	128:9bcdf88f62b0	1221	*/
<>	128:9bcdf88f62b0	1222	void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data);
<>	128:9bcdf88f62b0	1223	uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister);
<>	128:9bcdf88f62b0	1224
<>	128:9bcdf88f62b0	1225	HAL_StatusTypeDef HAL_RTCEx_SetCoarseCalib(RTC_HandleTypeDef *hrtc, uint32_t CalibSign, uint32_t Value);
<>	128:9bcdf88f62b0	1226	HAL_StatusTypeDef HAL_RTCEx_DeactivateCoarseCalib(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1227	#if defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined(STM32L151xDX) \|\| defined (STM32L152xE) \|\| defined (STM32L152xDX) \|\| defined (STM32L162xE) \|\| defined (STM32L162xDX)
<>	128:9bcdf88f62b0	1228	HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef *hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue);
<>	128:9bcdf88f62b0	1229	HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef *hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS);
<>	128:9bcdf88f62b0	1230	HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef *hrtc, uint32_t CalibOutput);
<>	128:9bcdf88f62b0	1231	#else
<>	128:9bcdf88f62b0	1232	HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1233	#endif /* STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L151xDX \|\| STM32L152xE \|\| STM32L152xDX \|\| STM32L162xE \|\| STM32L162xDX */
<>	128:9bcdf88f62b0	1234	HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1235	HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1236	HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1237	HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1238	HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1239	/**
<>	128:9bcdf88f62b0	1240	* @}
<>	128:9bcdf88f62b0	1241	*/
<>	128:9bcdf88f62b0	1242
<>	128:9bcdf88f62b0	1243	/* Extension RTC features functions *******************************************/
<>	128:9bcdf88f62b0	1244	/** @addtogroup RTCEx_Exported_Functions_Group8
<>	128:9bcdf88f62b0	1245	* @{
<>	128:9bcdf88f62b0	1246	*/
<>	128:9bcdf88f62b0	1247	void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc);
<>	128:9bcdf88f62b0	1248	HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
<>	128:9bcdf88f62b0	1249	/**
<>	128:9bcdf88f62b0	1250	* @}
<>	128:9bcdf88f62b0	1251	*/
<>	128:9bcdf88f62b0	1252
<>	128:9bcdf88f62b0	1253	/**
<>	128:9bcdf88f62b0	1254	* @}
<>	128:9bcdf88f62b0	1255	*/
<>	128:9bcdf88f62b0	1256
<>	128:9bcdf88f62b0	1257	/* Private types -------------------------------------------------------------*/
<>	128:9bcdf88f62b0	1258	/* Private variables ---------------------------------------------------------*/
<>	128:9bcdf88f62b0	1259	/* Private constants ---------------------------------------------------------*/
<>	128:9bcdf88f62b0	1260	/** @defgroup RTCEx_Private_Constants RTCEx Private Constants
<>	128:9bcdf88f62b0	1261	* @{
<>	128:9bcdf88f62b0	1262	*/
<>	128:9bcdf88f62b0	1263	#define RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT (0x00080000U) /!< External interrupt line 19 Connected to the RTC Tamper and Time Stamp events /
<>	128:9bcdf88f62b0	1264	#define RTC_EXTI_LINE_WAKEUPTIMER_EVENT (0x00100000U) /!< External interrupt line 20 Connected to the RTC Wakeup event /
<>	128:9bcdf88f62b0	1265
<>	128:9bcdf88f62b0	1266	/**
<>	128:9bcdf88f62b0	1267	* @}
<>	128:9bcdf88f62b0	1268	*/
<>	128:9bcdf88f62b0	1269
<>	128:9bcdf88f62b0	1270	/* Private macros ------------------------------------------------------------*/
<>	128:9bcdf88f62b0	1271	/** @defgroup RTCEx_Private_Macros RTCEx Private Macros
<>	128:9bcdf88f62b0	1272	* @{
<>	128:9bcdf88f62b0	1273	*/
<>	128:9bcdf88f62b0	1274
<>	128:9bcdf88f62b0	1275	/**
<>	128:9bcdf88f62b0	1276	* @}
<>	128:9bcdf88f62b0	1277	*/
<>	128:9bcdf88f62b0	1278
<>	128:9bcdf88f62b0	1279	/**
<>	128:9bcdf88f62b0	1280	* @}
<>	128:9bcdf88f62b0	1281	*/
<>	128:9bcdf88f62b0	1282
<>	128:9bcdf88f62b0	1283	/**
<>	128:9bcdf88f62b0	1284	* @}
<>	128:9bcdf88f62b0	1285	*/
<>	128:9bcdf88f62b0	1286
<>	128:9bcdf88f62b0	1287	#ifdef __cplusplus
<>	128:9bcdf88f62b0	1288	}
<>	128:9bcdf88f62b0	1289	#endif
<>	128:9bcdf88f62b0	1290
<>	128:9bcdf88f62b0	1291	#endif /* __STM32L1xx_HAL_RTC_EX_H */
<>	128:9bcdf88f62b0	1292
<>	128:9bcdf88f62b0	1293	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/