mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MOTE_L152RC/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_iwdg.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
128:9bcdf88f62b0
Child:
165:d1b4690b3f8b
Release 136 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure  https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /**
<> 128:9bcdf88f62b0 2 ******************************************************************************
<> 128:9bcdf88f62b0 3 * @file stm32l1xx_hal_iwdg.h
<> 128:9bcdf88f62b0 4 * @author MCD Application Team
<> 128:9bcdf88f62b0 5 * @version V1.2.0
<> 128:9bcdf88f62b0 6 * @date 01-July-2016
<> 128:9bcdf88f62b0 7 * @brief Header file of IWDG HAL module.
<> 128:9bcdf88f62b0 8 ******************************************************************************
<> 128:9bcdf88f62b0 9 * @attention
<> 128:9bcdf88f62b0 10 *
<> 128:9bcdf88f62b0 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 128:9bcdf88f62b0 12 *
<> 128:9bcdf88f62b0 13 * Redistribution and use in source and binary forms, with or without modification,
<> 128:9bcdf88f62b0 14 * are permitted provided that the following conditions are met:
<> 128:9bcdf88f62b0 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 128:9bcdf88f62b0 16 * this list of conditions and the following disclaimer.
<> 128:9bcdf88f62b0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 128:9bcdf88f62b0 18 * this list of conditions and the following disclaimer in the documentation
<> 128:9bcdf88f62b0 19 * and/or other materials provided with the distribution.
<> 128:9bcdf88f62b0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 128:9bcdf88f62b0 21 * may be used to endorse or promote products derived from this software
<> 128:9bcdf88f62b0 22 * without specific prior written permission.
<> 128:9bcdf88f62b0 23 *
<> 128:9bcdf88f62b0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 128:9bcdf88f62b0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 128:9bcdf88f62b0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 128:9bcdf88f62b0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 128:9bcdf88f62b0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 128:9bcdf88f62b0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 128:9bcdf88f62b0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 128:9bcdf88f62b0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 128:9bcdf88f62b0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 128:9bcdf88f62b0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 128:9bcdf88f62b0 34 *
<> 128:9bcdf88f62b0 35 ******************************************************************************
<> 128:9bcdf88f62b0 36 */
<> 128:9bcdf88f62b0 37
<> 128:9bcdf88f62b0 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 128:9bcdf88f62b0 39 #ifndef __STM32L1xx_HAL_IWDG_H
<> 128:9bcdf88f62b0 40 #define __STM32L1xx_HAL_IWDG_H
<> 128:9bcdf88f62b0 41
<> 128:9bcdf88f62b0 42 #ifdef __cplusplus
<> 128:9bcdf88f62b0 43 extern "C" {
<> 128:9bcdf88f62b0 44 #endif
<> 128:9bcdf88f62b0 45
<> 128:9bcdf88f62b0 46 /* Includes ------------------------------------------------------------------*/
<> 128:9bcdf88f62b0 47 #include "stm32l1xx_hal_def.h"
<> 128:9bcdf88f62b0 48
<> 128:9bcdf88f62b0 49 /** @addtogroup STM32L1xx_HAL_Driver
<> 128:9bcdf88f62b0 50 * @{
<> 128:9bcdf88f62b0 51 */
<> 128:9bcdf88f62b0 52
<> 128:9bcdf88f62b0 53 /** @defgroup IWDG IWDG
<> 128:9bcdf88f62b0 54 * @{
<> 128:9bcdf88f62b0 55 */
<> 128:9bcdf88f62b0 56
<> 128:9bcdf88f62b0 57 /* Exported types ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 58 /** @defgroup IWDG_Exported_Types IWDG Exported Types
<> 128:9bcdf88f62b0 59 * @{
<> 128:9bcdf88f62b0 60 */
<> 128:9bcdf88f62b0 61
<> 128:9bcdf88f62b0 62 /**
<> 128:9bcdf88f62b0 63 * @brief IWDG Init structure definition
<> 128:9bcdf88f62b0 64 */
<> 128:9bcdf88f62b0 65 typedef struct
<> 128:9bcdf88f62b0 66 {
<> 128:9bcdf88f62b0 67 uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
<> 128:9bcdf88f62b0 68 This parameter can be a value of @ref IWDG_Prescaler */
<> 128:9bcdf88f62b0 69
<> 128:9bcdf88f62b0 70 uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
<> 128:9bcdf88f62b0 71 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
<> 128:9bcdf88f62b0 72
<> 128:9bcdf88f62b0 73 }IWDG_InitTypeDef;
<> 128:9bcdf88f62b0 74
<> 128:9bcdf88f62b0 75 /**
<> 128:9bcdf88f62b0 76 * @brief IWDG Handle Structure definition
<> 128:9bcdf88f62b0 77 */
<> 128:9bcdf88f62b0 78 typedef struct
<> 128:9bcdf88f62b0 79 {
<> 128:9bcdf88f62b0 80 IWDG_TypeDef *Instance; /*!< Register base address */
<> 128:9bcdf88f62b0 81
<> 128:9bcdf88f62b0 82 IWDG_InitTypeDef Init; /*!< IWDG required parameters */
<> 128:9bcdf88f62b0 83
<> 128:9bcdf88f62b0 84 }IWDG_HandleTypeDef;
<> 128:9bcdf88f62b0 85
<> 128:9bcdf88f62b0 86 /**
<> 128:9bcdf88f62b0 87 * @}
<> 128:9bcdf88f62b0 88 */
<> 128:9bcdf88f62b0 89
<> 128:9bcdf88f62b0 90 /* Exported constants --------------------------------------------------------*/
<> 128:9bcdf88f62b0 91 /** @defgroup IWDG_Exported_Constants IWDG Exported Constants
<> 128:9bcdf88f62b0 92 * @{
<> 128:9bcdf88f62b0 93 */
<> 128:9bcdf88f62b0 94
<> 128:9bcdf88f62b0 95 /** @defgroup IWDG_Prescaler IWDG Prescaler
<> 128:9bcdf88f62b0 96 * @{
<> 128:9bcdf88f62b0 97 */
<> 128:9bcdf88f62b0 98 #define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */
<> 128:9bcdf88f62b0 99 #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
<> 128:9bcdf88f62b0 100 #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
<> 128:9bcdf88f62b0 101 #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
<> 128:9bcdf88f62b0 102 #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
<> 128:9bcdf88f62b0 103 #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
<> 128:9bcdf88f62b0 104 #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
<> 128:9bcdf88f62b0 105 /**
<> 128:9bcdf88f62b0 106 * @}
<> 128:9bcdf88f62b0 107 */
<> 128:9bcdf88f62b0 108
<> 128:9bcdf88f62b0 109 /**
<> 128:9bcdf88f62b0 110 * @}
<> 128:9bcdf88f62b0 111 */
<> 128:9bcdf88f62b0 112
<> 128:9bcdf88f62b0 113 /* Exported macros -----------------------------------------------------------*/
<> 128:9bcdf88f62b0 114 /** @defgroup IWDG_Exported_Macros IWDG Exported Macros
<> 128:9bcdf88f62b0 115 * @{
<> 128:9bcdf88f62b0 116 */
<> 128:9bcdf88f62b0 117
<> 128:9bcdf88f62b0 118 /**
<> 128:9bcdf88f62b0 119 * @brief Enable the IWDG peripheral.
<> 128:9bcdf88f62b0 120 * @param __HANDLE__ IWDG handle
<> 128:9bcdf88f62b0 121 * @retval None
<> 128:9bcdf88f62b0 122 */
<> 128:9bcdf88f62b0 123 #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
<> 128:9bcdf88f62b0 124
<> 128:9bcdf88f62b0 125 /**
<> 128:9bcdf88f62b0 126 * @brief Reload IWDG counter with value defined in the reload register
<> 128:9bcdf88f62b0 127 * (write access to IWDG_PR, IWDG_RLR & IWDG_WINR registers disabled).
<> 128:9bcdf88f62b0 128 * @param __HANDLE__ IWDG handle
<> 128:9bcdf88f62b0 129 * @retval None
<> 128:9bcdf88f62b0 130 */
<> 128:9bcdf88f62b0 131 #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
<> 128:9bcdf88f62b0 132
<> 128:9bcdf88f62b0 133 /**
<> 128:9bcdf88f62b0 134 * @}
<> 128:9bcdf88f62b0 135 */
<> 128:9bcdf88f62b0 136
<> 128:9bcdf88f62b0 137 /* Exported functions --------------------------------------------------------*/
<> 128:9bcdf88f62b0 138 /** @defgroup IWDG_Exported_Functions IWDG Exported Functions
<> 128:9bcdf88f62b0 139 * @{
<> 128:9bcdf88f62b0 140 */
<> 128:9bcdf88f62b0 141
<> 128:9bcdf88f62b0 142 /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
<> 128:9bcdf88f62b0 143 * @{
<> 128:9bcdf88f62b0 144 */
<> 128:9bcdf88f62b0 145 /* Initialization/Start functions ********************************************/
<> 128:9bcdf88f62b0 146 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
<> 128:9bcdf88f62b0 147 /**
<> 128:9bcdf88f62b0 148 * @}
<> 128:9bcdf88f62b0 149 */
<> 128:9bcdf88f62b0 150
<> 128:9bcdf88f62b0 151 /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
<> 128:9bcdf88f62b0 152 * @{
<> 128:9bcdf88f62b0 153 */
<> 128:9bcdf88f62b0 154 /* I/O operation functions ****************************************************/
<> 128:9bcdf88f62b0 155 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
<> 128:9bcdf88f62b0 156 /**
<> 128:9bcdf88f62b0 157 * @}
<> 128:9bcdf88f62b0 158 */
<> 128:9bcdf88f62b0 159
<> 128:9bcdf88f62b0 160 /**
<> 128:9bcdf88f62b0 161 * @}
<> 128:9bcdf88f62b0 162 */
<> 128:9bcdf88f62b0 163
<> 128:9bcdf88f62b0 164 /* Private constants ---------------------------------------------------------*/
<> 128:9bcdf88f62b0 165 /** @defgroup IWDG_Private_Constants IWDG Private Constants
<> 128:9bcdf88f62b0 166 * @{
<> 128:9bcdf88f62b0 167 */
<> 128:9bcdf88f62b0 168
<> 128:9bcdf88f62b0 169 /**
<> 128:9bcdf88f62b0 170 * @brief IWDG Key Register BitMask
<> 128:9bcdf88f62b0 171 */
<> 128:9bcdf88f62b0 172 #define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */
<> 128:9bcdf88f62b0 173 #define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */
<> 128:9bcdf88f62b0 174 #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */
<> 128:9bcdf88f62b0 175 #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */
<> 128:9bcdf88f62b0 176
<> 128:9bcdf88f62b0 177 /**
<> 128:9bcdf88f62b0 178 * @}
<> 128:9bcdf88f62b0 179 */
<> 128:9bcdf88f62b0 180
<> 128:9bcdf88f62b0 181 /* Private macros ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 182 /** @defgroup IWDG_Private_Macros IWDG Private Macros
<> 128:9bcdf88f62b0 183 * @{
<> 128:9bcdf88f62b0 184 */
<> 128:9bcdf88f62b0 185
<> 128:9bcdf88f62b0 186 /**
<> 128:9bcdf88f62b0 187 * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
<> 128:9bcdf88f62b0 188 * @param __HANDLE__ IWDG handle
<> 128:9bcdf88f62b0 189 * @retval None
<> 128:9bcdf88f62b0 190 */
<> 128:9bcdf88f62b0 191 #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
<> 128:9bcdf88f62b0 192
<> 128:9bcdf88f62b0 193 /**
<> 128:9bcdf88f62b0 194 * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
<> 128:9bcdf88f62b0 195 * @param __HANDLE__ IWDG handle
<> 128:9bcdf88f62b0 196 * @retval None
<> 128:9bcdf88f62b0 197 */
<> 128:9bcdf88f62b0 198 #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
<> 128:9bcdf88f62b0 199
<> 128:9bcdf88f62b0 200 /**
<> 128:9bcdf88f62b0 201 * @brief Check IWDG prescaler value.
<> 128:9bcdf88f62b0 202 * @param __PRESCALER__ IWDG prescaler value
<> 128:9bcdf88f62b0 203 * @retval None
<> 128:9bcdf88f62b0 204 */
<> 128:9bcdf88f62b0 205 #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
<> 128:9bcdf88f62b0 206 ((__PRESCALER__) == IWDG_PRESCALER_8) || \
<> 128:9bcdf88f62b0 207 ((__PRESCALER__) == IWDG_PRESCALER_16) || \
<> 128:9bcdf88f62b0 208 ((__PRESCALER__) == IWDG_PRESCALER_32) || \
<> 128:9bcdf88f62b0 209 ((__PRESCALER__) == IWDG_PRESCALER_64) || \
<> 128:9bcdf88f62b0 210 ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
<> 128:9bcdf88f62b0 211 ((__PRESCALER__) == IWDG_PRESCALER_256))
<> 128:9bcdf88f62b0 212
<> 128:9bcdf88f62b0 213 /**
<> 128:9bcdf88f62b0 214 * @brief Check IWDG reload value.
<> 128:9bcdf88f62b0 215 * @param __RELOAD__ IWDG reload value
<> 128:9bcdf88f62b0 216 * @retval None
<> 128:9bcdf88f62b0 217 */
<> 128:9bcdf88f62b0 218 #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
<> 128:9bcdf88f62b0 219
<> 128:9bcdf88f62b0 220 /**
<> 128:9bcdf88f62b0 221 * @}
<> 128:9bcdf88f62b0 222 */
<> 128:9bcdf88f62b0 223
<> 128:9bcdf88f62b0 224 /**
<> 128:9bcdf88f62b0 225 * @}
<> 128:9bcdf88f62b0 226 */
<> 128:9bcdf88f62b0 227
<> 128:9bcdf88f62b0 228 /**
<> 128:9bcdf88f62b0 229 * @}
<> 128:9bcdf88f62b0 230 */
<> 128:9bcdf88f62b0 231
<> 128:9bcdf88f62b0 232
<> 128:9bcdf88f62b0 233 #ifdef __cplusplus
<> 128:9bcdf88f62b0 234 }
<> 128:9bcdf88f62b0 235 #endif
<> 128:9bcdf88f62b0 236
<> 128:9bcdf88f62b0 237 #endif /* __STM32L1xx_HAL_IWDG_H */
<> 128:9bcdf88f62b0 238
<> 128:9bcdf88f62b0 239 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/