The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
128:9bcdf88f62b0
Child:
165:d1b4690b3f8b
Release 136 of the mbed library

Ports for Upcoming Targets


Fixes and Changes

3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432
3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181
3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626
3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628
3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629
3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632
3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642
3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664
3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655
3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657
3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658
3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685
3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692
3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621
3649: [STM32F7] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3649
3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695
3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /**
<> 128:9bcdf88f62b0 2 ******************************************************************************
<> 128:9bcdf88f62b0 3 * @file stm32l1xx_hal_gpio.h
<> 128:9bcdf88f62b0 4 * @author MCD Application Team
<> 128:9bcdf88f62b0 5 * @version V1.2.0
<> 128:9bcdf88f62b0 6 * @date 01-July-2016
<> 128:9bcdf88f62b0 7 * @brief Header file of GPIO HAL module.
<> 128:9bcdf88f62b0 8 ******************************************************************************
<> 128:9bcdf88f62b0 9 * @attention
<> 128:9bcdf88f62b0 10 *
<> 128:9bcdf88f62b0 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 128:9bcdf88f62b0 12 *
<> 128:9bcdf88f62b0 13 * Redistribution and use in source and binary forms, with or without modification,
<> 128:9bcdf88f62b0 14 * are permitted provided that the following conditions are met:
<> 128:9bcdf88f62b0 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 128:9bcdf88f62b0 16 * this list of conditions and the following disclaimer.
<> 128:9bcdf88f62b0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 128:9bcdf88f62b0 18 * this list of conditions and the following disclaimer in the documentation
<> 128:9bcdf88f62b0 19 * and/or other materials provided with the distribution.
<> 128:9bcdf88f62b0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 128:9bcdf88f62b0 21 * may be used to endorse or promote products derived from this software
<> 128:9bcdf88f62b0 22 * without specific prior written permission.
<> 128:9bcdf88f62b0 23 *
<> 128:9bcdf88f62b0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 128:9bcdf88f62b0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 128:9bcdf88f62b0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 128:9bcdf88f62b0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 128:9bcdf88f62b0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 128:9bcdf88f62b0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 128:9bcdf88f62b0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 128:9bcdf88f62b0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 128:9bcdf88f62b0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 128:9bcdf88f62b0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 128:9bcdf88f62b0 34 *
<> 128:9bcdf88f62b0 35 ******************************************************************************
<> 128:9bcdf88f62b0 36 */
<> 128:9bcdf88f62b0 37
<> 128:9bcdf88f62b0 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 128:9bcdf88f62b0 39 #ifndef __STM32L1xx_HAL_GPIO_H
<> 128:9bcdf88f62b0 40 #define __STM32L1xx_HAL_GPIO_H
<> 128:9bcdf88f62b0 41
<> 128:9bcdf88f62b0 42 #ifdef __cplusplus
<> 128:9bcdf88f62b0 43 extern "C" {
<> 128:9bcdf88f62b0 44 #endif
<> 128:9bcdf88f62b0 45
<> 128:9bcdf88f62b0 46 /* Includes ------------------------------------------------------------------*/
<> 128:9bcdf88f62b0 47 #include "stm32l1xx_hal_def.h"
<> 128:9bcdf88f62b0 48
<> 128:9bcdf88f62b0 49 /** @addtogroup STM32L1xx_HAL_Driver
<> 128:9bcdf88f62b0 50 * @{
<> 128:9bcdf88f62b0 51 */
<> 128:9bcdf88f62b0 52
<> 128:9bcdf88f62b0 53 /** @defgroup GPIO GPIO
<> 128:9bcdf88f62b0 54 * @brief GPIO HAL module driver
<> 128:9bcdf88f62b0 55 * @{
<> 128:9bcdf88f62b0 56 */
<> 128:9bcdf88f62b0 57
<> 128:9bcdf88f62b0 58 /* Exported types ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 59
<> 128:9bcdf88f62b0 60 /** @defgroup GPIO_Exported_Types GPIO Exported Types
<> 128:9bcdf88f62b0 61 * @{
<> 128:9bcdf88f62b0 62 */
<> 128:9bcdf88f62b0 63 /**
<> 128:9bcdf88f62b0 64 * @brief GPIO Init structure definition
<> 128:9bcdf88f62b0 65 */
<> 128:9bcdf88f62b0 66 typedef struct
<> 128:9bcdf88f62b0 67 {
<> 128:9bcdf88f62b0 68 uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
<> 128:9bcdf88f62b0 69 This parameter can be any value of @ref GPIO_pins */
<> 128:9bcdf88f62b0 70
<> 128:9bcdf88f62b0 71 uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
<> 128:9bcdf88f62b0 72 This parameter can be a value of @ref GPIO_mode */
<> 128:9bcdf88f62b0 73
<> 128:9bcdf88f62b0 74 uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins.
<> 128:9bcdf88f62b0 75 This parameter can be a value of @ref GPIO_pull */
<> 128:9bcdf88f62b0 76
<> 128:9bcdf88f62b0 77 uint32_t Speed; /*!< Specifies the speed for the selected pins.
<> 128:9bcdf88f62b0 78 This parameter can be a value of @ref GPIO_speed */
<> 128:9bcdf88f62b0 79
<> 128:9bcdf88f62b0 80 uint32_t Alternate; /*!< Peripheral to be connected to the selected pins
<> 128:9bcdf88f62b0 81 This parameter can be a value of @ref GPIOEx_Alternate_function_selection */
<> 128:9bcdf88f62b0 82 }GPIO_InitTypeDef;
<> 128:9bcdf88f62b0 83
<> 128:9bcdf88f62b0 84 /**
<> 128:9bcdf88f62b0 85 * @brief GPIO Bit SET and Bit RESET enumeration
<> 128:9bcdf88f62b0 86 */
<> 128:9bcdf88f62b0 87 typedef enum
<> 128:9bcdf88f62b0 88 {
<> 128:9bcdf88f62b0 89 GPIO_PIN_RESET = 0,
<> 128:9bcdf88f62b0 90 GPIO_PIN_SET
<> 128:9bcdf88f62b0 91 }GPIO_PinState;
<> 128:9bcdf88f62b0 92 /**
<> 128:9bcdf88f62b0 93 * @}
<> 128:9bcdf88f62b0 94 */
<> 128:9bcdf88f62b0 95
<> 128:9bcdf88f62b0 96 /* Exported constants --------------------------------------------------------*/
<> 128:9bcdf88f62b0 97
<> 128:9bcdf88f62b0 98 /** @defgroup GPIO_Exported_Constants GPIO Exported Constants
<> 128:9bcdf88f62b0 99 * @{
<> 128:9bcdf88f62b0 100 */
<> 128:9bcdf88f62b0 101
<> 128:9bcdf88f62b0 102
<> 128:9bcdf88f62b0 103 /** @defgroup GPIO_pins GPIO pins
<> 128:9bcdf88f62b0 104 * @{
<> 128:9bcdf88f62b0 105 */
<> 128:9bcdf88f62b0 106 #define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */
<> 128:9bcdf88f62b0 107 #define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */
<> 128:9bcdf88f62b0 108 #define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */
<> 128:9bcdf88f62b0 109 #define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */
<> 128:9bcdf88f62b0 110 #define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */
<> 128:9bcdf88f62b0 111 #define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */
<> 128:9bcdf88f62b0 112 #define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */
<> 128:9bcdf88f62b0 113 #define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */
<> 128:9bcdf88f62b0 114 #define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */
<> 128:9bcdf88f62b0 115 #define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */
<> 128:9bcdf88f62b0 116 #define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */
<> 128:9bcdf88f62b0 117 #define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */
<> 128:9bcdf88f62b0 118 #define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */
<> 128:9bcdf88f62b0 119 #define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */
<> 128:9bcdf88f62b0 120 #define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */
<> 128:9bcdf88f62b0 121 #define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */
<> 128:9bcdf88f62b0 122 #define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */
<> 128:9bcdf88f62b0 123
<> 128:9bcdf88f62b0 124 #define GPIO_PIN_MASK ((uint32_t)0x0000FFFF) /* PIN mask for assert test */
<> 128:9bcdf88f62b0 125 /**
<> 128:9bcdf88f62b0 126 * @}
<> 128:9bcdf88f62b0 127 */
<> 128:9bcdf88f62b0 128
<> 128:9bcdf88f62b0 129 /** @defgroup GPIO_mode GPIO mode
<> 128:9bcdf88f62b0 130 * @brief GPIO Configuration Mode
<> 128:9bcdf88f62b0 131 * Elements values convention: 0xX0yz00YZ
<> 128:9bcdf88f62b0 132 * - X : GPIO mode or EXTI Mode
<> 128:9bcdf88f62b0 133 * - y : External IT or Event trigger detection
<> 128:9bcdf88f62b0 134 * - z : IO configuration on External IT or Event
<> 128:9bcdf88f62b0 135 * - Y : Output type (Push Pull or Open Drain)
<> 128:9bcdf88f62b0 136 * - Z : IO Direction mode (Input, Output, Alternate or Analog)
<> 128:9bcdf88f62b0 137 * @{
<> 128:9bcdf88f62b0 138 */
<> 128:9bcdf88f62b0 139 #define GPIO_MODE_INPUT ((uint32_t)0x00000000) /*!< Input Floating Mode */
<> 128:9bcdf88f62b0 140 #define GPIO_MODE_OUTPUT_PP ((uint32_t)0x00000001) /*!< Output Push Pull Mode */
<> 128:9bcdf88f62b0 141 #define GPIO_MODE_OUTPUT_OD ((uint32_t)0x00000011) /*!< Output Open Drain Mode */
<> 128:9bcdf88f62b0 142 #define GPIO_MODE_AF_PP ((uint32_t)0x00000002) /*!< Alternate Function Push Pull Mode */
<> 128:9bcdf88f62b0 143 #define GPIO_MODE_AF_OD ((uint32_t)0x00000012) /*!< Alternate Function Open Drain Mode */
<> 128:9bcdf88f62b0 144
<> 128:9bcdf88f62b0 145 #define GPIO_MODE_ANALOG ((uint32_t)0x00000003) /*!< Analog Mode */
<> 128:9bcdf88f62b0 146
<> 128:9bcdf88f62b0 147 #define GPIO_MODE_IT_RISING ((uint32_t)0x10110000) /*!< External Interrupt Mode with Rising edge trigger detection */
<> 128:9bcdf88f62b0 148 #define GPIO_MODE_IT_FALLING ((uint32_t)0x10210000) /*!< External Interrupt Mode with Falling edge trigger detection */
<> 128:9bcdf88f62b0 149 #define GPIO_MODE_IT_RISING_FALLING ((uint32_t)0x10310000) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
<> 128:9bcdf88f62b0 150
<> 128:9bcdf88f62b0 151 #define GPIO_MODE_EVT_RISING ((uint32_t)0x10120000) /*!< External Event Mode with Rising edge trigger detection */
<> 128:9bcdf88f62b0 152 #define GPIO_MODE_EVT_FALLING ((uint32_t)0x10220000) /*!< External Event Mode with Falling edge trigger detection */
<> 128:9bcdf88f62b0 153 #define GPIO_MODE_EVT_RISING_FALLING ((uint32_t)0x10320000) /*!< External Event Mode with Rising/Falling edge trigger detection */
<> 128:9bcdf88f62b0 154
<> 128:9bcdf88f62b0 155 /**
<> 128:9bcdf88f62b0 156 * @}
<> 128:9bcdf88f62b0 157 */
<> 128:9bcdf88f62b0 158
<> 128:9bcdf88f62b0 159 /** @defgroup GPIO_speed GPIO speed
<> 128:9bcdf88f62b0 160 * @brief GPIO Output Maximum frequency
<> 128:9bcdf88f62b0 161 * @{
<> 128:9bcdf88f62b0 162 */
<> 128:9bcdf88f62b0 163 #define GPIO_SPEED_FREQ_LOW ((uint32_t)0x00000000) /*!< max: 400 KHz, please refer to the product datasheet */
<> 128:9bcdf88f62b0 164 #define GPIO_SPEED_FREQ_MEDIUM ((uint32_t)0x00000001) /*!< max: 1 MHz to 2 MHz, please refer to the product datasheet */
<> 128:9bcdf88f62b0 165 #define GPIO_SPEED_FREQ_HIGH ((uint32_t)0x00000002) /*!< max: 2 MHz to 10 MHz, please refer to the product datasheet */
<> 128:9bcdf88f62b0 166 #define GPIO_SPEED_FREQ_VERY_HIGH ((uint32_t)0x00000003) /*!< max: 8 MHz to 50 MHz, please refer to the product datasheet */
<> 128:9bcdf88f62b0 167
<> 128:9bcdf88f62b0 168 /**
<> 128:9bcdf88f62b0 169 * @}
<> 128:9bcdf88f62b0 170 */
<> 128:9bcdf88f62b0 171
<> 128:9bcdf88f62b0 172 /** @defgroup GPIO_pull GPIO pull
<> 128:9bcdf88f62b0 173 * @brief GPIO Pull-Up or Pull-Down Activation
<> 128:9bcdf88f62b0 174 * @{
<> 128:9bcdf88f62b0 175 */
<> 128:9bcdf88f62b0 176 #define GPIO_NOPULL ((uint32_t)0x00000000) /*!< No Pull-up or Pull-down activation */
<> 128:9bcdf88f62b0 177 #define GPIO_PULLUP ((uint32_t)0x00000001) /*!< Pull-up activation */
<> 128:9bcdf88f62b0 178 #define GPIO_PULLDOWN ((uint32_t)0x00000002) /*!< Pull-down activation */
<> 128:9bcdf88f62b0 179
<> 128:9bcdf88f62b0 180 /**
<> 128:9bcdf88f62b0 181 * @}
<> 128:9bcdf88f62b0 182 */
<> 128:9bcdf88f62b0 183
<> 128:9bcdf88f62b0 184 /**
<> 128:9bcdf88f62b0 185 * @}
<> 128:9bcdf88f62b0 186 */
<> 128:9bcdf88f62b0 187
<> 128:9bcdf88f62b0 188 /* Private constants ---------------------------------------------------------*/
<> 128:9bcdf88f62b0 189 /** @defgroup GPIO_Private_Constants GPIO Private Constants
<> 128:9bcdf88f62b0 190 * @{
<> 128:9bcdf88f62b0 191 */
<> 128:9bcdf88f62b0 192
<> 128:9bcdf88f62b0 193 /**
<> 128:9bcdf88f62b0 194 * @}
<> 128:9bcdf88f62b0 195 */
<> 128:9bcdf88f62b0 196
<> 128:9bcdf88f62b0 197 /* Private macros --------------------------------------------------------*/
<> 128:9bcdf88f62b0 198 /** @defgroup GPIO_Private_Macros GPIO Private Macros
<> 128:9bcdf88f62b0 199 * @{
<> 128:9bcdf88f62b0 200 */
<> 128:9bcdf88f62b0 201
<> 128:9bcdf88f62b0 202 #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
<> 128:9bcdf88f62b0 203
<> 128:9bcdf88f62b0 204 #define IS_GPIO_PIN(__PIN__) ((((__PIN__) & GPIO_PIN_MASK) != (uint32_t)0x00) &&\
<> 128:9bcdf88f62b0 205 (((__PIN__) & ~GPIO_PIN_MASK) == (uint32_t)0x00))
<> 128:9bcdf88f62b0 206
<> 128:9bcdf88f62b0 207 #define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \
<> 128:9bcdf88f62b0 208 ((PULL) == GPIO_PULLDOWN))
<> 128:9bcdf88f62b0 209
<> 128:9bcdf88f62b0 210 #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_SPEED_FREQ_LOW) || ((SPEED) == GPIO_SPEED_FREQ_MEDIUM) || \
<> 128:9bcdf88f62b0 211 ((SPEED) == GPIO_SPEED_FREQ_HIGH) || ((SPEED) == GPIO_SPEED_FREQ_VERY_HIGH))
<> 128:9bcdf88f62b0 212
<> 128:9bcdf88f62b0 213 #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\
<> 128:9bcdf88f62b0 214 ((MODE) == GPIO_MODE_OUTPUT_PP) ||\
<> 128:9bcdf88f62b0 215 ((MODE) == GPIO_MODE_OUTPUT_OD) ||\
<> 128:9bcdf88f62b0 216 ((MODE) == GPIO_MODE_AF_PP) ||\
<> 128:9bcdf88f62b0 217 ((MODE) == GPIO_MODE_AF_OD) ||\
<> 128:9bcdf88f62b0 218 ((MODE) == GPIO_MODE_IT_RISING) ||\
<> 128:9bcdf88f62b0 219 ((MODE) == GPIO_MODE_IT_FALLING) ||\
<> 128:9bcdf88f62b0 220 ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\
<> 128:9bcdf88f62b0 221 ((MODE) == GPIO_MODE_EVT_RISING) ||\
<> 128:9bcdf88f62b0 222 ((MODE) == GPIO_MODE_EVT_FALLING) ||\
<> 128:9bcdf88f62b0 223 ((MODE) == GPIO_MODE_EVT_RISING_FALLING) ||\
<> 128:9bcdf88f62b0 224 ((MODE) == GPIO_MODE_ANALOG))
<> 128:9bcdf88f62b0 225
<> 128:9bcdf88f62b0 226 /**
<> 128:9bcdf88f62b0 227 * @}
<> 128:9bcdf88f62b0 228 */
<> 128:9bcdf88f62b0 229
<> 128:9bcdf88f62b0 230 /* Exported macro ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 231
<> 128:9bcdf88f62b0 232 /** @defgroup GPIO_Exported_Macros GPIO Exported Macros
<> 128:9bcdf88f62b0 233 * @{
<> 128:9bcdf88f62b0 234 */
<> 128:9bcdf88f62b0 235
<> 128:9bcdf88f62b0 236 /**
<> 128:9bcdf88f62b0 237 * @brief Checks whether the specified EXTI line flag is set or not.
<> 128:9bcdf88f62b0 238 * @param __EXTI_LINE__: specifies the EXTI line flag to check.
<> 128:9bcdf88f62b0 239 * This parameter can be GPIO_PIN_x where x can be(0..15)
<> 128:9bcdf88f62b0 240 * @retval The new state of __EXTI_LINE__ (SET or RESET).
<> 128:9bcdf88f62b0 241 */
<> 128:9bcdf88f62b0 242 #define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
<> 128:9bcdf88f62b0 243
<> 128:9bcdf88f62b0 244 /**
<> 128:9bcdf88f62b0 245 * @brief Clears the EXTI's line pending flags.
<> 128:9bcdf88f62b0 246 * @param __EXTI_LINE__: specifies the EXTI lines flags to clear.
<> 128:9bcdf88f62b0 247 * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
<> 128:9bcdf88f62b0 248 * @retval None
<> 128:9bcdf88f62b0 249 */
<> 128:9bcdf88f62b0 250 #define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
<> 128:9bcdf88f62b0 251
<> 128:9bcdf88f62b0 252 /**
<> 128:9bcdf88f62b0 253 * @brief Checks whether the specified EXTI line is asserted or not.
<> 128:9bcdf88f62b0 254 * @param __EXTI_LINE__: specifies the EXTI line to check.
<> 128:9bcdf88f62b0 255 * This parameter can be GPIO_PIN_x where x can be(0..15)
<> 128:9bcdf88f62b0 256 * @retval The new state of __EXTI_LINE__ (SET or RESET).
<> 128:9bcdf88f62b0 257 */
<> 128:9bcdf88f62b0 258 #define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
<> 128:9bcdf88f62b0 259
<> 128:9bcdf88f62b0 260 /**
<> 128:9bcdf88f62b0 261 * @brief Clears the EXTI's line pending bits.
<> 128:9bcdf88f62b0 262 * @param __EXTI_LINE__: specifies the EXTI lines to clear.
<> 128:9bcdf88f62b0 263 * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
<> 128:9bcdf88f62b0 264 * @retval None
<> 128:9bcdf88f62b0 265 */
<> 128:9bcdf88f62b0 266 #define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
<> 128:9bcdf88f62b0 267
<> 128:9bcdf88f62b0 268 /**
<> 128:9bcdf88f62b0 269 * @brief Generates a Software interrupt on selected EXTI line.
<> 128:9bcdf88f62b0 270 * @param __EXTI_LINE__: specifies the EXTI line to check.
<> 128:9bcdf88f62b0 271 * This parameter can be GPIO_PIN_x where x can be(0..15)
<> 128:9bcdf88f62b0 272 * @retval None
<> 128:9bcdf88f62b0 273 */
<> 128:9bcdf88f62b0 274 #define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__))
<> 128:9bcdf88f62b0 275
<> 128:9bcdf88f62b0 276 /**
<> 128:9bcdf88f62b0 277 * @}
<> 128:9bcdf88f62b0 278 */
<> 128:9bcdf88f62b0 279
<> 128:9bcdf88f62b0 280 /* Include GPIO HAL Extension module */
<> 128:9bcdf88f62b0 281 #include "stm32l1xx_hal_gpio_ex.h"
<> 128:9bcdf88f62b0 282
<> 128:9bcdf88f62b0 283 /* Exported functions --------------------------------------------------------*/
<> 128:9bcdf88f62b0 284 /** @defgroup GPIO_Exported_Functions GPIO Exported Functions
<> 128:9bcdf88f62b0 285 * @brief GPIO Exported Functions
<> 128:9bcdf88f62b0 286 * @{
<> 128:9bcdf88f62b0 287 */
<> 128:9bcdf88f62b0 288
<> 128:9bcdf88f62b0 289 /** @defgroup GPIO_Exported_Functions_Group1 Initialization and Configuration functions
<> 128:9bcdf88f62b0 290 * @brief Initialization and Configuration functions
<> 128:9bcdf88f62b0 291 * @{
<> 128:9bcdf88f62b0 292 */
<> 128:9bcdf88f62b0 293
<> 128:9bcdf88f62b0 294 /* Initialization and de-initialization functions *****************************/
<> 128:9bcdf88f62b0 295 void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
<> 128:9bcdf88f62b0 296 void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
<> 128:9bcdf88f62b0 297
<> 128:9bcdf88f62b0 298 /**
<> 128:9bcdf88f62b0 299 * @}
<> 128:9bcdf88f62b0 300 */
<> 128:9bcdf88f62b0 301
<> 128:9bcdf88f62b0 302 /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
<> 128:9bcdf88f62b0 303 * @brief IO operation functions
<> 128:9bcdf88f62b0 304 * @{
<> 128:9bcdf88f62b0 305 */
<> 128:9bcdf88f62b0 306
<> 128:9bcdf88f62b0 307 /* IO operation functions *****************************************************/
<> 128:9bcdf88f62b0 308 GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
<> 128:9bcdf88f62b0 309 void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
<> 128:9bcdf88f62b0 310 void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
<> 128:9bcdf88f62b0 311 HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
<> 128:9bcdf88f62b0 312 void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin);
<> 128:9bcdf88f62b0 313 void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
<> 128:9bcdf88f62b0 314
<> 128:9bcdf88f62b0 315 /**
<> 128:9bcdf88f62b0 316 * @}
<> 128:9bcdf88f62b0 317 */
<> 128:9bcdf88f62b0 318
<> 128:9bcdf88f62b0 319 /**
<> 128:9bcdf88f62b0 320 * @}
<> 128:9bcdf88f62b0 321 */
<> 128:9bcdf88f62b0 322
<> 128:9bcdf88f62b0 323 /**
<> 128:9bcdf88f62b0 324 * @}
<> 128:9bcdf88f62b0 325 */
<> 128:9bcdf88f62b0 326
<> 128:9bcdf88f62b0 327 /**
<> 128:9bcdf88f62b0 328 * @}
<> 128:9bcdf88f62b0 329 */
<> 128:9bcdf88f62b0 330
<> 128:9bcdf88f62b0 331 #ifdef __cplusplus
<> 128:9bcdf88f62b0 332 }
<> 128:9bcdf88f62b0 333 #endif
<> 128:9bcdf88f62b0 334
<> 128:9bcdf88f62b0 335 #endif /* __STM32L1xx_HAL_GPIO_H */
<> 128:9bcdf88f62b0 336
<> 128:9bcdf88f62b0 337 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 128:9bcdf88f62b0 338