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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MOTE_L152RC/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_crc.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
128:9bcdf88f62b0
Child:
165:d1b4690b3f8b
Release 136 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure  https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /**
<> 128:9bcdf88f62b0 2 ******************************************************************************
<> 128:9bcdf88f62b0 3 * @file stm32l1xx_hal_crc.h
<> 128:9bcdf88f62b0 4 * @author MCD Application Team
<> 128:9bcdf88f62b0 5 * @version V1.2.0
<> 128:9bcdf88f62b0 6 * @date 01-July-2016
<> 128:9bcdf88f62b0 7 * @brief Header file of CRC HAL module.
<> 128:9bcdf88f62b0 8 ******************************************************************************
<> 128:9bcdf88f62b0 9 * @attention
<> 128:9bcdf88f62b0 10 *
<> 128:9bcdf88f62b0 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 128:9bcdf88f62b0 12 *
<> 128:9bcdf88f62b0 13 * Redistribution and use in source and binary forms, with or without modification,
<> 128:9bcdf88f62b0 14 * are permitted provided that the following conditions are met:
<> 128:9bcdf88f62b0 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 128:9bcdf88f62b0 16 * this list of conditions and the following disclaimer.
<> 128:9bcdf88f62b0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 128:9bcdf88f62b0 18 * this list of conditions and the following disclaimer in the documentation
<> 128:9bcdf88f62b0 19 * and/or other materials provided with the distribution.
<> 128:9bcdf88f62b0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 128:9bcdf88f62b0 21 * may be used to endorse or promote products derived from this software
<> 128:9bcdf88f62b0 22 * without specific prior written permission.
<> 128:9bcdf88f62b0 23 *
<> 128:9bcdf88f62b0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 128:9bcdf88f62b0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 128:9bcdf88f62b0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 128:9bcdf88f62b0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 128:9bcdf88f62b0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 128:9bcdf88f62b0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 128:9bcdf88f62b0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 128:9bcdf88f62b0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 128:9bcdf88f62b0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 128:9bcdf88f62b0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 128:9bcdf88f62b0 34 *
<> 128:9bcdf88f62b0 35 ******************************************************************************
<> 128:9bcdf88f62b0 36 */
<> 128:9bcdf88f62b0 37
<> 128:9bcdf88f62b0 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 128:9bcdf88f62b0 39 #ifndef __STM32L1xx_HAL_CRC_H
<> 128:9bcdf88f62b0 40 #define __STM32L1xx_HAL_CRC_H
<> 128:9bcdf88f62b0 41
<> 128:9bcdf88f62b0 42 #ifdef __cplusplus
<> 128:9bcdf88f62b0 43 extern "C" {
<> 128:9bcdf88f62b0 44 #endif
<> 128:9bcdf88f62b0 45
<> 128:9bcdf88f62b0 46 /* Includes ------------------------------------------------------------------*/
<> 128:9bcdf88f62b0 47 #include "stm32l1xx_hal_def.h"
<> 128:9bcdf88f62b0 48
<> 128:9bcdf88f62b0 49 /** @addtogroup STM32L1xx_HAL_Driver
<> 128:9bcdf88f62b0 50 * @{
<> 128:9bcdf88f62b0 51 */
<> 128:9bcdf88f62b0 52
<> 128:9bcdf88f62b0 53 /** @addtogroup CRC
<> 128:9bcdf88f62b0 54 * @{
<> 128:9bcdf88f62b0 55 */
<> 128:9bcdf88f62b0 56
<> 128:9bcdf88f62b0 57 /* Exported types ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 58
<> 128:9bcdf88f62b0 59 /** @defgroup CRC_Exported_Types CRC Exported Types
<> 128:9bcdf88f62b0 60 * @{
<> 128:9bcdf88f62b0 61 */
<> 128:9bcdf88f62b0 62
<> 128:9bcdf88f62b0 63 /**
<> 128:9bcdf88f62b0 64 * @brief CRC HAL State Structure definition
<> 128:9bcdf88f62b0 65 */
<> 128:9bcdf88f62b0 66 typedef enum
<> 128:9bcdf88f62b0 67 {
<> 128:9bcdf88f62b0 68 HAL_CRC_STATE_RESET = 0x00, /*!< CRC not yet initialized or disabled */
<> 128:9bcdf88f62b0 69 HAL_CRC_STATE_READY = 0x01, /*!< CRC initialized and ready for use */
<> 128:9bcdf88f62b0 70 HAL_CRC_STATE_BUSY = 0x02, /*!< CRC internal process is ongoing */
<> 128:9bcdf88f62b0 71 HAL_CRC_STATE_TIMEOUT = 0x03, /*!< CRC timeout state */
<> 128:9bcdf88f62b0 72 HAL_CRC_STATE_ERROR = 0x04 /*!< CRC error state */
<> 128:9bcdf88f62b0 73
<> 128:9bcdf88f62b0 74 }HAL_CRC_StateTypeDef;
<> 128:9bcdf88f62b0 75
<> 128:9bcdf88f62b0 76 /**
<> 128:9bcdf88f62b0 77 * @brief CRC handle Structure definition
<> 128:9bcdf88f62b0 78 */
<> 128:9bcdf88f62b0 79 typedef struct
<> 128:9bcdf88f62b0 80 {
<> 128:9bcdf88f62b0 81 CRC_TypeDef *Instance; /*!< Register base address */
<> 128:9bcdf88f62b0 82
<> 128:9bcdf88f62b0 83 HAL_LockTypeDef Lock; /*!< CRC locking object */
<> 128:9bcdf88f62b0 84
<> 128:9bcdf88f62b0 85 __IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */
<> 128:9bcdf88f62b0 86
<> 128:9bcdf88f62b0 87 }CRC_HandleTypeDef;
<> 128:9bcdf88f62b0 88
<> 128:9bcdf88f62b0 89 /**
<> 128:9bcdf88f62b0 90 * @}
<> 128:9bcdf88f62b0 91 */
<> 128:9bcdf88f62b0 92
<> 128:9bcdf88f62b0 93 /* Exported constants --------------------------------------------------------*/
<> 128:9bcdf88f62b0 94 /* Exported macro ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 95
<> 128:9bcdf88f62b0 96 /** @defgroup CRC_Exported_Macros CRC Exported Macros
<> 128:9bcdf88f62b0 97 * @{
<> 128:9bcdf88f62b0 98 */
<> 128:9bcdf88f62b0 99
<> 128:9bcdf88f62b0 100 /** @brief Reset CRC handle state
<> 128:9bcdf88f62b0 101 * @param __HANDLE__: CRC handle
<> 128:9bcdf88f62b0 102 * @retval None
<> 128:9bcdf88f62b0 103 */
<> 128:9bcdf88f62b0 104 #define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
<> 128:9bcdf88f62b0 105
<> 128:9bcdf88f62b0 106 /**
<> 128:9bcdf88f62b0 107 * @brief Resets CRC Data Register.
<> 128:9bcdf88f62b0 108 * @param __HANDLE__: CRC handle
<> 128:9bcdf88f62b0 109 * @retval None
<> 128:9bcdf88f62b0 110 */
<> 128:9bcdf88f62b0 111 #define __HAL_CRC_DR_RESET(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR,CRC_CR_RESET))
<> 128:9bcdf88f62b0 112
<> 128:9bcdf88f62b0 113 /**
<> 128:9bcdf88f62b0 114 * @brief Stores a 8-bit data in the Independent Data(ID) register.
<> 128:9bcdf88f62b0 115 * @param __HANDLE__: CRC handle
<> 128:9bcdf88f62b0 116 * @param __VALUE__: 8-bit value to be stored in the ID register
<> 128:9bcdf88f62b0 117 * @retval None
<> 128:9bcdf88f62b0 118 */
<> 128:9bcdf88f62b0 119 #define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__)))
<> 128:9bcdf88f62b0 120
<> 128:9bcdf88f62b0 121 /**
<> 128:9bcdf88f62b0 122 * @brief Returns the 8-bit data stored in the Independent Data(ID) register.
<> 128:9bcdf88f62b0 123 * @param __HANDLE__: CRC handle
<> 128:9bcdf88f62b0 124 * @retval 8-bit value of the ID register
<> 128:9bcdf88f62b0 125 */
<> 128:9bcdf88f62b0 126 #define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
<> 128:9bcdf88f62b0 127
<> 128:9bcdf88f62b0 128 /**
<> 128:9bcdf88f62b0 129 * @}
<> 128:9bcdf88f62b0 130 */
<> 128:9bcdf88f62b0 131
<> 128:9bcdf88f62b0 132 /* Exported functions --------------------------------------------------------*/
<> 128:9bcdf88f62b0 133
<> 128:9bcdf88f62b0 134 /** @addtogroup CRC_Exported_Functions
<> 128:9bcdf88f62b0 135 * @{
<> 128:9bcdf88f62b0 136 */
<> 128:9bcdf88f62b0 137
<> 128:9bcdf88f62b0 138 /** @addtogroup CRC_Exported_Functions_Group1
<> 128:9bcdf88f62b0 139 * @{
<> 128:9bcdf88f62b0 140 */
<> 128:9bcdf88f62b0 141
<> 128:9bcdf88f62b0 142 /* Initialization/de-initialization functions **********************************/
<> 128:9bcdf88f62b0 143 HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
<> 128:9bcdf88f62b0 144 HAL_StatusTypeDef HAL_CRC_DeInit (CRC_HandleTypeDef *hcrc);
<> 128:9bcdf88f62b0 145 void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
<> 128:9bcdf88f62b0 146 void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
<> 128:9bcdf88f62b0 147
<> 128:9bcdf88f62b0 148 /**
<> 128:9bcdf88f62b0 149 * @}
<> 128:9bcdf88f62b0 150 */
<> 128:9bcdf88f62b0 151
<> 128:9bcdf88f62b0 152 /** @addtogroup CRC_Exported_Functions_Group2
<> 128:9bcdf88f62b0 153 * @{
<> 128:9bcdf88f62b0 154 */
<> 128:9bcdf88f62b0 155
<> 128:9bcdf88f62b0 156 /** @addtogroup CRC_Exported_Functions_Group3
<> 128:9bcdf88f62b0 157 ** @{
<> 128:9bcdf88f62b0 158 */
<> 128:9bcdf88f62b0 159 /* Peripheral Control functions ************************************************/
<> 128:9bcdf88f62b0 160 uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
<> 128:9bcdf88f62b0 161 uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
<> 128:9bcdf88f62b0 162
<> 128:9bcdf88f62b0 163 /* Peripheral State functions **************************************************/
<> 128:9bcdf88f62b0 164 HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
<> 128:9bcdf88f62b0 165
<> 128:9bcdf88f62b0 166 /**
<> 128:9bcdf88f62b0 167 * @}
<> 128:9bcdf88f62b0 168 */
<> 128:9bcdf88f62b0 169
<> 128:9bcdf88f62b0 170 /**
<> 128:9bcdf88f62b0 171 * @}
<> 128:9bcdf88f62b0 172 */
<> 128:9bcdf88f62b0 173
<> 128:9bcdf88f62b0 174 /**
<> 128:9bcdf88f62b0 175 * @}
<> 128:9bcdf88f62b0 176 */
<> 128:9bcdf88f62b0 177
<> 128:9bcdf88f62b0 178 /**
<> 128:9bcdf88f62b0 179 * @}
<> 128:9bcdf88f62b0 180 */
<> 128:9bcdf88f62b0 181
<> 128:9bcdf88f62b0 182 /**
<> 128:9bcdf88f62b0 183 * @}
<> 128:9bcdf88f62b0 184 */
<> 128:9bcdf88f62b0 185
<> 128:9bcdf88f62b0 186 #ifdef __cplusplus
<> 128:9bcdf88f62b0 187 }
<> 128:9bcdf88f62b0 188 #endif
<> 128:9bcdf88f62b0 189
<> 128:9bcdf88f62b0 190 #endif /* __STM32L1xx_HAL_CRC_H */
<> 128:9bcdf88f62b0 191
<> 128:9bcdf88f62b0 192 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/