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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MOTE_L152RC/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_comp_ex.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
128:9bcdf88f62b0
Child:
165:d1b4690b3f8b
Release 136 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure  https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /**
<> 128:9bcdf88f62b0 2 ******************************************************************************
<> 128:9bcdf88f62b0 3 * @file stm32l1xx_hal_comp_ex.h
<> 128:9bcdf88f62b0 4 * @author MCD Application Team
<> 128:9bcdf88f62b0 5 * @version V1.2.0
<> 128:9bcdf88f62b0 6 * @date 01-July-2016
<> 128:9bcdf88f62b0 7 * @brief Header file of COMP HAL Extension module.
<> 128:9bcdf88f62b0 8 ******************************************************************************
<> 128:9bcdf88f62b0 9 * @attention
<> 128:9bcdf88f62b0 10 *
<> 128:9bcdf88f62b0 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 128:9bcdf88f62b0 12 *
<> 128:9bcdf88f62b0 13 * Redistribution and use in source and binary forms, with or without modification,
<> 128:9bcdf88f62b0 14 * are permitted provided that the following conditions are met:
<> 128:9bcdf88f62b0 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 128:9bcdf88f62b0 16 * this list of conditions and the following disclaimer.
<> 128:9bcdf88f62b0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 128:9bcdf88f62b0 18 * this list of conditions and the following disclaimer in the documentation
<> 128:9bcdf88f62b0 19 * and/or other materials provided with the distribution.
<> 128:9bcdf88f62b0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 128:9bcdf88f62b0 21 * may be used to endorse or promote products derived from this software
<> 128:9bcdf88f62b0 22 * without specific prior written permission.
<> 128:9bcdf88f62b0 23 *
<> 128:9bcdf88f62b0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 128:9bcdf88f62b0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 128:9bcdf88f62b0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 128:9bcdf88f62b0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 128:9bcdf88f62b0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 128:9bcdf88f62b0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 128:9bcdf88f62b0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 128:9bcdf88f62b0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 128:9bcdf88f62b0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 128:9bcdf88f62b0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 128:9bcdf88f62b0 34 *
<> 128:9bcdf88f62b0 35 ******************************************************************************
<> 128:9bcdf88f62b0 36 */
<> 128:9bcdf88f62b0 37
<> 128:9bcdf88f62b0 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 128:9bcdf88f62b0 39 #ifndef __STM32L1xx_HAL_COMP_EX_H
<> 128:9bcdf88f62b0 40 #define __STM32L1xx_HAL_COMP_EX_H
<> 128:9bcdf88f62b0 41
<> 128:9bcdf88f62b0 42 #ifdef __cplusplus
<> 128:9bcdf88f62b0 43 extern "C" {
<> 128:9bcdf88f62b0 44 #endif
<> 128:9bcdf88f62b0 45
<> 128:9bcdf88f62b0 46 /* Includes ------------------------------------------------------------------*/
<> 128:9bcdf88f62b0 47 #include "stm32l1xx_hal_def.h"
<> 128:9bcdf88f62b0 48
<> 128:9bcdf88f62b0 49 /** @addtogroup STM32L1xx_HAL_Driver
<> 128:9bcdf88f62b0 50 * @{
<> 128:9bcdf88f62b0 51 */
<> 128:9bcdf88f62b0 52
<> 128:9bcdf88f62b0 53 /** @defgroup COMPEx COMPEx
<> 128:9bcdf88f62b0 54 * @{
<> 128:9bcdf88f62b0 55 */
<> 128:9bcdf88f62b0 56
<> 128:9bcdf88f62b0 57 /* Exported types ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 58 /* Exported constants --------------------------------------------------------*/
<> 128:9bcdf88f62b0 59 /** @defgroup COMPEx_Exported_Constants COMPEx Exported Constants
<> 128:9bcdf88f62b0 60 * @{
<> 128:9bcdf88f62b0 61 */
<> 128:9bcdf88f62b0 62
<> 128:9bcdf88f62b0 63 /** @defgroup COMPEx_NonInvertingInput COMPEx NonInvertingInput
<> 128:9bcdf88f62b0 64 * @{
<> 128:9bcdf88f62b0 65 */
<> 128:9bcdf88f62b0 66 #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
<> 128:9bcdf88f62b0 67 /* Non-inverting inputs specific to COMP2 */
<> 128:9bcdf88f62b0 68 #define COMP_NONINVERTINGINPUT_PB4 RI_IOSWITCH_GR6_1 /*!< I/O pin PB4 connection to COMP2 non-inverting input */
<> 128:9bcdf88f62b0 69 #define COMP_NONINVERTINGINPUT_PB5 RI_IOSWITCH_GR6_2 /*!< I/O pin PB5 connection to COMP2 non-inverting input */
<> 128:9bcdf88f62b0 70 #define COMP_NONINVERTINGINPUT_PB6 RI_IOSWITCH_GR6_3 /*!< I/O pin PB6 connection to COMP2 non-inverting input */
<> 128:9bcdf88f62b0 71 #define COMP_NONINVERTINGINPUT_PB7 RI_IOSWITCH_GR6_4 /*!< I/O pin PB7 connection to COMP2 non-inverting input */
<> 128:9bcdf88f62b0 72
<> 128:9bcdf88f62b0 73 /* Non-inverting inputs specific to COMP1 */
<> 128:9bcdf88f62b0 74 #define COMP_NONINVERTINGINPUT_NONE (0x00000000U) /*!< In case of window mode: No I/O pin connection to COMP1 non-inverting input. Instead, connection to COMP2 non-inverting input. */
<> 128:9bcdf88f62b0 75 #define COMP_NONINVERTINGINPUT_PA0 RI_IOSWITCH_CH0 /*!< I/O pin PA0 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 76 #define COMP_NONINVERTINGINPUT_PA1 RI_IOSWITCH_CH1 /*!< I/O pin PA1 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 77 #define COMP_NONINVERTINGINPUT_PA2 RI_IOSWITCH_CH2 /*!< I/O pin PA2 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 78 #define COMP_NONINVERTINGINPUT_PA3 RI_IOSWITCH_CH3 /*!< I/O pin PA3 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 79 #define COMP_NONINVERTINGINPUT_PA4 RI_IOSWITCH_CH4 /*!< I/O pin PA4 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 80 #define COMP_NONINVERTINGINPUT_PA5 RI_IOSWITCH_CH5 /*!< I/O pin PA5 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 81 #define COMP_NONINVERTINGINPUT_PA6 RI_IOSWITCH_CH5 /*!< I/O pin PA5 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 82 #define COMP_NONINVERTINGINPUT_PA7 RI_IOSWITCH_CH7 /*!< I/O pin PA7 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 83 #define COMP_NONINVERTINGINPUT_PB0 RI_IOSWITCH_CH8 /*!< I/O pin PB0 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 84 #define COMP_NONINVERTINGINPUT_PB1 RI_IOSWITCH_CH9 /*!< I/O pin PB1 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 85 #define COMP_NONINVERTINGINPUT_PC0 RI_IOSWITCH_CH10 /*!< I/O pin PC0 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 86 #define COMP_NONINVERTINGINPUT_PC1 RI_IOSWITCH_CH11 /*!< I/O pin PC1 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 87 #define COMP_NONINVERTINGINPUT_PC2 RI_IOSWITCH_CH12 /*!< I/O pin PC2 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 88 #define COMP_NONINVERTINGINPUT_PC3 RI_IOSWITCH_CH13 /*!< I/O pin PC3 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 89 #define COMP_NONINVERTINGINPUT_PC4 RI_IOSWITCH_CH14 /*!< I/O pin PC4 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 90 #define COMP_NONINVERTINGINPUT_PC5 RI_IOSWITCH_CH15 /*!< I/O pin PC5 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 91 #define COMP_NONINVERTINGINPUT_PB12 RI_IOSWITCH_CH18 /*!< I/O pin PB12 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 92 #define COMP_NONINVERTINGINPUT_PB13 RI_IOSWITCH_CH19 /*!< I/O pin PB13 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 93 #define COMP_NONINVERTINGINPUT_PB14 RI_IOSWITCH_CH20 /*!< I/O pin PB14 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 94 #define COMP_NONINVERTINGINPUT_PB15 RI_IOSWITCH_CH21 /*!< I/O pin PB15 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 95 #define COMP_NONINVERTINGINPUT_PE7 RI_IOSWITCH_CH22 /*!< I/O pin PE7 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 96 #define COMP_NONINVERTINGINPUT_PE8 RI_IOSWITCH_CH23 /*!< I/O pin PE8 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 97 #define COMP_NONINVERTINGINPUT_PE9 RI_IOSWITCH_CH24 /*!< I/O pin PE9 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 98 #define COMP_NONINVERTINGINPUT_PE10 RI_IOSWITCH_CH25 /*!< I/O pin PE10 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 99 #define COMP_NONINVERTINGINPUT_PF6 RI_IOSWITCH_CH27 /*!< I/O pin PF6 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 100 #define COMP_NONINVERTINGINPUT_PF7 RI_IOSWITCH_CH28 /*!< I/O pin PF7 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 101 #define COMP_NONINVERTINGINPUT_PF8 RI_IOSWITCH_CH29 /*!< I/O pin PF8 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 102 #define COMP_NONINVERTINGINPUT_PF9 RI_IOSWITCH_CH30 /*!< I/O pin PF9 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 103 #define COMP_NONINVERTINGINPUT_PF10 RI_IOSWITCH_CH31 /*!< I/O pin PF10 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 104
<> 128:9bcdf88f62b0 105 #define COMP_NONINVERTINGINPUT_OPAMP1 COMP_NONINVERTINGINPUT_PA3 /*!< OPAMP1 output connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 106 #define COMP_NONINVERTINGINPUT_OPAMP2 COMP_NONINVERTINGINPUT_PB0 /*!< OPAMP2 output connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 107 #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD)
<> 128:9bcdf88f62b0 108 #define COMP_NONINVERTINGINPUT_OPAMP3 COMP_NONINVERTINGINPUT_PC3 /*!< OPAMP3 output connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 109 #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD */
<> 128:9bcdf88f62b0 110 #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
<> 128:9bcdf88f62b0 111
<> 128:9bcdf88f62b0 112 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC)
<> 128:9bcdf88f62b0 113 /* Non-inverting inputs specific to COMP2 */
<> 128:9bcdf88f62b0 114 #define COMP_NONINVERTINGINPUT_PB4 RI_IOSWITCH_GR6_1 /*!< I/O pin PB4 connection to COMP2 non-inverting input */
<> 128:9bcdf88f62b0 115 #define COMP_NONINVERTINGINPUT_PB5 RI_IOSWITCH_GR6_2 /*!< I/O pin PB5 connection to COMP2 non-inverting input */
<> 128:9bcdf88f62b0 116 #define COMP_NONINVERTINGINPUT_PB6 RI_IOSWITCH_GR6_3 /*!< I/O pin PB6 connection to COMP2 non-inverting input */
<> 128:9bcdf88f62b0 117 #define COMP_NONINVERTINGINPUT_PB7 RI_IOSWITCH_GR6_4 /*!< I/O pin PB7 connection to COMP2 non-inverting input */
<> 128:9bcdf88f62b0 118
<> 128:9bcdf88f62b0 119 /* Non-inverting inputs specific to COMP1 */
<> 128:9bcdf88f62b0 120 #define COMP_NONINVERTINGINPUT_NONE (0x00000000U) /*!< In case of window mode: No I/O pin connection to COMP1 non-inverting input. Instead, connection to COMP2 non-inverting input. */
<> 128:9bcdf88f62b0 121 #define COMP_NONINVERTINGINPUT_PA0 RI_IOSWITCH_CH0 /*!< I/O pin PA0 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 122 #define COMP_NONINVERTINGINPUT_PA1 RI_IOSWITCH_CH1 /*!< I/O pin PA1 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 123 #define COMP_NONINVERTINGINPUT_PA2 RI_IOSWITCH_CH2 /*!< I/O pin PA2 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 124 #define COMP_NONINVERTINGINPUT_PA3 RI_IOSWITCH_CH3 /*!< I/O pin PA3 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 125 #define COMP_NONINVERTINGINPUT_PA4 RI_IOSWITCH_CH4 /*!< I/O pin PA4 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 126 #define COMP_NONINVERTINGINPUT_PA5 RI_IOSWITCH_CH5 /*!< I/O pin PA5 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 127 #define COMP_NONINVERTINGINPUT_PA6 RI_IOSWITCH_CH5 /*!< I/O pin PA5 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 128 #define COMP_NONINVERTINGINPUT_PA7 RI_IOSWITCH_CH7 /*!< I/O pin PA7 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 129 #define COMP_NONINVERTINGINPUT_PB0 RI_IOSWITCH_CH8 /*!< I/O pin PB0 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 130 #define COMP_NONINVERTINGINPUT_PB1 RI_IOSWITCH_CH9 /*!< I/O pin PB1 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 131 #define COMP_NONINVERTINGINPUT_PC0 RI_IOSWITCH_CH10 /*!< I/O pin PC0 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 132 #define COMP_NONINVERTINGINPUT_PC1 RI_IOSWITCH_CH11 /*!< I/O pin PC1 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 133 #define COMP_NONINVERTINGINPUT_PC2 RI_IOSWITCH_CH12 /*!< I/O pin PC2 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 134 #define COMP_NONINVERTINGINPUT_PC3 RI_IOSWITCH_CH13 /*!< I/O pin PC3 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 135 #define COMP_NONINVERTINGINPUT_PC4 RI_IOSWITCH_CH14 /*!< I/O pin PC4 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 136 #define COMP_NONINVERTINGINPUT_PC5 RI_IOSWITCH_CH15 /*!< I/O pin PC5 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 137 #define COMP_NONINVERTINGINPUT_PB12 RI_IOSWITCH_CH18 /*!< I/O pin PB12 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 138 #define COMP_NONINVERTINGINPUT_PB13 RI_IOSWITCH_CH19 /*!< I/O pin PB13 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 139 #define COMP_NONINVERTINGINPUT_PB14 RI_IOSWITCH_CH20 /*!< I/O pin PB14 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 140 #define COMP_NONINVERTINGINPUT_PB15 RI_IOSWITCH_CH21 /*!< I/O pin PB15 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 141 #define COMP_NONINVERTINGINPUT_PE7 RI_IOSWITCH_CH22 /*!< I/O pin PE7 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 142 #define COMP_NONINVERTINGINPUT_PE8 RI_IOSWITCH_CH23 /*!< I/O pin PE8 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 143 #define COMP_NONINVERTINGINPUT_PE9 RI_IOSWITCH_CH24 /*!< I/O pin PE9 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 144 #define COMP_NONINVERTINGINPUT_PE10 RI_IOSWITCH_CH25 /*!< I/O pin PE10 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 145
<> 128:9bcdf88f62b0 146 #define COMP_NONINVERTINGINPUT_OPAMP1 COMP_NONINVERTINGINPUT_PA3 /*!< OPAMP1 output connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 147 #define COMP_NONINVERTINGINPUT_OPAMP2 COMP_NONINVERTINGINPUT_PB0 /*!< OPAMP2 output connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 148 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC */
<> 128:9bcdf88f62b0 149
<> 128:9bcdf88f62b0 150 #if defined(STM32L100xB) || defined (STM32L151xB) || defined (STM32L152xB) || defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA)
<> 128:9bcdf88f62b0 151 /* Non-inverting inputs specific to COMP2 */
<> 128:9bcdf88f62b0 152 #define COMP_NONINVERTINGINPUT_PB4 RI_IOSWITCH_GR6_1 /*!< I/O pin PB4 connection to COMP2 non-inverting input */
<> 128:9bcdf88f62b0 153 #define COMP_NONINVERTINGINPUT_PB5 RI_IOSWITCH_GR6_2 /*!< I/O pin PB5 connection to COMP2 non-inverting input */
<> 128:9bcdf88f62b0 154
<> 128:9bcdf88f62b0 155 /* Non-inverting inputs specific to COMP1 */
<> 128:9bcdf88f62b0 156 #define COMP_NONINVERTINGINPUT_NONE (0x00000000U) /*!< In case of window mode: No I/O pin connection to COMP1 non-inverting input. Instead, connection to COMP2 non-inverting input. */
<> 128:9bcdf88f62b0 157 #define COMP_NONINVERTINGINPUT_PA0 RI_IOSWITCH_CH0 /*!< I/O pin PA0 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 158 #define COMP_NONINVERTINGINPUT_PA1 RI_IOSWITCH_CH1 /*!< I/O pin PA1 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 159 #define COMP_NONINVERTINGINPUT_PA2 RI_IOSWITCH_CH2 /*!< I/O pin PA2 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 160 #define COMP_NONINVERTINGINPUT_PA3 RI_IOSWITCH_CH3 /*!< I/O pin PA3 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 161 #define COMP_NONINVERTINGINPUT_PA4 RI_IOSWITCH_CH4 /*!< I/O pin PA4 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 162 #define COMP_NONINVERTINGINPUT_PA5 RI_IOSWITCH_CH5 /*!< I/O pin PA5 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 163 #define COMP_NONINVERTINGINPUT_PA6 RI_IOSWITCH_CH5 /*!< I/O pin PA5 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 164 #define COMP_NONINVERTINGINPUT_PA7 RI_IOSWITCH_CH7 /*!< I/O pin PA7 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 165 #define COMP_NONINVERTINGINPUT_PB0 RI_IOSWITCH_CH8 /*!< I/O pin PB0 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 166 #define COMP_NONINVERTINGINPUT_PB1 RI_IOSWITCH_CH9 /*!< I/O pin PB1 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 167 #define COMP_NONINVERTINGINPUT_PC0 RI_IOSWITCH_CH10 /*!< I/O pin PC0 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 168 #define COMP_NONINVERTINGINPUT_PC1 RI_IOSWITCH_CH11 /*!< I/O pin PC1 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 169 #define COMP_NONINVERTINGINPUT_PC2 RI_IOSWITCH_CH12 /*!< I/O pin PC2 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 170 #define COMP_NONINVERTINGINPUT_PC3 RI_IOSWITCH_CH13 /*!< I/O pin PC3 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 171 #define COMP_NONINVERTINGINPUT_PC4 RI_IOSWITCH_CH14 /*!< I/O pin PC4 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 172 #define COMP_NONINVERTINGINPUT_PC5 RI_IOSWITCH_CH15 /*!< I/O pin PC5 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 173 #define COMP_NONINVERTINGINPUT_PB12 RI_IOSWITCH_CH18 /*!< I/O pin PB12 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 174 #define COMP_NONINVERTINGINPUT_PB13 RI_IOSWITCH_CH19 /*!< I/O pin PB13 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 175 #define COMP_NONINVERTINGINPUT_PB14 RI_IOSWITCH_CH20 /*!< I/O pin PB14 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 176 #define COMP_NONINVERTINGINPUT_PB15 RI_IOSWITCH_CH21 /*!< I/O pin PB15 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 177 #define COMP_NONINVERTINGINPUT_PE7 RI_IOSWITCH_CH22 /*!< I/O pin PE7 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 178 #define COMP_NONINVERTINGINPUT_PE8 RI_IOSWITCH_CH23 /*!< I/O pin PE8 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 179 #define COMP_NONINVERTINGINPUT_PE9 RI_IOSWITCH_CH24 /*!< I/O pin PE9 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 180 #define COMP_NONINVERTINGINPUT_PE10 RI_IOSWITCH_CH25 /*!< I/O pin PE10 connection to COMP1 non-inverting input */
<> 128:9bcdf88f62b0 181
<> 128:9bcdf88f62b0 182 #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA || STM32L151xBA || STM32L152xBA */
<> 128:9bcdf88f62b0 183
<> 128:9bcdf88f62b0 184 #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
<> 128:9bcdf88f62b0 185 #define IS_COMP_NONINVERTINGINPUT(INPUT) (((INPUT) == COMP_NONINVERTINGINPUT_PB4) || \
<> 128:9bcdf88f62b0 186 ((INPUT) == COMP_NONINVERTINGINPUT_PB5) || \
<> 128:9bcdf88f62b0 187 ((INPUT) == COMP_NONINVERTINGINPUT_PB6) || \
<> 128:9bcdf88f62b0 188 ((INPUT) == COMP_NONINVERTINGINPUT_PB7) || \
<> 128:9bcdf88f62b0 189 ((INPUT) == COMP_NONINVERTINGINPUT_NONE) || \
<> 128:9bcdf88f62b0 190 ((INPUT) == COMP_NONINVERTINGINPUT_PA0) || \
<> 128:9bcdf88f62b0 191 ((INPUT) == COMP_NONINVERTINGINPUT_PA1) || \
<> 128:9bcdf88f62b0 192 ((INPUT) == COMP_NONINVERTINGINPUT_PA2) || \
<> 128:9bcdf88f62b0 193 ((INPUT) == COMP_NONINVERTINGINPUT_PA3) || \
<> 128:9bcdf88f62b0 194 ((INPUT) == COMP_NONINVERTINGINPUT_PA4) || \
<> 128:9bcdf88f62b0 195 ((INPUT) == COMP_NONINVERTINGINPUT_PA5) || \
<> 128:9bcdf88f62b0 196 ((INPUT) == COMP_NONINVERTINGINPUT_PA6) || \
<> 128:9bcdf88f62b0 197 ((INPUT) == COMP_NONINVERTINGINPUT_PA7) || \
<> 128:9bcdf88f62b0 198 ((INPUT) == COMP_NONINVERTINGINPUT_PB0) || \
<> 128:9bcdf88f62b0 199 ((INPUT) == COMP_NONINVERTINGINPUT_PB1) || \
<> 128:9bcdf88f62b0 200 ((INPUT) == COMP_NONINVERTINGINPUT_PC0) || \
<> 128:9bcdf88f62b0 201 ((INPUT) == COMP_NONINVERTINGINPUT_PC1) || \
<> 128:9bcdf88f62b0 202 ((INPUT) == COMP_NONINVERTINGINPUT_PC2) || \
<> 128:9bcdf88f62b0 203 ((INPUT) == COMP_NONINVERTINGINPUT_PC3) || \
<> 128:9bcdf88f62b0 204 ((INPUT) == COMP_NONINVERTINGINPUT_PC4) || \
<> 128:9bcdf88f62b0 205 ((INPUT) == COMP_NONINVERTINGINPUT_PC5) || \
<> 128:9bcdf88f62b0 206 ((INPUT) == COMP_NONINVERTINGINPUT_PB12) || \
<> 128:9bcdf88f62b0 207 ((INPUT) == COMP_NONINVERTINGINPUT_PB13) || \
<> 128:9bcdf88f62b0 208 ((INPUT) == COMP_NONINVERTINGINPUT_PB14) || \
<> 128:9bcdf88f62b0 209 ((INPUT) == COMP_NONINVERTINGINPUT_PB15) || \
<> 128:9bcdf88f62b0 210 ((INPUT) == COMP_NONINVERTINGINPUT_PE7) || \
<> 128:9bcdf88f62b0 211 ((INPUT) == COMP_NONINVERTINGINPUT_PE8) || \
<> 128:9bcdf88f62b0 212 ((INPUT) == COMP_NONINVERTINGINPUT_PE9) || \
<> 128:9bcdf88f62b0 213 ((INPUT) == COMP_NONINVERTINGINPUT_PE10) || \
<> 128:9bcdf88f62b0 214 ((INPUT) == COMP_NONINVERTINGINPUT_PF6) || \
<> 128:9bcdf88f62b0 215 ((INPUT) == COMP_NONINVERTINGINPUT_PF7) || \
<> 128:9bcdf88f62b0 216 ((INPUT) == COMP_NONINVERTINGINPUT_PF8) || \
<> 128:9bcdf88f62b0 217 ((INPUT) == COMP_NONINVERTINGINPUT_PF9) || \
<> 128:9bcdf88f62b0 218 ((INPUT) == COMP_NONINVERTINGINPUT_PF10) )
<> 128:9bcdf88f62b0 219 #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
<> 128:9bcdf88f62b0 220
<> 128:9bcdf88f62b0 221 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC)
<> 128:9bcdf88f62b0 222 #define IS_COMP_NONINVERTINGINPUT(INPUT) (((INPUT) == COMP_NONINVERTINGINPUT_PB4) || \
<> 128:9bcdf88f62b0 223 ((INPUT) == COMP_NONINVERTINGINPUT_PB5) || \
<> 128:9bcdf88f62b0 224 ((INPUT) == COMP_NONINVERTINGINPUT_PB6) || \
<> 128:9bcdf88f62b0 225 ((INPUT) == COMP_NONINVERTINGINPUT_PB7) || \
<> 128:9bcdf88f62b0 226 ((INPUT) == COMP_NONINVERTINGINPUT_NONE) || \
<> 128:9bcdf88f62b0 227 ((INPUT) == COMP_NONINVERTINGINPUT_PA0) || \
<> 128:9bcdf88f62b0 228 ((INPUT) == COMP_NONINVERTINGINPUT_PA1) || \
<> 128:9bcdf88f62b0 229 ((INPUT) == COMP_NONINVERTINGINPUT_PA2) || \
<> 128:9bcdf88f62b0 230 ((INPUT) == COMP_NONINVERTINGINPUT_PA3) || \
<> 128:9bcdf88f62b0 231 ((INPUT) == COMP_NONINVERTINGINPUT_PA4) || \
<> 128:9bcdf88f62b0 232 ((INPUT) == COMP_NONINVERTINGINPUT_PA5) || \
<> 128:9bcdf88f62b0 233 ((INPUT) == COMP_NONINVERTINGINPUT_PA6) || \
<> 128:9bcdf88f62b0 234 ((INPUT) == COMP_NONINVERTINGINPUT_PA7) || \
<> 128:9bcdf88f62b0 235 ((INPUT) == COMP_NONINVERTINGINPUT_PB0) || \
<> 128:9bcdf88f62b0 236 ((INPUT) == COMP_NONINVERTINGINPUT_PB1) || \
<> 128:9bcdf88f62b0 237 ((INPUT) == COMP_NONINVERTINGINPUT_PC0) || \
<> 128:9bcdf88f62b0 238 ((INPUT) == COMP_NONINVERTINGINPUT_PC1) || \
<> 128:9bcdf88f62b0 239 ((INPUT) == COMP_NONINVERTINGINPUT_PC2) || \
<> 128:9bcdf88f62b0 240 ((INPUT) == COMP_NONINVERTINGINPUT_PC3) || \
<> 128:9bcdf88f62b0 241 ((INPUT) == COMP_NONINVERTINGINPUT_PC4) || \
<> 128:9bcdf88f62b0 242 ((INPUT) == COMP_NONINVERTINGINPUT_PC5) || \
<> 128:9bcdf88f62b0 243 ((INPUT) == COMP_NONINVERTINGINPUT_PB12) || \
<> 128:9bcdf88f62b0 244 ((INPUT) == COMP_NONINVERTINGINPUT_PB13) || \
<> 128:9bcdf88f62b0 245 ((INPUT) == COMP_NONINVERTINGINPUT_PB14) || \
<> 128:9bcdf88f62b0 246 ((INPUT) == COMP_NONINVERTINGINPUT_PB15) || \
<> 128:9bcdf88f62b0 247 ((INPUT) == COMP_NONINVERTINGINPUT_PE7) || \
<> 128:9bcdf88f62b0 248 ((INPUT) == COMP_NONINVERTINGINPUT_PE8) || \
<> 128:9bcdf88f62b0 249 ((INPUT) == COMP_NONINVERTINGINPUT_PE9) || \
<> 128:9bcdf88f62b0 250 ((INPUT) == COMP_NONINVERTINGINPUT_PE10) )
<> 128:9bcdf88f62b0 251 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC */
<> 128:9bcdf88f62b0 252
<> 128:9bcdf88f62b0 253 #if defined(STM32L100xB) || defined (STM32L151xB) || defined (STM32L152xB) || defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA)
<> 128:9bcdf88f62b0 254 #define IS_COMP_NONINVERTINGINPUT(INPUT) (((INPUT) == COMP_NONINVERTINGINPUT_PB4) || \
<> 128:9bcdf88f62b0 255 ((INPUT) == COMP_NONINVERTINGINPUT_PB5) || \
<> 128:9bcdf88f62b0 256 ((INPUT) == COMP_NONINVERTINGINPUT_NONE) || \
<> 128:9bcdf88f62b0 257 ((INPUT) == COMP_NONINVERTINGINPUT_PA0) || \
<> 128:9bcdf88f62b0 258 ((INPUT) == COMP_NONINVERTINGINPUT_PA1) || \
<> 128:9bcdf88f62b0 259 ((INPUT) == COMP_NONINVERTINGINPUT_PA2) || \
<> 128:9bcdf88f62b0 260 ((INPUT) == COMP_NONINVERTINGINPUT_PA3) || \
<> 128:9bcdf88f62b0 261 ((INPUT) == COMP_NONINVERTINGINPUT_PA4) || \
<> 128:9bcdf88f62b0 262 ((INPUT) == COMP_NONINVERTINGINPUT_PA5) || \
<> 128:9bcdf88f62b0 263 ((INPUT) == COMP_NONINVERTINGINPUT_PA6) || \
<> 128:9bcdf88f62b0 264 ((INPUT) == COMP_NONINVERTINGINPUT_PA7) || \
<> 128:9bcdf88f62b0 265 ((INPUT) == COMP_NONINVERTINGINPUT_PB0) || \
<> 128:9bcdf88f62b0 266 ((INPUT) == COMP_NONINVERTINGINPUT_PB1) || \
<> 128:9bcdf88f62b0 267 ((INPUT) == COMP_NONINVERTINGINPUT_PC0) || \
<> 128:9bcdf88f62b0 268 ((INPUT) == COMP_NONINVERTINGINPUT_PC1) || \
<> 128:9bcdf88f62b0 269 ((INPUT) == COMP_NONINVERTINGINPUT_PC2) || \
<> 128:9bcdf88f62b0 270 ((INPUT) == COMP_NONINVERTINGINPUT_PC3) || \
<> 128:9bcdf88f62b0 271 ((INPUT) == COMP_NONINVERTINGINPUT_PC4) || \
<> 128:9bcdf88f62b0 272 ((INPUT) == COMP_NONINVERTINGINPUT_PC5) || \
<> 128:9bcdf88f62b0 273 ((INPUT) == COMP_NONINVERTINGINPUT_PB12) || \
<> 128:9bcdf88f62b0 274 ((INPUT) == COMP_NONINVERTINGINPUT_PB13) || \
<> 128:9bcdf88f62b0 275 ((INPUT) == COMP_NONINVERTINGINPUT_PB14) || \
<> 128:9bcdf88f62b0 276 ((INPUT) == COMP_NONINVERTINGINPUT_PB15) || \
<> 128:9bcdf88f62b0 277 ((INPUT) == COMP_NONINVERTINGINPUT_PE7) || \
<> 128:9bcdf88f62b0 278 ((INPUT) == COMP_NONINVERTINGINPUT_PE8) || \
<> 128:9bcdf88f62b0 279 ((INPUT) == COMP_NONINVERTINGINPUT_PE9) || \
<> 128:9bcdf88f62b0 280 ((INPUT) == COMP_NONINVERTINGINPUT_PE10) )
<> 128:9bcdf88f62b0 281 #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA || STM32L151xBA || STM32L152xBA */
<> 128:9bcdf88f62b0 282
<> 128:9bcdf88f62b0 283 /**
<> 128:9bcdf88f62b0 284 * @}
<> 128:9bcdf88f62b0 285 */
<> 128:9bcdf88f62b0 286
<> 128:9bcdf88f62b0 287 /**
<> 128:9bcdf88f62b0 288 * @}
<> 128:9bcdf88f62b0 289 */
<> 128:9bcdf88f62b0 290
<> 128:9bcdf88f62b0 291
<> 128:9bcdf88f62b0 292 /* Exported macro ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 293
<> 128:9bcdf88f62b0 294 /** @defgroup COMPEx_Private_Macro COMP Private Macro
<> 128:9bcdf88f62b0 295 * @{
<> 128:9bcdf88f62b0 296 */
<> 128:9bcdf88f62b0 297
<> 128:9bcdf88f62b0 298 /**
<> 128:9bcdf88f62b0 299 * @brief Specifies whether Routing Interface (RI) needs to be configured for
<> 128:9bcdf88f62b0 300 * switches of comparator non-inverting input.
<> 128:9bcdf88f62b0 301 * @param __HANDLE__: COMP handle.
<> 128:9bcdf88f62b0 302 * @retval None.
<> 128:9bcdf88f62b0 303 */
<> 128:9bcdf88f62b0 304 #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
<> 128:9bcdf88f62b0 305 #define __COMP_ROUTING_INTERFACE_TOBECONFIGURED(__HANDLE__) \
<> 128:9bcdf88f62b0 306 (((__HANDLE__)->Init.NonInvertingInput != COMP_NONINVERTINGINPUT_NONE) && \
<> 128:9bcdf88f62b0 307 (READ_BIT(COMP->CSR, COMP_CSR_SW1) == RESET) )
<> 128:9bcdf88f62b0 308 #else
<> 128:9bcdf88f62b0 309 #define __COMP_ROUTING_INTERFACE_TOBECONFIGURED(__HANDLE__) \
<> 128:9bcdf88f62b0 310 ((__HANDLE__)->Init.NonInvertingInput != COMP_NONINVERTINGINPUT_NONE)
<> 128:9bcdf88f62b0 311 #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
<> 128:9bcdf88f62b0 312
<> 128:9bcdf88f62b0 313 /**
<> 128:9bcdf88f62b0 314 * @}
<> 128:9bcdf88f62b0 315 */
<> 128:9bcdf88f62b0 316
<> 128:9bcdf88f62b0 317
<> 128:9bcdf88f62b0 318
<> 128:9bcdf88f62b0 319 /* Exported functions --------------------------------------------------------*/
<> 128:9bcdf88f62b0 320
<> 128:9bcdf88f62b0 321
<> 128:9bcdf88f62b0 322 /**
<> 128:9bcdf88f62b0 323 * @}
<> 128:9bcdf88f62b0 324 */
<> 128:9bcdf88f62b0 325
<> 128:9bcdf88f62b0 326 /**
<> 128:9bcdf88f62b0 327 * @}
<> 128:9bcdf88f62b0 328 */
<> 128:9bcdf88f62b0 329
<> 128:9bcdf88f62b0 330 #ifdef __cplusplus
<> 128:9bcdf88f62b0 331 }
<> 128:9bcdf88f62b0 332 #endif
<> 128:9bcdf88f62b0 333
<> 128:9bcdf88f62b0 334 #endif /* __STM32L1xx_HAL_COMP_EX_H */
<> 128:9bcdf88f62b0 335
<> 128:9bcdf88f62b0 336 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/