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TARGET_DISCO_F303VC/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_ll_i2c.h@163:e59c8e839560, 2018-03-20 (annotated)

Committer:: AnnaBridge
Date:: Tue Mar 20 13:30:58 2018 +0000
Revision:: 163:e59c8e839560
Child:: 168:b9e159c1930a

mbed library. Release version 160

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	163:e59c8e839560	1	/**
AnnaBridge	163:e59c8e839560	2	******************************************************************************
AnnaBridge	163:e59c8e839560	3	* @file stm32f3xx_ll_i2c.h
AnnaBridge	163:e59c8e839560	4	* @author MCD Application Team
AnnaBridge	163:e59c8e839560	5	* @version V1.4.0
AnnaBridge	163:e59c8e839560	6	* @date 16-December-2016
AnnaBridge	163:e59c8e839560	7	* @brief Header file of I2C LL module.
AnnaBridge	163:e59c8e839560	8	******************************************************************************
AnnaBridge	163:e59c8e839560	9	* @attention
AnnaBridge	163:e59c8e839560	10	*
AnnaBridge	163:e59c8e839560	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge	163:e59c8e839560	12	*
AnnaBridge	163:e59c8e839560	13	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	163:e59c8e839560	14	* are permitted provided that the following conditions are met:
AnnaBridge	163:e59c8e839560	15	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	163:e59c8e839560	16	* this list of conditions and the following disclaimer.
AnnaBridge	163:e59c8e839560	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	163:e59c8e839560	18	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	163:e59c8e839560	19	* and/or other materials provided with the distribution.
AnnaBridge	163:e59c8e839560	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	163:e59c8e839560	21	* may be used to endorse or promote products derived from this software
AnnaBridge	163:e59c8e839560	22	* without specific prior written permission.
AnnaBridge	163:e59c8e839560	23	*
AnnaBridge	163:e59c8e839560	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	163:e59c8e839560	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	163:e59c8e839560	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	163:e59c8e839560	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	163:e59c8e839560	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	163:e59c8e839560	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	163:e59c8e839560	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	163:e59c8e839560	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	163:e59c8e839560	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	163:e59c8e839560	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	163:e59c8e839560	34	*
AnnaBridge	163:e59c8e839560	35	******************************************************************************
AnnaBridge	163:e59c8e839560	36	*/
AnnaBridge	163:e59c8e839560	37
AnnaBridge	163:e59c8e839560	38	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	163:e59c8e839560	39	#ifndef __STM32F3xx_LL_I2C_H
AnnaBridge	163:e59c8e839560	40	#define __STM32F3xx_LL_I2C_H
AnnaBridge	163:e59c8e839560	41
AnnaBridge	163:e59c8e839560	42	#ifdef __cplusplus
AnnaBridge	163:e59c8e839560	43	extern "C" {
AnnaBridge	163:e59c8e839560	44	#endif
AnnaBridge	163:e59c8e839560	45
AnnaBridge	163:e59c8e839560	46	/* Includes ------------------------------------------------------------------*/
AnnaBridge	163:e59c8e839560	47	#include "stm32f3xx.h"
AnnaBridge	163:e59c8e839560	48
AnnaBridge	163:e59c8e839560	49	/** @addtogroup STM32F3xx_LL_Driver
AnnaBridge	163:e59c8e839560	50	* @{
AnnaBridge	163:e59c8e839560	51	*/
AnnaBridge	163:e59c8e839560	52
AnnaBridge	163:e59c8e839560	53	#if defined (I2C1) \|\| defined (I2C2) \|\| defined (I2C3)
AnnaBridge	163:e59c8e839560	54
AnnaBridge	163:e59c8e839560	55	/** @defgroup I2C_LL I2C
AnnaBridge	163:e59c8e839560	56	* @{
AnnaBridge	163:e59c8e839560	57	*/
AnnaBridge	163:e59c8e839560	58
AnnaBridge	163:e59c8e839560	59	/* Private types -------------------------------------------------------------*/
AnnaBridge	163:e59c8e839560	60	/* Private variables ---------------------------------------------------------*/
AnnaBridge	163:e59c8e839560	61
AnnaBridge	163:e59c8e839560	62	/* Private constants ---------------------------------------------------------*/
AnnaBridge	163:e59c8e839560	63	/** @defgroup I2C_LL_Private_Constants I2C Private Constants
AnnaBridge	163:e59c8e839560	64	* @{
AnnaBridge	163:e59c8e839560	65	*/
AnnaBridge	163:e59c8e839560	66	/**
AnnaBridge	163:e59c8e839560	67	* @}
AnnaBridge	163:e59c8e839560	68	*/
AnnaBridge	163:e59c8e839560	69
AnnaBridge	163:e59c8e839560	70	/* Private macros ------------------------------------------------------------*/
AnnaBridge	163:e59c8e839560	71	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	163:e59c8e839560	72	/** @defgroup I2C_LL_Private_Macros I2C Private Macros
AnnaBridge	163:e59c8e839560	73	* @{
AnnaBridge	163:e59c8e839560	74	*/
AnnaBridge	163:e59c8e839560	75	/**
AnnaBridge	163:e59c8e839560	76	* @}
AnnaBridge	163:e59c8e839560	77	*/
AnnaBridge	163:e59c8e839560	78	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	163:e59c8e839560	79
AnnaBridge	163:e59c8e839560	80	/* Exported types ------------------------------------------------------------*/
AnnaBridge	163:e59c8e839560	81	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	163:e59c8e839560	82	/** @defgroup I2C_LL_ES_INIT I2C Exported Init structure
AnnaBridge	163:e59c8e839560	83	* @{
AnnaBridge	163:e59c8e839560	84	*/
AnnaBridge	163:e59c8e839560	85	typedef struct
AnnaBridge	163:e59c8e839560	86	{
AnnaBridge	163:e59c8e839560	87	uint32_t PeripheralMode; /*!< Specifies the peripheral mode.
AnnaBridge	163:e59c8e839560	88	This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE
AnnaBridge	163:e59c8e839560	89
AnnaBridge	163:e59c8e839560	90	This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */
AnnaBridge	163:e59c8e839560	91
AnnaBridge	163:e59c8e839560	92	uint32_t Timing; /*!< Specifies the SDA setup, hold time and the SCL high, low period values.
AnnaBridge	163:e59c8e839560	93	This parameter must be set by referring to the STM32CubeMX Tool and
AnnaBridge	163:e59c8e839560	94	the helper macro @ref __LL_I2C_CONVERT_TIMINGS()
AnnaBridge	163:e59c8e839560	95
AnnaBridge	163:e59c8e839560	96	This feature can be modified afterwards using unitary function @ref LL_I2C_SetTiming(). */
AnnaBridge	163:e59c8e839560	97
AnnaBridge	163:e59c8e839560	98	uint32_t AnalogFilter; /*!< Enables or disables analog noise filter.
AnnaBridge	163:e59c8e839560	99	This parameter can be a value of @ref I2C_LL_EC_ANALOGFILTER_SELECTION
AnnaBridge	163:e59c8e839560	100
AnnaBridge	163:e59c8e839560	101	This feature can be modified afterwards using unitary functions @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */
AnnaBridge	163:e59c8e839560	102
AnnaBridge	163:e59c8e839560	103	uint32_t DigitalFilter; /*!< Configures the digital noise filter.
AnnaBridge	163:e59c8e839560	104	This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F
AnnaBridge	163:e59c8e839560	105
AnnaBridge	163:e59c8e839560	106	This feature can be modified afterwards using unitary function @ref LL_I2C_SetDigitalFilter(). */
AnnaBridge	163:e59c8e839560	107
AnnaBridge	163:e59c8e839560	108	uint32_t OwnAddress1; /*!< Specifies the device own address 1.
AnnaBridge	163:e59c8e839560	109	This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF
AnnaBridge	163:e59c8e839560	110
AnnaBridge	163:e59c8e839560	111	This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge	163:e59c8e839560	112
AnnaBridge	163:e59c8e839560	113	uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge	163:e59c8e839560	114	This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE
AnnaBridge	163:e59c8e839560	115
AnnaBridge	163:e59c8e839560	116	This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */
AnnaBridge	163:e59c8e839560	117
AnnaBridge	163:e59c8e839560	118	uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit).
AnnaBridge	163:e59c8e839560	119	This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1
AnnaBridge	163:e59c8e839560	120
AnnaBridge	163:e59c8e839560	121	This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge	163:e59c8e839560	122	} LL_I2C_InitTypeDef;
AnnaBridge	163:e59c8e839560	123	/**
AnnaBridge	163:e59c8e839560	124	* @}
AnnaBridge	163:e59c8e839560	125	*/
AnnaBridge	163:e59c8e839560	126	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	163:e59c8e839560	127
AnnaBridge	163:e59c8e839560	128	/* Exported constants --------------------------------------------------------*/
AnnaBridge	163:e59c8e839560	129	/** @defgroup I2C_LL_Exported_Constants I2C Exported Constants
AnnaBridge	163:e59c8e839560	130	* @{
AnnaBridge	163:e59c8e839560	131	*/
AnnaBridge	163:e59c8e839560	132
AnnaBridge	163:e59c8e839560	133	/** @defgroup I2C_LL_EC_CLEAR_FLAG Clear Flags Defines
AnnaBridge	163:e59c8e839560	134	* @brief Flags defines which can be used with LL_I2C_WriteReg function
AnnaBridge	163:e59c8e839560	135	* @{
AnnaBridge	163:e59c8e839560	136	*/
AnnaBridge	163:e59c8e839560	137	#define LL_I2C_ICR_ADDRCF I2C_ICR_ADDRCF /!< Address Matched flag /
AnnaBridge	163:e59c8e839560	138	#define LL_I2C_ICR_NACKCF I2C_ICR_NACKCF /!< Not Acknowledge flag /
AnnaBridge	163:e59c8e839560	139	#define LL_I2C_ICR_STOPCF I2C_ICR_STOPCF /!< Stop detection flag /
AnnaBridge	163:e59c8e839560	140	#define LL_I2C_ICR_BERRCF I2C_ICR_BERRCF /!< Bus error flag /
AnnaBridge	163:e59c8e839560	141	#define LL_I2C_ICR_ARLOCF I2C_ICR_ARLOCF /!< Arbitration Lost flag /
AnnaBridge	163:e59c8e839560	142	#define LL_I2C_ICR_OVRCF I2C_ICR_OVRCF /!< Overrun/Underrun flag /
AnnaBridge	163:e59c8e839560	143	#define LL_I2C_ICR_PECCF I2C_ICR_PECCF /!< PEC error flag /
AnnaBridge	163:e59c8e839560	144	#define LL_I2C_ICR_TIMOUTCF I2C_ICR_TIMOUTCF /!< Timeout detection flag /
AnnaBridge	163:e59c8e839560	145	#define LL_I2C_ICR_ALERTCF I2C_ICR_ALERTCF /!< Alert flag /
AnnaBridge	163:e59c8e839560	146	/**
AnnaBridge	163:e59c8e839560	147	* @}
AnnaBridge	163:e59c8e839560	148	*/
AnnaBridge	163:e59c8e839560	149
AnnaBridge	163:e59c8e839560	150	/** @defgroup I2C_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge	163:e59c8e839560	151	* @brief Flags defines which can be used with LL_I2C_ReadReg function
AnnaBridge	163:e59c8e839560	152	* @{
AnnaBridge	163:e59c8e839560	153	*/
AnnaBridge	163:e59c8e839560	154	#define LL_I2C_ISR_TXE I2C_ISR_TXE /!< Transmit data register empty /
AnnaBridge	163:e59c8e839560	155	#define LL_I2C_ISR_TXIS I2C_ISR_TXIS /!< Transmit interrupt status /
AnnaBridge	163:e59c8e839560	156	#define LL_I2C_ISR_RXNE I2C_ISR_RXNE /!< Receive data register not empty /
AnnaBridge	163:e59c8e839560	157	#define LL_I2C_ISR_ADDR I2C_ISR_ADDR /!< Address matched (slave mode) /
AnnaBridge	163:e59c8e839560	158	#define LL_I2C_ISR_NACKF I2C_ISR_NACKF /!< Not Acknowledge received flag /
AnnaBridge	163:e59c8e839560	159	#define LL_I2C_ISR_STOPF I2C_ISR_STOPF /!< Stop detection flag /
AnnaBridge	163:e59c8e839560	160	#define LL_I2C_ISR_TC I2C_ISR_TC /!< Transfer Complete (master mode) /
AnnaBridge	163:e59c8e839560	161	#define LL_I2C_ISR_TCR I2C_ISR_TCR /!< Transfer Complete Reload /
AnnaBridge	163:e59c8e839560	162	#define LL_I2C_ISR_BERR I2C_ISR_BERR /!< Bus error /
AnnaBridge	163:e59c8e839560	163	#define LL_I2C_ISR_ARLO I2C_ISR_ARLO /!< Arbitration lost /
AnnaBridge	163:e59c8e839560	164	#define LL_I2C_ISR_OVR I2C_ISR_OVR /!< Overrun/Underrun (slave mode) /
AnnaBridge	163:e59c8e839560	165	#define LL_I2C_ISR_PECERR I2C_ISR_PECERR /!< PEC Error in reception (SMBus mode) /
AnnaBridge	163:e59c8e839560	166	#define LL_I2C_ISR_TIMEOUT I2C_ISR_TIMEOUT /!< Timeout detection flag (SMBus mode) /
AnnaBridge	163:e59c8e839560	167	#define LL_I2C_ISR_ALERT I2C_ISR_ALERT /!< SMBus alert (SMBus mode) /
AnnaBridge	163:e59c8e839560	168	#define LL_I2C_ISR_BUSY I2C_ISR_BUSY /!< Bus busy /
AnnaBridge	163:e59c8e839560	169	/**
AnnaBridge	163:e59c8e839560	170	* @}
AnnaBridge	163:e59c8e839560	171	*/
AnnaBridge	163:e59c8e839560	172
AnnaBridge	163:e59c8e839560	173	/** @defgroup I2C_LL_EC_IT IT Defines
AnnaBridge	163:e59c8e839560	174	* @brief IT defines which can be used with LL_I2C_ReadReg and LL_I2C_WriteReg functions
AnnaBridge	163:e59c8e839560	175	* @{
AnnaBridge	163:e59c8e839560	176	*/
AnnaBridge	163:e59c8e839560	177	#define LL_I2C_CR1_TXIE I2C_CR1_TXIE /!< TX Interrupt enable /
AnnaBridge	163:e59c8e839560	178	#define LL_I2C_CR1_RXIE I2C_CR1_RXIE /!< RX Interrupt enable /
AnnaBridge	163:e59c8e839560	179	#define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /!< Address match Interrupt enable (slave only) /
AnnaBridge	163:e59c8e839560	180	#define LL_I2C_CR1_NACKIE I2C_CR1_NACKIE /!< Not acknowledge received Interrupt enable /
AnnaBridge	163:e59c8e839560	181	#define LL_I2C_CR1_STOPIE I2C_CR1_STOPIE /!< STOP detection Interrupt enable /
AnnaBridge	163:e59c8e839560	182	#define LL_I2C_CR1_TCIE I2C_CR1_TCIE /!< Transfer Complete interrupt enable /
AnnaBridge	163:e59c8e839560	183	#define LL_I2C_CR1_ERRIE I2C_CR1_ERRIE /!< Error interrupts enable /
AnnaBridge	163:e59c8e839560	184	/**
AnnaBridge	163:e59c8e839560	185	* @}
AnnaBridge	163:e59c8e839560	186	*/
AnnaBridge	163:e59c8e839560	187
AnnaBridge	163:e59c8e839560	188	/** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode
AnnaBridge	163:e59c8e839560	189	* @{
AnnaBridge	163:e59c8e839560	190	*/
AnnaBridge	163:e59c8e839560	191	#define LL_I2C_MODE_I2C ((uint32_t)0x00000000U) /!< I2C Master or Slave mode /
AnnaBridge	163:e59c8e839560	192	#define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /!< SMBus Host address acknowledge /
AnnaBridge	163:e59c8e839560	193	#define LL_I2C_MODE_SMBUS_DEVICE ((uint32_t)0x00000000U) /!< SMBus Device default mode (Default address not acknowledge) /
AnnaBridge	163:e59c8e839560	194	#define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /!< SMBus Device Default address acknowledge /
AnnaBridge	163:e59c8e839560	195	/**
AnnaBridge	163:e59c8e839560	196	* @}
AnnaBridge	163:e59c8e839560	197	*/
AnnaBridge	163:e59c8e839560	198
AnnaBridge	163:e59c8e839560	199	/** @defgroup I2C_LL_EC_ANALOGFILTER_SELECTION Analog Filter Selection
AnnaBridge	163:e59c8e839560	200	* @{
AnnaBridge	163:e59c8e839560	201	*/
AnnaBridge	163:e59c8e839560	202	#define LL_I2C_ANALOGFILTER_ENABLE ((uint32_t)0x00000000U) /!< Analog filter is enabled. /
AnnaBridge	163:e59c8e839560	203	#define LL_I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF /!< Analog filter is disabled. /
AnnaBridge	163:e59c8e839560	204	/**
AnnaBridge	163:e59c8e839560	205	* @}
AnnaBridge	163:e59c8e839560	206	*/
AnnaBridge	163:e59c8e839560	207
AnnaBridge	163:e59c8e839560	208	/** @defgroup I2C_LL_EC_ADDRESSING_MODE Master Addressing Mode
AnnaBridge	163:e59c8e839560	209	* @{
AnnaBridge	163:e59c8e839560	210	*/
AnnaBridge	163:e59c8e839560	211	#define LL_I2C_ADDRESSING_MODE_7BIT ((uint32_t) 0x00000000U) /!< Master operates in 7-bit addressing mode. /
AnnaBridge	163:e59c8e839560	212	#define LL_I2C_ADDRESSING_MODE_10BIT I2C_CR2_ADD10 /!< Master operates in 10-bit addressing mode./
AnnaBridge	163:e59c8e839560	213	/**
AnnaBridge	163:e59c8e839560	214	* @}
AnnaBridge	163:e59c8e839560	215	*/
AnnaBridge	163:e59c8e839560	216
AnnaBridge	163:e59c8e839560	217	/** @defgroup I2C_LL_EC_OWNADDRESS1 Own Address 1 Length
AnnaBridge	163:e59c8e839560	218	* @{
AnnaBridge	163:e59c8e839560	219	*/
AnnaBridge	163:e59c8e839560	220	#define LL_I2C_OWNADDRESS1_7BIT ((uint32_t)0x00000000U) /!< Own address 1 is a 7-bit address. /
AnnaBridge	163:e59c8e839560	221	#define LL_I2C_OWNADDRESS1_10BIT I2C_OAR1_OA1MODE /!< Own address 1 is a 10-bit address./
AnnaBridge	163:e59c8e839560	222	/**
AnnaBridge	163:e59c8e839560	223	* @}
AnnaBridge	163:e59c8e839560	224	*/
AnnaBridge	163:e59c8e839560	225
AnnaBridge	163:e59c8e839560	226	/** @defgroup I2C_LL_EC_OWNADDRESS2 Own Address 2 Masks
AnnaBridge	163:e59c8e839560	227	* @{
AnnaBridge	163:e59c8e839560	228	*/
AnnaBridge	163:e59c8e839560	229	#define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /!< Own Address2 No mask. /
AnnaBridge	163:e59c8e839560	230	#define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /!< Only Address2 bits[7:2] are compared. /
AnnaBridge	163:e59c8e839560	231	#define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /!< Only Address2 bits[7:3] are compared. /
AnnaBridge	163:e59c8e839560	232	#define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /!< Only Address2 bits[7:4] are compared. /
AnnaBridge	163:e59c8e839560	233	#define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /!< Only Address2 bits[7:5] are compared. /
AnnaBridge	163:e59c8e839560	234	#define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /!< Only Address2 bits[7:6] are compared. /
AnnaBridge	163:e59c8e839560	235	#define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /!< Only Address2 bits[7] are compared. /
AnnaBridge	163:e59c8e839560	236	#define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /!< No comparison is done. All Address2 are acknowledged./
AnnaBridge	163:e59c8e839560	237	/**
AnnaBridge	163:e59c8e839560	238	* @}
AnnaBridge	163:e59c8e839560	239	*/
AnnaBridge	163:e59c8e839560	240
AnnaBridge	163:e59c8e839560	241	/** @defgroup I2C_LL_EC_I2C_ACKNOWLEDGE Acknowledge Generation
AnnaBridge	163:e59c8e839560	242	* @{
AnnaBridge	163:e59c8e839560	243	*/
AnnaBridge	163:e59c8e839560	244	#define LL_I2C_ACK ((uint32_t) 0x00000000U) /!< ACK is sent after current received byte. /
AnnaBridge	163:e59c8e839560	245	#define LL_I2C_NACK I2C_CR2_NACK /!< NACK is sent after current received byte./
AnnaBridge	163:e59c8e839560	246	/**
AnnaBridge	163:e59c8e839560	247	* @}
AnnaBridge	163:e59c8e839560	248	*/
AnnaBridge	163:e59c8e839560	249
AnnaBridge	163:e59c8e839560	250	/** @defgroup I2C_LL_EC_ADDRSLAVE Slave Address Length
AnnaBridge	163:e59c8e839560	251	* @{
AnnaBridge	163:e59c8e839560	252	*/
AnnaBridge	163:e59c8e839560	253	#define LL_I2C_ADDRSLAVE_7BIT ((uint32_t)0x00000000U) /!< Slave Address in 7-bit. /
AnnaBridge	163:e59c8e839560	254	#define LL_I2C_ADDRSLAVE_10BIT I2C_CR2_ADD10 /!< Slave Address in 10-bit./
AnnaBridge	163:e59c8e839560	255	/**
AnnaBridge	163:e59c8e839560	256	* @}
AnnaBridge	163:e59c8e839560	257	*/
AnnaBridge	163:e59c8e839560	258
AnnaBridge	163:e59c8e839560	259	/** @defgroup I2C_LL_EC_REQUEST Transfer Request Direction
AnnaBridge	163:e59c8e839560	260	* @{
AnnaBridge	163:e59c8e839560	261	*/
AnnaBridge	163:e59c8e839560	262	#define LL_I2C_REQUEST_WRITE ((uint32_t)0x00000000U) /!< Master request a write transfer. /
AnnaBridge	163:e59c8e839560	263	#define LL_I2C_REQUEST_READ I2C_CR2_RD_WRN /!< Master request a read transfer. /
AnnaBridge	163:e59c8e839560	264	/**
AnnaBridge	163:e59c8e839560	265	* @}
AnnaBridge	163:e59c8e839560	266	*/
AnnaBridge	163:e59c8e839560	267
AnnaBridge	163:e59c8e839560	268	/** @defgroup I2C_LL_EC_MODE Transfer End Mode
AnnaBridge	163:e59c8e839560	269	* @{
AnnaBridge	163:e59c8e839560	270	*/
AnnaBridge	163:e59c8e839560	271	#define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /!< Enable I2C Reload mode. /
AnnaBridge	163:e59c8e839560	272	#define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /!< Enable I2C Automatic end mode with no HW PEC comparison. /
AnnaBridge	163:e59c8e839560	273	#define LL_I2C_MODE_SOFTEND ((uint32_t)0x00000000U) /!< Enable I2C Software end mode with no HW PEC comparison. /
AnnaBridge	163:e59c8e839560	274	#define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	163:e59c8e839560	275	#define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	163:e59c8e839560	276	#define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /!< Enable SMBUS Software end mode with HW PEC comparison. /
AnnaBridge	163:e59c8e839560	277	#define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND \| I2C_CR2_PECBYTE) /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	163:e59c8e839560	278	#define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND \| I2C_CR2_PECBYTE) /!< Enable SMBUS Software end mode with HW PEC comparison. /
AnnaBridge	163:e59c8e839560	279	/**
AnnaBridge	163:e59c8e839560	280	* @}
AnnaBridge	163:e59c8e839560	281	*/
AnnaBridge	163:e59c8e839560	282
AnnaBridge	163:e59c8e839560	283	/** @defgroup I2C_LL_EC_GENERATE Start And Stop Generation
AnnaBridge	163:e59c8e839560	284	* @{
AnnaBridge	163:e59c8e839560	285	*/
AnnaBridge	163:e59c8e839560	286	#define LL_I2C_GENERATE_NOSTARTSTOP ((uint32_t)0x00000000U) /!< Don't Generate Stop and Start condition. /
AnnaBridge	163:e59c8e839560	287	#define LL_I2C_GENERATE_STOP I2C_CR2_STOP /!< Generate Stop condition (Size should be set to 0). /
AnnaBridge	163:e59c8e839560	288	#define LL_I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START \| I2C_CR2_RD_WRN) /!< Generate Start for read request. /
AnnaBridge	163:e59c8e839560	289	#define LL_I2C_GENERATE_START_WRITE I2C_CR2_START /!< Generate Start for write request. /
AnnaBridge	163:e59c8e839560	290	#define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(I2C_CR2_START \| I2C_CR2_RD_WRN) /!< Generate Restart for read request, slave 7Bit address. /
AnnaBridge	163:e59c8e839560	291	#define LL_I2C_GENERATE_RESTART_7BIT_WRITE I2C_CR2_START /!< Generate Restart for write request, slave 7Bit address. /
AnnaBridge	163:e59c8e839560	292	#define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(I2C_CR2_START \| I2C_CR2_RD_WRN \| I2C_CR2_HEAD10R) /!< Generate Restart for read request, slave 10Bit address. /
AnnaBridge	163:e59c8e839560	293	#define LL_I2C_GENERATE_RESTART_10BIT_WRITE I2C_CR2_START /!< Generate Restart for write request, slave 10Bit address./
AnnaBridge	163:e59c8e839560	294	/**
AnnaBridge	163:e59c8e839560	295	* @}
AnnaBridge	163:e59c8e839560	296	*/
AnnaBridge	163:e59c8e839560	297
AnnaBridge	163:e59c8e839560	298	/** @defgroup I2C_LL_EC_DIRECTION Read Write Direction
AnnaBridge	163:e59c8e839560	299	* @{
AnnaBridge	163:e59c8e839560	300	*/
AnnaBridge	163:e59c8e839560	301	#define LL_I2C_DIRECTION_WRITE ((uint32_t)0x00000000U) /!< Write transfer request by master, slave enters receiver mode. /
AnnaBridge	163:e59c8e839560	302	#define LL_I2C_DIRECTION_READ I2C_ISR_DIR /!< Read transfer request by master, slave enters transmitter mode./
AnnaBridge	163:e59c8e839560	303	/**
AnnaBridge	163:e59c8e839560	304	* @}
AnnaBridge	163:e59c8e839560	305	*/
AnnaBridge	163:e59c8e839560	306
AnnaBridge	163:e59c8e839560	307	/** @defgroup I2C_LL_EC_DMA_REG_DATA DMA Register Data
AnnaBridge	163:e59c8e839560	308	* @{
AnnaBridge	163:e59c8e839560	309	*/
AnnaBridge	163:e59c8e839560	310	#define LL_I2C_DMA_REG_DATA_TRANSMIT ((uint32_t)0x00000000U) /!< Get address of data register used for transmission /
AnnaBridge	163:e59c8e839560	311	#define LL_I2C_DMA_REG_DATA_RECEIVE ((uint32_t)0x00000001U) /!< Get address of data register used for reception /
AnnaBridge	163:e59c8e839560	312	/**
AnnaBridge	163:e59c8e839560	313	* @}
AnnaBridge	163:e59c8e839560	314	*/
AnnaBridge	163:e59c8e839560	315
AnnaBridge	163:e59c8e839560	316	/** @defgroup I2C_LL_EC_SMBUS_TIMEOUTA_MODE SMBus TimeoutA Mode SCL SDA Timeout
AnnaBridge	163:e59c8e839560	317	* @{
AnnaBridge	163:e59c8e839560	318	*/
AnnaBridge	163:e59c8e839560	319	#define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW ((uint32_t) 0x00000000U) /!< TimeoutA is used to detect SCL low level timeout. /
AnnaBridge	163:e59c8e839560	320	#define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /!< TimeoutA is used to detect both SCL and SDA high level timeout./
AnnaBridge	163:e59c8e839560	321	/**
AnnaBridge	163:e59c8e839560	322	* @}
AnnaBridge	163:e59c8e839560	323	*/
AnnaBridge	163:e59c8e839560	324
AnnaBridge	163:e59c8e839560	325	/** @defgroup I2C_LL_EC_SMBUS_TIMEOUT_SELECTION SMBus Timeout Selection
AnnaBridge	163:e59c8e839560	326	* @{
AnnaBridge	163:e59c8e839560	327	*/
AnnaBridge	163:e59c8e839560	328	#define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /!< TimeoutA enable bit /
AnnaBridge	163:e59c8e839560	329	#define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /!< TimeoutB (extended clock) enable bit /
AnnaBridge	163:e59c8e839560	330	#define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN \| I2C_TIMEOUTR_TEXTEN) /!< TimeoutA and TimeoutB (extended clock) enable bits /
AnnaBridge	163:e59c8e839560	331	/**
AnnaBridge	163:e59c8e839560	332	* @}
AnnaBridge	163:e59c8e839560	333	*/
AnnaBridge	163:e59c8e839560	334
AnnaBridge	163:e59c8e839560	335	/**
AnnaBridge	163:e59c8e839560	336	* @}
AnnaBridge	163:e59c8e839560	337	*/
AnnaBridge	163:e59c8e839560	338
AnnaBridge	163:e59c8e839560	339	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	163:e59c8e839560	340	/** @defgroup I2C_LL_Exported_Macros I2C Exported Macros
AnnaBridge	163:e59c8e839560	341	* @{
AnnaBridge	163:e59c8e839560	342	*/
AnnaBridge	163:e59c8e839560	343
AnnaBridge	163:e59c8e839560	344	/** @defgroup I2C_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge	163:e59c8e839560	345	* @{
AnnaBridge	163:e59c8e839560	346	*/
AnnaBridge	163:e59c8e839560	347
AnnaBridge	163:e59c8e839560	348	/**
AnnaBridge	163:e59c8e839560	349	* @brief Write a value in I2C register
AnnaBridge	163:e59c8e839560	350	* @param __INSTANCE__ I2C Instance
AnnaBridge	163:e59c8e839560	351	* @param __REG__ Register to be written
AnnaBridge	163:e59c8e839560	352	* @param __VALUE__ Value to be written in the register
AnnaBridge	163:e59c8e839560	353	* @retval None
AnnaBridge	163:e59c8e839560	354	*/
AnnaBridge	163:e59c8e839560	355	#define LL_I2C_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	163:e59c8e839560	356
AnnaBridge	163:e59c8e839560	357	/**
AnnaBridge	163:e59c8e839560	358	* @brief Read a value in I2C register
AnnaBridge	163:e59c8e839560	359	* @param __INSTANCE__ I2C Instance
AnnaBridge	163:e59c8e839560	360	* @param __REG__ Register to be read
AnnaBridge	163:e59c8e839560	361	* @retval Register value
AnnaBridge	163:e59c8e839560	362	*/
AnnaBridge	163:e59c8e839560	363	#define LL_I2C_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	163:e59c8e839560	364	/**
AnnaBridge	163:e59c8e839560	365	* @}
AnnaBridge	163:e59c8e839560	366	*/
AnnaBridge	163:e59c8e839560	367
AnnaBridge	163:e59c8e839560	368	/** @defgroup I2C_LL_EM_CONVERT_TIMINGS Convert SDA SCL timings
AnnaBridge	163:e59c8e839560	369	* @{
AnnaBridge	163:e59c8e839560	370	*/
AnnaBridge	163:e59c8e839560	371	/**
AnnaBridge	163:e59c8e839560	372	* @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge	163:e59c8e839560	373	* @param __PRESCALER__ This parameter must be a value between Min_Data=0 and Max_Data=0xF.
AnnaBridge	163:e59c8e839560	374	* @param __DATA_SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tscldel = (SCLDEL+1)xtpresc)
AnnaBridge	163:e59c8e839560	375	* @param __DATA_HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tsdadel = SDADELxtpresc)
AnnaBridge	163:e59c8e839560	376	* @param __CLOCK_HIGH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tsclh = (SCLH+1)xtpresc)
AnnaBridge	163:e59c8e839560	377	* @param __CLOCK_LOW_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tscll = (SCLL+1)xtpresc)
AnnaBridge	163:e59c8e839560	378	* @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	163:e59c8e839560	379	*/
AnnaBridge	163:e59c8e839560	380	#define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __DATA_SETUP_TIME__, __DATA_HOLD_TIME__, __CLOCK_HIGH_PERIOD__, __CLOCK_LOW_PERIOD__) \
AnnaBridge	163:e59c8e839560	381	((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) \| \
AnnaBridge	163:e59c8e839560	382	(((uint32_t)(__DATA_SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) \| \
AnnaBridge	163:e59c8e839560	383	(((uint32_t)(__DATA_HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) \| \
AnnaBridge	163:e59c8e839560	384	(((uint32_t)(__CLOCK_HIGH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) \| \
AnnaBridge	163:e59c8e839560	385	(((uint32_t)(__CLOCK_LOW_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL))
AnnaBridge	163:e59c8e839560	386	/**
AnnaBridge	163:e59c8e839560	387	* @}
AnnaBridge	163:e59c8e839560	388	*/
AnnaBridge	163:e59c8e839560	389
AnnaBridge	163:e59c8e839560	390	/**
AnnaBridge	163:e59c8e839560	391	* @}
AnnaBridge	163:e59c8e839560	392	*/
AnnaBridge	163:e59c8e839560	393
AnnaBridge	163:e59c8e839560	394	/* Exported functions --------------------------------------------------------*/
AnnaBridge	163:e59c8e839560	395	/** @defgroup I2C_LL_Exported_Functions I2C Exported Functions
AnnaBridge	163:e59c8e839560	396	* @{
AnnaBridge	163:e59c8e839560	397	*/
AnnaBridge	163:e59c8e839560	398
AnnaBridge	163:e59c8e839560	399	/** @defgroup I2C_LL_EF_Configuration Configuration
AnnaBridge	163:e59c8e839560	400	* @{
AnnaBridge	163:e59c8e839560	401	*/
AnnaBridge	163:e59c8e839560	402
AnnaBridge	163:e59c8e839560	403	/**
AnnaBridge	163:e59c8e839560	404	* @brief Enable I2C peripheral (PE = 1).
AnnaBridge	163:e59c8e839560	405	* @rmtoll CR1 PE LL_I2C_Enable
AnnaBridge	163:e59c8e839560	406	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	407	* @retval None
AnnaBridge	163:e59c8e839560	408	*/
AnnaBridge	163:e59c8e839560	409	__STATIC_INLINE void LL_I2C_Enable(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	410	{
AnnaBridge	163:e59c8e839560	411	SET_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge	163:e59c8e839560	412	}
AnnaBridge	163:e59c8e839560	413
AnnaBridge	163:e59c8e839560	414	/**
AnnaBridge	163:e59c8e839560	415	* @brief Disable I2C peripheral (PE = 0).
AnnaBridge	163:e59c8e839560	416	* @note When PE = 0, the I2C SCL and SDA lines are released.
AnnaBridge	163:e59c8e839560	417	* Internal state machines and status bits are put back to their reset value.
AnnaBridge	163:e59c8e839560	418	* When cleared, PE must be kept low for at least 3 APB clock cycles.
AnnaBridge	163:e59c8e839560	419	* @rmtoll CR1 PE LL_I2C_Disable
AnnaBridge	163:e59c8e839560	420	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	421	* @retval None
AnnaBridge	163:e59c8e839560	422	*/
AnnaBridge	163:e59c8e839560	423	__STATIC_INLINE void LL_I2C_Disable(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	424	{
AnnaBridge	163:e59c8e839560	425	CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge	163:e59c8e839560	426	}
AnnaBridge	163:e59c8e839560	427
AnnaBridge	163:e59c8e839560	428	/**
AnnaBridge	163:e59c8e839560	429	* @brief Check if the I2C peripheral is enabled or disabled.
AnnaBridge	163:e59c8e839560	430	* @rmtoll CR1 PE LL_I2C_IsEnabled
AnnaBridge	163:e59c8e839560	431	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	432	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	433	*/
AnnaBridge	163:e59c8e839560	434	__STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	435	{
AnnaBridge	163:e59c8e839560	436	return (READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE));
AnnaBridge	163:e59c8e839560	437	}
AnnaBridge	163:e59c8e839560	438
AnnaBridge	163:e59c8e839560	439	/**
AnnaBridge	163:e59c8e839560	440	* @brief Configure Noise Filters (Analog and Digital).
AnnaBridge	163:e59c8e839560	441	* @note If the analog filter is also enabled, the digital filter is added to analog filter.
AnnaBridge	163:e59c8e839560	442	* The filters can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	163:e59c8e839560	443	* @rmtoll CR1 ANFOFF LL_I2C_ConfigFilters\n
AnnaBridge	163:e59c8e839560	444	* CR1 DNF LL_I2C_ConfigFilters
AnnaBridge	163:e59c8e839560	445	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	446	* @param AnalogFilter This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	447	* @arg @ref LL_I2C_ANALOGFILTER_ENABLE
AnnaBridge	163:e59c8e839560	448	* @arg @ref LL_I2C_ANALOGFILTER_DISABLE
AnnaBridge	163:e59c8e839560	449	* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
AnnaBridge	163:e59c8e839560	450	* This parameter is used to configure the digital noise filter on SDA and SCL input.
AnnaBridge	163:e59c8e839560	451	* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
AnnaBridge	163:e59c8e839560	452	* @retval None
AnnaBridge	163:e59c8e839560	453	*/
AnnaBridge	163:e59c8e839560	454	__STATIC_INLINE void LL_I2C_ConfigFilters(I2C_TypeDef *I2Cx, uint32_t AnalogFilter, uint32_t DigitalFilter)
AnnaBridge	163:e59c8e839560	455	{
AnnaBridge	163:e59c8e839560	456	MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF \| I2C_CR1_DNF, AnalogFilter \| (DigitalFilter << I2C_CR1_DNF_Pos));
AnnaBridge	163:e59c8e839560	457	}
AnnaBridge	163:e59c8e839560	458
AnnaBridge	163:e59c8e839560	459	/**
AnnaBridge	163:e59c8e839560	460	* @brief Configure Digital Noise Filter.
AnnaBridge	163:e59c8e839560	461	* @note If the analog filter is also enabled, the digital filter is added to analog filter.
AnnaBridge	163:e59c8e839560	462	* This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	163:e59c8e839560	463	* @rmtoll CR1 DNF LL_I2C_SetDigitalFilter
AnnaBridge	163:e59c8e839560	464	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	465	* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
AnnaBridge	163:e59c8e839560	466	* This parameter is used to configure the digital noise filter on SDA and SCL input.
AnnaBridge	163:e59c8e839560	467	* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
AnnaBridge	163:e59c8e839560	468	* @retval None
AnnaBridge	163:e59c8e839560	469	*/
AnnaBridge	163:e59c8e839560	470	__STATIC_INLINE void LL_I2C_SetDigitalFilter(I2C_TypeDef *I2Cx, uint32_t DigitalFilter)
AnnaBridge	163:e59c8e839560	471	{
AnnaBridge	163:e59c8e839560	472	MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos);
AnnaBridge	163:e59c8e839560	473	}
AnnaBridge	163:e59c8e839560	474
AnnaBridge	163:e59c8e839560	475	/**
AnnaBridge	163:e59c8e839560	476	* @brief Get the current Digital Noise Filter configuration.
AnnaBridge	163:e59c8e839560	477	* @rmtoll CR1 DNF LL_I2C_GetDigitalFilter
AnnaBridge	163:e59c8e839560	478	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	479	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	163:e59c8e839560	480	*/
AnnaBridge	163:e59c8e839560	481	__STATIC_INLINE uint32_t LL_I2C_GetDigitalFilter(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	482	{
AnnaBridge	163:e59c8e839560	483	return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_DNF) >> I2C_CR1_DNF_Pos);
AnnaBridge	163:e59c8e839560	484	}
AnnaBridge	163:e59c8e839560	485
AnnaBridge	163:e59c8e839560	486	/**
AnnaBridge	163:e59c8e839560	487	* @brief Enable Analog Noise Filter.
AnnaBridge	163:e59c8e839560	488	* @note This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	163:e59c8e839560	489	* @rmtoll CR1 ANFOFF LL_I2C_EnableAnalogFilter
AnnaBridge	163:e59c8e839560	490	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	491	* @retval None
AnnaBridge	163:e59c8e839560	492	*/
AnnaBridge	163:e59c8e839560	493	__STATIC_INLINE void LL_I2C_EnableAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	494	{
AnnaBridge	163:e59c8e839560	495	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
AnnaBridge	163:e59c8e839560	496	}
AnnaBridge	163:e59c8e839560	497
AnnaBridge	163:e59c8e839560	498	/**
AnnaBridge	163:e59c8e839560	499	* @brief Disable Analog Noise Filter.
AnnaBridge	163:e59c8e839560	500	* @note This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	163:e59c8e839560	501	* @rmtoll CR1 ANFOFF LL_I2C_DisableAnalogFilter
AnnaBridge	163:e59c8e839560	502	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	503	* @retval None
AnnaBridge	163:e59c8e839560	504	*/
AnnaBridge	163:e59c8e839560	505	__STATIC_INLINE void LL_I2C_DisableAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	506	{
AnnaBridge	163:e59c8e839560	507	SET_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
AnnaBridge	163:e59c8e839560	508	}
AnnaBridge	163:e59c8e839560	509
AnnaBridge	163:e59c8e839560	510	/**
AnnaBridge	163:e59c8e839560	511	* @brief Check if Analog Noise Filter is enabled or disabled.
AnnaBridge	163:e59c8e839560	512	* @rmtoll CR1 ANFOFF LL_I2C_IsEnabledAnalogFilter
AnnaBridge	163:e59c8e839560	513	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	514	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	515	*/
AnnaBridge	163:e59c8e839560	516	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	517	{
AnnaBridge	163:e59c8e839560	518	return (READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF));
AnnaBridge	163:e59c8e839560	519	}
AnnaBridge	163:e59c8e839560	520
AnnaBridge	163:e59c8e839560	521	/**
AnnaBridge	163:e59c8e839560	522	* @brief Enable DMA transmission requests.
AnnaBridge	163:e59c8e839560	523	* @rmtoll CR1 TXDMAEN LL_I2C_EnableDMAReq_TX
AnnaBridge	163:e59c8e839560	524	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	525	* @retval None
AnnaBridge	163:e59c8e839560	526	*/
AnnaBridge	163:e59c8e839560	527	__STATIC_INLINE void LL_I2C_EnableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	528	{
AnnaBridge	163:e59c8e839560	529	SET_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
AnnaBridge	163:e59c8e839560	530	}
AnnaBridge	163:e59c8e839560	531
AnnaBridge	163:e59c8e839560	532	/**
AnnaBridge	163:e59c8e839560	533	* @brief Disable DMA transmission requests.
AnnaBridge	163:e59c8e839560	534	* @rmtoll CR1 TXDMAEN LL_I2C_DisableDMAReq_TX
AnnaBridge	163:e59c8e839560	535	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	536	* @retval None
AnnaBridge	163:e59c8e839560	537	*/
AnnaBridge	163:e59c8e839560	538	__STATIC_INLINE void LL_I2C_DisableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	539	{
AnnaBridge	163:e59c8e839560	540	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
AnnaBridge	163:e59c8e839560	541	}
AnnaBridge	163:e59c8e839560	542
AnnaBridge	163:e59c8e839560	543	/**
AnnaBridge	163:e59c8e839560	544	* @brief Check if DMA transmission requests are enabled or disabled.
AnnaBridge	163:e59c8e839560	545	* @rmtoll CR1 TXDMAEN LL_I2C_IsEnabledDMAReq_TX
AnnaBridge	163:e59c8e839560	546	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	547	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	548	*/
AnnaBridge	163:e59c8e839560	549	__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	550	{
AnnaBridge	163:e59c8e839560	551	return (READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN));
AnnaBridge	163:e59c8e839560	552	}
AnnaBridge	163:e59c8e839560	553
AnnaBridge	163:e59c8e839560	554	/**
AnnaBridge	163:e59c8e839560	555	* @brief Enable DMA reception requests.
AnnaBridge	163:e59c8e839560	556	* @rmtoll CR1 RXDMAEN LL_I2C_EnableDMAReq_RX
AnnaBridge	163:e59c8e839560	557	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	558	* @retval None
AnnaBridge	163:e59c8e839560	559	*/
AnnaBridge	163:e59c8e839560	560	__STATIC_INLINE void LL_I2C_EnableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	561	{
AnnaBridge	163:e59c8e839560	562	SET_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
AnnaBridge	163:e59c8e839560	563	}
AnnaBridge	163:e59c8e839560	564
AnnaBridge	163:e59c8e839560	565	/**
AnnaBridge	163:e59c8e839560	566	* @brief Disable DMA reception requests.
AnnaBridge	163:e59c8e839560	567	* @rmtoll CR1 RXDMAEN LL_I2C_DisableDMAReq_RX
AnnaBridge	163:e59c8e839560	568	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	569	* @retval None
AnnaBridge	163:e59c8e839560	570	*/
AnnaBridge	163:e59c8e839560	571	__STATIC_INLINE void LL_I2C_DisableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	572	{
AnnaBridge	163:e59c8e839560	573	CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
AnnaBridge	163:e59c8e839560	574	}
AnnaBridge	163:e59c8e839560	575
AnnaBridge	163:e59c8e839560	576	/**
AnnaBridge	163:e59c8e839560	577	* @brief Check if DMA reception requests are enabled or disabled.
AnnaBridge	163:e59c8e839560	578	* @rmtoll CR1 RXDMAEN LL_I2C_IsEnabledDMAReq_RX
AnnaBridge	163:e59c8e839560	579	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	580	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	581	*/
AnnaBridge	163:e59c8e839560	582	__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	583	{
AnnaBridge	163:e59c8e839560	584	return (READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN));
AnnaBridge	163:e59c8e839560	585	}
AnnaBridge	163:e59c8e839560	586
AnnaBridge	163:e59c8e839560	587	/**
AnnaBridge	163:e59c8e839560	588	* @brief Get the data register address used for DMA transfer
AnnaBridge	163:e59c8e839560	589	* @rmtoll TXDR TXDATA LL_I2C_DMA_GetRegAddr\n
AnnaBridge	163:e59c8e839560	590	* RXDR RXDATA LL_I2C_DMA_GetRegAddr
AnnaBridge	163:e59c8e839560	591	* @param I2Cx I2C Instance
AnnaBridge	163:e59c8e839560	592	* @param Direction This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	593	* @arg @ref LL_I2C_DMA_REG_DATA_TRANSMIT
AnnaBridge	163:e59c8e839560	594	* @arg @ref LL_I2C_DMA_REG_DATA_RECEIVE
AnnaBridge	163:e59c8e839560	595	* @retval Address of data register
AnnaBridge	163:e59c8e839560	596	*/
AnnaBridge	163:e59c8e839560	597	__STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx, uint32_t Direction)
AnnaBridge	163:e59c8e839560	598	{
AnnaBridge	163:e59c8e839560	599	register uint32_t data_reg_addr = 0U;
AnnaBridge	163:e59c8e839560	600
AnnaBridge	163:e59c8e839560	601	if (Direction == LL_I2C_DMA_REG_DATA_TRANSMIT)
AnnaBridge	163:e59c8e839560	602	{
AnnaBridge	163:e59c8e839560	603	/* return address of TXDR register */
AnnaBridge	163:e59c8e839560	604	data_reg_addr = (uint32_t) & (I2Cx->TXDR);
AnnaBridge	163:e59c8e839560	605	}
AnnaBridge	163:e59c8e839560	606	else
AnnaBridge	163:e59c8e839560	607	{
AnnaBridge	163:e59c8e839560	608	/* return address of RXDR register */
AnnaBridge	163:e59c8e839560	609	data_reg_addr = (uint32_t) & (I2Cx->RXDR);
AnnaBridge	163:e59c8e839560	610	}
AnnaBridge	163:e59c8e839560	611
AnnaBridge	163:e59c8e839560	612	return data_reg_addr;
AnnaBridge	163:e59c8e839560	613	}
AnnaBridge	163:e59c8e839560	614
AnnaBridge	163:e59c8e839560	615	/**
AnnaBridge	163:e59c8e839560	616	* @brief Enable Clock stretching.
AnnaBridge	163:e59c8e839560	617	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	163:e59c8e839560	618	* @rmtoll CR1 NOSTRETCH LL_I2C_EnableClockStretching
AnnaBridge	163:e59c8e839560	619	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	620	* @retval None
AnnaBridge	163:e59c8e839560	621	*/
AnnaBridge	163:e59c8e839560	622	__STATIC_INLINE void LL_I2C_EnableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	623	{
AnnaBridge	163:e59c8e839560	624	CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge	163:e59c8e839560	625	}
AnnaBridge	163:e59c8e839560	626
AnnaBridge	163:e59c8e839560	627	/**
AnnaBridge	163:e59c8e839560	628	* @brief Disable Clock stretching.
AnnaBridge	163:e59c8e839560	629	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	163:e59c8e839560	630	* @rmtoll CR1 NOSTRETCH LL_I2C_DisableClockStretching
AnnaBridge	163:e59c8e839560	631	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	632	* @retval None
AnnaBridge	163:e59c8e839560	633	*/
AnnaBridge	163:e59c8e839560	634	__STATIC_INLINE void LL_I2C_DisableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	635	{
AnnaBridge	163:e59c8e839560	636	SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge	163:e59c8e839560	637	}
AnnaBridge	163:e59c8e839560	638
AnnaBridge	163:e59c8e839560	639	/**
AnnaBridge	163:e59c8e839560	640	* @brief Check if Clock stretching is enabled or disabled.
AnnaBridge	163:e59c8e839560	641	* @rmtoll CR1 NOSTRETCH LL_I2C_IsEnabledClockStretching
AnnaBridge	163:e59c8e839560	642	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	643	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	644	*/
AnnaBridge	163:e59c8e839560	645	__STATIC_INLINE uint32_t LL_I2C_IsEnabledClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	646	{
AnnaBridge	163:e59c8e839560	647	return (READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH));
AnnaBridge	163:e59c8e839560	648	}
AnnaBridge	163:e59c8e839560	649
AnnaBridge	163:e59c8e839560	650	/**
AnnaBridge	163:e59c8e839560	651	* @brief Enable hardware byte control in slave mode.
AnnaBridge	163:e59c8e839560	652	* @rmtoll CR1 SBC LL_I2C_EnableSlaveByteControl
AnnaBridge	163:e59c8e839560	653	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	654	* @retval None
AnnaBridge	163:e59c8e839560	655	*/
AnnaBridge	163:e59c8e839560	656	__STATIC_INLINE void LL_I2C_EnableSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	657	{
AnnaBridge	163:e59c8e839560	658	SET_BIT(I2Cx->CR1, I2C_CR1_SBC);
AnnaBridge	163:e59c8e839560	659	}
AnnaBridge	163:e59c8e839560	660
AnnaBridge	163:e59c8e839560	661	/**
AnnaBridge	163:e59c8e839560	662	* @brief Disable hardware byte control in slave mode.
AnnaBridge	163:e59c8e839560	663	* @rmtoll CR1 SBC LL_I2C_DisableSlaveByteControl
AnnaBridge	163:e59c8e839560	664	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	665	* @retval None
AnnaBridge	163:e59c8e839560	666	*/
AnnaBridge	163:e59c8e839560	667	__STATIC_INLINE void LL_I2C_DisableSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	668	{
AnnaBridge	163:e59c8e839560	669	CLEAR_BIT(I2Cx->CR1, I2C_CR1_SBC);
AnnaBridge	163:e59c8e839560	670	}
AnnaBridge	163:e59c8e839560	671
AnnaBridge	163:e59c8e839560	672	/**
AnnaBridge	163:e59c8e839560	673	* @brief Check if hardware byte control in slave mode is enabled or disabled.
AnnaBridge	163:e59c8e839560	674	* @rmtoll CR1 SBC LL_I2C_IsEnabledSlaveByteControl
AnnaBridge	163:e59c8e839560	675	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	676	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	677	*/
AnnaBridge	163:e59c8e839560	678	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	679	{
AnnaBridge	163:e59c8e839560	680	return (READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC));
AnnaBridge	163:e59c8e839560	681	}
AnnaBridge	163:e59c8e839560	682
AnnaBridge	163:e59c8e839560	683	/**
AnnaBridge	163:e59c8e839560	684	* @brief Enable Wakeup from STOP.
AnnaBridge	163:e59c8e839560	685	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	686	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	687	* @note This bit can only be programmed when Digital Filter is disabled.
AnnaBridge	163:e59c8e839560	688	* @rmtoll CR1 WUPEN LL_I2C_EnableWakeUpFromStop
AnnaBridge	163:e59c8e839560	689	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	690	* @retval None
AnnaBridge	163:e59c8e839560	691	*/
AnnaBridge	163:e59c8e839560	692	__STATIC_INLINE void LL_I2C_EnableWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	693	{
AnnaBridge	163:e59c8e839560	694	SET_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
AnnaBridge	163:e59c8e839560	695	}
AnnaBridge	163:e59c8e839560	696
AnnaBridge	163:e59c8e839560	697	/**
AnnaBridge	163:e59c8e839560	698	* @brief Disable Wakeup from STOP.
AnnaBridge	163:e59c8e839560	699	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	700	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	701	* @rmtoll CR1 WUPEN LL_I2C_DisableWakeUpFromStop
AnnaBridge	163:e59c8e839560	702	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	703	* @retval None
AnnaBridge	163:e59c8e839560	704	*/
AnnaBridge	163:e59c8e839560	705	__STATIC_INLINE void LL_I2C_DisableWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	706	{
AnnaBridge	163:e59c8e839560	707	CLEAR_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
AnnaBridge	163:e59c8e839560	708	}
AnnaBridge	163:e59c8e839560	709
AnnaBridge	163:e59c8e839560	710	/**
AnnaBridge	163:e59c8e839560	711	* @brief Check if Wakeup from STOP is enabled or disabled.
AnnaBridge	163:e59c8e839560	712	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	713	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	714	* @rmtoll CR1 WUPEN LL_I2C_IsEnabledWakeUpFromStop
AnnaBridge	163:e59c8e839560	715	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	716	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	717	*/
AnnaBridge	163:e59c8e839560	718	__STATIC_INLINE uint32_t LL_I2C_IsEnabledWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	719	{
AnnaBridge	163:e59c8e839560	720	return (READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN));
AnnaBridge	163:e59c8e839560	721	}
AnnaBridge	163:e59c8e839560	722
AnnaBridge	163:e59c8e839560	723	/**
AnnaBridge	163:e59c8e839560	724	* @brief Enable General Call.
AnnaBridge	163:e59c8e839560	725	* @note When enabled the Address 0x00 is ACKed.
AnnaBridge	163:e59c8e839560	726	* @rmtoll CR1 GCEN LL_I2C_EnableGeneralCall
AnnaBridge	163:e59c8e839560	727	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	728	* @retval None
AnnaBridge	163:e59c8e839560	729	*/
AnnaBridge	163:e59c8e839560	730	__STATIC_INLINE void LL_I2C_EnableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	731	{
AnnaBridge	163:e59c8e839560	732	SET_BIT(I2Cx->CR1, I2C_CR1_GCEN);
AnnaBridge	163:e59c8e839560	733	}
AnnaBridge	163:e59c8e839560	734
AnnaBridge	163:e59c8e839560	735	/**
AnnaBridge	163:e59c8e839560	736	* @brief Disable General Call.
AnnaBridge	163:e59c8e839560	737	* @note When disabled the Address 0x00 is NACKed.
AnnaBridge	163:e59c8e839560	738	* @rmtoll CR1 GCEN LL_I2C_DisableGeneralCall
AnnaBridge	163:e59c8e839560	739	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	740	* @retval None
AnnaBridge	163:e59c8e839560	741	*/
AnnaBridge	163:e59c8e839560	742	__STATIC_INLINE void LL_I2C_DisableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	743	{
AnnaBridge	163:e59c8e839560	744	CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);
AnnaBridge	163:e59c8e839560	745	}
AnnaBridge	163:e59c8e839560	746
AnnaBridge	163:e59c8e839560	747	/**
AnnaBridge	163:e59c8e839560	748	* @brief Check if General Call is enabled or disabled.
AnnaBridge	163:e59c8e839560	749	* @rmtoll CR1 GCEN LL_I2C_IsEnabledGeneralCall
AnnaBridge	163:e59c8e839560	750	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	751	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	752	*/
AnnaBridge	163:e59c8e839560	753	__STATIC_INLINE uint32_t LL_I2C_IsEnabledGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	754	{
AnnaBridge	163:e59c8e839560	755	return (READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN));
AnnaBridge	163:e59c8e839560	756	}
AnnaBridge	163:e59c8e839560	757
AnnaBridge	163:e59c8e839560	758	/**
AnnaBridge	163:e59c8e839560	759	* @brief Configure the Master to operate in 7-bit or 10-bit addressing mode.
AnnaBridge	163:e59c8e839560	760	* @note Changing this bit is not allowed, when the START bit is set.
AnnaBridge	163:e59c8e839560	761	* @rmtoll CR2 ADD10 LL_I2C_SetMasterAddressingMode
AnnaBridge	163:e59c8e839560	762	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	763	* @param AddressingMode This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	764	* @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
AnnaBridge	163:e59c8e839560	765	* @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
AnnaBridge	163:e59c8e839560	766	* @retval None
AnnaBridge	163:e59c8e839560	767	*/
AnnaBridge	163:e59c8e839560	768	__STATIC_INLINE void LL_I2C_SetMasterAddressingMode(I2C_TypeDef *I2Cx, uint32_t AddressingMode)
AnnaBridge	163:e59c8e839560	769	{
AnnaBridge	163:e59c8e839560	770	MODIFY_REG(I2Cx->CR2, I2C_CR2_ADD10, AddressingMode);
AnnaBridge	163:e59c8e839560	771	}
AnnaBridge	163:e59c8e839560	772
AnnaBridge	163:e59c8e839560	773	/**
AnnaBridge	163:e59c8e839560	774	* @brief Get the Master addressing mode.
AnnaBridge	163:e59c8e839560	775	* @rmtoll CR2 ADD10 LL_I2C_GetMasterAddressingMode
AnnaBridge	163:e59c8e839560	776	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	777	* @retval Returned value can be one of the following values:
AnnaBridge	163:e59c8e839560	778	* @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
AnnaBridge	163:e59c8e839560	779	* @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
AnnaBridge	163:e59c8e839560	780	*/
AnnaBridge	163:e59c8e839560	781	__STATIC_INLINE uint32_t LL_I2C_GetMasterAddressingMode(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	782	{
AnnaBridge	163:e59c8e839560	783	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_ADD10));
AnnaBridge	163:e59c8e839560	784	}
AnnaBridge	163:e59c8e839560	785
AnnaBridge	163:e59c8e839560	786	/**
AnnaBridge	163:e59c8e839560	787	* @brief Set the Own Address1.
AnnaBridge	163:e59c8e839560	788	* @rmtoll OAR1 OA1 LL_I2C_SetOwnAddress1\n
AnnaBridge	163:e59c8e839560	789	* OAR1 OA1MODE LL_I2C_SetOwnAddress1
AnnaBridge	163:e59c8e839560	790	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	791	* @param OwnAddress1 This parameter must be a value between Min_Data=0 and Max_Data=0x3FF.
AnnaBridge	163:e59c8e839560	792	* @param OwnAddrSize This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	793	* @arg @ref LL_I2C_OWNADDRESS1_7BIT
AnnaBridge	163:e59c8e839560	794	* @arg @ref LL_I2C_OWNADDRESS1_10BIT
AnnaBridge	163:e59c8e839560	795	* @retval None
AnnaBridge	163:e59c8e839560	796	*/
AnnaBridge	163:e59c8e839560	797	__STATIC_INLINE void LL_I2C_SetOwnAddress1(I2C_TypeDef *I2Cx, uint32_t OwnAddress1, uint32_t OwnAddrSize)
AnnaBridge	163:e59c8e839560	798	{
AnnaBridge	163:e59c8e839560	799	MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 \| I2C_OAR1_OA1MODE, OwnAddress1 \| OwnAddrSize);
AnnaBridge	163:e59c8e839560	800	}
AnnaBridge	163:e59c8e839560	801
AnnaBridge	163:e59c8e839560	802	/**
AnnaBridge	163:e59c8e839560	803	* @brief Enable acknowledge on Own Address1 match address.
AnnaBridge	163:e59c8e839560	804	* @rmtoll OAR1 OA1EN LL_I2C_EnableOwnAddress1
AnnaBridge	163:e59c8e839560	805	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	806	* @retval None
AnnaBridge	163:e59c8e839560	807	*/
AnnaBridge	163:e59c8e839560	808	__STATIC_INLINE void LL_I2C_EnableOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	809	{
AnnaBridge	163:e59c8e839560	810	SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
AnnaBridge	163:e59c8e839560	811	}
AnnaBridge	163:e59c8e839560	812
AnnaBridge	163:e59c8e839560	813	/**
AnnaBridge	163:e59c8e839560	814	* @brief Disable acknowledge on Own Address1 match address.
AnnaBridge	163:e59c8e839560	815	* @rmtoll OAR1 OA1EN LL_I2C_DisableOwnAddress1
AnnaBridge	163:e59c8e839560	816	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	817	* @retval None
AnnaBridge	163:e59c8e839560	818	*/
AnnaBridge	163:e59c8e839560	819	__STATIC_INLINE void LL_I2C_DisableOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	820	{
AnnaBridge	163:e59c8e839560	821	CLEAR_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
AnnaBridge	163:e59c8e839560	822	}
AnnaBridge	163:e59c8e839560	823
AnnaBridge	163:e59c8e839560	824	/**
AnnaBridge	163:e59c8e839560	825	* @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge	163:e59c8e839560	826	* @rmtoll OAR1 OA1EN LL_I2C_IsEnabledOwnAddress1
AnnaBridge	163:e59c8e839560	827	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	828	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	829	*/
AnnaBridge	163:e59c8e839560	830	__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	831	{
AnnaBridge	163:e59c8e839560	832	return (READ_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN) == (I2C_OAR1_OA1EN));
AnnaBridge	163:e59c8e839560	833	}
AnnaBridge	163:e59c8e839560	834
AnnaBridge	163:e59c8e839560	835	/**
AnnaBridge	163:e59c8e839560	836	* @brief Set the 7bits Own Address2.
AnnaBridge	163:e59c8e839560	837	* @note This action has no effect if own address2 is enabled.
AnnaBridge	163:e59c8e839560	838	* @rmtoll OAR2 OA2 LL_I2C_SetOwnAddress2\n
AnnaBridge	163:e59c8e839560	839	* OAR2 OA2MSK LL_I2C_SetOwnAddress2
AnnaBridge	163:e59c8e839560	840	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	841	* @param OwnAddress2 Value between Min_Data=0 and Max_Data=0x7F.
AnnaBridge	163:e59c8e839560	842	* @param OwnAddrMask This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	843	* @arg @ref LL_I2C_OWNADDRESS2_NOMASK
AnnaBridge	163:e59c8e839560	844	* @arg @ref LL_I2C_OWNADDRESS2_MASK01
AnnaBridge	163:e59c8e839560	845	* @arg @ref LL_I2C_OWNADDRESS2_MASK02
AnnaBridge	163:e59c8e839560	846	* @arg @ref LL_I2C_OWNADDRESS2_MASK03
AnnaBridge	163:e59c8e839560	847	* @arg @ref LL_I2C_OWNADDRESS2_MASK04
AnnaBridge	163:e59c8e839560	848	* @arg @ref LL_I2C_OWNADDRESS2_MASK05
AnnaBridge	163:e59c8e839560	849	* @arg @ref LL_I2C_OWNADDRESS2_MASK06
AnnaBridge	163:e59c8e839560	850	* @arg @ref LL_I2C_OWNADDRESS2_MASK07
AnnaBridge	163:e59c8e839560	851	* @retval None
AnnaBridge	163:e59c8e839560	852	*/
AnnaBridge	163:e59c8e839560	853	__STATIC_INLINE void LL_I2C_SetOwnAddress2(I2C_TypeDef *I2Cx, uint32_t OwnAddress2, uint32_t OwnAddrMask)
AnnaBridge	163:e59c8e839560	854	{
AnnaBridge	163:e59c8e839560	855	MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 \| I2C_OAR2_OA2MSK, OwnAddress2 \| OwnAddrMask);
AnnaBridge	163:e59c8e839560	856	}
AnnaBridge	163:e59c8e839560	857
AnnaBridge	163:e59c8e839560	858	/**
AnnaBridge	163:e59c8e839560	859	* @brief Enable acknowledge on Own Address2 match address.
AnnaBridge	163:e59c8e839560	860	* @rmtoll OAR2 OA2EN LL_I2C_EnableOwnAddress2
AnnaBridge	163:e59c8e839560	861	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	862	* @retval None
AnnaBridge	163:e59c8e839560	863	*/
AnnaBridge	163:e59c8e839560	864	__STATIC_INLINE void LL_I2C_EnableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	865	{
AnnaBridge	163:e59c8e839560	866	SET_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
AnnaBridge	163:e59c8e839560	867	}
AnnaBridge	163:e59c8e839560	868
AnnaBridge	163:e59c8e839560	869	/**
AnnaBridge	163:e59c8e839560	870	* @brief Disable acknowledge on Own Address2 match address.
AnnaBridge	163:e59c8e839560	871	* @rmtoll OAR2 OA2EN LL_I2C_DisableOwnAddress2
AnnaBridge	163:e59c8e839560	872	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	873	* @retval None
AnnaBridge	163:e59c8e839560	874	*/
AnnaBridge	163:e59c8e839560	875	__STATIC_INLINE void LL_I2C_DisableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	876	{
AnnaBridge	163:e59c8e839560	877	CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
AnnaBridge	163:e59c8e839560	878	}
AnnaBridge	163:e59c8e839560	879
AnnaBridge	163:e59c8e839560	880	/**
AnnaBridge	163:e59c8e839560	881	* @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge	163:e59c8e839560	882	* @rmtoll OAR2 OA2EN LL_I2C_IsEnabledOwnAddress2
AnnaBridge	163:e59c8e839560	883	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	884	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	885	*/
AnnaBridge	163:e59c8e839560	886	__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	887	{
AnnaBridge	163:e59c8e839560	888	return (READ_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN) == (I2C_OAR2_OA2EN));
AnnaBridge	163:e59c8e839560	889	}
AnnaBridge	163:e59c8e839560	890
AnnaBridge	163:e59c8e839560	891	/**
AnnaBridge	163:e59c8e839560	892	* @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge	163:e59c8e839560	893	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	163:e59c8e839560	894	* @rmtoll TIMINGR TIMINGR LL_I2C_SetTiming
AnnaBridge	163:e59c8e839560	895	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	896	* @param Timing This parameter must be a value between Min_Data=0 and Max_Data=0xFFFFFFFF.
AnnaBridge	163:e59c8e839560	897	* @note This parameter is computed with the STM32CubeMX Tool.
AnnaBridge	163:e59c8e839560	898	* @retval None
AnnaBridge	163:e59c8e839560	899	*/
AnnaBridge	163:e59c8e839560	900	__STATIC_INLINE void LL_I2C_SetTiming(I2C_TypeDef *I2Cx, uint32_t Timing)
AnnaBridge	163:e59c8e839560	901	{
AnnaBridge	163:e59c8e839560	902	WRITE_REG(I2Cx->TIMINGR, Timing);
AnnaBridge	163:e59c8e839560	903	}
AnnaBridge	163:e59c8e839560	904
AnnaBridge	163:e59c8e839560	905	/**
AnnaBridge	163:e59c8e839560	906	* @brief Get the Timing Prescaler setting.
AnnaBridge	163:e59c8e839560	907	* @rmtoll TIMINGR PRESC LL_I2C_GetTimingPrescaler
AnnaBridge	163:e59c8e839560	908	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	909	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	163:e59c8e839560	910	*/
AnnaBridge	163:e59c8e839560	911	__STATIC_INLINE uint32_t LL_I2C_GetTimingPrescaler(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	912	{
AnnaBridge	163:e59c8e839560	913	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_PRESC) >> I2C_TIMINGR_PRESC_Pos);
AnnaBridge	163:e59c8e839560	914	}
AnnaBridge	163:e59c8e839560	915
AnnaBridge	163:e59c8e839560	916	/**
AnnaBridge	163:e59c8e839560	917	* @brief Get the SCL low period setting.
AnnaBridge	163:e59c8e839560	918	* @rmtoll TIMINGR SCLL LL_I2C_GetClockLowPeriod
AnnaBridge	163:e59c8e839560	919	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	920	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	163:e59c8e839560	921	*/
AnnaBridge	163:e59c8e839560	922	__STATIC_INLINE uint32_t LL_I2C_GetClockLowPeriod(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	923	{
AnnaBridge	163:e59c8e839560	924	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLL) >> I2C_TIMINGR_SCLL_Pos);
AnnaBridge	163:e59c8e839560	925	}
AnnaBridge	163:e59c8e839560	926
AnnaBridge	163:e59c8e839560	927	/**
AnnaBridge	163:e59c8e839560	928	* @brief Get the SCL high period setting.
AnnaBridge	163:e59c8e839560	929	* @rmtoll TIMINGR SCLH LL_I2C_GetClockHighPeriod
AnnaBridge	163:e59c8e839560	930	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	931	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	163:e59c8e839560	932	*/
AnnaBridge	163:e59c8e839560	933	__STATIC_INLINE uint32_t LL_I2C_GetClockHighPeriod(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	934	{
AnnaBridge	163:e59c8e839560	935	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLH) >> I2C_TIMINGR_SCLH_Pos);
AnnaBridge	163:e59c8e839560	936	}
AnnaBridge	163:e59c8e839560	937
AnnaBridge	163:e59c8e839560	938	/**
AnnaBridge	163:e59c8e839560	939	* @brief Get the SDA hold time.
AnnaBridge	163:e59c8e839560	940	* @rmtoll TIMINGR SDADEL LL_I2C_GetDataHoldTime
AnnaBridge	163:e59c8e839560	941	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	942	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	163:e59c8e839560	943	*/
AnnaBridge	163:e59c8e839560	944	__STATIC_INLINE uint32_t LL_I2C_GetDataHoldTime(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	945	{
AnnaBridge	163:e59c8e839560	946	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SDADEL) >> I2C_TIMINGR_SDADEL_Pos);
AnnaBridge	163:e59c8e839560	947	}
AnnaBridge	163:e59c8e839560	948
AnnaBridge	163:e59c8e839560	949	/**
AnnaBridge	163:e59c8e839560	950	* @brief Get the SDA setup time.
AnnaBridge	163:e59c8e839560	951	* @rmtoll TIMINGR SCLDEL LL_I2C_GetDataSetupTime
AnnaBridge	163:e59c8e839560	952	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	953	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	163:e59c8e839560	954	*/
AnnaBridge	163:e59c8e839560	955	__STATIC_INLINE uint32_t LL_I2C_GetDataSetupTime(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	956	{
AnnaBridge	163:e59c8e839560	957	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLDEL) >> I2C_TIMINGR_SCLDEL_Pos);
AnnaBridge	163:e59c8e839560	958	}
AnnaBridge	163:e59c8e839560	959
AnnaBridge	163:e59c8e839560	960	/**
AnnaBridge	163:e59c8e839560	961	* @brief Configure peripheral mode.
AnnaBridge	163:e59c8e839560	962	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	963	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	964	* @rmtoll CR1 SMBHEN LL_I2C_SetMode\n
AnnaBridge	163:e59c8e839560	965	* CR1 SMBDEN LL_I2C_SetMode
AnnaBridge	163:e59c8e839560	966	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	967	* @param PeripheralMode This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	968	* @arg @ref LL_I2C_MODE_I2C
AnnaBridge	163:e59c8e839560	969	* @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge	163:e59c8e839560	970	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge	163:e59c8e839560	971	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge	163:e59c8e839560	972	* @retval None
AnnaBridge	163:e59c8e839560	973	*/
AnnaBridge	163:e59c8e839560	974	__STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
AnnaBridge	163:e59c8e839560	975	{
AnnaBridge	163:e59c8e839560	976	MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN \| I2C_CR1_SMBDEN, PeripheralMode);
AnnaBridge	163:e59c8e839560	977	}
AnnaBridge	163:e59c8e839560	978
AnnaBridge	163:e59c8e839560	979	/**
AnnaBridge	163:e59c8e839560	980	* @brief Get peripheral mode.
AnnaBridge	163:e59c8e839560	981	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	982	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	983	* @rmtoll CR1 SMBHEN LL_I2C_GetMode\n
AnnaBridge	163:e59c8e839560	984	* CR1 SMBDEN LL_I2C_GetMode
AnnaBridge	163:e59c8e839560	985	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	986	* @retval Returned value can be one of the following values:
AnnaBridge	163:e59c8e839560	987	* @arg @ref LL_I2C_MODE_I2C
AnnaBridge	163:e59c8e839560	988	* @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge	163:e59c8e839560	989	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge	163:e59c8e839560	990	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge	163:e59c8e839560	991	*/
AnnaBridge	163:e59c8e839560	992	__STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	993	{
AnnaBridge	163:e59c8e839560	994	return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBHEN \| I2C_CR1_SMBDEN));
AnnaBridge	163:e59c8e839560	995	}
AnnaBridge	163:e59c8e839560	996
AnnaBridge	163:e59c8e839560	997	/**
AnnaBridge	163:e59c8e839560	998	* @brief Enable SMBus alert (Host or Device mode)
AnnaBridge	163:e59c8e839560	999	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1000	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1001	* @note SMBus Device mode:
AnnaBridge	163:e59c8e839560	1002	* - SMBus Alert pin is drived low and
AnnaBridge	163:e59c8e839560	1003	* Alert Response Address Header acknowledge is enabled.
AnnaBridge	163:e59c8e839560	1004	* SMBus Host mode:
AnnaBridge	163:e59c8e839560	1005	* - SMBus Alert pin management is supported.
AnnaBridge	163:e59c8e839560	1006	* @rmtoll CR1 ALERTEN LL_I2C_EnableSMBusAlert
AnnaBridge	163:e59c8e839560	1007	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1008	* @retval None
AnnaBridge	163:e59c8e839560	1009	*/
AnnaBridge	163:e59c8e839560	1010	__STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1011	{
AnnaBridge	163:e59c8e839560	1012	SET_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
AnnaBridge	163:e59c8e839560	1013	}
AnnaBridge	163:e59c8e839560	1014
AnnaBridge	163:e59c8e839560	1015	/**
AnnaBridge	163:e59c8e839560	1016	* @brief Disable SMBus alert (Host or Device mode)
AnnaBridge	163:e59c8e839560	1017	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1018	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1019	* @note SMBus Device mode:
AnnaBridge	163:e59c8e839560	1020	* - SMBus Alert pin is not drived (can be used as a standard GPIO) and
AnnaBridge	163:e59c8e839560	1021	* Alert Response Address Header acknowledge is disabled.
AnnaBridge	163:e59c8e839560	1022	* SMBus Host mode:
AnnaBridge	163:e59c8e839560	1023	* - SMBus Alert pin management is not supported.
AnnaBridge	163:e59c8e839560	1024	* @rmtoll CR1 ALERTEN LL_I2C_DisableSMBusAlert
AnnaBridge	163:e59c8e839560	1025	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1026	* @retval None
AnnaBridge	163:e59c8e839560	1027	*/
AnnaBridge	163:e59c8e839560	1028	__STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1029	{
AnnaBridge	163:e59c8e839560	1030	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
AnnaBridge	163:e59c8e839560	1031	}
AnnaBridge	163:e59c8e839560	1032
AnnaBridge	163:e59c8e839560	1033	/**
AnnaBridge	163:e59c8e839560	1034	* @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
AnnaBridge	163:e59c8e839560	1035	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1036	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1037	* @rmtoll CR1 ALERTEN LL_I2C_IsEnabledSMBusAlert
AnnaBridge	163:e59c8e839560	1038	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1039	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1040	*/
AnnaBridge	163:e59c8e839560	1041	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1042	{
AnnaBridge	163:e59c8e839560	1043	return (READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN));
AnnaBridge	163:e59c8e839560	1044	}
AnnaBridge	163:e59c8e839560	1045
AnnaBridge	163:e59c8e839560	1046	/**
AnnaBridge	163:e59c8e839560	1047	* @brief Enable SMBus Packet Error Calculation (PEC).
AnnaBridge	163:e59c8e839560	1048	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1049	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1050	* @rmtoll CR1 PECEN LL_I2C_EnableSMBusPEC
AnnaBridge	163:e59c8e839560	1051	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1052	* @retval None
AnnaBridge	163:e59c8e839560	1053	*/
AnnaBridge	163:e59c8e839560	1054	__STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1055	{
AnnaBridge	163:e59c8e839560	1056	SET_BIT(I2Cx->CR1, I2C_CR1_PECEN);
AnnaBridge	163:e59c8e839560	1057	}
AnnaBridge	163:e59c8e839560	1058
AnnaBridge	163:e59c8e839560	1059	/**
AnnaBridge	163:e59c8e839560	1060	* @brief Disable SMBus Packet Error Calculation (PEC).
AnnaBridge	163:e59c8e839560	1061	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1062	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1063	* @rmtoll CR1 PECEN LL_I2C_DisableSMBusPEC
AnnaBridge	163:e59c8e839560	1064	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1065	* @retval None
AnnaBridge	163:e59c8e839560	1066	*/
AnnaBridge	163:e59c8e839560	1067	__STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1068	{
AnnaBridge	163:e59c8e839560	1069	CLEAR_BIT(I2Cx->CR1, I2C_CR1_PECEN);
AnnaBridge	163:e59c8e839560	1070	}
AnnaBridge	163:e59c8e839560	1071
AnnaBridge	163:e59c8e839560	1072	/**
AnnaBridge	163:e59c8e839560	1073	* @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
AnnaBridge	163:e59c8e839560	1074	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1075	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1076	* @rmtoll CR1 PECEN LL_I2C_IsEnabledSMBusPEC
AnnaBridge	163:e59c8e839560	1077	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1078	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1079	*/
AnnaBridge	163:e59c8e839560	1080	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1081	{
AnnaBridge	163:e59c8e839560	1082	return (READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN));
AnnaBridge	163:e59c8e839560	1083	}
AnnaBridge	163:e59c8e839560	1084
AnnaBridge	163:e59c8e839560	1085	/**
AnnaBridge	163:e59c8e839560	1086	* @brief Configure the SMBus Clock Timeout.
AnnaBridge	163:e59c8e839560	1087	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1088	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1089	* @note This configuration can only be programmed when associated Timeout is disabled (TimeoutA and/orTimeoutB).
AnnaBridge	163:e59c8e839560	1090	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_ConfigSMBusTimeout\n
AnnaBridge	163:e59c8e839560	1091	* TIMEOUTR TIDLE LL_I2C_ConfigSMBusTimeout\n
AnnaBridge	163:e59c8e839560	1092	* TIMEOUTR TIMEOUTB LL_I2C_ConfigSMBusTimeout
AnnaBridge	163:e59c8e839560	1093	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1094	* @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	163:e59c8e839560	1095	* @param TimeoutAMode This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	1096	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	163:e59c8e839560	1097	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	163:e59c8e839560	1098	* @param TimeoutB
AnnaBridge	163:e59c8e839560	1099	* @retval None
AnnaBridge	163:e59c8e839560	1100	*/
AnnaBridge	163:e59c8e839560	1101	__STATIC_INLINE void LL_I2C_ConfigSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t TimeoutA, uint32_t TimeoutAMode,
AnnaBridge	163:e59c8e839560	1102	uint32_t TimeoutB)
AnnaBridge	163:e59c8e839560	1103	{
AnnaBridge	163:e59c8e839560	1104	MODIFY_REG(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA \| I2C_TIMEOUTR_TIDLE \| I2C_TIMEOUTR_TIMEOUTB,
AnnaBridge	163:e59c8e839560	1105	TimeoutA \| TimeoutAMode \| (TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos));
AnnaBridge	163:e59c8e839560	1106	}
AnnaBridge	163:e59c8e839560	1107
AnnaBridge	163:e59c8e839560	1108	/**
AnnaBridge	163:e59c8e839560	1109	* @brief Configure the SMBus Clock TimeoutA (SCL low timeout or SCL and SDA high timeout depends on TimeoutA mode).
AnnaBridge	163:e59c8e839560	1110	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1111	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1112	* @note These bits can only be programmed when TimeoutA is disabled.
AnnaBridge	163:e59c8e839560	1113	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_SetSMBusTimeoutA
AnnaBridge	163:e59c8e839560	1114	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1115	* @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	163:e59c8e839560	1116	* @retval None
AnnaBridge	163:e59c8e839560	1117	*/
AnnaBridge	163:e59c8e839560	1118	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutA(I2C_TypeDef *I2Cx, uint32_t TimeoutA)
AnnaBridge	163:e59c8e839560	1119	{
AnnaBridge	163:e59c8e839560	1120	WRITE_REG(I2Cx->TIMEOUTR, TimeoutA);
AnnaBridge	163:e59c8e839560	1121	}
AnnaBridge	163:e59c8e839560	1122
AnnaBridge	163:e59c8e839560	1123	/**
AnnaBridge	163:e59c8e839560	1124	* @brief Get the SMBus Clock TimeoutA setting.
AnnaBridge	163:e59c8e839560	1125	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1126	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1127	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_GetSMBusTimeoutA
AnnaBridge	163:e59c8e839560	1128	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1129	* @retval Value between Min_Data=0 and Max_Data=0xFFF
AnnaBridge	163:e59c8e839560	1130	*/
AnnaBridge	163:e59c8e839560	1131	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutA(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1132	{
AnnaBridge	163:e59c8e839560	1133	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA));
AnnaBridge	163:e59c8e839560	1134	}
AnnaBridge	163:e59c8e839560	1135
AnnaBridge	163:e59c8e839560	1136	/**
AnnaBridge	163:e59c8e839560	1137	* @brief Set the SMBus Clock TimeoutA mode.
AnnaBridge	163:e59c8e839560	1138	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1139	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1140	* @note This bit can only be programmed when TimeoutA is disabled.
AnnaBridge	163:e59c8e839560	1141	* @rmtoll TIMEOUTR TIDLE LL_I2C_SetSMBusTimeoutAMode
AnnaBridge	163:e59c8e839560	1142	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1143	* @param TimeoutAMode This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	1144	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	163:e59c8e839560	1145	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	163:e59c8e839560	1146	* @retval None
AnnaBridge	163:e59c8e839560	1147	*/
AnnaBridge	163:e59c8e839560	1148	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutAMode(I2C_TypeDef *I2Cx, uint32_t TimeoutAMode)
AnnaBridge	163:e59c8e839560	1149	{
AnnaBridge	163:e59c8e839560	1150	WRITE_REG(I2Cx->TIMEOUTR, TimeoutAMode);
AnnaBridge	163:e59c8e839560	1151	}
AnnaBridge	163:e59c8e839560	1152
AnnaBridge	163:e59c8e839560	1153	/**
AnnaBridge	163:e59c8e839560	1154	* @brief Get the SMBus Clock TimeoutA mode.
AnnaBridge	163:e59c8e839560	1155	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1156	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1157	* @rmtoll TIMEOUTR TIDLE LL_I2C_GetSMBusTimeoutAMode
AnnaBridge	163:e59c8e839560	1158	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1159	* @retval Returned value can be one of the following values:
AnnaBridge	163:e59c8e839560	1160	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	163:e59c8e839560	1161	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	163:e59c8e839560	1162	*/
AnnaBridge	163:e59c8e839560	1163	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutAMode(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1164	{
AnnaBridge	163:e59c8e839560	1165	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIDLE));
AnnaBridge	163:e59c8e839560	1166	}
AnnaBridge	163:e59c8e839560	1167
AnnaBridge	163:e59c8e839560	1168	/**
AnnaBridge	163:e59c8e839560	1169	* @brief Configure the SMBus Extended Cumulative Clock TimeoutB (Master or Slave mode).
AnnaBridge	163:e59c8e839560	1170	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1171	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1172	* @note These bits can only be programmed when TimeoutB is disabled.
AnnaBridge	163:e59c8e839560	1173	* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_SetSMBusTimeoutB
AnnaBridge	163:e59c8e839560	1174	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1175	* @param TimeoutB This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	163:e59c8e839560	1176	* @retval None
AnnaBridge	163:e59c8e839560	1177	*/
AnnaBridge	163:e59c8e839560	1178	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutB(I2C_TypeDef *I2Cx, uint32_t TimeoutB)
AnnaBridge	163:e59c8e839560	1179	{
AnnaBridge	163:e59c8e839560	1180	WRITE_REG(I2Cx->TIMEOUTR, TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos);
AnnaBridge	163:e59c8e839560	1181	}
AnnaBridge	163:e59c8e839560	1182
AnnaBridge	163:e59c8e839560	1183	/**
AnnaBridge	163:e59c8e839560	1184	* @brief Get the SMBus Extented Cumulative Clock TimeoutB setting.
AnnaBridge	163:e59c8e839560	1185	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1186	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1187	* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_GetSMBusTimeoutB
AnnaBridge	163:e59c8e839560	1188	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1189	* @retval Value between Min_Data=0 and Max_Data=0xFFF
AnnaBridge	163:e59c8e839560	1190	*/
AnnaBridge	163:e59c8e839560	1191	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutB(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1192	{
AnnaBridge	163:e59c8e839560	1193	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTB) >> I2C_TIMEOUTR_TIMEOUTB_Pos);
AnnaBridge	163:e59c8e839560	1194	}
AnnaBridge	163:e59c8e839560	1195
AnnaBridge	163:e59c8e839560	1196	/**
AnnaBridge	163:e59c8e839560	1197	* @brief Enable the SMBus Clock Timeout.
AnnaBridge	163:e59c8e839560	1198	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1199	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1200	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_EnableSMBusTimeout\n
AnnaBridge	163:e59c8e839560	1201	* TIMEOUTR TEXTEN LL_I2C_EnableSMBusTimeout
AnnaBridge	163:e59c8e839560	1202	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1203	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	1204	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	163:e59c8e839560	1205	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	163:e59c8e839560	1206	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	163:e59c8e839560	1207	* @retval None
AnnaBridge	163:e59c8e839560	1208	*/
AnnaBridge	163:e59c8e839560	1209	__STATIC_INLINE void LL_I2C_EnableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	163:e59c8e839560	1210	{
AnnaBridge	163:e59c8e839560	1211	SET_BIT(I2Cx->TIMEOUTR, ClockTimeout);
AnnaBridge	163:e59c8e839560	1212	}
AnnaBridge	163:e59c8e839560	1213
AnnaBridge	163:e59c8e839560	1214	/**
AnnaBridge	163:e59c8e839560	1215	* @brief Disable the SMBus Clock Timeout.
AnnaBridge	163:e59c8e839560	1216	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1217	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1218	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_DisableSMBusTimeout\n
AnnaBridge	163:e59c8e839560	1219	* TIMEOUTR TEXTEN LL_I2C_DisableSMBusTimeout
AnnaBridge	163:e59c8e839560	1220	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1221	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	1222	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	163:e59c8e839560	1223	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	163:e59c8e839560	1224	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	163:e59c8e839560	1225	* @retval None
AnnaBridge	163:e59c8e839560	1226	*/
AnnaBridge	163:e59c8e839560	1227	__STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	163:e59c8e839560	1228	{
AnnaBridge	163:e59c8e839560	1229	CLEAR_BIT(I2Cx->TIMEOUTR, ClockTimeout);
AnnaBridge	163:e59c8e839560	1230	}
AnnaBridge	163:e59c8e839560	1231
AnnaBridge	163:e59c8e839560	1232	/**
AnnaBridge	163:e59c8e839560	1233	* @brief Check if the SMBus Clock Timeout is enabled or disabled.
AnnaBridge	163:e59c8e839560	1234	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1235	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1236	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_IsEnabledSMBusTimeout\n
AnnaBridge	163:e59c8e839560	1237	* TIMEOUTR TEXTEN LL_I2C_IsEnabledSMBusTimeout
AnnaBridge	163:e59c8e839560	1238	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1239	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	1240	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	163:e59c8e839560	1241	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	163:e59c8e839560	1242	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	163:e59c8e839560	1243	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1244	*/
AnnaBridge	163:e59c8e839560	1245	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	163:e59c8e839560	1246	{
AnnaBridge	163:e59c8e839560	1247	return (READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN \| I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout));
AnnaBridge	163:e59c8e839560	1248	}
AnnaBridge	163:e59c8e839560	1249
AnnaBridge	163:e59c8e839560	1250	/**
AnnaBridge	163:e59c8e839560	1251	* @}
AnnaBridge	163:e59c8e839560	1252	*/
AnnaBridge	163:e59c8e839560	1253
AnnaBridge	163:e59c8e839560	1254	/** @defgroup I2C_LL_EF_IT_Management IT_Management
AnnaBridge	163:e59c8e839560	1255	* @{
AnnaBridge	163:e59c8e839560	1256	*/
AnnaBridge	163:e59c8e839560	1257
AnnaBridge	163:e59c8e839560	1258	/**
AnnaBridge	163:e59c8e839560	1259	* @brief Enable TXIS interrupt.
AnnaBridge	163:e59c8e839560	1260	* @rmtoll CR1 TXIE LL_I2C_EnableIT_TX
AnnaBridge	163:e59c8e839560	1261	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1262	* @retval None
AnnaBridge	163:e59c8e839560	1263	*/
AnnaBridge	163:e59c8e839560	1264	__STATIC_INLINE void LL_I2C_EnableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1265	{
AnnaBridge	163:e59c8e839560	1266	SET_BIT(I2Cx->CR1, I2C_CR1_TXIE);
AnnaBridge	163:e59c8e839560	1267	}
AnnaBridge	163:e59c8e839560	1268
AnnaBridge	163:e59c8e839560	1269	/**
AnnaBridge	163:e59c8e839560	1270	* @brief Disable TXIS interrupt.
AnnaBridge	163:e59c8e839560	1271	* @rmtoll CR1 TXIE LL_I2C_DisableIT_TX
AnnaBridge	163:e59c8e839560	1272	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1273	* @retval None
AnnaBridge	163:e59c8e839560	1274	*/
AnnaBridge	163:e59c8e839560	1275	__STATIC_INLINE void LL_I2C_DisableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1276	{
AnnaBridge	163:e59c8e839560	1277	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXIE);
AnnaBridge	163:e59c8e839560	1278	}
AnnaBridge	163:e59c8e839560	1279
AnnaBridge	163:e59c8e839560	1280	/**
AnnaBridge	163:e59c8e839560	1281	* @brief Check if the TXIS Interrupt is enabled or disabled.
AnnaBridge	163:e59c8e839560	1282	* @rmtoll CR1 TXIE LL_I2C_IsEnabledIT_TX
AnnaBridge	163:e59c8e839560	1283	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1284	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1285	*/
AnnaBridge	163:e59c8e839560	1286	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1287	{
AnnaBridge	163:e59c8e839560	1288	return (READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE));
AnnaBridge	163:e59c8e839560	1289	}
AnnaBridge	163:e59c8e839560	1290
AnnaBridge	163:e59c8e839560	1291	/**
AnnaBridge	163:e59c8e839560	1292	* @brief Enable RXNE interrupt.
AnnaBridge	163:e59c8e839560	1293	* @rmtoll CR1 RXIE LL_I2C_EnableIT_RX
AnnaBridge	163:e59c8e839560	1294	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1295	* @retval None
AnnaBridge	163:e59c8e839560	1296	*/
AnnaBridge	163:e59c8e839560	1297	__STATIC_INLINE void LL_I2C_EnableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1298	{
AnnaBridge	163:e59c8e839560	1299	SET_BIT(I2Cx->CR1, I2C_CR1_RXIE);
AnnaBridge	163:e59c8e839560	1300	}
AnnaBridge	163:e59c8e839560	1301
AnnaBridge	163:e59c8e839560	1302	/**
AnnaBridge	163:e59c8e839560	1303	* @brief Disable RXNE interrupt.
AnnaBridge	163:e59c8e839560	1304	* @rmtoll CR1 RXIE LL_I2C_DisableIT_RX
AnnaBridge	163:e59c8e839560	1305	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1306	* @retval None
AnnaBridge	163:e59c8e839560	1307	*/
AnnaBridge	163:e59c8e839560	1308	__STATIC_INLINE void LL_I2C_DisableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1309	{
AnnaBridge	163:e59c8e839560	1310	CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXIE);
AnnaBridge	163:e59c8e839560	1311	}
AnnaBridge	163:e59c8e839560	1312
AnnaBridge	163:e59c8e839560	1313	/**
AnnaBridge	163:e59c8e839560	1314	* @brief Check if the RXNE Interrupt is enabled or disabled.
AnnaBridge	163:e59c8e839560	1315	* @rmtoll CR1 RXIE LL_I2C_IsEnabledIT_RX
AnnaBridge	163:e59c8e839560	1316	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1317	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1318	*/
AnnaBridge	163:e59c8e839560	1319	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1320	{
AnnaBridge	163:e59c8e839560	1321	return (READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE));
AnnaBridge	163:e59c8e839560	1322	}
AnnaBridge	163:e59c8e839560	1323
AnnaBridge	163:e59c8e839560	1324	/**
AnnaBridge	163:e59c8e839560	1325	* @brief Enable Address match interrupt (slave mode only).
AnnaBridge	163:e59c8e839560	1326	* @rmtoll CR1 ADDRIE LL_I2C_EnableIT_ADDR
AnnaBridge	163:e59c8e839560	1327	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1328	* @retval None
AnnaBridge	163:e59c8e839560	1329	*/
AnnaBridge	163:e59c8e839560	1330	__STATIC_INLINE void LL_I2C_EnableIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1331	{
AnnaBridge	163:e59c8e839560	1332	SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
AnnaBridge	163:e59c8e839560	1333	}
AnnaBridge	163:e59c8e839560	1334
AnnaBridge	163:e59c8e839560	1335	/**
AnnaBridge	163:e59c8e839560	1336	* @brief Disable Address match interrupt (slave mode only).
AnnaBridge	163:e59c8e839560	1337	* @rmtoll CR1 ADDRIE LL_I2C_DisableIT_ADDR
AnnaBridge	163:e59c8e839560	1338	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1339	* @retval None
AnnaBridge	163:e59c8e839560	1340	*/
AnnaBridge	163:e59c8e839560	1341	__STATIC_INLINE void LL_I2C_DisableIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1342	{
AnnaBridge	163:e59c8e839560	1343	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
AnnaBridge	163:e59c8e839560	1344	}
AnnaBridge	163:e59c8e839560	1345
AnnaBridge	163:e59c8e839560	1346	/**
AnnaBridge	163:e59c8e839560	1347	* @brief Check if Address match interrupt is enabled or disabled.
AnnaBridge	163:e59c8e839560	1348	* @rmtoll CR1 ADDRIE LL_I2C_IsEnabledIT_ADDR
AnnaBridge	163:e59c8e839560	1349	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1350	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1351	*/
AnnaBridge	163:e59c8e839560	1352	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1353	{
AnnaBridge	163:e59c8e839560	1354	return (READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE));
AnnaBridge	163:e59c8e839560	1355	}
AnnaBridge	163:e59c8e839560	1356
AnnaBridge	163:e59c8e839560	1357	/**
AnnaBridge	163:e59c8e839560	1358	* @brief Enable Not acknowledge received interrupt.
AnnaBridge	163:e59c8e839560	1359	* @rmtoll CR1 NACKIE LL_I2C_EnableIT_NACK
AnnaBridge	163:e59c8e839560	1360	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1361	* @retval None
AnnaBridge	163:e59c8e839560	1362	*/
AnnaBridge	163:e59c8e839560	1363	__STATIC_INLINE void LL_I2C_EnableIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1364	{
AnnaBridge	163:e59c8e839560	1365	SET_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
AnnaBridge	163:e59c8e839560	1366	}
AnnaBridge	163:e59c8e839560	1367
AnnaBridge	163:e59c8e839560	1368	/**
AnnaBridge	163:e59c8e839560	1369	* @brief Disable Not acknowledge received interrupt.
AnnaBridge	163:e59c8e839560	1370	* @rmtoll CR1 NACKIE LL_I2C_DisableIT_NACK
AnnaBridge	163:e59c8e839560	1371	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1372	* @retval None
AnnaBridge	163:e59c8e839560	1373	*/
AnnaBridge	163:e59c8e839560	1374	__STATIC_INLINE void LL_I2C_DisableIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1375	{
AnnaBridge	163:e59c8e839560	1376	CLEAR_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
AnnaBridge	163:e59c8e839560	1377	}
AnnaBridge	163:e59c8e839560	1378
AnnaBridge	163:e59c8e839560	1379	/**
AnnaBridge	163:e59c8e839560	1380	* @brief Check if Not acknowledge received interrupt is enabled or disabled.
AnnaBridge	163:e59c8e839560	1381	* @rmtoll CR1 NACKIE LL_I2C_IsEnabledIT_NACK
AnnaBridge	163:e59c8e839560	1382	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1383	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1384	*/
AnnaBridge	163:e59c8e839560	1385	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1386	{
AnnaBridge	163:e59c8e839560	1387	return (READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE));
AnnaBridge	163:e59c8e839560	1388	}
AnnaBridge	163:e59c8e839560	1389
AnnaBridge	163:e59c8e839560	1390	/**
AnnaBridge	163:e59c8e839560	1391	* @brief Enable STOP detection interrupt.
AnnaBridge	163:e59c8e839560	1392	* @rmtoll CR1 STOPIE LL_I2C_EnableIT_STOP
AnnaBridge	163:e59c8e839560	1393	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1394	* @retval None
AnnaBridge	163:e59c8e839560	1395	*/
AnnaBridge	163:e59c8e839560	1396	__STATIC_INLINE void LL_I2C_EnableIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1397	{
AnnaBridge	163:e59c8e839560	1398	SET_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
AnnaBridge	163:e59c8e839560	1399	}
AnnaBridge	163:e59c8e839560	1400
AnnaBridge	163:e59c8e839560	1401	/**
AnnaBridge	163:e59c8e839560	1402	* @brief Disable STOP detection interrupt.
AnnaBridge	163:e59c8e839560	1403	* @rmtoll CR1 STOPIE LL_I2C_DisableIT_STOP
AnnaBridge	163:e59c8e839560	1404	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1405	* @retval None
AnnaBridge	163:e59c8e839560	1406	*/
AnnaBridge	163:e59c8e839560	1407	__STATIC_INLINE void LL_I2C_DisableIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1408	{
AnnaBridge	163:e59c8e839560	1409	CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
AnnaBridge	163:e59c8e839560	1410	}
AnnaBridge	163:e59c8e839560	1411
AnnaBridge	163:e59c8e839560	1412	/**
AnnaBridge	163:e59c8e839560	1413	* @brief Check if STOP detection interrupt is enabled or disabled.
AnnaBridge	163:e59c8e839560	1414	* @rmtoll CR1 STOPIE LL_I2C_IsEnabledIT_STOP
AnnaBridge	163:e59c8e839560	1415	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1416	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1417	*/
AnnaBridge	163:e59c8e839560	1418	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1419	{
AnnaBridge	163:e59c8e839560	1420	return (READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE));
AnnaBridge	163:e59c8e839560	1421	}
AnnaBridge	163:e59c8e839560	1422
AnnaBridge	163:e59c8e839560	1423	/**
AnnaBridge	163:e59c8e839560	1424	* @brief Enable Transfer Complete interrupt.
AnnaBridge	163:e59c8e839560	1425	* @note Any of these events will generate interrupt :
AnnaBridge	163:e59c8e839560	1426	* Transfer Complete (TC)
AnnaBridge	163:e59c8e839560	1427	* Transfer Complete Reload (TCR)
AnnaBridge	163:e59c8e839560	1428	* @rmtoll CR1 TCIE LL_I2C_EnableIT_TC
AnnaBridge	163:e59c8e839560	1429	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1430	* @retval None
AnnaBridge	163:e59c8e839560	1431	*/
AnnaBridge	163:e59c8e839560	1432	__STATIC_INLINE void LL_I2C_EnableIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1433	{
AnnaBridge	163:e59c8e839560	1434	SET_BIT(I2Cx->CR1, I2C_CR1_TCIE);
AnnaBridge	163:e59c8e839560	1435	}
AnnaBridge	163:e59c8e839560	1436
AnnaBridge	163:e59c8e839560	1437	/**
AnnaBridge	163:e59c8e839560	1438	* @brief Disable Transfer Complete interrupt.
AnnaBridge	163:e59c8e839560	1439	* @note Any of these events will generate interrupt :
AnnaBridge	163:e59c8e839560	1440	* Transfer Complete (TC)
AnnaBridge	163:e59c8e839560	1441	* Transfer Complete Reload (TCR)
AnnaBridge	163:e59c8e839560	1442	* @rmtoll CR1 TCIE LL_I2C_DisableIT_TC
AnnaBridge	163:e59c8e839560	1443	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1444	* @retval None
AnnaBridge	163:e59c8e839560	1445	*/
AnnaBridge	163:e59c8e839560	1446	__STATIC_INLINE void LL_I2C_DisableIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1447	{
AnnaBridge	163:e59c8e839560	1448	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TCIE);
AnnaBridge	163:e59c8e839560	1449	}
AnnaBridge	163:e59c8e839560	1450
AnnaBridge	163:e59c8e839560	1451	/**
AnnaBridge	163:e59c8e839560	1452	* @brief Check if Transfer Complete interrupt is enabled or disabled.
AnnaBridge	163:e59c8e839560	1453	* @rmtoll CR1 TCIE LL_I2C_IsEnabledIT_TC
AnnaBridge	163:e59c8e839560	1454	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1455	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1456	*/
AnnaBridge	163:e59c8e839560	1457	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1458	{
AnnaBridge	163:e59c8e839560	1459	return (READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE));
AnnaBridge	163:e59c8e839560	1460	}
AnnaBridge	163:e59c8e839560	1461
AnnaBridge	163:e59c8e839560	1462	/**
AnnaBridge	163:e59c8e839560	1463	* @brief Enable Error interrupts.
AnnaBridge	163:e59c8e839560	1464	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1465	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1466	* @note Any of these errors will generate interrupt :
AnnaBridge	163:e59c8e839560	1467	* Arbitration Loss (ARLO)
AnnaBridge	163:e59c8e839560	1468	* Bus Error detection (BERR)
AnnaBridge	163:e59c8e839560	1469	* Overrun/Underrun (OVR)
AnnaBridge	163:e59c8e839560	1470	* SMBus Timeout detection (TIMEOUT)
AnnaBridge	163:e59c8e839560	1471	* SMBus PEC error detection (PECERR)
AnnaBridge	163:e59c8e839560	1472	* SMBus Alert pin event detection (ALERT)
AnnaBridge	163:e59c8e839560	1473	* @rmtoll CR1 ERRIE LL_I2C_EnableIT_ERR
AnnaBridge	163:e59c8e839560	1474	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1475	* @retval None
AnnaBridge	163:e59c8e839560	1476	*/
AnnaBridge	163:e59c8e839560	1477	__STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1478	{
AnnaBridge	163:e59c8e839560	1479	SET_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
AnnaBridge	163:e59c8e839560	1480	}
AnnaBridge	163:e59c8e839560	1481
AnnaBridge	163:e59c8e839560	1482	/**
AnnaBridge	163:e59c8e839560	1483	* @brief Disable Error interrupts.
AnnaBridge	163:e59c8e839560	1484	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1485	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1486	* @note Any of these errors will generate interrupt :
AnnaBridge	163:e59c8e839560	1487	* Arbitration Loss (ARLO)
AnnaBridge	163:e59c8e839560	1488	* Bus Error detection (BERR)
AnnaBridge	163:e59c8e839560	1489	* Overrun/Underrun (OVR)
AnnaBridge	163:e59c8e839560	1490	* SMBus Timeout detection (TIMEOUT)
AnnaBridge	163:e59c8e839560	1491	* SMBus PEC error detection (PECERR)
AnnaBridge	163:e59c8e839560	1492	* SMBus Alert pin event detection (ALERT)
AnnaBridge	163:e59c8e839560	1493	* @rmtoll CR1 ERRIE LL_I2C_DisableIT_ERR
AnnaBridge	163:e59c8e839560	1494	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1495	* @retval None
AnnaBridge	163:e59c8e839560	1496	*/
AnnaBridge	163:e59c8e839560	1497	__STATIC_INLINE void LL_I2C_DisableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1498	{
AnnaBridge	163:e59c8e839560	1499	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
AnnaBridge	163:e59c8e839560	1500	}
AnnaBridge	163:e59c8e839560	1501
AnnaBridge	163:e59c8e839560	1502	/**
AnnaBridge	163:e59c8e839560	1503	* @brief Check if Error interrupts are enabled or disabled.
AnnaBridge	163:e59c8e839560	1504	* @rmtoll CR1 ERRIE LL_I2C_IsEnabledIT_ERR
AnnaBridge	163:e59c8e839560	1505	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1506	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1507	*/
AnnaBridge	163:e59c8e839560	1508	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1509	{
AnnaBridge	163:e59c8e839560	1510	return (READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE));
AnnaBridge	163:e59c8e839560	1511	}
AnnaBridge	163:e59c8e839560	1512
AnnaBridge	163:e59c8e839560	1513	/**
AnnaBridge	163:e59c8e839560	1514	* @}
AnnaBridge	163:e59c8e839560	1515	*/
AnnaBridge	163:e59c8e839560	1516
AnnaBridge	163:e59c8e839560	1517	/** @defgroup I2C_LL_EF_FLAG_management FLAG_management
AnnaBridge	163:e59c8e839560	1518	* @{
AnnaBridge	163:e59c8e839560	1519	*/
AnnaBridge	163:e59c8e839560	1520
AnnaBridge	163:e59c8e839560	1521	/**
AnnaBridge	163:e59c8e839560	1522	* @brief Indicate the status of Transmit data register empty flag.
AnnaBridge	163:e59c8e839560	1523	* @note RESET: When next data is written in Transmit data register.
AnnaBridge	163:e59c8e839560	1524	* SET: When Transmit data register is empty.
AnnaBridge	163:e59c8e839560	1525	* @rmtoll ISR TXE LL_I2C_IsActiveFlag_TXE
AnnaBridge	163:e59c8e839560	1526	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1527	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1528	*/
AnnaBridge	163:e59c8e839560	1529	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1530	{
AnnaBridge	163:e59c8e839560	1531	return (READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE));
AnnaBridge	163:e59c8e839560	1532	}
AnnaBridge	163:e59c8e839560	1533
AnnaBridge	163:e59c8e839560	1534	/**
AnnaBridge	163:e59c8e839560	1535	* @brief Indicate the status of Transmit interrupt flag.
AnnaBridge	163:e59c8e839560	1536	* @note RESET: When next data is written in Transmit data register.
AnnaBridge	163:e59c8e839560	1537	* SET: When Transmit data register is empty.
AnnaBridge	163:e59c8e839560	1538	* @rmtoll ISR TXIS LL_I2C_IsActiveFlag_TXIS
AnnaBridge	163:e59c8e839560	1539	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1540	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1541	*/
AnnaBridge	163:e59c8e839560	1542	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXIS(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1543	{
AnnaBridge	163:e59c8e839560	1544	return (READ_BIT(I2Cx->ISR, I2C_ISR_TXIS) == (I2C_ISR_TXIS));
AnnaBridge	163:e59c8e839560	1545	}
AnnaBridge	163:e59c8e839560	1546
AnnaBridge	163:e59c8e839560	1547	/**
AnnaBridge	163:e59c8e839560	1548	* @brief Indicate the status of Receive data register not empty flag.
AnnaBridge	163:e59c8e839560	1549	* @note RESET: When Receive data register is read.
AnnaBridge	163:e59c8e839560	1550	* SET: When the received data is copied in Receive data register.
AnnaBridge	163:e59c8e839560	1551	* @rmtoll ISR RXNE LL_I2C_IsActiveFlag_RXNE
AnnaBridge	163:e59c8e839560	1552	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1553	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1554	*/
AnnaBridge	163:e59c8e839560	1555	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1556	{
AnnaBridge	163:e59c8e839560	1557	return (READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE));
AnnaBridge	163:e59c8e839560	1558	}
AnnaBridge	163:e59c8e839560	1559
AnnaBridge	163:e59c8e839560	1560	/**
AnnaBridge	163:e59c8e839560	1561	* @brief Indicate the status of Address matched flag (slave mode).
AnnaBridge	163:e59c8e839560	1562	* @note RESET: Clear default value.
AnnaBridge	163:e59c8e839560	1563	* SET: When the received slave address matched with one of the enabled slave address.
AnnaBridge	163:e59c8e839560	1564	* @rmtoll ISR ADDR LL_I2C_IsActiveFlag_ADDR
AnnaBridge	163:e59c8e839560	1565	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1566	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1567	*/
AnnaBridge	163:e59c8e839560	1568	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1569	{
AnnaBridge	163:e59c8e839560	1570	return (READ_BIT(I2Cx->ISR, I2C_ISR_ADDR) == (I2C_ISR_ADDR));
AnnaBridge	163:e59c8e839560	1571	}
AnnaBridge	163:e59c8e839560	1572
AnnaBridge	163:e59c8e839560	1573	/**
AnnaBridge	163:e59c8e839560	1574	* @brief Indicate the status of Not Acknowledge received flag.
AnnaBridge	163:e59c8e839560	1575	* @note RESET: Clear default value.
AnnaBridge	163:e59c8e839560	1576	* SET: When a NACK is received after a byte transmission.
AnnaBridge	163:e59c8e839560	1577	* @rmtoll ISR NACKF LL_I2C_IsActiveFlag_NACK
AnnaBridge	163:e59c8e839560	1578	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1579	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1580	*/
AnnaBridge	163:e59c8e839560	1581	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1582	{
AnnaBridge	163:e59c8e839560	1583	return (READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF));
AnnaBridge	163:e59c8e839560	1584	}
AnnaBridge	163:e59c8e839560	1585
AnnaBridge	163:e59c8e839560	1586	/**
AnnaBridge	163:e59c8e839560	1587	* @brief Indicate the status of Stop detection flag.
AnnaBridge	163:e59c8e839560	1588	* @note RESET: Clear default value.
AnnaBridge	163:e59c8e839560	1589	* SET: When a Stop condition is detected.
AnnaBridge	163:e59c8e839560	1590	* @rmtoll ISR STOPF LL_I2C_IsActiveFlag_STOP
AnnaBridge	163:e59c8e839560	1591	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1592	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1593	*/
AnnaBridge	163:e59c8e839560	1594	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1595	{
AnnaBridge	163:e59c8e839560	1596	return (READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF));
AnnaBridge	163:e59c8e839560	1597	}
AnnaBridge	163:e59c8e839560	1598
AnnaBridge	163:e59c8e839560	1599	/**
AnnaBridge	163:e59c8e839560	1600	* @brief Indicate the status of Transfer complete flag (master mode).
AnnaBridge	163:e59c8e839560	1601	* @note RESET: Clear default value.
AnnaBridge	163:e59c8e839560	1602	* SET: When RELOAD=0, AUTOEND=0 and NBYTES date have been transferred.
AnnaBridge	163:e59c8e839560	1603	* @rmtoll ISR TC LL_I2C_IsActiveFlag_TC
AnnaBridge	163:e59c8e839560	1604	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1605	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1606	*/
AnnaBridge	163:e59c8e839560	1607	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TC(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1608	{
AnnaBridge	163:e59c8e839560	1609	return (READ_BIT(I2Cx->ISR, I2C_ISR_TC) == (I2C_ISR_TC));
AnnaBridge	163:e59c8e839560	1610	}
AnnaBridge	163:e59c8e839560	1611
AnnaBridge	163:e59c8e839560	1612	/**
AnnaBridge	163:e59c8e839560	1613	* @brief Indicate the status of Transfer complete flag (master mode).
AnnaBridge	163:e59c8e839560	1614	* @note RESET: Clear default value.
AnnaBridge	163:e59c8e839560	1615	* SET: When RELOAD=1 and NBYTES date have been transferred.
AnnaBridge	163:e59c8e839560	1616	* @rmtoll ISR TCR LL_I2C_IsActiveFlag_TCR
AnnaBridge	163:e59c8e839560	1617	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1618	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1619	*/
AnnaBridge	163:e59c8e839560	1620	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TCR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1621	{
AnnaBridge	163:e59c8e839560	1622	return (READ_BIT(I2Cx->ISR, I2C_ISR_TCR) == (I2C_ISR_TCR));
AnnaBridge	163:e59c8e839560	1623	}
AnnaBridge	163:e59c8e839560	1624
AnnaBridge	163:e59c8e839560	1625	/**
AnnaBridge	163:e59c8e839560	1626	* @brief Indicate the status of Bus error flag.
AnnaBridge	163:e59c8e839560	1627	* @note RESET: Clear default value.
AnnaBridge	163:e59c8e839560	1628	* SET: When a misplaced Start or Stop condition is detected.
AnnaBridge	163:e59c8e839560	1629	* @rmtoll ISR BERR LL_I2C_IsActiveFlag_BERR
AnnaBridge	163:e59c8e839560	1630	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1631	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1632	*/
AnnaBridge	163:e59c8e839560	1633	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1634	{
AnnaBridge	163:e59c8e839560	1635	return (READ_BIT(I2Cx->ISR, I2C_ISR_BERR) == (I2C_ISR_BERR));
AnnaBridge	163:e59c8e839560	1636	}
AnnaBridge	163:e59c8e839560	1637
AnnaBridge	163:e59c8e839560	1638	/**
AnnaBridge	163:e59c8e839560	1639	* @brief Indicate the status of Arbitration lost flag.
AnnaBridge	163:e59c8e839560	1640	* @note RESET: Clear default value.
AnnaBridge	163:e59c8e839560	1641	* SET: When arbitration lost.
AnnaBridge	163:e59c8e839560	1642	* @rmtoll ISR ARLO LL_I2C_IsActiveFlag_ARLO
AnnaBridge	163:e59c8e839560	1643	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1644	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1645	*/
AnnaBridge	163:e59c8e839560	1646	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1647	{
AnnaBridge	163:e59c8e839560	1648	return (READ_BIT(I2Cx->ISR, I2C_ISR_ARLO) == (I2C_ISR_ARLO));
AnnaBridge	163:e59c8e839560	1649	}
AnnaBridge	163:e59c8e839560	1650
AnnaBridge	163:e59c8e839560	1651	/**
AnnaBridge	163:e59c8e839560	1652	* @brief Indicate the status of Overrun/Underrun flag (slave mode).
AnnaBridge	163:e59c8e839560	1653	* @note RESET: Clear default value.
AnnaBridge	163:e59c8e839560	1654	* SET: When an overrun/underrun error occurs (Clock Stretching Disabled).
AnnaBridge	163:e59c8e839560	1655	* @rmtoll ISR OVR LL_I2C_IsActiveFlag_OVR
AnnaBridge	163:e59c8e839560	1656	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1657	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1658	*/
AnnaBridge	163:e59c8e839560	1659	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1660	{
AnnaBridge	163:e59c8e839560	1661	return (READ_BIT(I2Cx->ISR, I2C_ISR_OVR) == (I2C_ISR_OVR));
AnnaBridge	163:e59c8e839560	1662	}
AnnaBridge	163:e59c8e839560	1663
AnnaBridge	163:e59c8e839560	1664	/**
AnnaBridge	163:e59c8e839560	1665	* @brief Indicate the status of SMBus PEC error flag in reception.
AnnaBridge	163:e59c8e839560	1666	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1667	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1668	* @note RESET: Clear default value.
AnnaBridge	163:e59c8e839560	1669	* SET: When the received PEC does not match with the PEC register content.
AnnaBridge	163:e59c8e839560	1670	* @rmtoll ISR PECERR LL_I2C_IsActiveSMBusFlag_PECERR
AnnaBridge	163:e59c8e839560	1671	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1672	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1673	*/
AnnaBridge	163:e59c8e839560	1674	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1675	{
AnnaBridge	163:e59c8e839560	1676	return (READ_BIT(I2Cx->ISR, I2C_ISR_PECERR) == (I2C_ISR_PECERR));
AnnaBridge	163:e59c8e839560	1677	}
AnnaBridge	163:e59c8e839560	1678
AnnaBridge	163:e59c8e839560	1679	/**
AnnaBridge	163:e59c8e839560	1680	* @brief Indicate the status of SMBus Timeout detection flag.
AnnaBridge	163:e59c8e839560	1681	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1682	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1683	* @note RESET: Clear default value.
AnnaBridge	163:e59c8e839560	1684	* SET: When a timeout or extended clock timeout occurs.
AnnaBridge	163:e59c8e839560	1685	* @rmtoll ISR TIMEOUT LL_I2C_IsActiveSMBusFlag_TIMEOUT
AnnaBridge	163:e59c8e839560	1686	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1687	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1688	*/
AnnaBridge	163:e59c8e839560	1689	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1690	{
AnnaBridge	163:e59c8e839560	1691	return (READ_BIT(I2Cx->ISR, I2C_ISR_TIMEOUT) == (I2C_ISR_TIMEOUT));
AnnaBridge	163:e59c8e839560	1692	}
AnnaBridge	163:e59c8e839560	1693
AnnaBridge	163:e59c8e839560	1694	/**
AnnaBridge	163:e59c8e839560	1695	* @brief Indicate the status of SMBus alert flag.
AnnaBridge	163:e59c8e839560	1696	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1697	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1698	* @note RESET: Clear default value.
AnnaBridge	163:e59c8e839560	1699	* SET: When SMBus host configuration, SMBus alert enabled and
AnnaBridge	163:e59c8e839560	1700	* a falling edge event occurs on SMBA pin.
AnnaBridge	163:e59c8e839560	1701	* @rmtoll ISR ALERT LL_I2C_IsActiveSMBusFlag_ALERT
AnnaBridge	163:e59c8e839560	1702	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1703	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1704	*/
AnnaBridge	163:e59c8e839560	1705	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1706	{
AnnaBridge	163:e59c8e839560	1707	return (READ_BIT(I2Cx->ISR, I2C_ISR_ALERT) == (I2C_ISR_ALERT));
AnnaBridge	163:e59c8e839560	1708	}
AnnaBridge	163:e59c8e839560	1709
AnnaBridge	163:e59c8e839560	1710	/**
AnnaBridge	163:e59c8e839560	1711	* @brief Indicate the status of Bus Busy flag.
AnnaBridge	163:e59c8e839560	1712	* @note RESET: Clear default value.
AnnaBridge	163:e59c8e839560	1713	* SET: When a Start condition is detected.
AnnaBridge	163:e59c8e839560	1714	* @rmtoll ISR BUSY LL_I2C_IsActiveFlag_BUSY
AnnaBridge	163:e59c8e839560	1715	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1716	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1717	*/
AnnaBridge	163:e59c8e839560	1718	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BUSY(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1719	{
AnnaBridge	163:e59c8e839560	1720	return (READ_BIT(I2Cx->ISR, I2C_ISR_BUSY) == (I2C_ISR_BUSY));
AnnaBridge	163:e59c8e839560	1721	}
AnnaBridge	163:e59c8e839560	1722
AnnaBridge	163:e59c8e839560	1723	/**
AnnaBridge	163:e59c8e839560	1724	* @brief Clear Address Matched flag.
AnnaBridge	163:e59c8e839560	1725	* @rmtoll ICR ADDRCF LL_I2C_ClearFlag_ADDR
AnnaBridge	163:e59c8e839560	1726	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1727	* @retval None
AnnaBridge	163:e59c8e839560	1728	*/
AnnaBridge	163:e59c8e839560	1729	__STATIC_INLINE void LL_I2C_ClearFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1730	{
AnnaBridge	163:e59c8e839560	1731	SET_BIT(I2Cx->ICR, I2C_ICR_ADDRCF);
AnnaBridge	163:e59c8e839560	1732	}
AnnaBridge	163:e59c8e839560	1733
AnnaBridge	163:e59c8e839560	1734	/**
AnnaBridge	163:e59c8e839560	1735	* @brief Clear Not Acknowledge flag.
AnnaBridge	163:e59c8e839560	1736	* @rmtoll ICR NACKCF LL_I2C_ClearFlag_NACK
AnnaBridge	163:e59c8e839560	1737	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1738	* @retval None
AnnaBridge	163:e59c8e839560	1739	*/
AnnaBridge	163:e59c8e839560	1740	__STATIC_INLINE void LL_I2C_ClearFlag_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1741	{
AnnaBridge	163:e59c8e839560	1742	SET_BIT(I2Cx->ICR, I2C_ICR_NACKCF);
AnnaBridge	163:e59c8e839560	1743	}
AnnaBridge	163:e59c8e839560	1744
AnnaBridge	163:e59c8e839560	1745	/**
AnnaBridge	163:e59c8e839560	1746	* @brief Clear Stop detection flag.
AnnaBridge	163:e59c8e839560	1747	* @rmtoll ICR STOPCF LL_I2C_ClearFlag_STOP
AnnaBridge	163:e59c8e839560	1748	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1749	* @retval None
AnnaBridge	163:e59c8e839560	1750	*/
AnnaBridge	163:e59c8e839560	1751	__STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1752	{
AnnaBridge	163:e59c8e839560	1753	SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF);
AnnaBridge	163:e59c8e839560	1754	}
AnnaBridge	163:e59c8e839560	1755
AnnaBridge	163:e59c8e839560	1756	/**
AnnaBridge	163:e59c8e839560	1757	* @brief Clear Transmit data register empty flag (TXE).
AnnaBridge	163:e59c8e839560	1758	* @note This bit can be clear by software in order to flush the transmit data register (TXDR).
AnnaBridge	163:e59c8e839560	1759	* @rmtoll ISR TXE LL_I2C_ClearFlag_TXE
AnnaBridge	163:e59c8e839560	1760	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1761	* @retval None
AnnaBridge	163:e59c8e839560	1762	*/
AnnaBridge	163:e59c8e839560	1763	__STATIC_INLINE void LL_I2C_ClearFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1764	{
AnnaBridge	163:e59c8e839560	1765	WRITE_REG(I2Cx->ISR, I2C_ISR_TXE);
AnnaBridge	163:e59c8e839560	1766	}
AnnaBridge	163:e59c8e839560	1767
AnnaBridge	163:e59c8e839560	1768	/**
AnnaBridge	163:e59c8e839560	1769	* @brief Clear Bus error flag.
AnnaBridge	163:e59c8e839560	1770	* @rmtoll ICR BERRCF LL_I2C_ClearFlag_BERR
AnnaBridge	163:e59c8e839560	1771	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1772	* @retval None
AnnaBridge	163:e59c8e839560	1773	*/
AnnaBridge	163:e59c8e839560	1774	__STATIC_INLINE void LL_I2C_ClearFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1775	{
AnnaBridge	163:e59c8e839560	1776	SET_BIT(I2Cx->ICR, I2C_ICR_BERRCF);
AnnaBridge	163:e59c8e839560	1777	}
AnnaBridge	163:e59c8e839560	1778
AnnaBridge	163:e59c8e839560	1779	/**
AnnaBridge	163:e59c8e839560	1780	* @brief Clear Arbitration lost flag.
AnnaBridge	163:e59c8e839560	1781	* @rmtoll ICR ARLOCF LL_I2C_ClearFlag_ARLO
AnnaBridge	163:e59c8e839560	1782	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1783	* @retval None
AnnaBridge	163:e59c8e839560	1784	*/
AnnaBridge	163:e59c8e839560	1785	__STATIC_INLINE void LL_I2C_ClearFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1786	{
AnnaBridge	163:e59c8e839560	1787	SET_BIT(I2Cx->ICR, I2C_ICR_ARLOCF);
AnnaBridge	163:e59c8e839560	1788	}
AnnaBridge	163:e59c8e839560	1789
AnnaBridge	163:e59c8e839560	1790	/**
AnnaBridge	163:e59c8e839560	1791	* @brief Clear Overrun/Underrun flag.
AnnaBridge	163:e59c8e839560	1792	* @rmtoll ICR OVRCF LL_I2C_ClearFlag_OVR
AnnaBridge	163:e59c8e839560	1793	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1794	* @retval None
AnnaBridge	163:e59c8e839560	1795	*/
AnnaBridge	163:e59c8e839560	1796	__STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1797	{
AnnaBridge	163:e59c8e839560	1798	SET_BIT(I2Cx->ICR, I2C_ICR_OVRCF);
AnnaBridge	163:e59c8e839560	1799	}
AnnaBridge	163:e59c8e839560	1800
AnnaBridge	163:e59c8e839560	1801	/**
AnnaBridge	163:e59c8e839560	1802	* @brief Clear SMBus PEC error flag.
AnnaBridge	163:e59c8e839560	1803	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1804	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1805	* @rmtoll ICR PECCF LL_I2C_ClearSMBusFlag_PECERR
AnnaBridge	163:e59c8e839560	1806	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1807	* @retval None
AnnaBridge	163:e59c8e839560	1808	*/
AnnaBridge	163:e59c8e839560	1809	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1810	{
AnnaBridge	163:e59c8e839560	1811	SET_BIT(I2Cx->ICR, I2C_ICR_PECCF);
AnnaBridge	163:e59c8e839560	1812	}
AnnaBridge	163:e59c8e839560	1813
AnnaBridge	163:e59c8e839560	1814	/**
AnnaBridge	163:e59c8e839560	1815	* @brief Clear SMBus Timeout detection flag.
AnnaBridge	163:e59c8e839560	1816	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1817	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1818	* @rmtoll ICR TIMOUTCF LL_I2C_ClearSMBusFlag_TIMEOUT
AnnaBridge	163:e59c8e839560	1819	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1820	* @retval None
AnnaBridge	163:e59c8e839560	1821	*/
AnnaBridge	163:e59c8e839560	1822	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1823	{
AnnaBridge	163:e59c8e839560	1824	SET_BIT(I2Cx->ICR, I2C_ICR_TIMOUTCF);
AnnaBridge	163:e59c8e839560	1825	}
AnnaBridge	163:e59c8e839560	1826
AnnaBridge	163:e59c8e839560	1827	/**
AnnaBridge	163:e59c8e839560	1828	* @brief Clear SMBus Alert flag.
AnnaBridge	163:e59c8e839560	1829	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	1830	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	1831	* @rmtoll ICR ALERTCF LL_I2C_ClearSMBusFlag_ALERT
AnnaBridge	163:e59c8e839560	1832	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1833	* @retval None
AnnaBridge	163:e59c8e839560	1834	*/
AnnaBridge	163:e59c8e839560	1835	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1836	{
AnnaBridge	163:e59c8e839560	1837	SET_BIT(I2Cx->ICR, I2C_ICR_ALERTCF);
AnnaBridge	163:e59c8e839560	1838	}
AnnaBridge	163:e59c8e839560	1839
AnnaBridge	163:e59c8e839560	1840	/**
AnnaBridge	163:e59c8e839560	1841	* @}
AnnaBridge	163:e59c8e839560	1842	*/
AnnaBridge	163:e59c8e839560	1843
AnnaBridge	163:e59c8e839560	1844	/** @defgroup I2C_LL_EF_Data_Management Data_Management
AnnaBridge	163:e59c8e839560	1845	* @{
AnnaBridge	163:e59c8e839560	1846	*/
AnnaBridge	163:e59c8e839560	1847
AnnaBridge	163:e59c8e839560	1848	/**
AnnaBridge	163:e59c8e839560	1849	* @brief Enable automatic STOP condition generation (master mode).
AnnaBridge	163:e59c8e839560	1850	* @note Automatic end mode : a STOP condition is automatically sent when NBYTES data are transferred.
AnnaBridge	163:e59c8e839560	1851	* This bit has no effect in slave mode or when RELOAD bit is set.
AnnaBridge	163:e59c8e839560	1852	* @rmtoll CR2 AUTOEND LL_I2C_EnableAutoEndMode
AnnaBridge	163:e59c8e839560	1853	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1854	* @retval None
AnnaBridge	163:e59c8e839560	1855	*/
AnnaBridge	163:e59c8e839560	1856	__STATIC_INLINE void LL_I2C_EnableAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1857	{
AnnaBridge	163:e59c8e839560	1858	SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
AnnaBridge	163:e59c8e839560	1859	}
AnnaBridge	163:e59c8e839560	1860
AnnaBridge	163:e59c8e839560	1861	/**
AnnaBridge	163:e59c8e839560	1862	* @brief Disable automatic STOP condition generation (master mode).
AnnaBridge	163:e59c8e839560	1863	* @note Software end mode : TC flag is set when NBYTES data are transferre, stretching SCL low.
AnnaBridge	163:e59c8e839560	1864	* @rmtoll CR2 AUTOEND LL_I2C_DisableAutoEndMode
AnnaBridge	163:e59c8e839560	1865	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1866	* @retval None
AnnaBridge	163:e59c8e839560	1867	*/
AnnaBridge	163:e59c8e839560	1868	__STATIC_INLINE void LL_I2C_DisableAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1869	{
AnnaBridge	163:e59c8e839560	1870	CLEAR_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
AnnaBridge	163:e59c8e839560	1871	}
AnnaBridge	163:e59c8e839560	1872
AnnaBridge	163:e59c8e839560	1873	/**
AnnaBridge	163:e59c8e839560	1874	* @brief Check if automatic STOP condition is enabled or disabled.
AnnaBridge	163:e59c8e839560	1875	* @rmtoll CR2 AUTOEND LL_I2C_IsEnabledAutoEndMode
AnnaBridge	163:e59c8e839560	1876	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1877	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1878	*/
AnnaBridge	163:e59c8e839560	1879	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1880	{
AnnaBridge	163:e59c8e839560	1881	return (READ_BIT(I2Cx->CR2, I2C_CR2_AUTOEND) == (I2C_CR2_AUTOEND));
AnnaBridge	163:e59c8e839560	1882	}
AnnaBridge	163:e59c8e839560	1883
AnnaBridge	163:e59c8e839560	1884	/**
AnnaBridge	163:e59c8e839560	1885	* @brief Enable reload mode (master mode).
AnnaBridge	163:e59c8e839560	1886	* @note The transfer is not completed after the NBYTES data transfer, NBYTES will be reloaded when TCR flag is set.
AnnaBridge	163:e59c8e839560	1887	* @rmtoll CR2 RELOAD LL_I2C_EnableReloadMode
AnnaBridge	163:e59c8e839560	1888	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1889	* @retval None
AnnaBridge	163:e59c8e839560	1890	*/
AnnaBridge	163:e59c8e839560	1891	__STATIC_INLINE void LL_I2C_EnableReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1892	{
AnnaBridge	163:e59c8e839560	1893	SET_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
AnnaBridge	163:e59c8e839560	1894	}
AnnaBridge	163:e59c8e839560	1895
AnnaBridge	163:e59c8e839560	1896	/**
AnnaBridge	163:e59c8e839560	1897	* @brief Disable reload mode (master mode).
AnnaBridge	163:e59c8e839560	1898	* @note The transfer is completed after the NBYTES data transfer(STOP or RESTART will follow).
AnnaBridge	163:e59c8e839560	1899	* @rmtoll CR2 RELOAD LL_I2C_DisableReloadMode
AnnaBridge	163:e59c8e839560	1900	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1901	* @retval None
AnnaBridge	163:e59c8e839560	1902	*/
AnnaBridge	163:e59c8e839560	1903	__STATIC_INLINE void LL_I2C_DisableReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1904	{
AnnaBridge	163:e59c8e839560	1905	CLEAR_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
AnnaBridge	163:e59c8e839560	1906	}
AnnaBridge	163:e59c8e839560	1907
AnnaBridge	163:e59c8e839560	1908	/**
AnnaBridge	163:e59c8e839560	1909	* @brief Check if reload mode is enabled or disabled.
AnnaBridge	163:e59c8e839560	1910	* @rmtoll CR2 RELOAD LL_I2C_IsEnabledReloadMode
AnnaBridge	163:e59c8e839560	1911	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1912	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	1913	*/
AnnaBridge	163:e59c8e839560	1914	__STATIC_INLINE uint32_t LL_I2C_IsEnabledReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1915	{
AnnaBridge	163:e59c8e839560	1916	return (READ_BIT(I2Cx->CR2, I2C_CR2_RELOAD) == (I2C_CR2_RELOAD));
AnnaBridge	163:e59c8e839560	1917	}
AnnaBridge	163:e59c8e839560	1918
AnnaBridge	163:e59c8e839560	1919	/**
AnnaBridge	163:e59c8e839560	1920	* @brief Configure the number of bytes for transfer.
AnnaBridge	163:e59c8e839560	1921	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	163:e59c8e839560	1922	* @rmtoll CR2 NBYTES LL_I2C_SetTransferSize
AnnaBridge	163:e59c8e839560	1923	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1924	* @param TransferSize This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
AnnaBridge	163:e59c8e839560	1925	* @retval None
AnnaBridge	163:e59c8e839560	1926	*/
AnnaBridge	163:e59c8e839560	1927	__STATIC_INLINE void LL_I2C_SetTransferSize(I2C_TypeDef *I2Cx, uint32_t TransferSize)
AnnaBridge	163:e59c8e839560	1928	{
AnnaBridge	163:e59c8e839560	1929	MODIFY_REG(I2Cx->CR2, I2C_CR2_NBYTES, TransferSize << I2C_CR2_NBYTES_Pos);
AnnaBridge	163:e59c8e839560	1930	}
AnnaBridge	163:e59c8e839560	1931
AnnaBridge	163:e59c8e839560	1932	/**
AnnaBridge	163:e59c8e839560	1933	* @brief Get the number of bytes configured for transfer.
AnnaBridge	163:e59c8e839560	1934	* @rmtoll CR2 NBYTES LL_I2C_GetTransferSize
AnnaBridge	163:e59c8e839560	1935	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1936	* @retval Value between Min_Data=0x0 and Max_Data=0xFF
AnnaBridge	163:e59c8e839560	1937	*/
AnnaBridge	163:e59c8e839560	1938	__STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1939	{
AnnaBridge	163:e59c8e839560	1940	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_NBYTES) >> I2C_CR2_NBYTES_Pos);
AnnaBridge	163:e59c8e839560	1941	}
AnnaBridge	163:e59c8e839560	1942
AnnaBridge	163:e59c8e839560	1943	/**
AnnaBridge	163:e59c8e839560	1944	* @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge	163:e59c8e839560	1945	* @note Usage in Slave mode only.
AnnaBridge	163:e59c8e839560	1946	* @rmtoll CR2 NACK LL_I2C_AcknowledgeNextData
AnnaBridge	163:e59c8e839560	1947	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1948	* @param TypeAcknowledge This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	1949	* @arg @ref LL_I2C_ACK
AnnaBridge	163:e59c8e839560	1950	* @arg @ref LL_I2C_NACK
AnnaBridge	163:e59c8e839560	1951	* @retval None
AnnaBridge	163:e59c8e839560	1952	*/
AnnaBridge	163:e59c8e839560	1953	__STATIC_INLINE void LL_I2C_AcknowledgeNextData(I2C_TypeDef *I2Cx, uint32_t TypeAcknowledge)
AnnaBridge	163:e59c8e839560	1954	{
AnnaBridge	163:e59c8e839560	1955	MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge);
AnnaBridge	163:e59c8e839560	1956	}
AnnaBridge	163:e59c8e839560	1957
AnnaBridge	163:e59c8e839560	1958	/**
AnnaBridge	163:e59c8e839560	1959	* @brief Generate a START or RESTART condition
AnnaBridge	163:e59c8e839560	1960	* @note The START bit can be set even if bus is BUSY or I2C is in slave mode.
AnnaBridge	163:e59c8e839560	1961	* This action has no effect when RELOAD is set.
AnnaBridge	163:e59c8e839560	1962	* @rmtoll CR2 START LL_I2C_GenerateStartCondition
AnnaBridge	163:e59c8e839560	1963	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1964	* @retval None
AnnaBridge	163:e59c8e839560	1965	*/
AnnaBridge	163:e59c8e839560	1966	__STATIC_INLINE void LL_I2C_GenerateStartCondition(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1967	{
AnnaBridge	163:e59c8e839560	1968	SET_BIT(I2Cx->CR2, I2C_CR2_START);
AnnaBridge	163:e59c8e839560	1969	}
AnnaBridge	163:e59c8e839560	1970
AnnaBridge	163:e59c8e839560	1971	/**
AnnaBridge	163:e59c8e839560	1972	* @brief Generate a STOP condition after the current byte transfer (master mode).
AnnaBridge	163:e59c8e839560	1973	* @rmtoll CR2 STOP LL_I2C_GenerateStopCondition
AnnaBridge	163:e59c8e839560	1974	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1975	* @retval None
AnnaBridge	163:e59c8e839560	1976	*/
AnnaBridge	163:e59c8e839560	1977	__STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1978	{
AnnaBridge	163:e59c8e839560	1979	SET_BIT(I2Cx->CR2, I2C_CR2_STOP);
AnnaBridge	163:e59c8e839560	1980	}
AnnaBridge	163:e59c8e839560	1981
AnnaBridge	163:e59c8e839560	1982	/**
AnnaBridge	163:e59c8e839560	1983	* @brief Enable automatic RESTART Read request condition for 10bit address header (master mode).
AnnaBridge	163:e59c8e839560	1984	* @note The master sends the complete 10bit slave address read sequence :
AnnaBridge	163:e59c8e839560	1985	* Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction.
AnnaBridge	163:e59c8e839560	1986	* @rmtoll CR2 HEAD10R LL_I2C_EnableAuto10BitRead
AnnaBridge	163:e59c8e839560	1987	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	1988	* @retval None
AnnaBridge	163:e59c8e839560	1989	*/
AnnaBridge	163:e59c8e839560	1990	__STATIC_INLINE void LL_I2C_EnableAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	1991	{
AnnaBridge	163:e59c8e839560	1992	CLEAR_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
AnnaBridge	163:e59c8e839560	1993	}
AnnaBridge	163:e59c8e839560	1994
AnnaBridge	163:e59c8e839560	1995	/**
AnnaBridge	163:e59c8e839560	1996	* @brief Disable automatic RESTART Read request condition for 10bit address header (master mode).
AnnaBridge	163:e59c8e839560	1997	* @note The master only sends the first 7 bits of 10bit address in Read direction.
AnnaBridge	163:e59c8e839560	1998	* @rmtoll CR2 HEAD10R LL_I2C_DisableAuto10BitRead
AnnaBridge	163:e59c8e839560	1999	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	2000	* @retval None
AnnaBridge	163:e59c8e839560	2001	*/
AnnaBridge	163:e59c8e839560	2002	__STATIC_INLINE void LL_I2C_DisableAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	2003	{
AnnaBridge	163:e59c8e839560	2004	SET_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
AnnaBridge	163:e59c8e839560	2005	}
AnnaBridge	163:e59c8e839560	2006
AnnaBridge	163:e59c8e839560	2007	/**
AnnaBridge	163:e59c8e839560	2008	* @brief Check if automatic RESTART Read request condition for 10bit address header is enabled or disabled.
AnnaBridge	163:e59c8e839560	2009	* @rmtoll CR2 HEAD10R LL_I2C_IsEnabledAuto10BitRead
AnnaBridge	163:e59c8e839560	2010	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	2011	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	2012	*/
AnnaBridge	163:e59c8e839560	2013	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	2014	{
AnnaBridge	163:e59c8e839560	2015	return (READ_BIT(I2Cx->CR2, I2C_CR2_HEAD10R) != (I2C_CR2_HEAD10R));
AnnaBridge	163:e59c8e839560	2016	}
AnnaBridge	163:e59c8e839560	2017
AnnaBridge	163:e59c8e839560	2018	/**
AnnaBridge	163:e59c8e839560	2019	* @brief Configure the transfer direction (master mode).
AnnaBridge	163:e59c8e839560	2020	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	163:e59c8e839560	2021	* @rmtoll CR2 RD_WRN LL_I2C_SetTransferRequest
AnnaBridge	163:e59c8e839560	2022	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	2023	* @param TransferRequest This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	2024	* @arg @ref LL_I2C_REQUEST_WRITE
AnnaBridge	163:e59c8e839560	2025	* @arg @ref LL_I2C_REQUEST_READ
AnnaBridge	163:e59c8e839560	2026	* @retval None
AnnaBridge	163:e59c8e839560	2027	*/
AnnaBridge	163:e59c8e839560	2028	__STATIC_INLINE void LL_I2C_SetTransferRequest(I2C_TypeDef *I2Cx, uint32_t TransferRequest)
AnnaBridge	163:e59c8e839560	2029	{
AnnaBridge	163:e59c8e839560	2030	MODIFY_REG(I2Cx->CR2, I2C_CR2_RD_WRN, TransferRequest);
AnnaBridge	163:e59c8e839560	2031	}
AnnaBridge	163:e59c8e839560	2032
AnnaBridge	163:e59c8e839560	2033	/**
AnnaBridge	163:e59c8e839560	2034	* @brief Get the transfer direction requested (master mode).
AnnaBridge	163:e59c8e839560	2035	* @rmtoll CR2 RD_WRN LL_I2C_GetTransferRequest
AnnaBridge	163:e59c8e839560	2036	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	2037	* @retval Returned value can be one of the following values:
AnnaBridge	163:e59c8e839560	2038	* @arg @ref LL_I2C_REQUEST_WRITE
AnnaBridge	163:e59c8e839560	2039	* @arg @ref LL_I2C_REQUEST_READ
AnnaBridge	163:e59c8e839560	2040	*/
AnnaBridge	163:e59c8e839560	2041	__STATIC_INLINE uint32_t LL_I2C_GetTransferRequest(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	2042	{
AnnaBridge	163:e59c8e839560	2043	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_RD_WRN));
AnnaBridge	163:e59c8e839560	2044	}
AnnaBridge	163:e59c8e839560	2045
AnnaBridge	163:e59c8e839560	2046	/**
AnnaBridge	163:e59c8e839560	2047	* @brief Configure the slave address for transfer (master mode).
AnnaBridge	163:e59c8e839560	2048	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	163:e59c8e839560	2049	* @rmtoll CR2 SADD LL_I2C_SetSlaveAddr
AnnaBridge	163:e59c8e839560	2050	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	2051	* @param SlaveAddr This parameter must be a value between Min_Data=0x00 and Max_Data=0x3F.
AnnaBridge	163:e59c8e839560	2052	* @retval None
AnnaBridge	163:e59c8e839560	2053	*/
AnnaBridge	163:e59c8e839560	2054	__STATIC_INLINE void LL_I2C_SetSlaveAddr(I2C_TypeDef *I2Cx, uint32_t SlaveAddr)
AnnaBridge	163:e59c8e839560	2055	{
AnnaBridge	163:e59c8e839560	2056	MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD, SlaveAddr);
AnnaBridge	163:e59c8e839560	2057	}
AnnaBridge	163:e59c8e839560	2058
AnnaBridge	163:e59c8e839560	2059	/**
AnnaBridge	163:e59c8e839560	2060	* @brief Get the slave address programmed for transfer.
AnnaBridge	163:e59c8e839560	2061	* @rmtoll CR2 SADD LL_I2C_GetSlaveAddr
AnnaBridge	163:e59c8e839560	2062	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	2063	* @retval Value between Min_Data=0x0 and Max_Data=0x3F
AnnaBridge	163:e59c8e839560	2064	*/
AnnaBridge	163:e59c8e839560	2065	__STATIC_INLINE uint32_t LL_I2C_GetSlaveAddr(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	2066	{
AnnaBridge	163:e59c8e839560	2067	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_SADD));
AnnaBridge	163:e59c8e839560	2068	}
AnnaBridge	163:e59c8e839560	2069
AnnaBridge	163:e59c8e839560	2070	/**
AnnaBridge	163:e59c8e839560	2071	* @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
AnnaBridge	163:e59c8e839560	2072	* @rmtoll CR2 SADD LL_I2C_HandleTransfer\n
AnnaBridge	163:e59c8e839560	2073	* CR2 ADD10 LL_I2C_HandleTransfer\n
AnnaBridge	163:e59c8e839560	2074	* CR2 RD_WRN LL_I2C_HandleTransfer\n
AnnaBridge	163:e59c8e839560	2075	* CR2 START LL_I2C_HandleTransfer\n
AnnaBridge	163:e59c8e839560	2076	* CR2 STOP LL_I2C_HandleTransfer\n
AnnaBridge	163:e59c8e839560	2077	* CR2 RELOAD LL_I2C_HandleTransfer\n
AnnaBridge	163:e59c8e839560	2078	* CR2 NBYTES LL_I2C_HandleTransfer\n
AnnaBridge	163:e59c8e839560	2079	* CR2 AUTOEND LL_I2C_HandleTransfer\n
AnnaBridge	163:e59c8e839560	2080	* CR2 HEAD10R LL_I2C_HandleTransfer
AnnaBridge	163:e59c8e839560	2081	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	2082	* @param SlaveAddr Specifies the slave address to be programmed.
AnnaBridge	163:e59c8e839560	2083	* @param SlaveAddrSize This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	2084	* @arg @ref LL_I2C_ADDRSLAVE_7BIT
AnnaBridge	163:e59c8e839560	2085	* @arg @ref LL_I2C_ADDRSLAVE_10BIT
AnnaBridge	163:e59c8e839560	2086	* @param TransferSize Specifies the number of bytes to be programmed.
AnnaBridge	163:e59c8e839560	2087	* This parameter must be a value between Min_Data=0 and Max_Data=255.
AnnaBridge	163:e59c8e839560	2088	* @param EndMode This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	2089	* @arg @ref LL_I2C_MODE_RELOAD
AnnaBridge	163:e59c8e839560	2090	* @arg @ref LL_I2C_MODE_AUTOEND
AnnaBridge	163:e59c8e839560	2091	* @arg @ref LL_I2C_MODE_SOFTEND
AnnaBridge	163:e59c8e839560	2092	* @arg @ref LL_I2C_MODE_SMBUS_RELOAD
AnnaBridge	163:e59c8e839560	2093	* @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC
AnnaBridge	163:e59c8e839560	2094	* @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC
AnnaBridge	163:e59c8e839560	2095	* @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC
AnnaBridge	163:e59c8e839560	2096	* @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC
AnnaBridge	163:e59c8e839560	2097	* @param Request This parameter can be one of the following values:
AnnaBridge	163:e59c8e839560	2098	* @arg @ref LL_I2C_GENERATE_NOSTARTSTOP
AnnaBridge	163:e59c8e839560	2099	* @arg @ref LL_I2C_GENERATE_STOP
AnnaBridge	163:e59c8e839560	2100	* @arg @ref LL_I2C_GENERATE_START_READ
AnnaBridge	163:e59c8e839560	2101	* @arg @ref LL_I2C_GENERATE_START_WRITE
AnnaBridge	163:e59c8e839560	2102	* @arg @ref LL_I2C_GENERATE_RESTART_7BIT_READ
AnnaBridge	163:e59c8e839560	2103	* @arg @ref LL_I2C_GENERATE_RESTART_7BIT_WRITE
AnnaBridge	163:e59c8e839560	2104	* @arg @ref LL_I2C_GENERATE_RESTART_10BIT_READ
AnnaBridge	163:e59c8e839560	2105	* @arg @ref LL_I2C_GENERATE_RESTART_10BIT_WRITE
AnnaBridge	163:e59c8e839560	2106	* @retval None
AnnaBridge	163:e59c8e839560	2107	*/
AnnaBridge	163:e59c8e839560	2108	__STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize,
AnnaBridge	163:e59c8e839560	2109	uint32_t TransferSize, uint32_t EndMode, uint32_t Request)
AnnaBridge	163:e59c8e839560	2110	{
AnnaBridge	163:e59c8e839560	2111	MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD \| I2C_CR2_ADD10 \| I2C_CR2_RD_WRN \| I2C_CR2_START \| I2C_CR2_STOP \| I2C_CR2_RELOAD \|
AnnaBridge	163:e59c8e839560	2112	I2C_CR2_NBYTES \| I2C_CR2_AUTOEND \| I2C_CR2_HEAD10R,
AnnaBridge	163:e59c8e839560	2113	SlaveAddr \| SlaveAddrSize \| TransferSize << I2C_CR2_NBYTES_Pos \| EndMode \| Request);
AnnaBridge	163:e59c8e839560	2114	}
AnnaBridge	163:e59c8e839560	2115
AnnaBridge	163:e59c8e839560	2116	/**
AnnaBridge	163:e59c8e839560	2117	* @brief Indicate the value of transfer direction (slave mode).
AnnaBridge	163:e59c8e839560	2118	* @note RESET: Write transfer, Slave enters in receiver mode.
AnnaBridge	163:e59c8e839560	2119	* SET: Read transfer, Slave enters in transmitter mode.
AnnaBridge	163:e59c8e839560	2120	* @rmtoll ISR DIR LL_I2C_GetTransferDirection
AnnaBridge	163:e59c8e839560	2121	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	2122	* @retval Returned value can be one of the following values:
AnnaBridge	163:e59c8e839560	2123	* @arg @ref LL_I2C_DIRECTION_WRITE
AnnaBridge	163:e59c8e839560	2124	* @arg @ref LL_I2C_DIRECTION_READ
AnnaBridge	163:e59c8e839560	2125	*/
AnnaBridge	163:e59c8e839560	2126	__STATIC_INLINE uint32_t LL_I2C_GetTransferDirection(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	2127	{
AnnaBridge	163:e59c8e839560	2128	return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_DIR));
AnnaBridge	163:e59c8e839560	2129	}
AnnaBridge	163:e59c8e839560	2130
AnnaBridge	163:e59c8e839560	2131	/**
AnnaBridge	163:e59c8e839560	2132	* @brief Return the slave matched address.
AnnaBridge	163:e59c8e839560	2133	* @rmtoll ISR ADDCODE LL_I2C_GetAddressMatchCode
AnnaBridge	163:e59c8e839560	2134	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	2135	* @retval Value between Min_Data=0x00 and Max_Data=0x3F
AnnaBridge	163:e59c8e839560	2136	*/
AnnaBridge	163:e59c8e839560	2137	__STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	2138	{
AnnaBridge	163:e59c8e839560	2139	return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_ADDCODE) >> I2C_ISR_ADDCODE_Pos << 1);
AnnaBridge	163:e59c8e839560	2140	}
AnnaBridge	163:e59c8e839560	2141
AnnaBridge	163:e59c8e839560	2142	/**
AnnaBridge	163:e59c8e839560	2143	* @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode).
AnnaBridge	163:e59c8e839560	2144	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	2145	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	2146	* @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received.
AnnaBridge	163:e59c8e839560	2147	* This bit has no effect when RELOAD bit is set.
AnnaBridge	163:e59c8e839560	2148	* This bit has no effect in device mode when SBC bit is not set.
AnnaBridge	163:e59c8e839560	2149	* @rmtoll CR2 PECBYTE LL_I2C_EnableSMBusPECCompare
AnnaBridge	163:e59c8e839560	2150	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	2151	* @retval None
AnnaBridge	163:e59c8e839560	2152	*/
AnnaBridge	163:e59c8e839560	2153	__STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	2154	{
AnnaBridge	163:e59c8e839560	2155	SET_BIT(I2Cx->CR2, I2C_CR2_PECBYTE);
AnnaBridge	163:e59c8e839560	2156	}
AnnaBridge	163:e59c8e839560	2157
AnnaBridge	163:e59c8e839560	2158	/**
AnnaBridge	163:e59c8e839560	2159	* @brief Check if the SMBus Packet Error byte internal comparison is requested or not.
AnnaBridge	163:e59c8e839560	2160	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	2161	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	2162	* @rmtoll CR2 PECBYTE LL_I2C_IsEnabledSMBusPECCompare
AnnaBridge	163:e59c8e839560	2163	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	2164	* @retval State of bit (1 or 0).
AnnaBridge	163:e59c8e839560	2165	*/
AnnaBridge	163:e59c8e839560	2166	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	2167	{
AnnaBridge	163:e59c8e839560	2168	return (READ_BIT(I2Cx->CR2, I2C_CR2_PECBYTE) == (I2C_CR2_PECBYTE));
AnnaBridge	163:e59c8e839560	2169	}
AnnaBridge	163:e59c8e839560	2170
AnnaBridge	163:e59c8e839560	2171	/**
AnnaBridge	163:e59c8e839560	2172	* @brief Get the SMBus Packet Error byte calculated.
AnnaBridge	163:e59c8e839560	2173	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	163:e59c8e839560	2174	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	163:e59c8e839560	2175	* @rmtoll PECR PEC LL_I2C_GetSMBusPEC
AnnaBridge	163:e59c8e839560	2176	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	2177	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	163:e59c8e839560	2178	*/
AnnaBridge	163:e59c8e839560	2179	__STATIC_INLINE uint32_t LL_I2C_GetSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	2180	{
AnnaBridge	163:e59c8e839560	2181	return (uint32_t)(READ_BIT(I2Cx->PECR, I2C_PECR_PEC));
AnnaBridge	163:e59c8e839560	2182	}
AnnaBridge	163:e59c8e839560	2183
AnnaBridge	163:e59c8e839560	2184	/**
AnnaBridge	163:e59c8e839560	2185	* @brief Read Receive Data register.
AnnaBridge	163:e59c8e839560	2186	* @rmtoll RXDR RXDATA LL_I2C_ReceiveData8
AnnaBridge	163:e59c8e839560	2187	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	2188	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	163:e59c8e839560	2189	*/
AnnaBridge	163:e59c8e839560	2190	__STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
AnnaBridge	163:e59c8e839560	2191	{
AnnaBridge	163:e59c8e839560	2192	return (uint8_t)(READ_BIT(I2Cx->RXDR, I2C_RXDR_RXDATA));
AnnaBridge	163:e59c8e839560	2193	}
AnnaBridge	163:e59c8e839560	2194
AnnaBridge	163:e59c8e839560	2195	/**
AnnaBridge	163:e59c8e839560	2196	* @brief Write in Transmit Data Register .
AnnaBridge	163:e59c8e839560	2197	* @rmtoll TXDR TXDATA LL_I2C_TransmitData8
AnnaBridge	163:e59c8e839560	2198	* @param I2Cx I2C Instance.
AnnaBridge	163:e59c8e839560	2199	* @param Data Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	163:e59c8e839560	2200	* @retval None
AnnaBridge	163:e59c8e839560	2201	*/
AnnaBridge	163:e59c8e839560	2202	__STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
AnnaBridge	163:e59c8e839560	2203	{
AnnaBridge	163:e59c8e839560	2204	WRITE_REG(I2Cx->TXDR, Data);
AnnaBridge	163:e59c8e839560	2205	}
AnnaBridge	163:e59c8e839560	2206
AnnaBridge	163:e59c8e839560	2207	/**
AnnaBridge	163:e59c8e839560	2208	* @}
AnnaBridge	163:e59c8e839560	2209	*/
AnnaBridge	163:e59c8e839560	2210
AnnaBridge	163:e59c8e839560	2211	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	163:e59c8e839560	2212	/** @defgroup I2C_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	163:e59c8e839560	2213	* @{
AnnaBridge	163:e59c8e839560	2214	*/
AnnaBridge	163:e59c8e839560	2215
AnnaBridge	163:e59c8e839560	2216	uint32_t LL_I2C_Init(I2C_TypeDef I2Cx, LL_I2C_InitTypeDef I2C_InitStruct);
AnnaBridge	163:e59c8e839560	2217	uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx);
AnnaBridge	163:e59c8e839560	2218	void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
AnnaBridge	163:e59c8e839560	2219
AnnaBridge	163:e59c8e839560	2220
AnnaBridge	163:e59c8e839560	2221	/**
AnnaBridge	163:e59c8e839560	2222	* @}
AnnaBridge	163:e59c8e839560	2223	*/
AnnaBridge	163:e59c8e839560	2224	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	163:e59c8e839560	2225
AnnaBridge	163:e59c8e839560	2226	/**
AnnaBridge	163:e59c8e839560	2227	* @}
AnnaBridge	163:e59c8e839560	2228	*/
AnnaBridge	163:e59c8e839560	2229
AnnaBridge	163:e59c8e839560	2230	/**
AnnaBridge	163:e59c8e839560	2231	* @}
AnnaBridge	163:e59c8e839560	2232	*/
AnnaBridge	163:e59c8e839560	2233
AnnaBridge	163:e59c8e839560	2234	#endif /* I2C1 \|\| I2C2 \|\| I2C3 */
AnnaBridge	163:e59c8e839560	2235
AnnaBridge	163:e59c8e839560	2236	/**
AnnaBridge	163:e59c8e839560	2237	* @}
AnnaBridge	163:e59c8e839560	2238	*/
AnnaBridge	163:e59c8e839560	2239
AnnaBridge	163:e59c8e839560	2240	#ifdef __cplusplus
AnnaBridge	163:e59c8e839560	2241	}
AnnaBridge	163:e59c8e839560	2242	#endif
AnnaBridge	163:e59c8e839560	2243
AnnaBridge	163:e59c8e839560	2244	#endif /* __STM32F3xx_LL_I2C_H */
AnnaBridge	163:e59c8e839560	2245
AnnaBridge	163:e59c8e839560	2246	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/