The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
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mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
drivers/SPISlave.h@134:ad3be0349dc5, 2017-01-16 (annotated)
- Committer:
- <>
- Date:
- Mon Jan 16 12:05:23 2017 +0000
- Revision:
- 134:ad3be0349dc5
- Parent:
- 128:9bcdf88f62b0
- Child:
- 145:64910690c574
Release 134 of the mbed library
Ports for Upcoming Targets
Fixes and Changes
3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488
3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492
3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503
3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504
3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539
3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540
3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438
3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519
3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544
3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546
3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551
3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558
3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563
3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567
3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 128:9bcdf88f62b0 | 1 | /* mbed Microcontroller Library |
<> | 128:9bcdf88f62b0 | 2 | * Copyright (c) 2006-2013 ARM Limited |
<> | 128:9bcdf88f62b0 | 3 | * |
<> | 128:9bcdf88f62b0 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 128:9bcdf88f62b0 | 5 | * you may not use this file except in compliance with the License. |
<> | 128:9bcdf88f62b0 | 6 | * You may obtain a copy of the License at |
<> | 128:9bcdf88f62b0 | 7 | * |
<> | 128:9bcdf88f62b0 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 128:9bcdf88f62b0 | 9 | * |
<> | 128:9bcdf88f62b0 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 128:9bcdf88f62b0 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 128:9bcdf88f62b0 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 128:9bcdf88f62b0 | 13 | * See the License for the specific language governing permissions and |
<> | 128:9bcdf88f62b0 | 14 | * limitations under the License. |
<> | 128:9bcdf88f62b0 | 15 | */ |
<> | 128:9bcdf88f62b0 | 16 | #ifndef MBED_SPISLAVE_H |
<> | 128:9bcdf88f62b0 | 17 | #define MBED_SPISLAVE_H |
<> | 128:9bcdf88f62b0 | 18 | |
<> | 128:9bcdf88f62b0 | 19 | #include "platform/platform.h" |
<> | 128:9bcdf88f62b0 | 20 | |
<> | 128:9bcdf88f62b0 | 21 | #if DEVICE_SPISLAVE |
<> | 128:9bcdf88f62b0 | 22 | |
<> | 128:9bcdf88f62b0 | 23 | #include "hal/spi_api.h" |
<> | 128:9bcdf88f62b0 | 24 | |
<> | 128:9bcdf88f62b0 | 25 | namespace mbed { |
<> | 128:9bcdf88f62b0 | 26 | /** \addtogroup drivers */ |
<> | 128:9bcdf88f62b0 | 27 | /** @{*/ |
<> | 128:9bcdf88f62b0 | 28 | |
<> | 128:9bcdf88f62b0 | 29 | /** A SPI slave, used for communicating with a SPI Master device |
<> | 128:9bcdf88f62b0 | 30 | * |
<> | 128:9bcdf88f62b0 | 31 | * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz |
<> | 128:9bcdf88f62b0 | 32 | * |
<> | 128:9bcdf88f62b0 | 33 | * @Note Synchronization level: Not protected |
<> | 128:9bcdf88f62b0 | 34 | * |
<> | 128:9bcdf88f62b0 | 35 | * Example: |
<> | 128:9bcdf88f62b0 | 36 | * @code |
<> | 128:9bcdf88f62b0 | 37 | * // Reply to a SPI master as slave |
<> | 128:9bcdf88f62b0 | 38 | * |
<> | 128:9bcdf88f62b0 | 39 | * #include "mbed.h" |
<> | 128:9bcdf88f62b0 | 40 | * |
<> | 128:9bcdf88f62b0 | 41 | * SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel |
<> | 128:9bcdf88f62b0 | 42 | * |
<> | 128:9bcdf88f62b0 | 43 | * int main() { |
<> | 128:9bcdf88f62b0 | 44 | * device.reply(0x00); // Prime SPI with first reply |
<> | 128:9bcdf88f62b0 | 45 | * while(1) { |
<> | 128:9bcdf88f62b0 | 46 | * if(device.receive()) { |
<> | 128:9bcdf88f62b0 | 47 | * int v = device.read(); // Read byte from master |
<> | 128:9bcdf88f62b0 | 48 | * v = (v + 1) % 0x100; // Add one to it, modulo 256 |
<> | 128:9bcdf88f62b0 | 49 | * device.reply(v); // Make this the next reply |
<> | 128:9bcdf88f62b0 | 50 | * } |
<> | 128:9bcdf88f62b0 | 51 | * } |
<> | 128:9bcdf88f62b0 | 52 | * } |
<> | 128:9bcdf88f62b0 | 53 | * @endcode |
<> | 128:9bcdf88f62b0 | 54 | */ |
<> | 128:9bcdf88f62b0 | 55 | class SPISlave { |
<> | 128:9bcdf88f62b0 | 56 | |
<> | 128:9bcdf88f62b0 | 57 | public: |
<> | 128:9bcdf88f62b0 | 58 | |
<> | 128:9bcdf88f62b0 | 59 | /** Create a SPI slave connected to the specified pins |
<> | 128:9bcdf88f62b0 | 60 | * |
<> | 128:9bcdf88f62b0 | 61 | * mosi or miso can be specfied as NC if not used |
<> | 128:9bcdf88f62b0 | 62 | * |
<> | 128:9bcdf88f62b0 | 63 | * @param mosi SPI Master Out, Slave In pin |
<> | 128:9bcdf88f62b0 | 64 | * @param miso SPI Master In, Slave Out pin |
<> | 128:9bcdf88f62b0 | 65 | * @param sclk SPI Clock pin |
<> | 128:9bcdf88f62b0 | 66 | * @param ssel SPI chip select pin |
<> | 128:9bcdf88f62b0 | 67 | */ |
<> | 128:9bcdf88f62b0 | 68 | SPISlave(PinName mosi, PinName miso, PinName sclk, PinName ssel); |
<> | 128:9bcdf88f62b0 | 69 | |
<> | 128:9bcdf88f62b0 | 70 | /** Configure the data transmission format |
<> | 128:9bcdf88f62b0 | 71 | * |
<> | 128:9bcdf88f62b0 | 72 | * @param bits Number of bits per SPI frame (4 - 16) |
<> | 128:9bcdf88f62b0 | 73 | * @param mode Clock polarity and phase mode (0 - 3) |
<> | 128:9bcdf88f62b0 | 74 | * |
<> | 128:9bcdf88f62b0 | 75 | * @code |
<> | 128:9bcdf88f62b0 | 76 | * mode | POL PHA |
<> | 128:9bcdf88f62b0 | 77 | * -----+-------- |
<> | 128:9bcdf88f62b0 | 78 | * 0 | 0 0 |
<> | 128:9bcdf88f62b0 | 79 | * 1 | 0 1 |
<> | 128:9bcdf88f62b0 | 80 | * 2 | 1 0 |
<> | 128:9bcdf88f62b0 | 81 | * 3 | 1 1 |
<> | 128:9bcdf88f62b0 | 82 | * @endcode |
<> | 128:9bcdf88f62b0 | 83 | */ |
<> | 128:9bcdf88f62b0 | 84 | void format(int bits, int mode = 0); |
<> | 128:9bcdf88f62b0 | 85 | |
<> | 128:9bcdf88f62b0 | 86 | /** Set the spi bus clock frequency |
<> | 128:9bcdf88f62b0 | 87 | * |
<> | 128:9bcdf88f62b0 | 88 | * @param hz SCLK frequency in hz (default = 1MHz) |
<> | 128:9bcdf88f62b0 | 89 | */ |
<> | 128:9bcdf88f62b0 | 90 | void frequency(int hz = 1000000); |
<> | 128:9bcdf88f62b0 | 91 | |
<> | 128:9bcdf88f62b0 | 92 | /** Polls the SPI to see if data has been received |
<> | 128:9bcdf88f62b0 | 93 | * |
<> | 128:9bcdf88f62b0 | 94 | * @returns |
<> | 128:9bcdf88f62b0 | 95 | * 0 if no data, |
<> | 128:9bcdf88f62b0 | 96 | * 1 otherwise |
<> | 128:9bcdf88f62b0 | 97 | */ |
<> | 128:9bcdf88f62b0 | 98 | int receive(void); |
<> | 128:9bcdf88f62b0 | 99 | |
<> | 128:9bcdf88f62b0 | 100 | /** Retrieve data from receive buffer as slave |
<> | 128:9bcdf88f62b0 | 101 | * |
<> | 128:9bcdf88f62b0 | 102 | * @returns |
<> | 128:9bcdf88f62b0 | 103 | * the data in the receive buffer |
<> | 128:9bcdf88f62b0 | 104 | */ |
<> | 128:9bcdf88f62b0 | 105 | int read(void); |
<> | 128:9bcdf88f62b0 | 106 | |
<> | 128:9bcdf88f62b0 | 107 | /** Fill the transmission buffer with the value to be written out |
<> | 128:9bcdf88f62b0 | 108 | * as slave on the next received message from the master. |
<> | 128:9bcdf88f62b0 | 109 | * |
<> | 128:9bcdf88f62b0 | 110 | * @param value the data to be transmitted next |
<> | 128:9bcdf88f62b0 | 111 | */ |
<> | 128:9bcdf88f62b0 | 112 | void reply(int value); |
<> | 128:9bcdf88f62b0 | 113 | |
<> | 128:9bcdf88f62b0 | 114 | protected: |
<> | 128:9bcdf88f62b0 | 115 | spi_t _spi; |
<> | 128:9bcdf88f62b0 | 116 | |
<> | 128:9bcdf88f62b0 | 117 | int _bits; |
<> | 128:9bcdf88f62b0 | 118 | int _mode; |
<> | 128:9bcdf88f62b0 | 119 | int _hz; |
<> | 128:9bcdf88f62b0 | 120 | }; |
<> | 128:9bcdf88f62b0 | 121 | |
<> | 128:9bcdf88f62b0 | 122 | } // namespace mbed |
<> | 128:9bcdf88f62b0 | 123 | |
<> | 128:9bcdf88f62b0 | 124 | #endif |
<> | 128:9bcdf88f62b0 | 125 | |
<> | 128:9bcdf88f62b0 | 126 | #endif |
<> | 128:9bcdf88f62b0 | 127 | |
<> | 128:9bcdf88f62b0 | 128 | /** @}*/ |