mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F756ZG/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/PeripheralNames.h@134:ad3be0349dc5, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
128:9bcdf88f62b0 
Release 134 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488

3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492

3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503

3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504

3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539

3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540

3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438

3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519

3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544

3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546

3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551

3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558

3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563

3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567

3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /* mbed Microcontroller Library
<> 128:9bcdf88f62b0 2 *******************************************************************************
<> 128:9bcdf88f62b0 3 * Copyright (c) 2016, STMicroelectronics
<> 128:9bcdf88f62b0 4 * All rights reserved.
<> 128:9bcdf88f62b0 5 *
<> 128:9bcdf88f62b0 6 * Redistribution and use in source and binary forms, with or without
<> 128:9bcdf88f62b0 7 * modification, are permitted provided that the following conditions are met:
<> 128:9bcdf88f62b0 8 *
<> 128:9bcdf88f62b0 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 128:9bcdf88f62b0 10 * this list of conditions and the following disclaimer.
<> 128:9bcdf88f62b0 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 128:9bcdf88f62b0 12 * this list of conditions and the following disclaimer in the documentation
<> 128:9bcdf88f62b0 13 * and/or other materials provided with the distribution.
<> 128:9bcdf88f62b0 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 128:9bcdf88f62b0 15 * may be used to endorse or promote products derived from this software
<> 128:9bcdf88f62b0 16 * without specific prior written permission.
<> 128:9bcdf88f62b0 17 *
<> 128:9bcdf88f62b0 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 128:9bcdf88f62b0 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 128:9bcdf88f62b0 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 128:9bcdf88f62b0 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 128:9bcdf88f62b0 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 128:9bcdf88f62b0 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 128:9bcdf88f62b0 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 128:9bcdf88f62b0 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 128:9bcdf88f62b0 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 128:9bcdf88f62b0 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 128:9bcdf88f62b0 28 *******************************************************************************
<> 128:9bcdf88f62b0 29 */
<> 128:9bcdf88f62b0 30 #ifndef MBED_PERIPHERALNAMES_H
<> 128:9bcdf88f62b0 31 #define MBED_PERIPHERALNAMES_H
<> 128:9bcdf88f62b0 32
<> 128:9bcdf88f62b0 33 #include "cmsis.h"
<> 128:9bcdf88f62b0 34
<> 128:9bcdf88f62b0 35 #ifdef __cplusplus
<> 128:9bcdf88f62b0 36 extern "C" {
<> 128:9bcdf88f62b0 37 #endif
<> 128:9bcdf88f62b0 38
<> 128:9bcdf88f62b0 39 typedef enum {
<> 128:9bcdf88f62b0 40 ADC_1 = (int)ADC1_BASE,
<> 128:9bcdf88f62b0 41 ADC_2 = (int)ADC2_BASE,
<> 128:9bcdf88f62b0 42 ADC_3 = (int)ADC3_BASE
<> 128:9bcdf88f62b0 43 } ADCName;
<> 128:9bcdf88f62b0 44
<> 128:9bcdf88f62b0 45 typedef enum {
<> 128:9bcdf88f62b0 46 DAC_1 = DAC_BASE
<> 128:9bcdf88f62b0 47 } DACName;
<> 128:9bcdf88f62b0 48
<> 128:9bcdf88f62b0 49 typedef enum {
<> 128:9bcdf88f62b0 50 UART_1 = (int)USART1_BASE,
<> 128:9bcdf88f62b0 51 UART_2 = (int)USART2_BASE,
<> 128:9bcdf88f62b0 52 UART_3 = (int)USART3_BASE,
<> 128:9bcdf88f62b0 53 UART_4 = (int)UART4_BASE,
<> 128:9bcdf88f62b0 54 UART_5 = (int)UART5_BASE,
<> 128:9bcdf88f62b0 55 UART_6 = (int)USART6_BASE,
<> 128:9bcdf88f62b0 56 UART_7 = (int)UART7_BASE,
<> 128:9bcdf88f62b0 57 UART_8 = (int)UART8_BASE
<> 128:9bcdf88f62b0 58 } UARTName;
<> 128:9bcdf88f62b0 59
<> 128:9bcdf88f62b0 60 #define STDIO_UART_TX PD_8
<> 128:9bcdf88f62b0 61 #define STDIO_UART_RX PD_9
<> 128:9bcdf88f62b0 62 #define STDIO_UART UART_3
<> 128:9bcdf88f62b0 63
<> 128:9bcdf88f62b0 64 typedef enum {
<> 128:9bcdf88f62b0 65 SPI_1 = (int)SPI1_BASE,
<> 128:9bcdf88f62b0 66 SPI_2 = (int)SPI2_BASE,
<> 128:9bcdf88f62b0 67 SPI_3 = (int)SPI3_BASE,
<> 128:9bcdf88f62b0 68 SPI_4 = (int)SPI4_BASE,
<> 128:9bcdf88f62b0 69 SPI_5 = (int)SPI5_BASE,
<> 128:9bcdf88f62b0 70 SPI_6 = (int)SPI6_BASE
<> 128:9bcdf88f62b0 71 } SPIName;
<> 128:9bcdf88f62b0 72
<> 128:9bcdf88f62b0 73 typedef enum {
<> 128:9bcdf88f62b0 74 I2C_1 = (int)I2C1_BASE,
<> 128:9bcdf88f62b0 75 I2C_2 = (int)I2C2_BASE,
<> 128:9bcdf88f62b0 76 I2C_3 = (int)I2C3_BASE,
<> 128:9bcdf88f62b0 77 I2C_4 = (int)I2C4_BASE
<> 128:9bcdf88f62b0 78 } I2CName;
<> 128:9bcdf88f62b0 79
<> 128:9bcdf88f62b0 80 typedef enum {
<> 128:9bcdf88f62b0 81 PWM_1 = (int)TIM1_BASE,
<> 128:9bcdf88f62b0 82 PWM_2 = (int)TIM2_BASE,
<> 128:9bcdf88f62b0 83 PWM_3 = (int)TIM3_BASE,
<> 128:9bcdf88f62b0 84 PWM_4 = (int)TIM4_BASE,
<> 128:9bcdf88f62b0 85 PWM_5 = (int)TIM5_BASE,
<> 128:9bcdf88f62b0 86 PWM_8 = (int)TIM8_BASE,
<> 128:9bcdf88f62b0 87 PWM_9 = (int)TIM9_BASE,
<> 128:9bcdf88f62b0 88 PWM_10 = (int)TIM10_BASE,
<> 128:9bcdf88f62b0 89 PWM_11 = (int)TIM11_BASE,
<> 128:9bcdf88f62b0 90 PWM_12 = (int)TIM12_BASE,
<> 128:9bcdf88f62b0 91 PWM_13 = (int)TIM13_BASE,
<> 128:9bcdf88f62b0 92 PWM_14 = (int)TIM14_BASE
<> 128:9bcdf88f62b0 93 } PWMName;
<> 128:9bcdf88f62b0 94
<> 128:9bcdf88f62b0 95 typedef enum {
<> 128:9bcdf88f62b0 96 CAN_1 = (int)CAN1_BASE,
<> 128:9bcdf88f62b0 97 CAN_2 = (int)CAN2_BASE
<> 128:9bcdf88f62b0 98 } CANName;
<> 128:9bcdf88f62b0 99
<> 128:9bcdf88f62b0 100 #ifdef __cplusplus
<> 128:9bcdf88f62b0 101 }
<> 128:9bcdf88f62b0 102 #endif
<> 128:9bcdf88f62b0 103
<> 128:9bcdf88f62b0 104 #endif