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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F410RB/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pwr.h@134:ad3be0349dc5, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
128:9bcdf88f62b0
Child:
145:64910690c574
Release 134 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488

3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492

3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503

3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504

3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539

3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540

3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438

3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519

3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544

3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546

3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551

3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558

3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563

3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567

3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 122:f9eeca106725 1 /**
Kojto 122:f9eeca106725 2 ******************************************************************************
Kojto 122:f9eeca106725 3 * @file stm32f4xx_hal_pwr.h
Kojto 122:f9eeca106725 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.5.0
Kojto 122:f9eeca106725 6 * @date 06-May-2016
Kojto 122:f9eeca106725 7 * @brief Header file of PWR HAL module.
Kojto 122:f9eeca106725 8 ******************************************************************************
Kojto 122:f9eeca106725 9 * @attention
Kojto 122:f9eeca106725 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 122:f9eeca106725 12 *
Kojto 122:f9eeca106725 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 122:f9eeca106725 14 * are permitted provided that the following conditions are met:
Kojto 122:f9eeca106725 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 122:f9eeca106725 16 * this list of conditions and the following disclaimer.
Kojto 122:f9eeca106725 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 122:f9eeca106725 18 * this list of conditions and the following disclaimer in the documentation
Kojto 122:f9eeca106725 19 * and/or other materials provided with the distribution.
Kojto 122:f9eeca106725 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 122:f9eeca106725 21 * may be used to endorse or promote products derived from this software
Kojto 122:f9eeca106725 22 * without specific prior written permission.
Kojto 122:f9eeca106725 23 *
Kojto 122:f9eeca106725 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 122:f9eeca106725 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 122:f9eeca106725 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 122:f9eeca106725 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 122:f9eeca106725 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 122:f9eeca106725 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 122:f9eeca106725 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 122:f9eeca106725 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 122:f9eeca106725 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 122:f9eeca106725 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 122:f9eeca106725 34 *
Kojto 122:f9eeca106725 35 ******************************************************************************
Kojto 122:f9eeca106725 36 */
Kojto 122:f9eeca106725 37
Kojto 122:f9eeca106725 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 122:f9eeca106725 39 #ifndef __STM32F4xx_HAL_PWR_H
Kojto 122:f9eeca106725 40 #define __STM32F4xx_HAL_PWR_H
Kojto 122:f9eeca106725 41
Kojto 122:f9eeca106725 42 #ifdef __cplusplus
Kojto 122:f9eeca106725 43 extern "C" {
Kojto 122:f9eeca106725 44 #endif
Kojto 122:f9eeca106725 45
Kojto 122:f9eeca106725 46 /* Includes ------------------------------------------------------------------*/
Kojto 122:f9eeca106725 47 #include "stm32f4xx_hal_def.h"
Kojto 122:f9eeca106725 48
Kojto 122:f9eeca106725 49 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 122:f9eeca106725 50 * @{
Kojto 122:f9eeca106725 51 */
Kojto 122:f9eeca106725 52
Kojto 122:f9eeca106725 53 /** @addtogroup PWR
Kojto 122:f9eeca106725 54 * @{
Kojto 122:f9eeca106725 55 */
Kojto 122:f9eeca106725 56
Kojto 122:f9eeca106725 57 /* Exported types ------------------------------------------------------------*/
Kojto 122:f9eeca106725 58
Kojto 122:f9eeca106725 59 /** @defgroup PWR_Exported_Types PWR Exported Types
Kojto 122:f9eeca106725 60 * @{
Kojto 122:f9eeca106725 61 */
Kojto 122:f9eeca106725 62
Kojto 122:f9eeca106725 63 /**
Kojto 122:f9eeca106725 64 * @brief PWR PVD configuration structure definition
Kojto 122:f9eeca106725 65 */
Kojto 122:f9eeca106725 66 typedef struct
Kojto 122:f9eeca106725 67 {
Kojto 122:f9eeca106725 68 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
Kojto 122:f9eeca106725 69 This parameter can be a value of @ref PWR_PVD_detection_level */
Kojto 122:f9eeca106725 70
Kojto 122:f9eeca106725 71 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
Kojto 122:f9eeca106725 72 This parameter can be a value of @ref PWR_PVD_Mode */
Kojto 122:f9eeca106725 73 }PWR_PVDTypeDef;
Kojto 122:f9eeca106725 74
Kojto 122:f9eeca106725 75 /**
Kojto 122:f9eeca106725 76 * @}
Kojto 122:f9eeca106725 77 */
Kojto 122:f9eeca106725 78
Kojto 122:f9eeca106725 79 /* Exported constants --------------------------------------------------------*/
Kojto 122:f9eeca106725 80 /** @defgroup PWR_Exported_Constants PWR Exported Constants
Kojto 122:f9eeca106725 81 * @{
Kojto 122:f9eeca106725 82 */
Kojto 122:f9eeca106725 83
Kojto 122:f9eeca106725 84 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
Kojto 122:f9eeca106725 85 * @{
Kojto 122:f9eeca106725 86 */
Kojto 122:f9eeca106725 87 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00000100U)
Kojto 122:f9eeca106725 88 /**
Kojto 122:f9eeca106725 89 * @}
Kojto 122:f9eeca106725 90 */
Kojto 122:f9eeca106725 91
Kojto 122:f9eeca106725 92 /** @defgroup PWR_PVD_detection_level PWR PVD detection level
Kojto 122:f9eeca106725 93 * @{
Kojto 122:f9eeca106725 94 */
Kojto 122:f9eeca106725 95 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
Kojto 122:f9eeca106725 96 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
Kojto 122:f9eeca106725 97 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
Kojto 122:f9eeca106725 98 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
Kojto 122:f9eeca106725 99 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
Kojto 122:f9eeca106725 100 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
Kojto 122:f9eeca106725 101 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
Kojto 122:f9eeca106725 102 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage
Kojto 122:f9eeca106725 103 (Compare internally to VREFINT) */
Kojto 122:f9eeca106725 104 /**
Kojto 122:f9eeca106725 105 * @}
Kojto 122:f9eeca106725 106 */
Kojto 122:f9eeca106725 107
Kojto 122:f9eeca106725 108 /** @defgroup PWR_PVD_Mode PWR PVD Mode
Kojto 122:f9eeca106725 109 * @{
Kojto 122:f9eeca106725 110 */
Kojto 122:f9eeca106725 111 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000U) /*!< basic mode is used */
Kojto 122:f9eeca106725 112 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */
Kojto 122:f9eeca106725 113 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */
Kojto 122:f9eeca106725 114 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
Kojto 122:f9eeca106725 115 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001U) /*!< Event Mode with Rising edge trigger detection */
Kojto 122:f9eeca106725 116 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002U) /*!< Event Mode with Falling edge trigger detection */
Kojto 122:f9eeca106725 117 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */
Kojto 122:f9eeca106725 118 /**
Kojto 122:f9eeca106725 119 * @}
Kojto 122:f9eeca106725 120 */
Kojto 122:f9eeca106725 121
Kojto 122:f9eeca106725 122
Kojto 122:f9eeca106725 123 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
Kojto 122:f9eeca106725 124 * @{
Kojto 122:f9eeca106725 125 */
Kojto 122:f9eeca106725 126 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 127 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
Kojto 122:f9eeca106725 128 /**
Kojto 122:f9eeca106725 129 * @}
Kojto 122:f9eeca106725 130 */
Kojto 122:f9eeca106725 131
Kojto 122:f9eeca106725 132 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
Kojto 122:f9eeca106725 133 * @{
Kojto 122:f9eeca106725 134 */
Kojto 122:f9eeca106725 135 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01U)
Kojto 122:f9eeca106725 136 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02U)
Kojto 122:f9eeca106725 137 /**
Kojto 122:f9eeca106725 138 * @}
Kojto 122:f9eeca106725 139 */
Kojto 122:f9eeca106725 140
Kojto 122:f9eeca106725 141 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
Kojto 122:f9eeca106725 142 * @{
Kojto 122:f9eeca106725 143 */
Kojto 122:f9eeca106725 144 #define PWR_STOPENTRY_WFI ((uint8_t)0x01U)
Kojto 122:f9eeca106725 145 #define PWR_STOPENTRY_WFE ((uint8_t)0x02U)
Kojto 122:f9eeca106725 146 /**
Kojto 122:f9eeca106725 147 * @}
Kojto 122:f9eeca106725 148 */
Kojto 122:f9eeca106725 149
Kojto 122:f9eeca106725 150 /** @defgroup PWR_Flag PWR Flag
Kojto 122:f9eeca106725 151 * @{
Kojto 122:f9eeca106725 152 */
Kojto 122:f9eeca106725 153 #define PWR_FLAG_WU PWR_CSR_WUF
Kojto 122:f9eeca106725 154 #define PWR_FLAG_SB PWR_CSR_SBF
Kojto 122:f9eeca106725 155 #define PWR_FLAG_PVDO PWR_CSR_PVDO
Kojto 122:f9eeca106725 156 #define PWR_FLAG_BRR PWR_CSR_BRR
Kojto 122:f9eeca106725 157 #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
Kojto 122:f9eeca106725 158 /**
Kojto 122:f9eeca106725 159 * @}
Kojto 122:f9eeca106725 160 */
Kojto 122:f9eeca106725 161
Kojto 122:f9eeca106725 162 /**
Kojto 122:f9eeca106725 163 * @}
Kojto 122:f9eeca106725 164 */
Kojto 122:f9eeca106725 165
Kojto 122:f9eeca106725 166 /* Exported macro ------------------------------------------------------------*/
Kojto 122:f9eeca106725 167 /** @defgroup PWR_Exported_Macro PWR Exported Macro
Kojto 122:f9eeca106725 168 * @{
Kojto 122:f9eeca106725 169 */
Kojto 122:f9eeca106725 170
Kojto 122:f9eeca106725 171 /** @brief Check PWR flag is set or not.
Kojto 122:f9eeca106725 172 * @param __FLAG__: specifies the flag to check.
Kojto 122:f9eeca106725 173 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 174 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
Kojto 122:f9eeca106725 175 * was received from the WKUP pin or from the RTC alarm (Alarm A
Kojto 122:f9eeca106725 176 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
Kojto 122:f9eeca106725 177 * An additional wakeup event is detected if the WKUP pin is enabled
Kojto 122:f9eeca106725 178 * (by setting the EWUP bit) when the WKUP pin level is already high.
Kojto 122:f9eeca106725 179 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
Kojto 122:f9eeca106725 180 * resumed from StandBy mode.
Kojto 122:f9eeca106725 181 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
Kojto 122:f9eeca106725 182 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
Kojto 122:f9eeca106725 183 * For this reason, this bit is equal to 0 after Standby or reset
Kojto 122:f9eeca106725 184 * until the PVDE bit is set.
Kojto 122:f9eeca106725 185 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
Kojto 122:f9eeca106725 186 * when the device wakes up from Standby mode or by a system reset
Kojto 122:f9eeca106725 187 * or power reset.
Kojto 122:f9eeca106725 188 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
Kojto 122:f9eeca106725 189 * scaling output selection is ready.
Kojto 122:f9eeca106725 190 * @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto 122:f9eeca106725 191 */
Kojto 122:f9eeca106725 192 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
Kojto 122:f9eeca106725 193
Kojto 122:f9eeca106725 194 /** @brief Clear the PWR's pending flags.
Kojto 122:f9eeca106725 195 * @param __FLAG__: specifies the flag to clear.
Kojto 122:f9eeca106725 196 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 197 * @arg PWR_FLAG_WU: Wake Up flag
Kojto 122:f9eeca106725 198 * @arg PWR_FLAG_SB: StandBy flag
Kojto 122:f9eeca106725 199 */
Kojto 122:f9eeca106725 200 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U)
Kojto 122:f9eeca106725 201
Kojto 122:f9eeca106725 202 /**
Kojto 122:f9eeca106725 203 * @brief Enable the PVD Exti Line 16.
Kojto 122:f9eeca106725 204 * @retval None.
Kojto 122:f9eeca106725 205 */
Kojto 122:f9eeca106725 206 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
Kojto 122:f9eeca106725 207
Kojto 122:f9eeca106725 208 /**
Kojto 122:f9eeca106725 209 * @brief Disable the PVD EXTI Line 16.
Kojto 122:f9eeca106725 210 * @retval None.
Kojto 122:f9eeca106725 211 */
Kojto 122:f9eeca106725 212 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
Kojto 122:f9eeca106725 213
Kojto 122:f9eeca106725 214 /**
Kojto 122:f9eeca106725 215 * @brief Enable event on PVD Exti Line 16.
Kojto 122:f9eeca106725 216 * @retval None.
Kojto 122:f9eeca106725 217 */
Kojto 122:f9eeca106725 218 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
Kojto 122:f9eeca106725 219
Kojto 122:f9eeca106725 220 /**
Kojto 122:f9eeca106725 221 * @brief Disable event on PVD Exti Line 16.
Kojto 122:f9eeca106725 222 * @retval None.
Kojto 122:f9eeca106725 223 */
Kojto 122:f9eeca106725 224 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
Kojto 122:f9eeca106725 225
Kojto 122:f9eeca106725 226 /**
Kojto 122:f9eeca106725 227 * @brief Enable the PVD Extended Interrupt Rising Trigger.
Kojto 122:f9eeca106725 228 * @retval None.
Kojto 122:f9eeca106725 229 */
Kojto 122:f9eeca106725 230 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 231
Kojto 122:f9eeca106725 232 /**
Kojto 122:f9eeca106725 233 * @brief Disable the PVD Extended Interrupt Rising Trigger.
Kojto 122:f9eeca106725 234 * @retval None.
Kojto 122:f9eeca106725 235 */
Kojto 122:f9eeca106725 236 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 237
Kojto 122:f9eeca106725 238 /**
Kojto 122:f9eeca106725 239 * @brief Enable the PVD Extended Interrupt Falling Trigger.
Kojto 122:f9eeca106725 240 * @retval None.
Kojto 122:f9eeca106725 241 */
Kojto 122:f9eeca106725 242 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 243
Kojto 122:f9eeca106725 244
Kojto 122:f9eeca106725 245 /**
Kojto 122:f9eeca106725 246 * @brief Disable the PVD Extended Interrupt Falling Trigger.
Kojto 122:f9eeca106725 247 * @retval None.
Kojto 122:f9eeca106725 248 */
Kojto 122:f9eeca106725 249 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 250
Kojto 122:f9eeca106725 251
Kojto 122:f9eeca106725 252 /**
Kojto 122:f9eeca106725 253 * @brief PVD EXTI line configuration: set rising & falling edge trigger.
Kojto 122:f9eeca106725 254 * @retval None.
Kojto 122:f9eeca106725 255 */
Kojto 122:f9eeca106725 256 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\
Kojto 122:f9eeca106725 257 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\
Kojto 122:f9eeca106725 258 }while(0)
Kojto 122:f9eeca106725 259
Kojto 122:f9eeca106725 260 /**
Kojto 122:f9eeca106725 261 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
Kojto 122:f9eeca106725 262 * This parameter can be:
Kojto 122:f9eeca106725 263 * @retval None.
Kojto 122:f9eeca106725 264 */
Kojto 122:f9eeca106725 265 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\
Kojto 122:f9eeca106725 266 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\
Kojto 122:f9eeca106725 267 }while(0)
Kojto 122:f9eeca106725 268
Kojto 122:f9eeca106725 269 /**
Kojto 122:f9eeca106725 270 * @brief checks whether the specified PVD Exti interrupt flag is set or not.
Kojto 122:f9eeca106725 271 * @retval EXTI PVD Line Status.
Kojto 122:f9eeca106725 272 */
Kojto 122:f9eeca106725 273 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
Kojto 122:f9eeca106725 274
Kojto 122:f9eeca106725 275 /**
Kojto 122:f9eeca106725 276 * @brief Clear the PVD Exti flag.
Kojto 122:f9eeca106725 277 * @retval None.
Kojto 122:f9eeca106725 278 */
Kojto 122:f9eeca106725 279 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
Kojto 122:f9eeca106725 280
Kojto 122:f9eeca106725 281 /**
Kojto 122:f9eeca106725 282 * @brief Generates a Software interrupt on PVD EXTI line.
Kojto 122:f9eeca106725 283 * @retval None
Kojto 122:f9eeca106725 284 */
Kojto 122:f9eeca106725 285 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
Kojto 122:f9eeca106725 286
Kojto 122:f9eeca106725 287 /**
Kojto 122:f9eeca106725 288 * @}
Kojto 122:f9eeca106725 289 */
Kojto 122:f9eeca106725 290
Kojto 122:f9eeca106725 291 /* Include PWR HAL Extension module */
Kojto 122:f9eeca106725 292 #include "stm32f4xx_hal_pwr_ex.h"
Kojto 122:f9eeca106725 293
Kojto 122:f9eeca106725 294 /* Exported functions --------------------------------------------------------*/
Kojto 122:f9eeca106725 295 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
Kojto 122:f9eeca106725 296 * @{
Kojto 122:f9eeca106725 297 */
Kojto 122:f9eeca106725 298
Kojto 122:f9eeca106725 299 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 122:f9eeca106725 300 * @{
Kojto 122:f9eeca106725 301 */
Kojto 122:f9eeca106725 302 /* Initialization and de-initialization functions *****************************/
Kojto 122:f9eeca106725 303 void HAL_PWR_DeInit(void);
Kojto 122:f9eeca106725 304 void HAL_PWR_EnableBkUpAccess(void);
Kojto 122:f9eeca106725 305 void HAL_PWR_DisableBkUpAccess(void);
Kojto 122:f9eeca106725 306 /**
Kojto 122:f9eeca106725 307 * @}
Kojto 122:f9eeca106725 308 */
Kojto 122:f9eeca106725 309
Kojto 122:f9eeca106725 310 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
Kojto 122:f9eeca106725 311 * @{
Kojto 122:f9eeca106725 312 */
Kojto 122:f9eeca106725 313 /* Peripheral Control functions **********************************************/
Kojto 122:f9eeca106725 314 /* PVD configuration */
Kojto 122:f9eeca106725 315 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
Kojto 122:f9eeca106725 316 void HAL_PWR_EnablePVD(void);
Kojto 122:f9eeca106725 317 void HAL_PWR_DisablePVD(void);
Kojto 122:f9eeca106725 318
Kojto 122:f9eeca106725 319 /* WakeUp pins configuration */
Kojto 122:f9eeca106725 320 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
Kojto 122:f9eeca106725 321 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
Kojto 122:f9eeca106725 322
Kojto 122:f9eeca106725 323 /* Low Power modes entry */
Kojto 122:f9eeca106725 324 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
Kojto 122:f9eeca106725 325 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
Kojto 122:f9eeca106725 326 void HAL_PWR_EnterSTANDBYMode(void);
Kojto 122:f9eeca106725 327
Kojto 122:f9eeca106725 328 /* Power PVD IRQ Handler */
Kojto 122:f9eeca106725 329 void HAL_PWR_PVD_IRQHandler(void);
Kojto 122:f9eeca106725 330 void HAL_PWR_PVDCallback(void);
Kojto 122:f9eeca106725 331
Kojto 122:f9eeca106725 332 /* Cortex System Control functions *******************************************/
Kojto 122:f9eeca106725 333 void HAL_PWR_EnableSleepOnExit(void);
Kojto 122:f9eeca106725 334 void HAL_PWR_DisableSleepOnExit(void);
Kojto 122:f9eeca106725 335 void HAL_PWR_EnableSEVOnPend(void);
Kojto 122:f9eeca106725 336 void HAL_PWR_DisableSEVOnPend(void);
Kojto 122:f9eeca106725 337 /**
Kojto 122:f9eeca106725 338 * @}
Kojto 122:f9eeca106725 339 */
Kojto 122:f9eeca106725 340
Kojto 122:f9eeca106725 341 /**
Kojto 122:f9eeca106725 342 * @}
Kojto 122:f9eeca106725 343 */
Kojto 122:f9eeca106725 344
Kojto 122:f9eeca106725 345 /* Private types -------------------------------------------------------------*/
Kojto 122:f9eeca106725 346 /* Private variables ---------------------------------------------------------*/
Kojto 122:f9eeca106725 347 /* Private constants ---------------------------------------------------------*/
Kojto 122:f9eeca106725 348 /** @defgroup PWR_Private_Constants PWR Private Constants
Kojto 122:f9eeca106725 349 * @{
Kojto 122:f9eeca106725 350 */
Kojto 122:f9eeca106725 351
Kojto 122:f9eeca106725 352 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
Kojto 122:f9eeca106725 353 * @{
Kojto 122:f9eeca106725 354 */
Kojto 122:f9eeca106725 355 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
Kojto 122:f9eeca106725 356 /**
Kojto 122:f9eeca106725 357 * @}
Kojto 122:f9eeca106725 358 */
Kojto 122:f9eeca106725 359
Kojto 122:f9eeca106725 360 /** @defgroup PWR_register_alias_address PWR Register alias address
Kojto 122:f9eeca106725 361 * @{
Kojto 122:f9eeca106725 362 */
Kojto 122:f9eeca106725 363 /* ------------- PWR registers bit address in the alias region ---------------*/
Kojto 122:f9eeca106725 364 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
Kojto 122:f9eeca106725 365 #define PWR_CR_OFFSET 0x00U
Kojto 122:f9eeca106725 366 #define PWR_CSR_OFFSET 0x04U
Kojto 122:f9eeca106725 367 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
Kojto 122:f9eeca106725 368 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
Kojto 122:f9eeca106725 369 /**
Kojto 122:f9eeca106725 370 * @}
Kojto 122:f9eeca106725 371 */
Kojto 122:f9eeca106725 372
Kojto 122:f9eeca106725 373 /** @defgroup PWR_CR_register_alias PWR CR Register alias address
Kojto 122:f9eeca106725 374 * @{
Kojto 122:f9eeca106725 375 */
Kojto 122:f9eeca106725 376 /* --- CR Register ---*/
Kojto 122:f9eeca106725 377 /* Alias word address of DBP bit */
Kojto 122:f9eeca106725 378 #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP)
Kojto 122:f9eeca106725 379 #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U))
Kojto 122:f9eeca106725 380
Kojto 122:f9eeca106725 381 /* Alias word address of PVDE bit */
Kojto 122:f9eeca106725 382 #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE)
Kojto 122:f9eeca106725 383 #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U))
Kojto 122:f9eeca106725 384
Kojto 122:f9eeca106725 385 /* Alias word address of PMODE bit */
Kojto 122:f9eeca106725 386 #define PMODE_BIT_NUMBER POSITION_VAL(PWR_CR_PMODE)
Kojto 122:f9eeca106725 387 #define CR_PMODE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PMODE_BIT_NUMBER * 4U))
Kojto 122:f9eeca106725 388 /**
Kojto 122:f9eeca106725 389 * @}
Kojto 122:f9eeca106725 390 */
Kojto 122:f9eeca106725 391
Kojto 122:f9eeca106725 392 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
Kojto 122:f9eeca106725 393 * @{
Kojto 122:f9eeca106725 394 */
Kojto 122:f9eeca106725 395 /* --- CSR Register ---*/
Kojto 122:f9eeca106725 396 /* Alias word address of EWUP bit */
Kojto 122:f9eeca106725 397 #define EWUP_BIT_NUMBER POSITION_VAL(PWR_CSR_EWUP)
Kojto 122:f9eeca106725 398 #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U))
Kojto 122:f9eeca106725 399 /**
Kojto 122:f9eeca106725 400 * @}
Kojto 122:f9eeca106725 401 */
Kojto 122:f9eeca106725 402
Kojto 122:f9eeca106725 403 /**
Kojto 122:f9eeca106725 404 * @}
Kojto 122:f9eeca106725 405 */
Kojto 122:f9eeca106725 406 /* Private macros ------------------------------------------------------------*/
Kojto 122:f9eeca106725 407 /** @defgroup PWR_Private_Macros PWR Private Macros
Kojto 122:f9eeca106725 408 * @{
Kojto 122:f9eeca106725 409 */
Kojto 122:f9eeca106725 410
Kojto 122:f9eeca106725 411 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
Kojto 122:f9eeca106725 412 * @{
Kojto 122:f9eeca106725 413 */
Kojto 122:f9eeca106725 414 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
Kojto 122:f9eeca106725 415 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
Kojto 122:f9eeca106725 416 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
Kojto 122:f9eeca106725 417 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
Kojto 122:f9eeca106725 418 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
Kojto 122:f9eeca106725 419 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
Kojto 122:f9eeca106725 420 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
Kojto 122:f9eeca106725 421 ((MODE) == PWR_PVD_MODE_NORMAL))
Kojto 122:f9eeca106725 422 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
Kojto 122:f9eeca106725 423 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
Kojto 122:f9eeca106725 424 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
Kojto 122:f9eeca106725 425 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
Kojto 122:f9eeca106725 426 /**
Kojto 122:f9eeca106725 427 * @}
Kojto 122:f9eeca106725 428 */
Kojto 122:f9eeca106725 429
Kojto 122:f9eeca106725 430 /**
Kojto 122:f9eeca106725 431 * @}
Kojto 122:f9eeca106725 432 */
Kojto 122:f9eeca106725 433
Kojto 122:f9eeca106725 434 /**
Kojto 122:f9eeca106725 435 * @}
Kojto 122:f9eeca106725 436 */
Kojto 122:f9eeca106725 437
Kojto 122:f9eeca106725 438 /**
Kojto 122:f9eeca106725 439 * @}
Kojto 122:f9eeca106725 440 */
Kojto 122:f9eeca106725 441
Kojto 122:f9eeca106725 442 #ifdef __cplusplus
Kojto 122:f9eeca106725 443 }
Kojto 122:f9eeca106725 444 #endif
Kojto 122:f9eeca106725 445
Kojto 122:f9eeca106725 446
Kojto 122:f9eeca106725 447 #endif /* __STM32F4xx_HAL_PWR_H */
Kojto 122:f9eeca106725 448
Kojto 122:f9eeca106725 449 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/