mbed | Mbed

Users » mbed_official » Code » mbed

Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_NUCLEO_L053R8/stm32l0xx_hal_uart.h@119:aae6fcc7d9bb, 2016-04-27 (annotated)

Committer:: Kojto
Date:: Wed Apr 27 12:10:56 2016 -0500
Revision:: 119:aae6fcc7d9bb
Parent:: 96:487b796308b0

Release 119 of the mbed library



Changes:

- new targets - EFM32PG_STK3401, NUCLEO_L031K6

- ST - hwflwctl support for NUCLEO_L476RG

     - Update STM32CUBE_L0 from v1.2 to v1.5

     - STM32F7 - bugfix - The weak function HAL_Delay is overwritten to use us ticker API.

- Maxim - Fixing the send break for the MAXWSNENV and MAX32600MBED

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	84:0b3ab51c8877	1	/**
bogdanm	84:0b3ab51c8877	2	******************************************************************************
bogdanm	84:0b3ab51c8877	3	* @file stm32l0xx_hal_uart.h
bogdanm	84:0b3ab51c8877	4	* @author MCD Application Team
Kojto	119:aae6fcc7d9bb	5	* @version V1.5.0
Kojto	119:aae6fcc7d9bb	6	* @date 8-January-2016
bogdanm	84:0b3ab51c8877	7	* @brief Header file of UART HAL module.
bogdanm	84:0b3ab51c8877	8	******************************************************************************
bogdanm	84:0b3ab51c8877	9	* @attention
bogdanm	84:0b3ab51c8877	10	*
Kojto	119:aae6fcc7d9bb	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm	84:0b3ab51c8877	12	*
bogdanm	84:0b3ab51c8877	13	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	84:0b3ab51c8877	14	* are permitted provided that the following conditions are met:
bogdanm	84:0b3ab51c8877	15	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	84:0b3ab51c8877	16	* this list of conditions and the following disclaimer.
bogdanm	84:0b3ab51c8877	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	84:0b3ab51c8877	18	* this list of conditions and the following disclaimer in the documentation
bogdanm	84:0b3ab51c8877	19	* and/or other materials provided with the distribution.
bogdanm	84:0b3ab51c8877	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	84:0b3ab51c8877	21	* may be used to endorse or promote products derived from this software
bogdanm	84:0b3ab51c8877	22	* without specific prior written permission.
bogdanm	84:0b3ab51c8877	23	*
bogdanm	84:0b3ab51c8877	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	84:0b3ab51c8877	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	84:0b3ab51c8877	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	84:0b3ab51c8877	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	84:0b3ab51c8877	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	84:0b3ab51c8877	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	84:0b3ab51c8877	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	84:0b3ab51c8877	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	84:0b3ab51c8877	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	84:0b3ab51c8877	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	84:0b3ab51c8877	34	*
bogdanm	84:0b3ab51c8877	35	******************************************************************************
bogdanm	84:0b3ab51c8877	36	*/
bogdanm	84:0b3ab51c8877	37
bogdanm	84:0b3ab51c8877	38	/* Define to prevent recursive inclusion -------------------------------------*/
bogdanm	84:0b3ab51c8877	39	#ifndef __STM32L0xx_HAL_UART_H
bogdanm	84:0b3ab51c8877	40	#define __STM32L0xx_HAL_UART_H
bogdanm	84:0b3ab51c8877	41
bogdanm	84:0b3ab51c8877	42	#ifdef __cplusplus
bogdanm	84:0b3ab51c8877	43	extern "C" {
bogdanm	84:0b3ab51c8877	44	#endif
bogdanm	84:0b3ab51c8877	45
bogdanm	84:0b3ab51c8877	46	/* Includes ------------------------------------------------------------------*/
bogdanm	84:0b3ab51c8877	47	#include "stm32l0xx_hal_def.h"
bogdanm	84:0b3ab51c8877	48
bogdanm	84:0b3ab51c8877	49	/** @addtogroup STM32L0xx_HAL_Driver
bogdanm	84:0b3ab51c8877	50	* @{
bogdanm	84:0b3ab51c8877	51	*/
bogdanm	84:0b3ab51c8877	52
Kojto	96:487b796308b0	53	/** @defgroup UART UART
bogdanm	84:0b3ab51c8877	54	* @{
bogdanm	84:0b3ab51c8877	55	*/
bogdanm	84:0b3ab51c8877	56
Kojto	96:487b796308b0	57	/******************************************************************************/
Kojto	96:487b796308b0	58	/* Exported types ------------------------------------------------------------*/
Kojto	96:487b796308b0	59	/******************************************************************************/
bogdanm	84:0b3ab51c8877	60
Kojto	96:487b796308b0	61	/** @defgroup UART_Exported_Types UART Exported Types
Kojto	96:487b796308b0	62	* @{
Kojto	96:487b796308b0	63	*/
Kojto	96:487b796308b0	64
Kojto	96:487b796308b0	65	/** @defgroup UART_Init_Configuration UART initialization configuration structure
Kojto	96:487b796308b0	66	* @{
Kojto	96:487b796308b0	67	*/
bogdanm	84:0b3ab51c8877	68	/**
bogdanm	84:0b3ab51c8877	69	* @brief UART Init Structure definition
bogdanm	84:0b3ab51c8877	70	*/
bogdanm	84:0b3ab51c8877	71	typedef struct
bogdanm	84:0b3ab51c8877	72	{
bogdanm	84:0b3ab51c8877	73	uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
bogdanm	84:0b3ab51c8877	74	The baud rate register is computed using the following formula:
bogdanm	84:0b3ab51c8877	75	- If oversampling is 16 or in LIN mode,
bogdanm	84:0b3ab51c8877	76	Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
bogdanm	84:0b3ab51c8877	77	- If oversampling is 8,
bogdanm	84:0b3ab51c8877	78	Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
bogdanm	84:0b3ab51c8877	79	Baud Rate Register[3] = 0
bogdanm	84:0b3ab51c8877	80	Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1 */
bogdanm	84:0b3ab51c8877	81
bogdanm	84:0b3ab51c8877	82	uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
bogdanm	92:4fc01daae5a5	83	This parameter can be a value of @ref UARTEx_Word_Length */
bogdanm	84:0b3ab51c8877	84
bogdanm	84:0b3ab51c8877	85	uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
bogdanm	84:0b3ab51c8877	86	This parameter can be a value of @ref UART_Stop_Bits */
bogdanm	84:0b3ab51c8877	87
bogdanm	84:0b3ab51c8877	88	uint32_t Parity; /*!< Specifies the parity mode.
bogdanm	84:0b3ab51c8877	89	This parameter can be a value of @ref UART_Parity
bogdanm	84:0b3ab51c8877	90	@note When parity is enabled, the computed parity is inserted
bogdanm	84:0b3ab51c8877	91	at the MSB position of the transmitted data (9th bit when
bogdanm	84:0b3ab51c8877	92	the word length is set to 9 data bits; 8th bit when the
bogdanm	84:0b3ab51c8877	93	word length is set to 8 data bits). */
bogdanm	84:0b3ab51c8877	94
bogdanm	84:0b3ab51c8877	95	uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
bogdanm	84:0b3ab51c8877	96	This parameter can be a value of @ref UART_Mode */
bogdanm	84:0b3ab51c8877	97
bogdanm	84:0b3ab51c8877	98	uint32_t HwFlowCtl; /*!< Specifies wether the hardware flow control mode is enabled
bogdanm	84:0b3ab51c8877	99	or disabled.
bogdanm	84:0b3ab51c8877	100	This parameter can be a value of @ref UART_Hardware_Flow_Control */
bogdanm	84:0b3ab51c8877	101
bogdanm	84:0b3ab51c8877	102	uint32_t OverSampling; /*!< Specifies wether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
bogdanm	84:0b3ab51c8877	103	This parameter can be a value of @ref UART_Over_Sampling */
bogdanm	84:0b3ab51c8877	104
bogdanm	84:0b3ab51c8877	105	uint32_t OneBitSampling; /*!< Specifies wether a single sample or three samples' majority vote is selected.
bogdanm	84:0b3ab51c8877	106	Selecting the single sample method increases the receiver tolerance to clock
Kojto	96:487b796308b0	107	deviations. This parameter can be a value of @ref UART_One_Bit */
bogdanm	84:0b3ab51c8877	108	}UART_InitTypeDef;
Kojto	96:487b796308b0	109	/**
Kojto	96:487b796308b0	110	* @}
Kojto	96:487b796308b0	111	*/
Kojto	96:487b796308b0	112	/** @defgroup UART_Advanced_Feature UART advanced feature structure
Kojto	96:487b796308b0	113	* @{
Kojto	96:487b796308b0	114	*/
bogdanm	84:0b3ab51c8877	115	/**
bogdanm	84:0b3ab51c8877	116	* @brief UART Advanced Features initalization structure definition
bogdanm	84:0b3ab51c8877	117	*/
bogdanm	84:0b3ab51c8877	118	typedef struct
bogdanm	84:0b3ab51c8877	119	{
bogdanm	84:0b3ab51c8877	120	uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
bogdanm	84:0b3ab51c8877	121	Advanced Features may be initialized at the same time .
bogdanm	84:0b3ab51c8877	122	This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type */
bogdanm	84:0b3ab51c8877	123
bogdanm	84:0b3ab51c8877	124	uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
bogdanm	84:0b3ab51c8877	125	This parameter can be a value of @ref UART_Tx_Inv */
bogdanm	84:0b3ab51c8877	126
bogdanm	84:0b3ab51c8877	127	uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
bogdanm	84:0b3ab51c8877	128	This parameter can be a value of @ref UART_Rx_Inv */
bogdanm	84:0b3ab51c8877	129
bogdanm	84:0b3ab51c8877	130	uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
bogdanm	84:0b3ab51c8877	131	vs negative/inverted logic).
bogdanm	84:0b3ab51c8877	132	This parameter can be a value of @ref UART_Data_Inv */
bogdanm	84:0b3ab51c8877	133
bogdanm	84:0b3ab51c8877	134	uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
bogdanm	84:0b3ab51c8877	135	This parameter can be a value of @ref UART_Rx_Tx_Swap */
bogdanm	84:0b3ab51c8877	136
bogdanm	84:0b3ab51c8877	137	uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
bogdanm	84:0b3ab51c8877	138	This parameter can be a value of @ref UART_Overrun_Disable */
bogdanm	84:0b3ab51c8877	139
bogdanm	84:0b3ab51c8877	140	uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
bogdanm	84:0b3ab51c8877	141	This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error */
bogdanm	84:0b3ab51c8877	142
bogdanm	84:0b3ab51c8877	143	uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
bogdanm	84:0b3ab51c8877	144	This parameter can be a value of @ref UART_AutoBaudRate_Enable */
bogdanm	84:0b3ab51c8877	145
bogdanm	84:0b3ab51c8877	146	uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
bogdanm	84:0b3ab51c8877	147	detection is carried out.
bogdanm	92:4fc01daae5a5	148	This parameter can be a value of @ref UARTEx_AutoBaud_Rate_Mode */
bogdanm	84:0b3ab51c8877	149
bogdanm	84:0b3ab51c8877	150	uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
bogdanm	84:0b3ab51c8877	151	This parameter can be a value of @ref UART_MSB_First */
bogdanm	84:0b3ab51c8877	152	} UART_AdvFeatureInitTypeDef;
Kojto	96:487b796308b0	153	/**
Kojto	96:487b796308b0	154	* @}
Kojto	96:487b796308b0	155	*/
bogdanm	84:0b3ab51c8877	156
Kojto	96:487b796308b0	157	/** @defgroup UART_State_Definition UART state definition
Kojto	96:487b796308b0	158	* @{
Kojto	96:487b796308b0	159	*/
bogdanm	84:0b3ab51c8877	160	/**
bogdanm	84:0b3ab51c8877	161	* @brief HAL UART State structures definition
bogdanm	84:0b3ab51c8877	162	*/
bogdanm	84:0b3ab51c8877	163	typedef enum
bogdanm	84:0b3ab51c8877	164	{
bogdanm	84:0b3ab51c8877	165	HAL_UART_STATE_RESET = 0x00, /!< Peripheral Reset state /
bogdanm	84:0b3ab51c8877	166	HAL_UART_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
bogdanm	84:0b3ab51c8877	167	HAL_UART_STATE_BUSY = 0x02, /!< an internal process is ongoing /
bogdanm	84:0b3ab51c8877	168	HAL_UART_STATE_BUSY_TX = 0x12, /!< Data Transmission process is ongoing /
bogdanm	84:0b3ab51c8877	169	HAL_UART_STATE_BUSY_RX = 0x22, /!< Data Reception process is ongoing /
bogdanm	84:0b3ab51c8877	170	HAL_UART_STATE_BUSY_TX_RX = 0x32, /!< Data Transmission and Reception process is ongoing /
bogdanm	84:0b3ab51c8877	171	HAL_UART_STATE_TIMEOUT = 0x03, /!< Timeout state /
bogdanm	84:0b3ab51c8877	172	HAL_UART_STATE_ERROR = 0x04 /!< Error /
bogdanm	84:0b3ab51c8877	173	}HAL_UART_StateTypeDef;
Kojto	96:487b796308b0	174	/**
Kojto	96:487b796308b0	175	* @}
Kojto	96:487b796308b0	176	*/
Kojto	96:487b796308b0	177	/** @defgroup UART_Error_Definition UART error definition
Kojto	96:487b796308b0	178	* @{
Kojto	96:487b796308b0	179	*/
bogdanm	84:0b3ab51c8877	180	/**
Kojto	96:487b796308b0	181	* @brief HAL UART Error Code definition
bogdanm	84:0b3ab51c8877	182	*/
bogdanm	84:0b3ab51c8877	183
Kojto	96:487b796308b0	184	#define HAL_UART_ERROR_NONE ((uint32_t)0x00) /!< No error /
Kojto	96:487b796308b0	185	#define HAL_UART_ERROR_PE ((uint32_t)0x01) /!< Parity error /
Kojto	96:487b796308b0	186	#define HAL_UART_ERROR_NE ((uint32_t)0x02) /!< Noise error /
Kojto	96:487b796308b0	187	#define HAL_UART_ERROR_FE ((uint32_t)0x04) /!< frame error /
Kojto	96:487b796308b0	188	#define HAL_UART_ERROR_ORE ((uint32_t)0x08) /!< Overrun error /
Kojto	96:487b796308b0	189	#define HAL_UART_ERROR_DMA ((uint32_t)0x10) /!< DMA transfer error /
Kojto	96:487b796308b0	190
Kojto	96:487b796308b0	191	/**
Kojto	96:487b796308b0	192	* @}
Kojto	96:487b796308b0	193	*/
Kojto	96:487b796308b0	194	/** @defgroup UART_Clock_SourceDefinition UART clock source definition
Kojto	96:487b796308b0	195	* @{
Kojto	96:487b796308b0	196	*/
bogdanm	84:0b3ab51c8877	197	/**
bogdanm	84:0b3ab51c8877	198	* @brief UART clock sources definition
bogdanm	84:0b3ab51c8877	199	*/
bogdanm	84:0b3ab51c8877	200	typedef enum
bogdanm	84:0b3ab51c8877	201	{
bogdanm	84:0b3ab51c8877	202	UART_CLOCKSOURCE_PCLK1 = 0x00, /!< PCLK1 clock source /
bogdanm	84:0b3ab51c8877	203	UART_CLOCKSOURCE_PCLK2 = 0x01, /!< PCLK2 clock source /
bogdanm	84:0b3ab51c8877	204	UART_CLOCKSOURCE_HSI = 0x02, /!< HSI clock source /
bogdanm	84:0b3ab51c8877	205	UART_CLOCKSOURCE_SYSCLK = 0x04, /!< SYSCLK clock source /
bogdanm	84:0b3ab51c8877	206	UART_CLOCKSOURCE_LSE = 0x08 /!< LSE clock source /
bogdanm	84:0b3ab51c8877	207	}UART_ClockSourceTypeDef;
Kojto	96:487b796308b0	208	/**
Kojto	96:487b796308b0	209	* @}
Kojto	96:487b796308b0	210	*/
Kojto	96:487b796308b0	211	/** @defgroup UART_handle_Definition Handle structure definition
Kojto	96:487b796308b0	212	* @{
Kojto	96:487b796308b0	213	*/
bogdanm	84:0b3ab51c8877	214	/**
bogdanm	84:0b3ab51c8877	215	* @brief UART handle Structure definition
Kojto	96:487b796308b0	216	*/
Kojto	96:487b796308b0	217
bogdanm	84:0b3ab51c8877	218	typedef struct
bogdanm	84:0b3ab51c8877	219	{
bogdanm	84:0b3ab51c8877	220	USART_TypeDef Instance; / UART registers base address */
bogdanm	84:0b3ab51c8877	221
bogdanm	84:0b3ab51c8877	222	UART_InitTypeDef Init; /* UART communication parameters */
bogdanm	84:0b3ab51c8877	223
bogdanm	84:0b3ab51c8877	224	UART_AdvFeatureInitTypeDef AdvancedInit; /* UART Advanced Features initialization parameters */
bogdanm	84:0b3ab51c8877	225
bogdanm	84:0b3ab51c8877	226	uint8_t pTxBuffPtr; / Pointer to UART Tx transfer Buffer */
bogdanm	84:0b3ab51c8877	227
bogdanm	84:0b3ab51c8877	228	uint16_t TxXferSize; /* UART Tx Transfer size */
bogdanm	84:0b3ab51c8877	229
bogdanm	84:0b3ab51c8877	230	uint16_t TxXferCount; /* UART Tx Transfer Counter */
bogdanm	84:0b3ab51c8877	231
bogdanm	84:0b3ab51c8877	232	uint8_t pRxBuffPtr; / Pointer to UART Rx transfer Buffer */
bogdanm	84:0b3ab51c8877	233
bogdanm	84:0b3ab51c8877	234	uint16_t RxXferSize; /* UART Rx Transfer size */
bogdanm	84:0b3ab51c8877	235
bogdanm	84:0b3ab51c8877	236	uint16_t RxXferCount; /* UART Rx Transfer Counter */
bogdanm	84:0b3ab51c8877	237
bogdanm	84:0b3ab51c8877	238	uint16_t Mask; /* UART Rx RDR register mask */
bogdanm	84:0b3ab51c8877	239
bogdanm	84:0b3ab51c8877	240	DMA_HandleTypeDef hdmatx; / UART Tx DMA Handle parameters */
bogdanm	84:0b3ab51c8877	241
bogdanm	84:0b3ab51c8877	242	DMA_HandleTypeDef hdmarx; / UART Rx DMA Handle parameters */
bogdanm	84:0b3ab51c8877	243
bogdanm	84:0b3ab51c8877	244	HAL_LockTypeDef Lock; /* Locking object */
bogdanm	84:0b3ab51c8877	245
bogdanm	84:0b3ab51c8877	246	__IO HAL_UART_StateTypeDef State; /* UART communication state */
bogdanm	84:0b3ab51c8877	247
Kojto	96:487b796308b0	248	__IO uint32_t ErrorCode; /* UART Error code */
bogdanm	84:0b3ab51c8877	249
bogdanm	84:0b3ab51c8877	250	}UART_HandleTypeDef;
Kojto	96:487b796308b0	251	/**
Kojto	96:487b796308b0	252	* @}
Kojto	96:487b796308b0	253	*/
Kojto	96:487b796308b0	254	/**
Kojto	96:487b796308b0	255	* @}
Kojto	96:487b796308b0	256	*/
bogdanm	84:0b3ab51c8877	257
bogdanm	84:0b3ab51c8877	258	/* Exported constants --------------------------------------------------------*/
Kojto	96:487b796308b0	259	/** @defgroup UART_Exported_Constants UART Exported Constants
bogdanm	84:0b3ab51c8877	260	* @{
bogdanm	84:0b3ab51c8877	261	*/
bogdanm	84:0b3ab51c8877	262
Kojto	96:487b796308b0	263	/** @defgroup UART_Stop_Bits UART stop bit definition
bogdanm	84:0b3ab51c8877	264	* @{
bogdanm	84:0b3ab51c8877	265	*/
Kojto	119:aae6fcc7d9bb	266	#define UART_STOPBITS_1 ((uint32_t)0x0000) /!< USART frame with 1 stop bit /
Kojto	119:aae6fcc7d9bb	267	#define UART_STOPBITS_1_5 (USART_CR2_STOP_0 \| USART_CR2_STOP_1) /!< USART frame with 1.5 stop bits /
Kojto	119:aae6fcc7d9bb	268	#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /!< USART frame with 2 stop bits /
Kojto	119:aae6fcc7d9bb	269	#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) \|\| \
Kojto	119:aae6fcc7d9bb	270	((STOPBITS) == UART_STOPBITS_1_5) \|\| \
bogdanm	84:0b3ab51c8877	271	((STOPBITS) == UART_STOPBITS_2))
Kojto	119:aae6fcc7d9bb	272
Kojto	119:aae6fcc7d9bb	273	#define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) \|\| \
Kojto	119:aae6fcc7d9bb	274	((__STOPBITS__) == UART_STOPBITS_2))
Kojto	119:aae6fcc7d9bb	275
bogdanm	84:0b3ab51c8877	276	/**
bogdanm	84:0b3ab51c8877	277	* @}
bogdanm	84:0b3ab51c8877	278	*/
bogdanm	84:0b3ab51c8877	279
Kojto	96:487b796308b0	280	/** @defgroup UART_Parity UART parity definition
bogdanm	84:0b3ab51c8877	281	* @{
bogdanm	84:0b3ab51c8877	282	*/
bogdanm	84:0b3ab51c8877	283	#define UART_PARITY_NONE ((uint32_t)0x0000)
bogdanm	84:0b3ab51c8877	284	#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
bogdanm	84:0b3ab51c8877	285	#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE \| USART_CR1_PS))
bogdanm	84:0b3ab51c8877	286	#define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) \|\| \
bogdanm	84:0b3ab51c8877	287	((PARITY) == UART_PARITY_EVEN) \|\| \
bogdanm	84:0b3ab51c8877	288	((PARITY) == UART_PARITY_ODD))
bogdanm	84:0b3ab51c8877	289	/**
bogdanm	84:0b3ab51c8877	290	* @}
bogdanm	84:0b3ab51c8877	291	*/
bogdanm	84:0b3ab51c8877	292
Kojto	96:487b796308b0	293	/** @defgroup UART_Hardware_Flow_Control UART hardware flow control definition
bogdanm	84:0b3ab51c8877	294	* @{
bogdanm	84:0b3ab51c8877	295	*/
bogdanm	84:0b3ab51c8877	296	#define UART_HWCONTROL_NONE ((uint32_t)0x0000)
bogdanm	84:0b3ab51c8877	297	#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
bogdanm	84:0b3ab51c8877	298	#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
bogdanm	84:0b3ab51c8877	299	#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE \| USART_CR3_CTSE))
bogdanm	84:0b3ab51c8877	300	#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
bogdanm	84:0b3ab51c8877	301	(((CONTROL) == UART_HWCONTROL_NONE) \|\| \
bogdanm	84:0b3ab51c8877	302	((CONTROL) == UART_HWCONTROL_RTS) \|\| \
bogdanm	84:0b3ab51c8877	303	((CONTROL) == UART_HWCONTROL_CTS) \|\| \
bogdanm	84:0b3ab51c8877	304	((CONTROL) == UART_HWCONTROL_RTS_CTS))
bogdanm	84:0b3ab51c8877	305	/**
bogdanm	84:0b3ab51c8877	306	* @}
bogdanm	84:0b3ab51c8877	307	*/
bogdanm	84:0b3ab51c8877	308
Kojto	96:487b796308b0	309	/** @defgroup UART_Mode UART mode definition
bogdanm	84:0b3ab51c8877	310	* @{
bogdanm	84:0b3ab51c8877	311	*/
bogdanm	84:0b3ab51c8877	312	#define UART_MODE_RX ((uint32_t)USART_CR1_RE)
bogdanm	84:0b3ab51c8877	313	#define UART_MODE_TX ((uint32_t)USART_CR1_TE)
bogdanm	84:0b3ab51c8877	314	#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE \|USART_CR1_RE))
bogdanm	84:0b3ab51c8877	315	#define IS_UART_MODE(MODE) ((((MODE) & (~((uint32_t)(UART_MODE_TX_RX)))) == (uint32_t)0x00) && ((MODE) != (uint32_t)0x00))
bogdanm	84:0b3ab51c8877	316	/**
bogdanm	84:0b3ab51c8877	317	* @}
bogdanm	84:0b3ab51c8877	318	*/
bogdanm	84:0b3ab51c8877	319
Kojto	96:487b796308b0	320	/** @defgroup UART_State UART state enable and disable definition
bogdanm	84:0b3ab51c8877	321	* @{
bogdanm	84:0b3ab51c8877	322	*/
bogdanm	84:0b3ab51c8877	323	#define UART_STATE_DISABLE ((uint32_t)0x0000)
bogdanm	84:0b3ab51c8877	324	#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
bogdanm	84:0b3ab51c8877	325	#define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) \|\| \
bogdanm	84:0b3ab51c8877	326	((STATE) == UART_STATE_ENABLE))
bogdanm	84:0b3ab51c8877	327	/**
bogdanm	84:0b3ab51c8877	328	* @}
bogdanm	84:0b3ab51c8877	329	*/
bogdanm	84:0b3ab51c8877	330
Kojto	96:487b796308b0	331	/** @defgroup UART_Over_Sampling UART over sampling definition
bogdanm	84:0b3ab51c8877	332	* @{
bogdanm	84:0b3ab51c8877	333	*/
bogdanm	84:0b3ab51c8877	334	#define UART_OVERSAMPLING_16 ((uint32_t)0x0000)
bogdanm	84:0b3ab51c8877	335	#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
bogdanm	84:0b3ab51c8877	336	#define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) \|\| \
bogdanm	84:0b3ab51c8877	337	((SAMPLING) == UART_OVERSAMPLING_8))
bogdanm	84:0b3ab51c8877	338	/**
bogdanm	84:0b3ab51c8877	339	* @}
bogdanm	84:0b3ab51c8877	340	*/
bogdanm	84:0b3ab51c8877	341
bogdanm	84:0b3ab51c8877	342
Kojto	96:487b796308b0	343	/** @defgroup UART_Receiver_TimeOut UART receiver timeOut definition
bogdanm	84:0b3ab51c8877	344	* @{
bogdanm	84:0b3ab51c8877	345	*/
bogdanm	84:0b3ab51c8877	346	#define UART_RECEIVER_TIMEOUT_DISABLE ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	347	#define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN)
bogdanm	84:0b3ab51c8877	348	#define IS_UART_RECEIVER_TIMEOUT(TIMEOUT) (((TIMEOUT) == UART_RECEIVER_TIMEOUT_DISABLE) \|\| \
bogdanm	84:0b3ab51c8877	349	((TIMEOUT) == UART_RECEIVER_TIMEOUT_ENABLE))
bogdanm	84:0b3ab51c8877	350	/**
bogdanm	84:0b3ab51c8877	351	* @}
bogdanm	84:0b3ab51c8877	352	*/
bogdanm	84:0b3ab51c8877	353
Kojto	96:487b796308b0	354	/** @defgroup UART_LIN UART LIN enable and disable definition
bogdanm	84:0b3ab51c8877	355	* @{
bogdanm	84:0b3ab51c8877	356	*/
bogdanm	84:0b3ab51c8877	357	#define UART_LIN_DISABLE ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	358	#define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN)
bogdanm	84:0b3ab51c8877	359	#define IS_UART_LIN(LIN) (((LIN) == UART_LIN_DISABLE) \|\| \
bogdanm	84:0b3ab51c8877	360	((LIN) == UART_LIN_ENABLE))
bogdanm	84:0b3ab51c8877	361	/**
bogdanm	84:0b3ab51c8877	362	* @}
bogdanm	84:0b3ab51c8877	363	*/
bogdanm	84:0b3ab51c8877	364
Kojto	96:487b796308b0	365	/** @defgroup UART_LIN_Break_Detection UART LIN break detection definition
bogdanm	84:0b3ab51c8877	366	* @{
bogdanm	84:0b3ab51c8877	367	*/
bogdanm	84:0b3ab51c8877	368	#define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	369	#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
bogdanm	84:0b3ab51c8877	370	#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) \|\| \
bogdanm	84:0b3ab51c8877	371	((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
bogdanm	84:0b3ab51c8877	372	/**
bogdanm	84:0b3ab51c8877	373	* @}
bogdanm	84:0b3ab51c8877	374	*/
bogdanm	84:0b3ab51c8877	375
bogdanm	84:0b3ab51c8877	376
bogdanm	84:0b3ab51c8877	377
Kojto	96:487b796308b0	378	/** @defgroup UART_One_Bit UART one bit definition
bogdanm	84:0b3ab51c8877	379	* @{
bogdanm	84:0b3ab51c8877	380	*/
Kojto	96:487b796308b0	381	#define UART_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000)
Kojto	96:487b796308b0	382	#define UART_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT)
Kojto	96:487b796308b0	383	#define IS_UART_ONE_BIT_SAMPLE(ONEBIT) (((ONEBIT) == UART_ONE_BIT_SAMPLE_DISABLE) \|\| \
Kojto	96:487b796308b0	384	((ONEBIT) == UART_ONE_BIT_SAMPLE_ENABLE))
bogdanm	84:0b3ab51c8877	385	/**
bogdanm	84:0b3ab51c8877	386	* @}
bogdanm	84:0b3ab51c8877	387	*/
bogdanm	84:0b3ab51c8877	388
Kojto	96:487b796308b0	389	/** @defgroup UART_DMA_Tx UART DMA Tx definition
bogdanm	84:0b3ab51c8877	390	* @{
bogdanm	84:0b3ab51c8877	391	*/
bogdanm	84:0b3ab51c8877	392	#define UART_DMA_TX_DISABLE ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	393	#define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT)
bogdanm	84:0b3ab51c8877	394	#define IS_UART_DMA_TX(DMATX) (((DMATX) == UART_DMA_TX_DISABLE) \|\| \
bogdanm	84:0b3ab51c8877	395	((DMATX) == UART_DMA_TX_ENABLE))
bogdanm	84:0b3ab51c8877	396	/**
bogdanm	84:0b3ab51c8877	397	* @}
bogdanm	84:0b3ab51c8877	398	*/
bogdanm	84:0b3ab51c8877	399
Kojto	96:487b796308b0	400	/** @defgroup UART_DMA_Rx UART DMA Rx definition
bogdanm	84:0b3ab51c8877	401	* @{
bogdanm	84:0b3ab51c8877	402	*/
bogdanm	84:0b3ab51c8877	403	#define UART_DMA_RX_DISABLE ((uint32_t)0x0000)
bogdanm	84:0b3ab51c8877	404	#define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR)
bogdanm	84:0b3ab51c8877	405	#define IS_UART_DMA_RX(DMARX) (((DMARX) == UART_DMA_RX_DISABLE) \|\| \
bogdanm	84:0b3ab51c8877	406	((DMARX) == UART_DMA_RX_ENABLE))
bogdanm	84:0b3ab51c8877	407	/**
bogdanm	84:0b3ab51c8877	408	* @}
bogdanm	84:0b3ab51c8877	409	*/
bogdanm	84:0b3ab51c8877	410
Kojto	96:487b796308b0	411	/** @defgroup UART_Half_Duplex_Selection UART half duplex selection definition
bogdanm	84:0b3ab51c8877	412	* @{
bogdanm	84:0b3ab51c8877	413	*/
bogdanm	84:0b3ab51c8877	414	#define UART_HALF_DUPLEX_DISABLE ((uint32_t)0x0000)
bogdanm	84:0b3ab51c8877	415	#define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL)
bogdanm	84:0b3ab51c8877	416	#define IS_UART_HALF_DUPLEX(HDSEL) (((HDSEL) == UART_HALF_DUPLEX_DISABLE) \|\| \
bogdanm	84:0b3ab51c8877	417	((HDSEL) == UART_HALF_DUPLEX_ENABLE))
bogdanm	84:0b3ab51c8877	418	/**
bogdanm	84:0b3ab51c8877	419	* @}
bogdanm	84:0b3ab51c8877	420	*/
bogdanm	84:0b3ab51c8877	421
Kojto	96:487b796308b0	422	/** @defgroup UART_Flags UART flags definition
bogdanm	84:0b3ab51c8877	423	* Elements values convention: 0xXXXX
bogdanm	84:0b3ab51c8877	424	* - 0xXXXX : Flag mask in the ISR register
bogdanm	84:0b3ab51c8877	425	* @{
bogdanm	84:0b3ab51c8877	426	*/
Kojto	119:aae6fcc7d9bb	427	#define UART_FLAG_REACK USART_ISR_REACK /!< Receive Enable Acknowledge Flag /
Kojto	119:aae6fcc7d9bb	428	#define UART_FLAG_TEACK USART_ISR_TEACK /!< Transmit Enable Acknowledge Flag /
Kojto	119:aae6fcc7d9bb	429	#define UART_FLAG_WUF USART_ISR_WUF /!< Wake Up from stop mode Flag /
Kojto	119:aae6fcc7d9bb	430	#define UART_FLAG_RWU USART_ISR_RWU /!< Receive Wake Up from mute mode Flag /
Kojto	119:aae6fcc7d9bb	431	#define UART_FLAG_SBKF USART_ISR_SBKF /!< Send Break Flag /
Kojto	119:aae6fcc7d9bb	432	#define UART_FLAG_CMF USART_ISR_CMF /!< Character Match Flag /
Kojto	119:aae6fcc7d9bb	433	#define UART_FLAG_BUSY USART_ISR_BUSY /!< Busy Flag /
Kojto	119:aae6fcc7d9bb	434	#define UART_FLAG_ABRF USART_ISR_ABRF /!< Auto-Baud Rate Flag /
Kojto	119:aae6fcc7d9bb	435	#define UART_FLAG_ABRE USART_ISR_ABRE /!< Auto-Baud Rate Error /
Kojto	119:aae6fcc7d9bb	436	#define UART_FLAG_EOBF USART_ISR_EOBF /!< End Of Block Flag /
Kojto	119:aae6fcc7d9bb	437	#define UART_FLAG_RTOF USART_ISR_RTOF /!< Receiver Time Out /
Kojto	119:aae6fcc7d9bb	438	#define UART_FLAG_CTS USART_ISR_CTS /!< CTS flag /
Kojto	119:aae6fcc7d9bb	439	#define UART_FLAG_CTSIF USART_ISR_CTSIF /!< CTS interrupt flag /
Kojto	119:aae6fcc7d9bb	440	#define UART_FLAG_LBDF USART_ISR_LBDF /!< LIN Break Detection Flag /
Kojto	119:aae6fcc7d9bb	441	#define UART_FLAG_TXE USART_ISR_TXE /!< Transmit Data Register Empty /
Kojto	119:aae6fcc7d9bb	442	#define UART_FLAG_TC USART_ISR_TC /!< Transmission Complete /
Kojto	119:aae6fcc7d9bb	443	#define UART_FLAG_RXNE USART_ISR_RXNE /!< Read Data Register Not Empty /
Kojto	119:aae6fcc7d9bb	444	#define UART_FLAG_IDLE USART_ISR_IDLE /!< IDLE line detected /
Kojto	119:aae6fcc7d9bb	445	#define UART_FLAG_ORE USART_ISR_ORE /!< OverRun Error /
Kojto	119:aae6fcc7d9bb	446	#define UART_FLAG_NE USART_ISR_NE /!< Noise detected Flag /
Kojto	119:aae6fcc7d9bb	447	#define UART_FLAG_FE USART_ISR_FE /!< Framing Error /
Kojto	119:aae6fcc7d9bb	448	#define UART_FLAG_PE USART_ISR_PE /!< Parity Error /
bogdanm	84:0b3ab51c8877	449	/**
bogdanm	84:0b3ab51c8877	450	* @}
bogdanm	84:0b3ab51c8877	451	*/
bogdanm	84:0b3ab51c8877	452
Kojto	96:487b796308b0	453	/** @defgroup UART_Interrupt_definition UART interrupt definition
Kojto	96:487b796308b0	454	* Elements values convention: 000ZZZZZ0XXYYYYYb
bogdanm	84:0b3ab51c8877	455	* - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm	84:0b3ab51c8877	456	* - XX : Interrupt source register (2bits)
bogdanm	84:0b3ab51c8877	457	* - 01: CR1 register
bogdanm	84:0b3ab51c8877	458	* - 10: CR2 register
bogdanm	84:0b3ab51c8877	459	* - 11: CR3 register
Kojto	96:487b796308b0	460	* - ZZZZZ : Flag position in the ISR register(5bits)
bogdanm	84:0b3ab51c8877	461	* @{
bogdanm	84:0b3ab51c8877	462	*/
bogdanm	84:0b3ab51c8877	463	#define UART_IT_PE ((uint32_t)0x0028)
bogdanm	84:0b3ab51c8877	464	#define UART_IT_TXE ((uint32_t)0x0727)
bogdanm	84:0b3ab51c8877	465	#define UART_IT_TC ((uint32_t)0x0626)
bogdanm	84:0b3ab51c8877	466	#define UART_IT_RXNE ((uint32_t)0x0525)
bogdanm	84:0b3ab51c8877	467	#define UART_IT_IDLE ((uint32_t)0x0424)
bogdanm	84:0b3ab51c8877	468	#define UART_IT_LBD ((uint32_t)0x0846)
bogdanm	84:0b3ab51c8877	469	#define UART_IT_CTS ((uint32_t)0x096A)
Kojto	96:487b796308b0	470	#define UART_IT_CM ((uint32_t)0x112E)
bogdanm	84:0b3ab51c8877	471	#define UART_IT_WUF ((uint32_t)0x1476)
bogdanm	84:0b3ab51c8877	472
bogdanm	84:0b3ab51c8877	473	/** Elements values convention: 000000000XXYYYYYb
bogdanm	84:0b3ab51c8877	474	* - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm	84:0b3ab51c8877	475	* - XX : Interrupt source register (2bits)
bogdanm	84:0b3ab51c8877	476	* - 01: CR1 register
bogdanm	84:0b3ab51c8877	477	* - 10: CR2 register
bogdanm	84:0b3ab51c8877	478	* - 11: CR3 register
bogdanm	84:0b3ab51c8877	479	*/
bogdanm	84:0b3ab51c8877	480	#define UART_IT_ERR ((uint32_t)0x0060)
bogdanm	84:0b3ab51c8877	481
bogdanm	84:0b3ab51c8877	482	/** Elements values convention: 0000ZZZZ00000000b
bogdanm	84:0b3ab51c8877	483	* - ZZZZ : Flag position in the ISR register(4bits)
bogdanm	84:0b3ab51c8877	484	*/
bogdanm	84:0b3ab51c8877	485	#define UART_IT_ORE ((uint32_t)0x0300)
bogdanm	84:0b3ab51c8877	486	#define UART_IT_NE ((uint32_t)0x0200)
bogdanm	84:0b3ab51c8877	487	#define UART_IT_FE ((uint32_t)0x0100)
bogdanm	84:0b3ab51c8877	488	/**
bogdanm	84:0b3ab51c8877	489	* @}
bogdanm	84:0b3ab51c8877	490	*/
bogdanm	84:0b3ab51c8877	491
Kojto	96:487b796308b0	492	/** @defgroup UART_IT_CLEAR_Flags UART interrupt clear flags definition
bogdanm	84:0b3ab51c8877	493	* @{
bogdanm	84:0b3ab51c8877	494	*/
bogdanm	84:0b3ab51c8877	495	#define UART_CLEAR_PEF USART_ICR_PECF /!< Parity Error Clear Flag /
bogdanm	84:0b3ab51c8877	496	#define UART_CLEAR_FEF USART_ICR_FECF /!< Framing Error Clear Flag /
bogdanm	84:0b3ab51c8877	497	#define UART_CLEAR_NEF USART_ICR_NCF /!< Noise detected Clear Flag /
bogdanm	84:0b3ab51c8877	498	#define UART_CLEAR_OREF USART_ICR_ORECF /!< OverRun Error Clear Flag /
bogdanm	84:0b3ab51c8877	499	#define UART_CLEAR_IDLEF USART_ICR_IDLECF /!< IDLE line detected Clear Flag /
bogdanm	84:0b3ab51c8877	500	#define UART_CLEAR_TCF USART_ICR_TCCF /!< Transmission Complete Clear Flag /
bogdanm	84:0b3ab51c8877	501	#define UART_CLEAR_LBDF USART_ICR_LBDCF /!< LIN Break Detection Clear Flag /
bogdanm	84:0b3ab51c8877	502	#define UART_CLEAR_CTSF USART_ICR_CTSCF /!< CTS Interrupt Clear Flag /
bogdanm	84:0b3ab51c8877	503	#define UART_CLEAR_RTOF USART_ICR_RTOCF /!< Receiver Time Out Clear Flag /
bogdanm	84:0b3ab51c8877	504	#define UART_CLEAR_EOBF USART_ICR_EOBCF /!< End Of Block Clear Flag /
bogdanm	84:0b3ab51c8877	505	#define UART_CLEAR_CMF USART_ICR_CMCF /!< Character Match Clear Flag /
bogdanm	84:0b3ab51c8877	506	#define UART_CLEAR_WUF USART_ICR_WUCF /!< Wake Up from stop mode Clear Flag /
bogdanm	84:0b3ab51c8877	507	/**
bogdanm	84:0b3ab51c8877	508	* @}
bogdanm	84:0b3ab51c8877	509	*/
bogdanm	84:0b3ab51c8877	510
Kojto	96:487b796308b0	511	/** @defgroup UART_Request_Parameters UART request parameter definition
bogdanm	84:0b3ab51c8877	512	* @{
bogdanm	84:0b3ab51c8877	513	*/
bogdanm	84:0b3ab51c8877	514	#define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /!< Auto-Baud Rate Request /
bogdanm	84:0b3ab51c8877	515	#define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /!< Send Break Request /
bogdanm	84:0b3ab51c8877	516	#define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /!< Mute Mode Request /
bogdanm	84:0b3ab51c8877	517	#define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /!< Receive Data flush Request /
bogdanm	84:0b3ab51c8877	518	#define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /!< Transmit data flush Request /
bogdanm	84:0b3ab51c8877	519	#define IS_UART_REQUEST_PARAMETER(PARAM) (((PARAM) == UART_AUTOBAUD_REQUEST) \|\| \
bogdanm	84:0b3ab51c8877	520	((PARAM) == UART_SENDBREAK_REQUEST) \|\| \
bogdanm	84:0b3ab51c8877	521	((PARAM) == UART_MUTE_MODE_REQUEST) \|\| \
bogdanm	84:0b3ab51c8877	522	((PARAM) == UART_RXDATA_FLUSH_REQUEST) \|\| \
bogdanm	84:0b3ab51c8877	523	((PARAM) == UART_TXDATA_FLUSH_REQUEST))
bogdanm	84:0b3ab51c8877	524	/**
bogdanm	84:0b3ab51c8877	525	* @}
bogdanm	84:0b3ab51c8877	526	*/
bogdanm	84:0b3ab51c8877	527
Kojto	96:487b796308b0	528	/** @defgroup UART_Advanced_Features_Initialization_Type UART advanced features initialization type definition
bogdanm	84:0b3ab51c8877	529	* @{
bogdanm	84:0b3ab51c8877	530	*/
bogdanm	84:0b3ab51c8877	531	#define UART_ADVFEATURE_NO_INIT ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	532	#define UART_ADVFEATURE_TXINVERT_INIT ((uint32_t)0x00000001)
bogdanm	84:0b3ab51c8877	533	#define UART_ADVFEATURE_RXINVERT_INIT ((uint32_t)0x00000002)
bogdanm	84:0b3ab51c8877	534	#define UART_ADVFEATURE_DATAINVERT_INIT ((uint32_t)0x00000004)
bogdanm	84:0b3ab51c8877	535	#define UART_ADVFEATURE_SWAP_INIT ((uint32_t)0x00000008)
bogdanm	84:0b3ab51c8877	536	#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT ((uint32_t)0x00000010)
bogdanm	84:0b3ab51c8877	537	#define UART_ADVFEATURE_DMADISABLEONERROR_INIT ((uint32_t)0x00000020)
bogdanm	84:0b3ab51c8877	538	#define UART_ADVFEATURE_AUTOBAUDRATE_INIT ((uint32_t)0x00000040)
bogdanm	84:0b3ab51c8877	539	#define UART_ADVFEATURE_MSBFIRST_INIT ((uint32_t)0x00000080)
bogdanm	84:0b3ab51c8877	540	#define IS_UART_ADVFEATURE_INIT(INIT) ((INIT) <= (UART_ADVFEATURE_NO_INIT \| \
bogdanm	84:0b3ab51c8877	541	UART_ADVFEATURE_TXINVERT_INIT \| \
bogdanm	84:0b3ab51c8877	542	UART_ADVFEATURE_RXINVERT_INIT \| \
bogdanm	84:0b3ab51c8877	543	UART_ADVFEATURE_DATAINVERT_INIT \| \
bogdanm	84:0b3ab51c8877	544	UART_ADVFEATURE_SWAP_INIT \| \
bogdanm	84:0b3ab51c8877	545	UART_ADVFEATURE_RXOVERRUNDISABLE_INIT \| \
bogdanm	84:0b3ab51c8877	546	UART_ADVFEATURE_DMADISABLEONERROR_INIT \| \
bogdanm	84:0b3ab51c8877	547	UART_ADVFEATURE_AUTOBAUDRATE_INIT \| \
bogdanm	84:0b3ab51c8877	548	UART_ADVFEATURE_MSBFIRST_INIT))
bogdanm	84:0b3ab51c8877	549	/**
bogdanm	84:0b3ab51c8877	550	* @}
bogdanm	84:0b3ab51c8877	551	*/
bogdanm	84:0b3ab51c8877	552
Kojto	96:487b796308b0	553	/** @defgroup UART_Tx_Inv UART advanced Tx inv activation definition
bogdanm	84:0b3ab51c8877	554	* @{
bogdanm	84:0b3ab51c8877	555	*/
bogdanm	84:0b3ab51c8877	556	#define UART_ADVFEATURE_TXINV_DISABLE ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	557	#define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV)
bogdanm	84:0b3ab51c8877	558	#define IS_UART_ADVFEATURE_TXINV(TXINV) (((TXINV) == UART_ADVFEATURE_TXINV_DISABLE) \|\| \
bogdanm	84:0b3ab51c8877	559	((TXINV) == UART_ADVFEATURE_TXINV_ENABLE))
bogdanm	84:0b3ab51c8877	560	/**
bogdanm	84:0b3ab51c8877	561	* @}
bogdanm	84:0b3ab51c8877	562	*/
bogdanm	84:0b3ab51c8877	563
Kojto	96:487b796308b0	564	/** @defgroup UART_Rx_Inv UART advanced Rx inv activation definition
bogdanm	84:0b3ab51c8877	565	* @{
bogdanm	84:0b3ab51c8877	566	*/
bogdanm	84:0b3ab51c8877	567	#define UART_ADVFEATURE_RXINV_DISABLE ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	568	#define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV)
bogdanm	84:0b3ab51c8877	569	#define IS_UART_ADVFEATURE_RXINV(RXINV) (((RXINV) == UART_ADVFEATURE_RXINV_DISABLE) \|\| \
bogdanm	84:0b3ab51c8877	570	((RXINV) == UART_ADVFEATURE_RXINV_ENABLE))
bogdanm	84:0b3ab51c8877	571	/**
bogdanm	84:0b3ab51c8877	572	* @}
bogdanm	84:0b3ab51c8877	573	*/
bogdanm	84:0b3ab51c8877	574
Kojto	96:487b796308b0	575	/** @defgroup UART_Data_Inv UART advanced data inv activation definition
bogdanm	84:0b3ab51c8877	576	* @{
bogdanm	84:0b3ab51c8877	577	*/
bogdanm	84:0b3ab51c8877	578	#define UART_ADVFEATURE_DATAINV_DISABLE ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	579	#define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV)
bogdanm	84:0b3ab51c8877	580	#define IS_UART_ADVFEATURE_DATAINV(DATAINV) (((DATAINV) == UART_ADVFEATURE_DATAINV_DISABLE) \|\| \
bogdanm	84:0b3ab51c8877	581	((DATAINV) == UART_ADVFEATURE_DATAINV_ENABLE))
bogdanm	84:0b3ab51c8877	582	/**
bogdanm	84:0b3ab51c8877	583	* @}
bogdanm	84:0b3ab51c8877	584	*/
bogdanm	84:0b3ab51c8877	585
Kojto	96:487b796308b0	586	/** @defgroup UART_Rx_Tx_Swap UART advanced swap activation definition
bogdanm	84:0b3ab51c8877	587	* @{
bogdanm	84:0b3ab51c8877	588	*/
bogdanm	84:0b3ab51c8877	589	#define UART_ADVFEATURE_SWAP_DISABLE ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	590	#define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP)
bogdanm	84:0b3ab51c8877	591	#define IS_UART_ADVFEATURE_SWAP(SWAP) (((SWAP) == UART_ADVFEATURE_SWAP_DISABLE) \|\| \
bogdanm	84:0b3ab51c8877	592	((SWAP) == UART_ADVFEATURE_SWAP_ENABLE))
bogdanm	84:0b3ab51c8877	593	/**
bogdanm	84:0b3ab51c8877	594	* @}
bogdanm	84:0b3ab51c8877	595	*/
bogdanm	84:0b3ab51c8877	596
Kojto	96:487b796308b0	597	/** @defgroup UART_Overrun_Disable UART advanced overrun activation definition
bogdanm	84:0b3ab51c8877	598	* @{
bogdanm	84:0b3ab51c8877	599	*/
bogdanm	84:0b3ab51c8877	600	#define UART_ADVFEATURE_OVERRUN_ENABLE ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	601	#define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS)
bogdanm	84:0b3ab51c8877	602	#define IS_UART_OVERRUN(OVERRUN) (((OVERRUN) == UART_ADVFEATURE_OVERRUN_ENABLE) \|\| \
bogdanm	84:0b3ab51c8877	603	((OVERRUN) == UART_ADVFEATURE_OVERRUN_DISABLE))
bogdanm	84:0b3ab51c8877	604	/**
bogdanm	84:0b3ab51c8877	605	* @}
bogdanm	84:0b3ab51c8877	606	*/
bogdanm	84:0b3ab51c8877	607
Kojto	96:487b796308b0	608	/** @defgroup UART_AutoBaudRate_Enable UART advanced auto baud rate activation definition
bogdanm	84:0b3ab51c8877	609	* @{
bogdanm	84:0b3ab51c8877	610	*/
bogdanm	84:0b3ab51c8877	611	#define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	612	#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN)
bogdanm	84:0b3ab51c8877	613	#define IS_UART_ADVFEATURE_AUTOBAUDRATE(AUTOBAUDRATE) (((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) \|\| \
bogdanm	84:0b3ab51c8877	614	((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
bogdanm	84:0b3ab51c8877	615	/**
bogdanm	84:0b3ab51c8877	616	* @}
bogdanm	84:0b3ab51c8877	617	*/
bogdanm	84:0b3ab51c8877	618
Kojto	96:487b796308b0	619	/** @defgroup UART_DMA_Disable_on_Rx_Error UART advanced DMA on Rx error activation definition
bogdanm	84:0b3ab51c8877	620	* @{
bogdanm	84:0b3ab51c8877	621	*/
bogdanm	84:0b3ab51c8877	622	#define UART_ADVFEATURE_DMA_ENABLEONRXERROR ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	623	#define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE)
bogdanm	84:0b3ab51c8877	624	#define IS_UART_ADVFEATURE_DMAONRXERROR(DMA) (((DMA) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) \|\| \
bogdanm	84:0b3ab51c8877	625	((DMA) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
bogdanm	84:0b3ab51c8877	626	/**
bogdanm	84:0b3ab51c8877	627	* @}
bogdanm	84:0b3ab51c8877	628	*/
bogdanm	84:0b3ab51c8877	629
Kojto	96:487b796308b0	630	/** @defgroup UART_MSB_First UART advanced MSB first activation definition
bogdanm	84:0b3ab51c8877	631	* @{
bogdanm	84:0b3ab51c8877	632	*/
bogdanm	84:0b3ab51c8877	633	#define UART_ADVFEATURE_MSBFIRST_DISABLE ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	634	#define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST)
bogdanm	84:0b3ab51c8877	635	#define IS_UART_ADVFEATURE_MSBFIRST(MSBFIRST) (((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_DISABLE) \|\| \
bogdanm	84:0b3ab51c8877	636	((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_ENABLE))
bogdanm	84:0b3ab51c8877	637	/**
bogdanm	84:0b3ab51c8877	638	* @}
bogdanm	84:0b3ab51c8877	639	*/
bogdanm	84:0b3ab51c8877	640
Kojto	96:487b796308b0	641	/** @defgroup UART_Stop_Mode_Enable UART advanced stop mode activation definition
bogdanm	84:0b3ab51c8877	642	* @{
bogdanm	84:0b3ab51c8877	643	*/
bogdanm	84:0b3ab51c8877	644	#define UART_ADVFEATURE_STOPMODE_DISABLE ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	645	#define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM)
bogdanm	84:0b3ab51c8877	646	#define IS_UART_ADVFEATURE_STOPMODE(STOPMODE) (((STOPMODE) == UART_ADVFEATURE_STOPMODE_DISABLE) \|\| \
bogdanm	84:0b3ab51c8877	647	((STOPMODE) == UART_ADVFEATURE_STOPMODE_ENABLE))
bogdanm	84:0b3ab51c8877	648	/**
bogdanm	84:0b3ab51c8877	649	* @}
bogdanm	84:0b3ab51c8877	650	*/
bogdanm	84:0b3ab51c8877	651
Kojto	96:487b796308b0	652	/** @defgroup UART_Mute_Mode UART advanced mute mode activation definition
bogdanm	84:0b3ab51c8877	653	* @{
bogdanm	84:0b3ab51c8877	654	*/
bogdanm	84:0b3ab51c8877	655	#define UART_ADVFEATURE_MUTEMODE_DISABLE ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	656	#define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME)
bogdanm	84:0b3ab51c8877	657	#define IS_UART_MUTE_MODE(MUTE) (((MUTE) == UART_ADVFEATURE_MUTEMODE_DISABLE) \|\| \
bogdanm	84:0b3ab51c8877	658	((MUTE) == UART_ADVFEATURE_MUTEMODE_ENABLE))
bogdanm	84:0b3ab51c8877	659	/**
bogdanm	84:0b3ab51c8877	660	* @}
bogdanm	84:0b3ab51c8877	661	*/
bogdanm	84:0b3ab51c8877	662
Kojto	96:487b796308b0	663	/** @defgroup UART_CR2_ADDRESS_LSBPOS UART CR2 address lsb position definition
bogdanm	84:0b3ab51c8877	664	* @{
bogdanm	84:0b3ab51c8877	665	*/
bogdanm	84:0b3ab51c8877	666	#define UART_CR2_ADDRESS_LSB_POS ((uint32_t) 24)
bogdanm	84:0b3ab51c8877	667	/**
bogdanm	84:0b3ab51c8877	668	* @}
bogdanm	84:0b3ab51c8877	669	*/
bogdanm	84:0b3ab51c8877	670
Kojto	96:487b796308b0	671	/** @defgroup UART_WakeUp_from_Stop_Selection UART wake up mode selection definition
bogdanm	84:0b3ab51c8877	672	* @{
bogdanm	84:0b3ab51c8877	673	*/
bogdanm	84:0b3ab51c8877	674	#define UART_WAKEUP_ON_ADDRESS ((uint32_t)0x0000)
bogdanm	84:0b3ab51c8877	675	#define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1)
bogdanm	84:0b3ab51c8877	676	#define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS)
bogdanm	84:0b3ab51c8877	677	#define IS_UART_WAKEUP_SELECTION(WAKE) (((WAKE) == UART_WAKEUP_ON_ADDRESS) \|\| \
bogdanm	84:0b3ab51c8877	678	((WAKE) == UART_WAKEUP_ON_STARTBIT) \|\| \
bogdanm	84:0b3ab51c8877	679	((WAKE) == UART_WAKEUP_ON_READDATA_NONEMPTY))
bogdanm	84:0b3ab51c8877	680	/**
bogdanm	84:0b3ab51c8877	681	* @}
bogdanm	84:0b3ab51c8877	682	*/
bogdanm	84:0b3ab51c8877	683
Kojto	96:487b796308b0	684	/** @defgroup UART_DriverEnable_Polarity UART driver polarity level definition
bogdanm	84:0b3ab51c8877	685	* @{
bogdanm	84:0b3ab51c8877	686	*/
bogdanm	84:0b3ab51c8877	687	#define UART_DE_POLARITY_HIGH ((uint32_t)0x00000000)
bogdanm	84:0b3ab51c8877	688	#define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP)
bogdanm	84:0b3ab51c8877	689	#define IS_UART_DE_POLARITY(POLARITY) (((POLARITY) == UART_DE_POLARITY_HIGH) \|\| \
bogdanm	84:0b3ab51c8877	690	((POLARITY) == UART_DE_POLARITY_LOW))
bogdanm	84:0b3ab51c8877	691	/**
bogdanm	84:0b3ab51c8877	692	* @}
bogdanm	84:0b3ab51c8877	693	*/
bogdanm	84:0b3ab51c8877	694
Kojto	96:487b796308b0	695	/** @defgroup UART_CR1_DEAT_ADDRESS_LSBPOS UART CR1 DEAT address lsb position definition
bogdanm	84:0b3ab51c8877	696	* @{
bogdanm	84:0b3ab51c8877	697	*/
bogdanm	84:0b3ab51c8877	698	#define UART_CR1_DEAT_ADDRESS_LSB_POS ((uint32_t) 21)
bogdanm	84:0b3ab51c8877	699	/**
bogdanm	84:0b3ab51c8877	700	* @}
bogdanm	84:0b3ab51c8877	701	*/
bogdanm	84:0b3ab51c8877	702
Kojto	96:487b796308b0	703	/** @defgroup UART_CR1_DEDT_ADDRESS_LSBPOS UART CR1 DEDT address lsb position definition
bogdanm	84:0b3ab51c8877	704	* @{
bogdanm	84:0b3ab51c8877	705	*/
bogdanm	84:0b3ab51c8877	706	#define UART_CR1_DEDT_ADDRESS_LSB_POS ((uint32_t) 16)
bogdanm	84:0b3ab51c8877	707	/**
bogdanm	84:0b3ab51c8877	708	* @}
bogdanm	84:0b3ab51c8877	709	*/
bogdanm	84:0b3ab51c8877	710
Kojto	96:487b796308b0	711	/** @defgroup UART_Interruption_Mask UART interruption mask definition
bogdanm	84:0b3ab51c8877	712	* @{
bogdanm	84:0b3ab51c8877	713	*/
bogdanm	84:0b3ab51c8877	714	#define UART_IT_MASK ((uint32_t)0x001F)
bogdanm	84:0b3ab51c8877	715	/**
bogdanm	84:0b3ab51c8877	716	* @}
bogdanm	84:0b3ab51c8877	717	*/
bogdanm	84:0b3ab51c8877	718
bogdanm	84:0b3ab51c8877	719	/**
bogdanm	84:0b3ab51c8877	720	* @}
bogdanm	84:0b3ab51c8877	721	*/
bogdanm	84:0b3ab51c8877	722
bogdanm	84:0b3ab51c8877	723	/* Exported macro ------------------------------------------------------------*/
Kojto	96:487b796308b0	724	/** @defgroup UART_Exported_Macros UART Exported Macros
bogdanm	84:0b3ab51c8877	725	* @{
bogdanm	84:0b3ab51c8877	726	*/
bogdanm	84:0b3ab51c8877	727
bogdanm	84:0b3ab51c8877	728	/** @brief Reset UART handle state
bogdanm	84:0b3ab51c8877	729	* @param __HANDLE__: specifies the UART Handle.
bogdanm	84:0b3ab51c8877	730	* The Handle Instance which can be USART1, USART2 or LPUART.
bogdanm	84:0b3ab51c8877	731	* @retval None
bogdanm	84:0b3ab51c8877	732	*/
bogdanm	84:0b3ab51c8877	733	#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_UART_STATE_RESET)
bogdanm	84:0b3ab51c8877	734
Kojto	96:487b796308b0	735	/** @brief Flush the UART Data registers
Kojto	96:487b796308b0	736	* @param __HANDLE__: specifies the UART Handle.
Kojto	96:487b796308b0	737	*/
Kojto	96:487b796308b0	738	#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
Kojto	96:487b796308b0	739	do{ \
Kojto	96:487b796308b0	740	SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
Kojto	96:487b796308b0	741	SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
Kojto	96:487b796308b0	742	} while(0)
Kojto	96:487b796308b0	743
Kojto	96:487b796308b0	744
Kojto	96:487b796308b0	745	/** @brief Clears the specified UART pending flag.
Kojto	96:487b796308b0	746	* @param __HANDLE__: specifies the UART Handle.
Kojto	96:487b796308b0	747	* @param __FLAG__: specifies the flag to check.
Kojto	96:487b796308b0	748	* This parameter can be any combination of the following values:
Kojto	96:487b796308b0	749	* @arg UART_CLEAR_PEF
Kojto	96:487b796308b0	750	* @arg UART_CLEAR_FEF
Kojto	96:487b796308b0	751	* @arg UART_CLEAR_NEF
Kojto	96:487b796308b0	752	* @arg UART_CLEAR_OREF
Kojto	96:487b796308b0	753	* @arg UART_CLEAR_IDLEF
Kojto	96:487b796308b0	754	* @arg UART_CLEAR_TCF
Kojto	96:487b796308b0	755	* @arg UART_CLEAR_LBDF
Kojto	96:487b796308b0	756	* @arg UART_CLEAR_CTSF
Kojto	96:487b796308b0	757	* @arg UART_CLEAR_RTOF
Kojto	96:487b796308b0	758	* @arg UART_CLEAR_EOBF
Kojto	96:487b796308b0	759	* @arg UART_CLEAR_CMF
Kojto	96:487b796308b0	760	* @arg UART_CLEAR_WUF
Kojto	96:487b796308b0	761	* @retval None
Kojto	96:487b796308b0	762	*/
Kojto	119:aae6fcc7d9bb	763	#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
Kojto	119:aae6fcc7d9bb	764
Kojto	96:487b796308b0	765
Kojto	96:487b796308b0	766	/** @brief Clear the UART PE pending flag.
Kojto	96:487b796308b0	767	* @param __HANDLE__: specifies the UART Handle.
Kojto	96:487b796308b0	768	* @retval None
Kojto	96:487b796308b0	769	*/
Kojto	96:487b796308b0	770	#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_PEF)
Kojto	96:487b796308b0	771
Kojto	96:487b796308b0	772	/** @brief Clear the UART FE pending flag.
Kojto	96:487b796308b0	773	* @param __HANDLE__: specifies the UART Handle.
Kojto	96:487b796308b0	774	* @retval None
Kojto	96:487b796308b0	775	*/
Kojto	96:487b796308b0	776	#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_FEF)
Kojto	96:487b796308b0	777
Kojto	96:487b796308b0	778	/** @brief Clear the UART NE pending flag.
Kojto	96:487b796308b0	779	* @param __HANDLE__: specifies the UART Handle.
Kojto	96:487b796308b0	780	* @retval None
Kojto	96:487b796308b0	781	*/
Kojto	96:487b796308b0	782	#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_NEF)
Kojto	96:487b796308b0	783
Kojto	96:487b796308b0	784	/** @brief Clear the UART ORE pending flag.
Kojto	96:487b796308b0	785	* @param __HANDLE__: specifies the UART Handle.
Kojto	96:487b796308b0	786	* @retval None
Kojto	96:487b796308b0	787	*/
Kojto	96:487b796308b0	788	#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_OREF)
Kojto	96:487b796308b0	789
Kojto	96:487b796308b0	790	/** @brief Clear the UART IDLE pending flag.
Kojto	96:487b796308b0	791	* @param __HANDLE__: specifies the UART Handle.
Kojto	96:487b796308b0	792	* @retval None
Kojto	96:487b796308b0	793	*/
Kojto	96:487b796308b0	794	#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_IDLEF)
Kojto	96:487b796308b0	795
bogdanm	84:0b3ab51c8877	796	/** @brief Checks whether the specified UART flag is set or not.
bogdanm	84:0b3ab51c8877	797	* @param __HANDLE__: specifies the UART Handle.
bogdanm	84:0b3ab51c8877	798	* This parameter can be USART1, USART2 or LPUART.
bogdanm	84:0b3ab51c8877	799	* @param __FLAG__: specifies the flag to check.
bogdanm	84:0b3ab51c8877	800	* This parameter can be one of the following values:
bogdanm	84:0b3ab51c8877	801	* @arg UART_FLAG_REACK: Receive enable ackowledge flag
bogdanm	84:0b3ab51c8877	802	* @arg UART_FLAG_TEACK: Transmit enable ackowledge flag
bogdanm	84:0b3ab51c8877	803	* @arg UART_FLAG_WUF: Wake up from stop mode flag
bogdanm	84:0b3ab51c8877	804	* @arg UART_FLAG_RWU: Receiver wake up flag (is the UART in mute mode)
bogdanm	84:0b3ab51c8877	805	* @arg UART_FLAG_SBKF: Send Break flag
bogdanm	84:0b3ab51c8877	806	* @arg UART_FLAG_CMF: Character match flag
bogdanm	84:0b3ab51c8877	807	* @arg UART_FLAG_BUSY: Busy flag
bogdanm	84:0b3ab51c8877	808	* @arg UART_FLAG_ABRF: Auto Baud rate detection flag
bogdanm	84:0b3ab51c8877	809	* @arg UART_FLAG_ABRE: Auto Baud rate detection error flag
bogdanm	84:0b3ab51c8877	810	* @arg UART_FLAG_EOBF: End of block flag
bogdanm	84:0b3ab51c8877	811	* @arg UART_FLAG_RTOF: Receiver timeout flag
bogdanm	84:0b3ab51c8877	812	* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
bogdanm	84:0b3ab51c8877	813	* @arg UART_FLAG_LBD: LIN Break detection flag
bogdanm	84:0b3ab51c8877	814	* @arg UART_FLAG_TXE: Transmit data register empty flag
bogdanm	84:0b3ab51c8877	815	* @arg UART_FLAG_TC: Transmission Complete flag
bogdanm	84:0b3ab51c8877	816	* @arg UART_FLAG_RXNE: Receive data register not empty flag
bogdanm	84:0b3ab51c8877	817	* @arg UART_FLAG_IDLE: Idle Line detection flag
bogdanm	84:0b3ab51c8877	818	* @arg UART_FLAG_ORE: OverRun Error flag
bogdanm	84:0b3ab51c8877	819	* @arg UART_FLAG_NE: Noise Error flag
bogdanm	84:0b3ab51c8877	820	* @arg UART_FLAG_FE: Framing Error flag
bogdanm	84:0b3ab51c8877	821	* @arg UART_FLAG_PE: Parity Error flag
bogdanm	84:0b3ab51c8877	822	* @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm	84:0b3ab51c8877	823	*/
bogdanm	84:0b3ab51c8877	824	#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
bogdanm	84:0b3ab51c8877	825
bogdanm	84:0b3ab51c8877	826	/** @brief Enables the specified UART interrupt.
bogdanm	84:0b3ab51c8877	827	* @param __HANDLE__: specifies the UART Handle.
bogdanm	84:0b3ab51c8877	828	* This parameter can be USART1, USART2 or LPUART.
bogdanm	84:0b3ab51c8877	829	* @param __INTERRUPT__: specifies the UART interrupt source to enable.
bogdanm	84:0b3ab51c8877	830	* This parameter can be one of the following values:
bogdanm	84:0b3ab51c8877	831	* @arg UART_IT_WUF: Wakeup from stop mode interrupt
bogdanm	84:0b3ab51c8877	832	* @arg UART_IT_CM: Character match interrupt
bogdanm	84:0b3ab51c8877	833	* @arg UART_IT_CTS: CTS change interrupt
bogdanm	84:0b3ab51c8877	834	* @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm	84:0b3ab51c8877	835	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm	84:0b3ab51c8877	836	* @arg UART_IT_TC: Transmission complete interrupt
bogdanm	84:0b3ab51c8877	837	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm	84:0b3ab51c8877	838	* @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm	84:0b3ab51c8877	839	* @arg UART_IT_PE: Parity Error interrupt
bogdanm	84:0b3ab51c8877	840	* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm	84:0b3ab51c8877	841	* @retval None
bogdanm	84:0b3ab51c8877	842	*/
bogdanm	84:0b3ab51c8877	843	#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5) == 1)? ((__HANDLE__)->Instance->CR1 \|= (1 << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm	84:0b3ab51c8877	844	((((uint8_t)(__INTERRUPT__)) >> 5) == 2)? ((__HANDLE__)->Instance->CR2 \|= (1 << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm	84:0b3ab51c8877	845	((__HANDLE__)->Instance->CR3 \|= (1 << ((__INTERRUPT__) & UART_IT_MASK))))
bogdanm	84:0b3ab51c8877	846
bogdanm	84:0b3ab51c8877	847	/** @brief Disables the specified UART interrupt.
bogdanm	84:0b3ab51c8877	848	* @param __HANDLE__: specifies the UART Handle.
bogdanm	84:0b3ab51c8877	849	* This parameter can be USART1, USART2 or LPUART.
bogdanm	84:0b3ab51c8877	850	* @param __INTERRUPT__: specifies the UART interrupt source to disable.
bogdanm	84:0b3ab51c8877	851	* This parameter can be one of the following values:
bogdanm	84:0b3ab51c8877	852	* @arg UART_IT_WUF: Wakeup from stop mode interrupt
bogdanm	84:0b3ab51c8877	853	* @arg UART_IT_CM: Character match interrupt
bogdanm	84:0b3ab51c8877	854	* @arg UART_IT_CTS: CTS change interrupt
bogdanm	84:0b3ab51c8877	855	* @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm	84:0b3ab51c8877	856	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm	84:0b3ab51c8877	857	* @arg UART_IT_TC: Transmission complete interrupt
bogdanm	84:0b3ab51c8877	858	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm	84:0b3ab51c8877	859	* @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm	84:0b3ab51c8877	860	* @arg UART_IT_PE: Parity Error interrupt
bogdanm	84:0b3ab51c8877	861	* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm	84:0b3ab51c8877	862	* @retval None
bogdanm	84:0b3ab51c8877	863	*/
bogdanm	84:0b3ab51c8877	864	#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm	84:0b3ab51c8877	865	((((uint8_t)(__INTERRUPT__)) >> 5) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm	84:0b3ab51c8877	866	((__HANDLE__)->Instance->CR3 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & UART_IT_MASK))))
bogdanm	84:0b3ab51c8877	867
bogdanm	84:0b3ab51c8877	868	/** @brief Checks whether the specified UART interrupt has occurred or not.
bogdanm	84:0b3ab51c8877	869	* @param __HANDLE__: specifies the UART Handle.
bogdanm	84:0b3ab51c8877	870	* This parameter can be USART1, USART2 or LPUART.
bogdanm	84:0b3ab51c8877	871	* @param __IT__: specifies the UART interrupt to check.
bogdanm	84:0b3ab51c8877	872	* This parameter can be one of the following values:
bogdanm	84:0b3ab51c8877	873	* @arg UART_IT_WUF: Wakeup from stop mode interrupt
bogdanm	84:0b3ab51c8877	874	* @arg UART_IT_CM: Character match interrupt
bogdanm	84:0b3ab51c8877	875	* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
bogdanm	84:0b3ab51c8877	876	* @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm	84:0b3ab51c8877	877	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm	84:0b3ab51c8877	878	* @arg UART_IT_TC: Transmission complete interrupt
bogdanm	84:0b3ab51c8877	879	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm	84:0b3ab51c8877	880	* @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm	84:0b3ab51c8877	881	* @arg UART_IT_ORE: OverRun Error interrupt
bogdanm	84:0b3ab51c8877	882	* @arg UART_IT_NE: Noise Error interrupt
bogdanm	84:0b3ab51c8877	883	* @arg UART_IT_FE: Framing Error interrupt
bogdanm	84:0b3ab51c8877	884	* @arg UART_IT_PE: Parity Error interrupt
bogdanm	84:0b3ab51c8877	885	* @retval The new state of __IT__ (TRUE or FALSE).
bogdanm	84:0b3ab51c8877	886	*/
bogdanm	84:0b3ab51c8877	887	#define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
bogdanm	84:0b3ab51c8877	888
bogdanm	84:0b3ab51c8877	889	/** @brief Checks whether the specified UART interrupt source is enabled.
bogdanm	84:0b3ab51c8877	890	* @param __HANDLE__: specifies the UART Handle.
bogdanm	84:0b3ab51c8877	891	* This parameter can be USART1, USART2 or LPUART.
bogdanm	84:0b3ab51c8877	892	* @param __IT__: specifies the UART interrupt source to check.
bogdanm	84:0b3ab51c8877	893	* This parameter can be one of the following values:
bogdanm	84:0b3ab51c8877	894	* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
bogdanm	84:0b3ab51c8877	895	* @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm	84:0b3ab51c8877	896	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm	84:0b3ab51c8877	897	* @arg UART_IT_TC: Transmission complete interrupt
bogdanm	84:0b3ab51c8877	898	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm	84:0b3ab51c8877	899	* @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm	84:0b3ab51c8877	900	* @arg UART_IT_ORE: OverRun Error interrupt
bogdanm	84:0b3ab51c8877	901	* @arg UART_IT_NE: Noise Error interrupt
bogdanm	84:0b3ab51c8877	902	* @arg UART_IT_FE: Framing Error interrupt
bogdanm	84:0b3ab51c8877	903	* @arg UART_IT_PE: Parity Error interrupt
bogdanm	84:0b3ab51c8877	904	* @retval The new state of __IT__ (TRUE or FALSE).
bogdanm	84:0b3ab51c8877	905	*/
bogdanm	84:0b3ab51c8877	906	#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5) == 2)? \
bogdanm	84:0b3ab51c8877	907	(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << (((uint16_t)(__IT__)) & UART_IT_MASK)))
bogdanm	84:0b3ab51c8877	908
bogdanm	84:0b3ab51c8877	909	/** @brief Clears the specified UART ISR flag, in setting the proper ICR register flag.
bogdanm	84:0b3ab51c8877	910	* @param __HANDLE__: specifies the UART Handle.
bogdanm	84:0b3ab51c8877	911	* This parameter can be USART1, USART2 or LPUART.
bogdanm	84:0b3ab51c8877	912	* @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
bogdanm	84:0b3ab51c8877	913	* to clear the corresponding interrupt
bogdanm	84:0b3ab51c8877	914	* This parameter can be one of the following values:
bogdanm	84:0b3ab51c8877	915	* @arg UART_CLEAR_PEF: Parity Error Clear Flag
bogdanm	84:0b3ab51c8877	916	* @arg UART_CLEAR_FEF: Framing Error Clear Flag
bogdanm	84:0b3ab51c8877	917	* @arg UART_CLEAR_NEF: Noise detected Clear Flag
bogdanm	84:0b3ab51c8877	918	* @arg UART_CLEAR_OREF: OverRun Error Clear Flag
bogdanm	84:0b3ab51c8877	919	* @arg UART_CLEAR_IDLEF: IDLE line detected Clear Flag
bogdanm	84:0b3ab51c8877	920	* @arg UART_CLEAR_TCF: Transmission Complete Clear Flag
bogdanm	84:0b3ab51c8877	921	* @arg UART_CLEAR_LBDF: LIN Break Detection Clear Flag
bogdanm	84:0b3ab51c8877	922	* @arg UART_CLEAR_CTSF: CTS Interrupt Clear Flag
bogdanm	84:0b3ab51c8877	923	* @arg UART_CLEAR_RTOF: Receiver Time Out Clear Flag
bogdanm	84:0b3ab51c8877	924	* @arg UART_CLEAR_EOBF: End Of Block Clear Flag
bogdanm	84:0b3ab51c8877	925	* @arg UART_CLEAR_CMF: Character Match Clear Flag
bogdanm	84:0b3ab51c8877	926	* @arg UART_CLEAR_WUF: Wake Up from stop mode Clear Flag
bogdanm	84:0b3ab51c8877	927	* @retval None
bogdanm	84:0b3ab51c8877	928	*/
bogdanm	92:4fc01daae5a5	929	#define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
bogdanm	84:0b3ab51c8877	930
bogdanm	84:0b3ab51c8877	931	/** @brief Set a specific UART request flag.
bogdanm	84:0b3ab51c8877	932	* @param __HANDLE__: specifies the UART Handle.
bogdanm	84:0b3ab51c8877	933	* This parameter can be USART1, USART2 or LPUART.
bogdanm	84:0b3ab51c8877	934	* @param __REQ__: specifies the request flag to set
bogdanm	84:0b3ab51c8877	935	* This parameter can be one of the following values:
bogdanm	84:0b3ab51c8877	936	* @arg UART_AUTOBAUD_REQUEST: Auto-Baud Rate Request
bogdanm	84:0b3ab51c8877	937	* @arg UART_SENDBREAK_REQUEST: Send Break Request
bogdanm	84:0b3ab51c8877	938	* @arg UART_MUTE_MODE_REQUEST: Mute Mode Request
bogdanm	84:0b3ab51c8877	939	* @arg UART_RXDATA_FLUSH_REQUEST: Receive Data flush Request
bogdanm	84:0b3ab51c8877	940	* @arg UART_TXDATA_FLUSH_REQUEST: Transmit data flush Request
bogdanm	84:0b3ab51c8877	941	* @retval None
bogdanm	84:0b3ab51c8877	942	*/
Kojto	96:487b796308b0	943	#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR \|= (uint32_t)(__REQ__))
Kojto	96:487b796308b0	944
Kojto	96:487b796308b0	945	/** @brief Enables the UART one bit sample method
Kojto	96:487b796308b0	946	* @param __HANDLE__: specifies the UART Handle.
Kojto	96:487b796308b0	947	* @retval None
Kojto	96:487b796308b0	948	*/
Kojto	96:487b796308b0	949	#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\|= USART_CR3_ONEBIT)
Kojto	96:487b796308b0	950
Kojto	96:487b796308b0	951	/** @brief Disables the UART one bit sample method
Kojto	96:487b796308b0	952	* @param __HANDLE__: specifies the UART Handle.
Kojto	96:487b796308b0	953	* @retval None
Kojto	96:487b796308b0	954	*/
Kojto	96:487b796308b0	955	#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
bogdanm	84:0b3ab51c8877	956
bogdanm	84:0b3ab51c8877	957	/** @brief Enable UART
bogdanm	84:0b3ab51c8877	958	* @param __HANDLE__: specifies the UART Handle.
bogdanm	84:0b3ab51c8877	959	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	84:0b3ab51c8877	960	* @retval None
bogdanm	84:0b3ab51c8877	961	*/
bogdanm	84:0b3ab51c8877	962	#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 \|= USART_CR1_UE)
bogdanm	84:0b3ab51c8877	963
bogdanm	84:0b3ab51c8877	964	/** @brief Disable UART
bogdanm	84:0b3ab51c8877	965	* @param __HANDLE__: specifies the UART Handle.
bogdanm	84:0b3ab51c8877	966	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	84:0b3ab51c8877	967	* @retval None
bogdanm	84:0b3ab51c8877	968	*/
bogdanm	84:0b3ab51c8877	969	#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
bogdanm	84:0b3ab51c8877	970
bogdanm	92:4fc01daae5a5	971	/** @brief Enable CTS flow control
bogdanm	92:4fc01daae5a5	972	* This macro allows to enable CTS hardware flow control for a given UART instance,
bogdanm	92:4fc01daae5a5	973	* without need to call HAL_UART_Init() function.
bogdanm	92:4fc01daae5a5	974	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm	92:4fc01daae5a5	975	* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
bogdanm	92:4fc01daae5a5	976	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm	92:4fc01daae5a5	977	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm	92:4fc01daae5a5	978	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm	92:4fc01daae5a5	979	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm	92:4fc01daae5a5	980	* @param __HANDLE__: specifies the UART Handle.
bogdanm	92:4fc01daae5a5	981	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	92:4fc01daae5a5	982	* @retval None
bogdanm	92:4fc01daae5a5	983	*/
bogdanm	92:4fc01daae5a5	984	#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
bogdanm	92:4fc01daae5a5	985	do{ \
bogdanm	92:4fc01daae5a5	986	SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
bogdanm	92:4fc01daae5a5	987	(__HANDLE__)->Init.HwFlowCtl \|= USART_CR3_CTSE; \
bogdanm	92:4fc01daae5a5	988	} while(0)
bogdanm	92:4fc01daae5a5	989
bogdanm	92:4fc01daae5a5	990	/** @brief Disable CTS flow control
bogdanm	92:4fc01daae5a5	991	* This macro allows to disable CTS hardware flow control for a given UART instance,
bogdanm	92:4fc01daae5a5	992	* without need to call HAL_UART_Init() function.
bogdanm	92:4fc01daae5a5	993	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm	92:4fc01daae5a5	994	* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
bogdanm	92:4fc01daae5a5	995	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm	92:4fc01daae5a5	996	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm	92:4fc01daae5a5	997	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm	92:4fc01daae5a5	998	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm	92:4fc01daae5a5	999	* @param __HANDLE__: specifies the UART Handle.
bogdanm	92:4fc01daae5a5	1000	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	92:4fc01daae5a5	1001	* @retval None
bogdanm	92:4fc01daae5a5	1002	*/
bogdanm	92:4fc01daae5a5	1003	#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
bogdanm	92:4fc01daae5a5	1004	do{ \
bogdanm	92:4fc01daae5a5	1005	CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
bogdanm	92:4fc01daae5a5	1006	(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
bogdanm	92:4fc01daae5a5	1007	} while(0)
bogdanm	92:4fc01daae5a5	1008
bogdanm	92:4fc01daae5a5	1009	/** @brief Enable RTS flow control
bogdanm	92:4fc01daae5a5	1010	* This macro allows to enable RTS hardware flow control for a given UART instance,
bogdanm	92:4fc01daae5a5	1011	* without need to call HAL_UART_Init() function.
bogdanm	92:4fc01daae5a5	1012	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm	92:4fc01daae5a5	1013	* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
bogdanm	92:4fc01daae5a5	1014	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm	92:4fc01daae5a5	1015	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm	92:4fc01daae5a5	1016	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm	92:4fc01daae5a5	1017	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm	92:4fc01daae5a5	1018	* @param __HANDLE__: specifies the UART Handle.
bogdanm	92:4fc01daae5a5	1019	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	92:4fc01daae5a5	1020	* @retval None
bogdanm	92:4fc01daae5a5	1021	*/
bogdanm	92:4fc01daae5a5	1022	#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
bogdanm	92:4fc01daae5a5	1023	do{ \
bogdanm	92:4fc01daae5a5	1024	SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
bogdanm	92:4fc01daae5a5	1025	(__HANDLE__)->Init.HwFlowCtl \|= USART_CR3_RTSE; \
bogdanm	92:4fc01daae5a5	1026	} while(0)
bogdanm	92:4fc01daae5a5	1027
bogdanm	92:4fc01daae5a5	1028	/** @brief Disable RTS flow control
bogdanm	92:4fc01daae5a5	1029	* This macro allows to disable RTS hardware flow control for a given UART instance,
bogdanm	92:4fc01daae5a5	1030	* without need to call HAL_UART_Init() function.
bogdanm	92:4fc01daae5a5	1031	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm	92:4fc01daae5a5	1032	* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
bogdanm	92:4fc01daae5a5	1033	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm	92:4fc01daae5a5	1034	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm	92:4fc01daae5a5	1035	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm	92:4fc01daae5a5	1036	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm	92:4fc01daae5a5	1037	* @param __HANDLE__: specifies the UART Handle.
bogdanm	92:4fc01daae5a5	1038	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	92:4fc01daae5a5	1039	* @retval None
bogdanm	92:4fc01daae5a5	1040	*/
bogdanm	92:4fc01daae5a5	1041	#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
bogdanm	92:4fc01daae5a5	1042	do{ \
bogdanm	92:4fc01daae5a5	1043	CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
bogdanm	92:4fc01daae5a5	1044	(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
bogdanm	92:4fc01daae5a5	1045	} while(0)
bogdanm	92:4fc01daae5a5	1046
Kojto	119:aae6fcc7d9bb	1047	/** @brief macros to enable the UART's one bit sampling method
Kojto	96:487b796308b0	1048	* @param __HANDLE__: specifies the UART Handle.
Kojto	96:487b796308b0	1049	* @retval None
Kojto	96:487b796308b0	1050	*/
Kojto	96:487b796308b0	1051	#define __HAL_UART_ONE_BIT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\|= USART_CR3_ONEBIT)
Kojto	119:aae6fcc7d9bb	1052
Kojto	119:aae6fcc7d9bb	1053	/** @brief macros to disable the UART's one bit sampling method
Kojto	119:aae6fcc7d9bb	1054	* @param __HANDLE__: specifies the UART Handle.
Kojto	119:aae6fcc7d9bb	1055	* @retval None
Kojto	119:aae6fcc7d9bb	1056	*/
Kojto	96:487b796308b0	1057	#define __HAL_UART_ONE_BIT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
Kojto	96:487b796308b0	1058
bogdanm	92:4fc01daae5a5	1059
bogdanm	84:0b3ab51c8877	1060	/** @brief BRR division operation to set BRR register with LPUART
bogdanm	84:0b3ab51c8877	1061	* @param _PCLK_: LPUART clock
bogdanm	84:0b3ab51c8877	1062	* @param _BAUD_: Baud rate set by the user
bogdanm	84:0b3ab51c8877	1063	* @retval Division result
bogdanm	84:0b3ab51c8877	1064	*/
Kojto	119:aae6fcc7d9bb	1065	#define __DIV_LPUART(_PCLK_, _BAUD_) ((uint32_t)(((((uint64_t)_PCLK_)*256.0))/(((uint64_t)_BAUD_))))
Kojto	119:aae6fcc7d9bb	1066
bogdanm	84:0b3ab51c8877	1067	/** @brief BRR division operation to set BRR register in 8-bit oversampling mode
bogdanm	84:0b3ab51c8877	1068	* @param _PCLK_: UART clock
bogdanm	84:0b3ab51c8877	1069	* @param _BAUD_: Baud rate set by the user
bogdanm	84:0b3ab51c8877	1070	* @retval Division result
bogdanm	84:0b3ab51c8877	1071	*/
Kojto	96:487b796308b0	1072	#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*2)/((_BAUD_)))
bogdanm	84:0b3ab51c8877	1073
bogdanm	84:0b3ab51c8877	1074	/** @brief BRR division operation to set BRR register in 16-bit oversampling mode
bogdanm	84:0b3ab51c8877	1075	* @param _PCLK_: UART clock
bogdanm	84:0b3ab51c8877	1076	* @param _BAUD_: Baud rate set by the user
bogdanm	84:0b3ab51c8877	1077	* @retval Division result
bogdanm	84:0b3ab51c8877	1078	*/
Kojto	96:487b796308b0	1079	#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_))/((_BAUD_)))
bogdanm	84:0b3ab51c8877	1080
Kojto	119:aae6fcc7d9bb	1081	/** @brief Check whether or not UART instance is Low Power UART.
Kojto	119:aae6fcc7d9bb	1082	* @param __HANDLE__: specifies the UART Handle.
Kojto	119:aae6fcc7d9bb	1083	* @retval SET (instance is LPUART) or RESET (instance isn't LPUART)
Kojto	119:aae6fcc7d9bb	1084	*/
Kojto	119:aae6fcc7d9bb	1085	#define UART_INSTANCE_LOWPOWER(__HANDLE__) (((__HANDLE__)->Instance == LPUART1) ? SET : RESET )
Kojto	119:aae6fcc7d9bb	1086
bogdanm	84:0b3ab51c8877	1087	/** @brief Check UART Baud rate
bogdanm	84:0b3ab51c8877	1088	* @param BAUDRATE: Baudrate specified by the user
bogdanm	84:0b3ab51c8877	1089	* The maximum Baud Rate is derived from the maximum clock on L0 (i.e. 32 MHz)
bogdanm	84:0b3ab51c8877	1090	* divided by the smallest oversampling used on the USART (i.e. 8)
bogdanm	84:0b3ab51c8877	1091	* @retval Test result (TRUE or FALSE).
bogdanm	84:0b3ab51c8877	1092	*/
bogdanm	84:0b3ab51c8877	1093	#define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 4000001)
bogdanm	84:0b3ab51c8877	1094
bogdanm	84:0b3ab51c8877	1095	/** @brief Check UART byte address
bogdanm	84:0b3ab51c8877	1096	* @param ADDRESS: UART 8-bit address for wake-up process scheme
bogdanm	84:0b3ab51c8877	1097	* @retval Test result (TRUE or FALSE).
bogdanm	84:0b3ab51c8877	1098	*/
bogdanm	84:0b3ab51c8877	1099	#define IS_UART_7B_ADDRESS(ADDRESS) ((ADDRESS) <= 0x7F)
bogdanm	84:0b3ab51c8877	1100
bogdanm	84:0b3ab51c8877	1101	/** @brief Check UART 4-bit address
bogdanm	84:0b3ab51c8877	1102	* @param ADDRESS: UART 4-bit address for wake-up process scheme
bogdanm	84:0b3ab51c8877	1103	* @retval Test result (TRUE or FALSE).
bogdanm	84:0b3ab51c8877	1104	*/
bogdanm	84:0b3ab51c8877	1105	#define IS_UART_4B_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
bogdanm	84:0b3ab51c8877	1106
bogdanm	84:0b3ab51c8877	1107	/** @brief Check UART assertion time
bogdanm	84:0b3ab51c8877	1108	* @param TIME: 5-bit value assertion time
bogdanm	84:0b3ab51c8877	1109	* @retval Test result (TRUE or FALSE).
bogdanm	84:0b3ab51c8877	1110	*/
bogdanm	84:0b3ab51c8877	1111	#define IS_UART_ASSERTIONTIME(TIME) ((TIME) <= 0x1F)
bogdanm	84:0b3ab51c8877	1112
bogdanm	84:0b3ab51c8877	1113	/** @brief Check UART deassertion time
bogdanm	84:0b3ab51c8877	1114	* @param TIME: 5-bit value deassertion time
bogdanm	84:0b3ab51c8877	1115	* @retval Test result (TRUE or FALSE).
bogdanm	84:0b3ab51c8877	1116	*/
bogdanm	84:0b3ab51c8877	1117	#define IS_UART_DEASSERTIONTIME(TIME) ((TIME) <= 0x1F)
bogdanm	84:0b3ab51c8877	1118
bogdanm	84:0b3ab51c8877	1119	/**
bogdanm	84:0b3ab51c8877	1120	* @}
bogdanm	84:0b3ab51c8877	1121	*/
bogdanm	84:0b3ab51c8877	1122	/* Include UART HAL Extension module */
bogdanm	84:0b3ab51c8877	1123	#include "stm32l0xx_hal_uart_ex.h"
Kojto	96:487b796308b0	1124
Kojto	96:487b796308b0	1125	/******************************************************************************/
bogdanm	84:0b3ab51c8877	1126	/* Exported functions --------------------------------------------------------*/
Kojto	96:487b796308b0	1127	/******************************************************************************/
Kojto	96:487b796308b0	1128
Kojto	96:487b796308b0	1129	/* Exported functions --------------------------------------------------------*/
Kojto	96:487b796308b0	1130	/** @defgroup UART_Exported_Functions UART Exported Functions
Kojto	96:487b796308b0	1131	* @{
Kojto	96:487b796308b0	1132	*/
bogdanm	84:0b3ab51c8877	1133	/* Initialization/de-initialization functions ********************************/
Kojto	96:487b796308b0	1134	/** @defgroup UART_Exported_Functions_Group1 Initialization/de-initialization methods
Kojto	96:487b796308b0	1135	* @{
Kojto	96:487b796308b0	1136	*/
bogdanm	84:0b3ab51c8877	1137	HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1138	HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1139	HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
bogdanm	84:0b3ab51c8877	1140	HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
bogdanm	84:0b3ab51c8877	1141	HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1142	void HAL_UART_MspInit(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1143	void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
Kojto	96:487b796308b0	1144	/**
Kojto	96:487b796308b0	1145	* @}
Kojto	96:487b796308b0	1146	*/
bogdanm	84:0b3ab51c8877	1147
bogdanm	84:0b3ab51c8877	1148	/* IO operation functions *****************************************************/
Kojto	96:487b796308b0	1149	/** @defgroup UART_Exported_Functions_Group2 IO operation functions
Kojto	96:487b796308b0	1150	* @{
Kojto	96:487b796308b0	1151	*/
bogdanm	84:0b3ab51c8877	1152	HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout);
bogdanm	84:0b3ab51c8877	1153	HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout);
bogdanm	84:0b3ab51c8877	1154	HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
bogdanm	84:0b3ab51c8877	1155	HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
bogdanm	84:0b3ab51c8877	1156	HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
bogdanm	84:0b3ab51c8877	1157	HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
bogdanm	84:0b3ab51c8877	1158	HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1159	HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1160	HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1161	void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1162	void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1163	void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1164	void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1165	void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1166	void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
Kojto	96:487b796308b0	1167	/**
Kojto	96:487b796308b0	1168	* @}
Kojto	96:487b796308b0	1169	*/
bogdanm	84:0b3ab51c8877	1170	/* Peripheral Control and State functions ************************************/
Kojto	96:487b796308b0	1171	/** @defgroup UART_Exported_Functions_Group3 Peripheral Control funtions
Kojto	96:487b796308b0	1172	* @{
Kojto	96:487b796308b0	1173	*/
bogdanm	84:0b3ab51c8877	1174	HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1175	HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1176	void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1177	HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1178	HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1179	HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1180	HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1181	uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
Kojto	96:487b796308b0	1182	/**
Kojto	96:487b796308b0	1183	* @}
Kojto	96:487b796308b0	1184	*/
Kojto	119:aae6fcc7d9bb	1185	/**
Kojto	119:aae6fcc7d9bb	1186	* @}
Kojto	119:aae6fcc7d9bb	1187	*/
Kojto	119:aae6fcc7d9bb	1188
Kojto	119:aae6fcc7d9bb	1189	/** @addtogroup UART_Private
Kojto	119:aae6fcc7d9bb	1190	* @{
Kojto	119:aae6fcc7d9bb	1191	*/
bogdanm	84:0b3ab51c8877	1192	void UART_SetConfig(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1193	HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
bogdanm	84:0b3ab51c8877	1194	HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
bogdanm	84:0b3ab51c8877	1195	void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
Kojto	96:487b796308b0	1196	/**
Kojto	96:487b796308b0	1197	* @}
Kojto	96:487b796308b0	1198	*/
Kojto	96:487b796308b0	1199
Kojto	119:aae6fcc7d9bb	1200
Kojto	119:aae6fcc7d9bb	1201	/* Define the private group ***********************************/
Kojto	119:aae6fcc7d9bb	1202	/**************************************************************/
Kojto	119:aae6fcc7d9bb	1203	/** @defgroup UART_Private UART Private
Kojto	119:aae6fcc7d9bb	1204	* @{
Kojto	119:aae6fcc7d9bb	1205	*/
Kojto	119:aae6fcc7d9bb	1206	/**
Kojto	119:aae6fcc7d9bb	1207	* @}
Kojto	119:aae6fcc7d9bb	1208	*/
Kojto	119:aae6fcc7d9bb	1209	/**************************************************************/
Kojto	119:aae6fcc7d9bb	1210
bogdanm	84:0b3ab51c8877	1211	/**
bogdanm	84:0b3ab51c8877	1212	* @}
bogdanm	84:0b3ab51c8877	1213	*/
bogdanm	84:0b3ab51c8877	1214	/**
bogdanm	84:0b3ab51c8877	1215	* @}
bogdanm	84:0b3ab51c8877	1216	*/
bogdanm	84:0b3ab51c8877	1217
bogdanm	84:0b3ab51c8877	1218	#ifdef __cplusplus
bogdanm	84:0b3ab51c8877	1219	}
bogdanm	84:0b3ab51c8877	1220	#endif
bogdanm	84:0b3ab51c8877	1221
bogdanm	84:0b3ab51c8877	1222	#endif /* __STM32L0xx_HAL_UART_H */
bogdanm	84:0b3ab51c8877	1223
bogdanm	84:0b3ab51c8877	1224	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/