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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MCU_LPC546XX/cmsis_iccarm.h@161:aa5281ff4a02, 2018-02-16 (annotated)

Committer:
AnnaBridge
Date:
Fri Feb 16 16:16:41 2018 +0000
Revision:
161:aa5281ff4a02
mbed library. Release version 159.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 161:aa5281ff4a02 1 /**************************************************************************//**
AnnaBridge 161:aa5281ff4a02 2 * @file cmsis_iccarm.h
AnnaBridge 161:aa5281ff4a02 3 * @brief CMSIS compiler ICCARM (IAR compiler) header file
AnnaBridge 161:aa5281ff4a02 4 * @version V5.0.3
AnnaBridge 161:aa5281ff4a02 5 * @date 29. August 2017
AnnaBridge 161:aa5281ff4a02 6 ******************************************************************************/
AnnaBridge 161:aa5281ff4a02 7
AnnaBridge 161:aa5281ff4a02 8 //------------------------------------------------------------------------------
AnnaBridge 161:aa5281ff4a02 9 //
AnnaBridge 161:aa5281ff4a02 10 // Copyright (c) 2017 IAR Systems
AnnaBridge 161:aa5281ff4a02 11 //
AnnaBridge 161:aa5281ff4a02 12 // Licensed under the Apache License, Version 2.0 (the "License")
AnnaBridge 161:aa5281ff4a02 13 // you may not use this file except in compliance with the License.
AnnaBridge 161:aa5281ff4a02 14 // You may obtain a copy of the License at
AnnaBridge 161:aa5281ff4a02 15 // http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 161:aa5281ff4a02 16 //
AnnaBridge 161:aa5281ff4a02 17 // Unless required by applicable law or agreed to in writing, software
AnnaBridge 161:aa5281ff4a02 18 // distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 161:aa5281ff4a02 19 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 161:aa5281ff4a02 20 // See the License for the specific language governing permissions and
AnnaBridge 161:aa5281ff4a02 21 // limitations under the License.
AnnaBridge 161:aa5281ff4a02 22 //
AnnaBridge 161:aa5281ff4a02 23 //------------------------------------------------------------------------------
AnnaBridge 161:aa5281ff4a02 24
AnnaBridge 161:aa5281ff4a02 25
AnnaBridge 161:aa5281ff4a02 26 #ifndef __CMSIS_ICCARM_H__
AnnaBridge 161:aa5281ff4a02 27 #define __CMSIS_ICCARM_H__
AnnaBridge 161:aa5281ff4a02 28
AnnaBridge 161:aa5281ff4a02 29 #ifndef __ICCARM__
AnnaBridge 161:aa5281ff4a02 30 #error This file should only be compiled by ICCARM
AnnaBridge 161:aa5281ff4a02 31 #endif
AnnaBridge 161:aa5281ff4a02 32
AnnaBridge 161:aa5281ff4a02 33 #pragma system_include
AnnaBridge 161:aa5281ff4a02 34
AnnaBridge 161:aa5281ff4a02 35 #define __IAR_FT _Pragma("inline=forced") __intrinsic
AnnaBridge 161:aa5281ff4a02 36
AnnaBridge 161:aa5281ff4a02 37 #if (__VER__ >= 8000000)
AnnaBridge 161:aa5281ff4a02 38 #define __ICCARM_V8 1
AnnaBridge 161:aa5281ff4a02 39 #else
AnnaBridge 161:aa5281ff4a02 40 #define __ICCARM_V8 0
AnnaBridge 161:aa5281ff4a02 41 #endif
AnnaBridge 161:aa5281ff4a02 42
AnnaBridge 161:aa5281ff4a02 43 #ifndef __ALIGNED
AnnaBridge 161:aa5281ff4a02 44 #if __ICCARM_V8
AnnaBridge 161:aa5281ff4a02 45 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 161:aa5281ff4a02 46 #elif (__VER__ >= 7080000)
AnnaBridge 161:aa5281ff4a02 47 /* Needs IAR language extensions */
AnnaBridge 161:aa5281ff4a02 48 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 161:aa5281ff4a02 49 #else
AnnaBridge 161:aa5281ff4a02 50 #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
AnnaBridge 161:aa5281ff4a02 51 #define __ALIGNED(x)
AnnaBridge 161:aa5281ff4a02 52 #endif
AnnaBridge 161:aa5281ff4a02 53 #endif
AnnaBridge 161:aa5281ff4a02 54
AnnaBridge 161:aa5281ff4a02 55
AnnaBridge 161:aa5281ff4a02 56 /* Define compiler macros for CPU architecture, used in CMSIS 5.
AnnaBridge 161:aa5281ff4a02 57 */
AnnaBridge 161:aa5281ff4a02 58 #if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
AnnaBridge 161:aa5281ff4a02 59 /* Macros already defined */
AnnaBridge 161:aa5281ff4a02 60 #else
AnnaBridge 161:aa5281ff4a02 61 #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
AnnaBridge 161:aa5281ff4a02 62 #define __ARM_ARCH_8M_MAIN__ 1
AnnaBridge 161:aa5281ff4a02 63 #elif defined(__ARM8M_BASELINE__)
AnnaBridge 161:aa5281ff4a02 64 #define __ARM_ARCH_8M_BASE__ 1
AnnaBridge 161:aa5281ff4a02 65 #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
AnnaBridge 161:aa5281ff4a02 66 #if __ARM_ARCH == 6
AnnaBridge 161:aa5281ff4a02 67 #define __ARM_ARCH_6M__ 1
AnnaBridge 161:aa5281ff4a02 68 #elif __ARM_ARCH == 7
AnnaBridge 161:aa5281ff4a02 69 #if __ARM_FEATURE_DSP
AnnaBridge 161:aa5281ff4a02 70 #define __ARM_ARCH_7EM__ 1
AnnaBridge 161:aa5281ff4a02 71 #else
AnnaBridge 161:aa5281ff4a02 72 #define __ARM_ARCH_7M__ 1
AnnaBridge 161:aa5281ff4a02 73 #endif
AnnaBridge 161:aa5281ff4a02 74 #endif /* __ARM_ARCH */
AnnaBridge 161:aa5281ff4a02 75 #endif /* __ARM_ARCH_PROFILE == 'M' */
AnnaBridge 161:aa5281ff4a02 76 #endif
AnnaBridge 161:aa5281ff4a02 77
AnnaBridge 161:aa5281ff4a02 78 /* Alternativ core deduction for older ICCARM's */
AnnaBridge 161:aa5281ff4a02 79 #if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
AnnaBridge 161:aa5281ff4a02 80 !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
AnnaBridge 161:aa5281ff4a02 81 #if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
AnnaBridge 161:aa5281ff4a02 82 #define __ARM_ARCH_6M__ 1
AnnaBridge 161:aa5281ff4a02 83 #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
AnnaBridge 161:aa5281ff4a02 84 #define __ARM_ARCH_7M__ 1
AnnaBridge 161:aa5281ff4a02 85 #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
AnnaBridge 161:aa5281ff4a02 86 #define __ARM_ARCH_7EM__ 1
AnnaBridge 161:aa5281ff4a02 87 #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
AnnaBridge 161:aa5281ff4a02 88 #define __ARM_ARCH_8M_BASE__ 1
AnnaBridge 161:aa5281ff4a02 89 #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
AnnaBridge 161:aa5281ff4a02 90 #define __ARM_ARCH_8M_MAIN__ 1
AnnaBridge 161:aa5281ff4a02 91 #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
AnnaBridge 161:aa5281ff4a02 92 #define __ARM_ARCH_8M_MAIN__ 1
AnnaBridge 161:aa5281ff4a02 93 #else
AnnaBridge 161:aa5281ff4a02 94 #error "Unknown target."
AnnaBridge 161:aa5281ff4a02 95 #endif
AnnaBridge 161:aa5281ff4a02 96 #endif
AnnaBridge 161:aa5281ff4a02 97
AnnaBridge 161:aa5281ff4a02 98
AnnaBridge 161:aa5281ff4a02 99
AnnaBridge 161:aa5281ff4a02 100 #if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
AnnaBridge 161:aa5281ff4a02 101 #define __IAR_M0_FAMILY 1
AnnaBridge 161:aa5281ff4a02 102 #elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
AnnaBridge 161:aa5281ff4a02 103 #define __IAR_M0_FAMILY 1
AnnaBridge 161:aa5281ff4a02 104 #else
AnnaBridge 161:aa5281ff4a02 105 #define __IAR_M0_FAMILY 0
AnnaBridge 161:aa5281ff4a02 106 #endif
AnnaBridge 161:aa5281ff4a02 107
AnnaBridge 161:aa5281ff4a02 108
AnnaBridge 161:aa5281ff4a02 109 #ifndef __ASM
AnnaBridge 161:aa5281ff4a02 110 #define __ASM __asm
AnnaBridge 161:aa5281ff4a02 111 #endif
AnnaBridge 161:aa5281ff4a02 112
AnnaBridge 161:aa5281ff4a02 113 #ifndef __INLINE
AnnaBridge 161:aa5281ff4a02 114 #define __INLINE inline
AnnaBridge 161:aa5281ff4a02 115 #endif
AnnaBridge 161:aa5281ff4a02 116
AnnaBridge 161:aa5281ff4a02 117 #ifndef __NO_RETURN
AnnaBridge 161:aa5281ff4a02 118 #if __ICCARM_V8
AnnaBridge 161:aa5281ff4a02 119 #define __NO_RETURN __attribute__((noreturn))
AnnaBridge 161:aa5281ff4a02 120 #else
AnnaBridge 161:aa5281ff4a02 121 #define __NO_RETURN _Pragma("object_attribute=__noreturn")
AnnaBridge 161:aa5281ff4a02 122 #endif
AnnaBridge 161:aa5281ff4a02 123 #endif
AnnaBridge 161:aa5281ff4a02 124
AnnaBridge 161:aa5281ff4a02 125 #ifndef __PACKED
AnnaBridge 161:aa5281ff4a02 126 #if __ICCARM_V8
AnnaBridge 161:aa5281ff4a02 127 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 161:aa5281ff4a02 128 #else
AnnaBridge 161:aa5281ff4a02 129 /* Needs IAR language extensions */
AnnaBridge 161:aa5281ff4a02 130 #define __PACKED __packed
AnnaBridge 161:aa5281ff4a02 131 #endif
AnnaBridge 161:aa5281ff4a02 132 #endif
AnnaBridge 161:aa5281ff4a02 133
AnnaBridge 161:aa5281ff4a02 134 #ifndef __PACKED_STRUCT
AnnaBridge 161:aa5281ff4a02 135 #if __ICCARM_V8
AnnaBridge 161:aa5281ff4a02 136 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 161:aa5281ff4a02 137 #else
AnnaBridge 161:aa5281ff4a02 138 /* Needs IAR language extensions */
AnnaBridge 161:aa5281ff4a02 139 #define __PACKED_STRUCT __packed struct
AnnaBridge 161:aa5281ff4a02 140 #endif
AnnaBridge 161:aa5281ff4a02 141 #endif
AnnaBridge 161:aa5281ff4a02 142
AnnaBridge 161:aa5281ff4a02 143 #ifndef __PACKED_UNION
AnnaBridge 161:aa5281ff4a02 144 #if __ICCARM_V8
AnnaBridge 161:aa5281ff4a02 145 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
AnnaBridge 161:aa5281ff4a02 146 #else
AnnaBridge 161:aa5281ff4a02 147 /* Needs IAR language extensions */
AnnaBridge 161:aa5281ff4a02 148 #define __PACKED_UNION __packed union
AnnaBridge 161:aa5281ff4a02 149 #endif
AnnaBridge 161:aa5281ff4a02 150 #endif
AnnaBridge 161:aa5281ff4a02 151
AnnaBridge 161:aa5281ff4a02 152 #ifndef __RESTRICT
AnnaBridge 161:aa5281ff4a02 153 #define __RESTRICT restrict
AnnaBridge 161:aa5281ff4a02 154 #endif
AnnaBridge 161:aa5281ff4a02 155
AnnaBridge 161:aa5281ff4a02 156
AnnaBridge 161:aa5281ff4a02 157 #ifndef __STATIC_INLINE
AnnaBridge 161:aa5281ff4a02 158 #define __STATIC_INLINE static inline
AnnaBridge 161:aa5281ff4a02 159 #endif
AnnaBridge 161:aa5281ff4a02 160
AnnaBridge 161:aa5281ff4a02 161 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 161:aa5281ff4a02 162 #pragma language=save
AnnaBridge 161:aa5281ff4a02 163 #pragma language=extended
AnnaBridge 161:aa5281ff4a02 164 __IAR_FT uint16_t __iar_uint16_read(void const *ptr) {
AnnaBridge 161:aa5281ff4a02 165 return *(__packed uint16_t*)(ptr);
AnnaBridge 161:aa5281ff4a02 166 }
AnnaBridge 161:aa5281ff4a02 167 #pragma language=restore
AnnaBridge 161:aa5281ff4a02 168 #define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
AnnaBridge 161:aa5281ff4a02 169 #endif
AnnaBridge 161:aa5281ff4a02 170
AnnaBridge 161:aa5281ff4a02 171
AnnaBridge 161:aa5281ff4a02 172 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 161:aa5281ff4a02 173 #pragma language=save
AnnaBridge 161:aa5281ff4a02 174 #pragma language=extended
AnnaBridge 161:aa5281ff4a02 175 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val) {
AnnaBridge 161:aa5281ff4a02 176 *(__packed uint16_t*)(ptr) = val;;
AnnaBridge 161:aa5281ff4a02 177 }
AnnaBridge 161:aa5281ff4a02 178 #pragma language=restore
AnnaBridge 161:aa5281ff4a02 179 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
AnnaBridge 161:aa5281ff4a02 180 #endif
AnnaBridge 161:aa5281ff4a02 181
AnnaBridge 161:aa5281ff4a02 182 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 161:aa5281ff4a02 183 #pragma language=save
AnnaBridge 161:aa5281ff4a02 184 #pragma language=extended
AnnaBridge 161:aa5281ff4a02 185 __IAR_FT uint32_t __iar_uint32_read(void const *ptr) {
AnnaBridge 161:aa5281ff4a02 186 return *(__packed uint32_t*)(ptr);
AnnaBridge 161:aa5281ff4a02 187 }
AnnaBridge 161:aa5281ff4a02 188 #pragma language=restore
AnnaBridge 161:aa5281ff4a02 189 #define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
AnnaBridge 161:aa5281ff4a02 190 #endif
AnnaBridge 161:aa5281ff4a02 191
AnnaBridge 161:aa5281ff4a02 192 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 161:aa5281ff4a02 193 #pragma language=save
AnnaBridge 161:aa5281ff4a02 194 #pragma language=extended
AnnaBridge 161:aa5281ff4a02 195 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val) {
AnnaBridge 161:aa5281ff4a02 196 *(__packed uint32_t*)(ptr) = val;;
AnnaBridge 161:aa5281ff4a02 197 }
AnnaBridge 161:aa5281ff4a02 198 #pragma language=restore
AnnaBridge 161:aa5281ff4a02 199 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
AnnaBridge 161:aa5281ff4a02 200 #endif
AnnaBridge 161:aa5281ff4a02 201
AnnaBridge 161:aa5281ff4a02 202 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 161:aa5281ff4a02 203 #pragma language=save
AnnaBridge 161:aa5281ff4a02 204 #pragma language=extended
AnnaBridge 161:aa5281ff4a02 205 __packed struct __iar_u32 { uint32_t v; };
AnnaBridge 161:aa5281ff4a02 206 #pragma language=restore
AnnaBridge 161:aa5281ff4a02 207 #define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
AnnaBridge 161:aa5281ff4a02 208 #endif
AnnaBridge 161:aa5281ff4a02 209
AnnaBridge 161:aa5281ff4a02 210 #ifndef __USED
AnnaBridge 161:aa5281ff4a02 211 #if __ICCARM_V8
AnnaBridge 161:aa5281ff4a02 212 #define __USED __attribute__((used))
AnnaBridge 161:aa5281ff4a02 213 #else
AnnaBridge 161:aa5281ff4a02 214 #define __USED _Pragma("__root")
AnnaBridge 161:aa5281ff4a02 215 #endif
AnnaBridge 161:aa5281ff4a02 216 #endif
AnnaBridge 161:aa5281ff4a02 217
AnnaBridge 161:aa5281ff4a02 218 #ifndef __WEAK
AnnaBridge 161:aa5281ff4a02 219 #if __ICCARM_V8
AnnaBridge 161:aa5281ff4a02 220 #define __WEAK __attribute__((weak))
AnnaBridge 161:aa5281ff4a02 221 #else
AnnaBridge 161:aa5281ff4a02 222 #define __WEAK _Pragma("__weak")
AnnaBridge 161:aa5281ff4a02 223 #endif
AnnaBridge 161:aa5281ff4a02 224 #endif
AnnaBridge 161:aa5281ff4a02 225
AnnaBridge 161:aa5281ff4a02 226
AnnaBridge 161:aa5281ff4a02 227 #ifndef __ICCARM_INTRINSICS_VERSION__
AnnaBridge 161:aa5281ff4a02 228 #define __ICCARM_INTRINSICS_VERSION__ 0
AnnaBridge 161:aa5281ff4a02 229 #endif
AnnaBridge 161:aa5281ff4a02 230
AnnaBridge 161:aa5281ff4a02 231 #if __ICCARM_INTRINSICS_VERSION__ == 2
AnnaBridge 161:aa5281ff4a02 232
AnnaBridge 161:aa5281ff4a02 233 #if defined(__CLZ)
AnnaBridge 161:aa5281ff4a02 234 #undef __CLZ
AnnaBridge 161:aa5281ff4a02 235 #endif
AnnaBridge 161:aa5281ff4a02 236 #if defined(__REVSH)
AnnaBridge 161:aa5281ff4a02 237 #undef __REVSH
AnnaBridge 161:aa5281ff4a02 238 #endif
AnnaBridge 161:aa5281ff4a02 239 #if defined(__RBIT)
AnnaBridge 161:aa5281ff4a02 240 #undef __RBIT
AnnaBridge 161:aa5281ff4a02 241 #endif
AnnaBridge 161:aa5281ff4a02 242 #if defined(__SSAT)
AnnaBridge 161:aa5281ff4a02 243 #undef __SSAT
AnnaBridge 161:aa5281ff4a02 244 #endif
AnnaBridge 161:aa5281ff4a02 245 #if defined(__USAT)
AnnaBridge 161:aa5281ff4a02 246 #undef __USAT
AnnaBridge 161:aa5281ff4a02 247 #endif
AnnaBridge 161:aa5281ff4a02 248
AnnaBridge 161:aa5281ff4a02 249 #include "iccarm_builtin.h"
AnnaBridge 161:aa5281ff4a02 250
AnnaBridge 161:aa5281ff4a02 251 #define __disable_fault_irq __iar_builtin_disable_fiq
AnnaBridge 161:aa5281ff4a02 252 #define __disable_irq __iar_builtin_disable_interrupt
AnnaBridge 161:aa5281ff4a02 253 #define __enable_fault_irq __iar_builtin_enable_fiq
AnnaBridge 161:aa5281ff4a02 254 #define __enable_irq __iar_builtin_enable_interrupt
AnnaBridge 161:aa5281ff4a02 255 #define __arm_rsr __iar_builtin_rsr
AnnaBridge 161:aa5281ff4a02 256 #define __arm_wsr __iar_builtin_wsr
AnnaBridge 161:aa5281ff4a02 257
AnnaBridge 161:aa5281ff4a02 258
AnnaBridge 161:aa5281ff4a02 259 #define __get_APSR() (__arm_rsr("APSR"))
AnnaBridge 161:aa5281ff4a02 260 #define __get_BASEPRI() (__arm_rsr("BASEPRI"))
AnnaBridge 161:aa5281ff4a02 261 #define __get_CONTROL() (__arm_rsr("CONTROL"))
AnnaBridge 161:aa5281ff4a02 262 #define __get_FAULTMASK() (__arm_rsr("FAULTMASK"))
AnnaBridge 161:aa5281ff4a02 263
AnnaBridge 161:aa5281ff4a02 264 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 161:aa5281ff4a02 265 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 161:aa5281ff4a02 266 #define __get_FPSCR() (__arm_rsr("FPSCR"))
AnnaBridge 161:aa5281ff4a02 267 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
AnnaBridge 161:aa5281ff4a02 268 #else
AnnaBridge 161:aa5281ff4a02 269 #define __get_FPSCR() ( 0 )
AnnaBridge 161:aa5281ff4a02 270 #define __set_FPSCR(VALUE) ((void)VALUE)
AnnaBridge 161:aa5281ff4a02 271 #endif
AnnaBridge 161:aa5281ff4a02 272
AnnaBridge 161:aa5281ff4a02 273 #define __get_IPSR() (__arm_rsr("IPSR"))
AnnaBridge 161:aa5281ff4a02 274 #define __get_MSP() (__arm_rsr("MSP"))
AnnaBridge 161:aa5281ff4a02 275 #define __get_MSPLIM() (__arm_rsr("MSPLIM"))
AnnaBridge 161:aa5281ff4a02 276 #define __get_PRIMASK() (__arm_rsr("PRIMASK"))
AnnaBridge 161:aa5281ff4a02 277 #define __get_PSP() (__arm_rsr("PSP"))
AnnaBridge 161:aa5281ff4a02 278 #define __get_PSPLIM() (__arm_rsr("PSPLIM"))
AnnaBridge 161:aa5281ff4a02 279 #define __get_xPSR() (__arm_rsr("xPSR"))
AnnaBridge 161:aa5281ff4a02 280
AnnaBridge 161:aa5281ff4a02 281 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
AnnaBridge 161:aa5281ff4a02 282 #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE)))
AnnaBridge 161:aa5281ff4a02 283 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
AnnaBridge 161:aa5281ff4a02 284 #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE)))
AnnaBridge 161:aa5281ff4a02 285 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
AnnaBridge 161:aa5281ff4a02 286 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
AnnaBridge 161:aa5281ff4a02 287 #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE)))
AnnaBridge 161:aa5281ff4a02 288 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
AnnaBridge 161:aa5281ff4a02 289 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
AnnaBridge 161:aa5281ff4a02 290
AnnaBridge 161:aa5281ff4a02 291 #define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS"))
AnnaBridge 161:aa5281ff4a02 292 #define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE)))
AnnaBridge 161:aa5281ff4a02 293 #define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS"))
AnnaBridge 161:aa5281ff4a02 294 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
AnnaBridge 161:aa5281ff4a02 295 #define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS"))
AnnaBridge 161:aa5281ff4a02 296 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
AnnaBridge 161:aa5281ff4a02 297 #define __TZ_get_SP_NS() (__arm_rsr("SP_NS"))
AnnaBridge 161:aa5281ff4a02 298 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE)))
AnnaBridge 161:aa5281ff4a02 299 #define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS"))
AnnaBridge 161:aa5281ff4a02 300 #define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE)))
AnnaBridge 161:aa5281ff4a02 301 #define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS"))
AnnaBridge 161:aa5281ff4a02 302 #define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE)))
AnnaBridge 161:aa5281ff4a02 303 #define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS"))
AnnaBridge 161:aa5281ff4a02 304 #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
AnnaBridge 161:aa5281ff4a02 305 #define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS"))
AnnaBridge 161:aa5281ff4a02 306 #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
AnnaBridge 161:aa5281ff4a02 307 #define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS"))
AnnaBridge 161:aa5281ff4a02 308 #define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE)))
AnnaBridge 161:aa5281ff4a02 309
AnnaBridge 161:aa5281ff4a02 310 #define __NOP __iar_builtin_no_operation
AnnaBridge 161:aa5281ff4a02 311
AnnaBridge 161:aa5281ff4a02 312 __IAR_FT uint8_t __CLZ(uint32_t val) {
AnnaBridge 161:aa5281ff4a02 313 return __iar_builtin_CLZ(val);
AnnaBridge 161:aa5281ff4a02 314 }
AnnaBridge 161:aa5281ff4a02 315
AnnaBridge 161:aa5281ff4a02 316 #define __CLREX __iar_builtin_CLREX
AnnaBridge 161:aa5281ff4a02 317
AnnaBridge 161:aa5281ff4a02 318 #define __DMB __iar_builtin_DMB
AnnaBridge 161:aa5281ff4a02 319 #define __DSB __iar_builtin_DSB
AnnaBridge 161:aa5281ff4a02 320 #define __ISB __iar_builtin_ISB
AnnaBridge 161:aa5281ff4a02 321
AnnaBridge 161:aa5281ff4a02 322 #define __LDREXB __iar_builtin_LDREXB
AnnaBridge 161:aa5281ff4a02 323 #define __LDREXH __iar_builtin_LDREXH
AnnaBridge 161:aa5281ff4a02 324 #define __LDREXW __iar_builtin_LDREX
AnnaBridge 161:aa5281ff4a02 325
AnnaBridge 161:aa5281ff4a02 326 #define __RBIT __iar_builtin_RBIT
AnnaBridge 161:aa5281ff4a02 327 #define __REV __iar_builtin_REV
AnnaBridge 161:aa5281ff4a02 328 #define __REV16 __iar_builtin_REV16
AnnaBridge 161:aa5281ff4a02 329
AnnaBridge 161:aa5281ff4a02 330 __IAR_FT int32_t __REVSH(int32_t val) {
AnnaBridge 161:aa5281ff4a02 331 return __iar_builtin_REVSH((int16_t)val);
AnnaBridge 161:aa5281ff4a02 332 }
AnnaBridge 161:aa5281ff4a02 333
AnnaBridge 161:aa5281ff4a02 334 #define __ROR __iar_builtin_ROR
AnnaBridge 161:aa5281ff4a02 335 #define __RRX __iar_builtin_RRX
AnnaBridge 161:aa5281ff4a02 336
AnnaBridge 161:aa5281ff4a02 337 #define __SEV __iar_builtin_SEV
AnnaBridge 161:aa5281ff4a02 338
AnnaBridge 161:aa5281ff4a02 339 #if !__IAR_M0_FAMILY
AnnaBridge 161:aa5281ff4a02 340 #define __SSAT __iar_builtin_SSAT
AnnaBridge 161:aa5281ff4a02 341 #endif
AnnaBridge 161:aa5281ff4a02 342
AnnaBridge 161:aa5281ff4a02 343 #define __STREXB __iar_builtin_STREXB
AnnaBridge 161:aa5281ff4a02 344 #define __STREXH __iar_builtin_STREXH
AnnaBridge 161:aa5281ff4a02 345 #define __STREXW __iar_builtin_STREX
AnnaBridge 161:aa5281ff4a02 346
AnnaBridge 161:aa5281ff4a02 347 #if !__IAR_M0_FAMILY
AnnaBridge 161:aa5281ff4a02 348 #define __USAT __iar_builtin_USAT
AnnaBridge 161:aa5281ff4a02 349 #endif
AnnaBridge 161:aa5281ff4a02 350
AnnaBridge 161:aa5281ff4a02 351 #define __WFE __iar_builtin_WFE
AnnaBridge 161:aa5281ff4a02 352 #define __WFI __iar_builtin_WFI
AnnaBridge 161:aa5281ff4a02 353
AnnaBridge 161:aa5281ff4a02 354 #if __ARM_MEDIA__
AnnaBridge 161:aa5281ff4a02 355 #define __SADD8 __iar_builtin_SADD8
AnnaBridge 161:aa5281ff4a02 356 #define __QADD8 __iar_builtin_QADD8
AnnaBridge 161:aa5281ff4a02 357 #define __SHADD8 __iar_builtin_SHADD8
AnnaBridge 161:aa5281ff4a02 358 #define __UADD8 __iar_builtin_UADD8
AnnaBridge 161:aa5281ff4a02 359 #define __UQADD8 __iar_builtin_UQADD8
AnnaBridge 161:aa5281ff4a02 360 #define __UHADD8 __iar_builtin_UHADD8
AnnaBridge 161:aa5281ff4a02 361 #define __SSUB8 __iar_builtin_SSUB8
AnnaBridge 161:aa5281ff4a02 362 #define __QSUB8 __iar_builtin_QSUB8
AnnaBridge 161:aa5281ff4a02 363 #define __SHSUB8 __iar_builtin_SHSUB8
AnnaBridge 161:aa5281ff4a02 364 #define __USUB8 __iar_builtin_USUB8
AnnaBridge 161:aa5281ff4a02 365 #define __UQSUB8 __iar_builtin_UQSUB8
AnnaBridge 161:aa5281ff4a02 366 #define __UHSUB8 __iar_builtin_UHSUB8
AnnaBridge 161:aa5281ff4a02 367 #define __SADD16 __iar_builtin_SADD16
AnnaBridge 161:aa5281ff4a02 368 #define __QADD16 __iar_builtin_QADD16
AnnaBridge 161:aa5281ff4a02 369 #define __SHADD16 __iar_builtin_SHADD16
AnnaBridge 161:aa5281ff4a02 370 #define __UADD16 __iar_builtin_UADD16
AnnaBridge 161:aa5281ff4a02 371 #define __UQADD16 __iar_builtin_UQADD16
AnnaBridge 161:aa5281ff4a02 372 #define __UHADD16 __iar_builtin_UHADD16
AnnaBridge 161:aa5281ff4a02 373 #define __SSUB16 __iar_builtin_SSUB16
AnnaBridge 161:aa5281ff4a02 374 #define __QSUB16 __iar_builtin_QSUB16
AnnaBridge 161:aa5281ff4a02 375 #define __SHSUB16 __iar_builtin_SHSUB16
AnnaBridge 161:aa5281ff4a02 376 #define __USUB16 __iar_builtin_USUB16
AnnaBridge 161:aa5281ff4a02 377 #define __UQSUB16 __iar_builtin_UQSUB16
AnnaBridge 161:aa5281ff4a02 378 #define __UHSUB16 __iar_builtin_UHSUB16
AnnaBridge 161:aa5281ff4a02 379 #define __SASX __iar_builtin_SASX
AnnaBridge 161:aa5281ff4a02 380 #define __QASX __iar_builtin_QASX
AnnaBridge 161:aa5281ff4a02 381 #define __SHASX __iar_builtin_SHASX
AnnaBridge 161:aa5281ff4a02 382 #define __UASX __iar_builtin_UASX
AnnaBridge 161:aa5281ff4a02 383 #define __UQASX __iar_builtin_UQASX
AnnaBridge 161:aa5281ff4a02 384 #define __UHASX __iar_builtin_UHASX
AnnaBridge 161:aa5281ff4a02 385 #define __SSAX __iar_builtin_SSAX
AnnaBridge 161:aa5281ff4a02 386 #define __QSAX __iar_builtin_QSAX
AnnaBridge 161:aa5281ff4a02 387 #define __SHSAX __iar_builtin_SHSAX
AnnaBridge 161:aa5281ff4a02 388 #define __USAX __iar_builtin_USAX
AnnaBridge 161:aa5281ff4a02 389 #define __UQSAX __iar_builtin_UQSAX
AnnaBridge 161:aa5281ff4a02 390 #define __UHSAX __iar_builtin_UHSAX
AnnaBridge 161:aa5281ff4a02 391 #define __USAD8 __iar_builtin_USAD8
AnnaBridge 161:aa5281ff4a02 392 #define __USADA8 __iar_builtin_USADA8
AnnaBridge 161:aa5281ff4a02 393 #define __SSAT16 __iar_builtin_SSAT16
AnnaBridge 161:aa5281ff4a02 394 #define __USAT16 __iar_builtin_USAT16
AnnaBridge 161:aa5281ff4a02 395 #define __UXTB16 __iar_builtin_UXTB16
AnnaBridge 161:aa5281ff4a02 396 #define __UXTAB16 __iar_builtin_UXTAB16
AnnaBridge 161:aa5281ff4a02 397 #define __SXTB16 __iar_builtin_SXTB16
AnnaBridge 161:aa5281ff4a02 398 #define __SXTAB16 __iar_builtin_SXTAB16
AnnaBridge 161:aa5281ff4a02 399 #define __SMUAD __iar_builtin_SMUAD
AnnaBridge 161:aa5281ff4a02 400 #define __SMUADX __iar_builtin_SMUADX
AnnaBridge 161:aa5281ff4a02 401 #define __SMMLA __iar_builtin_SMMLA
AnnaBridge 161:aa5281ff4a02 402 #define __SMLAD __iar_builtin_SMLAD
AnnaBridge 161:aa5281ff4a02 403 #define __SMLADX __iar_builtin_SMLADX
AnnaBridge 161:aa5281ff4a02 404 #define __SMLALD __iar_builtin_SMLALD
AnnaBridge 161:aa5281ff4a02 405 #define __SMLALDX __iar_builtin_SMLALDX
AnnaBridge 161:aa5281ff4a02 406 #define __SMUSD __iar_builtin_SMUSD
AnnaBridge 161:aa5281ff4a02 407 #define __SMUSDX __iar_builtin_SMUSDX
AnnaBridge 161:aa5281ff4a02 408 #define __SMLSD __iar_builtin_SMLSD
AnnaBridge 161:aa5281ff4a02 409 #define __SMLSDX __iar_builtin_SMLSDX
AnnaBridge 161:aa5281ff4a02 410 #define __SMLSLD __iar_builtin_SMLSLD
AnnaBridge 161:aa5281ff4a02 411 #define __SMLSLDX __iar_builtin_SMLSLDX
AnnaBridge 161:aa5281ff4a02 412 #define __SEL __iar_builtin_SEL
AnnaBridge 161:aa5281ff4a02 413 #define __QADD __iar_builtin_QADD
AnnaBridge 161:aa5281ff4a02 414 #define __QSUB __iar_builtin_QSUB
AnnaBridge 161:aa5281ff4a02 415 #define __PKHBT __iar_builtin_PKHBT
AnnaBridge 161:aa5281ff4a02 416 #define __PKHTB __iar_builtin_PKHTB
AnnaBridge 161:aa5281ff4a02 417 #endif
AnnaBridge 161:aa5281ff4a02 418
AnnaBridge 161:aa5281ff4a02 419 #else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
AnnaBridge 161:aa5281ff4a02 420
AnnaBridge 161:aa5281ff4a02 421 #if __IAR_M0_FAMILY
AnnaBridge 161:aa5281ff4a02 422 /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
AnnaBridge 161:aa5281ff4a02 423 #define __CLZ __cmsis_iar_clz_not_active
AnnaBridge 161:aa5281ff4a02 424 #define __SSAT __cmsis_iar_ssat_not_active
AnnaBridge 161:aa5281ff4a02 425 #define __USAT __cmsis_iar_usat_not_active
AnnaBridge 161:aa5281ff4a02 426 #define __RBIT __cmsis_iar_rbit_not_active
AnnaBridge 161:aa5281ff4a02 427 #define __get_APSR __cmsis_iar_get_APSR_not_active
AnnaBridge 161:aa5281ff4a02 428 #endif
AnnaBridge 161:aa5281ff4a02 429
AnnaBridge 161:aa5281ff4a02 430
AnnaBridge 161:aa5281ff4a02 431 #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 161:aa5281ff4a02 432 (defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
AnnaBridge 161:aa5281ff4a02 433 #define __get_FPSCR __cmsis_iar_get_FPSR_not_active
AnnaBridge 161:aa5281ff4a02 434 #define __set_FPSCR __cmsis_iar_set_FPSR_not_active
AnnaBridge 161:aa5281ff4a02 435 #endif
AnnaBridge 161:aa5281ff4a02 436
AnnaBridge 161:aa5281ff4a02 437 #include <intrinsics.h>
AnnaBridge 161:aa5281ff4a02 438
AnnaBridge 161:aa5281ff4a02 439 #if __IAR_M0_FAMILY
AnnaBridge 161:aa5281ff4a02 440 /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
AnnaBridge 161:aa5281ff4a02 441 #undef __CLZ
AnnaBridge 161:aa5281ff4a02 442 #undef __SSAT
AnnaBridge 161:aa5281ff4a02 443 #undef __USAT
AnnaBridge 161:aa5281ff4a02 444 #undef __RBIT
AnnaBridge 161:aa5281ff4a02 445 #undef __get_APSR
AnnaBridge 161:aa5281ff4a02 446
AnnaBridge 161:aa5281ff4a02 447 __STATIC_INLINE uint8_t __CLZ(uint32_t data) {
AnnaBridge 161:aa5281ff4a02 448 if (data == 0u) { return 32u; }
AnnaBridge 161:aa5281ff4a02 449
AnnaBridge 161:aa5281ff4a02 450 uint32_t count = 0;
AnnaBridge 161:aa5281ff4a02 451 uint32_t mask = 0x80000000;
AnnaBridge 161:aa5281ff4a02 452
AnnaBridge 161:aa5281ff4a02 453 while ((data & mask) == 0)
AnnaBridge 161:aa5281ff4a02 454 {
AnnaBridge 161:aa5281ff4a02 455 count += 1u;
AnnaBridge 161:aa5281ff4a02 456 mask = mask >> 1u;
AnnaBridge 161:aa5281ff4a02 457 }
AnnaBridge 161:aa5281ff4a02 458 return (count);
AnnaBridge 161:aa5281ff4a02 459 }
AnnaBridge 161:aa5281ff4a02 460
AnnaBridge 161:aa5281ff4a02 461 __STATIC_INLINE uint32_t __RBIT(uint32_t v) {
AnnaBridge 161:aa5281ff4a02 462 uint8_t sc = 31;
AnnaBridge 161:aa5281ff4a02 463 uint32_t r = v;
AnnaBridge 161:aa5281ff4a02 464 for (v >>= 1U; v; v >>= 1U)
AnnaBridge 161:aa5281ff4a02 465 {
AnnaBridge 161:aa5281ff4a02 466 r <<= 1U;
AnnaBridge 161:aa5281ff4a02 467 r |= v & 1U;
AnnaBridge 161:aa5281ff4a02 468 sc--;
AnnaBridge 161:aa5281ff4a02 469 }
AnnaBridge 161:aa5281ff4a02 470 return (r << sc);
AnnaBridge 161:aa5281ff4a02 471 }
AnnaBridge 161:aa5281ff4a02 472
AnnaBridge 161:aa5281ff4a02 473 __STATIC_INLINE uint32_t __get_APSR(void) {
AnnaBridge 161:aa5281ff4a02 474 uint32_t res;
AnnaBridge 161:aa5281ff4a02 475 __asm("MRS %0,APSR" : "=r" (res));
AnnaBridge 161:aa5281ff4a02 476 return res;
AnnaBridge 161:aa5281ff4a02 477 }
AnnaBridge 161:aa5281ff4a02 478
AnnaBridge 161:aa5281ff4a02 479 #endif
AnnaBridge 161:aa5281ff4a02 480
AnnaBridge 161:aa5281ff4a02 481 #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 161:aa5281ff4a02 482 (defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
AnnaBridge 161:aa5281ff4a02 483 #undef __get_FPSCR
AnnaBridge 161:aa5281ff4a02 484 #undef __set_FPSCR
AnnaBridge 161:aa5281ff4a02 485 #define __get_FPSCR() (0)
AnnaBridge 161:aa5281ff4a02 486 #define __set_FPSCR(VALUE) ((void)VALUE)
AnnaBridge 161:aa5281ff4a02 487 #endif
AnnaBridge 161:aa5281ff4a02 488
AnnaBridge 161:aa5281ff4a02 489 #pragma diag_suppress=Pe940
AnnaBridge 161:aa5281ff4a02 490 #pragma diag_suppress=Pe177
AnnaBridge 161:aa5281ff4a02 491
AnnaBridge 161:aa5281ff4a02 492 #define __enable_irq __enable_interrupt
AnnaBridge 161:aa5281ff4a02 493 #define __disable_irq __disable_interrupt
AnnaBridge 161:aa5281ff4a02 494 #define __NOP __no_operation
AnnaBridge 161:aa5281ff4a02 495
AnnaBridge 161:aa5281ff4a02 496 #define __get_xPSR __get_PSR
AnnaBridge 161:aa5281ff4a02 497
AnnaBridge 161:aa5281ff4a02 498 #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
AnnaBridge 161:aa5281ff4a02 499
AnnaBridge 161:aa5281ff4a02 500 __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr) {
AnnaBridge 161:aa5281ff4a02 501 return __LDREX((unsigned long *)ptr);
AnnaBridge 161:aa5281ff4a02 502 }
AnnaBridge 161:aa5281ff4a02 503
AnnaBridge 161:aa5281ff4a02 504 __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr) {
AnnaBridge 161:aa5281ff4a02 505 return __STREX(value, (unsigned long *)ptr);
AnnaBridge 161:aa5281ff4a02 506 }
AnnaBridge 161:aa5281ff4a02 507 #endif
AnnaBridge 161:aa5281ff4a02 508
AnnaBridge 161:aa5281ff4a02 509
AnnaBridge 161:aa5281ff4a02 510 /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
AnnaBridge 161:aa5281ff4a02 511 #if (__CORTEX_M >= 0x03)
AnnaBridge 161:aa5281ff4a02 512
AnnaBridge 161:aa5281ff4a02 513 __IAR_FT uint32_t __RRX(uint32_t value) {
AnnaBridge 161:aa5281ff4a02 514 uint32_t result;
AnnaBridge 161:aa5281ff4a02 515 __ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc");
AnnaBridge 161:aa5281ff4a02 516 return(result);
AnnaBridge 161:aa5281ff4a02 517 }
AnnaBridge 161:aa5281ff4a02 518
AnnaBridge 161:aa5281ff4a02 519 __IAR_FT void __set_BASEPRI_MAX(uint32_t value) {
AnnaBridge 161:aa5281ff4a02 520 __asm volatile("MSR BASEPRI_MAX,%0"::"r" (value));
AnnaBridge 161:aa5281ff4a02 521 }
AnnaBridge 161:aa5281ff4a02 522
AnnaBridge 161:aa5281ff4a02 523
AnnaBridge 161:aa5281ff4a02 524 #define __enable_fault_irq __enable_fiq
AnnaBridge 161:aa5281ff4a02 525 #define __disable_fault_irq __disable_fiq
AnnaBridge 161:aa5281ff4a02 526
AnnaBridge 161:aa5281ff4a02 527
AnnaBridge 161:aa5281ff4a02 528 #endif /* (__CORTEX_M >= 0x03) */
AnnaBridge 161:aa5281ff4a02 529
AnnaBridge 161:aa5281ff4a02 530 __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2) {
AnnaBridge 161:aa5281ff4a02 531 return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
AnnaBridge 161:aa5281ff4a02 532 }
AnnaBridge 161:aa5281ff4a02 533
AnnaBridge 161:aa5281ff4a02 534 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 535 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 161:aa5281ff4a02 536
AnnaBridge 161:aa5281ff4a02 537 __IAR_FT uint32_t __TZ_get_CONTROL_NS(void) {
AnnaBridge 161:aa5281ff4a02 538 uint32_t res;
AnnaBridge 161:aa5281ff4a02 539 __asm volatile("MRS %0,CONTROL_NS" : "=r" (res));
AnnaBridge 161:aa5281ff4a02 540 return res;
AnnaBridge 161:aa5281ff4a02 541 }
AnnaBridge 161:aa5281ff4a02 542
AnnaBridge 161:aa5281ff4a02 543 __IAR_FT void __TZ_set_CONTROL_NS(uint32_t value) {
AnnaBridge 161:aa5281ff4a02 544 __asm volatile("MSR CONTROL_NS,%0" :: "r" (value));
AnnaBridge 161:aa5281ff4a02 545 }
AnnaBridge 161:aa5281ff4a02 546
AnnaBridge 161:aa5281ff4a02 547 __IAR_FT uint32_t __TZ_get_PSP_NS(void) {
AnnaBridge 161:aa5281ff4a02 548 uint32_t res;
AnnaBridge 161:aa5281ff4a02 549 __asm volatile("MRS %0,PSP_NS" : "=r" (res));
AnnaBridge 161:aa5281ff4a02 550 return res;
AnnaBridge 161:aa5281ff4a02 551 }
AnnaBridge 161:aa5281ff4a02 552
AnnaBridge 161:aa5281ff4a02 553 __IAR_FT void __TZ_set_PSP_NS(uint32_t value) {
AnnaBridge 161:aa5281ff4a02 554 __asm volatile("MSR PSP_NS,%0" :: "r" (value));
AnnaBridge 161:aa5281ff4a02 555 }
AnnaBridge 161:aa5281ff4a02 556
AnnaBridge 161:aa5281ff4a02 557 __IAR_FT uint32_t __TZ_get_MSP_NS(void) {
AnnaBridge 161:aa5281ff4a02 558 uint32_t res;
AnnaBridge 161:aa5281ff4a02 559 __asm volatile("MRS %0,MSP_NS" : "=r" (res));
AnnaBridge 161:aa5281ff4a02 560 return res;
AnnaBridge 161:aa5281ff4a02 561 }
AnnaBridge 161:aa5281ff4a02 562
AnnaBridge 161:aa5281ff4a02 563 __IAR_FT void __TZ_set_MSP_NS(uint32_t value) {
AnnaBridge 161:aa5281ff4a02 564 __asm volatile("MSR MSP_NS,%0" :: "r" (value));
AnnaBridge 161:aa5281ff4a02 565 }
AnnaBridge 161:aa5281ff4a02 566
AnnaBridge 161:aa5281ff4a02 567 __IAR_FT uint32_t __TZ_get_SP_NS(void) {
AnnaBridge 161:aa5281ff4a02 568 uint32_t res;
AnnaBridge 161:aa5281ff4a02 569 __asm volatile("MRS %0,SP_NS" : "=r" (res));
AnnaBridge 161:aa5281ff4a02 570 return res;
AnnaBridge 161:aa5281ff4a02 571 }
AnnaBridge 161:aa5281ff4a02 572 __IAR_FT void __TZ_set_SP_NS(uint32_t value) {
AnnaBridge 161:aa5281ff4a02 573 __asm volatile("MSR SP_NS,%0" :: "r" (value));
AnnaBridge 161:aa5281ff4a02 574 }
AnnaBridge 161:aa5281ff4a02 575
AnnaBridge 161:aa5281ff4a02 576 __IAR_FT uint32_t __TZ_get_PRIMASK_NS(void) {
AnnaBridge 161:aa5281ff4a02 577 uint32_t res;
AnnaBridge 161:aa5281ff4a02 578 __asm volatile("MRS %0,PRIMASK_NS" : "=r" (res));
AnnaBridge 161:aa5281ff4a02 579 return res;
AnnaBridge 161:aa5281ff4a02 580 }
AnnaBridge 161:aa5281ff4a02 581
AnnaBridge 161:aa5281ff4a02 582 __IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value) {
AnnaBridge 161:aa5281ff4a02 583 __asm volatile("MSR PRIMASK_NS,%0" :: "r" (value));
AnnaBridge 161:aa5281ff4a02 584 }
AnnaBridge 161:aa5281ff4a02 585
AnnaBridge 161:aa5281ff4a02 586 __IAR_FT uint32_t __TZ_get_BASEPRI_NS(void) {
AnnaBridge 161:aa5281ff4a02 587 uint32_t res;
AnnaBridge 161:aa5281ff4a02 588 __asm volatile("MRS %0,BASEPRI_NS" : "=r" (res));
AnnaBridge 161:aa5281ff4a02 589 return res;
AnnaBridge 161:aa5281ff4a02 590 }
AnnaBridge 161:aa5281ff4a02 591
AnnaBridge 161:aa5281ff4a02 592 __IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value) {
AnnaBridge 161:aa5281ff4a02 593 __asm volatile("MSR BASEPRI_NS,%0" :: "r" (value));
AnnaBridge 161:aa5281ff4a02 594 }
AnnaBridge 161:aa5281ff4a02 595
AnnaBridge 161:aa5281ff4a02 596 __IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void) {
AnnaBridge 161:aa5281ff4a02 597 uint32_t res;
AnnaBridge 161:aa5281ff4a02 598 __asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res));
AnnaBridge 161:aa5281ff4a02 599 return res;
AnnaBridge 161:aa5281ff4a02 600 }
AnnaBridge 161:aa5281ff4a02 601
AnnaBridge 161:aa5281ff4a02 602 __IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value) {
AnnaBridge 161:aa5281ff4a02 603 __asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value));
AnnaBridge 161:aa5281ff4a02 604 }
AnnaBridge 161:aa5281ff4a02 605
AnnaBridge 161:aa5281ff4a02 606 __IAR_FT uint32_t __TZ_get_PSPLIM_NS(void) {
AnnaBridge 161:aa5281ff4a02 607 uint32_t res;
AnnaBridge 161:aa5281ff4a02 608 __asm volatile("MRS %0,PSPLIM_NS" : "=r" (res));
AnnaBridge 161:aa5281ff4a02 609 return res;
AnnaBridge 161:aa5281ff4a02 610 }
AnnaBridge 161:aa5281ff4a02 611 __IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value) {
AnnaBridge 161:aa5281ff4a02 612 __asm volatile("MSR PSPLIM_NS,%0" :: "r" (value));
AnnaBridge 161:aa5281ff4a02 613 }
AnnaBridge 161:aa5281ff4a02 614
AnnaBridge 161:aa5281ff4a02 615 __IAR_FT uint32_t __TZ_get_MSPLIM_NS(void) {
AnnaBridge 161:aa5281ff4a02 616 uint32_t res;
AnnaBridge 161:aa5281ff4a02 617 __asm volatile("MRS %0,MSPLIM_NS" : "=r" (res));
AnnaBridge 161:aa5281ff4a02 618 return res;
AnnaBridge 161:aa5281ff4a02 619 }
AnnaBridge 161:aa5281ff4a02 620
AnnaBridge 161:aa5281ff4a02 621 __IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value) {
AnnaBridge 161:aa5281ff4a02 622 __asm volatile("MSR MSPLIM_NS,%0" :: "r" (value));
AnnaBridge 161:aa5281ff4a02 623 }
AnnaBridge 161:aa5281ff4a02 624
AnnaBridge 161:aa5281ff4a02 625 #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
AnnaBridge 161:aa5281ff4a02 626
AnnaBridge 161:aa5281ff4a02 627 #endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */
AnnaBridge 161:aa5281ff4a02 628
AnnaBridge 161:aa5281ff4a02 629 #define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value))
AnnaBridge 161:aa5281ff4a02 630
AnnaBridge 161:aa5281ff4a02 631 #if __IAR_M0_FAMILY
AnnaBridge 161:aa5281ff4a02 632 __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat) {
AnnaBridge 161:aa5281ff4a02 633 if ((sat >= 1U) && (sat <= 32U)) {
AnnaBridge 161:aa5281ff4a02 634 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
AnnaBridge 161:aa5281ff4a02 635 const int32_t min = -1 - max ;
AnnaBridge 161:aa5281ff4a02 636 if (val > max) {
AnnaBridge 161:aa5281ff4a02 637 return max;
AnnaBridge 161:aa5281ff4a02 638 } else if (val < min) {
AnnaBridge 161:aa5281ff4a02 639 return min;
AnnaBridge 161:aa5281ff4a02 640 }
AnnaBridge 161:aa5281ff4a02 641 }
AnnaBridge 161:aa5281ff4a02 642 return val;
AnnaBridge 161:aa5281ff4a02 643 }
AnnaBridge 161:aa5281ff4a02 644
AnnaBridge 161:aa5281ff4a02 645 __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat) {
AnnaBridge 161:aa5281ff4a02 646 if (sat <= 31U) {
AnnaBridge 161:aa5281ff4a02 647 const uint32_t max = ((1U << sat) - 1U);
AnnaBridge 161:aa5281ff4a02 648 if (val > (int32_t)max) {
AnnaBridge 161:aa5281ff4a02 649 return max;
AnnaBridge 161:aa5281ff4a02 650 } else if (val < 0) {
AnnaBridge 161:aa5281ff4a02 651 return 0U;
AnnaBridge 161:aa5281ff4a02 652 }
AnnaBridge 161:aa5281ff4a02 653 }
AnnaBridge 161:aa5281ff4a02 654 return (uint32_t)val;
AnnaBridge 161:aa5281ff4a02 655 }
AnnaBridge 161:aa5281ff4a02 656 #endif
AnnaBridge 161:aa5281ff4a02 657
AnnaBridge 161:aa5281ff4a02 658 #if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
AnnaBridge 161:aa5281ff4a02 659
AnnaBridge 161:aa5281ff4a02 660 __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr) {
AnnaBridge 161:aa5281ff4a02 661 uint32_t res;
AnnaBridge 161:aa5281ff4a02 662 __ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
AnnaBridge 161:aa5281ff4a02 663 return ((uint8_t)res);
AnnaBridge 161:aa5281ff4a02 664 }
AnnaBridge 161:aa5281ff4a02 665
AnnaBridge 161:aa5281ff4a02 666 __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr) {
AnnaBridge 161:aa5281ff4a02 667 uint32_t res;
AnnaBridge 161:aa5281ff4a02 668 __ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
AnnaBridge 161:aa5281ff4a02 669 return ((uint16_t)res);
AnnaBridge 161:aa5281ff4a02 670 }
AnnaBridge 161:aa5281ff4a02 671
AnnaBridge 161:aa5281ff4a02 672 __IAR_FT uint32_t __LDRT(volatile uint32_t *addr) {
AnnaBridge 161:aa5281ff4a02 673 uint32_t res;
AnnaBridge 161:aa5281ff4a02 674 __ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
AnnaBridge 161:aa5281ff4a02 675 return res;
AnnaBridge 161:aa5281ff4a02 676 }
AnnaBridge 161:aa5281ff4a02 677
AnnaBridge 161:aa5281ff4a02 678 __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr) {
AnnaBridge 161:aa5281ff4a02 679 __ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
AnnaBridge 161:aa5281ff4a02 680 }
AnnaBridge 161:aa5281ff4a02 681
AnnaBridge 161:aa5281ff4a02 682 __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr) {
AnnaBridge 161:aa5281ff4a02 683 __ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
AnnaBridge 161:aa5281ff4a02 684 }
AnnaBridge 161:aa5281ff4a02 685
AnnaBridge 161:aa5281ff4a02 686 __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr) {
AnnaBridge 161:aa5281ff4a02 687 __ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
AnnaBridge 161:aa5281ff4a02 688 }
AnnaBridge 161:aa5281ff4a02 689
AnnaBridge 161:aa5281ff4a02 690 #endif /* (__CORTEX_M >= 0x03) */
AnnaBridge 161:aa5281ff4a02 691
AnnaBridge 161:aa5281ff4a02 692 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 161:aa5281ff4a02 693 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 161:aa5281ff4a02 694
AnnaBridge 161:aa5281ff4a02 695
AnnaBridge 161:aa5281ff4a02 696 __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr) {
AnnaBridge 161:aa5281ff4a02 697 uint32_t res;
AnnaBridge 161:aa5281ff4a02 698 __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
AnnaBridge 161:aa5281ff4a02 699 return ((uint8_t)res);
AnnaBridge 161:aa5281ff4a02 700 }
AnnaBridge 161:aa5281ff4a02 701
AnnaBridge 161:aa5281ff4a02 702 __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr) {
AnnaBridge 161:aa5281ff4a02 703 uint32_t res;
AnnaBridge 161:aa5281ff4a02 704 __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
AnnaBridge 161:aa5281ff4a02 705 return ((uint16_t)res);
AnnaBridge 161:aa5281ff4a02 706 }
AnnaBridge 161:aa5281ff4a02 707
AnnaBridge 161:aa5281ff4a02 708 __IAR_FT uint32_t __LDA(volatile uint32_t *ptr) {
AnnaBridge 161:aa5281ff4a02 709 uint32_t res;
AnnaBridge 161:aa5281ff4a02 710 __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
AnnaBridge 161:aa5281ff4a02 711 return res;
AnnaBridge 161:aa5281ff4a02 712 }
AnnaBridge 161:aa5281ff4a02 713
AnnaBridge 161:aa5281ff4a02 714 __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr) {
AnnaBridge 161:aa5281ff4a02 715 __ASM volatile ("STLB %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
AnnaBridge 161:aa5281ff4a02 716 }
AnnaBridge 161:aa5281ff4a02 717
AnnaBridge 161:aa5281ff4a02 718 __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr) {
AnnaBridge 161:aa5281ff4a02 719 __ASM volatile ("STLH %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
AnnaBridge 161:aa5281ff4a02 720 }
AnnaBridge 161:aa5281ff4a02 721
AnnaBridge 161:aa5281ff4a02 722 __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr) {
AnnaBridge 161:aa5281ff4a02 723 __ASM volatile ("STL %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
AnnaBridge 161:aa5281ff4a02 724 }
AnnaBridge 161:aa5281ff4a02 725
AnnaBridge 161:aa5281ff4a02 726 __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr) {
AnnaBridge 161:aa5281ff4a02 727 uint32_t res;
AnnaBridge 161:aa5281ff4a02 728 __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
AnnaBridge 161:aa5281ff4a02 729 return ((uint8_t)res);
AnnaBridge 161:aa5281ff4a02 730 }
AnnaBridge 161:aa5281ff4a02 731
AnnaBridge 161:aa5281ff4a02 732 __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr) {
AnnaBridge 161:aa5281ff4a02 733 uint32_t res;
AnnaBridge 161:aa5281ff4a02 734 __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
AnnaBridge 161:aa5281ff4a02 735 return ((uint16_t)res);
AnnaBridge 161:aa5281ff4a02 736 }
AnnaBridge 161:aa5281ff4a02 737
AnnaBridge 161:aa5281ff4a02 738 __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr) {
AnnaBridge 161:aa5281ff4a02 739 uint32_t res;
AnnaBridge 161:aa5281ff4a02 740 __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
AnnaBridge 161:aa5281ff4a02 741 return res;
AnnaBridge 161:aa5281ff4a02 742 }
AnnaBridge 161:aa5281ff4a02 743
AnnaBridge 161:aa5281ff4a02 744 __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) {
AnnaBridge 161:aa5281ff4a02 745 uint32_t res;
AnnaBridge 161:aa5281ff4a02 746 __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
AnnaBridge 161:aa5281ff4a02 747 return res;
AnnaBridge 161:aa5281ff4a02 748 }
AnnaBridge 161:aa5281ff4a02 749
AnnaBridge 161:aa5281ff4a02 750 __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) {
AnnaBridge 161:aa5281ff4a02 751 uint32_t res;
AnnaBridge 161:aa5281ff4a02 752 __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
AnnaBridge 161:aa5281ff4a02 753 return res;
AnnaBridge 161:aa5281ff4a02 754 }
AnnaBridge 161:aa5281ff4a02 755
AnnaBridge 161:aa5281ff4a02 756 __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) {
AnnaBridge 161:aa5281ff4a02 757 uint32_t res;
AnnaBridge 161:aa5281ff4a02 758 __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
AnnaBridge 161:aa5281ff4a02 759 return res;
AnnaBridge 161:aa5281ff4a02 760 }
AnnaBridge 161:aa5281ff4a02 761
AnnaBridge 161:aa5281ff4a02 762 #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
AnnaBridge 161:aa5281ff4a02 763
AnnaBridge 161:aa5281ff4a02 764 #undef __IAR_FT
AnnaBridge 161:aa5281ff4a02 765 #undef __IAR_M0_FAMILY
AnnaBridge 161:aa5281ff4a02 766 #undef __ICCARM_V8
AnnaBridge 161:aa5281ff4a02 767
AnnaBridge 161:aa5281ff4a02 768 #pragma diag_default=Pe940
AnnaBridge 161:aa5281ff4a02 769 #pragma diag_default=Pe177
AnnaBridge 161:aa5281ff4a02 770
AnnaBridge 161:aa5281ff4a02 771 #endif /* __CMSIS_ICCARM_H__ */