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TARGET_B96B_F446VE/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_tim_ex.h@169:a7c7b631e539, 2018-06-22 (annotated)
- Committer:
- Anna Bridge
- Date:
- Fri Jun 22 15:38:59 2018 +0100
- Revision:
- 169:a7c7b631e539
- Parent:
- 163:e59c8e839560
mbed library. Release version 162
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 156:ff21514d8981 | 1 | /** |
| AnnaBridge | 156:ff21514d8981 | 2 | ****************************************************************************** |
| AnnaBridge | 156:ff21514d8981 | 3 | * @file stm32f4xx_hal_tim_ex.h |
| AnnaBridge | 156:ff21514d8981 | 4 | * @author MCD Application Team |
| AnnaBridge | 156:ff21514d8981 | 5 | * @brief Header file of TIM HAL Extension module. |
| AnnaBridge | 156:ff21514d8981 | 6 | ****************************************************************************** |
| AnnaBridge | 156:ff21514d8981 | 7 | * @attention |
| AnnaBridge | 156:ff21514d8981 | 8 | * |
| AnnaBridge | 156:ff21514d8981 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 156:ff21514d8981 | 10 | * |
| AnnaBridge | 156:ff21514d8981 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 156:ff21514d8981 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 156:ff21514d8981 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 156:ff21514d8981 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 156:ff21514d8981 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 156:ff21514d8981 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 156:ff21514d8981 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 156:ff21514d8981 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 156:ff21514d8981 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 156:ff21514d8981 | 20 | * without specific prior written permission. |
| AnnaBridge | 156:ff21514d8981 | 21 | * |
| AnnaBridge | 156:ff21514d8981 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 156:ff21514d8981 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 156:ff21514d8981 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 156:ff21514d8981 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 156:ff21514d8981 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 156:ff21514d8981 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 156:ff21514d8981 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 156:ff21514d8981 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 156:ff21514d8981 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 156:ff21514d8981 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 156:ff21514d8981 | 32 | * |
| AnnaBridge | 156:ff21514d8981 | 33 | ****************************************************************************** |
| AnnaBridge | 156:ff21514d8981 | 34 | */ |
| AnnaBridge | 156:ff21514d8981 | 35 | |
| AnnaBridge | 156:ff21514d8981 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 37 | #ifndef __STM32F4xx_HAL_TIM_EX_H |
| AnnaBridge | 156:ff21514d8981 | 38 | #define __STM32F4xx_HAL_TIM_EX_H |
| AnnaBridge | 156:ff21514d8981 | 39 | |
| AnnaBridge | 156:ff21514d8981 | 40 | #ifdef __cplusplus |
| AnnaBridge | 156:ff21514d8981 | 41 | extern "C" { |
| AnnaBridge | 156:ff21514d8981 | 42 | #endif |
| AnnaBridge | 156:ff21514d8981 | 43 | |
| AnnaBridge | 156:ff21514d8981 | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 45 | #include "stm32f4xx_hal_def.h" |
| AnnaBridge | 156:ff21514d8981 | 46 | |
| AnnaBridge | 156:ff21514d8981 | 47 | /** @addtogroup STM32F4xx_HAL_Driver |
| AnnaBridge | 156:ff21514d8981 | 48 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 49 | */ |
| AnnaBridge | 156:ff21514d8981 | 50 | |
| AnnaBridge | 156:ff21514d8981 | 51 | /** @addtogroup TIMEx |
| AnnaBridge | 156:ff21514d8981 | 52 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 53 | */ |
| AnnaBridge | 156:ff21514d8981 | 54 | |
| AnnaBridge | 156:ff21514d8981 | 55 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 56 | /** @defgroup TIMEx_Exported_Types TIM Exported Types |
| AnnaBridge | 156:ff21514d8981 | 57 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 58 | */ |
| AnnaBridge | 156:ff21514d8981 | 59 | |
| AnnaBridge | 156:ff21514d8981 | 60 | /** |
| AnnaBridge | 156:ff21514d8981 | 61 | * @brief TIM Hall sensor Configuration Structure definition |
| AnnaBridge | 156:ff21514d8981 | 62 | */ |
| AnnaBridge | 156:ff21514d8981 | 63 | |
| AnnaBridge | 156:ff21514d8981 | 64 | typedef struct |
| AnnaBridge | 156:ff21514d8981 | 65 | { |
| AnnaBridge | 156:ff21514d8981 | 66 | |
| AnnaBridge | 156:ff21514d8981 | 67 | uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. |
| AnnaBridge | 156:ff21514d8981 | 68 | This parameter can be a value of @ref TIM_Input_Capture_Polarity */ |
| AnnaBridge | 156:ff21514d8981 | 69 | |
| AnnaBridge | 156:ff21514d8981 | 70 | uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. |
| AnnaBridge | 156:ff21514d8981 | 71 | This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ |
| AnnaBridge | 156:ff21514d8981 | 72 | |
| AnnaBridge | 156:ff21514d8981 | 73 | uint32_t IC1Filter; /*!< Specifies the input capture filter. |
| AnnaBridge | 156:ff21514d8981 | 74 | This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ |
| AnnaBridge | 156:ff21514d8981 | 75 | |
| AnnaBridge | 156:ff21514d8981 | 76 | uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. |
| AnnaBridge | 156:ff21514d8981 | 77 | This parameter can be a number between Min_Data = 0x0000U and Max_Data = 0xFFFFU */ |
| AnnaBridge | 156:ff21514d8981 | 78 | } TIM_HallSensor_InitTypeDef; |
| AnnaBridge | 156:ff21514d8981 | 79 | |
| AnnaBridge | 156:ff21514d8981 | 80 | /** |
| AnnaBridge | 156:ff21514d8981 | 81 | * @brief TIM Master configuration Structure definition |
| AnnaBridge | 156:ff21514d8981 | 82 | */ |
| AnnaBridge | 156:ff21514d8981 | 83 | typedef struct { |
| AnnaBridge | 156:ff21514d8981 | 84 | uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection. |
| AnnaBridge | 156:ff21514d8981 | 85 | This parameter can be a value of @ref TIM_Master_Mode_Selection */ |
| AnnaBridge | 156:ff21514d8981 | 86 | |
| AnnaBridge | 156:ff21514d8981 | 87 | uint32_t MasterSlaveMode; /*!< Master/slave mode selection. |
| AnnaBridge | 156:ff21514d8981 | 88 | This parameter can be a value of @ref TIM_Master_Slave_Mode */ |
| AnnaBridge | 156:ff21514d8981 | 89 | }TIM_MasterConfigTypeDef; |
| AnnaBridge | 156:ff21514d8981 | 90 | |
| AnnaBridge | 156:ff21514d8981 | 91 | /** |
| AnnaBridge | 156:ff21514d8981 | 92 | * @brief TIM Break and Dead time configuration Structure definition |
| AnnaBridge | 156:ff21514d8981 | 93 | */ |
| AnnaBridge | 156:ff21514d8981 | 94 | typedef struct |
| AnnaBridge | 156:ff21514d8981 | 95 | { |
| AnnaBridge | 156:ff21514d8981 | 96 | uint32_t OffStateRunMode; /*!< TIM off state in run mode. |
| AnnaBridge | 156:ff21514d8981 | 97 | This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */ |
| AnnaBridge | 156:ff21514d8981 | 98 | uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode. |
| AnnaBridge | 156:ff21514d8981 | 99 | This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */ |
| AnnaBridge | 156:ff21514d8981 | 100 | uint32_t LockLevel; /*!< TIM Lock level. |
| AnnaBridge | 156:ff21514d8981 | 101 | This parameter can be a value of @ref TIM_Lock_level */ |
| AnnaBridge | 156:ff21514d8981 | 102 | uint32_t DeadTime; /*!< TIM dead Time. |
| AnnaBridge | 156:ff21514d8981 | 103 | This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */ |
| AnnaBridge | 156:ff21514d8981 | 104 | uint32_t BreakState; /*!< TIM Break State. |
| AnnaBridge | 156:ff21514d8981 | 105 | This parameter can be a value of @ref TIM_Break_Input_enable_disable */ |
| AnnaBridge | 156:ff21514d8981 | 106 | uint32_t BreakPolarity; /*!< TIM Break input polarity. |
| AnnaBridge | 156:ff21514d8981 | 107 | This parameter can be a value of @ref TIM_Break_Polarity */ |
| AnnaBridge | 156:ff21514d8981 | 108 | uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state. |
| AnnaBridge | 156:ff21514d8981 | 109 | This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ |
| AnnaBridge | 156:ff21514d8981 | 110 | }TIM_BreakDeadTimeConfigTypeDef; |
| AnnaBridge | 156:ff21514d8981 | 111 | /** |
| AnnaBridge | 156:ff21514d8981 | 112 | * @} |
| AnnaBridge | 156:ff21514d8981 | 113 | */ |
| AnnaBridge | 156:ff21514d8981 | 114 | |
| AnnaBridge | 156:ff21514d8981 | 115 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 116 | /** @defgroup TIMEx_Exported_Constants TIM Exported Constants |
| AnnaBridge | 156:ff21514d8981 | 117 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 118 | */ |
| AnnaBridge | 156:ff21514d8981 | 119 | |
| AnnaBridge | 156:ff21514d8981 | 120 | /** @defgroup TIMEx_Remap TIM Remap |
| AnnaBridge | 156:ff21514d8981 | 121 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 122 | */ |
| AnnaBridge | 156:ff21514d8981 | 123 | #define TIM_TIM2_TIM8_TRGO 0x00000000U |
| AnnaBridge | 156:ff21514d8981 | 124 | #define TIM_TIM2_ETH_PTP 0x00000400U |
| AnnaBridge | 156:ff21514d8981 | 125 | #define TIM_TIM2_USBFS_SOF 0x00000800U |
| AnnaBridge | 156:ff21514d8981 | 126 | #define TIM_TIM2_USBHS_SOF 0x00000C00U |
| AnnaBridge | 156:ff21514d8981 | 127 | #define TIM_TIM5_GPIO 0x00000000U |
| AnnaBridge | 156:ff21514d8981 | 128 | #define TIM_TIM5_LSI 0x00000040U |
| AnnaBridge | 156:ff21514d8981 | 129 | #define TIM_TIM5_LSE 0x00000080U |
| AnnaBridge | 156:ff21514d8981 | 130 | #define TIM_TIM5_RTC 0x000000C0U |
| AnnaBridge | 156:ff21514d8981 | 131 | #define TIM_TIM11_GPIO 0x00000000U |
| AnnaBridge | 156:ff21514d8981 | 132 | #define TIM_TIM11_HSE 0x00000002U |
| AnnaBridge | 156:ff21514d8981 | 133 | |
| AnnaBridge | 156:ff21514d8981 | 134 | #if defined(STM32F413xx) || defined(STM32F423xx) |
| AnnaBridge | 156:ff21514d8981 | 135 | #define TIM_TIM9_TIM3_TRGO 0x10000000U |
| AnnaBridge | 156:ff21514d8981 | 136 | #define TIM_TIM9_LPTIM 0x10000010U |
| AnnaBridge | 156:ff21514d8981 | 137 | #define TIM_TIM5_TIM3_TRGO 0x10000000U |
| AnnaBridge | 156:ff21514d8981 | 138 | #define TIM_TIM5_LPTIM 0x10000008U |
| AnnaBridge | 156:ff21514d8981 | 139 | #define TIM_TIM1_TIM3_TRGO 0x10000000U |
| AnnaBridge | 156:ff21514d8981 | 140 | #define TIM_TIM1_LPTIM 0x10000004U |
| AnnaBridge | 156:ff21514d8981 | 141 | #endif /* STM32F413xx | STM32F423xx */ |
| AnnaBridge | 156:ff21514d8981 | 142 | |
| AnnaBridge | 156:ff21514d8981 | 143 | #if defined (STM32F446xx) |
| AnnaBridge | 156:ff21514d8981 | 144 | #define TIM_TIM11_SPDIFRX 0x00000001U |
| AnnaBridge | 156:ff21514d8981 | 145 | #endif /* STM32F446xx */ |
| AnnaBridge | 156:ff21514d8981 | 146 | /** |
| AnnaBridge | 156:ff21514d8981 | 147 | * @} |
| AnnaBridge | 156:ff21514d8981 | 148 | */ |
| AnnaBridge | 156:ff21514d8981 | 149 | |
| AnnaBridge | 156:ff21514d8981 | 150 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx) |
| AnnaBridge | 156:ff21514d8981 | 151 | /** @defgroup TIMEx_SystemBreakInput TIM System Break Input |
| AnnaBridge | 156:ff21514d8981 | 152 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 153 | */ |
| AnnaBridge | 156:ff21514d8981 | 154 | #define TIM_SYSTEMBREAKINPUT_HARDFAULT 0x00000001U /* Core Lockup lock output(Hardfault) is connected to Break Input of TIM1 and TIM8 */ |
| AnnaBridge | 156:ff21514d8981 | 155 | #define TIM_SYSTEMBREAKINPUT_PVD 0x00000004U /* PVD Interrupt is connected to Break Input of TIM1 and TIM8 */ |
| AnnaBridge | 156:ff21514d8981 | 156 | #define TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD 0x00000005U /* Core Lockup lock output(Hardfault) and PVD Interrupt are connected to Break Input of TIM1 and TIM8 */ |
| AnnaBridge | 156:ff21514d8981 | 157 | /** |
| AnnaBridge | 156:ff21514d8981 | 158 | * @} |
| AnnaBridge | 156:ff21514d8981 | 159 | */ |
| AnnaBridge | 156:ff21514d8981 | 160 | #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */ |
| AnnaBridge | 156:ff21514d8981 | 161 | |
| AnnaBridge | 156:ff21514d8981 | 162 | /** |
| AnnaBridge | 156:ff21514d8981 | 163 | * @} |
| AnnaBridge | 156:ff21514d8981 | 164 | */ |
| AnnaBridge | 156:ff21514d8981 | 165 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 166 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 167 | /** @addtogroup TIMEx_Exported_Functions |
| AnnaBridge | 156:ff21514d8981 | 168 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 169 | */ |
| AnnaBridge | 156:ff21514d8981 | 170 | |
| AnnaBridge | 156:ff21514d8981 | 171 | /** @addtogroup TIMEx_Exported_Functions_Group1 |
| AnnaBridge | 156:ff21514d8981 | 172 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 173 | */ |
| AnnaBridge | 156:ff21514d8981 | 174 | /* Timer Hall Sensor functions **********************************************/ |
| AnnaBridge | 156:ff21514d8981 | 175 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig); |
| AnnaBridge | 156:ff21514d8981 | 176 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim); |
| AnnaBridge | 156:ff21514d8981 | 177 | |
| AnnaBridge | 156:ff21514d8981 | 178 | void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim); |
| AnnaBridge | 156:ff21514d8981 | 179 | void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim); |
| AnnaBridge | 156:ff21514d8981 | 180 | |
| AnnaBridge | 156:ff21514d8981 | 181 | /* Blocking mode: Polling */ |
| AnnaBridge | 156:ff21514d8981 | 182 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim); |
| AnnaBridge | 156:ff21514d8981 | 183 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim); |
| AnnaBridge | 156:ff21514d8981 | 184 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 156:ff21514d8981 | 185 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim); |
| AnnaBridge | 156:ff21514d8981 | 186 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim); |
| AnnaBridge | 156:ff21514d8981 | 187 | /* Non-Blocking mode: DMA */ |
| AnnaBridge | 156:ff21514d8981 | 188 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length); |
| AnnaBridge | 156:ff21514d8981 | 189 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim); |
| AnnaBridge | 156:ff21514d8981 | 190 | /** |
| AnnaBridge | 156:ff21514d8981 | 191 | * @} |
| AnnaBridge | 156:ff21514d8981 | 192 | */ |
| AnnaBridge | 156:ff21514d8981 | 193 | |
| AnnaBridge | 156:ff21514d8981 | 194 | /** @addtogroup TIMEx_Exported_Functions_Group2 |
| AnnaBridge | 156:ff21514d8981 | 195 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 196 | */ |
| AnnaBridge | 156:ff21514d8981 | 197 | /* Timer Complementary Output Compare functions *****************************/ |
| AnnaBridge | 156:ff21514d8981 | 198 | /* Blocking mode: Polling */ |
| AnnaBridge | 156:ff21514d8981 | 199 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 156:ff21514d8981 | 200 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 156:ff21514d8981 | 201 | |
| AnnaBridge | 156:ff21514d8981 | 202 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 156:ff21514d8981 | 203 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 156:ff21514d8981 | 204 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 156:ff21514d8981 | 205 | |
| AnnaBridge | 156:ff21514d8981 | 206 | /* Non-Blocking mode: DMA */ |
| AnnaBridge | 156:ff21514d8981 | 207 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length); |
| AnnaBridge | 156:ff21514d8981 | 208 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 156:ff21514d8981 | 209 | /** |
| AnnaBridge | 156:ff21514d8981 | 210 | * @} |
| AnnaBridge | 156:ff21514d8981 | 211 | */ |
| AnnaBridge | 156:ff21514d8981 | 212 | |
| AnnaBridge | 156:ff21514d8981 | 213 | /** @addtogroup TIMEx_Exported_Functions_Group3 |
| AnnaBridge | 156:ff21514d8981 | 214 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 215 | */ |
| AnnaBridge | 156:ff21514d8981 | 216 | /* Timer Complementary PWM functions ****************************************/ |
| AnnaBridge | 156:ff21514d8981 | 217 | /* Blocking mode: Polling */ |
| AnnaBridge | 156:ff21514d8981 | 218 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 156:ff21514d8981 | 219 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 156:ff21514d8981 | 220 | |
| AnnaBridge | 156:ff21514d8981 | 221 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 156:ff21514d8981 | 222 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 156:ff21514d8981 | 223 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 156:ff21514d8981 | 224 | /* Non-Blocking mode: DMA */ |
| AnnaBridge | 156:ff21514d8981 | 225 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length); |
| AnnaBridge | 156:ff21514d8981 | 226 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 156:ff21514d8981 | 227 | /** |
| AnnaBridge | 156:ff21514d8981 | 228 | * @} |
| AnnaBridge | 156:ff21514d8981 | 229 | */ |
| AnnaBridge | 156:ff21514d8981 | 230 | |
| AnnaBridge | 156:ff21514d8981 | 231 | /** @addtogroup TIMEx_Exported_Functions_Group4 |
| AnnaBridge | 156:ff21514d8981 | 232 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 233 | */ |
| AnnaBridge | 156:ff21514d8981 | 234 | /* Timer Complementary One Pulse functions **********************************/ |
| AnnaBridge | 156:ff21514d8981 | 235 | /* Blocking mode: Polling */ |
| AnnaBridge | 156:ff21514d8981 | 236 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel); |
| AnnaBridge | 156:ff21514d8981 | 237 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel); |
| AnnaBridge | 156:ff21514d8981 | 238 | |
| AnnaBridge | 156:ff21514d8981 | 239 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 156:ff21514d8981 | 240 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel); |
| AnnaBridge | 156:ff21514d8981 | 241 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel); |
| AnnaBridge | 156:ff21514d8981 | 242 | /** |
| AnnaBridge | 156:ff21514d8981 | 243 | * @} |
| AnnaBridge | 156:ff21514d8981 | 244 | */ |
| AnnaBridge | 156:ff21514d8981 | 245 | |
| AnnaBridge | 156:ff21514d8981 | 246 | /** @addtogroup TIMEx_Exported_Functions_Group5 |
| AnnaBridge | 156:ff21514d8981 | 247 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 248 | */ |
| AnnaBridge | 156:ff21514d8981 | 249 | /* Extension Control functions ************************************************/ |
| AnnaBridge | 156:ff21514d8981 | 250 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource); |
| AnnaBridge | 156:ff21514d8981 | 251 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource); |
| AnnaBridge | 156:ff21514d8981 | 252 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource); |
| AnnaBridge | 156:ff21514d8981 | 253 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig); |
| AnnaBridge | 156:ff21514d8981 | 254 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); |
| AnnaBridge | 156:ff21514d8981 | 255 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap); |
| AnnaBridge | 156:ff21514d8981 | 256 | /** |
| AnnaBridge | 156:ff21514d8981 | 257 | * @} |
| AnnaBridge | 156:ff21514d8981 | 258 | */ |
| AnnaBridge | 156:ff21514d8981 | 259 | |
| AnnaBridge | 156:ff21514d8981 | 260 | /** @addtogroup TIMEx_Exported_Functions_Group6 |
| AnnaBridge | 156:ff21514d8981 | 261 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 262 | */ |
| AnnaBridge | 156:ff21514d8981 | 263 | /* Extension Callback *********************************************************/ |
| AnnaBridge | 156:ff21514d8981 | 264 | void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim); |
| AnnaBridge | 156:ff21514d8981 | 265 | void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim); |
| AnnaBridge | 156:ff21514d8981 | 266 | void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); |
| AnnaBridge | 156:ff21514d8981 | 267 | /** |
| AnnaBridge | 156:ff21514d8981 | 268 | * @} |
| AnnaBridge | 156:ff21514d8981 | 269 | */ |
| AnnaBridge | 156:ff21514d8981 | 270 | |
| AnnaBridge | 156:ff21514d8981 | 271 | /** @addtogroup TIMEx_Exported_Functions_Group7 |
| AnnaBridge | 156:ff21514d8981 | 272 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 273 | */ |
| AnnaBridge | 156:ff21514d8981 | 274 | /* Extension Peripheral State functions **************************************/ |
| AnnaBridge | 156:ff21514d8981 | 275 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim); |
| AnnaBridge | 156:ff21514d8981 | 276 | /** |
| AnnaBridge | 156:ff21514d8981 | 277 | * @} |
| AnnaBridge | 156:ff21514d8981 | 278 | */ |
| AnnaBridge | 156:ff21514d8981 | 279 | |
| AnnaBridge | 156:ff21514d8981 | 280 | /** |
| AnnaBridge | 156:ff21514d8981 | 281 | * @} |
| AnnaBridge | 156:ff21514d8981 | 282 | */ |
| AnnaBridge | 156:ff21514d8981 | 283 | |
| AnnaBridge | 156:ff21514d8981 | 284 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 285 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 286 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 287 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 288 | /** @defgroup TIMEx_Private_Macros TIM Private Macros |
| AnnaBridge | 156:ff21514d8981 | 289 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 290 | */ |
| AnnaBridge | 156:ff21514d8981 | 291 | #if defined (STM32F446xx) |
| AnnaBridge | 156:ff21514d8981 | 292 | #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\ |
| AnnaBridge | 156:ff21514d8981 | 293 | ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\ |
| AnnaBridge | 156:ff21514d8981 | 294 | ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\ |
| AnnaBridge | 156:ff21514d8981 | 295 | ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\ |
| AnnaBridge | 156:ff21514d8981 | 296 | ((TIM_REMAP) == TIM_TIM5_GPIO)||\ |
| AnnaBridge | 156:ff21514d8981 | 297 | ((TIM_REMAP) == TIM_TIM5_LSI)||\ |
| AnnaBridge | 156:ff21514d8981 | 298 | ((TIM_REMAP) == TIM_TIM5_LSE)||\ |
| AnnaBridge | 156:ff21514d8981 | 299 | ((TIM_REMAP) == TIM_TIM5_RTC)||\ |
| AnnaBridge | 156:ff21514d8981 | 300 | ((TIM_REMAP) == TIM_TIM11_GPIO)||\ |
| AnnaBridge | 156:ff21514d8981 | 301 | ((TIM_REMAP) == TIM_TIM11_SPDIFRX)||\ |
| AnnaBridge | 156:ff21514d8981 | 302 | ((TIM_REMAP) == TIM_TIM11_HSE)) |
| AnnaBridge | 156:ff21514d8981 | 303 | #elif defined(STM32F413xx) || defined(STM32F423xx) |
| AnnaBridge | 156:ff21514d8981 | 304 | #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\ |
| AnnaBridge | 156:ff21514d8981 | 305 | ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\ |
| AnnaBridge | 156:ff21514d8981 | 306 | ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\ |
| AnnaBridge | 156:ff21514d8981 | 307 | ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\ |
| AnnaBridge | 156:ff21514d8981 | 308 | ((TIM_REMAP) == TIM_TIM5_GPIO)||\ |
| AnnaBridge | 156:ff21514d8981 | 309 | ((TIM_REMAP) == TIM_TIM5_LSI)||\ |
| AnnaBridge | 156:ff21514d8981 | 310 | ((TIM_REMAP) == TIM_TIM5_LSE)||\ |
| AnnaBridge | 156:ff21514d8981 | 311 | ((TIM_REMAP) == TIM_TIM5_RTC)||\ |
| AnnaBridge | 156:ff21514d8981 | 312 | ((TIM_REMAP) == TIM_TIM11_GPIO)||\ |
| AnnaBridge | 156:ff21514d8981 | 313 | ((TIM_REMAP) == TIM_TIM11_HSE)||\ |
| AnnaBridge | 156:ff21514d8981 | 314 | ((TIM_REMAP) == TIM_TIM9_TIM3_TRGO)||\ |
| AnnaBridge | 156:ff21514d8981 | 315 | ((TIM_REMAP) == TIM_TIM9_LPTIM)||\ |
| AnnaBridge | 156:ff21514d8981 | 316 | ((TIM_REMAP) == TIM_TIM5_TIM3_TRGO)||\ |
| AnnaBridge | 156:ff21514d8981 | 317 | ((TIM_REMAP) == TIM_TIM5_LPTIM)||\ |
| AnnaBridge | 156:ff21514d8981 | 318 | ((TIM_REMAP) == TIM_TIM1_TIM3_TRGO)||\ |
| AnnaBridge | 156:ff21514d8981 | 319 | ((TIM_REMAP) == TIM_TIM1_LPTIM)) |
| AnnaBridge | 156:ff21514d8981 | 320 | #else |
| AnnaBridge | 156:ff21514d8981 | 321 | #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\ |
| AnnaBridge | 156:ff21514d8981 | 322 | ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\ |
| AnnaBridge | 156:ff21514d8981 | 323 | ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\ |
| AnnaBridge | 156:ff21514d8981 | 324 | ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\ |
| AnnaBridge | 156:ff21514d8981 | 325 | ((TIM_REMAP) == TIM_TIM5_GPIO)||\ |
| AnnaBridge | 156:ff21514d8981 | 326 | ((TIM_REMAP) == TIM_TIM5_LSI)||\ |
| AnnaBridge | 156:ff21514d8981 | 327 | ((TIM_REMAP) == TIM_TIM5_LSE)||\ |
| AnnaBridge | 156:ff21514d8981 | 328 | ((TIM_REMAP) == TIM_TIM5_RTC)||\ |
| AnnaBridge | 156:ff21514d8981 | 329 | ((TIM_REMAP) == TIM_TIM11_GPIO)||\ |
| AnnaBridge | 156:ff21514d8981 | 330 | ((TIM_REMAP) == TIM_TIM11_HSE)) |
| AnnaBridge | 156:ff21514d8981 | 331 | #endif /* STM32F446xx */ |
| AnnaBridge | 156:ff21514d8981 | 332 | |
| AnnaBridge | 156:ff21514d8981 | 333 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx) |
| AnnaBridge | 156:ff21514d8981 | 334 | #define IS_TIM_SYSTEMBREAKINPUT(BREAKINPUT) (((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT)||\ |
| AnnaBridge | 156:ff21514d8981 | 335 | ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_PVD)||\ |
| AnnaBridge | 156:ff21514d8981 | 336 | ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD)) |
| AnnaBridge | 156:ff21514d8981 | 337 | |
| AnnaBridge | 156:ff21514d8981 | 338 | #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */ |
| AnnaBridge | 156:ff21514d8981 | 339 | |
| AnnaBridge | 156:ff21514d8981 | 340 | #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFFU) |
| AnnaBridge | 156:ff21514d8981 | 341 | /** |
| AnnaBridge | 156:ff21514d8981 | 342 | * @} |
| AnnaBridge | 156:ff21514d8981 | 343 | */ |
| AnnaBridge | 156:ff21514d8981 | 344 | |
| AnnaBridge | 156:ff21514d8981 | 345 | /* Private functions ---------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 346 | /** @defgroup TIMEx_Private_Functions TIM Private Functions |
| AnnaBridge | 156:ff21514d8981 | 347 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 348 | */ |
| AnnaBridge | 156:ff21514d8981 | 349 | |
| AnnaBridge | 156:ff21514d8981 | 350 | /** |
| AnnaBridge | 156:ff21514d8981 | 351 | * @} |
| AnnaBridge | 156:ff21514d8981 | 352 | */ |
| AnnaBridge | 156:ff21514d8981 | 353 | |
| AnnaBridge | 156:ff21514d8981 | 354 | /** |
| AnnaBridge | 156:ff21514d8981 | 355 | * @} |
| AnnaBridge | 156:ff21514d8981 | 356 | */ |
| AnnaBridge | 156:ff21514d8981 | 357 | |
| AnnaBridge | 156:ff21514d8981 | 358 | /** |
| AnnaBridge | 156:ff21514d8981 | 359 | * @} |
| AnnaBridge | 156:ff21514d8981 | 360 | */ |
| AnnaBridge | 156:ff21514d8981 | 361 | |
| AnnaBridge | 156:ff21514d8981 | 362 | #ifdef __cplusplus |
| AnnaBridge | 156:ff21514d8981 | 363 | } |
| AnnaBridge | 156:ff21514d8981 | 364 | #endif |
| AnnaBridge | 156:ff21514d8981 | 365 | |
| AnnaBridge | 156:ff21514d8981 | 366 | #endif /* __STM32F4xx_HAL_TIM_EX_H */ |
| AnnaBridge | 156:ff21514d8981 | 367 | |
| AnnaBridge | 156:ff21514d8981 | 368 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
