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TARGET_B96B_F446VE/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dsi.h@169:a7c7b631e539, 2018-06-22 (annotated)

Committer:: Anna Bridge
Date:: Fri Jun 22 15:38:59 2018 +0100
Revision:: 169:a7c7b631e539
Parent:: 163:e59c8e839560

mbed library. Release version 162

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	156:ff21514d8981	1	/**
AnnaBridge	156:ff21514d8981	2	******************************************************************************
AnnaBridge	156:ff21514d8981	3	* @file stm32f4xx_hal_dsi.h
AnnaBridge	156:ff21514d8981	4	* @author MCD Application Team
AnnaBridge	156:ff21514d8981	5	* @brief Header file of DSI HAL module.
AnnaBridge	156:ff21514d8981	6	******************************************************************************
AnnaBridge	156:ff21514d8981	7	* @attention
AnnaBridge	156:ff21514d8981	8	*
AnnaBridge	156:ff21514d8981	9	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge	156:ff21514d8981	10	*
AnnaBridge	156:ff21514d8981	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	156:ff21514d8981	12	* are permitted provided that the following conditions are met:
AnnaBridge	156:ff21514d8981	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	156:ff21514d8981	14	* this list of conditions and the following disclaimer.
AnnaBridge	156:ff21514d8981	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	156:ff21514d8981	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	156:ff21514d8981	17	* and/or other materials provided with the distribution.
AnnaBridge	156:ff21514d8981	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	156:ff21514d8981	19	* may be used to endorse or promote products derived from this software
AnnaBridge	156:ff21514d8981	20	* without specific prior written permission.
AnnaBridge	156:ff21514d8981	21	*
AnnaBridge	156:ff21514d8981	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	156:ff21514d8981	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	156:ff21514d8981	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	156:ff21514d8981	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	156:ff21514d8981	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	156:ff21514d8981	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	156:ff21514d8981	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	156:ff21514d8981	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	156:ff21514d8981	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	156:ff21514d8981	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	156:ff21514d8981	32	*
AnnaBridge	156:ff21514d8981	33	******************************************************************************
AnnaBridge	156:ff21514d8981	34	*/
AnnaBridge	156:ff21514d8981	35
AnnaBridge	156:ff21514d8981	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	156:ff21514d8981	37	#ifndef __STM32F4xx_HAL_DSI_H
AnnaBridge	156:ff21514d8981	38	#define __STM32F4xx_HAL_DSI_H
AnnaBridge	156:ff21514d8981	39
AnnaBridge	156:ff21514d8981	40	#ifdef __cplusplus
AnnaBridge	156:ff21514d8981	41	extern "C" {
AnnaBridge	156:ff21514d8981	42	#endif
AnnaBridge	156:ff21514d8981	43
AnnaBridge	163:e59c8e839560	44	#if defined(DSI)
AnnaBridge	156:ff21514d8981	45	/* Includes ------------------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	46	#include "stm32f4xx_hal_def.h"
AnnaBridge	156:ff21514d8981	47
AnnaBridge	156:ff21514d8981	48	/** @addtogroup STM32F4xx_HAL_Driver
AnnaBridge	156:ff21514d8981	49	* @{
AnnaBridge	156:ff21514d8981	50	*/
AnnaBridge	156:ff21514d8981	51
AnnaBridge	156:ff21514d8981	52	/** @defgroup DSI DSI
AnnaBridge	156:ff21514d8981	53	* @brief DSI HAL module driver
AnnaBridge	156:ff21514d8981	54	* @{
AnnaBridge	163:e59c8e839560	55	*/
AnnaBridge	156:ff21514d8981	56
AnnaBridge	156:ff21514d8981	57	/* Exported types ------------------------------------------------------------*/
AnnaBridge	163:e59c8e839560	58	/**
AnnaBridge	156:ff21514d8981	59	* @brief DSI Init Structure definition
AnnaBridge	156:ff21514d8981	60	*/
AnnaBridge	156:ff21514d8981	61	typedef struct
AnnaBridge	156:ff21514d8981	62	{
AnnaBridge	156:ff21514d8981	63	uint32_t AutomaticClockLaneControl; /*!< Automatic clock lane control
AnnaBridge	156:ff21514d8981	64	This parameter can be any value of @ref DSI_Automatic_Clk_Lane_Control */
AnnaBridge	156:ff21514d8981	65
AnnaBridge	156:ff21514d8981	66	uint32_t TXEscapeCkdiv; /*!< TX Escape clock division
AnnaBridge	156:ff21514d8981	67	The values 0 and 1 stop the TX_ESC clock generation */
AnnaBridge	156:ff21514d8981	68
AnnaBridge	156:ff21514d8981	69	uint32_t NumberOfLanes; /*!< Number of lanes
AnnaBridge	156:ff21514d8981	70	This parameter can be any value of @ref DSI_Number_Of_Lanes */
AnnaBridge	156:ff21514d8981	71
AnnaBridge	156:ff21514d8981	72	}DSI_InitTypeDef;
AnnaBridge	156:ff21514d8981	73
AnnaBridge	163:e59c8e839560	74	/**
AnnaBridge	163:e59c8e839560	75	* @brief DSI PLL Clock structure definition
AnnaBridge	156:ff21514d8981	76	*/
AnnaBridge	156:ff21514d8981	77	typedef struct
AnnaBridge	156:ff21514d8981	78	{
AnnaBridge	156:ff21514d8981	79	uint32_t PLLNDIV; /*!< PLL Loop Division Factor
AnnaBridge	156:ff21514d8981	80	This parameter must be a value between 10 and 125 */
AnnaBridge	156:ff21514d8981	81
AnnaBridge	156:ff21514d8981	82	uint32_t PLLIDF; /*!< PLL Input Division Factor
AnnaBridge	156:ff21514d8981	83	This parameter can be any value of @ref DSI_PLL_IDF */
AnnaBridge	156:ff21514d8981	84
AnnaBridge	156:ff21514d8981	85	uint32_t PLLODF; /*!< PLL Output Division Factor
AnnaBridge	156:ff21514d8981	86	This parameter can be any value of @ref DSI_PLL_ODF */
AnnaBridge	156:ff21514d8981	87
AnnaBridge	156:ff21514d8981	88	}DSI_PLLInitTypeDef;
AnnaBridge	156:ff21514d8981	89
AnnaBridge	163:e59c8e839560	90	/**
AnnaBridge	156:ff21514d8981	91	* @brief DSI Video mode configuration
AnnaBridge	156:ff21514d8981	92	*/
AnnaBridge	163:e59c8e839560	93	typedef struct
AnnaBridge	156:ff21514d8981	94	{
AnnaBridge	156:ff21514d8981	95	uint32_t VirtualChannelID; /!< Virtual channel ID /
AnnaBridge	163:e59c8e839560	96
AnnaBridge	156:ff21514d8981	97	uint32_t ColorCoding; /*!< Color coding for LTDC interface
AnnaBridge	156:ff21514d8981	98	This parameter can be any value of @ref DSI_Color_Coding */
AnnaBridge	163:e59c8e839560	99
AnnaBridge	156:ff21514d8981	100	uint32_t LooselyPacked; /*!< Enable or disable loosely packed stream (needed only when using
AnnaBridge	156:ff21514d8981	101	18-bit configuration).
AnnaBridge	156:ff21514d8981	102	This parameter can be any value of @ref DSI_LooselyPacked */
AnnaBridge	163:e59c8e839560	103
AnnaBridge	156:ff21514d8981	104	uint32_t Mode; /*!< Video mode type
AnnaBridge	156:ff21514d8981	105	This parameter can be any value of @ref DSI_Video_Mode_Type */
AnnaBridge	163:e59c8e839560	106
AnnaBridge	156:ff21514d8981	107	uint32_t PacketSize; /!< Video packet size /
AnnaBridge	163:e59c8e839560	108
AnnaBridge	156:ff21514d8981	109	uint32_t NumberOfChunks; /!< Number of chunks /
AnnaBridge	163:e59c8e839560	110
AnnaBridge	156:ff21514d8981	111	uint32_t NullPacketSize; /!< Null packet size /
AnnaBridge	163:e59c8e839560	112
AnnaBridge	156:ff21514d8981	113	uint32_t HSPolarity; /*!< HSYNC pin polarity
AnnaBridge	156:ff21514d8981	114	This parameter can be any value of @ref DSI_HSYNC_Polarity */
AnnaBridge	163:e59c8e839560	115
AnnaBridge	156:ff21514d8981	116	uint32_t VSPolarity; /*!< VSYNC pin polarity
AnnaBridge	156:ff21514d8981	117	This parameter can be any value of @ref DSI_VSYNC_Active_Polarity */
AnnaBridge	163:e59c8e839560	118
AnnaBridge	156:ff21514d8981	119	uint32_t DEPolarity; /*!< Data Enable pin polarity
AnnaBridge	156:ff21514d8981	120	This parameter can be any value of @ref DSI_DATA_ENABLE_Polarity */
AnnaBridge	163:e59c8e839560	121
AnnaBridge	156:ff21514d8981	122	uint32_t HorizontalSyncActive; /!< Horizontal synchronism active duration (in lane byte clock cycles) /
AnnaBridge	163:e59c8e839560	123
AnnaBridge	156:ff21514d8981	124	uint32_t HorizontalBackPorch; /!< Horizontal back-porch duration (in lane byte clock cycles) /
AnnaBridge	163:e59c8e839560	125
AnnaBridge	156:ff21514d8981	126	uint32_t HorizontalLine; /!< Horizontal line duration (in lane byte clock cycles) /
AnnaBridge	163:e59c8e839560	127
AnnaBridge	156:ff21514d8981	128	uint32_t VerticalSyncActive; /!< Vertical synchronism active duration /
AnnaBridge	163:e59c8e839560	129
AnnaBridge	156:ff21514d8981	130	uint32_t VerticalBackPorch; /!< Vertical back-porch duration /
AnnaBridge	163:e59c8e839560	131
AnnaBridge	156:ff21514d8981	132	uint32_t VerticalFrontPorch; /!< Vertical front-porch duration /
AnnaBridge	163:e59c8e839560	133
AnnaBridge	156:ff21514d8981	134	uint32_t VerticalActive; /!< Vertical active duration /
AnnaBridge	163:e59c8e839560	135
AnnaBridge	156:ff21514d8981	136	uint32_t LPCommandEnable; /*!< Low-power command enable
AnnaBridge	156:ff21514d8981	137	This parameter can be any value of @ref DSI_LP_Command */
AnnaBridge	163:e59c8e839560	138
AnnaBridge	156:ff21514d8981	139	uint32_t LPLargestPacketSize; /*!< The size, in bytes, of the low power largest packet that
AnnaBridge	156:ff21514d8981	140	can fit in a line during VSA, VBP and VFP regions */
AnnaBridge	163:e59c8e839560	141
AnnaBridge	156:ff21514d8981	142	uint32_t LPVACTLargestPacketSize; /*!< The size, in bytes, of the low power largest packet that
AnnaBridge	156:ff21514d8981	143	can fit in a line during VACT region */
AnnaBridge	163:e59c8e839560	144
AnnaBridge	156:ff21514d8981	145	uint32_t LPHorizontalFrontPorchEnable; /*!< Low-power horizontal front-porch enable
AnnaBridge	156:ff21514d8981	146	This parameter can be any value of @ref DSI_LP_HFP */
AnnaBridge	163:e59c8e839560	147
AnnaBridge	156:ff21514d8981	148	uint32_t LPHorizontalBackPorchEnable; /*!< Low-power horizontal back-porch enable
AnnaBridge	156:ff21514d8981	149	This parameter can be any value of @ref DSI_LP_HBP */
AnnaBridge	163:e59c8e839560	150
AnnaBridge	156:ff21514d8981	151	uint32_t LPVerticalActiveEnable; /*!< Low-power vertical active enable
AnnaBridge	156:ff21514d8981	152	This parameter can be any value of @ref DSI_LP_VACT */
AnnaBridge	163:e59c8e839560	153
AnnaBridge	156:ff21514d8981	154	uint32_t LPVerticalFrontPorchEnable; /*!< Low-power vertical front-porch enable
AnnaBridge	156:ff21514d8981	155	This parameter can be any value of @ref DSI_LP_VFP */
AnnaBridge	163:e59c8e839560	156
AnnaBridge	156:ff21514d8981	157	uint32_t LPVerticalBackPorchEnable; /*!< Low-power vertical back-porch enable
AnnaBridge	156:ff21514d8981	158	This parameter can be any value of @ref DSI_LP_VBP */
AnnaBridge	163:e59c8e839560	159
AnnaBridge	156:ff21514d8981	160	uint32_t LPVerticalSyncActiveEnable; /*!< Low-power vertical sync active enable
AnnaBridge	156:ff21514d8981	161	This parameter can be any value of @ref DSI_LP_VSYNC */
AnnaBridge	163:e59c8e839560	162
AnnaBridge	156:ff21514d8981	163	uint32_t FrameBTAAcknowledgeEnable; /*!< Frame bus-turn-around acknowledge enable
AnnaBridge	156:ff21514d8981	164	This parameter can be any value of @ref DSI_FBTA_acknowledge */
AnnaBridge	163:e59c8e839560	165
AnnaBridge	156:ff21514d8981	166	}DSI_VidCfgTypeDef;
AnnaBridge	156:ff21514d8981	167
AnnaBridge	163:e59c8e839560	168	/**
AnnaBridge	156:ff21514d8981	169	* @brief DSI Adapted command mode configuration
AnnaBridge	156:ff21514d8981	170	*/
AnnaBridge	163:e59c8e839560	171	typedef struct
AnnaBridge	156:ff21514d8981	172	{
AnnaBridge	156:ff21514d8981	173	uint32_t VirtualChannelID; /!< Virtual channel ID /
AnnaBridge	156:ff21514d8981	174
AnnaBridge	156:ff21514d8981	175	uint32_t ColorCoding; /*!< Color coding for LTDC interface
AnnaBridge	156:ff21514d8981	176	This parameter can be any value of @ref DSI_Color_Coding */
AnnaBridge	156:ff21514d8981	177
AnnaBridge	163:e59c8e839560	178	uint32_t CommandSize; /*!< Maximum allowed size for an LTDC write memory command, measured in
AnnaBridge	156:ff21514d8981	179	pixels. This parameter can be any value between 0x00 and 0xFFFFU */
AnnaBridge	156:ff21514d8981	180
AnnaBridge	156:ff21514d8981	181	uint32_t TearingEffectSource; /*!< Tearing effect source
AnnaBridge	156:ff21514d8981	182	This parameter can be any value of @ref DSI_TearingEffectSource */
AnnaBridge	156:ff21514d8981	183
AnnaBridge	156:ff21514d8981	184	uint32_t TearingEffectPolarity; /*!< Tearing effect pin polarity
AnnaBridge	156:ff21514d8981	185	This parameter can be any value of @ref DSI_TearingEffectPolarity */
AnnaBridge	156:ff21514d8981	186
AnnaBridge	156:ff21514d8981	187	uint32_t HSPolarity; /*!< HSYNC pin polarity
AnnaBridge	156:ff21514d8981	188	This parameter can be any value of @ref DSI_HSYNC_Polarity */
AnnaBridge	156:ff21514d8981	189
AnnaBridge	156:ff21514d8981	190	uint32_t VSPolarity; /*!< VSYNC pin polarity
AnnaBridge	156:ff21514d8981	191	This parameter can be any value of @ref DSI_VSYNC_Active_Polarity */
AnnaBridge	156:ff21514d8981	192
AnnaBridge	156:ff21514d8981	193	uint32_t DEPolarity; /*!< Data Enable pin polarity
AnnaBridge	156:ff21514d8981	194	This parameter can be any value of @ref DSI_DATA_ENABLE_Polarity */
AnnaBridge	156:ff21514d8981	195
AnnaBridge	156:ff21514d8981	196	uint32_t VSyncPol; /*!< VSync edge on which the LTDC is halted
AnnaBridge	156:ff21514d8981	197	This parameter can be any value of @ref DSI_Vsync_Polarity */
AnnaBridge	156:ff21514d8981	198
AnnaBridge	156:ff21514d8981	199	uint32_t AutomaticRefresh; /*!< Automatic refresh mode
AnnaBridge	156:ff21514d8981	200	This parameter can be any value of @ref DSI_AutomaticRefresh */
AnnaBridge	156:ff21514d8981	201
AnnaBridge	156:ff21514d8981	202	uint32_t TEAcknowledgeRequest; /*!< Tearing Effect Acknowledge Request Enable
AnnaBridge	156:ff21514d8981	203	This parameter can be any value of @ref DSI_TE_AcknowledgeRequest */
AnnaBridge	156:ff21514d8981	204
AnnaBridge	156:ff21514d8981	205	}DSI_CmdCfgTypeDef;
AnnaBridge	156:ff21514d8981	206
AnnaBridge	163:e59c8e839560	207	/**
AnnaBridge	156:ff21514d8981	208	* @brief DSI command transmission mode configuration
AnnaBridge	156:ff21514d8981	209	*/
AnnaBridge	163:e59c8e839560	210	typedef struct
AnnaBridge	156:ff21514d8981	211	{
AnnaBridge	156:ff21514d8981	212	uint32_t LPGenShortWriteNoP; /*!< Generic Short Write Zero parameters Transmission
AnnaBridge	156:ff21514d8981	213	This parameter can be any value of @ref DSI_LP_LPGenShortWriteNoP */
AnnaBridge	156:ff21514d8981	214
AnnaBridge	156:ff21514d8981	215	uint32_t LPGenShortWriteOneP; /*!< Generic Short Write One parameter Transmission
AnnaBridge	156:ff21514d8981	216	This parameter can be any value of @ref DSI_LP_LPGenShortWriteOneP */
AnnaBridge	156:ff21514d8981	217
AnnaBridge	156:ff21514d8981	218	uint32_t LPGenShortWriteTwoP; /*!< Generic Short Write Two parameters Transmission
AnnaBridge	156:ff21514d8981	219	This parameter can be any value of @ref DSI_LP_LPGenShortWriteTwoP */
AnnaBridge	156:ff21514d8981	220
AnnaBridge	156:ff21514d8981	221	uint32_t LPGenShortReadNoP; /*!< Generic Short Read Zero parameters Transmission
AnnaBridge	156:ff21514d8981	222	This parameter can be any value of @ref DSI_LP_LPGenShortReadNoP */
AnnaBridge	156:ff21514d8981	223
AnnaBridge	156:ff21514d8981	224	uint32_t LPGenShortReadOneP; /*!< Generic Short Read One parameter Transmission
AnnaBridge	156:ff21514d8981	225	This parameter can be any value of @ref DSI_LP_LPGenShortReadOneP */
AnnaBridge	156:ff21514d8981	226
AnnaBridge	156:ff21514d8981	227	uint32_t LPGenShortReadTwoP; /*!< Generic Short Read Two parameters Transmission
AnnaBridge	156:ff21514d8981	228	This parameter can be any value of @ref DSI_LP_LPGenShortReadTwoP */
AnnaBridge	156:ff21514d8981	229
AnnaBridge	156:ff21514d8981	230	uint32_t LPGenLongWrite; /*!< Generic Long Write Transmission
AnnaBridge	156:ff21514d8981	231	This parameter can be any value of @ref DSI_LP_LPGenLongWrite */
AnnaBridge	156:ff21514d8981	232
AnnaBridge	156:ff21514d8981	233	uint32_t LPDcsShortWriteNoP; /*!< DCS Short Write Zero parameters Transmission
AnnaBridge	156:ff21514d8981	234	This parameter can be any value of @ref DSI_LP_LPDcsShortWriteNoP */
AnnaBridge	156:ff21514d8981	235
AnnaBridge	156:ff21514d8981	236	uint32_t LPDcsShortWriteOneP; /*!< DCS Short Write One parameter Transmission
AnnaBridge	156:ff21514d8981	237	This parameter can be any value of @ref DSI_LP_LPDcsShortWriteOneP */
AnnaBridge	156:ff21514d8981	238
AnnaBridge	156:ff21514d8981	239	uint32_t LPDcsShortReadNoP; /*!< DCS Short Read Zero parameters Transmission
AnnaBridge	156:ff21514d8981	240	This parameter can be any value of @ref DSI_LP_LPDcsShortReadNoP */
AnnaBridge	156:ff21514d8981	241
AnnaBridge	156:ff21514d8981	242	uint32_t LPDcsLongWrite; /*!< DCS Long Write Transmission
AnnaBridge	156:ff21514d8981	243	This parameter can be any value of @ref DSI_LP_LPDcsLongWrite */
AnnaBridge	156:ff21514d8981	244
AnnaBridge	156:ff21514d8981	245	uint32_t LPMaxReadPacket; /*!< Maximum Read Packet Size Transmission
AnnaBridge	156:ff21514d8981	246	This parameter can be any value of @ref DSI_LP_LPMaxReadPacket */
AnnaBridge	156:ff21514d8981	247
AnnaBridge	156:ff21514d8981	248	uint32_t AcknowledgeRequest; /*!< Acknowledge Request Enable
AnnaBridge	156:ff21514d8981	249	This parameter can be any value of @ref DSI_AcknowledgeRequest */
AnnaBridge	156:ff21514d8981	250
AnnaBridge	156:ff21514d8981	251	}DSI_LPCmdTypeDef;
AnnaBridge	156:ff21514d8981	252
AnnaBridge	163:e59c8e839560	253	/**
AnnaBridge	156:ff21514d8981	254	* @brief DSI PHY Timings definition
AnnaBridge	156:ff21514d8981	255	*/
AnnaBridge	163:e59c8e839560	256	typedef struct
AnnaBridge	156:ff21514d8981	257	{
AnnaBridge	156:ff21514d8981	258	uint32_t ClockLaneHS2LPTime; /*!< The maximum time that the D-PHY clock lane takes to go from high-speed
AnnaBridge	156:ff21514d8981	259	to low-power transmission */
AnnaBridge	156:ff21514d8981	260
AnnaBridge	156:ff21514d8981	261	uint32_t ClockLaneLP2HSTime; /*!< The maximum time that the D-PHY clock lane takes to go from low-power
AnnaBridge	156:ff21514d8981	262	to high-speed transmission */
AnnaBridge	156:ff21514d8981	263
AnnaBridge	156:ff21514d8981	264	uint32_t DataLaneHS2LPTime; /*!< The maximum time that the D-PHY data lanes takes to go from high-speed
AnnaBridge	156:ff21514d8981	265	to low-power transmission */
AnnaBridge	156:ff21514d8981	266
AnnaBridge	156:ff21514d8981	267	uint32_t DataLaneLP2HSTime; /*!< The maximum time that the D-PHY data lanes takes to go from low-power
AnnaBridge	156:ff21514d8981	268	to high-speed transmission */
AnnaBridge	156:ff21514d8981	269
AnnaBridge	156:ff21514d8981	270	uint32_t DataLaneMaxReadTime; /!< The maximum time required to perform a read command /
AnnaBridge	156:ff21514d8981	271
AnnaBridge	156:ff21514d8981	272	uint32_t StopWaitTime; /*!< The minimum wait period to request a High-Speed transmission after the
AnnaBridge	156:ff21514d8981	273	Stop state */
AnnaBridge	156:ff21514d8981	274
AnnaBridge	156:ff21514d8981	275	}DSI_PHY_TimerTypeDef;
AnnaBridge	156:ff21514d8981	276
AnnaBridge	163:e59c8e839560	277	/**
AnnaBridge	156:ff21514d8981	278	* @brief DSI HOST Timeouts definition
AnnaBridge	156:ff21514d8981	279	*/
AnnaBridge	163:e59c8e839560	280	typedef struct
AnnaBridge	156:ff21514d8981	281	{
AnnaBridge	156:ff21514d8981	282	uint32_t TimeoutCkdiv; /!< Time-out clock division /
AnnaBridge	156:ff21514d8981	283
AnnaBridge	156:ff21514d8981	284	uint32_t HighSpeedTransmissionTimeout; /!< High-speed transmission time-out /
AnnaBridge	156:ff21514d8981	285
AnnaBridge	156:ff21514d8981	286	uint32_t LowPowerReceptionTimeout; /!< Low-power reception time-out /
AnnaBridge	156:ff21514d8981	287
AnnaBridge	156:ff21514d8981	288	uint32_t HighSpeedReadTimeout; /!< High-speed read time-out /
AnnaBridge	156:ff21514d8981	289
AnnaBridge	156:ff21514d8981	290	uint32_t LowPowerReadTimeout; /!< Low-power read time-out /
AnnaBridge	156:ff21514d8981	291
AnnaBridge	156:ff21514d8981	292	uint32_t HighSpeedWriteTimeout; /!< High-speed write time-out /
AnnaBridge	156:ff21514d8981	293
AnnaBridge	156:ff21514d8981	294	uint32_t HighSpeedWritePrespMode; /*!< High-speed write presp mode
AnnaBridge	156:ff21514d8981	295	This parameter can be any value of @ref DSI_HS_PrespMode */
AnnaBridge	156:ff21514d8981	296
AnnaBridge	156:ff21514d8981	297	uint32_t LowPowerWriteTimeout; /!< Low-speed write time-out /
AnnaBridge	156:ff21514d8981	298
AnnaBridge	156:ff21514d8981	299	uint32_t BTATimeout; /!< BTA time-out /
AnnaBridge	156:ff21514d8981	300
AnnaBridge	156:ff21514d8981	301	}DSI_HOST_TimeoutTypeDef;
AnnaBridge	156:ff21514d8981	302
AnnaBridge	156:ff21514d8981	303	/**
AnnaBridge	156:ff21514d8981	304	* @brief DSI States Structure definition
AnnaBridge	156:ff21514d8981	305	*/
AnnaBridge	163:e59c8e839560	306	typedef enum
AnnaBridge	156:ff21514d8981	307	{
AnnaBridge	156:ff21514d8981	308	HAL_DSI_STATE_RESET = 0x00U,
AnnaBridge	156:ff21514d8981	309	HAL_DSI_STATE_READY = 0x01U,
AnnaBridge	156:ff21514d8981	310	HAL_DSI_STATE_ERROR = 0x02U,
AnnaBridge	156:ff21514d8981	311	HAL_DSI_STATE_BUSY = 0x03U,
AnnaBridge	156:ff21514d8981	312	HAL_DSI_STATE_TIMEOUT = 0x04U
AnnaBridge	156:ff21514d8981	313	}HAL_DSI_StateTypeDef;
AnnaBridge	156:ff21514d8981	314
AnnaBridge	156:ff21514d8981	315	/**
AnnaBridge	156:ff21514d8981	316	* @brief DSI Handle Structure definition
AnnaBridge	156:ff21514d8981	317	*/
AnnaBridge	156:ff21514d8981	318	typedef struct
AnnaBridge	156:ff21514d8981	319	{
AnnaBridge	156:ff21514d8981	320	DSI_TypeDef Instance; /!< Register base address */
AnnaBridge	156:ff21514d8981	321	DSI_InitTypeDef Init; /!< DSI required parameters /
AnnaBridge	156:ff21514d8981	322	HAL_LockTypeDef Lock; /!< DSI peripheral status /
AnnaBridge	156:ff21514d8981	323	__IO HAL_DSI_StateTypeDef State; /!< DSI communication state /
AnnaBridge	156:ff21514d8981	324	__IO uint32_t ErrorCode; /!< DSI Error code /
AnnaBridge	156:ff21514d8981	325	uint32_t ErrorMsk; /!< DSI Error monitoring mask /
AnnaBridge	156:ff21514d8981	326	}DSI_HandleTypeDef;
AnnaBridge	156:ff21514d8981	327
AnnaBridge	156:ff21514d8981	328	/* Exported constants --------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	329	/** @defgroup DSI_DCS_Command DSI DCS Command
AnnaBridge	156:ff21514d8981	330	* @{
AnnaBridge	156:ff21514d8981	331	*/
AnnaBridge	156:ff21514d8981	332	#define DSI_ENTER_IDLE_MODE 0x39U
AnnaBridge	156:ff21514d8981	333	#define DSI_ENTER_INVERT_MODE 0x21U
AnnaBridge	156:ff21514d8981	334	#define DSI_ENTER_NORMAL_MODE 0x13U
AnnaBridge	156:ff21514d8981	335	#define DSI_ENTER_PARTIAL_MODE 0x12U
AnnaBridge	156:ff21514d8981	336	#define DSI_ENTER_SLEEP_MODE 0x10U
AnnaBridge	156:ff21514d8981	337	#define DSI_EXIT_IDLE_MODE 0x38U
AnnaBridge	156:ff21514d8981	338	#define DSI_EXIT_INVERT_MODE 0x20U
AnnaBridge	156:ff21514d8981	339	#define DSI_EXIT_SLEEP_MODE 0x11U
AnnaBridge	156:ff21514d8981	340	#define DSI_GET_3D_CONTROL 0x3FU
AnnaBridge	156:ff21514d8981	341	#define DSI_GET_ADDRESS_MODE 0x0BU
AnnaBridge	156:ff21514d8981	342	#define DSI_GET_BLUE_CHANNEL 0x08U
AnnaBridge	156:ff21514d8981	343	#define DSI_GET_DIAGNOSTIC_RESULT 0x0FU
AnnaBridge	156:ff21514d8981	344	#define DSI_GET_DISPLAY_MODE 0x0DU
AnnaBridge	156:ff21514d8981	345	#define DSI_GET_GREEN_CHANNEL 0x07U
AnnaBridge	156:ff21514d8981	346	#define DSI_GET_PIXEL_FORMAT 0x0CU
AnnaBridge	156:ff21514d8981	347	#define DSI_GET_POWER_MODE 0x0AU
AnnaBridge	156:ff21514d8981	348	#define DSI_GET_RED_CHANNEL 0x06U
AnnaBridge	156:ff21514d8981	349	#define DSI_GET_SCANLINE 0x45U
AnnaBridge	156:ff21514d8981	350	#define DSI_GET_SIGNAL_MODE 0x0EU
AnnaBridge	156:ff21514d8981	351	#define DSI_NOP 0x00U
AnnaBridge	156:ff21514d8981	352	#define DSI_READ_DDB_CONTINUE 0xA8U
AnnaBridge	156:ff21514d8981	353	#define DSI_READ_DDB_START 0xA1U
AnnaBridge	156:ff21514d8981	354	#define DSI_READ_MEMORY_CONTINUE 0x3EU
AnnaBridge	156:ff21514d8981	355	#define DSI_READ_MEMORY_START 0x2EU
AnnaBridge	156:ff21514d8981	356	#define DSI_SET_3D_CONTROL 0x3DU
AnnaBridge	156:ff21514d8981	357	#define DSI_SET_ADDRESS_MODE 0x36U
AnnaBridge	156:ff21514d8981	358	#define DSI_SET_COLUMN_ADDRESS 0x2AU
AnnaBridge	156:ff21514d8981	359	#define DSI_SET_DISPLAY_OFF 0x28U
AnnaBridge	156:ff21514d8981	360	#define DSI_SET_DISPLAY_ON 0x29U
AnnaBridge	156:ff21514d8981	361	#define DSI_SET_GAMMA_CURVE 0x26U
AnnaBridge	156:ff21514d8981	362	#define DSI_SET_PAGE_ADDRESS 0x2BU
AnnaBridge	156:ff21514d8981	363	#define DSI_SET_PARTIAL_COLUMNS 0x31U
AnnaBridge	156:ff21514d8981	364	#define DSI_SET_PARTIAL_ROWS 0x30U
AnnaBridge	156:ff21514d8981	365	#define DSI_SET_PIXEL_FORMAT 0x3AU
AnnaBridge	156:ff21514d8981	366	#define DSI_SET_SCROLL_AREA 0x33U
AnnaBridge	156:ff21514d8981	367	#define DSI_SET_SCROLL_START 0x37U
AnnaBridge	156:ff21514d8981	368	#define DSI_SET_TEAR_OFF 0x34U
AnnaBridge	156:ff21514d8981	369	#define DSI_SET_TEAR_ON 0x35U
AnnaBridge	156:ff21514d8981	370	#define DSI_SET_TEAR_SCANLINE 0x44U
AnnaBridge	156:ff21514d8981	371	#define DSI_SET_VSYNC_TIMING 0x40U
AnnaBridge	156:ff21514d8981	372	#define DSI_SOFT_RESET 0x01U
AnnaBridge	156:ff21514d8981	373	#define DSI_WRITE_LUT 0x2DU
AnnaBridge	156:ff21514d8981	374	#define DSI_WRITE_MEMORY_CONTINUE 0x3CU
AnnaBridge	156:ff21514d8981	375	#define DSI_WRITE_MEMORY_START 0x2CU
AnnaBridge	156:ff21514d8981	376	/**
AnnaBridge	156:ff21514d8981	377	* @}
AnnaBridge	156:ff21514d8981	378	*/
AnnaBridge	156:ff21514d8981	379
AnnaBridge	156:ff21514d8981	380	/** @defgroup DSI_Video_Mode_Type DSI Video Mode Type
AnnaBridge	156:ff21514d8981	381	* @{
AnnaBridge	156:ff21514d8981	382	*/
AnnaBridge	156:ff21514d8981	383	#define DSI_VID_MODE_NB_PULSES 0U
AnnaBridge	156:ff21514d8981	384	#define DSI_VID_MODE_NB_EVENTS 1U
AnnaBridge	156:ff21514d8981	385	#define DSI_VID_MODE_BURST 2U
AnnaBridge	156:ff21514d8981	386	/**
AnnaBridge	156:ff21514d8981	387	* @}
AnnaBridge	156:ff21514d8981	388	*/
AnnaBridge	156:ff21514d8981	389
AnnaBridge	156:ff21514d8981	390	/** @defgroup DSI_Color_Mode DSI Color Mode
AnnaBridge	156:ff21514d8981	391	* @{
AnnaBridge	156:ff21514d8981	392	*/
AnnaBridge	156:ff21514d8981	393	#define DSI_COLOR_MODE_FULL 0x00000000U
AnnaBridge	156:ff21514d8981	394	#define DSI_COLOR_MODE_EIGHT DSI_WCR_COLM
AnnaBridge	156:ff21514d8981	395	/**
AnnaBridge	156:ff21514d8981	396	* @}
AnnaBridge	156:ff21514d8981	397	*/
AnnaBridge	156:ff21514d8981	398
AnnaBridge	156:ff21514d8981	399	/** @defgroup DSI_ShutDown DSI ShutDown
AnnaBridge	156:ff21514d8981	400	* @{
AnnaBridge	156:ff21514d8981	401	*/
AnnaBridge	156:ff21514d8981	402	#define DSI_DISPLAY_ON 0x00000000U
AnnaBridge	156:ff21514d8981	403	#define DSI_DISPLAY_OFF DSI_WCR_SHTDN
AnnaBridge	156:ff21514d8981	404	/**
AnnaBridge	156:ff21514d8981	405	* @}
AnnaBridge	156:ff21514d8981	406	*/
AnnaBridge	156:ff21514d8981	407
AnnaBridge	156:ff21514d8981	408	/** @defgroup DSI_LP_Command DSI LP Command
AnnaBridge	156:ff21514d8981	409	* @{
AnnaBridge	156:ff21514d8981	410	*/
AnnaBridge	156:ff21514d8981	411	#define DSI_LP_COMMAND_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	412	#define DSI_LP_COMMAND_ENABLE DSI_VMCR_LPCE
AnnaBridge	156:ff21514d8981	413	/**
AnnaBridge	156:ff21514d8981	414	* @}
AnnaBridge	156:ff21514d8981	415	*/
AnnaBridge	156:ff21514d8981	416
AnnaBridge	156:ff21514d8981	417	/** @defgroup DSI_LP_HFP DSI LP HFP
AnnaBridge	156:ff21514d8981	418	* @{
AnnaBridge	156:ff21514d8981	419	*/
AnnaBridge	156:ff21514d8981	420	#define DSI_LP_HFP_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	421	#define DSI_LP_HFP_ENABLE DSI_VMCR_LPHFPE
AnnaBridge	156:ff21514d8981	422	/**
AnnaBridge	156:ff21514d8981	423	* @}
AnnaBridge	156:ff21514d8981	424	*/
AnnaBridge	156:ff21514d8981	425
AnnaBridge	156:ff21514d8981	426	/** @defgroup DSI_LP_HBP DSI LP HBP
AnnaBridge	156:ff21514d8981	427	* @{
AnnaBridge	156:ff21514d8981	428	*/
AnnaBridge	156:ff21514d8981	429	#define DSI_LP_HBP_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	430	#define DSI_LP_HBP_ENABLE DSI_VMCR_LPHBPE
AnnaBridge	156:ff21514d8981	431	/**
AnnaBridge	156:ff21514d8981	432	* @}
AnnaBridge	156:ff21514d8981	433	*/
AnnaBridge	156:ff21514d8981	434
AnnaBridge	156:ff21514d8981	435	/** @defgroup DSI_LP_VACT DSI LP VACT
AnnaBridge	156:ff21514d8981	436	* @{
AnnaBridge	156:ff21514d8981	437	*/
AnnaBridge	156:ff21514d8981	438	#define DSI_LP_VACT_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	439	#define DSI_LP_VACT_ENABLE DSI_VMCR_LPVAE
AnnaBridge	156:ff21514d8981	440	/**
AnnaBridge	156:ff21514d8981	441	* @}
AnnaBridge	156:ff21514d8981	442	*/
AnnaBridge	156:ff21514d8981	443
AnnaBridge	156:ff21514d8981	444	/** @defgroup DSI_LP_VFP DSI LP VFP
AnnaBridge	156:ff21514d8981	445	* @{
AnnaBridge	156:ff21514d8981	446	*/
AnnaBridge	156:ff21514d8981	447	#define DSI_LP_VFP_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	448	#define DSI_LP_VFP_ENABLE DSI_VMCR_LPVFPE
AnnaBridge	156:ff21514d8981	449	/**
AnnaBridge	156:ff21514d8981	450	* @}
AnnaBridge	156:ff21514d8981	451	*/
AnnaBridge	156:ff21514d8981	452
AnnaBridge	156:ff21514d8981	453	/** @defgroup DSI_LP_VBP DSI LP VBP
AnnaBridge	156:ff21514d8981	454	* @{
AnnaBridge	156:ff21514d8981	455	*/
AnnaBridge	156:ff21514d8981	456	#define DSI_LP_VBP_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	457	#define DSI_LP_VBP_ENABLE DSI_VMCR_LPVBPE
AnnaBridge	156:ff21514d8981	458	/**
AnnaBridge	156:ff21514d8981	459	* @}
AnnaBridge	156:ff21514d8981	460	*/
AnnaBridge	156:ff21514d8981	461
AnnaBridge	156:ff21514d8981	462	/** @defgroup DSI_LP_VSYNC DSI LP VSYNC
AnnaBridge	156:ff21514d8981	463	* @{
AnnaBridge	156:ff21514d8981	464	*/
AnnaBridge	156:ff21514d8981	465	#define DSI_LP_VSYNC_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	466	#define DSI_LP_VSYNC_ENABLE DSI_VMCR_LPVSAE
AnnaBridge	156:ff21514d8981	467	/**
AnnaBridge	156:ff21514d8981	468	* @}
AnnaBridge	156:ff21514d8981	469	*/
AnnaBridge	156:ff21514d8981	470
AnnaBridge	156:ff21514d8981	471	/** @defgroup DSI_FBTA_acknowledge DSI FBTA Acknowledge
AnnaBridge	156:ff21514d8981	472	* @{
AnnaBridge	156:ff21514d8981	473	*/
AnnaBridge	156:ff21514d8981	474	#define DSI_FBTAA_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	475	#define DSI_FBTAA_ENABLE DSI_VMCR_FBTAAE
AnnaBridge	156:ff21514d8981	476	/**
AnnaBridge	156:ff21514d8981	477	* @}
AnnaBridge	156:ff21514d8981	478	*/
AnnaBridge	156:ff21514d8981	479
AnnaBridge	156:ff21514d8981	480	/** @defgroup DSI_TearingEffectSource DSI Tearing Effect Source
AnnaBridge	156:ff21514d8981	481	* @{
AnnaBridge	156:ff21514d8981	482	*/
AnnaBridge	156:ff21514d8981	483	#define DSI_TE_DSILINK 0x00000000U
AnnaBridge	156:ff21514d8981	484	#define DSI_TE_EXTERNAL DSI_WCFGR_TESRC
AnnaBridge	156:ff21514d8981	485	/**
AnnaBridge	156:ff21514d8981	486	* @}
AnnaBridge	156:ff21514d8981	487	*/
AnnaBridge	156:ff21514d8981	488
AnnaBridge	156:ff21514d8981	489	/** @defgroup DSI_TearingEffectPolarity DSI Tearing Effect Polarity
AnnaBridge	156:ff21514d8981	490	* @{
AnnaBridge	156:ff21514d8981	491	*/
AnnaBridge	156:ff21514d8981	492	#define DSI_TE_RISING_EDGE 0x00000000U
AnnaBridge	156:ff21514d8981	493	#define DSI_TE_FALLING_EDGE DSI_WCFGR_TEPOL
AnnaBridge	156:ff21514d8981	494	/**
AnnaBridge	156:ff21514d8981	495	* @}
AnnaBridge	156:ff21514d8981	496	*/
AnnaBridge	156:ff21514d8981	497
AnnaBridge	156:ff21514d8981	498	/** @defgroup DSI_Vsync_Polarity DSI Vsync Polarity
AnnaBridge	156:ff21514d8981	499	* @{
AnnaBridge	156:ff21514d8981	500	*/
AnnaBridge	156:ff21514d8981	501	#define DSI_VSYNC_FALLING 0x00000000U
AnnaBridge	156:ff21514d8981	502	#define DSI_VSYNC_RISING DSI_WCFGR_VSPOL
AnnaBridge	156:ff21514d8981	503	/**
AnnaBridge	156:ff21514d8981	504	* @}
AnnaBridge	156:ff21514d8981	505	*/
AnnaBridge	156:ff21514d8981	506
AnnaBridge	156:ff21514d8981	507	/** @defgroup DSI_AutomaticRefresh DSI Automatic Refresh
AnnaBridge	156:ff21514d8981	508	* @{
AnnaBridge	156:ff21514d8981	509	*/
AnnaBridge	156:ff21514d8981	510	#define DSI_AR_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	511	#define DSI_AR_ENABLE DSI_WCFGR_AR
AnnaBridge	156:ff21514d8981	512	/**
AnnaBridge	156:ff21514d8981	513	* @}
AnnaBridge	156:ff21514d8981	514	*/
AnnaBridge	156:ff21514d8981	515
AnnaBridge	156:ff21514d8981	516	/** @defgroup DSI_TE_AcknowledgeRequest DSI TE Acknowledge Request
AnnaBridge	156:ff21514d8981	517	* @{
AnnaBridge	156:ff21514d8981	518	*/
AnnaBridge	156:ff21514d8981	519	#define DSI_TE_ACKNOWLEDGE_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	520	#define DSI_TE_ACKNOWLEDGE_ENABLE DSI_CMCR_TEARE
AnnaBridge	156:ff21514d8981	521	/**
AnnaBridge	156:ff21514d8981	522	* @}
AnnaBridge	156:ff21514d8981	523	*/
AnnaBridge	156:ff21514d8981	524
AnnaBridge	156:ff21514d8981	525	/** @defgroup DSI_AcknowledgeRequest DSI Acknowledge Request
AnnaBridge	156:ff21514d8981	526	* @{
AnnaBridge	156:ff21514d8981	527	*/
AnnaBridge	156:ff21514d8981	528	#define DSI_ACKNOWLEDGE_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	529	#define DSI_ACKNOWLEDGE_ENABLE DSI_CMCR_ARE
AnnaBridge	156:ff21514d8981	530	/**
AnnaBridge	156:ff21514d8981	531	* @}
AnnaBridge	156:ff21514d8981	532	*/
AnnaBridge	156:ff21514d8981	533
AnnaBridge	156:ff21514d8981	534	/** @defgroup DSI_LP_LPGenShortWriteNoP DSI LP LPGen Short Write NoP
AnnaBridge	156:ff21514d8981	535	* @{
AnnaBridge	156:ff21514d8981	536	*/
AnnaBridge	156:ff21514d8981	537	#define DSI_LP_GSW0P_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	538	#define DSI_LP_GSW0P_ENABLE DSI_CMCR_GSW0TX
AnnaBridge	156:ff21514d8981	539	/**
AnnaBridge	156:ff21514d8981	540	* @}
AnnaBridge	156:ff21514d8981	541	*/
AnnaBridge	156:ff21514d8981	542
AnnaBridge	156:ff21514d8981	543	/** @defgroup DSI_LP_LPGenShortWriteOneP DSI LP LPGen Short Write OneP
AnnaBridge	156:ff21514d8981	544	* @{
AnnaBridge	156:ff21514d8981	545	*/
AnnaBridge	156:ff21514d8981	546	#define DSI_LP_GSW1P_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	547	#define DSI_LP_GSW1P_ENABLE DSI_CMCR_GSW1TX
AnnaBridge	156:ff21514d8981	548	/**
AnnaBridge	156:ff21514d8981	549	* @}
AnnaBridge	156:ff21514d8981	550	*/
AnnaBridge	156:ff21514d8981	551
AnnaBridge	156:ff21514d8981	552	/** @defgroup DSI_LP_LPGenShortWriteTwoP DSI LP LPGen Short Write TwoP
AnnaBridge	156:ff21514d8981	553	* @{
AnnaBridge	156:ff21514d8981	554	*/
AnnaBridge	156:ff21514d8981	555	#define DSI_LP_GSW2P_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	556	#define DSI_LP_GSW2P_ENABLE DSI_CMCR_GSW2TX
AnnaBridge	156:ff21514d8981	557	/**
AnnaBridge	156:ff21514d8981	558	* @}
AnnaBridge	156:ff21514d8981	559	*/
AnnaBridge	156:ff21514d8981	560
AnnaBridge	156:ff21514d8981	561	/** @defgroup DSI_LP_LPGenShortReadNoP DSI LP LPGen Short Read NoP
AnnaBridge	156:ff21514d8981	562	* @{
AnnaBridge	156:ff21514d8981	563	*/
AnnaBridge	156:ff21514d8981	564	#define DSI_LP_GSR0P_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	565	#define DSI_LP_GSR0P_ENABLE DSI_CMCR_GSR0TX
AnnaBridge	156:ff21514d8981	566	/**
AnnaBridge	156:ff21514d8981	567	* @}
AnnaBridge	156:ff21514d8981	568	*/
AnnaBridge	156:ff21514d8981	569
AnnaBridge	156:ff21514d8981	570	/** @defgroup DSI_LP_LPGenShortReadOneP DSI LP LPGen Short Read OneP
AnnaBridge	156:ff21514d8981	571	* @{
AnnaBridge	156:ff21514d8981	572	*/
AnnaBridge	156:ff21514d8981	573	#define DSI_LP_GSR1P_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	574	#define DSI_LP_GSR1P_ENABLE DSI_CMCR_GSR1TX
AnnaBridge	156:ff21514d8981	575	/**
AnnaBridge	156:ff21514d8981	576	* @}
AnnaBridge	156:ff21514d8981	577	*/
AnnaBridge	156:ff21514d8981	578
AnnaBridge	156:ff21514d8981	579	/** @defgroup DSI_LP_LPGenShortReadTwoP DSI LP LPGen Short Read TwoP
AnnaBridge	156:ff21514d8981	580	* @{
AnnaBridge	156:ff21514d8981	581	*/
AnnaBridge	156:ff21514d8981	582	#define DSI_LP_GSR2P_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	583	#define DSI_LP_GSR2P_ENABLE DSI_CMCR_GSR2TX
AnnaBridge	156:ff21514d8981	584	/**
AnnaBridge	156:ff21514d8981	585	* @}
AnnaBridge	156:ff21514d8981	586	*/
AnnaBridge	156:ff21514d8981	587
AnnaBridge	156:ff21514d8981	588	/** @defgroup DSI_LP_LPGenLongWrite DSI LP LPGen LongWrite
AnnaBridge	156:ff21514d8981	589	* @{
AnnaBridge	156:ff21514d8981	590	*/
AnnaBridge	156:ff21514d8981	591	#define DSI_LP_GLW_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	592	#define DSI_LP_GLW_ENABLE DSI_CMCR_GLWTX
AnnaBridge	156:ff21514d8981	593	/**
AnnaBridge	156:ff21514d8981	594	* @}
AnnaBridge	156:ff21514d8981	595	*/
AnnaBridge	156:ff21514d8981	596
AnnaBridge	156:ff21514d8981	597	/** @defgroup DSI_LP_LPDcsShortWriteNoP DSI LP LPDcs Short Write NoP
AnnaBridge	156:ff21514d8981	598	* @{
AnnaBridge	156:ff21514d8981	599	*/
AnnaBridge	156:ff21514d8981	600	#define DSI_LP_DSW0P_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	601	#define DSI_LP_DSW0P_ENABLE DSI_CMCR_DSW0TX
AnnaBridge	156:ff21514d8981	602	/**
AnnaBridge	156:ff21514d8981	603	* @}
AnnaBridge	156:ff21514d8981	604	*/
AnnaBridge	156:ff21514d8981	605
AnnaBridge	156:ff21514d8981	606	/** @defgroup DSI_LP_LPDcsShortWriteOneP DSI LP LPDcs Short Write OneP
AnnaBridge	156:ff21514d8981	607	* @{
AnnaBridge	156:ff21514d8981	608	*/
AnnaBridge	156:ff21514d8981	609	#define DSI_LP_DSW1P_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	610	#define DSI_LP_DSW1P_ENABLE DSI_CMCR_DSW1TX
AnnaBridge	156:ff21514d8981	611	/**
AnnaBridge	156:ff21514d8981	612	* @}
AnnaBridge	156:ff21514d8981	613	*/
AnnaBridge	156:ff21514d8981	614
AnnaBridge	156:ff21514d8981	615	/** @defgroup DSI_LP_LPDcsShortReadNoP DSI LP LPDcs Short Read NoP
AnnaBridge	156:ff21514d8981	616	* @{
AnnaBridge	156:ff21514d8981	617	*/
AnnaBridge	156:ff21514d8981	618	#define DSI_LP_DSR0P_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	619	#define DSI_LP_DSR0P_ENABLE DSI_CMCR_DSR0TX
AnnaBridge	156:ff21514d8981	620	/**
AnnaBridge	156:ff21514d8981	621	* @}
AnnaBridge	156:ff21514d8981	622	*/
AnnaBridge	156:ff21514d8981	623
AnnaBridge	156:ff21514d8981	624	/** @defgroup DSI_LP_LPDcsLongWrite DSI LP LPDcs Long Write
AnnaBridge	156:ff21514d8981	625	* @{
AnnaBridge	156:ff21514d8981	626	*/
AnnaBridge	156:ff21514d8981	627	#define DSI_LP_DLW_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	628	#define DSI_LP_DLW_ENABLE DSI_CMCR_DLWTX
AnnaBridge	156:ff21514d8981	629	/**
AnnaBridge	156:ff21514d8981	630	* @}
AnnaBridge	156:ff21514d8981	631	*/
AnnaBridge	156:ff21514d8981	632
AnnaBridge	156:ff21514d8981	633	/** @defgroup DSI_LP_LPMaxReadPacket DSI LP LPMax Read Packet
AnnaBridge	156:ff21514d8981	634	* @{
AnnaBridge	156:ff21514d8981	635	*/
AnnaBridge	156:ff21514d8981	636	#define DSI_LP_MRDP_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	637	#define DSI_LP_MRDP_ENABLE DSI_CMCR_MRDPS
AnnaBridge	156:ff21514d8981	638	/**
AnnaBridge	156:ff21514d8981	639	* @}
AnnaBridge	156:ff21514d8981	640	*/
AnnaBridge	156:ff21514d8981	641
AnnaBridge	156:ff21514d8981	642	/** @defgroup DSI_HS_PrespMode DSI HS Presp Mode
AnnaBridge	156:ff21514d8981	643	* @{
AnnaBridge	156:ff21514d8981	644	*/
AnnaBridge	156:ff21514d8981	645	#define DSI_HS_PM_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	646	#define DSI_HS_PM_ENABLE DSI_TCCR3_PM
AnnaBridge	156:ff21514d8981	647	/**
AnnaBridge	156:ff21514d8981	648	* @}
AnnaBridge	156:ff21514d8981	649	*/
AnnaBridge	156:ff21514d8981	650
AnnaBridge	156:ff21514d8981	651
AnnaBridge	156:ff21514d8981	652	/** @defgroup DSI_Automatic_Clk_Lane_Control DSI Automatic Clk Lane Control
AnnaBridge	156:ff21514d8981	653	* @{
AnnaBridge	156:ff21514d8981	654	*/
AnnaBridge	156:ff21514d8981	655	#define DSI_AUTO_CLK_LANE_CTRL_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	656	#define DSI_AUTO_CLK_LANE_CTRL_ENABLE DSI_CLCR_ACR
AnnaBridge	156:ff21514d8981	657	/**
AnnaBridge	156:ff21514d8981	658	* @}
AnnaBridge	156:ff21514d8981	659	*/
AnnaBridge	156:ff21514d8981	660
AnnaBridge	156:ff21514d8981	661	/** @defgroup DSI_Number_Of_Lanes DSI Number Of Lanes
AnnaBridge	156:ff21514d8981	662	* @{
AnnaBridge	156:ff21514d8981	663	*/
AnnaBridge	156:ff21514d8981	664	#define DSI_ONE_DATA_LANE 0U
AnnaBridge	156:ff21514d8981	665	#define DSI_TWO_DATA_LANES 1U
AnnaBridge	156:ff21514d8981	666	/**
AnnaBridge	156:ff21514d8981	667	* @}
AnnaBridge	156:ff21514d8981	668	*/
AnnaBridge	156:ff21514d8981	669
AnnaBridge	156:ff21514d8981	670	/** @defgroup DSI_FlowControl DSI Flow Control
AnnaBridge	156:ff21514d8981	671	* @{
AnnaBridge	156:ff21514d8981	672	*/
AnnaBridge	156:ff21514d8981	673	#define DSI_FLOW_CONTROL_CRC_RX DSI_PCR_CRCRXE
AnnaBridge	156:ff21514d8981	674	#define DSI_FLOW_CONTROL_ECC_RX DSI_PCR_ECCRXE
AnnaBridge	156:ff21514d8981	675	#define DSI_FLOW_CONTROL_BTA DSI_PCR_BTAE
AnnaBridge	156:ff21514d8981	676	#define DSI_FLOW_CONTROL_EOTP_RX DSI_PCR_ETRXE
AnnaBridge	156:ff21514d8981	677	#define DSI_FLOW_CONTROL_EOTP_TX DSI_PCR_ETTXE
AnnaBridge	156:ff21514d8981	678	#define DSI_FLOW_CONTROL_ALL (DSI_FLOW_CONTROL_CRC_RX \| DSI_FLOW_CONTROL_ECC_RX \| \
AnnaBridge	156:ff21514d8981	679	DSI_FLOW_CONTROL_BTA \| DSI_FLOW_CONTROL_EOTP_RX \| \
AnnaBridge	156:ff21514d8981	680	DSI_FLOW_CONTROL_EOTP_TX)
AnnaBridge	156:ff21514d8981	681	/**
AnnaBridge	156:ff21514d8981	682	* @}
AnnaBridge	156:ff21514d8981	683	*/
AnnaBridge	156:ff21514d8981	684
AnnaBridge	156:ff21514d8981	685	/** @defgroup DSI_Color_Coding DSI Color Coding
AnnaBridge	156:ff21514d8981	686	* @{
AnnaBridge	156:ff21514d8981	687	*/
AnnaBridge	156:ff21514d8981	688	#define DSI_RGB565 0x00000000U /!< The values 0x00000001 and 0x00000002 can also be used for the RGB565 color mode configuration /
AnnaBridge	156:ff21514d8981	689	#define DSI_RGB666 0x00000003U /!< The value 0x00000004 can also be used for the RGB666 color mode configuration /
AnnaBridge	156:ff21514d8981	690	#define DSI_RGB888 0x00000005U
AnnaBridge	156:ff21514d8981	691	/**
AnnaBridge	156:ff21514d8981	692	* @}
AnnaBridge	156:ff21514d8981	693	*/
AnnaBridge	156:ff21514d8981	694
AnnaBridge	156:ff21514d8981	695	/** @defgroup DSI_LooselyPacked DSI Loosely Packed
AnnaBridge	156:ff21514d8981	696	* @{
AnnaBridge	156:ff21514d8981	697	*/
AnnaBridge	156:ff21514d8981	698	#define DSI_LOOSELY_PACKED_ENABLE DSI_LCOLCR_LPE
AnnaBridge	156:ff21514d8981	699	#define DSI_LOOSELY_PACKED_DISABLE 0x00000000U
AnnaBridge	156:ff21514d8981	700	/**
AnnaBridge	156:ff21514d8981	701	* @}
AnnaBridge	156:ff21514d8981	702	*/
AnnaBridge	156:ff21514d8981	703
AnnaBridge	156:ff21514d8981	704	/** @defgroup DSI_HSYNC_Polarity DSI HSYNC Polarity
AnnaBridge	156:ff21514d8981	705	* @{
AnnaBridge	156:ff21514d8981	706	*/
AnnaBridge	156:ff21514d8981	707	#define DSI_HSYNC_ACTIVE_HIGH 0x00000000U
AnnaBridge	156:ff21514d8981	708	#define DSI_HSYNC_ACTIVE_LOW DSI_LPCR_HSP
AnnaBridge	156:ff21514d8981	709	/**
AnnaBridge	156:ff21514d8981	710	* @}
AnnaBridge	156:ff21514d8981	711	*/
AnnaBridge	156:ff21514d8981	712
AnnaBridge	156:ff21514d8981	713	/** @defgroup DSI_VSYNC_Active_Polarity DSI VSYNC Active Polarity
AnnaBridge	156:ff21514d8981	714	* @{
AnnaBridge	156:ff21514d8981	715	*/
AnnaBridge	156:ff21514d8981	716	#define DSI_VSYNC_ACTIVE_HIGH 0x00000000U
AnnaBridge	156:ff21514d8981	717	#define DSI_VSYNC_ACTIVE_LOW DSI_LPCR_VSP
AnnaBridge	156:ff21514d8981	718	/**
AnnaBridge	156:ff21514d8981	719	* @}
AnnaBridge	156:ff21514d8981	720	*/
AnnaBridge	156:ff21514d8981	721
AnnaBridge	156:ff21514d8981	722	/** @defgroup DSI_DATA_ENABLE_Polarity DSI DATA ENABLE Polarity
AnnaBridge	156:ff21514d8981	723	* @{
AnnaBridge	156:ff21514d8981	724	*/
AnnaBridge	156:ff21514d8981	725	#define DSI_DATA_ENABLE_ACTIVE_HIGH 0x00000000U
AnnaBridge	156:ff21514d8981	726	#define DSI_DATA_ENABLE_ACTIVE_LOW DSI_LPCR_DEP
AnnaBridge	156:ff21514d8981	727	/**
AnnaBridge	156:ff21514d8981	728	* @}
AnnaBridge	156:ff21514d8981	729	*/
AnnaBridge	156:ff21514d8981	730
AnnaBridge	156:ff21514d8981	731	/** @defgroup DSI_PLL_IDF DSI PLL IDF
AnnaBridge	156:ff21514d8981	732	* @{
AnnaBridge	156:ff21514d8981	733	*/
AnnaBridge	156:ff21514d8981	734	#define DSI_PLL_IN_DIV1 0x00000001U
AnnaBridge	156:ff21514d8981	735	#define DSI_PLL_IN_DIV2 0x00000002U
AnnaBridge	156:ff21514d8981	736	#define DSI_PLL_IN_DIV3 0x00000003U
AnnaBridge	156:ff21514d8981	737	#define DSI_PLL_IN_DIV4 0x00000004U
AnnaBridge	156:ff21514d8981	738	#define DSI_PLL_IN_DIV5 0x00000005U
AnnaBridge	156:ff21514d8981	739	#define DSI_PLL_IN_DIV6 0x00000006U
AnnaBridge	156:ff21514d8981	740	#define DSI_PLL_IN_DIV7 0x00000007U
AnnaBridge	156:ff21514d8981	741	/**
AnnaBridge	156:ff21514d8981	742	* @}
AnnaBridge	156:ff21514d8981	743	*/
AnnaBridge	156:ff21514d8981	744
AnnaBridge	156:ff21514d8981	745	/** @defgroup DSI_PLL_ODF DSI PLL ODF
AnnaBridge	156:ff21514d8981	746	* @{
AnnaBridge	156:ff21514d8981	747	*/
AnnaBridge	156:ff21514d8981	748	#define DSI_PLL_OUT_DIV1 0x00000000U
AnnaBridge	156:ff21514d8981	749	#define DSI_PLL_OUT_DIV2 0x00000001U
AnnaBridge	156:ff21514d8981	750	#define DSI_PLL_OUT_DIV4 0x00000002U
AnnaBridge	156:ff21514d8981	751	#define DSI_PLL_OUT_DIV8 0x00000003U
AnnaBridge	156:ff21514d8981	752	/**
AnnaBridge	156:ff21514d8981	753	* @}
AnnaBridge	156:ff21514d8981	754	*/
AnnaBridge	156:ff21514d8981	755
AnnaBridge	156:ff21514d8981	756	/** @defgroup DSI_Flags DSI Flags
AnnaBridge	156:ff21514d8981	757	* @{
AnnaBridge	156:ff21514d8981	758	*/
AnnaBridge	156:ff21514d8981	759	#define DSI_FLAG_TE DSI_WISR_TEIF
AnnaBridge	156:ff21514d8981	760	#define DSI_FLAG_ER DSI_WISR_ERIF
AnnaBridge	156:ff21514d8981	761	#define DSI_FLAG_BUSY DSI_WISR_BUSY
AnnaBridge	156:ff21514d8981	762	#define DSI_FLAG_PLLLS DSI_WISR_PLLLS
AnnaBridge	156:ff21514d8981	763	#define DSI_FLAG_PLLL DSI_WISR_PLLLIF
AnnaBridge	156:ff21514d8981	764	#define DSI_FLAG_PLLU DSI_WISR_PLLUIF
AnnaBridge	156:ff21514d8981	765	#define DSI_FLAG_RRS DSI_WISR_RRS
AnnaBridge	156:ff21514d8981	766	#define DSI_FLAG_RR DSI_WISR_RRIF
AnnaBridge	156:ff21514d8981	767	/**
AnnaBridge	156:ff21514d8981	768	* @}
AnnaBridge	156:ff21514d8981	769	*/
AnnaBridge	156:ff21514d8981	770
AnnaBridge	156:ff21514d8981	771	/** @defgroup DSI_Interrupts DSI Interrupts
AnnaBridge	156:ff21514d8981	772	* @{
AnnaBridge	156:ff21514d8981	773	*/
AnnaBridge	156:ff21514d8981	774	#define DSI_IT_TE DSI_WIER_TEIE
AnnaBridge	156:ff21514d8981	775	#define DSI_IT_ER DSI_WIER_ERIE
AnnaBridge	156:ff21514d8981	776	#define DSI_IT_PLLL DSI_WIER_PLLLIE
AnnaBridge	156:ff21514d8981	777	#define DSI_IT_PLLU DSI_WIER_PLLUIE
AnnaBridge	156:ff21514d8981	778	#define DSI_IT_RR DSI_WIER_RRIE
AnnaBridge	156:ff21514d8981	779	/**
AnnaBridge	156:ff21514d8981	780	* @}
AnnaBridge	156:ff21514d8981	781	*/
AnnaBridge	156:ff21514d8981	782
AnnaBridge	156:ff21514d8981	783	/** @defgroup DSI_SHORT_WRITE_PKT_Data_Type DSI SHORT WRITE PKT Data Type
AnnaBridge	156:ff21514d8981	784	* @{
AnnaBridge	156:ff21514d8981	785	*/
AnnaBridge	156:ff21514d8981	786	#define DSI_DCS_SHORT_PKT_WRITE_P0 0x00000005U /!< DCS short write, no parameters /
AnnaBridge	156:ff21514d8981	787	#define DSI_DCS_SHORT_PKT_WRITE_P1 0x00000015U /!< DCS short write, one parameter /
AnnaBridge	156:ff21514d8981	788	#define DSI_GEN_SHORT_PKT_WRITE_P0 0x00000003U /!< Generic short write, no parameters /
AnnaBridge	156:ff21514d8981	789	#define DSI_GEN_SHORT_PKT_WRITE_P1 0x00000013U /!< Generic short write, one parameter /
AnnaBridge	156:ff21514d8981	790	#define DSI_GEN_SHORT_PKT_WRITE_P2 0x00000023U /!< Generic short write, two parameters /
AnnaBridge	156:ff21514d8981	791	/**
AnnaBridge	156:ff21514d8981	792	* @}
AnnaBridge	156:ff21514d8981	793	*/
AnnaBridge	156:ff21514d8981	794
AnnaBridge	156:ff21514d8981	795	/** @defgroup DSI_LONG_WRITE_PKT_Data_Type DSI LONG WRITE PKT Data Type
AnnaBridge	156:ff21514d8981	796	* @{
AnnaBridge	156:ff21514d8981	797	*/
AnnaBridge	156:ff21514d8981	798	#define DSI_DCS_LONG_PKT_WRITE 0x00000039U /!< DCS long write /
AnnaBridge	156:ff21514d8981	799	#define DSI_GEN_LONG_PKT_WRITE 0x00000029U /!< Generic long write /
AnnaBridge	156:ff21514d8981	800	/**
AnnaBridge	156:ff21514d8981	801	* @}
AnnaBridge	156:ff21514d8981	802	*/
AnnaBridge	156:ff21514d8981	803
AnnaBridge	156:ff21514d8981	804	/** @defgroup DSI_SHORT_READ_PKT_Data_Type DSI SHORT READ PKT Data Type
AnnaBridge	156:ff21514d8981	805	* @{
AnnaBridge	156:ff21514d8981	806	*/
AnnaBridge	156:ff21514d8981	807	#define DSI_DCS_SHORT_PKT_READ 0x00000006U /!< DCS short read /
AnnaBridge	156:ff21514d8981	808	#define DSI_GEN_SHORT_PKT_READ_P0 0x00000004U /!< Generic short read, no parameters /
AnnaBridge	156:ff21514d8981	809	#define DSI_GEN_SHORT_PKT_READ_P1 0x00000014U /!< Generic short read, one parameter /
AnnaBridge	156:ff21514d8981	810	#define DSI_GEN_SHORT_PKT_READ_P2 0x00000024U /!< Generic short read, two parameters /
AnnaBridge	156:ff21514d8981	811	/**
AnnaBridge	156:ff21514d8981	812	* @}
AnnaBridge	156:ff21514d8981	813	*/
AnnaBridge	156:ff21514d8981	814
AnnaBridge	156:ff21514d8981	815	/** @defgroup DSI_Error_Data_Type DSI Error Data Type
AnnaBridge	156:ff21514d8981	816	* @{
AnnaBridge	156:ff21514d8981	817	*/
AnnaBridge	156:ff21514d8981	818	#define HAL_DSI_ERROR_NONE 0U
AnnaBridge	156:ff21514d8981	819	#define HAL_DSI_ERROR_ACK 0x00000001U /!< acknowledge errors /
AnnaBridge	156:ff21514d8981	820	#define HAL_DSI_ERROR_PHY 0x00000002U /!< PHY related errors /
AnnaBridge	156:ff21514d8981	821	#define HAL_DSI_ERROR_TX 0x00000004U /!< transmission error /
AnnaBridge	156:ff21514d8981	822	#define HAL_DSI_ERROR_RX 0x00000008U /!< reception error /
AnnaBridge	156:ff21514d8981	823	#define HAL_DSI_ERROR_ECC 0x00000010U /!< ECC errors /
AnnaBridge	156:ff21514d8981	824	#define HAL_DSI_ERROR_CRC 0x00000020U /!< CRC error /
AnnaBridge	156:ff21514d8981	825	#define HAL_DSI_ERROR_PSE 0x00000040U /!< Packet Size error /
AnnaBridge	156:ff21514d8981	826	#define HAL_DSI_ERROR_EOT 0x00000080U /!< End Of Transmission error /
AnnaBridge	156:ff21514d8981	827	#define HAL_DSI_ERROR_OVF 0x00000100U /!< FIFO overflow error /
AnnaBridge	156:ff21514d8981	828	#define HAL_DSI_ERROR_GEN 0x00000200U /!< Generic FIFO related errors /
AnnaBridge	156:ff21514d8981	829	/**
AnnaBridge	156:ff21514d8981	830	* @}
AnnaBridge	156:ff21514d8981	831	*/
AnnaBridge	156:ff21514d8981	832
AnnaBridge	156:ff21514d8981	833	/** @defgroup DSI_Lane_Group DSI Lane Group
AnnaBridge	156:ff21514d8981	834	* @{
AnnaBridge	156:ff21514d8981	835	*/
AnnaBridge	156:ff21514d8981	836	#define DSI_CLOCK_LANE 0x00000000U
AnnaBridge	156:ff21514d8981	837	#define DSI_DATA_LANES 0x00000001U
AnnaBridge	156:ff21514d8981	838	/**
AnnaBridge	156:ff21514d8981	839	* @}
AnnaBridge	156:ff21514d8981	840	*/
AnnaBridge	156:ff21514d8981	841
AnnaBridge	156:ff21514d8981	842	/** @defgroup DSI_Communication_Delay DSI Communication Delay
AnnaBridge	156:ff21514d8981	843	* @{
AnnaBridge	156:ff21514d8981	844	*/
AnnaBridge	156:ff21514d8981	845	#define DSI_SLEW_RATE_HSTX 0x00000000U
AnnaBridge	156:ff21514d8981	846	#define DSI_SLEW_RATE_LPTX 0x00000001U
AnnaBridge	156:ff21514d8981	847	#define DSI_HS_DELAY 0x00000002U
AnnaBridge	156:ff21514d8981	848	/**
AnnaBridge	156:ff21514d8981	849	* @}
AnnaBridge	156:ff21514d8981	850	*/
AnnaBridge	156:ff21514d8981	851
AnnaBridge	156:ff21514d8981	852	/** @defgroup DSI_CustomLane DSI CustomLane
AnnaBridge	156:ff21514d8981	853	* @{
AnnaBridge	156:ff21514d8981	854	*/
AnnaBridge	156:ff21514d8981	855	#define DSI_SWAP_LANE_PINS 0x00000000U
AnnaBridge	156:ff21514d8981	856	#define DSI_INVERT_HS_SIGNAL 0x00000001U
AnnaBridge	156:ff21514d8981	857	/**
AnnaBridge	156:ff21514d8981	858	* @}
AnnaBridge	156:ff21514d8981	859	*/
AnnaBridge	156:ff21514d8981	860
AnnaBridge	156:ff21514d8981	861	/** @defgroup DSI_Lane_Select DSI Lane Select
AnnaBridge	156:ff21514d8981	862	* @{
AnnaBridge	156:ff21514d8981	863	*/
AnnaBridge	163:e59c8e839560	864	#define DSI_CLK_LANE 0x00000000U
AnnaBridge	156:ff21514d8981	865	#define DSI_DATA_LANE0 0x00000001U
AnnaBridge	156:ff21514d8981	866	#define DSI_DATA_LANE1 0x00000002U
AnnaBridge	156:ff21514d8981	867	/**
AnnaBridge	156:ff21514d8981	868	* @}
AnnaBridge	156:ff21514d8981	869	*/
AnnaBridge	156:ff21514d8981	870
AnnaBridge	156:ff21514d8981	871	/** @defgroup DSI_PHY_Timing DSI PHY Timing
AnnaBridge	156:ff21514d8981	872	* @{
AnnaBridge	156:ff21514d8981	873	*/
AnnaBridge	156:ff21514d8981	874	#define DSI_TCLK_POST 0x00000000U
AnnaBridge	156:ff21514d8981	875	#define DSI_TLPX_CLK 0x00000001U
AnnaBridge	156:ff21514d8981	876	#define DSI_THS_EXIT 0x00000002U
AnnaBridge	156:ff21514d8981	877	#define DSI_TLPX_DATA 0x00000003U
AnnaBridge	156:ff21514d8981	878	#define DSI_THS_ZERO 0x00000004U
AnnaBridge	156:ff21514d8981	879	#define DSI_THS_TRAIL 0x00000005U
AnnaBridge	156:ff21514d8981	880	#define DSI_THS_PREPARE 0x00000006U
AnnaBridge	156:ff21514d8981	881	#define DSI_TCLK_ZERO 0x00000007U
AnnaBridge	156:ff21514d8981	882	#define DSI_TCLK_PREPARE 0x00000008U
AnnaBridge	156:ff21514d8981	883	/**
AnnaBridge	156:ff21514d8981	884	* @}
AnnaBridge	156:ff21514d8981	885	*/
AnnaBridge	156:ff21514d8981	886
AnnaBridge	156:ff21514d8981	887	/* Exported macros -----------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	888	/**
AnnaBridge	156:ff21514d8981	889	* @brief Enables the DSI host.
AnnaBridge	163:e59c8e839560	890	* @param __HANDLE__ DSI handle
AnnaBridge	156:ff21514d8981	891	* @retval None.
AnnaBridge	156:ff21514d8981	892	*/
AnnaBridge	163:e59c8e839560	893	#define __HAL_DSI_ENABLE(__HANDLE__) do { \
AnnaBridge	163:e59c8e839560	894	__IO uint32_t tmpreg = 0x00U; \
AnnaBridge	163:e59c8e839560	895	SET_BIT((__HANDLE__)->Instance->CR, DSI_CR_EN);\
AnnaBridge	163:e59c8e839560	896	/* Delay after an DSI Host enabling */ \
AnnaBridge	163:e59c8e839560	897	tmpreg = READ_BIT((__HANDLE__)->Instance->CR, DSI_CR_EN);\
AnnaBridge	163:e59c8e839560	898	UNUSED(tmpreg); \
AnnaBridge	163:e59c8e839560	899	}while(0U)
AnnaBridge	156:ff21514d8981	900
AnnaBridge	156:ff21514d8981	901	/**
AnnaBridge	156:ff21514d8981	902	* @brief Disables the DSI host.
AnnaBridge	163:e59c8e839560	903	* @param __HANDLE__ DSI handle
AnnaBridge	156:ff21514d8981	904	* @retval None.
AnnaBridge	156:ff21514d8981	905	*/
AnnaBridge	163:e59c8e839560	906	#define __HAL_DSI_DISABLE(__HANDLE__) do { \
AnnaBridge	163:e59c8e839560	907	__IO uint32_t tmpreg = 0x00U; \
AnnaBridge	163:e59c8e839560	908	CLEAR_BIT((__HANDLE__)->Instance->CR, DSI_CR_EN);\
AnnaBridge	163:e59c8e839560	909	/* Delay after an DSI Host disabling */ \
AnnaBridge	163:e59c8e839560	910	tmpreg = READ_BIT((__HANDLE__)->Instance->CR, DSI_CR_EN);\
AnnaBridge	163:e59c8e839560	911	UNUSED(tmpreg); \
AnnaBridge	163:e59c8e839560	912	}while(0U)
AnnaBridge	156:ff21514d8981	913
AnnaBridge	156:ff21514d8981	914	/**
AnnaBridge	156:ff21514d8981	915	* @brief Enables the DSI wrapper.
AnnaBridge	163:e59c8e839560	916	* @param __HANDLE__ DSI handle
AnnaBridge	156:ff21514d8981	917	* @retval None.
AnnaBridge	156:ff21514d8981	918	*/
AnnaBridge	163:e59c8e839560	919	#define __HAL_DSI_WRAPPER_ENABLE(__HANDLE__) do { \
AnnaBridge	163:e59c8e839560	920	__IO uint32_t tmpreg = 0x00U; \
AnnaBridge	163:e59c8e839560	921	SET_BIT((__HANDLE__)->Instance->WCR, DSI_WCR_DSIEN);\
AnnaBridge	163:e59c8e839560	922	/* Delay after an DSI warpper enabling */ \
AnnaBridge	163:e59c8e839560	923	tmpreg = READ_BIT((__HANDLE__)->Instance->WCR, DSI_WCR_DSIEN);\
AnnaBridge	163:e59c8e839560	924	UNUSED(tmpreg); \
AnnaBridge	163:e59c8e839560	925	}while(0U)
AnnaBridge	156:ff21514d8981	926
AnnaBridge	156:ff21514d8981	927	/**
AnnaBridge	156:ff21514d8981	928	* @brief Disable the DSI wrapper.
AnnaBridge	163:e59c8e839560	929	* @param __HANDLE__ DSI handle
AnnaBridge	156:ff21514d8981	930	* @retval None.
AnnaBridge	156:ff21514d8981	931	*/
AnnaBridge	163:e59c8e839560	932	#define __HAL_DSI_WRAPPER_DISABLE(__HANDLE__) do { \
AnnaBridge	163:e59c8e839560	933	__IO uint32_t tmpreg = 0x00U; \
AnnaBridge	163:e59c8e839560	934	CLEAR_BIT((__HANDLE__)->Instance->WCR, DSI_WCR_DSIEN);\
AnnaBridge	163:e59c8e839560	935	/* Delay after an DSI warpper disabling*/ \
AnnaBridge	163:e59c8e839560	936	tmpreg = READ_BIT((__HANDLE__)->Instance->WCR, DSI_WCR_DSIEN);\
AnnaBridge	163:e59c8e839560	937	UNUSED(tmpreg); \
AnnaBridge	163:e59c8e839560	938	}while(0U)
AnnaBridge	156:ff21514d8981	939
AnnaBridge	156:ff21514d8981	940	/**
AnnaBridge	156:ff21514d8981	941	* @brief Enables the DSI PLL.
AnnaBridge	163:e59c8e839560	942	* @param __HANDLE__ DSI handle
AnnaBridge	156:ff21514d8981	943	* @retval None.
AnnaBridge	156:ff21514d8981	944	*/
AnnaBridge	163:e59c8e839560	945	#define __HAL_DSI_PLL_ENABLE(__HANDLE__) do { \
AnnaBridge	163:e59c8e839560	946	__IO uint32_t tmpreg = 0x00U; \
AnnaBridge	163:e59c8e839560	947	SET_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_PLLEN);\
AnnaBridge	163:e59c8e839560	948	/* Delay after an DSI PLL enabling */ \
AnnaBridge	163:e59c8e839560	949	tmpreg = READ_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_PLLEN);\
AnnaBridge	163:e59c8e839560	950	UNUSED(tmpreg); \
AnnaBridge	163:e59c8e839560	951	}while(0U)
AnnaBridge	156:ff21514d8981	952
AnnaBridge	156:ff21514d8981	953	/**
AnnaBridge	156:ff21514d8981	954	* @brief Disables the DSI PLL.
AnnaBridge	163:e59c8e839560	955	* @param __HANDLE__ DSI handle
AnnaBridge	156:ff21514d8981	956	* @retval None.
AnnaBridge	156:ff21514d8981	957	*/
AnnaBridge	163:e59c8e839560	958	#define __HAL_DSI_PLL_DISABLE(__HANDLE__) do { \
AnnaBridge	163:e59c8e839560	959	__IO uint32_t tmpreg = 0x00U; \
AnnaBridge	163:e59c8e839560	960	CLEAR_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_PLLEN);\
AnnaBridge	163:e59c8e839560	961	/* Delay after an DSI PLL disabling */ \
AnnaBridge	163:e59c8e839560	962	tmpreg = READ_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_PLLEN);\
AnnaBridge	163:e59c8e839560	963	UNUSED(tmpreg); \
AnnaBridge	163:e59c8e839560	964	}while(0U)
AnnaBridge	156:ff21514d8981	965
AnnaBridge	156:ff21514d8981	966	/**
AnnaBridge	156:ff21514d8981	967	* @brief Enables the DSI regulator.
AnnaBridge	163:e59c8e839560	968	* @param __HANDLE__ DSI handle
AnnaBridge	156:ff21514d8981	969	* @retval None.
AnnaBridge	156:ff21514d8981	970	*/
AnnaBridge	163:e59c8e839560	971	#define __HAL_DSI_REG_ENABLE(__HANDLE__) do { \
AnnaBridge	163:e59c8e839560	972	__IO uint32_t tmpreg = 0x00U; \
AnnaBridge	163:e59c8e839560	973	SET_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_REGEN);\
AnnaBridge	163:e59c8e839560	974	/* Delay after an DSI regulator enabling */ \
AnnaBridge	163:e59c8e839560	975	tmpreg = READ_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_REGEN);\
AnnaBridge	163:e59c8e839560	976	UNUSED(tmpreg); \
AnnaBridge	163:e59c8e839560	977	}while(0U)
AnnaBridge	156:ff21514d8981	978
AnnaBridge	156:ff21514d8981	979	/**
AnnaBridge	156:ff21514d8981	980	* @brief Disables the DSI regulator.
AnnaBridge	163:e59c8e839560	981	* @param __HANDLE__ DSI handle
AnnaBridge	156:ff21514d8981	982	* @retval None.
AnnaBridge	156:ff21514d8981	983	*/
AnnaBridge	163:e59c8e839560	984	#define __HAL_DSI_REG_DISABLE(__HANDLE__) do { \
AnnaBridge	163:e59c8e839560	985	__IO uint32_t tmpreg = 0x00U; \
AnnaBridge	163:e59c8e839560	986	CLEAR_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_REGEN);\
AnnaBridge	163:e59c8e839560	987	/* Delay after an DSI regulator disabling */ \
AnnaBridge	163:e59c8e839560	988	tmpreg = READ_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_REGEN);\
AnnaBridge	163:e59c8e839560	989	UNUSED(tmpreg); \
AnnaBridge	163:e59c8e839560	990	}while(0U)
AnnaBridge	156:ff21514d8981	991
AnnaBridge	156:ff21514d8981	992	/**
AnnaBridge	156:ff21514d8981	993	* @brief Get the DSI pending flags.
AnnaBridge	163:e59c8e839560	994	* @param __HANDLE__ DSI handle.
AnnaBridge	163:e59c8e839560	995	* @param __FLAG__ Get the specified flag.
AnnaBridge	156:ff21514d8981	996	* This parameter can be any combination of the following values:
AnnaBridge	163:e59c8e839560	997	* @arg DSI_FLAG_TE : Tearing Effect Interrupt Flag
AnnaBridge	163:e59c8e839560	998	* @arg DSI_FLAG_ER : End of Refresh Interrupt Flag
AnnaBridge	156:ff21514d8981	999	* @arg DSI_FLAG_BUSY : Busy Flag
AnnaBridge	156:ff21514d8981	1000	* @arg DSI_FLAG_PLLLS: PLL Lock Status
AnnaBridge	156:ff21514d8981	1001	* @arg DSI_FLAG_PLLL : PLL Lock Interrupt Flag
AnnaBridge	156:ff21514d8981	1002	* @arg DSI_FLAG_PLLU : PLL Unlock Interrupt Flag
AnnaBridge	156:ff21514d8981	1003	* @arg DSI_FLAG_RRS : Regulator Ready Flag
AnnaBridge	156:ff21514d8981	1004	* @arg DSI_FLAG_RR : Regulator Ready Interrupt Flag
AnnaBridge	156:ff21514d8981	1005	* @retval The state of FLAG (SET or RESET).
AnnaBridge	156:ff21514d8981	1006	*/
AnnaBridge	156:ff21514d8981	1007	#define __HAL_DSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->WISR & (__FLAG__))
AnnaBridge	156:ff21514d8981	1008
AnnaBridge	156:ff21514d8981	1009	/**
AnnaBridge	156:ff21514d8981	1010	* @brief Clears the DSI pending flags.
AnnaBridge	163:e59c8e839560	1011	* @param __HANDLE__ DSI handle.
AnnaBridge	163:e59c8e839560	1012	* @param __FLAG__ specifies the flag to clear.
AnnaBridge	156:ff21514d8981	1013	* This parameter can be any combination of the following values:
AnnaBridge	163:e59c8e839560	1014	* @arg DSI_FLAG_TE : Tearing Effect Interrupt Flag
AnnaBridge	163:e59c8e839560	1015	* @arg DSI_FLAG_ER : End of Refresh Interrupt Flag
AnnaBridge	156:ff21514d8981	1016	* @arg DSI_FLAG_PLLL : PLL Lock Interrupt Flag
AnnaBridge	156:ff21514d8981	1017	* @arg DSI_FLAG_PLLU : PLL Unlock Interrupt Flag
AnnaBridge	156:ff21514d8981	1018	* @arg DSI_FLAG_RR : Regulator Ready Interrupt Flag
AnnaBridge	156:ff21514d8981	1019	* @retval None
AnnaBridge	156:ff21514d8981	1020	*/
AnnaBridge	156:ff21514d8981	1021	#define __HAL_DSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->WIFCR = (__FLAG__))
AnnaBridge	156:ff21514d8981	1022
AnnaBridge	156:ff21514d8981	1023	/**
AnnaBridge	156:ff21514d8981	1024	* @brief Enables the specified DSI interrupts.
AnnaBridge	163:e59c8e839560	1025	* @param __HANDLE__ DSI handle.
AnnaBridge	163:e59c8e839560	1026	* @param __INTERRUPT__ specifies the DSI interrupt sources to be enabled.
AnnaBridge	156:ff21514d8981	1027	* This parameter can be any combination of the following values:
AnnaBridge	156:ff21514d8981	1028	* @arg DSI_IT_TE : Tearing Effect Interrupt
AnnaBridge	156:ff21514d8981	1029	* @arg DSI_IT_ER : End of Refresh Interrupt
AnnaBridge	156:ff21514d8981	1030	* @arg DSI_IT_PLLL: PLL Lock Interrupt
AnnaBridge	156:ff21514d8981	1031	* @arg DSI_IT_PLLU: PLL Unlock Interrupt
AnnaBridge	156:ff21514d8981	1032	* @arg DSI_IT_RR : Regulator Ready Interrupt
AnnaBridge	156:ff21514d8981	1033	* @retval None
AnnaBridge	156:ff21514d8981	1034	*/
AnnaBridge	156:ff21514d8981	1035	#define __HAL_DSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WIER \|= (__INTERRUPT__))
AnnaBridge	156:ff21514d8981	1036
AnnaBridge	156:ff21514d8981	1037	/**
AnnaBridge	156:ff21514d8981	1038	* @brief Disables the specified DSI interrupts.
AnnaBridge	163:e59c8e839560	1039	* @param __HANDLE__ DSI handle
AnnaBridge	163:e59c8e839560	1040	* @param __INTERRUPT__ specifies the DSI interrupt sources to be disabled.
AnnaBridge	156:ff21514d8981	1041	* This parameter can be any combination of the following values:
AnnaBridge	156:ff21514d8981	1042	* @arg DSI_IT_TE : Tearing Effect Interrupt
AnnaBridge	156:ff21514d8981	1043	* @arg DSI_IT_ER : End of Refresh Interrupt
AnnaBridge	156:ff21514d8981	1044	* @arg DSI_IT_PLLL: PLL Lock Interrupt
AnnaBridge	156:ff21514d8981	1045	* @arg DSI_IT_PLLU: PLL Unlock Interrupt
AnnaBridge	156:ff21514d8981	1046	* @arg DSI_IT_RR : Regulator Ready Interrupt
AnnaBridge	156:ff21514d8981	1047	* @retval None
AnnaBridge	156:ff21514d8981	1048	*/
AnnaBridge	156:ff21514d8981	1049	#define __HAL_DSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WIER &= ~(__INTERRUPT__))
AnnaBridge	156:ff21514d8981	1050
AnnaBridge	156:ff21514d8981	1051	/**
AnnaBridge	163:e59c8e839560	1052	* @brief Checks whether the specified DSI interrupt source is enabled or not.
AnnaBridge	163:e59c8e839560	1053	* @param __HANDLE__ DSI handle
AnnaBridge	163:e59c8e839560	1054	* @param __INTERRUPT__ specifies the DSI interrupt source to check.
AnnaBridge	156:ff21514d8981	1055	* This parameter can be one of the following values:
AnnaBridge	156:ff21514d8981	1056	* @arg DSI_IT_TE : Tearing Effect Interrupt
AnnaBridge	156:ff21514d8981	1057	* @arg DSI_IT_ER : End of Refresh Interrupt
AnnaBridge	156:ff21514d8981	1058	* @arg DSI_IT_PLLL: PLL Lock Interrupt
AnnaBridge	156:ff21514d8981	1059	* @arg DSI_IT_PLLU: PLL Unlock Interrupt
AnnaBridge	156:ff21514d8981	1060	* @arg DSI_IT_RR : Regulator Ready Interrupt
AnnaBridge	156:ff21514d8981	1061	* @retval The state of INTERRUPT (SET or RESET).
AnnaBridge	156:ff21514d8981	1062	*/
AnnaBridge	156:ff21514d8981	1063	#define __HAL_DSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WIER & (__INTERRUPT__))
AnnaBridge	156:ff21514d8981	1064
AnnaBridge	156:ff21514d8981	1065	/* Exported functions --------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	1066	/** @defgroup DSI_Exported_Functions DSI Exported Functions
AnnaBridge	156:ff21514d8981	1067	* @{
AnnaBridge	156:ff21514d8981	1068	*/
AnnaBridge	156:ff21514d8981	1069	HAL_StatusTypeDef HAL_DSI_Init(DSI_HandleTypeDef hdsi, DSI_PLLInitTypeDef PLLInit);
AnnaBridge	156:ff21514d8981	1070	HAL_StatusTypeDef HAL_DSI_DeInit(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1071	void HAL_DSI_MspInit(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1072	void HAL_DSI_MspDeInit(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1073
AnnaBridge	156:ff21514d8981	1074	void HAL_DSI_IRQHandler(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1075	void HAL_DSI_TearingEffectCallback(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1076	void HAL_DSI_EndOfRefreshCallback(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1077	void HAL_DSI_ErrorCallback(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1078
AnnaBridge	156:ff21514d8981	1079	HAL_StatusTypeDef HAL_DSI_SetGenericVCID(DSI_HandleTypeDef *hdsi, uint32_t VirtualChannelID);
AnnaBridge	156:ff21514d8981	1080	HAL_StatusTypeDef HAL_DSI_ConfigVideoMode(DSI_HandleTypeDef hdsi, DSI_VidCfgTypeDef VidCfg);
AnnaBridge	156:ff21514d8981	1081	HAL_StatusTypeDef HAL_DSI_ConfigAdaptedCommandMode(DSI_HandleTypeDef hdsi, DSI_CmdCfgTypeDef CmdCfg);
AnnaBridge	156:ff21514d8981	1082	HAL_StatusTypeDef HAL_DSI_ConfigCommand(DSI_HandleTypeDef hdsi, DSI_LPCmdTypeDef LPCmd);
AnnaBridge	156:ff21514d8981	1083	HAL_StatusTypeDef HAL_DSI_ConfigFlowControl(DSI_HandleTypeDef *hdsi, uint32_t FlowControl);
AnnaBridge	156:ff21514d8981	1084	HAL_StatusTypeDef HAL_DSI_ConfigPhyTimer(DSI_HandleTypeDef hdsi, DSI_PHY_TimerTypeDef PhyTimers);
AnnaBridge	156:ff21514d8981	1085	HAL_StatusTypeDef HAL_DSI_ConfigHostTimeouts(DSI_HandleTypeDef hdsi, DSI_HOST_TimeoutTypeDef HostTimeouts);
AnnaBridge	156:ff21514d8981	1086	HAL_StatusTypeDef HAL_DSI_Start(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1087	HAL_StatusTypeDef HAL_DSI_Stop(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1088	HAL_StatusTypeDef HAL_DSI_Refresh(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1089	HAL_StatusTypeDef HAL_DSI_ColorMode(DSI_HandleTypeDef *hdsi, uint32_t ColorMode);
AnnaBridge	156:ff21514d8981	1090	HAL_StatusTypeDef HAL_DSI_Shutdown(DSI_HandleTypeDef *hdsi, uint32_t Shutdown);
AnnaBridge	156:ff21514d8981	1091	HAL_StatusTypeDef HAL_DSI_ShortWrite(DSI_HandleTypeDef *hdsi,
AnnaBridge	156:ff21514d8981	1092	uint32_t ChannelID,
AnnaBridge	156:ff21514d8981	1093	uint32_t Mode,
AnnaBridge	156:ff21514d8981	1094	uint32_t Param1,
AnnaBridge	156:ff21514d8981	1095	uint32_t Param2);
AnnaBridge	156:ff21514d8981	1096	HAL_StatusTypeDef HAL_DSI_LongWrite(DSI_HandleTypeDef *hdsi,
AnnaBridge	156:ff21514d8981	1097	uint32_t ChannelID,
AnnaBridge	156:ff21514d8981	1098	uint32_t Mode,
AnnaBridge	156:ff21514d8981	1099	uint32_t NbParams,
AnnaBridge	156:ff21514d8981	1100	uint32_t Param1,
AnnaBridge	156:ff21514d8981	1101	uint8_t* ParametersTable);
AnnaBridge	156:ff21514d8981	1102	HAL_StatusTypeDef HAL_DSI_Read(DSI_HandleTypeDef *hdsi,
AnnaBridge	156:ff21514d8981	1103	uint32_t ChannelNbr,
AnnaBridge	156:ff21514d8981	1104	uint8_t* Array,
AnnaBridge	156:ff21514d8981	1105	uint32_t Size,
AnnaBridge	156:ff21514d8981	1106	uint32_t Mode,
AnnaBridge	156:ff21514d8981	1107	uint32_t DCSCmd,
AnnaBridge	156:ff21514d8981	1108	uint8_t* ParametersTable);
AnnaBridge	156:ff21514d8981	1109	HAL_StatusTypeDef HAL_DSI_EnterULPMData(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1110	HAL_StatusTypeDef HAL_DSI_ExitULPMData(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1111	HAL_StatusTypeDef HAL_DSI_EnterULPM(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1112	HAL_StatusTypeDef HAL_DSI_ExitULPM(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1113
AnnaBridge	156:ff21514d8981	1114	HAL_StatusTypeDef HAL_DSI_PatternGeneratorStart(DSI_HandleTypeDef *hdsi, uint32_t Mode, uint32_t Orientation);
AnnaBridge	156:ff21514d8981	1115	HAL_StatusTypeDef HAL_DSI_PatternGeneratorStop(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1116
AnnaBridge	156:ff21514d8981	1117	HAL_StatusTypeDef HAL_DSI_SetSlewRateAndDelayTuning(DSI_HandleTypeDef *hdsi, uint32_t CommDelay, uint32_t Lane, uint32_t Value);
AnnaBridge	156:ff21514d8981	1118	HAL_StatusTypeDef HAL_DSI_SetLowPowerRXFilter(DSI_HandleTypeDef *hdsi, uint32_t Frequency);
AnnaBridge	156:ff21514d8981	1119	HAL_StatusTypeDef HAL_DSI_SetSDD(DSI_HandleTypeDef *hdsi, FunctionalState State);
AnnaBridge	156:ff21514d8981	1120	HAL_StatusTypeDef HAL_DSI_SetLanePinsConfiguration(DSI_HandleTypeDef *hdsi, uint32_t CustomLane, uint32_t Lane, FunctionalState State);
AnnaBridge	156:ff21514d8981	1121	HAL_StatusTypeDef HAL_DSI_SetPHYTimings(DSI_HandleTypeDef *hdsi, uint32_t Timing, FunctionalState State, uint32_t Value);
AnnaBridge	156:ff21514d8981	1122	HAL_StatusTypeDef HAL_DSI_ForceTXStopMode(DSI_HandleTypeDef *hdsi, uint32_t Lane, FunctionalState State);
AnnaBridge	156:ff21514d8981	1123	HAL_StatusTypeDef HAL_DSI_ForceRXLowPower(DSI_HandleTypeDef *hdsi, FunctionalState State);
AnnaBridge	156:ff21514d8981	1124	HAL_StatusTypeDef HAL_DSI_ForceDataLanesInRX(DSI_HandleTypeDef *hdsi, FunctionalState State);
AnnaBridge	156:ff21514d8981	1125	HAL_StatusTypeDef HAL_DSI_SetPullDown(DSI_HandleTypeDef *hdsi, FunctionalState State);
AnnaBridge	156:ff21514d8981	1126	HAL_StatusTypeDef HAL_DSI_SetContentionDetectionOff(DSI_HandleTypeDef *hdsi, FunctionalState State);
AnnaBridge	156:ff21514d8981	1127
AnnaBridge	156:ff21514d8981	1128	uint32_t HAL_DSI_GetError(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1129	HAL_StatusTypeDef HAL_DSI_ConfigErrorMonitor(DSI_HandleTypeDef *hdsi, uint32_t ActiveErrors);
AnnaBridge	156:ff21514d8981	1130	HAL_DSI_StateTypeDef HAL_DSI_GetState(DSI_HandleTypeDef *hdsi);
AnnaBridge	156:ff21514d8981	1131	/**
AnnaBridge	156:ff21514d8981	1132	* @}
AnnaBridge	156:ff21514d8981	1133	*/
AnnaBridge	156:ff21514d8981	1134
AnnaBridge	156:ff21514d8981	1135	/* Private types -------------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	1136	/** @defgroup DSI_Private_Types DSI Private Types
AnnaBridge	156:ff21514d8981	1137	* @{
AnnaBridge	156:ff21514d8981	1138	*/
AnnaBridge	156:ff21514d8981	1139
AnnaBridge	156:ff21514d8981	1140	/**
AnnaBridge	156:ff21514d8981	1141	* @}
AnnaBridge	163:e59c8e839560	1142	*/
AnnaBridge	156:ff21514d8981	1143
AnnaBridge	156:ff21514d8981	1144	/* Private defines -----------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	1145	/** @defgroup DSI_Private_Defines DSI Private Defines
AnnaBridge	156:ff21514d8981	1146	* @{
AnnaBridge	156:ff21514d8981	1147	*/
AnnaBridge	156:ff21514d8981	1148
AnnaBridge	156:ff21514d8981	1149	/**
AnnaBridge	156:ff21514d8981	1150	* @}
AnnaBridge	163:e59c8e839560	1151	*/
AnnaBridge	163:e59c8e839560	1152
AnnaBridge	156:ff21514d8981	1153	/* Private variables ---------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	1154	/** @defgroup DSI_Private_Variables DSI Private Variables
AnnaBridge	156:ff21514d8981	1155	* @{
AnnaBridge	156:ff21514d8981	1156	*/
AnnaBridge	156:ff21514d8981	1157
AnnaBridge	156:ff21514d8981	1158	/**
AnnaBridge	156:ff21514d8981	1159	* @}
AnnaBridge	163:e59c8e839560	1160	*/
AnnaBridge	156:ff21514d8981	1161
AnnaBridge	156:ff21514d8981	1162	/* Private constants ---------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	1163	/** @defgroup DSI_Private_Constants DSI Private Constants
AnnaBridge	156:ff21514d8981	1164	* @{
AnnaBridge	156:ff21514d8981	1165	*/
AnnaBridge	163:e59c8e839560	1166	#define DSI_MAX_RETURN_PKT_SIZE (0x00000037U) /!< Maximum return packet configuration /
AnnaBridge	156:ff21514d8981	1167	/**
AnnaBridge	156:ff21514d8981	1168	* @}
AnnaBridge	163:e59c8e839560	1169	*/
AnnaBridge	156:ff21514d8981	1170
AnnaBridge	156:ff21514d8981	1171	/* Private macros ------------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	1172	/** @defgroup DSI_Private_Macros DSI Private Macros
AnnaBridge	156:ff21514d8981	1173	* @{
AnnaBridge	156:ff21514d8981	1174	*/
AnnaBridge	156:ff21514d8981	1175	#define IS_DSI_PLL_NDIV(NDIV) ((10U <= (NDIV)) && ((NDIV) <= 125U))
AnnaBridge	156:ff21514d8981	1176	#define IS_DSI_PLL_IDF(IDF) (((IDF) == DSI_PLL_IN_DIV1) \|\| \
AnnaBridge	156:ff21514d8981	1177	((IDF) == DSI_PLL_IN_DIV2) \|\| \
AnnaBridge	156:ff21514d8981	1178	((IDF) == DSI_PLL_IN_DIV3) \|\| \
AnnaBridge	156:ff21514d8981	1179	((IDF) == DSI_PLL_IN_DIV4) \|\| \
AnnaBridge	156:ff21514d8981	1180	((IDF) == DSI_PLL_IN_DIV5) \|\| \
AnnaBridge	156:ff21514d8981	1181	((IDF) == DSI_PLL_IN_DIV6) \|\| \
AnnaBridge	156:ff21514d8981	1182	((IDF) == DSI_PLL_IN_DIV7))
AnnaBridge	156:ff21514d8981	1183	#define IS_DSI_PLL_ODF(ODF) (((ODF) == DSI_PLL_OUT_DIV1) \|\| \
AnnaBridge	156:ff21514d8981	1184	((ODF) == DSI_PLL_OUT_DIV2) \|\| \
AnnaBridge	156:ff21514d8981	1185	((ODF) == DSI_PLL_OUT_DIV4) \|\| \
AnnaBridge	156:ff21514d8981	1186	((ODF) == DSI_PLL_OUT_DIV8))
AnnaBridge	156:ff21514d8981	1187	#define IS_DSI_AUTO_CLKLANE_CONTROL(AutoClkLane) (((AutoClkLane) == DSI_AUTO_CLK_LANE_CTRL_DISABLE) \|\| ((AutoClkLane) == DSI_AUTO_CLK_LANE_CTRL_ENABLE))
AnnaBridge	156:ff21514d8981	1188	#define IS_DSI_NUMBER_OF_LANES(NumberOfLanes) (((NumberOfLanes) == DSI_ONE_DATA_LANE) \|\| ((NumberOfLanes) == DSI_TWO_DATA_LANES))
AnnaBridge	156:ff21514d8981	1189	#define IS_DSI_FLOW_CONTROL(FlowControl) (((FlowControl) \| DSI_FLOW_CONTROL_ALL) == DSI_FLOW_CONTROL_ALL)
AnnaBridge	156:ff21514d8981	1190	#define IS_DSI_COLOR_CODING(ColorCoding) ((ColorCoding) <= 5U)
AnnaBridge	156:ff21514d8981	1191	#define IS_DSI_LOOSELY_PACKED(LooselyPacked) (((LooselyPacked) == DSI_LOOSELY_PACKED_ENABLE) \|\| ((LooselyPacked) == DSI_LOOSELY_PACKED_DISABLE))
AnnaBridge	156:ff21514d8981	1192	#define IS_DSI_DE_POLARITY(DataEnable) (((DataEnable) == DSI_DATA_ENABLE_ACTIVE_HIGH) \|\| ((DataEnable) == DSI_DATA_ENABLE_ACTIVE_LOW))
AnnaBridge	156:ff21514d8981	1193	#define IS_DSI_VSYNC_POLARITY(VSYNC) (((VSYNC) == DSI_VSYNC_ACTIVE_HIGH) \|\| ((VSYNC) == DSI_VSYNC_ACTIVE_LOW))
AnnaBridge	156:ff21514d8981	1194	#define IS_DSI_HSYNC_POLARITY(HSYNC) (((HSYNC) == DSI_HSYNC_ACTIVE_HIGH) \|\| ((HSYNC) == DSI_HSYNC_ACTIVE_LOW))
AnnaBridge	156:ff21514d8981	1195	#define IS_DSI_VIDEO_MODE_TYPE(VideoModeType) (((VideoModeType) == DSI_VID_MODE_NB_PULSES) \|\| \
AnnaBridge	156:ff21514d8981	1196	((VideoModeType) == DSI_VID_MODE_NB_EVENTS) \|\| \
AnnaBridge	156:ff21514d8981	1197	((VideoModeType) == DSI_VID_MODE_BURST))
AnnaBridge	156:ff21514d8981	1198	#define IS_DSI_COLOR_MODE(ColorMode) (((ColorMode) == DSI_COLOR_MODE_FULL) \|\| ((ColorMode) == DSI_COLOR_MODE_EIGHT))
AnnaBridge	156:ff21514d8981	1199	#define IS_DSI_SHUT_DOWN(ShutDown) (((ShutDown) == DSI_DISPLAY_ON) \|\| ((ShutDown) == DSI_DISPLAY_OFF))
AnnaBridge	156:ff21514d8981	1200	#define IS_DSI_LP_COMMAND(LPCommand) (((LPCommand) == DSI_LP_COMMAND_DISABLE) \|\| ((LPCommand) == DSI_LP_COMMAND_ENABLE))
AnnaBridge	156:ff21514d8981	1201	#define IS_DSI_LP_HFP(LPHFP) (((LPHFP) == DSI_LP_HFP_DISABLE) \|\| ((LPHFP) == DSI_LP_HFP_ENABLE))
AnnaBridge	156:ff21514d8981	1202	#define IS_DSI_LP_HBP(LPHBP) (((LPHBP) == DSI_LP_HBP_DISABLE) \|\| ((LPHBP) == DSI_LP_HBP_ENABLE))
AnnaBridge	156:ff21514d8981	1203	#define IS_DSI_LP_VACTIVE(LPVActive) (((LPVActive) == DSI_LP_VACT_DISABLE) \|\| ((LPVActive) == DSI_LP_VACT_ENABLE))
AnnaBridge	156:ff21514d8981	1204	#define IS_DSI_LP_VFP(LPVFP) (((LPVFP) == DSI_LP_VFP_DISABLE) \|\| ((LPVFP) == DSI_LP_VFP_ENABLE))
AnnaBridge	156:ff21514d8981	1205	#define IS_DSI_LP_VBP(LPVBP) (((LPVBP) == DSI_LP_VBP_DISABLE) \|\| ((LPVBP) == DSI_LP_VBP_ENABLE))
AnnaBridge	156:ff21514d8981	1206	#define IS_DSI_LP_VSYNC(LPVSYNC) (((LPVSYNC) == DSI_LP_VSYNC_DISABLE) \|\| ((LPVSYNC) == DSI_LP_VSYNC_ENABLE))
AnnaBridge	156:ff21514d8981	1207	#define IS_DSI_FBTAA(FrameBTAAcknowledge) (((FrameBTAAcknowledge) == DSI_FBTAA_DISABLE) \|\| ((FrameBTAAcknowledge) == DSI_FBTAA_ENABLE))
AnnaBridge	156:ff21514d8981	1208	#define IS_DSI_TE_SOURCE(TESource) (((TESource) == DSI_TE_DSILINK) \|\| ((TESource) == DSI_TE_EXTERNAL))
AnnaBridge	156:ff21514d8981	1209	#define IS_DSI_TE_POLARITY(TEPolarity) (((TEPolarity) == DSI_TE_RISING_EDGE) \|\| ((TEPolarity) == DSI_TE_FALLING_EDGE))
AnnaBridge	156:ff21514d8981	1210	#define IS_DSI_AUTOMATIC_REFRESH(AutomaticRefresh) (((AutomaticRefresh) == DSI_AR_DISABLE) \|\| ((AutomaticRefresh) == DSI_AR_ENABLE))
AnnaBridge	156:ff21514d8981	1211	#define IS_DSI_VS_POLARITY(VSPolarity) (((VSPolarity) == DSI_VSYNC_FALLING) \|\| ((VSPolarity) == DSI_VSYNC_RISING))
AnnaBridge	156:ff21514d8981	1212	#define IS_DSI_TE_ACK_REQUEST(TEAcknowledgeRequest) (((TEAcknowledgeRequest) == DSI_TE_ACKNOWLEDGE_DISABLE) \|\| ((TEAcknowledgeRequest) == DSI_TE_ACKNOWLEDGE_ENABLE))
AnnaBridge	156:ff21514d8981	1213	#define IS_DSI_ACK_REQUEST(AcknowledgeRequest) (((AcknowledgeRequest) == DSI_ACKNOWLEDGE_DISABLE) \|\| ((AcknowledgeRequest) == DSI_ACKNOWLEDGE_ENABLE))
AnnaBridge	156:ff21514d8981	1214	#define IS_DSI_LP_GSW0P(LP_GSW0P) (((LP_GSW0P) == DSI_LP_GSW0P_DISABLE) \|\| ((LP_GSW0P) == DSI_LP_GSW0P_ENABLE))
AnnaBridge	156:ff21514d8981	1215	#define IS_DSI_LP_GSW1P(LP_GSW1P) (((LP_GSW1P) == DSI_LP_GSW1P_DISABLE) \|\| ((LP_GSW1P) == DSI_LP_GSW1P_ENABLE))
AnnaBridge	156:ff21514d8981	1216	#define IS_DSI_LP_GSW2P(LP_GSW2P) (((LP_GSW2P) == DSI_LP_GSW2P_DISABLE) \|\| ((LP_GSW2P) == DSI_LP_GSW2P_ENABLE))
AnnaBridge	156:ff21514d8981	1217	#define IS_DSI_LP_GSR0P(LP_GSR0P) (((LP_GSR0P) == DSI_LP_GSR0P_DISABLE) \|\| ((LP_GSR0P) == DSI_LP_GSR0P_ENABLE))
AnnaBridge	156:ff21514d8981	1218	#define IS_DSI_LP_GSR1P(LP_GSR1P) (((LP_GSR1P) == DSI_LP_GSR1P_DISABLE) \|\| ((LP_GSR1P) == DSI_LP_GSR1P_ENABLE))
AnnaBridge	156:ff21514d8981	1219	#define IS_DSI_LP_GSR2P(LP_GSR2P) (((LP_GSR2P) == DSI_LP_GSR2P_DISABLE) \|\| ((LP_GSR2P) == DSI_LP_GSR2P_ENABLE))
AnnaBridge	156:ff21514d8981	1220	#define IS_DSI_LP_GLW(LP_GLW) (((LP_GLW) == DSI_LP_GLW_DISABLE) \|\| ((LP_GLW) == DSI_LP_GLW_ENABLE))
AnnaBridge	156:ff21514d8981	1221	#define IS_DSI_LP_DSW0P(LP_DSW0P) (((LP_DSW0P) == DSI_LP_DSW0P_DISABLE) \|\| ((LP_DSW0P) == DSI_LP_DSW0P_ENABLE))
AnnaBridge	156:ff21514d8981	1222	#define IS_DSI_LP_DSW1P(LP_DSW1P) (((LP_DSW1P) == DSI_LP_DSW1P_DISABLE) \|\| ((LP_DSW1P) == DSI_LP_DSW1P_ENABLE))
AnnaBridge	156:ff21514d8981	1223	#define IS_DSI_LP_DSR0P(LP_DSR0P) (((LP_DSR0P) == DSI_LP_DSR0P_DISABLE) \|\| ((LP_DSR0P) == DSI_LP_DSR0P_ENABLE))
AnnaBridge	156:ff21514d8981	1224	#define IS_DSI_LP_DLW(LP_DLW) (((LP_DLW) == DSI_LP_DLW_DISABLE) \|\| ((LP_DLW) == DSI_LP_DLW_ENABLE))
AnnaBridge	156:ff21514d8981	1225	#define IS_DSI_LP_MRDP(LP_MRDP) (((LP_MRDP) == DSI_LP_MRDP_DISABLE) \|\| ((LP_MRDP) == DSI_LP_MRDP_ENABLE))
AnnaBridge	156:ff21514d8981	1226	#define IS_DSI_SHORT_WRITE_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_SHORT_PKT_WRITE_P0) \|\| \
AnnaBridge	156:ff21514d8981	1227	((MODE) == DSI_DCS_SHORT_PKT_WRITE_P1) \|\| \
AnnaBridge	156:ff21514d8981	1228	((MODE) == DSI_GEN_SHORT_PKT_WRITE_P0) \|\| \
AnnaBridge	156:ff21514d8981	1229	((MODE) == DSI_GEN_SHORT_PKT_WRITE_P1) \|\| \
AnnaBridge	156:ff21514d8981	1230	((MODE) == DSI_GEN_SHORT_PKT_WRITE_P2))
AnnaBridge	156:ff21514d8981	1231	#define IS_DSI_LONG_WRITE_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_LONG_PKT_WRITE) \|\| \
AnnaBridge	156:ff21514d8981	1232	((MODE) == DSI_GEN_LONG_PKT_WRITE))
AnnaBridge	156:ff21514d8981	1233	#define IS_DSI_READ_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_SHORT_PKT_READ) \|\| \
AnnaBridge	156:ff21514d8981	1234	((MODE) == DSI_GEN_SHORT_PKT_READ_P0) \|\| \
AnnaBridge	156:ff21514d8981	1235	((MODE) == DSI_GEN_SHORT_PKT_READ_P1) \|\| \
AnnaBridge	156:ff21514d8981	1236	((MODE) == DSI_GEN_SHORT_PKT_READ_P2))
AnnaBridge	156:ff21514d8981	1237	#define IS_DSI_COMMUNICATION_DELAY(CommDelay) (((CommDelay) == DSI_SLEW_RATE_HSTX) \|\| ((CommDelay) == DSI_SLEW_RATE_LPTX) \|\| ((CommDelay) == DSI_HS_DELAY))
AnnaBridge	156:ff21514d8981	1238	#define IS_DSI_LANE_GROUP(Lane) (((Lane) == DSI_CLOCK_LANE) \|\| ((Lane) == DSI_DATA_LANES))
AnnaBridge	156:ff21514d8981	1239	#define IS_DSI_CUSTOM_LANE(CustomLane) (((CustomLane) == DSI_SWAP_LANE_PINS) \|\| ((CustomLane) == DSI_INVERT_HS_SIGNAL))
AnnaBridge	156:ff21514d8981	1240	#define IS_DSI_LANE(Lane) (((Lane) == DSI_CLOCK_LANE) \|\| ((Lane) == DSI_DATA_LANE0) \|\| ((Lane) == DSI_DATA_LANE1))
AnnaBridge	156:ff21514d8981	1241	#define IS_DSI_PHY_TIMING(Timing) (((Timing) == DSI_TCLK_POST ) \|\| \
AnnaBridge	156:ff21514d8981	1242	((Timing) == DSI_TLPX_CLK ) \|\| \
AnnaBridge	156:ff21514d8981	1243	((Timing) == DSI_THS_EXIT ) \|\| \
AnnaBridge	156:ff21514d8981	1244	((Timing) == DSI_TLPX_DATA ) \|\| \
AnnaBridge	156:ff21514d8981	1245	((Timing) == DSI_THS_ZERO ) \|\| \
AnnaBridge	156:ff21514d8981	1246	((Timing) == DSI_THS_TRAIL ) \|\| \
AnnaBridge	156:ff21514d8981	1247	((Timing) == DSI_THS_PREPARE ) \|\| \
AnnaBridge	156:ff21514d8981	1248	((Timing) == DSI_TCLK_ZERO ) \|\| \
AnnaBridge	156:ff21514d8981	1249	((Timing) == DSI_TCLK_PREPARE))
AnnaBridge	156:ff21514d8981	1250
AnnaBridge	156:ff21514d8981	1251	/**
AnnaBridge	156:ff21514d8981	1252	* @}
AnnaBridge	163:e59c8e839560	1253	*/
AnnaBridge	156:ff21514d8981	1254
AnnaBridge	156:ff21514d8981	1255	/* Private functions prototypes ----------------------------------------------*/
AnnaBridge	156:ff21514d8981	1256	/** @defgroup DSI_Private_Functions_Prototypes DSI Private Functions Prototypes
AnnaBridge	156:ff21514d8981	1257	* @{
AnnaBridge	156:ff21514d8981	1258	*/
AnnaBridge	156:ff21514d8981	1259
AnnaBridge	156:ff21514d8981	1260	/**
AnnaBridge	156:ff21514d8981	1261	* @}
AnnaBridge	156:ff21514d8981	1262	*/
AnnaBridge	156:ff21514d8981	1263
AnnaBridge	156:ff21514d8981	1264	/* Private functions ---------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	1265	/** @defgroup DSI_Private_Functions DSI Private Functions
AnnaBridge	156:ff21514d8981	1266	* @{
AnnaBridge	156:ff21514d8981	1267	*/
AnnaBridge	156:ff21514d8981	1268
AnnaBridge	156:ff21514d8981	1269	/**
AnnaBridge	156:ff21514d8981	1270	* @}
AnnaBridge	156:ff21514d8981	1271	*/
AnnaBridge	156:ff21514d8981	1272
AnnaBridge	156:ff21514d8981	1273	/**
AnnaBridge	156:ff21514d8981	1274	* @}
AnnaBridge	156:ff21514d8981	1275	*/
AnnaBridge	156:ff21514d8981	1276
AnnaBridge	156:ff21514d8981	1277	/**
AnnaBridge	156:ff21514d8981	1278	* @}
AnnaBridge	156:ff21514d8981	1279	*/
AnnaBridge	163:e59c8e839560	1280	#endif /* DSI */
AnnaBridge	163:e59c8e839560	1281
AnnaBridge	156:ff21514d8981	1282	#ifdef __cplusplus
AnnaBridge	156:ff21514d8981	1283	}
AnnaBridge	156:ff21514d8981	1284	#endif
AnnaBridge	156:ff21514d8981	1285
AnnaBridge	156:ff21514d8981	1286	#endif /* __STM32F4xx_HAL_DSI_H */
AnnaBridge	156:ff21514d8981	1287
AnnaBridge	156:ff21514d8981	1288	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/