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TARGET_MOTE_L152RC/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_pcd.h@128:9bcdf88f62b0, 2016-10-27 (annotated)
- Committer:
- <>
- Date:
- Thu Oct 27 16:45:56 2016 +0100
- Revision:
- 128:9bcdf88f62b0
- Child:
- 165:d1b4690b3f8b
Release 128 of the mbed library
Ports for Upcoming Targets
Fixes and Changes
2966: Add kw24 support https://github.com/ARMmbed/mbed-os/pull/2966
3068: MultiTech mDot - clean up PeripheralPins.c and add new pin names https://github.com/ARMmbed/mbed-os/pull/3068
3089: Kinetis HAL: Remove clock initialization code from serial and ticker https://github.com/ARMmbed/mbed-os/pull/3089
2943: [NRF5] NVIC_SetVector functionality https://github.com/ARMmbed/mbed-os/pull/2943
2938: InterruptIn changes in NCS36510 HAL. https://github.com/ARMmbed/mbed-os/pull/2938
3108: Fix sleep function for NRF52. https://github.com/ARMmbed/mbed-os/pull/3108
3076: STM32F1: Correct timer master value reading https://github.com/ARMmbed/mbed-os/pull/3076
3085: Add LOWPOWERTIMER capability for NUCLEO_F303ZE https://github.com/ARMmbed/mbed-os/pull/3085
3046: [BEETLE] Update BLE stack on Beetle board https://github.com/ARMmbed/mbed-os/pull/3046
3122: [Silicon Labs] Update of Silicon Labs HAL https://github.com/ARMmbed/mbed-os/pull/3122
3022: OnSemi RAM usage fix https://github.com/ARMmbed/mbed-os/pull/3022
3121: STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH https://github.com/ARMmbed/mbed-os/pull/3121
3142: Targets- NUMAKER_PFM_NUC47216 remove mbed 2 https://github.com/ARMmbed/mbed-os/pull/3142
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 128:9bcdf88f62b0 | 1 | /** |
<> | 128:9bcdf88f62b0 | 2 | ****************************************************************************** |
<> | 128:9bcdf88f62b0 | 3 | * @file stm32l1xx_hal_pcd.h |
<> | 128:9bcdf88f62b0 | 4 | * @author MCD Application Team |
<> | 128:9bcdf88f62b0 | 5 | * @version V1.2.0 |
<> | 128:9bcdf88f62b0 | 6 | * @date 01-July-2016 |
<> | 128:9bcdf88f62b0 | 7 | * @brief Header file of PCD HAL module. |
<> | 128:9bcdf88f62b0 | 8 | ****************************************************************************** |
<> | 128:9bcdf88f62b0 | 9 | * @attention |
<> | 128:9bcdf88f62b0 | 10 | * |
<> | 128:9bcdf88f62b0 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
<> | 128:9bcdf88f62b0 | 12 | * |
<> | 128:9bcdf88f62b0 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 128:9bcdf88f62b0 | 14 | * are permitted provided that the following conditions are met: |
<> | 128:9bcdf88f62b0 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 128:9bcdf88f62b0 | 16 | * this list of conditions and the following disclaimer. |
<> | 128:9bcdf88f62b0 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 128:9bcdf88f62b0 | 18 | * this list of conditions and the following disclaimer in the documentation |
<> | 128:9bcdf88f62b0 | 19 | * and/or other materials provided with the distribution. |
<> | 128:9bcdf88f62b0 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 128:9bcdf88f62b0 | 21 | * may be used to endorse or promote products derived from this software |
<> | 128:9bcdf88f62b0 | 22 | * without specific prior written permission. |
<> | 128:9bcdf88f62b0 | 23 | * |
<> | 128:9bcdf88f62b0 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 128:9bcdf88f62b0 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 128:9bcdf88f62b0 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 128:9bcdf88f62b0 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 128:9bcdf88f62b0 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 128:9bcdf88f62b0 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 128:9bcdf88f62b0 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 128:9bcdf88f62b0 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 128:9bcdf88f62b0 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 128:9bcdf88f62b0 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 128:9bcdf88f62b0 | 34 | * |
<> | 128:9bcdf88f62b0 | 35 | ****************************************************************************** |
<> | 128:9bcdf88f62b0 | 36 | */ |
<> | 128:9bcdf88f62b0 | 37 | |
<> | 128:9bcdf88f62b0 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
<> | 128:9bcdf88f62b0 | 39 | #ifndef __STM32L1xx_HAL_PCD_H |
<> | 128:9bcdf88f62b0 | 40 | #define __STM32L1xx_HAL_PCD_H |
<> | 128:9bcdf88f62b0 | 41 | |
<> | 128:9bcdf88f62b0 | 42 | #ifdef __cplusplus |
<> | 128:9bcdf88f62b0 | 43 | extern "C" { |
<> | 128:9bcdf88f62b0 | 44 | #endif |
<> | 128:9bcdf88f62b0 | 45 | |
<> | 128:9bcdf88f62b0 | 46 | /* Includes ------------------------------------------------------------------*/ |
<> | 128:9bcdf88f62b0 | 47 | #include "stm32l1xx_hal_def.h" |
<> | 128:9bcdf88f62b0 | 48 | |
<> | 128:9bcdf88f62b0 | 49 | /** @addtogroup STM32L1xx_HAL_Driver |
<> | 128:9bcdf88f62b0 | 50 | * @{ |
<> | 128:9bcdf88f62b0 | 51 | */ |
<> | 128:9bcdf88f62b0 | 52 | |
<> | 128:9bcdf88f62b0 | 53 | /** @addtogroup PCD |
<> | 128:9bcdf88f62b0 | 54 | * @{ |
<> | 128:9bcdf88f62b0 | 55 | */ |
<> | 128:9bcdf88f62b0 | 56 | |
<> | 128:9bcdf88f62b0 | 57 | /* Exported types ------------------------------------------------------------*/ |
<> | 128:9bcdf88f62b0 | 58 | /** @defgroup PCD_Exported_Types PCD Exported Types |
<> | 128:9bcdf88f62b0 | 59 | * @{ |
<> | 128:9bcdf88f62b0 | 60 | */ |
<> | 128:9bcdf88f62b0 | 61 | |
<> | 128:9bcdf88f62b0 | 62 | /** |
<> | 128:9bcdf88f62b0 | 63 | * @brief PCD State structure definition |
<> | 128:9bcdf88f62b0 | 64 | */ |
<> | 128:9bcdf88f62b0 | 65 | typedef enum |
<> | 128:9bcdf88f62b0 | 66 | { |
<> | 128:9bcdf88f62b0 | 67 | HAL_PCD_STATE_RESET = 0x00, |
<> | 128:9bcdf88f62b0 | 68 | HAL_PCD_STATE_READY = 0x01, |
<> | 128:9bcdf88f62b0 | 69 | HAL_PCD_STATE_ERROR = 0x02, |
<> | 128:9bcdf88f62b0 | 70 | HAL_PCD_STATE_BUSY = 0x03, |
<> | 128:9bcdf88f62b0 | 71 | HAL_PCD_STATE_TIMEOUT = 0x04 |
<> | 128:9bcdf88f62b0 | 72 | } PCD_StateTypeDef; |
<> | 128:9bcdf88f62b0 | 73 | |
<> | 128:9bcdf88f62b0 | 74 | /** |
<> | 128:9bcdf88f62b0 | 75 | * @brief PCD double buffered endpoint direction |
<> | 128:9bcdf88f62b0 | 76 | */ |
<> | 128:9bcdf88f62b0 | 77 | typedef enum |
<> | 128:9bcdf88f62b0 | 78 | { |
<> | 128:9bcdf88f62b0 | 79 | PCD_EP_DBUF_OUT, |
<> | 128:9bcdf88f62b0 | 80 | PCD_EP_DBUF_IN, |
<> | 128:9bcdf88f62b0 | 81 | PCD_EP_DBUF_ERR, |
<> | 128:9bcdf88f62b0 | 82 | }PCD_EP_DBUF_DIR; |
<> | 128:9bcdf88f62b0 | 83 | |
<> | 128:9bcdf88f62b0 | 84 | /** |
<> | 128:9bcdf88f62b0 | 85 | * @brief PCD endpoint buffer number |
<> | 128:9bcdf88f62b0 | 86 | */ |
<> | 128:9bcdf88f62b0 | 87 | typedef enum |
<> | 128:9bcdf88f62b0 | 88 | { |
<> | 128:9bcdf88f62b0 | 89 | PCD_EP_NOBUF, |
<> | 128:9bcdf88f62b0 | 90 | PCD_EP_BUF0, |
<> | 128:9bcdf88f62b0 | 91 | PCD_EP_BUF1 |
<> | 128:9bcdf88f62b0 | 92 | }PCD_EP_BUF_NUM; |
<> | 128:9bcdf88f62b0 | 93 | |
<> | 128:9bcdf88f62b0 | 94 | /** |
<> | 128:9bcdf88f62b0 | 95 | * @brief PCD Initialization Structure definition |
<> | 128:9bcdf88f62b0 | 96 | */ |
<> | 128:9bcdf88f62b0 | 97 | typedef struct |
<> | 128:9bcdf88f62b0 | 98 | { |
<> | 128:9bcdf88f62b0 | 99 | uint32_t dev_endpoints; /*!< Device Endpoints number. |
<> | 128:9bcdf88f62b0 | 100 | This parameter depends on the used USB core. |
<> | 128:9bcdf88f62b0 | 101 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
<> | 128:9bcdf88f62b0 | 102 | |
<> | 128:9bcdf88f62b0 | 103 | uint32_t speed; /*!< USB Core speed. |
<> | 128:9bcdf88f62b0 | 104 | This parameter can be any value of @ref PCD_Core_Speed */ |
<> | 128:9bcdf88f62b0 | 105 | |
<> | 128:9bcdf88f62b0 | 106 | uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. |
<> | 128:9bcdf88f62b0 | 107 | This parameter can be any value of @ref PCD_EP0_MPS */ |
<> | 128:9bcdf88f62b0 | 108 | |
<> | 128:9bcdf88f62b0 | 109 | uint32_t phy_itface; /*!< Select the used PHY interface. |
<> | 128:9bcdf88f62b0 | 110 | This parameter can be any value of @ref PCD_Core_PHY */ |
<> | 128:9bcdf88f62b0 | 111 | |
<> | 128:9bcdf88f62b0 | 112 | uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. |
<> | 128:9bcdf88f62b0 | 113 | This parameter can be set to ENABLE or DISABLE */ |
<> | 128:9bcdf88f62b0 | 114 | |
<> | 128:9bcdf88f62b0 | 115 | uint32_t low_power_enable; /*!< Enable or disable Low Power mode |
<> | 128:9bcdf88f62b0 | 116 | This parameter can be set to ENABLE or DISABLE */ |
<> | 128:9bcdf88f62b0 | 117 | |
<> | 128:9bcdf88f62b0 | 118 | uint32_t lpm_enable; /*!< Enable or disable the Link Power Management . |
<> | 128:9bcdf88f62b0 | 119 | This parameter can be set to ENABLE or DISABLE */ |
<> | 128:9bcdf88f62b0 | 120 | |
<> | 128:9bcdf88f62b0 | 121 | uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. |
<> | 128:9bcdf88f62b0 | 122 | This parameter can be set to ENABLE or DISABLE */ |
<> | 128:9bcdf88f62b0 | 123 | |
<> | 128:9bcdf88f62b0 | 124 | }PCD_InitTypeDef; |
<> | 128:9bcdf88f62b0 | 125 | |
<> | 128:9bcdf88f62b0 | 126 | typedef struct |
<> | 128:9bcdf88f62b0 | 127 | { |
<> | 128:9bcdf88f62b0 | 128 | uint8_t num; /*!< Endpoint number |
<> | 128:9bcdf88f62b0 | 129 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
<> | 128:9bcdf88f62b0 | 130 | |
<> | 128:9bcdf88f62b0 | 131 | uint8_t is_in; /*!< Endpoint direction |
<> | 128:9bcdf88f62b0 | 132 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
<> | 128:9bcdf88f62b0 | 133 | |
<> | 128:9bcdf88f62b0 | 134 | uint8_t is_stall; /*!< Endpoint stall condition |
<> | 128:9bcdf88f62b0 | 135 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
<> | 128:9bcdf88f62b0 | 136 | |
<> | 128:9bcdf88f62b0 | 137 | uint8_t type; /*!< Endpoint type |
<> | 128:9bcdf88f62b0 | 138 | This parameter can be any value of @ref PCD_EP_Type */ |
<> | 128:9bcdf88f62b0 | 139 | |
<> | 128:9bcdf88f62b0 | 140 | uint16_t pmaadress; /*!< PMA Address |
<> | 128:9bcdf88f62b0 | 141 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ |
<> | 128:9bcdf88f62b0 | 142 | |
<> | 128:9bcdf88f62b0 | 143 | |
<> | 128:9bcdf88f62b0 | 144 | uint16_t pmaaddr0; /*!< PMA Address0 |
<> | 128:9bcdf88f62b0 | 145 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ |
<> | 128:9bcdf88f62b0 | 146 | |
<> | 128:9bcdf88f62b0 | 147 | |
<> | 128:9bcdf88f62b0 | 148 | uint16_t pmaaddr1; /*!< PMA Address1 |
<> | 128:9bcdf88f62b0 | 149 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ |
<> | 128:9bcdf88f62b0 | 150 | |
<> | 128:9bcdf88f62b0 | 151 | |
<> | 128:9bcdf88f62b0 | 152 | uint8_t doublebuffer; /*!< Double buffer enable |
<> | 128:9bcdf88f62b0 | 153 | This parameter can be 0 or 1 */ |
<> | 128:9bcdf88f62b0 | 154 | |
<> | 128:9bcdf88f62b0 | 155 | uint32_t maxpacket; /*!< Endpoint Max packet size |
<> | 128:9bcdf88f62b0 | 156 | This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ |
<> | 128:9bcdf88f62b0 | 157 | |
<> | 128:9bcdf88f62b0 | 158 | uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ |
<> | 128:9bcdf88f62b0 | 159 | |
<> | 128:9bcdf88f62b0 | 160 | |
<> | 128:9bcdf88f62b0 | 161 | uint32_t xfer_len; /*!< Current transfer length */ |
<> | 128:9bcdf88f62b0 | 162 | |
<> | 128:9bcdf88f62b0 | 163 | uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ |
<> | 128:9bcdf88f62b0 | 164 | |
<> | 128:9bcdf88f62b0 | 165 | }PCD_EPTypeDef; |
<> | 128:9bcdf88f62b0 | 166 | |
<> | 128:9bcdf88f62b0 | 167 | typedef USB_TypeDef PCD_TypeDef; |
<> | 128:9bcdf88f62b0 | 168 | |
<> | 128:9bcdf88f62b0 | 169 | /** |
<> | 128:9bcdf88f62b0 | 170 | * @brief PCD Handle Structure definition |
<> | 128:9bcdf88f62b0 | 171 | */ |
<> | 128:9bcdf88f62b0 | 172 | typedef struct |
<> | 128:9bcdf88f62b0 | 173 | { |
<> | 128:9bcdf88f62b0 | 174 | PCD_TypeDef *Instance; /*!< Register base address */ |
<> | 128:9bcdf88f62b0 | 175 | PCD_InitTypeDef Init; /*!< PCD required parameters */ |
<> | 128:9bcdf88f62b0 | 176 | __IO uint8_t USB_Address; /*!< USB Address */ |
<> | 128:9bcdf88f62b0 | 177 | PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */ |
<> | 128:9bcdf88f62b0 | 178 | PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */ |
<> | 128:9bcdf88f62b0 | 179 | HAL_LockTypeDef Lock; /*!< PCD peripheral status */ |
<> | 128:9bcdf88f62b0 | 180 | __IO PCD_StateTypeDef State; /*!< PCD communication state */ |
<> | 128:9bcdf88f62b0 | 181 | uint32_t Setup[12]; /*!< Setup packet buffer */ |
<> | 128:9bcdf88f62b0 | 182 | void *pData; /*!< Pointer to upper stack Handler */ |
<> | 128:9bcdf88f62b0 | 183 | |
<> | 128:9bcdf88f62b0 | 184 | } PCD_HandleTypeDef; |
<> | 128:9bcdf88f62b0 | 185 | |
<> | 128:9bcdf88f62b0 | 186 | /** |
<> | 128:9bcdf88f62b0 | 187 | * @} |
<> | 128:9bcdf88f62b0 | 188 | */ |
<> | 128:9bcdf88f62b0 | 189 | |
<> | 128:9bcdf88f62b0 | 190 | /* Include PCD HAL Extension module */ |
<> | 128:9bcdf88f62b0 | 191 | #include "stm32l1xx_hal_pcd_ex.h" |
<> | 128:9bcdf88f62b0 | 192 | /* Exported constants --------------------------------------------------------*/ |
<> | 128:9bcdf88f62b0 | 193 | /** @defgroup PCD_Exported_Constants PCD Exported Constants |
<> | 128:9bcdf88f62b0 | 194 | * @{ |
<> | 128:9bcdf88f62b0 | 195 | */ |
<> | 128:9bcdf88f62b0 | 196 | |
<> | 128:9bcdf88f62b0 | 197 | /** @defgroup PCD_Exti_Line_Wakeup PCD_Exti_Line_Wakeup |
<> | 128:9bcdf88f62b0 | 198 | * @{ |
<> | 128:9bcdf88f62b0 | 199 | */ |
<> | 128:9bcdf88f62b0 | 200 | |
<> | 128:9bcdf88f62b0 | 201 | #define USB_WAKEUP_EXTI_LINE ((uint32_t)0x00040000) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */ |
<> | 128:9bcdf88f62b0 | 202 | /** |
<> | 128:9bcdf88f62b0 | 203 | * @} |
<> | 128:9bcdf88f62b0 | 204 | */ |
<> | 128:9bcdf88f62b0 | 205 | |
<> | 128:9bcdf88f62b0 | 206 | |
<> | 128:9bcdf88f62b0 | 207 | /** @defgroup PCD_Core_Speed PCD Core Speed |
<> | 128:9bcdf88f62b0 | 208 | * @{ |
<> | 128:9bcdf88f62b0 | 209 | */ |
<> | 128:9bcdf88f62b0 | 210 | #define PCD_SPEED_HIGH 0 /* Not Supported */ |
<> | 128:9bcdf88f62b0 | 211 | #define PCD_SPEED_FULL 2 |
<> | 128:9bcdf88f62b0 | 212 | /** |
<> | 128:9bcdf88f62b0 | 213 | * @} |
<> | 128:9bcdf88f62b0 | 214 | */ |
<> | 128:9bcdf88f62b0 | 215 | |
<> | 128:9bcdf88f62b0 | 216 | /** @defgroup PCD_Core_PHY PCD Core PHY |
<> | 128:9bcdf88f62b0 | 217 | * @{ |
<> | 128:9bcdf88f62b0 | 218 | */ |
<> | 128:9bcdf88f62b0 | 219 | #define PCD_PHY_EMBEDDED 2 |
<> | 128:9bcdf88f62b0 | 220 | /** |
<> | 128:9bcdf88f62b0 | 221 | * @} |
<> | 128:9bcdf88f62b0 | 222 | */ |
<> | 128:9bcdf88f62b0 | 223 | |
<> | 128:9bcdf88f62b0 | 224 | /** @defgroup PCD_EP0_MPS PCD EP0 MPS |
<> | 128:9bcdf88f62b0 | 225 | * @{ |
<> | 128:9bcdf88f62b0 | 226 | */ |
<> | 128:9bcdf88f62b0 | 227 | #define DEP0CTL_MPS_64 0 |
<> | 128:9bcdf88f62b0 | 228 | #define DEP0CTL_MPS_32 1 |
<> | 128:9bcdf88f62b0 | 229 | #define DEP0CTL_MPS_16 2 |
<> | 128:9bcdf88f62b0 | 230 | #define DEP0CTL_MPS_8 3 |
<> | 128:9bcdf88f62b0 | 231 | |
<> | 128:9bcdf88f62b0 | 232 | #define PCD_EP0MPS_64 DEP0CTL_MPS_64 |
<> | 128:9bcdf88f62b0 | 233 | #define PCD_EP0MPS_32 DEP0CTL_MPS_32 |
<> | 128:9bcdf88f62b0 | 234 | #define PCD_EP0MPS_16 DEP0CTL_MPS_16 |
<> | 128:9bcdf88f62b0 | 235 | #define PCD_EP0MPS_08 DEP0CTL_MPS_8 |
<> | 128:9bcdf88f62b0 | 236 | /** |
<> | 128:9bcdf88f62b0 | 237 | * @} |
<> | 128:9bcdf88f62b0 | 238 | */ |
<> | 128:9bcdf88f62b0 | 239 | |
<> | 128:9bcdf88f62b0 | 240 | /** @defgroup PCD_EP_Type PCD EP Type |
<> | 128:9bcdf88f62b0 | 241 | * @{ |
<> | 128:9bcdf88f62b0 | 242 | */ |
<> | 128:9bcdf88f62b0 | 243 | #define PCD_EP_TYPE_CTRL 0 |
<> | 128:9bcdf88f62b0 | 244 | #define PCD_EP_TYPE_ISOC 1 |
<> | 128:9bcdf88f62b0 | 245 | #define PCD_EP_TYPE_BULK 2 |
<> | 128:9bcdf88f62b0 | 246 | #define PCD_EP_TYPE_INTR 3 |
<> | 128:9bcdf88f62b0 | 247 | /** |
<> | 128:9bcdf88f62b0 | 248 | * @} |
<> | 128:9bcdf88f62b0 | 249 | */ |
<> | 128:9bcdf88f62b0 | 250 | |
<> | 128:9bcdf88f62b0 | 251 | /** @defgroup PCD_ENDP PCD ENDP |
<> | 128:9bcdf88f62b0 | 252 | * @{ |
<> | 128:9bcdf88f62b0 | 253 | */ |
<> | 128:9bcdf88f62b0 | 254 | |
<> | 128:9bcdf88f62b0 | 255 | #define PCD_ENDP0 ((uint8_t)0) |
<> | 128:9bcdf88f62b0 | 256 | #define PCD_ENDP1 ((uint8_t)1) |
<> | 128:9bcdf88f62b0 | 257 | #define PCD_ENDP2 ((uint8_t)2) |
<> | 128:9bcdf88f62b0 | 258 | #define PCD_ENDP3 ((uint8_t)3) |
<> | 128:9bcdf88f62b0 | 259 | #define PCD_ENDP4 ((uint8_t)4) |
<> | 128:9bcdf88f62b0 | 260 | #define PCD_ENDP5 ((uint8_t)5) |
<> | 128:9bcdf88f62b0 | 261 | #define PCD_ENDP6 ((uint8_t)6) |
<> | 128:9bcdf88f62b0 | 262 | #define PCD_ENDP7 ((uint8_t)7) |
<> | 128:9bcdf88f62b0 | 263 | |
<> | 128:9bcdf88f62b0 | 264 | #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE |
<> | 128:9bcdf88f62b0 | 265 | |
<> | 128:9bcdf88f62b0 | 266 | /** |
<> | 128:9bcdf88f62b0 | 267 | * @} |
<> | 128:9bcdf88f62b0 | 268 | */ |
<> | 128:9bcdf88f62b0 | 269 | |
<> | 128:9bcdf88f62b0 | 270 | /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind |
<> | 128:9bcdf88f62b0 | 271 | * @{ |
<> | 128:9bcdf88f62b0 | 272 | */ |
<> | 128:9bcdf88f62b0 | 273 | #define PCD_SNG_BUF 0 |
<> | 128:9bcdf88f62b0 | 274 | #define PCD_DBL_BUF 1 |
<> | 128:9bcdf88f62b0 | 275 | /** |
<> | 128:9bcdf88f62b0 | 276 | * @} |
<> | 128:9bcdf88f62b0 | 277 | */ |
<> | 128:9bcdf88f62b0 | 278 | |
<> | 128:9bcdf88f62b0 | 279 | /** |
<> | 128:9bcdf88f62b0 | 280 | * @} |
<> | 128:9bcdf88f62b0 | 281 | */ |
<> | 128:9bcdf88f62b0 | 282 | |
<> | 128:9bcdf88f62b0 | 283 | /* Exported macros -----------------------------------------------------------*/ |
<> | 128:9bcdf88f62b0 | 284 | |
<> | 128:9bcdf88f62b0 | 285 | /** @defgroup PCD_Exported_Macros PCD Exported Macros |
<> | 128:9bcdf88f62b0 | 286 | * @brief macros to handle interrupts and specific clock configurations |
<> | 128:9bcdf88f62b0 | 287 | * @{ |
<> | 128:9bcdf88f62b0 | 288 | */ |
<> | 128:9bcdf88f62b0 | 289 | #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__)) |
<> | 128:9bcdf88f62b0 | 290 | #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__)) |
<> | 128:9bcdf88f62b0 | 291 | |
<> | 128:9bcdf88f62b0 | 292 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE |
<> | 128:9bcdf88f62b0 | 293 | #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE) |
<> | 128:9bcdf88f62b0 | 294 | #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE) |
<> | 128:9bcdf88f62b0 | 295 | #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE |
<> | 128:9bcdf88f62b0 | 296 | |
<> | 128:9bcdf88f62b0 | 297 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ |
<> | 128:9bcdf88f62b0 | 298 | do{ \ |
<> | 128:9bcdf88f62b0 | 299 | EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \ |
<> | 128:9bcdf88f62b0 | 300 | EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \ |
<> | 128:9bcdf88f62b0 | 301 | } while(0) |
<> | 128:9bcdf88f62b0 | 302 | |
<> | 128:9bcdf88f62b0 | 303 | |
<> | 128:9bcdf88f62b0 | 304 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() \ |
<> | 128:9bcdf88f62b0 | 305 | do{ \ |
<> | 128:9bcdf88f62b0 | 306 | EXTI->FTSR |= (USB_WAKEUP_EXTI_LINE); \ |
<> | 128:9bcdf88f62b0 | 307 | EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \ |
<> | 128:9bcdf88f62b0 | 308 | } while(0) |
<> | 128:9bcdf88f62b0 | 309 | |
<> | 128:9bcdf88f62b0 | 310 | |
<> | 128:9bcdf88f62b0 | 311 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() \ |
<> | 128:9bcdf88f62b0 | 312 | do{ \ |
<> | 128:9bcdf88f62b0 | 313 | EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \ |
<> | 128:9bcdf88f62b0 | 314 | EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \ |
<> | 128:9bcdf88f62b0 | 315 | EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \ |
<> | 128:9bcdf88f62b0 | 316 | EXTI->FTSR |= USB_WAKEUP_EXTI_LINE; \ |
<> | 128:9bcdf88f62b0 | 317 | } while(0) |
<> | 128:9bcdf88f62b0 | 318 | |
<> | 128:9bcdf88f62b0 | 319 | /** |
<> | 128:9bcdf88f62b0 | 320 | * @} |
<> | 128:9bcdf88f62b0 | 321 | */ |
<> | 128:9bcdf88f62b0 | 322 | |
<> | 128:9bcdf88f62b0 | 323 | /* Internal macros -----------------------------------------------------------*/ |
<> | 128:9bcdf88f62b0 | 324 | |
<> | 128:9bcdf88f62b0 | 325 | /** @defgroup PCD_Private_Macros PCD Private Macros |
<> | 128:9bcdf88f62b0 | 326 | * @brief macros to handle interrupts and specific clock configurations |
<> | 128:9bcdf88f62b0 | 327 | * @{ |
<> | 128:9bcdf88f62b0 | 328 | */ |
<> | 128:9bcdf88f62b0 | 329 | |
<> | 128:9bcdf88f62b0 | 330 | /* SetENDPOINT */ |
<> | 128:9bcdf88f62b0 | 331 | #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&(USBx)->EP0R + (bEpNum) * 2)= (uint16_t)(wRegValue)) |
<> | 128:9bcdf88f62b0 | 332 | |
<> | 128:9bcdf88f62b0 | 333 | /* GetENDPOINT */ |
<> | 128:9bcdf88f62b0 | 334 | #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + (bEpNum) * 2)) |
<> | 128:9bcdf88f62b0 | 335 | |
<> | 128:9bcdf88f62b0 | 336 | |
<> | 128:9bcdf88f62b0 | 337 | |
<> | 128:9bcdf88f62b0 | 338 | /** |
<> | 128:9bcdf88f62b0 | 339 | * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) |
<> | 128:9bcdf88f62b0 | 340 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 341 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 342 | * @param wType: Endpoint Type. |
<> | 128:9bcdf88f62b0 | 343 | * @retval None |
<> | 128:9bcdf88f62b0 | 344 | */ |
<> | 128:9bcdf88f62b0 | 345 | #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
<> | 128:9bcdf88f62b0 | 346 | ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) ))) |
<> | 128:9bcdf88f62b0 | 347 | |
<> | 128:9bcdf88f62b0 | 348 | /** |
<> | 128:9bcdf88f62b0 | 349 | * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) |
<> | 128:9bcdf88f62b0 | 350 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 351 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 352 | * @retval Endpoint Type |
<> | 128:9bcdf88f62b0 | 353 | */ |
<> | 128:9bcdf88f62b0 | 354 | #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) |
<> | 128:9bcdf88f62b0 | 355 | |
<> | 128:9bcdf88f62b0 | 356 | |
<> | 128:9bcdf88f62b0 | 357 | /** |
<> | 128:9bcdf88f62b0 | 358 | * @brief free buffer used from the application realizing it to the line |
<> | 128:9bcdf88f62b0 | 359 | toggles bit SW_BUF in the double buffered endpoint register |
<> | 128:9bcdf88f62b0 | 360 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 361 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 362 | * @param bDir: Direction |
<> | 128:9bcdf88f62b0 | 363 | * @retval None |
<> | 128:9bcdf88f62b0 | 364 | */ |
<> | 128:9bcdf88f62b0 | 365 | #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\ |
<> | 128:9bcdf88f62b0 | 366 | {\ |
<> | 128:9bcdf88f62b0 | 367 | if ((bDir) == PCD_EP_DBUF_OUT)\ |
<> | 128:9bcdf88f62b0 | 368 | { /* OUT double buffered endpoint */\ |
<> | 128:9bcdf88f62b0 | 369 | PCD_TX_DTOG((USBx), (bEpNum));\ |
<> | 128:9bcdf88f62b0 | 370 | }\ |
<> | 128:9bcdf88f62b0 | 371 | else if ((bDir) == PCD_EP_DBUF_IN)\ |
<> | 128:9bcdf88f62b0 | 372 | { /* IN double buffered endpoint */\ |
<> | 128:9bcdf88f62b0 | 373 | PCD_RX_DTOG((USBx), (bEpNum));\ |
<> | 128:9bcdf88f62b0 | 374 | }\ |
<> | 128:9bcdf88f62b0 | 375 | } |
<> | 128:9bcdf88f62b0 | 376 | |
<> | 128:9bcdf88f62b0 | 377 | /** |
<> | 128:9bcdf88f62b0 | 378 | * @brief gets direction of the double buffered endpoint |
<> | 128:9bcdf88f62b0 | 379 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 380 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 381 | * @retval EP_DBUF_OUT, EP_DBUF_IN, |
<> | 128:9bcdf88f62b0 | 382 | * EP_DBUF_ERR if the endpoint counter not yet programmed. |
<> | 128:9bcdf88f62b0 | 383 | */ |
<> | 128:9bcdf88f62b0 | 384 | #define PCD_GET_DB_DIR(USBx, bEpNum)\ |
<> | 128:9bcdf88f62b0 | 385 | {\ |
<> | 128:9bcdf88f62b0 | 386 | if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\ |
<> | 128:9bcdf88f62b0 | 387 | return(PCD_EP_DBUF_OUT);\ |
<> | 128:9bcdf88f62b0 | 388 | else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\ |
<> | 128:9bcdf88f62b0 | 389 | return(PCD_EP_DBUF_IN);\ |
<> | 128:9bcdf88f62b0 | 390 | else\ |
<> | 128:9bcdf88f62b0 | 391 | return(PCD_EP_DBUF_ERR);\ |
<> | 128:9bcdf88f62b0 | 392 | } |
<> | 128:9bcdf88f62b0 | 393 | |
<> | 128:9bcdf88f62b0 | 394 | /** |
<> | 128:9bcdf88f62b0 | 395 | * @brief sets the status for tx transfer (bits STAT_TX[1:0]). |
<> | 128:9bcdf88f62b0 | 396 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 397 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 398 | * @param wState: new state |
<> | 128:9bcdf88f62b0 | 399 | * @retval None |
<> | 128:9bcdf88f62b0 | 400 | */ |
<> | 128:9bcdf88f62b0 | 401 | #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\ |
<> | 128:9bcdf88f62b0 | 402 | \ |
<> | 128:9bcdf88f62b0 | 403 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\ |
<> | 128:9bcdf88f62b0 | 404 | /* toggle first bit ? */ \ |
<> | 128:9bcdf88f62b0 | 405 | if((USB_EPTX_DTOG1 & (wState))!= 0) \ |
<> | 128:9bcdf88f62b0 | 406 | { \ |
<> | 128:9bcdf88f62b0 | 407 | _wRegVal ^= USB_EPTX_DTOG1; \ |
<> | 128:9bcdf88f62b0 | 408 | } \ |
<> | 128:9bcdf88f62b0 | 409 | /* toggle second bit ? */ \ |
<> | 128:9bcdf88f62b0 | 410 | if((USB_EPTX_DTOG2 & (wState))!= 0) \ |
<> | 128:9bcdf88f62b0 | 411 | { \ |
<> | 128:9bcdf88f62b0 | 412 | _wRegVal ^= USB_EPTX_DTOG2; \ |
<> | 128:9bcdf88f62b0 | 413 | } \ |
<> | 128:9bcdf88f62b0 | 414 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \ |
<> | 128:9bcdf88f62b0 | 415 | } /* PCD_SET_EP_TX_STATUS */ |
<> | 128:9bcdf88f62b0 | 416 | |
<> | 128:9bcdf88f62b0 | 417 | /** |
<> | 128:9bcdf88f62b0 | 418 | * @brief sets the status for rx transfer (bits STAT_TX[1:0]) |
<> | 128:9bcdf88f62b0 | 419 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 420 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 421 | * @param wState: new state |
<> | 128:9bcdf88f62b0 | 422 | * @retval None |
<> | 128:9bcdf88f62b0 | 423 | */ |
<> | 128:9bcdf88f62b0 | 424 | #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\ |
<> | 128:9bcdf88f62b0 | 425 | register uint16_t _wRegVal; \ |
<> | 128:9bcdf88f62b0 | 426 | \ |
<> | 128:9bcdf88f62b0 | 427 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\ |
<> | 128:9bcdf88f62b0 | 428 | /* toggle first bit ? */ \ |
<> | 128:9bcdf88f62b0 | 429 | if((USB_EPRX_DTOG1 & (wState))!= 0) \ |
<> | 128:9bcdf88f62b0 | 430 | { \ |
<> | 128:9bcdf88f62b0 | 431 | _wRegVal ^= USB_EPRX_DTOG1; \ |
<> | 128:9bcdf88f62b0 | 432 | } \ |
<> | 128:9bcdf88f62b0 | 433 | /* toggle second bit ? */ \ |
<> | 128:9bcdf88f62b0 | 434 | if((USB_EPRX_DTOG2 & (wState))!= 0) \ |
<> | 128:9bcdf88f62b0 | 435 | { \ |
<> | 128:9bcdf88f62b0 | 436 | _wRegVal ^= USB_EPRX_DTOG2; \ |
<> | 128:9bcdf88f62b0 | 437 | } \ |
<> | 128:9bcdf88f62b0 | 438 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \ |
<> | 128:9bcdf88f62b0 | 439 | } /* PCD_SET_EP_RX_STATUS */ |
<> | 128:9bcdf88f62b0 | 440 | |
<> | 128:9bcdf88f62b0 | 441 | /** |
<> | 128:9bcdf88f62b0 | 442 | * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) |
<> | 128:9bcdf88f62b0 | 443 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 444 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 445 | * @param wStaterx: new state. |
<> | 128:9bcdf88f62b0 | 446 | * @param wStatetx: new state. |
<> | 128:9bcdf88f62b0 | 447 | * @retval None |
<> | 128:9bcdf88f62b0 | 448 | */ |
<> | 128:9bcdf88f62b0 | 449 | #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\ |
<> | 128:9bcdf88f62b0 | 450 | register uint32_t _wRegVal; \ |
<> | 128:9bcdf88f62b0 | 451 | \ |
<> | 128:9bcdf88f62b0 | 452 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\ |
<> | 128:9bcdf88f62b0 | 453 | /* toggle first bit ? */ \ |
<> | 128:9bcdf88f62b0 | 454 | if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \ |
<> | 128:9bcdf88f62b0 | 455 | { \ |
<> | 128:9bcdf88f62b0 | 456 | _wRegVal ^= USB_EPRX_DTOG1; \ |
<> | 128:9bcdf88f62b0 | 457 | } \ |
<> | 128:9bcdf88f62b0 | 458 | /* toggle second bit ? */ \ |
<> | 128:9bcdf88f62b0 | 459 | if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \ |
<> | 128:9bcdf88f62b0 | 460 | { \ |
<> | 128:9bcdf88f62b0 | 461 | _wRegVal ^= USB_EPRX_DTOG2; \ |
<> | 128:9bcdf88f62b0 | 462 | } \ |
<> | 128:9bcdf88f62b0 | 463 | /* toggle first bit ? */ \ |
<> | 128:9bcdf88f62b0 | 464 | if((USB_EPTX_DTOG1 & (wStatetx))!= 0) \ |
<> | 128:9bcdf88f62b0 | 465 | { \ |
<> | 128:9bcdf88f62b0 | 466 | _wRegVal ^= USB_EPTX_DTOG1; \ |
<> | 128:9bcdf88f62b0 | 467 | } \ |
<> | 128:9bcdf88f62b0 | 468 | /* toggle second bit ? */ \ |
<> | 128:9bcdf88f62b0 | 469 | if((USB_EPTX_DTOG2 & (wStatetx))!= 0) \ |
<> | 128:9bcdf88f62b0 | 470 | { \ |
<> | 128:9bcdf88f62b0 | 471 | _wRegVal ^= USB_EPTX_DTOG2; \ |
<> | 128:9bcdf88f62b0 | 472 | } \ |
<> | 128:9bcdf88f62b0 | 473 | PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \ |
<> | 128:9bcdf88f62b0 | 474 | } /* PCD_SET_EP_TXRX_STATUS */ |
<> | 128:9bcdf88f62b0 | 475 | |
<> | 128:9bcdf88f62b0 | 476 | /** |
<> | 128:9bcdf88f62b0 | 477 | * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] |
<> | 128:9bcdf88f62b0 | 478 | * /STAT_RX[1:0]) |
<> | 128:9bcdf88f62b0 | 479 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 480 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 481 | * @retval status |
<> | 128:9bcdf88f62b0 | 482 | */ |
<> | 128:9bcdf88f62b0 | 483 | #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) |
<> | 128:9bcdf88f62b0 | 484 | |
<> | 128:9bcdf88f62b0 | 485 | #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) |
<> | 128:9bcdf88f62b0 | 486 | |
<> | 128:9bcdf88f62b0 | 487 | /** |
<> | 128:9bcdf88f62b0 | 488 | * @brief sets directly the VALID tx/rx-status into the endpoint register |
<> | 128:9bcdf88f62b0 | 489 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 490 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 491 | * @retval None |
<> | 128:9bcdf88f62b0 | 492 | */ |
<> | 128:9bcdf88f62b0 | 493 | #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) |
<> | 128:9bcdf88f62b0 | 494 | |
<> | 128:9bcdf88f62b0 | 495 | #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) |
<> | 128:9bcdf88f62b0 | 496 | |
<> | 128:9bcdf88f62b0 | 497 | /** |
<> | 128:9bcdf88f62b0 | 498 | * @brief checks stall condition in an endpoint. |
<> | 128:9bcdf88f62b0 | 499 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 500 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 501 | * @retval TRUE = endpoint in stall condition. |
<> | 128:9bcdf88f62b0 | 502 | */ |
<> | 128:9bcdf88f62b0 | 503 | #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \ |
<> | 128:9bcdf88f62b0 | 504 | == USB_EP_TX_STALL) |
<> | 128:9bcdf88f62b0 | 505 | #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \ |
<> | 128:9bcdf88f62b0 | 506 | == USB_EP_RX_STALL) |
<> | 128:9bcdf88f62b0 | 507 | |
<> | 128:9bcdf88f62b0 | 508 | /** |
<> | 128:9bcdf88f62b0 | 509 | * @brief set & clear EP_KIND bit. |
<> | 128:9bcdf88f62b0 | 510 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 511 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 512 | * @retval None |
<> | 128:9bcdf88f62b0 | 513 | */ |
<> | 128:9bcdf88f62b0 | 514 | #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
<> | 128:9bcdf88f62b0 | 515 | (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK)))) |
<> | 128:9bcdf88f62b0 | 516 | #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
<> | 128:9bcdf88f62b0 | 517 | (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK)))) |
<> | 128:9bcdf88f62b0 | 518 | |
<> | 128:9bcdf88f62b0 | 519 | /** |
<> | 128:9bcdf88f62b0 | 520 | * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. |
<> | 128:9bcdf88f62b0 | 521 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 522 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 523 | * @retval None |
<> | 128:9bcdf88f62b0 | 524 | */ |
<> | 128:9bcdf88f62b0 | 525 | #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
<> | 128:9bcdf88f62b0 | 526 | #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
<> | 128:9bcdf88f62b0 | 527 | |
<> | 128:9bcdf88f62b0 | 528 | /** |
<> | 128:9bcdf88f62b0 | 529 | * @brief Sets/clears directly EP_KIND bit in the endpoint register. |
<> | 128:9bcdf88f62b0 | 530 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 531 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 532 | * @retval None |
<> | 128:9bcdf88f62b0 | 533 | */ |
<> | 128:9bcdf88f62b0 | 534 | #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
<> | 128:9bcdf88f62b0 | 535 | #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
<> | 128:9bcdf88f62b0 | 536 | |
<> | 128:9bcdf88f62b0 | 537 | /** |
<> | 128:9bcdf88f62b0 | 538 | * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. |
<> | 128:9bcdf88f62b0 | 539 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 540 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 541 | * @retval None |
<> | 128:9bcdf88f62b0 | 542 | */ |
<> | 128:9bcdf88f62b0 | 543 | #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
<> | 128:9bcdf88f62b0 | 544 | PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFF & USB_EPREG_MASK)) |
<> | 128:9bcdf88f62b0 | 545 | #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
<> | 128:9bcdf88f62b0 | 546 | PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7F & USB_EPREG_MASK)) |
<> | 128:9bcdf88f62b0 | 547 | |
<> | 128:9bcdf88f62b0 | 548 | /** |
<> | 128:9bcdf88f62b0 | 549 | * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. |
<> | 128:9bcdf88f62b0 | 550 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 551 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 552 | * @retval None |
<> | 128:9bcdf88f62b0 | 553 | */ |
<> | 128:9bcdf88f62b0 | 554 | #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
<> | 128:9bcdf88f62b0 | 555 | USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK))) |
<> | 128:9bcdf88f62b0 | 556 | #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
<> | 128:9bcdf88f62b0 | 557 | USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK))) |
<> | 128:9bcdf88f62b0 | 558 | |
<> | 128:9bcdf88f62b0 | 559 | /** |
<> | 128:9bcdf88f62b0 | 560 | * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. |
<> | 128:9bcdf88f62b0 | 561 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 562 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 563 | * @retval None |
<> | 128:9bcdf88f62b0 | 564 | */ |
<> | 128:9bcdf88f62b0 | 565 | #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0)\ |
<> | 128:9bcdf88f62b0 | 566 | { \ |
<> | 128:9bcdf88f62b0 | 567 | PCD_RX_DTOG((USBx), (bEpNum)); \ |
<> | 128:9bcdf88f62b0 | 568 | } |
<> | 128:9bcdf88f62b0 | 569 | #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0)\ |
<> | 128:9bcdf88f62b0 | 570 | { \ |
<> | 128:9bcdf88f62b0 | 571 | PCD_TX_DTOG((USBx), (bEpNum)); \ |
<> | 128:9bcdf88f62b0 | 572 | } |
<> | 128:9bcdf88f62b0 | 573 | |
<> | 128:9bcdf88f62b0 | 574 | /** |
<> | 128:9bcdf88f62b0 | 575 | * @brief Sets address in an endpoint register. |
<> | 128:9bcdf88f62b0 | 576 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 577 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 578 | * @param bAddr: Address. |
<> | 128:9bcdf88f62b0 | 579 | * @retval None |
<> | 128:9bcdf88f62b0 | 580 | */ |
<> | 128:9bcdf88f62b0 | 581 | #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
<> | 128:9bcdf88f62b0 | 582 | USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr)) |
<> | 128:9bcdf88f62b0 | 583 | |
<> | 128:9bcdf88f62b0 | 584 | #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) |
<> | 128:9bcdf88f62b0 | 585 | |
<> | 128:9bcdf88f62b0 | 586 | #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8)*2+ ((uint32_t)(USBx) + 0x400))) |
<> | 128:9bcdf88f62b0 | 587 | #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+2)*2+ ((uint32_t)(USBx) + 0x400))) |
<> | 128:9bcdf88f62b0 | 588 | #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+4)*2+ ((uint32_t)(USBx) + 0x400))) |
<> | 128:9bcdf88f62b0 | 589 | #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+6)*2+ ((uint32_t)(USBx) + 0x400))) |
<> | 128:9bcdf88f62b0 | 590 | |
<> | 128:9bcdf88f62b0 | 591 | #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\ |
<> | 128:9bcdf88f62b0 | 592 | uint32_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \ |
<> | 128:9bcdf88f62b0 | 593 | PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\ |
<> | 128:9bcdf88f62b0 | 594 | } |
<> | 128:9bcdf88f62b0 | 595 | |
<> | 128:9bcdf88f62b0 | 596 | /** |
<> | 128:9bcdf88f62b0 | 597 | * @brief sets address of the tx/rx buffer. |
<> | 128:9bcdf88f62b0 | 598 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 599 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 600 | * @param wAddr: address to be set (must be word aligned). |
<> | 128:9bcdf88f62b0 | 601 | * @retval None |
<> | 128:9bcdf88f62b0 | 602 | */ |
<> | 128:9bcdf88f62b0 | 603 | #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1)) |
<> | 128:9bcdf88f62b0 | 604 | #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1)) |
<> | 128:9bcdf88f62b0 | 605 | |
<> | 128:9bcdf88f62b0 | 606 | /** |
<> | 128:9bcdf88f62b0 | 607 | * @brief Gets address of the tx/rx buffer. |
<> | 128:9bcdf88f62b0 | 608 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 609 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 610 | * @retval address of the buffer. |
<> | 128:9bcdf88f62b0 | 611 | */ |
<> | 128:9bcdf88f62b0 | 612 | #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) |
<> | 128:9bcdf88f62b0 | 613 | #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) |
<> | 128:9bcdf88f62b0 | 614 | |
<> | 128:9bcdf88f62b0 | 615 | /** |
<> | 128:9bcdf88f62b0 | 616 | * @brief Sets counter of rx buffer with no. of blocks. |
<> | 128:9bcdf88f62b0 | 617 | * @param dwReg: Register |
<> | 128:9bcdf88f62b0 | 618 | * @param wCount: Counter. |
<> | 128:9bcdf88f62b0 | 619 | * @param wNBlocks: no. of Blocks. |
<> | 128:9bcdf88f62b0 | 620 | * @retval None |
<> | 128:9bcdf88f62b0 | 621 | */ |
<> | 128:9bcdf88f62b0 | 622 | #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\ |
<> | 128:9bcdf88f62b0 | 623 | (wNBlocks) = (wCount) >> 5;\ |
<> | 128:9bcdf88f62b0 | 624 | if(((wCount) & 0x1f) == 0)\ |
<> | 128:9bcdf88f62b0 | 625 | { \ |
<> | 128:9bcdf88f62b0 | 626 | (wNBlocks)--;\ |
<> | 128:9bcdf88f62b0 | 627 | } \ |
<> | 128:9bcdf88f62b0 | 628 | *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10) | 0x8000); \ |
<> | 128:9bcdf88f62b0 | 629 | }/* PCD_CALC_BLK32 */ |
<> | 128:9bcdf88f62b0 | 630 | |
<> | 128:9bcdf88f62b0 | 631 | #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\ |
<> | 128:9bcdf88f62b0 | 632 | (wNBlocks) = (wCount) >> 1;\ |
<> | 128:9bcdf88f62b0 | 633 | if(((wCount) & 0x1) != 0)\ |
<> | 128:9bcdf88f62b0 | 634 | { \ |
<> | 128:9bcdf88f62b0 | 635 | (wNBlocks)++;\ |
<> | 128:9bcdf88f62b0 | 636 | } \ |
<> | 128:9bcdf88f62b0 | 637 | *pdwReg = (uint16_t)((wNBlocks) << 10);\ |
<> | 128:9bcdf88f62b0 | 638 | }/* PCD_CALC_BLK2 */ |
<> | 128:9bcdf88f62b0 | 639 | |
<> | 128:9bcdf88f62b0 | 640 | #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\ |
<> | 128:9bcdf88f62b0 | 641 | uint16_t wNBlocks;\ |
<> | 128:9bcdf88f62b0 | 642 | if((wCount) > 62) \ |
<> | 128:9bcdf88f62b0 | 643 | { \ |
<> | 128:9bcdf88f62b0 | 644 | PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \ |
<> | 128:9bcdf88f62b0 | 645 | } \ |
<> | 128:9bcdf88f62b0 | 646 | else \ |
<> | 128:9bcdf88f62b0 | 647 | { \ |
<> | 128:9bcdf88f62b0 | 648 | PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \ |
<> | 128:9bcdf88f62b0 | 649 | } \ |
<> | 128:9bcdf88f62b0 | 650 | }/* PCD_SET_EP_CNT_RX_REG */ |
<> | 128:9bcdf88f62b0 | 651 | |
<> | 128:9bcdf88f62b0 | 652 | #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\ |
<> | 128:9bcdf88f62b0 | 653 | uint32_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \ |
<> | 128:9bcdf88f62b0 | 654 | PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\ |
<> | 128:9bcdf88f62b0 | 655 | } |
<> | 128:9bcdf88f62b0 | 656 | /** |
<> | 128:9bcdf88f62b0 | 657 | * @brief sets counter for the tx/rx buffer. |
<> | 128:9bcdf88f62b0 | 658 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 659 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 660 | * @param wCount: Counter value. |
<> | 128:9bcdf88f62b0 | 661 | * @retval None |
<> | 128:9bcdf88f62b0 | 662 | */ |
<> | 128:9bcdf88f62b0 | 663 | #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount)) |
<> | 128:9bcdf88f62b0 | 664 | |
<> | 128:9bcdf88f62b0 | 665 | |
<> | 128:9bcdf88f62b0 | 666 | /** |
<> | 128:9bcdf88f62b0 | 667 | * @brief gets counter of the tx buffer. |
<> | 128:9bcdf88f62b0 | 668 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 669 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 670 | * @retval Counter value |
<> | 128:9bcdf88f62b0 | 671 | */ |
<> | 128:9bcdf88f62b0 | 672 | #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff) |
<> | 128:9bcdf88f62b0 | 673 | #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff) |
<> | 128:9bcdf88f62b0 | 674 | |
<> | 128:9bcdf88f62b0 | 675 | /** |
<> | 128:9bcdf88f62b0 | 676 | * @brief Sets buffer 0/1 address in a double buffer endpoint. |
<> | 128:9bcdf88f62b0 | 677 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 678 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 679 | * @param wBuf0Addr: buffer 0 address. |
<> | 128:9bcdf88f62b0 | 680 | * @retval Counter value |
<> | 128:9bcdf88f62b0 | 681 | */ |
<> | 128:9bcdf88f62b0 | 682 | #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));} |
<> | 128:9bcdf88f62b0 | 683 | #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));} |
<> | 128:9bcdf88f62b0 | 684 | |
<> | 128:9bcdf88f62b0 | 685 | /** |
<> | 128:9bcdf88f62b0 | 686 | * @brief Sets addresses in a double buffer endpoint. |
<> | 128:9bcdf88f62b0 | 687 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 688 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 689 | * @param wBuf0Addr: buffer 0 address. |
<> | 128:9bcdf88f62b0 | 690 | * @param wBuf1Addr = buffer 1 address. |
<> | 128:9bcdf88f62b0 | 691 | * @retval None |
<> | 128:9bcdf88f62b0 | 692 | */ |
<> | 128:9bcdf88f62b0 | 693 | #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \ |
<> | 128:9bcdf88f62b0 | 694 | PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\ |
<> | 128:9bcdf88f62b0 | 695 | PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\ |
<> | 128:9bcdf88f62b0 | 696 | } /* PCD_SET_EP_DBUF_ADDR */ |
<> | 128:9bcdf88f62b0 | 697 | |
<> | 128:9bcdf88f62b0 | 698 | /** |
<> | 128:9bcdf88f62b0 | 699 | * @brief Gets buffer 0/1 address of a double buffer endpoint. |
<> | 128:9bcdf88f62b0 | 700 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 701 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 702 | * @retval None |
<> | 128:9bcdf88f62b0 | 703 | */ |
<> | 128:9bcdf88f62b0 | 704 | #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) |
<> | 128:9bcdf88f62b0 | 705 | #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) |
<> | 128:9bcdf88f62b0 | 706 | |
<> | 128:9bcdf88f62b0 | 707 | /** |
<> | 128:9bcdf88f62b0 | 708 | * @brief Gets buffer 0/1 address of a double buffer endpoint. |
<> | 128:9bcdf88f62b0 | 709 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 710 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 711 | * @param bDir: endpoint dir EP_DBUF_OUT = OUT |
<> | 128:9bcdf88f62b0 | 712 | * EP_DBUF_IN = IN |
<> | 128:9bcdf88f62b0 | 713 | * @param wCount: Counter value |
<> | 128:9bcdf88f62b0 | 714 | * @retval None |
<> | 128:9bcdf88f62b0 | 715 | */ |
<> | 128:9bcdf88f62b0 | 716 | #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \ |
<> | 128:9bcdf88f62b0 | 717 | if((bDir) == PCD_EP_DBUF_OUT)\ |
<> | 128:9bcdf88f62b0 | 718 | /* OUT endpoint */ \ |
<> | 128:9bcdf88f62b0 | 719 | {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \ |
<> | 128:9bcdf88f62b0 | 720 | else if((bDir) == PCD_EP_DBUF_IN)\ |
<> | 128:9bcdf88f62b0 | 721 | /* IN endpoint */ \ |
<> | 128:9bcdf88f62b0 | 722 | *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ |
<> | 128:9bcdf88f62b0 | 723 | } /* SetEPDblBuf0Count*/ |
<> | 128:9bcdf88f62b0 | 724 | |
<> | 128:9bcdf88f62b0 | 725 | #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \ |
<> | 128:9bcdf88f62b0 | 726 | if((bDir) == PCD_EP_DBUF_OUT)\ |
<> | 128:9bcdf88f62b0 | 727 | {/* OUT endpoint */ \ |
<> | 128:9bcdf88f62b0 | 728 | PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \ |
<> | 128:9bcdf88f62b0 | 729 | } \ |
<> | 128:9bcdf88f62b0 | 730 | else if((bDir) == PCD_EP_DBUF_IN)\ |
<> | 128:9bcdf88f62b0 | 731 | {/* IN endpoint */ \ |
<> | 128:9bcdf88f62b0 | 732 | *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ |
<> | 128:9bcdf88f62b0 | 733 | } \ |
<> | 128:9bcdf88f62b0 | 734 | } /* SetEPDblBuf1Count */ |
<> | 128:9bcdf88f62b0 | 735 | |
<> | 128:9bcdf88f62b0 | 736 | #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\ |
<> | 128:9bcdf88f62b0 | 737 | PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
<> | 128:9bcdf88f62b0 | 738 | PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
<> | 128:9bcdf88f62b0 | 739 | } /* PCD_SET_EP_DBUF_CNT */ |
<> | 128:9bcdf88f62b0 | 740 | |
<> | 128:9bcdf88f62b0 | 741 | /** |
<> | 128:9bcdf88f62b0 | 742 | * @brief Gets buffer 0/1 rx/tx counter for double buffering. |
<> | 128:9bcdf88f62b0 | 743 | * @param USBx: USB peripheral instance register address. |
<> | 128:9bcdf88f62b0 | 744 | * @param bEpNum: Endpoint Number. |
<> | 128:9bcdf88f62b0 | 745 | * @retval None |
<> | 128:9bcdf88f62b0 | 746 | */ |
<> | 128:9bcdf88f62b0 | 747 | #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) |
<> | 128:9bcdf88f62b0 | 748 | #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) |
<> | 128:9bcdf88f62b0 | 749 | |
<> | 128:9bcdf88f62b0 | 750 | |
<> | 128:9bcdf88f62b0 | 751 | /** |
<> | 128:9bcdf88f62b0 | 752 | * @} |
<> | 128:9bcdf88f62b0 | 753 | */ |
<> | 128:9bcdf88f62b0 | 754 | |
<> | 128:9bcdf88f62b0 | 755 | /* Exported functions --------------------------------------------------------*/ |
<> | 128:9bcdf88f62b0 | 756 | |
<> | 128:9bcdf88f62b0 | 757 | /** @addtogroup PCD_Exported_Functions |
<> | 128:9bcdf88f62b0 | 758 | * @{ |
<> | 128:9bcdf88f62b0 | 759 | */ |
<> | 128:9bcdf88f62b0 | 760 | |
<> | 128:9bcdf88f62b0 | 761 | /* Initialization/de-initialization functions **********************************/ |
<> | 128:9bcdf88f62b0 | 762 | |
<> | 128:9bcdf88f62b0 | 763 | |
<> | 128:9bcdf88f62b0 | 764 | /** @addtogroup PCD_Exported_Functions_Group1 |
<> | 128:9bcdf88f62b0 | 765 | * @{ |
<> | 128:9bcdf88f62b0 | 766 | */ |
<> | 128:9bcdf88f62b0 | 767 | |
<> | 128:9bcdf88f62b0 | 768 | HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 769 | HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 770 | void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 771 | void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 772 | |
<> | 128:9bcdf88f62b0 | 773 | /** |
<> | 128:9bcdf88f62b0 | 774 | * @} |
<> | 128:9bcdf88f62b0 | 775 | */ |
<> | 128:9bcdf88f62b0 | 776 | |
<> | 128:9bcdf88f62b0 | 777 | /* I/O operation functions *****************************************************/ |
<> | 128:9bcdf88f62b0 | 778 | /* Non-Blocking mode: Interrupt */ |
<> | 128:9bcdf88f62b0 | 779 | /** @addtogroup PCD_Exported_Functions_Group2 |
<> | 128:9bcdf88f62b0 | 780 | * @{ |
<> | 128:9bcdf88f62b0 | 781 | */ |
<> | 128:9bcdf88f62b0 | 782 | |
<> | 128:9bcdf88f62b0 | 783 | HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 784 | HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 785 | void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 786 | |
<> | 128:9bcdf88f62b0 | 787 | void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
<> | 128:9bcdf88f62b0 | 788 | void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
<> | 128:9bcdf88f62b0 | 789 | void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 790 | void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 791 | void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 792 | void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 793 | void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 794 | void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
<> | 128:9bcdf88f62b0 | 795 | void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
<> | 128:9bcdf88f62b0 | 796 | void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 797 | void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 798 | |
<> | 128:9bcdf88f62b0 | 799 | /** |
<> | 128:9bcdf88f62b0 | 800 | * @} |
<> | 128:9bcdf88f62b0 | 801 | */ |
<> | 128:9bcdf88f62b0 | 802 | |
<> | 128:9bcdf88f62b0 | 803 | /* Peripheral Control functions ************************************************/ |
<> | 128:9bcdf88f62b0 | 804 | /** @addtogroup PCD_Exported_Functions_Group3 |
<> | 128:9bcdf88f62b0 | 805 | * @{ |
<> | 128:9bcdf88f62b0 | 806 | */ |
<> | 128:9bcdf88f62b0 | 807 | HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 808 | HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 809 | HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); |
<> | 128:9bcdf88f62b0 | 810 | HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); |
<> | 128:9bcdf88f62b0 | 811 | HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 128:9bcdf88f62b0 | 812 | HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
<> | 128:9bcdf88f62b0 | 813 | HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
<> | 128:9bcdf88f62b0 | 814 | uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 128:9bcdf88f62b0 | 815 | HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 128:9bcdf88f62b0 | 816 | HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 128:9bcdf88f62b0 | 817 | HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 128:9bcdf88f62b0 | 818 | HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 819 | HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 820 | /** |
<> | 128:9bcdf88f62b0 | 821 | * @} |
<> | 128:9bcdf88f62b0 | 822 | */ |
<> | 128:9bcdf88f62b0 | 823 | |
<> | 128:9bcdf88f62b0 | 824 | |
<> | 128:9bcdf88f62b0 | 825 | /* Peripheral State functions **************************************************/ |
<> | 128:9bcdf88f62b0 | 826 | /** @addtogroup PCD_Exported_Functions_Group4 |
<> | 128:9bcdf88f62b0 | 827 | * @{ |
<> | 128:9bcdf88f62b0 | 828 | */ |
<> | 128:9bcdf88f62b0 | 829 | PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); |
<> | 128:9bcdf88f62b0 | 830 | void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state); |
<> | 128:9bcdf88f62b0 | 831 | /** |
<> | 128:9bcdf88f62b0 | 832 | * @} |
<> | 128:9bcdf88f62b0 | 833 | */ |
<> | 128:9bcdf88f62b0 | 834 | |
<> | 128:9bcdf88f62b0 | 835 | |
<> | 128:9bcdf88f62b0 | 836 | /** |
<> | 128:9bcdf88f62b0 | 837 | * @} |
<> | 128:9bcdf88f62b0 | 838 | */ |
<> | 128:9bcdf88f62b0 | 839 | |
<> | 128:9bcdf88f62b0 | 840 | |
<> | 128:9bcdf88f62b0 | 841 | /** |
<> | 128:9bcdf88f62b0 | 842 | * @} |
<> | 128:9bcdf88f62b0 | 843 | */ |
<> | 128:9bcdf88f62b0 | 844 | |
<> | 128:9bcdf88f62b0 | 845 | /** |
<> | 128:9bcdf88f62b0 | 846 | * @} |
<> | 128:9bcdf88f62b0 | 847 | */ |
<> | 128:9bcdf88f62b0 | 848 | |
<> | 128:9bcdf88f62b0 | 849 | #ifdef __cplusplus |
<> | 128:9bcdf88f62b0 | 850 | } |
<> | 128:9bcdf88f62b0 | 851 | #endif |
<> | 128:9bcdf88f62b0 | 852 | |
<> | 128:9bcdf88f62b0 | 853 | |
<> | 128:9bcdf88f62b0 | 854 | #endif /* __STM32L1xx_HAL_PCD_H */ |
<> | 128:9bcdf88f62b0 | 855 | |
<> | 128:9bcdf88f62b0 | 856 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |