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TARGET_EFM32ZG_STK3200/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_cmu.h@128:9bcdf88f62b0, 2016-10-27 (annotated)

Committer:: <>
Date:: Thu Oct 27 16:45:56 2016 +0100
Revision:: 128:9bcdf88f62b0
Parent:: 113:f141b2784e32
Child:: 139:856d2700e60b

Release 128 of the mbed library

Ports for Upcoming Targets

Fixes and Changes

2966: Add kw24 support https://github.com/ARMmbed/mbed-os/pull/2966

3068: MultiTech mDot - clean up PeripheralPins.c and add new pin names https://github.com/ARMmbed/mbed-os/pull/3068

3089: Kinetis HAL: Remove clock initialization code from serial and ticker https://github.com/ARMmbed/mbed-os/pull/3089

2943: [NRF5] NVIC_SetVector functionality https://github.com/ARMmbed/mbed-os/pull/2943

2938: InterruptIn changes in NCS36510 HAL. https://github.com/ARMmbed/mbed-os/pull/2938

3108: Fix sleep function for NRF52. https://github.com/ARMmbed/mbed-os/pull/3108

3076: STM32F1: Correct timer master value reading https://github.com/ARMmbed/mbed-os/pull/3076

3085: Add LOWPOWERTIMER capability for NUCLEO_F303ZE https://github.com/ARMmbed/mbed-os/pull/3085

3046: [BEETLE] Update BLE stack on Beetle board https://github.com/ARMmbed/mbed-os/pull/3046

3122: [Silicon Labs] Update of Silicon Labs HAL https://github.com/ARMmbed/mbed-os/pull/3122

3022: OnSemi RAM usage fix https://github.com/ARMmbed/mbed-os/pull/3022

3121: STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH https://github.com/ARMmbed/mbed-os/pull/3121

3142: Targets- NUMAKER_PFM_NUC47216 remove mbed 2 https://github.com/ARMmbed/mbed-os/pull/3142

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	98:8ab26030e058	1	/*************************************************************************//
Kojto	98:8ab26030e058	2	* @file em_cmu.h
Kojto	98:8ab26030e058	3	* @brief Clock management unit (CMU) API
<>	128:9bcdf88f62b0	4	* @version 5.0.0
Kojto	98:8ab26030e058	5	*******************************************************************************
Kojto	98:8ab26030e058	6	* @section License
<>	128:9bcdf88f62b0	7	* <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
Kojto	98:8ab26030e058	8	*******************************************************************************
Kojto	98:8ab26030e058	9	*
Kojto	98:8ab26030e058	10	* Permission is granted to anyone to use this software for any purpose,
Kojto	98:8ab26030e058	11	* including commercial applications, and to alter it and redistribute it
Kojto	98:8ab26030e058	12	* freely, subject to the following restrictions:
Kojto	98:8ab26030e058	13	*
Kojto	98:8ab26030e058	14	* 1. The origin of this software must not be misrepresented; you must not
Kojto	98:8ab26030e058	15	* claim that you wrote the original software.
Kojto	98:8ab26030e058	16	* 2. Altered source versions must be plainly marked as such, and must not be
Kojto	98:8ab26030e058	17	* misrepresented as being the original software.
Kojto	98:8ab26030e058	18	* 3. This notice may not be removed or altered from any source distribution.
Kojto	98:8ab26030e058	19	*
Kojto	98:8ab26030e058	20	* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
Kojto	98:8ab26030e058	21	* obligation to support this Software. Silicon Labs is providing the
Kojto	98:8ab26030e058	22	* Software "AS IS", with no express or implied warranties of any kind,
Kojto	98:8ab26030e058	23	* including, but not limited to, any implied warranties of merchantability
Kojto	98:8ab26030e058	24	* or fitness for any particular purpose or warranties against infringement
Kojto	98:8ab26030e058	25	* of any proprietary rights of a third party.
Kojto	98:8ab26030e058	26	*
Kojto	98:8ab26030e058	27	* Silicon Labs will not be liable for any consequential, incidental, or
Kojto	98:8ab26030e058	28	* special damages, or any other relief, or for any claim by any third party,
Kojto	98:8ab26030e058	29	* arising from your use of this Software.
Kojto	98:8ab26030e058	30	*
Kojto	98:8ab26030e058	31	******************************************************************************/
<>	128:9bcdf88f62b0	32	#ifndef EM_CMU_H
<>	128:9bcdf88f62b0	33	#define EM_CMU_H
Kojto	98:8ab26030e058	34
Kojto	98:8ab26030e058	35	#include "em_device.h"
Kojto	98:8ab26030e058	36	#if defined( CMU_PRESENT )
Kojto	98:8ab26030e058	37
Kojto	98:8ab26030e058	38	#include <stdbool.h>
Kojto	113:f141b2784e32	39	#include "em_assert.h"
Kojto	113:f141b2784e32	40	#include "em_bus.h"
Kojto	98:8ab26030e058	41
Kojto	98:8ab26030e058	42	#ifdef __cplusplus
Kojto	98:8ab26030e058	43	extern "C" {
Kojto	98:8ab26030e058	44	#endif
Kojto	98:8ab26030e058	45
Kojto	98:8ab26030e058	46	/*************************************************************************//
<>	128:9bcdf88f62b0	47	* @addtogroup emlib
Kojto	98:8ab26030e058	48	* @{
Kojto	98:8ab26030e058	49	******************************************************************************/
Kojto	98:8ab26030e058	50
Kojto	98:8ab26030e058	51	/*************************************************************************//
Kojto	98:8ab26030e058	52	* @addtogroup CMU
Kojto	98:8ab26030e058	53	* @{
Kojto	98:8ab26030e058	54	******************************************************************************/
Kojto	98:8ab26030e058	55
Kojto	98:8ab26030e058	56	/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
Kojto	98:8ab26030e058	57
Kojto	113:f141b2784e32	58	/* Select register id's, for internal use. */
Kojto	98:8ab26030e058	59	#define CMU_NOSEL_REG 0
Kojto	98:8ab26030e058	60	#define CMU_HFCLKSEL_REG 1
Kojto	98:8ab26030e058	61	#define CMU_LFACLKSEL_REG 2
Kojto	98:8ab26030e058	62	#define CMU_LFBCLKSEL_REG 3
Kojto	113:f141b2784e32	63	#define CMU_LFCCLKSEL_REG 4
Kojto	113:f141b2784e32	64	#define CMU_LFECLKSEL_REG 5
Kojto	113:f141b2784e32	65	#define CMU_DBGCLKSEL_REG 6
Kojto	113:f141b2784e32	66	#define CMU_USBCCLKSEL_REG 7
Kojto	98:8ab26030e058	67
Kojto	98:8ab26030e058	68	#define CMU_SEL_REG_POS 0
Kojto	98:8ab26030e058	69	#define CMU_SEL_REG_MASK 0xf
Kojto	98:8ab26030e058	70
Kojto	113:f141b2784e32	71	/* Divisor/prescaler register id's, for internal use. */
Kojto	98:8ab26030e058	72	#define CMU_NODIV_REG 0
Kojto	113:f141b2784e32	73	#define CMU_NOPRESC_REG 0
Kojto	113:f141b2784e32	74	#define CMU_HFPRESC_REG 1
Kojto	113:f141b2784e32	75	#define CMU_HFCLKDIV_REG 1
Kojto	113:f141b2784e32	76	#define CMU_HFEXPPRESC_REG 2
Kojto	113:f141b2784e32	77	#define CMU_HFCLKLEPRESC_REG 3
Kojto	113:f141b2784e32	78	#define CMU_HFPERPRESC_REG 4
Kojto	113:f141b2784e32	79	#define CMU_HFPERCLKDIV_REG 4
Kojto	113:f141b2784e32	80	#define CMU_HFCOREPRESC_REG 5
Kojto	113:f141b2784e32	81	#define CMU_HFCORECLKDIV_REG 5
<>	128:9bcdf88f62b0	82	#define CMU_LFAPRESC0_REG 6
<>	128:9bcdf88f62b0	83	#define CMU_LFBPRESC0_REG 7
<>	128:9bcdf88f62b0	84	#define CMU_LFEPRESC0_REG 8
Kojto	98:8ab26030e058	85
Kojto	113:f141b2784e32	86	#define CMU_PRESC_REG_POS 4
Kojto	113:f141b2784e32	87	#define CMU_DIV_REG_POS CMU_PRESC_REG_POS
Kojto	113:f141b2784e32	88	#define CMU_PRESC_REG_MASK 0xf
Kojto	113:f141b2784e32	89	#define CMU_DIV_REG_MASK CMU_PRESC_REG_MASK
Kojto	113:f141b2784e32	90
Kojto	113:f141b2784e32	91	/* Enable register id's, for internal use. */
Kojto	98:8ab26030e058	92	#define CMU_NO_EN_REG 0
Kojto	113:f141b2784e32	93	#define CMU_CTRL_EN_REG 1
Kojto	98:8ab26030e058	94	#define CMU_HFPERCLKDIV_EN_REG 1
Kojto	98:8ab26030e058	95	#define CMU_HFPERCLKEN0_EN_REG 2
Kojto	98:8ab26030e058	96	#define CMU_HFCORECLKEN0_EN_REG 3
Kojto	113:f141b2784e32	97	#define CMU_HFBUSCLKEN0_EN_REG 5
Kojto	113:f141b2784e32	98	#define CMU_LFACLKEN0_EN_REG 6
Kojto	113:f141b2784e32	99	#define CMU_LFBCLKEN0_EN_REG 7
Kojto	113:f141b2784e32	100	#define CMU_LFCCLKEN0_EN_REG 8
Kojto	113:f141b2784e32	101	#define CMU_LFECLKEN0_EN_REG 9
Kojto	113:f141b2784e32	102	#define CMU_PCNT_EN_REG 10
Kojto	98:8ab26030e058	103
Kojto	98:8ab26030e058	104	#define CMU_EN_REG_POS 8
Kojto	98:8ab26030e058	105	#define CMU_EN_REG_MASK 0xf
Kojto	98:8ab26030e058	106
Kojto	113:f141b2784e32	107	/* Enable register bit positions, for internal use. */
Kojto	98:8ab26030e058	108	#define CMU_EN_BIT_POS 12
Kojto	98:8ab26030e058	109	#define CMU_EN_BIT_MASK 0x1f
Kojto	98:8ab26030e058	110
Kojto	113:f141b2784e32	111	/* Clock branch bitfield positions, for internal use. */
Kojto	98:8ab26030e058	112	#define CMU_HF_CLK_BRANCH 0
Kojto	113:f141b2784e32	113	#define CMU_HFCORE_CLK_BRANCH 1
Kojto	113:f141b2784e32	114	#define CMU_HFPER_CLK_BRANCH 2
Kojto	113:f141b2784e32	115	#define CMU_HFBUS_CLK_BRANCH 4
Kojto	113:f141b2784e32	116	#define CMU_HFEXP_CLK_BRANCH 5
Kojto	113:f141b2784e32	117	#define CMU_DBG_CLK_BRANCH 6
Kojto	113:f141b2784e32	118	#define CMU_AUX_CLK_BRANCH 7
Kojto	113:f141b2784e32	119	#define CMU_RTC_CLK_BRANCH 8
<>	128:9bcdf88f62b0	120	#define CMU_RTCC_CLK_BRANCH 9
<>	128:9bcdf88f62b0	121	#define CMU_LETIMER0_CLK_BRANCH 10
<>	128:9bcdf88f62b0	122	#define CMU_LEUART0_CLK_BRANCH 11
<>	128:9bcdf88f62b0	123	#define CMU_LEUART1_CLK_BRANCH 12
<>	128:9bcdf88f62b0	124	#define CMU_LFA_CLK_BRANCH 13
<>	128:9bcdf88f62b0	125	#define CMU_LFB_CLK_BRANCH 14
<>	128:9bcdf88f62b0	126	#define CMU_LFC_CLK_BRANCH 15
<>	128:9bcdf88f62b0	127	#define CMU_LFE_CLK_BRANCH 16
<>	128:9bcdf88f62b0	128	#define CMU_USBC_CLK_BRANCH 17
<>	128:9bcdf88f62b0	129	#define CMU_USBLE_CLK_BRANCH 18
<>	128:9bcdf88f62b0	130	#define CMU_LCDPRE_CLK_BRANCH 19
<>	128:9bcdf88f62b0	131	#define CMU_LCD_CLK_BRANCH 20
<>	128:9bcdf88f62b0	132	#define CMU_LESENSE_CLK_BRANCH 21
Kojto	98:8ab26030e058	133
Kojto	98:8ab26030e058	134	#define CMU_CLK_BRANCH_POS 17
Kojto	98:8ab26030e058	135	#define CMU_CLK_BRANCH_MASK 0x1f
Kojto	98:8ab26030e058	136
Kojto	98:8ab26030e058	137	/** @endcond */
Kojto	98:8ab26030e058	138
Kojto	98:8ab26030e058	139	/*******************************************************************************
Kojto	98:8ab26030e058	140	****************************** ENUMS **********************************
Kojto	98:8ab26030e058	141	******************************************************************************/
Kojto	98:8ab26030e058	142
Kojto	98:8ab26030e058	143	/** Clock divisors. These values are valid for prescalers. */
Kojto	98:8ab26030e058	144	#define cmuClkDiv_1 1 /*< Divide clock by 1. /
Kojto	98:8ab26030e058	145	#define cmuClkDiv_2 2 /*< Divide clock by 2. /
Kojto	98:8ab26030e058	146	#define cmuClkDiv_4 4 /*< Divide clock by 4. /
Kojto	98:8ab26030e058	147	#define cmuClkDiv_8 8 /*< Divide clock by 8. /
Kojto	98:8ab26030e058	148	#define cmuClkDiv_16 16 /*< Divide clock by 16. /
Kojto	98:8ab26030e058	149	#define cmuClkDiv_32 32 /*< Divide clock by 32. /
Kojto	98:8ab26030e058	150	#define cmuClkDiv_64 64 /*< Divide clock by 64. /
Kojto	98:8ab26030e058	151	#define cmuClkDiv_128 128 /*< Divide clock by 128. /
Kojto	98:8ab26030e058	152	#define cmuClkDiv_256 256 /*< Divide clock by 256. /
Kojto	98:8ab26030e058	153	#define cmuClkDiv_512 512 /*< Divide clock by 512. /
Kojto	98:8ab26030e058	154	#define cmuClkDiv_1024 1024 /*< Divide clock by 1024. /
Kojto	98:8ab26030e058	155	#define cmuClkDiv_2048 2048 /*< Divide clock by 2048. /
Kojto	98:8ab26030e058	156	#define cmuClkDiv_4096 4096 /*< Divide clock by 4096. /
Kojto	98:8ab26030e058	157	#define cmuClkDiv_8192 8192 /*< Divide clock by 8192. /
Kojto	98:8ab26030e058	158	#define cmuClkDiv_16384 16384 /*< Divide clock by 16384. /
Kojto	98:8ab26030e058	159	#define cmuClkDiv_32768 32768 /*< Divide clock by 32768. /
Kojto	98:8ab26030e058	160
Kojto	98:8ab26030e058	161	/** Clock divider configuration */
Kojto	98:8ab26030e058	162	typedef uint32_t CMU_ClkDiv_TypeDef;
Kojto	98:8ab26030e058	163
Kojto	113:f141b2784e32	164	#if defined( _SILICON_LABS_32B_PLATFORM_2 )
Kojto	113:f141b2784e32	165	/** Clockprescaler configuration */
Kojto	113:f141b2784e32	166	typedef uint32_t CMU_ClkPresc_TypeDef;
Kojto	113:f141b2784e32	167	#endif
Kojto	113:f141b2784e32	168
Kojto	113:f141b2784e32	169	#if defined( _CMU_HFRCOCTRL_BAND_MASK )
Kojto	113:f141b2784e32	170	/** High frequency system RCO bands */
Kojto	98:8ab26030e058	171	typedef enum
Kojto	98:8ab26030e058	172	{
Kojto	113:f141b2784e32	173	cmuHFRCOBand_1MHz = _CMU_HFRCOCTRL_BAND_1MHZ, /*< 1MHz HFRCO band /
Kojto	113:f141b2784e32	174	cmuHFRCOBand_7MHz = _CMU_HFRCOCTRL_BAND_7MHZ, /*< 7MHz HFRCO band /
Kojto	113:f141b2784e32	175	cmuHFRCOBand_11MHz = _CMU_HFRCOCTRL_BAND_11MHZ, /*< 11MHz HFRCO band /
Kojto	113:f141b2784e32	176	cmuHFRCOBand_14MHz = _CMU_HFRCOCTRL_BAND_14MHZ, /*< 14MHz HFRCO band /
Kojto	113:f141b2784e32	177	cmuHFRCOBand_21MHz = _CMU_HFRCOCTRL_BAND_21MHZ, /*< 21MHz HFRCO band /
Kojto	113:f141b2784e32	178	#if defined( CMU_HFRCOCTRL_BAND_28MHZ )
Kojto	113:f141b2784e32	179	cmuHFRCOBand_28MHz = _CMU_HFRCOCTRL_BAND_28MHZ, /*< 28MHz HFRCO band /
Kojto	98:8ab26030e058	180	#endif
Kojto	98:8ab26030e058	181	} CMU_HFRCOBand_TypeDef;
Kojto	113:f141b2784e32	182	#endif /* _CMU_HFRCOCTRL_BAND_MASK */
Kojto	98:8ab26030e058	183
Kojto	98:8ab26030e058	184	#if defined( _CMU_AUXHFRCOCTRL_BAND_MASK )
Kojto	113:f141b2784e32	185	/** AUX High frequency RCO bands */
Kojto	98:8ab26030e058	186	typedef enum
Kojto	98:8ab26030e058	187	{
Kojto	113:f141b2784e32	188	cmuAUXHFRCOBand_1MHz = _CMU_AUXHFRCOCTRL_BAND_1MHZ, /*< 1MHz RC band /
Kojto	113:f141b2784e32	189	cmuAUXHFRCOBand_7MHz = _CMU_AUXHFRCOCTRL_BAND_7MHZ, /*< 7MHz RC band /
Kojto	113:f141b2784e32	190	cmuAUXHFRCOBand_11MHz = _CMU_AUXHFRCOCTRL_BAND_11MHZ, /*< 11MHz RC band /
Kojto	113:f141b2784e32	191	cmuAUXHFRCOBand_14MHz = _CMU_AUXHFRCOCTRL_BAND_14MHZ, /*< 14MHz RC band /
Kojto	113:f141b2784e32	192	cmuAUXHFRCOBand_21MHz = _CMU_AUXHFRCOCTRL_BAND_21MHZ, /*< 21MHz RC band /
Kojto	113:f141b2784e32	193	#if defined( CMU_AUXHFRCOCTRL_BAND_28MHZ )
Kojto	113:f141b2784e32	194	cmuAUXHFRCOBand_28MHz = _CMU_AUXHFRCOCTRL_BAND_28MHZ, /*< 28MHz RC band /
Kojto	98:8ab26030e058	195	#endif
Kojto	98:8ab26030e058	196	} CMU_AUXHFRCOBand_TypeDef;
Kojto	98:8ab26030e058	197	#endif
Kojto	98:8ab26030e058	198
Kojto	98:8ab26030e058	199	#if defined( _CMU_USHFRCOCONF_BAND_MASK )
Kojto	98:8ab26030e058	200	/** USB High frequency RC bands. */
Kojto	98:8ab26030e058	201	typedef enum
Kojto	98:8ab26030e058	202	{
Kojto	98:8ab26030e058	203	/** 24MHz RC band. */
Kojto	98:8ab26030e058	204	cmuUSHFRCOBand_24MHz = _CMU_USHFRCOCONF_BAND_24MHZ,
Kojto	98:8ab26030e058	205	/** 48MHz RC band. */
Kojto	98:8ab26030e058	206	cmuUSHFRCOBand_48MHz = _CMU_USHFRCOCONF_BAND_48MHZ,
Kojto	98:8ab26030e058	207	} CMU_USHFRCOBand_TypeDef;
Kojto	98:8ab26030e058	208	#endif
Kojto	98:8ab26030e058	209
Kojto	113:f141b2784e32	210	#if defined( _CMU_HFRCOCTRL_FREQRANGE_MASK )
Kojto	113:f141b2784e32	211	/** High frequency system RCO bands */
Kojto	113:f141b2784e32	212	typedef enum
Kojto	113:f141b2784e32	213	{
Kojto	113:f141b2784e32	214	cmuHFRCOFreq_1M0Hz = 1000000U, /*< 1MHz RC band /
Kojto	113:f141b2784e32	215	cmuHFRCOFreq_2M0Hz = 2000000U, /*< 2MHz RC band /
Kojto	113:f141b2784e32	216	cmuHFRCOFreq_4M0Hz = 4000000U, /*< 4MHz RC band /
Kojto	113:f141b2784e32	217	cmuHFRCOFreq_7M0Hz = 7000000U, /*< 7MHz RC band /
Kojto	113:f141b2784e32	218	cmuHFRCOFreq_13M0Hz = 13000000U, /*< 13MHz RC band /
Kojto	113:f141b2784e32	219	cmuHFRCOFreq_16M0Hz = 16000000U, /*< 16MHz RC band /
Kojto	113:f141b2784e32	220	cmuHFRCOFreq_19M0Hz = 19000000U, /*< 19MHz RC band /
Kojto	113:f141b2784e32	221	cmuHFRCOFreq_26M0Hz = 26000000U, /*< 26MHz RC band /
Kojto	113:f141b2784e32	222	cmuHFRCOFreq_32M0Hz = 32000000U, /*< 32MHz RC band /
Kojto	113:f141b2784e32	223	cmuHFRCOFreq_38M0Hz = 38000000U, /*< 38MHz RC band /
Kojto	113:f141b2784e32	224	cmuHFRCOFreq_UserDefined = 0,
Kojto	113:f141b2784e32	225	} CMU_HFRCOFreq_TypeDef;
Kojto	113:f141b2784e32	226	#define CMU_HFRCO_MIN cmuHFRCOFreq_1M0Hz
Kojto	113:f141b2784e32	227	#define CMU_HFRCO_MAX cmuHFRCOFreq_38M0Hz
Kojto	113:f141b2784e32	228	#endif
Kojto	113:f141b2784e32	229
Kojto	113:f141b2784e32	230	#if defined( _CMU_AUXHFRCOCTRL_FREQRANGE_MASK )
Kojto	113:f141b2784e32	231	/** AUX High frequency RCO bands */
Kojto	113:f141b2784e32	232	typedef enum
Kojto	113:f141b2784e32	233	{
Kojto	113:f141b2784e32	234	cmuAUXHFRCOFreq_1M0Hz = 1000000U, /*< 1MHz RC band /
Kojto	113:f141b2784e32	235	cmuAUXHFRCOFreq_2M0Hz = 2000000U, /*< 2MHz RC band /
Kojto	113:f141b2784e32	236	cmuAUXHFRCOFreq_4M0Hz = 4000000U, /*< 4MHz RC band /
Kojto	113:f141b2784e32	237	cmuAUXHFRCOFreq_7M0Hz = 7000000U, /*< 7MHz RC band /
Kojto	113:f141b2784e32	238	cmuAUXHFRCOFreq_13M0Hz = 13000000U, /*< 13MHz RC band /
Kojto	113:f141b2784e32	239	cmuAUXHFRCOFreq_16M0Hz = 16000000U, /*< 16MHz RC band /
Kojto	113:f141b2784e32	240	cmuAUXHFRCOFreq_19M0Hz = 19000000U, /*< 19MHz RC band /
Kojto	113:f141b2784e32	241	cmuAUXHFRCOFreq_26M0Hz = 26000000U, /*< 26MHz RC band /
Kojto	113:f141b2784e32	242	cmuAUXHFRCOFreq_32M0Hz = 32000000U, /*< 32MHz RC band /
Kojto	113:f141b2784e32	243	cmuAUXHFRCOFreq_38M0Hz = 38000000U, /*< 38MHz RC band /
Kojto	113:f141b2784e32	244	cmuAUXHFRCOFreq_UserDefined = 0,
Kojto	113:f141b2784e32	245	} CMU_AUXHFRCOFreq_TypeDef;
Kojto	113:f141b2784e32	246	#define CMU_AUXHFRCO_MIN cmuAUXHFRCOFreq_1M0Hz
Kojto	113:f141b2784e32	247	#define CMU_AUXHFRCO_MAX cmuAUXHFRCOFreq_38M0Hz
Kojto	113:f141b2784e32	248	#endif
Kojto	113:f141b2784e32	249
Kojto	98:8ab26030e058	250
Kojto	98:8ab26030e058	251	/** Clock points in CMU. Please refer to CMU overview in reference manual. */
Kojto	98:8ab26030e058	252	typedef enum
Kojto	98:8ab26030e058	253	{
Kojto	98:8ab26030e058	254	/*******************/
Kojto	98:8ab26030e058	255	/* HF clock branch */
Kojto	98:8ab26030e058	256	/*******************/
Kojto	98:8ab26030e058	257
Kojto	98:8ab26030e058	258	/** High frequency clock */
Kojto	113:f141b2784e32	259	#if defined( _CMU_CTRL_HFCLKDIV_MASK ) \
Kojto	113:f141b2784e32	260	\|\| defined( _CMU_HFPRESC_MASK )
Kojto	113:f141b2784e32	261	cmuClock_HF = (CMU_HFCLKDIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	262	\| (CMU_HFCLKSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	263	\| (CMU_NO_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	264	\| (0 << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	265	\| (CMU_HF_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	266	#else
Kojto	113:f141b2784e32	267	cmuClock_HF = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	268	\| (CMU_HFCLKSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	269	\| (CMU_NO_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	270	\| (0 << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	271	\| (CMU_HF_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	272	#endif
Kojto	98:8ab26030e058	273
Kojto	98:8ab26030e058	274	/** Debug clock */
Kojto	113:f141b2784e32	275	cmuClock_DBG = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	276	\| (CMU_DBGCLKSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	277	\| (CMU_NO_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	278	\| (0 << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	279	\| (CMU_DBG_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	280
Kojto	98:8ab26030e058	281	/** AUX clock */
Kojto	113:f141b2784e32	282	cmuClock_AUX = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	283	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	284	\| (CMU_NO_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	285	\| (0 << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	286	\| (CMU_AUX_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	287
Kojto	113:f141b2784e32	288	#if defined( _CMU_HFEXPPRESC_MASK )
Kojto	113:f141b2784e32	289	/**********************/
Kojto	113:f141b2784e32	290	/* HF export sub-branch */
Kojto	113:f141b2784e32	291	/**********************/
Kojto	113:f141b2784e32	292
Kojto	113:f141b2784e32	293	/** Export clock */
Kojto	113:f141b2784e32	294	cmuClock_EXPORT = (CMU_HFEXPPRESC_REG << CMU_PRESC_REG_POS)
Kojto	113:f141b2784e32	295	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	296	\| (CMU_NO_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	297	\| (0 << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	298	\| (CMU_HFEXP_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	299	#endif
Kojto	113:f141b2784e32	300
Kojto	113:f141b2784e32	301	#if defined( _CMU_HFBUSCLKEN0_MASK )
Kojto	113:f141b2784e32	302	/**********************************/
Kojto	113:f141b2784e32	303	/* HF bus clock sub-branch */
Kojto	113:f141b2784e32	304	/**********************************/
Kojto	113:f141b2784e32	305
Kojto	113:f141b2784e32	306	/** High frequency bus clock. */
Kojto	113:f141b2784e32	307	cmuClock_BUS = (CMU_NOPRESC_REG << CMU_PRESC_REG_POS)
Kojto	113:f141b2784e32	308	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	309	\| (CMU_NO_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	310	\| (0 << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	311	\| (CMU_HFBUS_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	312
Kojto	113:f141b2784e32	313	#if defined( CMU_HFBUSCLKEN0_CRYPTO )
Kojto	113:f141b2784e32	314	/** Cryptography accelerator clock. */
Kojto	113:f141b2784e32	315	cmuClock_CRYPTO = (CMU_NOPRESC_REG << CMU_PRESC_REG_POS)
Kojto	113:f141b2784e32	316	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	317	\| (CMU_HFBUSCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	318	\| (_CMU_HFBUSCLKEN0_CRYPTO_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	319	\| (CMU_HFBUS_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	320	#endif
Kojto	113:f141b2784e32	321
<>	128:9bcdf88f62b0	322	#if defined( CMU_HFBUSCLKEN0_CRYPTO0 )
<>	128:9bcdf88f62b0	323	/** Cryptography accelerator 0 clock. */
<>	128:9bcdf88f62b0	324	cmuClock_CRYPTO0 = (CMU_NOPRESC_REG << CMU_PRESC_REG_POS)
<>	128:9bcdf88f62b0	325	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
<>	128:9bcdf88f62b0	326	\| (CMU_HFBUSCLKEN0_EN_REG << CMU_EN_REG_POS)
<>	128:9bcdf88f62b0	327	\| (_CMU_HFBUSCLKEN0_CRYPTO0_SHIFT << CMU_EN_BIT_POS)
<>	128:9bcdf88f62b0	328	\| (CMU_HFBUS_CLK_BRANCH << CMU_CLK_BRANCH_POS),
<>	128:9bcdf88f62b0	329	#endif
<>	128:9bcdf88f62b0	330
<>	128:9bcdf88f62b0	331	#if defined( CMU_HFBUSCLKEN0_CRYPTO1 )
<>	128:9bcdf88f62b0	332	/** Cryptography accelerator 1 clock. */
<>	128:9bcdf88f62b0	333	cmuClock_CRYPTO1 = (CMU_NOPRESC_REG << CMU_PRESC_REG_POS)
<>	128:9bcdf88f62b0	334	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
<>	128:9bcdf88f62b0	335	\| (CMU_HFBUSCLKEN0_EN_REG << CMU_EN_REG_POS)
<>	128:9bcdf88f62b0	336	\| (_CMU_HFBUSCLKEN0_CRYPTO1_SHIFT << CMU_EN_BIT_POS)
<>	128:9bcdf88f62b0	337	\| (CMU_HFBUS_CLK_BRANCH << CMU_CLK_BRANCH_POS),
<>	128:9bcdf88f62b0	338	#endif
<>	128:9bcdf88f62b0	339
Kojto	113:f141b2784e32	340	#if defined( CMU_HFBUSCLKEN0_LDMA )
Kojto	113:f141b2784e32	341	/** Direct memory access controller clock. */
Kojto	113:f141b2784e32	342	cmuClock_LDMA = (CMU_NOPRESC_REG << CMU_PRESC_REG_POS)
Kojto	113:f141b2784e32	343	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	344	\| (CMU_HFBUSCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	345	\| (_CMU_HFBUSCLKEN0_LDMA_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	346	\| (CMU_HFBUS_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	347	#endif
Kojto	113:f141b2784e32	348
Kojto	113:f141b2784e32	349	#if defined( CMU_HFBUSCLKEN0_GPCRC )
Kojto	113:f141b2784e32	350	/** General purpose cyclic redundancy checksum clock. */
Kojto	113:f141b2784e32	351	cmuClock_GPCRC = (CMU_NOPRESC_REG << CMU_PRESC_REG_POS)
Kojto	113:f141b2784e32	352	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	353	\| (CMU_HFBUSCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	354	\| (_CMU_HFBUSCLKEN0_GPCRC_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	355	\| (CMU_HFBUS_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	356	#endif
Kojto	113:f141b2784e32	357
Kojto	113:f141b2784e32	358	#if defined( CMU_HFBUSCLKEN0_GPIO )
Kojto	113:f141b2784e32	359	/** General purpose input/output clock. */
Kojto	113:f141b2784e32	360	cmuClock_GPIO = (CMU_NOPRESC_REG << CMU_PRESC_REG_POS)
Kojto	113:f141b2784e32	361	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	362	\| (CMU_HFBUSCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	363	\| (_CMU_HFBUSCLKEN0_GPIO_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	364	\| (CMU_HFBUS_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	365	#endif
Kojto	113:f141b2784e32	366
<>	128:9bcdf88f62b0	367	/** Low energy clock divided down from HFBUSCLK. */
<>	128:9bcdf88f62b0	368	cmuClock_HFLE = (CMU_NOPRESC_REG << CMU_PRESC_REG_POS)
<>	128:9bcdf88f62b0	369	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
<>	128:9bcdf88f62b0	370	\| (CMU_HFBUSCLKEN0_EN_REG << CMU_EN_REG_POS)
<>	128:9bcdf88f62b0	371	\| (_CMU_HFBUSCLKEN0_LE_SHIFT << CMU_EN_BIT_POS)
<>	128:9bcdf88f62b0	372	\| (CMU_HFBUS_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	373
Kojto	113:f141b2784e32	374	#if defined( CMU_HFBUSCLKEN0_PRS )
Kojto	113:f141b2784e32	375	/** Peripheral reflex system clock. */
Kojto	113:f141b2784e32	376	cmuClock_PRS = (CMU_NOPRESC_REG << CMU_PRESC_REG_POS)
Kojto	113:f141b2784e32	377	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	378	\| (CMU_HFBUSCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	379	\| (_CMU_HFBUSCLKEN0_PRS_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	380	\| (CMU_HFBUS_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	381	#endif
Kojto	113:f141b2784e32	382	#endif
Kojto	98:8ab26030e058	383
Kojto	98:8ab26030e058	384	/**********************************/
Kojto	98:8ab26030e058	385	/* HF peripheral clock sub-branch */
Kojto	98:8ab26030e058	386	/**********************************/
Kojto	98:8ab26030e058	387
Kojto	98:8ab26030e058	388	/** High frequency peripheral clock */
Kojto	113:f141b2784e32	389	#if defined( _CMU_HFPRESC_MASK )
Kojto	113:f141b2784e32	390	cmuClock_HFPER = (CMU_HFPERPRESC_REG << CMU_PRESC_REG_POS)
Kojto	113:f141b2784e32	391	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	392	\| (CMU_CTRL_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	393	\| (_CMU_CTRL_HFPERCLKEN_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	394	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	395	#else
Kojto	113:f141b2784e32	396	cmuClock_HFPER = (CMU_HFPERCLKDIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	397	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	398	\| (CMU_HFPERCLKDIV_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	399	\| (_CMU_HFPERCLKDIV_HFPERCLKEN_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	400	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	401	#endif
Kojto	98:8ab26030e058	402
Kojto	113:f141b2784e32	403	#if defined( CMU_HFPERCLKEN0_USART0 )
Kojto	98:8ab26030e058	404	/** Universal sync/async receiver/transmitter 0 clock. */
Kojto	113:f141b2784e32	405	cmuClock_USART0 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	406	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	407	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	408	\| (_CMU_HFPERCLKEN0_USART0_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	409	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	410	#endif
Kojto	98:8ab26030e058	411
Kojto	113:f141b2784e32	412	#if defined( CMU_HFPERCLKEN0_USARTRF0 )
Kojto	98:8ab26030e058	413	/** Universal sync/async receiver/transmitter 0 clock. */
Kojto	113:f141b2784e32	414	cmuClock_USARTRF0 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	415	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	416	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	417	\| (_CMU_HFPERCLKEN0_USARTRF0_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	418	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	419	#endif
Kojto	98:8ab26030e058	420
Kojto	113:f141b2784e32	421	#if defined( CMU_HFPERCLKEN0_USARTRF1 )
Kojto	113:f141b2784e32	422	/** Universal sync/async receiver/transmitter 0 clock. */
Kojto	113:f141b2784e32	423	cmuClock_USARTRF1 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	424	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	425	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	426	\| (_CMU_HFPERCLKEN0_USARTRF1_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	427	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	428	#endif
Kojto	98:8ab26030e058	429
Kojto	113:f141b2784e32	430	#if defined( CMU_HFPERCLKEN0_USART1 )
Kojto	113:f141b2784e32	431	/** Universal sync/async receiver/transmitter 1 clock. */
Kojto	113:f141b2784e32	432	cmuClock_USART1 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	433	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	434	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	435	\| (_CMU_HFPERCLKEN0_USART1_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	436	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	437	#endif
Kojto	113:f141b2784e32	438
Kojto	113:f141b2784e32	439	#if defined( CMU_HFPERCLKEN0_USART2 )
Kojto	98:8ab26030e058	440	/** Universal sync/async receiver/transmitter 2 clock. */
Kojto	113:f141b2784e32	441	cmuClock_USART2 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	442	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	443	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	444	\| (_CMU_HFPERCLKEN0_USART2_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	445	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	446	#endif
Kojto	98:8ab26030e058	447
Kojto	113:f141b2784e32	448	#if defined( CMU_HFPERCLKEN0_USART3 )
Kojto	113:f141b2784e32	449	/** Universal sync/async receiver/transmitter 3 clock. */
Kojto	113:f141b2784e32	450	cmuClock_USART3 = (CMU_NOPRESC_REG << CMU_PRESC_REG_POS)
Kojto	113:f141b2784e32	451	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	452	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	453	\| (_CMU_HFPERCLKEN0_USART3_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	454	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	455	#endif
Kojto	98:8ab26030e058	456
Kojto	113:f141b2784e32	457	#if defined( CMU_HFPERCLKEN0_USART4 )
Kojto	113:f141b2784e32	458	/** Universal sync/async receiver/transmitter 4 clock. */
Kojto	113:f141b2784e32	459	cmuClock_USART4 = (CMU_NOPRESC_REG << CMU_PRESC_REG_POS)
Kojto	113:f141b2784e32	460	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	461	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	462	\| (_CMU_HFPERCLKEN0_USART4_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	463	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	464	#endif
Kojto	113:f141b2784e32	465
Kojto	113:f141b2784e32	466	#if defined( CMU_HFPERCLKEN0_USART5 )
Kojto	113:f141b2784e32	467	/** Universal sync/async receiver/transmitter 5 clock. */
Kojto	113:f141b2784e32	468	cmuClock_USART5 = (CMU_NOPRESC_REG << CMU_PRESC_REG_POS)
Kojto	113:f141b2784e32	469	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	470	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	471	\| (_CMU_HFPERCLKEN0_USART5_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	472	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	473	#endif
Kojto	98:8ab26030e058	474
Kojto	113:f141b2784e32	475
Kojto	113:f141b2784e32	476	#if defined( CMU_HFPERCLKEN0_UART0 )
Kojto	113:f141b2784e32	477	/** Universal async receiver/transmitter 0 clock. */
Kojto	113:f141b2784e32	478	cmuClock_UART0 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	479	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	480	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	481	\| (_CMU_HFPERCLKEN0_UART0_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	482	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	483	#endif
Kojto	98:8ab26030e058	484
Kojto	113:f141b2784e32	485	#if defined( CMU_HFPERCLKEN0_UART1 )
Kojto	113:f141b2784e32	486	/** Universal async receiver/transmitter 1 clock. */
Kojto	113:f141b2784e32	487	cmuClock_UART1 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	488	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	489	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	490	\| (_CMU_HFPERCLKEN0_UART1_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	491	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	492	#endif
Kojto	98:8ab26030e058	493
Kojto	113:f141b2784e32	494	#if defined( CMU_HFPERCLKEN0_TIMER0 )
Kojto	113:f141b2784e32	495	/** Timer 0 clock. */
Kojto	113:f141b2784e32	496	cmuClock_TIMER0 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	497	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	498	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	499	\| (_CMU_HFPERCLKEN0_TIMER0_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	500	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	501	#endif
Kojto	113:f141b2784e32	502
Kojto	113:f141b2784e32	503	#if defined( CMU_HFPERCLKEN0_TIMER1 )
Kojto	113:f141b2784e32	504	/** Timer 1 clock. */
Kojto	113:f141b2784e32	505	cmuClock_TIMER1 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	506	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	507	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	508	\| (_CMU_HFPERCLKEN0_TIMER1_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	509	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	510	#endif
Kojto	98:8ab26030e058	511
Kojto	113:f141b2784e32	512	#if defined( CMU_HFPERCLKEN0_TIMER2 )
Kojto	113:f141b2784e32	513	/** Timer 2 clock. */
Kojto	113:f141b2784e32	514	cmuClock_TIMER2 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	515	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	516	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	517	\| (_CMU_HFPERCLKEN0_TIMER2_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	518	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	519	#endif
Kojto	98:8ab26030e058	520
Kojto	113:f141b2784e32	521	#if defined( CMU_HFPERCLKEN0_TIMER3 )
Kojto	113:f141b2784e32	522	/** Timer 3 clock. */
Kojto	113:f141b2784e32	523	cmuClock_TIMER3 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	524	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	525	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	526	\| (_CMU_HFPERCLKEN0_TIMER3_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	527	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	528	#endif
Kojto	98:8ab26030e058	529
<>	128:9bcdf88f62b0	530	#if defined( CMU_HFPERCLKEN0_WTIMER0 )
<>	128:9bcdf88f62b0	531	/** Wide Timer 0 clock. */
<>	128:9bcdf88f62b0	532	cmuClock_WTIMER0 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
<>	128:9bcdf88f62b0	533	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
<>	128:9bcdf88f62b0	534	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
<>	128:9bcdf88f62b0	535	\| (_CMU_HFPERCLKEN0_WTIMER0_SHIFT << CMU_EN_BIT_POS)
<>	128:9bcdf88f62b0	536	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
<>	128:9bcdf88f62b0	537	#endif
<>	128:9bcdf88f62b0	538
<>	128:9bcdf88f62b0	539	#if defined( CMU_HFPERCLKEN0_WTIMER1 )
<>	128:9bcdf88f62b0	540	/** Wide Timer 1 clock. */
<>	128:9bcdf88f62b0	541	cmuClock_WTIMER1 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
<>	128:9bcdf88f62b0	542	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
<>	128:9bcdf88f62b0	543	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
<>	128:9bcdf88f62b0	544	\| (_CMU_HFPERCLKEN0_WTIMER1_SHIFT << CMU_EN_BIT_POS)
<>	128:9bcdf88f62b0	545	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
<>	128:9bcdf88f62b0	546	#endif
<>	128:9bcdf88f62b0	547
Kojto	113:f141b2784e32	548	#if defined( CMU_HFPERCLKEN0_CRYOTIMER )
Kojto	113:f141b2784e32	549	/** CRYOtimer clock. */
Kojto	113:f141b2784e32	550	cmuClock_CRYOTIMER = (CMU_NOPRESC_REG << CMU_PRESC_REG_POS)
Kojto	113:f141b2784e32	551	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	552	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	553	\| (_CMU_HFPERCLKEN0_CRYOTIMER_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	554	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	555	#endif
Kojto	98:8ab26030e058	556
Kojto	113:f141b2784e32	557	#if defined( CMU_HFPERCLKEN0_ACMP0 )
Kojto	113:f141b2784e32	558	/** Analog comparator 0 clock. */
Kojto	113:f141b2784e32	559	cmuClock_ACMP0 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	560	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	561	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	562	\| (_CMU_HFPERCLKEN0_ACMP0_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	563	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	564	#endif
Kojto	98:8ab26030e058	565
Kojto	113:f141b2784e32	566	#if defined( CMU_HFPERCLKEN0_ACMP1 )
Kojto	113:f141b2784e32	567	/** Analog comparator 1 clock. */
Kojto	113:f141b2784e32	568	cmuClock_ACMP1 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	569	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	570	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	571	\| (_CMU_HFPERCLKEN0_ACMP1_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	572	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	573	#endif
Kojto	113:f141b2784e32	574
Kojto	113:f141b2784e32	575	#if defined( CMU_HFPERCLKEN0_PRS )
Kojto	113:f141b2784e32	576	/** Peripheral reflex system clock. */
Kojto	113:f141b2784e32	577	cmuClock_PRS = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	578	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	579	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	580	\| (_CMU_HFPERCLKEN0_PRS_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	581	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	582	#endif
Kojto	98:8ab26030e058	583
Kojto	113:f141b2784e32	584	#if defined( CMU_HFPERCLKEN0_DAC0 )
Kojto	98:8ab26030e058	585	/** Digital to analog converter 0 clock. */
Kojto	113:f141b2784e32	586	cmuClock_DAC0 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	587	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	588	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	589	\| (_CMU_HFPERCLKEN0_DAC0_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	590	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	591	#endif
Kojto	98:8ab26030e058	592
<>	128:9bcdf88f62b0	593	#if defined( CMU_HFPERCLKEN0_VDAC0 )
<>	128:9bcdf88f62b0	594	/** Voltage digital to analog converter 0 clock. */
<>	128:9bcdf88f62b0	595	cmuClock_VDAC0 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
<>	128:9bcdf88f62b0	596	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
<>	128:9bcdf88f62b0	597	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
<>	128:9bcdf88f62b0	598	\| (_CMU_HFPERCLKEN0_VDAC0_SHIFT << CMU_EN_BIT_POS)
<>	128:9bcdf88f62b0	599	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
<>	128:9bcdf88f62b0	600	#endif
<>	128:9bcdf88f62b0	601
Kojto	113:f141b2784e32	602	#if defined( CMU_HFPERCLKEN0_IDAC0 )
<>	128:9bcdf88f62b0	603	/** Current digital to analog converter 0 clock. */
Kojto	113:f141b2784e32	604	cmuClock_IDAC0 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	605	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	606	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	607	\| (_CMU_HFPERCLKEN0_IDAC0_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	608	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	609	#endif
Kojto	113:f141b2784e32	610
Kojto	113:f141b2784e32	611	#if defined( CMU_HFPERCLKEN0_GPIO )
Kojto	98:8ab26030e058	612	/** General purpose input/output clock. */
Kojto	113:f141b2784e32	613	cmuClock_GPIO = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	614	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	615	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	616	\| (_CMU_HFPERCLKEN0_GPIO_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	617	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	618	#endif
Kojto	98:8ab26030e058	619
Kojto	113:f141b2784e32	620	#if defined( CMU_HFPERCLKEN0_VCMP )
Kojto	98:8ab26030e058	621	/** Voltage comparator clock. */
Kojto	113:f141b2784e32	622	cmuClock_VCMP = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	623	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	624	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	625	\| (_CMU_HFPERCLKEN0_VCMP_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	626	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	627	#endif
Kojto	113:f141b2784e32	628
Kojto	113:f141b2784e32	629	#if defined( CMU_HFPERCLKEN0_ADC0 )
Kojto	113:f141b2784e32	630	/** Analog to digital converter 0 clock. */
Kojto	113:f141b2784e32	631	cmuClock_ADC0 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	632	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	633	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	634	\| (_CMU_HFPERCLKEN0_ADC0_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	635	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	636	#endif
Kojto	98:8ab26030e058	637
Kojto	113:f141b2784e32	638	#if defined( CMU_HFPERCLKEN0_I2C0 )
Kojto	113:f141b2784e32	639	/** I2C 0 clock. */
Kojto	113:f141b2784e32	640	cmuClock_I2C0 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	641	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	642	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	643	\| (_CMU_HFPERCLKEN0_I2C0_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	644	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	645	#endif
Kojto	98:8ab26030e058	646
Kojto	113:f141b2784e32	647	#if defined( CMU_HFPERCLKEN0_I2C1 )
Kojto	113:f141b2784e32	648	/** I2C 1 clock. */
Kojto	113:f141b2784e32	649	cmuClock_I2C1 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	650	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	651	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	652	\| (_CMU_HFPERCLKEN0_I2C1_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	653	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	654	#endif
Kojto	98:8ab26030e058	655
Kojto	113:f141b2784e32	656	#if defined( CMU_HFPERCLKEN0_I2C2 )
Kojto	113:f141b2784e32	657	/** I2C 2 clock. */
Kojto	113:f141b2784e32	658	cmuClock_I2C2 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	659	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	660	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	661	\| (_CMU_HFPERCLKEN0_I2C2_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	662	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	663	#endif
Kojto	98:8ab26030e058	664
<>	128:9bcdf88f62b0	665	#if defined( CMU_HFPERCLKEN0_CSEN )
<>	128:9bcdf88f62b0	666	/** Capacitive Sense HF clock */
<>	128:9bcdf88f62b0	667	cmuClock_CSEN_HF = (CMU_NODIV_REG << CMU_DIV_REG_POS)
<>	128:9bcdf88f62b0	668	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
<>	128:9bcdf88f62b0	669	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
<>	128:9bcdf88f62b0	670	\| (_CMU_HFPERCLKEN0_CSEN_SHIFT << CMU_EN_BIT_POS)
<>	128:9bcdf88f62b0	671	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
<>	128:9bcdf88f62b0	672	#endif
<>	128:9bcdf88f62b0	673
<>	128:9bcdf88f62b0	674	#if defined( CMU_HFPERCLKEN0_TRNG0 )
<>	128:9bcdf88f62b0	675	/** True random number generator clock */
<>	128:9bcdf88f62b0	676	cmuClock_TRNG0 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
<>	128:9bcdf88f62b0	677	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
<>	128:9bcdf88f62b0	678	\| (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS)
<>	128:9bcdf88f62b0	679	\| (_CMU_HFPERCLKEN0_TRNG0_SHIFT << CMU_EN_BIT_POS)
<>	128:9bcdf88f62b0	680	\| (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS),
<>	128:9bcdf88f62b0	681	#endif
<>	128:9bcdf88f62b0	682
Kojto	98:8ab26030e058	683	/**********************/
Kojto	98:8ab26030e058	684	/* HF core sub-branch */
Kojto	98:8ab26030e058	685	/**********************/
Kojto	98:8ab26030e058	686
Kojto	98:8ab26030e058	687	/** Core clock */
Kojto	113:f141b2784e32	688	cmuClock_CORE = (CMU_HFCORECLKDIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	689	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	690	\| (CMU_NO_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	691	\| (0 << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	692	\| (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	693
Kojto	113:f141b2784e32	694	#if defined( CMU_HFCORECLKEN0_AES )
Kojto	98:8ab26030e058	695	/** Advanced encryption standard accelerator clock. */
Kojto	113:f141b2784e32	696	cmuClock_AES = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	697	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	698	\| (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	699	\| (_CMU_HFCORECLKEN0_AES_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	700	\| (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	701	#endif
Kojto	113:f141b2784e32	702
Kojto	113:f141b2784e32	703	#if defined( CMU_HFCORECLKEN0_DMA )
Kojto	113:f141b2784e32	704	/** Direct memory access controller clock. */
Kojto	113:f141b2784e32	705	cmuClock_DMA = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	706	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	707	\| (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	708	\| (_CMU_HFCORECLKEN0_DMA_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	709	\| (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	710	#endif
Kojto	98:8ab26030e058	711
Kojto	113:f141b2784e32	712	#if defined( CMU_HFCORECLKEN0_LE )
<>	128:9bcdf88f62b0	713	/** Low energy clock divided down from HFCORECLK. */
<>	128:9bcdf88f62b0	714	cmuClock_HFLE = (CMU_NODIV_REG << CMU_DIV_REG_POS)
<>	128:9bcdf88f62b0	715	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
<>	128:9bcdf88f62b0	716	\| (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS)
<>	128:9bcdf88f62b0	717	\| (_CMU_HFCORECLKEN0_LE_SHIFT << CMU_EN_BIT_POS)
<>	128:9bcdf88f62b0	718	\| (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	719	#endif
Kojto	98:8ab26030e058	720
Kojto	113:f141b2784e32	721	#if defined( CMU_HFCORECLKEN0_EBI )
Kojto	113:f141b2784e32	722	/** External bus interface clock. */
Kojto	113:f141b2784e32	723	cmuClock_EBI = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	724	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	725	\| (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	726	\| (_CMU_HFCORECLKEN0_EBI_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	727	\| (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	728	#endif
Kojto	113:f141b2784e32	729
Kojto	113:f141b2784e32	730	#if defined( CMU_HFCORECLKEN0_USBC )
Kojto	98:8ab26030e058	731	/** USB Core clock. */
Kojto	113:f141b2784e32	732	cmuClock_USBC = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	733	\| (CMU_USBCCLKSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	734	\| (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	735	\| (_CMU_HFCORECLKEN0_USBC_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	736	\| (CMU_USBC_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	737
Kojto	98:8ab26030e058	738	#endif
Kojto	98:8ab26030e058	739
Kojto	113:f141b2784e32	740	#if defined( CMU_HFCORECLKEN0_USB )
Kojto	98:8ab26030e058	741	/** USB clock. */
Kojto	113:f141b2784e32	742	cmuClock_USB = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	743	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	744	\| (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	745	\| (_CMU_HFCORECLKEN0_USB_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	746	\| (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	747	#endif
Kojto	113:f141b2784e32	748
Kojto	98:8ab26030e058	749	/***************/
Kojto	98:8ab26030e058	750	/* LF A branch */
Kojto	98:8ab26030e058	751	/***************/
Kojto	98:8ab26030e058	752
Kojto	98:8ab26030e058	753	/** Low frequency A clock */
Kojto	113:f141b2784e32	754	cmuClock_LFA = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	755	\| (CMU_LFACLKSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	756	\| (CMU_NO_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	757	\| (0 << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	758	\| (CMU_LFA_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	759
Kojto	113:f141b2784e32	760	#if defined( CMU_LFACLKEN0_RTC )
Kojto	98:8ab26030e058	761	/** Real time counter clock. */
Kojto	113:f141b2784e32	762	cmuClock_RTC = (CMU_LFAPRESC0_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	763	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	764	\| (CMU_LFACLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	765	\| (_CMU_LFACLKEN0_RTC_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	766	\| (CMU_RTC_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	767	#endif
Kojto	98:8ab26030e058	768
Kojto	113:f141b2784e32	769	#if defined( CMU_LFACLKEN0_LETIMER0 )
Kojto	98:8ab26030e058	770	/** Low energy timer 0 clock. */
Kojto	113:f141b2784e32	771	cmuClock_LETIMER0 = (CMU_LFAPRESC0_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	772	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	773	\| (CMU_LFACLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	774	\| (_CMU_LFACLKEN0_LETIMER0_SHIFT << CMU_EN_BIT_POS)
<>	128:9bcdf88f62b0	775	\| (CMU_LETIMER0_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	776	#endif
Kojto	98:8ab26030e058	777
Kojto	113:f141b2784e32	778	#if defined( CMU_LFACLKEN0_LCD )
Kojto	98:8ab26030e058	779	/** Liquid crystal display, pre FDIV clock. */
Kojto	113:f141b2784e32	780	cmuClock_LCDpre = (CMU_LFAPRESC0_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	781	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	782	\| (CMU_NO_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	783	\| (0 << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	784	\| (CMU_LCDPRE_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	785
Kojto	98:8ab26030e058	786	/** Liquid crystal display clock. Please notice that FDIV prescaler
Kojto	98:8ab26030e058	787	* must be set by special API. */
Kojto	113:f141b2784e32	788	cmuClock_LCD = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	789	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	790	\| (CMU_LFACLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	791	\| (_CMU_LFACLKEN0_LCD_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	792	\| (CMU_LCD_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	793	#endif
Kojto	98:8ab26030e058	794
Kojto	113:f141b2784e32	795	#if defined( CMU_PCNTCTRL_PCNT0CLKEN )
Kojto	98:8ab26030e058	796	/** Pulse counter 0 clock. */
Kojto	113:f141b2784e32	797	cmuClock_PCNT0 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	798	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	799	\| (CMU_PCNT_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	800	\| (_CMU_PCNTCTRL_PCNT0CLKEN_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	801	\| (CMU_LFA_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	802	#endif
Kojto	98:8ab26030e058	803
Kojto	113:f141b2784e32	804	#if defined( CMU_PCNTCTRL_PCNT1CLKEN )
Kojto	98:8ab26030e058	805	/** Pulse counter 1 clock. */
Kojto	113:f141b2784e32	806	cmuClock_PCNT1 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	807	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	808	\| (CMU_PCNT_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	809	\| (_CMU_PCNTCTRL_PCNT1CLKEN_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	810	\| (CMU_LFA_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	811	#endif
Kojto	98:8ab26030e058	812
Kojto	113:f141b2784e32	813	#if defined( CMU_PCNTCTRL_PCNT2CLKEN )
Kojto	98:8ab26030e058	814	/** Pulse counter 2 clock. */
Kojto	113:f141b2784e32	815	cmuClock_PCNT2 = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	816	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	817	\| (CMU_PCNT_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	818	\| (_CMU_PCNTCTRL_PCNT2CLKEN_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	819	\| (CMU_LFA_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	820	#endif
Kojto	113:f141b2784e32	821	#if defined( CMU_LFACLKEN0_LESENSE )
Kojto	98:8ab26030e058	822	/** LESENSE clock. */
Kojto	113:f141b2784e32	823	cmuClock_LESENSE = (CMU_LFAPRESC0_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	824	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	825	\| (CMU_LFACLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	826	\| (_CMU_LFACLKEN0_LESENSE_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	827	\| (CMU_LESENSE_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	828	#endif
Kojto	98:8ab26030e058	829
Kojto	98:8ab26030e058	830	/***************/
Kojto	98:8ab26030e058	831	/* LF B branch */
Kojto	98:8ab26030e058	832	/***************/
Kojto	98:8ab26030e058	833
Kojto	98:8ab26030e058	834	/** Low frequency B clock */
Kojto	113:f141b2784e32	835	cmuClock_LFB = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	836	\| (CMU_LFBCLKSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	837	\| (CMU_NO_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	838	\| (0 << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	839	\| (CMU_LFB_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	840
Kojto	113:f141b2784e32	841	#if defined( CMU_LFBCLKEN0_LEUART0 )
Kojto	98:8ab26030e058	842	/** Low energy universal asynchronous receiver/transmitter 0 clock. */
Kojto	113:f141b2784e32	843	cmuClock_LEUART0 = (CMU_LFBPRESC0_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	844	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	845	\| (CMU_LFBCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	846	\| (_CMU_LFBCLKEN0_LEUART0_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	847	\| (CMU_LEUART0_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	848	#endif
Kojto	98:8ab26030e058	849
<>	128:9bcdf88f62b0	850	#if defined( CMU_LFBCLKEN0_CSEN )
<>	128:9bcdf88f62b0	851	/** Capacitive Sense LF clock. */
<>	128:9bcdf88f62b0	852	cmuClock_CSEN_LF = (CMU_LFBPRESC0_REG << CMU_DIV_REG_POS)
<>	128:9bcdf88f62b0	853	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
<>	128:9bcdf88f62b0	854	\| (CMU_LFBCLKEN0_EN_REG << CMU_EN_REG_POS)
<>	128:9bcdf88f62b0	855	\| (_CMU_LFBCLKEN0_CSEN_SHIFT << CMU_EN_BIT_POS)
<>	128:9bcdf88f62b0	856	\| (CMU_LEUART0_CLK_BRANCH << CMU_CLK_BRANCH_POS),
<>	128:9bcdf88f62b0	857	#endif
<>	128:9bcdf88f62b0	858
Kojto	113:f141b2784e32	859	#if defined( CMU_LFBCLKEN0_LEUART1 )
Kojto	98:8ab26030e058	860	/** Low energy universal asynchronous receiver/transmitter 1 clock. */
Kojto	113:f141b2784e32	861	cmuClock_LEUART1 = (CMU_LFBPRESC0_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	862	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	863	\| (CMU_LFBCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	864	\| (_CMU_LFBCLKEN0_LEUART1_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	865	\| (CMU_LEUART1_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	98:8ab26030e058	866	#endif
Kojto	98:8ab26030e058	867
<>	128:9bcdf88f62b0	868	#if defined( CMU_LFBCLKEN0_SYSTICK )
<>	128:9bcdf88f62b0	869	/** Cortex SYSTICK LF clock. */
<>	128:9bcdf88f62b0	870	cmuClock_SYSTICK = (CMU_LFBPRESC0_REG << CMU_DIV_REG_POS)
<>	128:9bcdf88f62b0	871	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
<>	128:9bcdf88f62b0	872	\| (CMU_LFBCLKEN0_EN_REG << CMU_EN_REG_POS)
<>	128:9bcdf88f62b0	873	\| (_CMU_LFBCLKEN0_SYSTICK_SHIFT << CMU_EN_BIT_POS)
<>	128:9bcdf88f62b0	874	\| (CMU_LEUART0_CLK_BRANCH << CMU_CLK_BRANCH_POS),
<>	128:9bcdf88f62b0	875	#endif
<>	128:9bcdf88f62b0	876
Kojto	113:f141b2784e32	877	#if defined( _CMU_LFCCLKEN0_MASK )
Kojto	98:8ab26030e058	878	/***************/
Kojto	98:8ab26030e058	879	/* LF C branch */
Kojto	98:8ab26030e058	880	/***************/
Kojto	98:8ab26030e058	881
Kojto	98:8ab26030e058	882	/** Low frequency C clock */
Kojto	113:f141b2784e32	883	cmuClock_LFC = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	884	\| (CMU_LFCCLKSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	885	\| (CMU_NO_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	886	\| (0 << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	887	\| (CMU_LFC_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	888
Kojto	113:f141b2784e32	889	#if defined( CMU_LFCCLKEN0_USBLE )
Kojto	113:f141b2784e32	890	/** USB LE clock. */
Kojto	113:f141b2784e32	891	cmuClock_USBLE = (CMU_NODIV_REG << CMU_DIV_REG_POS)
Kojto	113:f141b2784e32	892	\| (CMU_LFCCLKSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	893	\| (CMU_LFCCLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	894	\| (_CMU_LFCCLKEN0_USBLE_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	895	\| (CMU_USBLE_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	896	#endif
Kojto	98:8ab26030e058	897	#endif
Kojto	98:8ab26030e058	898
Kojto	113:f141b2784e32	899	#if defined( _CMU_LFECLKEN0_MASK )
Kojto	113:f141b2784e32	900	/***************/
Kojto	113:f141b2784e32	901	/* LF E branch */
Kojto	113:f141b2784e32	902	/***************/
Kojto	113:f141b2784e32	903
Kojto	113:f141b2784e32	904	/** Low frequency A clock */
Kojto	113:f141b2784e32	905	cmuClock_LFE = (CMU_NOPRESC_REG << CMU_PRESC_REG_POS)
Kojto	113:f141b2784e32	906	\| (CMU_LFECLKSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	907	\| (CMU_NO_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	908	\| (0 << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	909	\| (CMU_LFE_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	910
Kojto	113:f141b2784e32	911	/** Real time counter and calendar clock. */
Kojto	113:f141b2784e32	912	#if defined ( CMU_LFECLKEN0_RTCC )
Kojto	113:f141b2784e32	913	cmuClock_RTCC = (CMU_LFEPRESC0_REG << CMU_PRESC_REG_POS)
Kojto	113:f141b2784e32	914	\| (CMU_NOSEL_REG << CMU_SEL_REG_POS)
Kojto	113:f141b2784e32	915	\| (CMU_LFECLKEN0_EN_REG << CMU_EN_REG_POS)
Kojto	113:f141b2784e32	916	\| (_CMU_LFECLKEN0_RTCC_SHIFT << CMU_EN_BIT_POS)
Kojto	113:f141b2784e32	917	\| (CMU_RTCC_CLK_BRANCH << CMU_CLK_BRANCH_POS),
Kojto	113:f141b2784e32	918	#endif
Kojto	98:8ab26030e058	919	#endif
Kojto	98:8ab26030e058	920
Kojto	98:8ab26030e058	921	} CMU_Clock_TypeDef;
Kojto	98:8ab26030e058	922
<>	128:9bcdf88f62b0	923	/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
<>	128:9bcdf88f62b0	924	/* Deprecated CMU_Clock_TypeDef member */
<>	128:9bcdf88f62b0	925	#define cmuClock_CORELE cmuClock_HFLE
<>	128:9bcdf88f62b0	926	/** @endcond */
<>	128:9bcdf88f62b0	927
Kojto	98:8ab26030e058	928
Kojto	98:8ab26030e058	929	/** Oscillator types. */
Kojto	98:8ab26030e058	930	typedef enum
Kojto	98:8ab26030e058	931	{
Kojto	98:8ab26030e058	932	cmuOsc_LFXO, /*< Low frequency crystal oscillator. /
Kojto	98:8ab26030e058	933	cmuOsc_LFRCO, /*< Low frequency RC oscillator. /
Kojto	98:8ab26030e058	934	cmuOsc_HFXO, /*< High frequency crystal oscillator. /
Kojto	98:8ab26030e058	935	cmuOsc_HFRCO, /*< High frequency RC oscillator. /
Kojto	98:8ab26030e058	936	cmuOsc_AUXHFRCO, /*< Auxiliary high frequency RC oscillator. /
Kojto	98:8ab26030e058	937	#if defined( _CMU_STATUS_USHFRCOENS_MASK )
Kojto	98:8ab26030e058	938	cmuOsc_USHFRCO, /*< USB high frequency RC oscillator /
Kojto	98:8ab26030e058	939	#endif
Kojto	113:f141b2784e32	940	#if defined( CMU_LFCLKSEL_LFAE_ULFRCO ) \|\| defined( CMU_LFACLKSEL_LFA_ULFRCO )
Kojto	98:8ab26030e058	941	cmuOsc_ULFRCO /*< Ultra low frequency RC oscillator. /
Kojto	98:8ab26030e058	942	#endif
Kojto	98:8ab26030e058	943	} CMU_Osc_TypeDef;
Kojto	98:8ab26030e058	944
<>	128:9bcdf88f62b0	945	/** Oscillator modes. */
<>	128:9bcdf88f62b0	946	typedef enum
<>	128:9bcdf88f62b0	947	{
<>	128:9bcdf88f62b0	948	cmuOscMode_Crystal, /*< Crystal oscillator. /
<>	128:9bcdf88f62b0	949	cmuOscMode_AcCoupled, /*< AC coupled buffer. /
<>	128:9bcdf88f62b0	950	cmuOscMode_External, /*< External digital clock. /
<>	128:9bcdf88f62b0	951	} CMU_OscMode_TypeDef;
Kojto	98:8ab26030e058	952
Kojto	98:8ab26030e058	953	/** Selectable clock sources. */
Kojto	98:8ab26030e058	954	typedef enum
Kojto	98:8ab26030e058	955	{
Kojto	98:8ab26030e058	956	cmuSelect_Error, /*< Usage error. /
Kojto	98:8ab26030e058	957	cmuSelect_Disabled, /*< Clock selector disabled. /
Kojto	98:8ab26030e058	958	cmuSelect_LFXO, /*< Low frequency crystal oscillator. /
Kojto	98:8ab26030e058	959	cmuSelect_LFRCO, /*< Low frequency RC oscillator. /
Kojto	98:8ab26030e058	960	cmuSelect_HFXO, /*< High frequency crystal oscillator. /
Kojto	98:8ab26030e058	961	cmuSelect_HFRCO, /*< High frequency RC oscillator. /
<>	128:9bcdf88f62b0	962	cmuSelect_HFCLKLE, /*< High frequency LE clock divided by 2 or 4. /
Kojto	98:8ab26030e058	963	cmuSelect_AUXHFRCO, /*< Auxilliary clock source can be used for debug clock /
<>	128:9bcdf88f62b0	964	cmuSelect_HFCLK, /**< Divided HFCLK on Giant for debug clock, undivided on
<>	128:9bcdf88f62b0	965	Tiny Gecko and for USBC (not used on Gecko) */
Kojto	113:f141b2784e32	966	#if defined( CMU_STATUS_USHFRCOENS )
Kojto	98:8ab26030e058	967	cmuSelect_USHFRCO, /*< USB high frequency RC oscillator /
Kojto	98:8ab26030e058	968	#endif
Kojto	113:f141b2784e32	969	#if defined( CMU_CMD_HFCLKSEL_USHFRCODIV2 )
Kojto	98:8ab26030e058	970	cmuSelect_USHFRCODIV2,/*< USB high frequency RC oscillator /
Kojto	98:8ab26030e058	971	#endif
Kojto	113:f141b2784e32	972	#if defined( CMU_LFCLKSEL_LFAE_ULFRCO ) \|\| defined( CMU_LFACLKSEL_LFA_ULFRCO )
Kojto	98:8ab26030e058	973	cmuSelect_ULFRCO, /*< Ultra low frequency RC oscillator. /
Kojto	98:8ab26030e058	974	#endif
Kojto	98:8ab26030e058	975	} CMU_Select_TypeDef;
Kojto	98:8ab26030e058	976
<>	128:9bcdf88f62b0	977	#if defined( CMU_HFCORECLKEN0_LE )
<>	128:9bcdf88f62b0	978	/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
<>	128:9bcdf88f62b0	979	/* Deprecated CMU_Select_TypeDef member */
<>	128:9bcdf88f62b0	980	#define cmuSelect_CORELEDIV2 cmuSelect_HFCLKLE
<>	128:9bcdf88f62b0	981	/** @endcond */
<>	128:9bcdf88f62b0	982	#endif
<>	128:9bcdf88f62b0	983
<>	128:9bcdf88f62b0	984	#if defined( _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK )
<>	128:9bcdf88f62b0	985	/** HFXO tuning modes */
<>	128:9bcdf88f62b0	986	typedef enum
<>	128:9bcdf88f62b0	987	{
<>	128:9bcdf88f62b0	988	cmuHFXOTuningMode_Auto = 0,
<>	128:9bcdf88f62b0	989	cmuHFXOTuningMode_ShuntCommand = CMU_CMD_HFXOSHUNTOPTSTART, /*< Run shunt current optimization only /
<>	128:9bcdf88f62b0	990	cmuHFXOTuningMode_PeakShuntCommand = CMU_CMD_HFXOPEAKDETSTART /*< Run peak and shunt current optimization /
<>	128:9bcdf88f62b0	991	\| CMU_CMD_HFXOSHUNTOPTSTART,
<>	128:9bcdf88f62b0	992	} CMU_HFXOTuningMode_TypeDef;
<>	128:9bcdf88f62b0	993	#endif
<>	128:9bcdf88f62b0	994
<>	128:9bcdf88f62b0	995	#if defined( _CMU_CTRL_LFXOBOOST_MASK )
<>	128:9bcdf88f62b0	996	/** LFXO Boost values. */
<>	128:9bcdf88f62b0	997	typedef enum
<>	128:9bcdf88f62b0	998	{
<>	128:9bcdf88f62b0	999	cmuLfxoBoost70 = 0x0,
<>	128:9bcdf88f62b0	1000	cmuLfxoBoost100 = 0x2,
<>	128:9bcdf88f62b0	1001	#if defined( _EMU_AUXCTRL_REDLFXOBOOST_MASK )
<>	128:9bcdf88f62b0	1002	cmuLfxoBoost70Reduced = 0x1,
<>	128:9bcdf88f62b0	1003	cmuLfxoBoost100Reduced = 0x3,
<>	128:9bcdf88f62b0	1004	#endif
<>	128:9bcdf88f62b0	1005	} CMU_LFXOBoost_TypeDef;
<>	128:9bcdf88f62b0	1006	#endif
Kojto	98:8ab26030e058	1007
Kojto	98:8ab26030e058	1008	/*******************************************************************************
Kojto	113:f141b2784e32	1009	***************************** STRUCTS *********************************
Kojto	113:f141b2784e32	1010	******************************************************************************/
Kojto	113:f141b2784e32	1011
Kojto	113:f141b2784e32	1012	/** LFXO initialization structure. Init values should be obtained from a configuration tool,
Kojto	113:f141b2784e32	1013	app note or xtal datasheet */
Kojto	113:f141b2784e32	1014	typedef struct
Kojto	113:f141b2784e32	1015	{
<>	128:9bcdf88f62b0	1016	#if defined( _CMU_LFXOCTRL_MASK )
Kojto	113:f141b2784e32	1017	uint8_t ctune; /*< CTUNE (load capacitance) value /
Kojto	113:f141b2784e32	1018	uint8_t gain; /*< Gain / max startup margin /
<>	128:9bcdf88f62b0	1019	#else
<>	128:9bcdf88f62b0	1020	CMU_LFXOBoost_TypeDef boost; /*< LFXO boost /
<>	128:9bcdf88f62b0	1021	#endif
Kojto	113:f141b2784e32	1022	uint8_t timeout; /*< Startup delay /
<>	128:9bcdf88f62b0	1023	CMU_OscMode_TypeDef mode; /*< Oscillator mode /
Kojto	113:f141b2784e32	1024	} CMU_LFXOInit_TypeDef;
Kojto	113:f141b2784e32	1025
<>	128:9bcdf88f62b0	1026	#if defined( _CMU_LFXOCTRL_MASK )
<>	128:9bcdf88f62b0	1027	/** Default LFXO initialization values for platform 2 devices which contain a
<>	128:9bcdf88f62b0	1028	* separate LFXOCTRL register. */
<>	128:9bcdf88f62b0	1029	#define CMU_LFXOINIT_DEFAULT \
<>	128:9bcdf88f62b0	1030	{ \
<>	128:9bcdf88f62b0	1031	_CMU_LFXOCTRL_TUNING_DEFAULT, /* Default CTUNE value, 0 */ \
<>	128:9bcdf88f62b0	1032	_CMU_LFXOCTRL_GAIN_DEFAULT, /* Default gain, 2 */ \
<>	128:9bcdf88f62b0	1033	_CMU_LFXOCTRL_TIMEOUT_DEFAULT, /* Default start-up delay, 32k cycles */ \
<>	128:9bcdf88f62b0	1034	cmuOscMode_Crystal, /* Crystal oscillator */ \
<>	128:9bcdf88f62b0	1035	}
<>	128:9bcdf88f62b0	1036	#define CMU_LFXOINIT_EXTERNAL_CLOCK \
<>	128:9bcdf88f62b0	1037	{ \
<>	128:9bcdf88f62b0	1038	0, /* No CTUNE value needed */ \
<>	128:9bcdf88f62b0	1039	0, /* No LFXO startup gain */ \
<>	128:9bcdf88f62b0	1040	_CMU_LFXOCTRL_TIMEOUT_2CYCLES, /* Minimal lfxo start-up delay, 2 cycles */ \
<>	128:9bcdf88f62b0	1041	cmuOscMode_External, /* External digital clock */ \
<>	128:9bcdf88f62b0	1042	}
<>	128:9bcdf88f62b0	1043	#else
<>	128:9bcdf88f62b0	1044	/** Default LFXO initialization values for platform 1 devices. */
<>	128:9bcdf88f62b0	1045	#define CMU_LFXOINIT_DEFAULT \
<>	128:9bcdf88f62b0	1046	{ \
<>	128:9bcdf88f62b0	1047	cmuLfxoBoost70, \
<>	128:9bcdf88f62b0	1048	_CMU_CTRL_LFXOTIMEOUT_DEFAULT, \
<>	128:9bcdf88f62b0	1049	cmuOscMode_Crystal, \
<>	128:9bcdf88f62b0	1050	}
<>	128:9bcdf88f62b0	1051	#define CMU_LFXOINIT_EXTERNAL_CLOCK \
<>	128:9bcdf88f62b0	1052	{ \
<>	128:9bcdf88f62b0	1053	cmuLfxoBoost70, \
<>	128:9bcdf88f62b0	1054	_CMU_CTRL_LFXOTIMEOUT_8CYCLES, \
<>	128:9bcdf88f62b0	1055	cmuOscMode_External, \
Kojto	113:f141b2784e32	1056	}
Kojto	113:f141b2784e32	1057	#endif
Kojto	113:f141b2784e32	1058
Kojto	113:f141b2784e32	1059	/** HFXO initialization structure. Init values should be obtained from a configuration tool,
Kojto	113:f141b2784e32	1060	app note or xtal datasheet */
Kojto	113:f141b2784e32	1061	typedef struct
Kojto	113:f141b2784e32	1062	{
<>	128:9bcdf88f62b0	1063	#if defined( _CMU_HFXOCTRL_MASK )
Kojto	113:f141b2784e32	1064	bool lowPowerMode; /*< Enable low-power mode /
<>	128:9bcdf88f62b0	1065	bool autoStartEm01; /*< @deprecated Use @ref CMU_HFXOAutostartEnable instead. /
<>	128:9bcdf88f62b0	1066	bool autoSelEm01; /*< @deprecated Use @ref CMU_HFXOAutostartEnable instead. /
<>	128:9bcdf88f62b0	1067	bool autoStartSelOnRacWakeup; /*< @deprecated Use @ref CMU_HFXOAutostartEnable instead. /
Kojto	113:f141b2784e32	1068	uint16_t ctuneStartup; /*< Startup phase CTUNE (load capacitance) value /
Kojto	113:f141b2784e32	1069	uint16_t ctuneSteadyState; /*< Steady-state phase CTUNE (load capacitance) value /
Kojto	113:f141b2784e32	1070	uint8_t regIshSteadyState; /*< Shunt steady-state current /
Kojto	113:f141b2784e32	1071	uint8_t xoCoreBiasTrimStartup; /*< Startup XO core bias current trim /
Kojto	113:f141b2784e32	1072	uint8_t xoCoreBiasTrimSteadyState; /*< Steady-state XO core bias current trim /
Kojto	113:f141b2784e32	1073	uint8_t thresholdPeakDetect; /*< Peak detection threshold /
Kojto	113:f141b2784e32	1074	uint8_t timeoutShuntOptimization; /*< Timeout - shunt optimization /
Kojto	113:f141b2784e32	1075	uint8_t timeoutPeakDetect; /*< Timeout - peak detection /
Kojto	113:f141b2784e32	1076	uint8_t timeoutSteady; /*< Timeout - steady-state /
Kojto	113:f141b2784e32	1077	uint8_t timeoutStartup; /*< Timeout - startup /
<>	128:9bcdf88f62b0	1078	#else
<>	128:9bcdf88f62b0	1079	uint8_t boost; /*< HFXO Boost, 0=50% 1=70%, 2=80%, 3=100% /
<>	128:9bcdf88f62b0	1080	uint8_t timeout; /*< Startup delay /
<>	128:9bcdf88f62b0	1081	bool glitchDetector; /*< Enable/disable glitch detector /
<>	128:9bcdf88f62b0	1082	#endif
<>	128:9bcdf88f62b0	1083	CMU_OscMode_TypeDef mode; /*< Oscillator mode /
Kojto	113:f141b2784e32	1084	} CMU_HFXOInit_TypeDef;
Kojto	113:f141b2784e32	1085
<>	128:9bcdf88f62b0	1086	#if defined( _CMU_HFXOCTRL_MASK )
<>	128:9bcdf88f62b0	1087	/**
<>	128:9bcdf88f62b0	1088	* Default HFXO initialization values for Platform 2 devices which contain a
<>	128:9bcdf88f62b0	1089	* separate HFXOCTRL register.
<>	128:9bcdf88f62b0	1090	*/
Kojto	113:f141b2784e32	1091	#if defined( _EFR_DEVICE )
Kojto	113:f141b2784e32	1092	#define CMU_HFXOINIT_DEFAULT \
Kojto	113:f141b2784e32	1093	{ \
Kojto	113:f141b2784e32	1094	false, /* Low-noise mode for EFR32 */ \
<>	128:9bcdf88f62b0	1095	false, /* @deprecated no longer in use */ \
<>	128:9bcdf88f62b0	1096	false, /* @deprecated no longer in use */ \
<>	128:9bcdf88f62b0	1097	false, /* @deprecated no longer in use */ \
Kojto	113:f141b2784e32	1098	_CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT, \
Kojto	113:f141b2784e32	1099	_CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT, \
Kojto	113:f141b2784e32	1100	_CMU_HFXOSTEADYSTATECTRL_REGISH_DEFAULT, \
<>	128:9bcdf88f62b0	1101	0x20, /* Matching errata fix in CHIP_Init() */ \
Kojto	113:f141b2784e32	1102	0x7, /* Recommended steady-state XO core bias current */ \
Kojto	113:f141b2784e32	1103	0x6, /* Recommended peak detection threshold */ \
Kojto	113:f141b2784e32	1104	_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_DEFAULT, \
Kojto	113:f141b2784e32	1105	0xA, /* Recommended peak detection timeout */ \
<>	128:9bcdf88f62b0	1106	0x4, /* Recommended steady timeout */ \
Kojto	113:f141b2784e32	1107	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT, \
<>	128:9bcdf88f62b0	1108	cmuOscMode_Crystal, \
Kojto	113:f141b2784e32	1109	}
<>	128:9bcdf88f62b0	1110	#else /* EFM32 device */
Kojto	113:f141b2784e32	1111	#define CMU_HFXOINIT_DEFAULT \
Kojto	113:f141b2784e32	1112	{ \
Kojto	113:f141b2784e32	1113	true, /* Low-power mode for EFM32 */ \
<>	128:9bcdf88f62b0	1114	false, /* @deprecated no longer in use */ \
<>	128:9bcdf88f62b0	1115	false, /* @deprecated no longer in use */ \
<>	128:9bcdf88f62b0	1116	false, /* @deprecated no longer in use */ \
Kojto	113:f141b2784e32	1117	_CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT, \
Kojto	113:f141b2784e32	1118	_CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT, \
Kojto	113:f141b2784e32	1119	_CMU_HFXOSTEADYSTATECTRL_REGISH_DEFAULT, \
<>	128:9bcdf88f62b0	1120	0x20, /* Matching errata fix in CHIP_Init() */ \
Kojto	113:f141b2784e32	1121	0x7, /* Recommended steady-state osc core bias current */ \
Kojto	113:f141b2784e32	1122	0x6, /* Recommended peak detection threshold */ \
Kojto	113:f141b2784e32	1123	_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_DEFAULT, \
Kojto	113:f141b2784e32	1124	0xA, /* Recommended peak detection timeout */ \
<>	128:9bcdf88f62b0	1125	0x4, /* Recommended steady timeout */ \
Kojto	113:f141b2784e32	1126	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT, \
<>	128:9bcdf88f62b0	1127	cmuOscMode_Crystal, \
Kojto	113:f141b2784e32	1128	}
<>	128:9bcdf88f62b0	1129	#endif /* _EFR_DEVICE */
<>	128:9bcdf88f62b0	1130	#define CMU_HFXOINIT_EXTERNAL_CLOCK \
<>	128:9bcdf88f62b0	1131	{ \
<>	128:9bcdf88f62b0	1132	true, /* Low-power mode */ \
<>	128:9bcdf88f62b0	1133	false, /* @deprecated no longer in use */ \
<>	128:9bcdf88f62b0	1134	false, /* @deprecated no longer in use */ \
<>	128:9bcdf88f62b0	1135	false, /* @deprecated no longer in use */ \
<>	128:9bcdf88f62b0	1136	0, /* Startup CTUNE=0 recommended for external clock */ \
<>	128:9bcdf88f62b0	1137	0, /* Steady CTUNE=0 recommended for external clock */ \
<>	128:9bcdf88f62b0	1138	_CMU_HFXOSTEADYSTATECTRL_REGISH_DEFAULT, \
<>	128:9bcdf88f62b0	1139	0, /* Startup IBTRIMXOCORE=0 recommended for external clock */ \
<>	128:9bcdf88f62b0	1140	0, /* Steady IBTRIMXOCORE=0 recommended for external clock */ \
<>	128:9bcdf88f62b0	1141	0x6, /* Recommended peak detection threshold */ \
<>	128:9bcdf88f62b0	1142	_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_DEFAULT, \
<>	128:9bcdf88f62b0	1143	0x0, /* Peak-detect not recommended for external clock usage */ \
<>	128:9bcdf88f62b0	1144	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2CYCLES, /* Minimal steady timeout */ \
<>	128:9bcdf88f62b0	1145	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2CYCLES, /* Minimal startup timeout */ \
<>	128:9bcdf88f62b0	1146	cmuOscMode_External, \
<>	128:9bcdf88f62b0	1147	}
<>	128:9bcdf88f62b0	1148	#else /* _CMU_HFXOCTRL_MASK */
<>	128:9bcdf88f62b0	1149	/**
<>	128:9bcdf88f62b0	1150	* Default HFXO initialization values for Platform 1 devices.
<>	128:9bcdf88f62b0	1151	*/
<>	128:9bcdf88f62b0	1152	#define CMU_HFXOINIT_DEFAULT \
<>	128:9bcdf88f62b0	1153	{ \
<>	128:9bcdf88f62b0	1154	_CMU_CTRL_HFXOBOOST_DEFAULT, /* 100% HFXO boost */ \
<>	128:9bcdf88f62b0	1155	_CMU_CTRL_HFXOTIMEOUT_DEFAULT, /* 16k startup delay */ \
<>	128:9bcdf88f62b0	1156	false, /* Disable glitch detector */ \
<>	128:9bcdf88f62b0	1157	cmuOscMode_Crystal, /* Crystal oscillator */ \
<>	128:9bcdf88f62b0	1158	}
<>	128:9bcdf88f62b0	1159	#define CMU_HFXOINIT_EXTERNAL_CLOCK \
<>	128:9bcdf88f62b0	1160	{ \
<>	128:9bcdf88f62b0	1161	0, /* Minimal HFXO boost, 50% */ \
<>	128:9bcdf88f62b0	1162	_CMU_CTRL_HFXOTIMEOUT_8CYCLES, /* Minimal startup delay, 8 cycles */ \
<>	128:9bcdf88f62b0	1163	false, /* Disable glitch detector */ \
<>	128:9bcdf88f62b0	1164	cmuOscMode_External, /* External digital clock */ \
<>	128:9bcdf88f62b0	1165	}
Kojto	113:f141b2784e32	1166	#endif /* _CMU_HFXOCTRL_MASK */
Kojto	113:f141b2784e32	1167
Kojto	113:f141b2784e32	1168
Kojto	113:f141b2784e32	1169	/*******************************************************************************
Kojto	98:8ab26030e058	1170	*************************** PROTOTYPES ********************************
Kojto	98:8ab26030e058	1171	******************************************************************************/
Kojto	98:8ab26030e058	1172
Kojto	113:f141b2784e32	1173	#if defined( _CMU_AUXHFRCOCTRL_BAND_MASK )
Kojto	113:f141b2784e32	1174	CMU_AUXHFRCOBand_TypeDef CMU_AUXHFRCOBandGet(void);
Kojto	113:f141b2784e32	1175	void CMU_AUXHFRCOBandSet(CMU_AUXHFRCOBand_TypeDef band);
Kojto	113:f141b2784e32	1176
Kojto	113:f141b2784e32	1177	#elif defined( _CMU_AUXHFRCOCTRL_FREQRANGE_MASK )
<>	128:9bcdf88f62b0	1178	CMU_AUXHFRCOFreq_TypeDef CMU_AUXHFRCOBandGet(void);
<>	128:9bcdf88f62b0	1179	void CMU_AUXHFRCOBandSet(CMU_AUXHFRCOFreq_TypeDef setFreq);
Kojto	113:f141b2784e32	1180	#endif
Kojto	113:f141b2784e32	1181
Kojto	113:f141b2784e32	1182	uint32_t CMU_Calibrate(uint32_t HFCycles, CMU_Osc_TypeDef reference);
Kojto	98:8ab26030e058	1183
Kojto	113:f141b2784e32	1184	#if defined( _CMU_CALCTRL_UPSEL_MASK ) && defined( _CMU_CALCTRL_DOWNSEL_MASK )
Kojto	113:f141b2784e32	1185	void CMU_CalibrateConfig(uint32_t downCycles, CMU_Osc_TypeDef downSel,
Kojto	113:f141b2784e32	1186	CMU_Osc_TypeDef upSel);
Kojto	113:f141b2784e32	1187	#endif
Kojto	98:8ab26030e058	1188
Kojto	113:f141b2784e32	1189	uint32_t CMU_CalibrateCountGet(void);
Kojto	113:f141b2784e32	1190	void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable);
Kojto	113:f141b2784e32	1191	CMU_ClkDiv_TypeDef CMU_ClockDivGet(CMU_Clock_TypeDef clock);
Kojto	113:f141b2784e32	1192	void CMU_ClockDivSet(CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div);
Kojto	113:f141b2784e32	1193	uint32_t CMU_ClockFreqGet(CMU_Clock_TypeDef clock);
Kojto	113:f141b2784e32	1194
Kojto	113:f141b2784e32	1195	#if defined( _SILICON_LABS_32B_PLATFORM_2 )
Kojto	113:f141b2784e32	1196	void CMU_ClockPrescSet(CMU_Clock_TypeDef clock, uint32_t presc);
Kojto	113:f141b2784e32	1197	uint32_t CMU_ClockPrescGet(CMU_Clock_TypeDef clock);
Kojto	98:8ab26030e058	1198	#endif
Kojto	98:8ab26030e058	1199
Kojto	113:f141b2784e32	1200	void CMU_ClockSelectSet(CMU_Clock_TypeDef clock, CMU_Select_TypeDef ref);
Kojto	113:f141b2784e32	1201	CMU_Select_TypeDef CMU_ClockSelectGet(CMU_Clock_TypeDef clock);
Kojto	113:f141b2784e32	1202	void CMU_FreezeEnable(bool enable);
Kojto	113:f141b2784e32	1203
Kojto	113:f141b2784e32	1204	#if defined( _CMU_HFRCOCTRL_BAND_MASK )
Kojto	113:f141b2784e32	1205	CMU_HFRCOBand_TypeDef CMU_HFRCOBandGet(void);
Kojto	113:f141b2784e32	1206	void CMU_HFRCOBandSet(CMU_HFRCOBand_TypeDef band);
Kojto	113:f141b2784e32	1207
Kojto	113:f141b2784e32	1208	#elif defined( _CMU_HFRCOCTRL_FREQRANGE_MASK )
<>	128:9bcdf88f62b0	1209	CMU_HFRCOFreq_TypeDef CMU_HFRCOBandGet(void);
<>	128:9bcdf88f62b0	1210	void CMU_HFRCOBandSet(CMU_HFRCOFreq_TypeDef setFreq);
Kojto	113:f141b2784e32	1211	#endif
Kojto	113:f141b2784e32	1212
Kojto	113:f141b2784e32	1213	uint32_t CMU_HFRCOStartupDelayGet(void);
Kojto	113:f141b2784e32	1214	void CMU_HFRCOStartupDelaySet(uint32_t delay);
Kojto	113:f141b2784e32	1215
<>	128:9bcdf88f62b0	1216	#if defined( _CMU_HFXOCTRL_AUTOSTARTEM0EM1_MASK )
<>	128:9bcdf88f62b0	1217	void CMU_HFXOAutostartEnable(uint32_t userSel,
Kojto	113:f141b2784e32	1218	bool enEM0EM1Start,
Kojto	113:f141b2784e32	1219	bool enEM0EM1StartSel);
Kojto	113:f141b2784e32	1220	#endif
Kojto	113:f141b2784e32	1221
<>	128:9bcdf88f62b0	1222	void CMU_HFXOInit(const CMU_HFXOInit_TypeDef *hfxoInit);
Kojto	113:f141b2784e32	1223
Kojto	113:f141b2784e32	1224
Kojto	113:f141b2784e32	1225	uint32_t CMU_LCDClkFDIVGet(void);
Kojto	113:f141b2784e32	1226	void CMU_LCDClkFDIVSet(uint32_t div);
<>	128:9bcdf88f62b0	1227	void CMU_LFXOInit(const CMU_LFXOInit_TypeDef *lfxoInit);
Kojto	98:8ab26030e058	1228
Kojto	113:f141b2784e32	1229	void CMU_OscillatorEnable(CMU_Osc_TypeDef osc, bool enable, bool wait);
Kojto	113:f141b2784e32	1230	uint32_t CMU_OscillatorTuningGet(CMU_Osc_TypeDef osc);
Kojto	113:f141b2784e32	1231	void CMU_OscillatorTuningSet(CMU_Osc_TypeDef osc, uint32_t val);
<>	128:9bcdf88f62b0	1232
<>	128:9bcdf88f62b0	1233	#if defined( _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK )
<>	128:9bcdf88f62b0	1234	bool CMU_OscillatorTuningWait(CMU_Osc_TypeDef osc, CMU_HFXOTuningMode_TypeDef mode);
<>	128:9bcdf88f62b0	1235	bool CMU_OscillatorTuningOptimize(CMU_Osc_TypeDef osc,
<>	128:9bcdf88f62b0	1236	CMU_HFXOTuningMode_TypeDef mode,
<>	128:9bcdf88f62b0	1237	bool wait);
<>	128:9bcdf88f62b0	1238	#endif
<>	128:9bcdf88f62b0	1239
Kojto	113:f141b2784e32	1240	bool CMU_PCNTClockExternalGet(unsigned int instance);
Kojto	113:f141b2784e32	1241	void CMU_PCNTClockExternalSet(unsigned int instance, bool external);
Kojto	113:f141b2784e32	1242
Kojto	113:f141b2784e32	1243	#if defined( _CMU_USHFRCOCONF_BAND_MASK )
Kojto	113:f141b2784e32	1244	CMU_USHFRCOBand_TypeDef CMU_USHFRCOBandGet(void);
Kojto	113:f141b2784e32	1245	void CMU_USHFRCOBandSet(CMU_USHFRCOBand_TypeDef band);
Kojto	113:f141b2784e32	1246	#endif
Kojto	113:f141b2784e32	1247
Kojto	98:8ab26030e058	1248
Kojto	113:f141b2784e32	1249	#if defined( CMU_CALCTRL_CONT )
Kojto	113:f141b2784e32	1250	/*************************************************************************//
Kojto	113:f141b2784e32	1251	* @brief
Kojto	113:f141b2784e32	1252	* Configures continuous calibration mode
Kojto	113:f141b2784e32	1253	* @param[in] enable
Kojto	113:f141b2784e32	1254	* If true, enables continuous calibration, if false disables continuous
Kojto	113:f141b2784e32	1255	* calibrartion
Kojto	113:f141b2784e32	1256	******************************************************************************/
Kojto	113:f141b2784e32	1257	__STATIC_INLINE void CMU_CalibrateCont(bool enable)
Kojto	113:f141b2784e32	1258	{
Kojto	113:f141b2784e32	1259	BUS_RegBitWrite(&(CMU->CALCTRL), _CMU_CALCTRL_CONT_SHIFT, enable);
Kojto	113:f141b2784e32	1260	}
Kojto	113:f141b2784e32	1261	#endif
Kojto	98:8ab26030e058	1262
Kojto	98:8ab26030e058	1263
Kojto	113:f141b2784e32	1264	/*************************************************************************//
Kojto	113:f141b2784e32	1265	* @brief
Kojto	113:f141b2784e32	1266	* Starts calibration
Kojto	113:f141b2784e32	1267	* @note
Kojto	113:f141b2784e32	1268	* This call is usually invoked after CMU_CalibrateConfig() and possibly
Kojto	113:f141b2784e32	1269	* CMU_CalibrateCont()
Kojto	113:f141b2784e32	1270	******************************************************************************/
Kojto	113:f141b2784e32	1271	__STATIC_INLINE void CMU_CalibrateStart(void)
Kojto	113:f141b2784e32	1272	{
Kojto	113:f141b2784e32	1273	CMU->CMD = CMU_CMD_CALSTART;
Kojto	113:f141b2784e32	1274	}
Kojto	113:f141b2784e32	1275
Kojto	113:f141b2784e32	1276
Kojto	113:f141b2784e32	1277	#if defined( CMU_CMD_CALSTOP )
Kojto	113:f141b2784e32	1278	/*************************************************************************//
Kojto	113:f141b2784e32	1279	* @brief
Kojto	113:f141b2784e32	1280	* Stop the calibration counters
Kojto	113:f141b2784e32	1281	******************************************************************************/
Kojto	113:f141b2784e32	1282	__STATIC_INLINE void CMU_CalibrateStop(void)
Kojto	113:f141b2784e32	1283	{
Kojto	113:f141b2784e32	1284	CMU->CMD = CMU_CMD_CALSTOP;
Kojto	113:f141b2784e32	1285	}
Kojto	113:f141b2784e32	1286	#endif
Kojto	113:f141b2784e32	1287
Kojto	98:8ab26030e058	1288
Kojto	113:f141b2784e32	1289	/*************************************************************************//
Kojto	113:f141b2784e32	1290	* @brief
Kojto	113:f141b2784e32	1291	* Convert dividend to logarithmic value. Only works for even
Kojto	113:f141b2784e32	1292	* numbers equal to 2^n.
Kojto	113:f141b2784e32	1293	*
Kojto	113:f141b2784e32	1294	* @param[in] div
Kojto	113:f141b2784e32	1295	* Unscaled dividend.
Kojto	113:f141b2784e32	1296	*
Kojto	113:f141b2784e32	1297	* @return
Kojto	113:f141b2784e32	1298	* Logarithm of 2, as used by fixed prescalers.
Kojto	113:f141b2784e32	1299	******************************************************************************/
Kojto	113:f141b2784e32	1300	__STATIC_INLINE uint32_t CMU_DivToLog2(CMU_ClkDiv_TypeDef div)
Kojto	113:f141b2784e32	1301	{
Kojto	113:f141b2784e32	1302	uint32_t log2;
Kojto	98:8ab26030e058	1303
Kojto	113:f141b2784e32	1304	/* Fixed 2^n prescalers take argument of 32768 or less. */
Kojto	113:f141b2784e32	1305	EFM_ASSERT((div > 0U) && (div <= 32768U));
Kojto	113:f141b2784e32	1306
Kojto	113:f141b2784e32	1307	/* Count leading zeroes and "reverse" result */
Kojto	113:f141b2784e32	1308	log2 = (31U - __CLZ(div));
Kojto	113:f141b2784e32	1309
Kojto	113:f141b2784e32	1310	return log2;
Kojto	113:f141b2784e32	1311	}
Kojto	113:f141b2784e32	1312
Kojto	98:8ab26030e058	1313
Kojto	98:8ab26030e058	1314	/*************************************************************************//
Kojto	98:8ab26030e058	1315	* @brief
Kojto	98:8ab26030e058	1316	* Clear one or more pending CMU interrupts.
Kojto	98:8ab26030e058	1317	*
Kojto	98:8ab26030e058	1318	* @param[in] flags
Kojto	98:8ab26030e058	1319	* CMU interrupt sources to clear.
Kojto	98:8ab26030e058	1320	******************************************************************************/
Kojto	98:8ab26030e058	1321	__STATIC_INLINE void CMU_IntClear(uint32_t flags)
Kojto	98:8ab26030e058	1322	{
Kojto	98:8ab26030e058	1323	CMU->IFC = flags;
Kojto	98:8ab26030e058	1324	}
Kojto	98:8ab26030e058	1325
Kojto	98:8ab26030e058	1326
Kojto	98:8ab26030e058	1327	/*************************************************************************//
Kojto	98:8ab26030e058	1328	* @brief
Kojto	98:8ab26030e058	1329	* Disable one or more CMU interrupts.
Kojto	98:8ab26030e058	1330	*
Kojto	98:8ab26030e058	1331	* @param[in] flags
Kojto	98:8ab26030e058	1332	* CMU interrupt sources to disable.
Kojto	98:8ab26030e058	1333	******************************************************************************/
Kojto	98:8ab26030e058	1334	__STATIC_INLINE void CMU_IntDisable(uint32_t flags)
Kojto	98:8ab26030e058	1335	{
Kojto	98:8ab26030e058	1336	CMU->IEN &= ~flags;
Kojto	98:8ab26030e058	1337	}
Kojto	98:8ab26030e058	1338
Kojto	98:8ab26030e058	1339
Kojto	98:8ab26030e058	1340	/*************************************************************************//
Kojto	98:8ab26030e058	1341	* @brief
Kojto	98:8ab26030e058	1342	* Enable one or more CMU interrupts.
Kojto	98:8ab26030e058	1343	*
Kojto	98:8ab26030e058	1344	* @note
Kojto	98:8ab26030e058	1345	* Depending on the use, a pending interrupt may already be set prior to
Kojto	98:8ab26030e058	1346	* enabling the interrupt. Consider using CMU_IntClear() prior to enabling
Kojto	98:8ab26030e058	1347	* if such a pending interrupt should be ignored.
Kojto	98:8ab26030e058	1348	*
Kojto	98:8ab26030e058	1349	* @param[in] flags
Kojto	98:8ab26030e058	1350	* CMU interrupt sources to enable.
Kojto	98:8ab26030e058	1351	******************************************************************************/
Kojto	98:8ab26030e058	1352	__STATIC_INLINE void CMU_IntEnable(uint32_t flags)
Kojto	98:8ab26030e058	1353	{
Kojto	98:8ab26030e058	1354	CMU->IEN \|= flags;
Kojto	98:8ab26030e058	1355	}
Kojto	98:8ab26030e058	1356
Kojto	98:8ab26030e058	1357
Kojto	98:8ab26030e058	1358	/*************************************************************************//
Kojto	98:8ab26030e058	1359	* @brief
Kojto	98:8ab26030e058	1360	* Get pending CMU interrupts.
Kojto	98:8ab26030e058	1361	*
Kojto	98:8ab26030e058	1362	* @return
Kojto	98:8ab26030e058	1363	* CMU interrupt sources pending.
Kojto	98:8ab26030e058	1364	******************************************************************************/
Kojto	98:8ab26030e058	1365	__STATIC_INLINE uint32_t CMU_IntGet(void)
Kojto	98:8ab26030e058	1366	{
Kojto	98:8ab26030e058	1367	return CMU->IF;
Kojto	98:8ab26030e058	1368	}
Kojto	98:8ab26030e058	1369
Kojto	98:8ab26030e058	1370
Kojto	98:8ab26030e058	1371	/*************************************************************************//
Kojto	98:8ab26030e058	1372	* @brief
Kojto	98:8ab26030e058	1373	* Get enabled and pending CMU interrupt flags.
Kojto	98:8ab26030e058	1374	*
Kojto	98:8ab26030e058	1375	* @details
Kojto	98:8ab26030e058	1376	* Useful for handling more interrupt sources in the same interrupt handler.
Kojto	98:8ab26030e058	1377	*
Kojto	98:8ab26030e058	1378	* @note
Kojto	98:8ab26030e058	1379	* The event bits are not cleared by the use of this function.
Kojto	98:8ab26030e058	1380	*
Kojto	98:8ab26030e058	1381	* @return
Kojto	113:f141b2784e32	1382	* Pending and enabled CMU interrupt sources
Kojto	113:f141b2784e32	1383	* The return value is the bitwise AND of
Kojto	113:f141b2784e32	1384	* - the enabled interrupt sources in CMU_IEN and
Kojto	113:f141b2784e32	1385	* - the pending interrupt flags CMU_IF
Kojto	98:8ab26030e058	1386	******************************************************************************/
Kojto	98:8ab26030e058	1387	__STATIC_INLINE uint32_t CMU_IntGetEnabled(void)
Kojto	98:8ab26030e058	1388	{
Kojto	113:f141b2784e32	1389	uint32_t ien;
Kojto	98:8ab26030e058	1390
Kojto	113:f141b2784e32	1391	ien = CMU->IEN;
Kojto	113:f141b2784e32	1392	return CMU->IF & ien;
Kojto	98:8ab26030e058	1393	}
Kojto	98:8ab26030e058	1394
Kojto	98:8ab26030e058	1395
Kojto	98:8ab26030e058	1396	/************************************************************************//
Kojto	98:8ab26030e058	1397	* @brief
Kojto	113:f141b2784e32	1398	* Set one or more pending CMU interrupts.
Kojto	98:8ab26030e058	1399	*
Kojto	98:8ab26030e058	1400	* @param[in] flags
Kojto	98:8ab26030e058	1401	* CMU interrupt sources to set to pending.
Kojto	98:8ab26030e058	1402	*****************************************************************************/
Kojto	98:8ab26030e058	1403	__STATIC_INLINE void CMU_IntSet(uint32_t flags)
Kojto	98:8ab26030e058	1404	{
Kojto	98:8ab26030e058	1405	CMU->IFS = flags;
Kojto	98:8ab26030e058	1406	}
Kojto	98:8ab26030e058	1407
Kojto	98:8ab26030e058	1408
Kojto	98:8ab26030e058	1409	/*************************************************************************//
Kojto	98:8ab26030e058	1410	* @brief
Kojto	98:8ab26030e058	1411	* Lock the CMU in order to protect some of its registers against unintended
Kojto	98:8ab26030e058	1412	* modification.
Kojto	98:8ab26030e058	1413	*
Kojto	98:8ab26030e058	1414	* @details
Kojto	98:8ab26030e058	1415	* Please refer to the reference manual for CMU registers that will be
Kojto	98:8ab26030e058	1416	* locked.
Kojto	98:8ab26030e058	1417	*
Kojto	98:8ab26030e058	1418	* @note
Kojto	98:8ab26030e058	1419	* If locking the CMU registers, they must be unlocked prior to using any
Kojto	98:8ab26030e058	1420	* CMU API functions modifying CMU registers protected by the lock.
Kojto	98:8ab26030e058	1421	******************************************************************************/
Kojto	98:8ab26030e058	1422	__STATIC_INLINE void CMU_Lock(void)
Kojto	98:8ab26030e058	1423	{
Kojto	98:8ab26030e058	1424	CMU->LOCK = CMU_LOCK_LOCKKEY_LOCK;
Kojto	98:8ab26030e058	1425	}
Kojto	98:8ab26030e058	1426
Kojto	98:8ab26030e058	1427
Kojto	98:8ab26030e058	1428	/*************************************************************************//
Kojto	98:8ab26030e058	1429	* @brief
Kojto	113:f141b2784e32	1430	* Convert logarithm of 2 prescaler to division factor.
Kojto	113:f141b2784e32	1431	*
Kojto	113:f141b2784e32	1432	* @param[in] log2
Kojto	113:f141b2784e32	1433	* Logarithm of 2, as used by fixed prescalers.
Kojto	113:f141b2784e32	1434	*
Kojto	113:f141b2784e32	1435	* @return
Kojto	113:f141b2784e32	1436	* Dividend.
Kojto	113:f141b2784e32	1437	******************************************************************************/
Kojto	113:f141b2784e32	1438	__STATIC_INLINE uint32_t CMU_Log2ToDiv(uint32_t log2)
Kojto	113:f141b2784e32	1439	{
Kojto	113:f141b2784e32	1440	return 1 << log2;
Kojto	113:f141b2784e32	1441	}
Kojto	113:f141b2784e32	1442
Kojto	113:f141b2784e32	1443
Kojto	113:f141b2784e32	1444	#if defined( _SILICON_LABS_32B_PLATFORM_2 )
Kojto	113:f141b2784e32	1445	/*************************************************************************//
Kojto	113:f141b2784e32	1446	* @brief
Kojto	113:f141b2784e32	1447	* Convert prescaler dividend to logarithmic value. Only works for even
Kojto	113:f141b2784e32	1448	* numbers equal to 2^n.
Kojto	113:f141b2784e32	1449	*
Kojto	113:f141b2784e32	1450	* @param[in] presc
Kojto	113:f141b2784e32	1451	* Unscaled dividend (dividend = presc + 1).
Kojto	113:f141b2784e32	1452	*
Kojto	113:f141b2784e32	1453	* @return
Kojto	113:f141b2784e32	1454	* Logarithm of 2, as used by fixed 2^n prescalers.
Kojto	113:f141b2784e32	1455	******************************************************************************/
Kojto	113:f141b2784e32	1456	__STATIC_INLINE uint32_t CMU_PrescToLog2(CMU_ClkPresc_TypeDef presc)
Kojto	113:f141b2784e32	1457	{
Kojto	113:f141b2784e32	1458	uint32_t log2;
Kojto	113:f141b2784e32	1459
Kojto	113:f141b2784e32	1460	/* Integer prescalers take argument less than 32768. */
Kojto	113:f141b2784e32	1461	EFM_ASSERT(presc < 32768U);
Kojto	113:f141b2784e32	1462
Kojto	113:f141b2784e32	1463	/* Count leading zeroes and "reverse" result */
Kojto	113:f141b2784e32	1464	log2 = (31U - __CLZ(presc + 1));
Kojto	113:f141b2784e32	1465
Kojto	113:f141b2784e32	1466	/* Check that presc is a 2^n number */
Kojto	113:f141b2784e32	1467	EFM_ASSERT(presc == (CMU_Log2ToDiv(log2) - 1));
Kojto	113:f141b2784e32	1468
Kojto	113:f141b2784e32	1469	return log2;
Kojto	113:f141b2784e32	1470	}
Kojto	113:f141b2784e32	1471	#endif
Kojto	113:f141b2784e32	1472
Kojto	113:f141b2784e32	1473
Kojto	113:f141b2784e32	1474	/*************************************************************************//
Kojto	113:f141b2784e32	1475	* @brief
Kojto	98:8ab26030e058	1476	* Unlock the CMU so that writing to locked registers again is possible.
Kojto	98:8ab26030e058	1477	******************************************************************************/
Kojto	98:8ab26030e058	1478	__STATIC_INLINE void CMU_Unlock(void)
Kojto	98:8ab26030e058	1479	{
Kojto	98:8ab26030e058	1480	CMU->LOCK = CMU_LOCK_LOCKKEY_UNLOCK;
Kojto	98:8ab26030e058	1481	}
Kojto	98:8ab26030e058	1482
<>	128:9bcdf88f62b0	1483
<>	128:9bcdf88f62b0	1484	#if defined( _CMU_HFRCOCTRL_FREQRANGE_MASK )
<>	128:9bcdf88f62b0	1485	/*************************************************************************//
<>	128:9bcdf88f62b0	1486	* @brief
<>	128:9bcdf88f62b0	1487	* Get current HFRCO frequency.
<>	128:9bcdf88f62b0	1488	*
<>	128:9bcdf88f62b0	1489	* @deprecated
<>	128:9bcdf88f62b0	1490	* Deprecated function. New code should use @ref CMU_HFRCOBandGet().
<>	128:9bcdf88f62b0	1491	*
<>	128:9bcdf88f62b0	1492	* @return
<>	128:9bcdf88f62b0	1493	* HFRCO frequency
<>	128:9bcdf88f62b0	1494	******************************************************************************/
<>	128:9bcdf88f62b0	1495	__STATIC_INLINE CMU_HFRCOFreq_TypeDef CMU_HFRCOFreqGet(void)
<>	128:9bcdf88f62b0	1496	{
<>	128:9bcdf88f62b0	1497	return CMU_HFRCOBandGet();
<>	128:9bcdf88f62b0	1498	}
<>	128:9bcdf88f62b0	1499
<>	128:9bcdf88f62b0	1500
<>	128:9bcdf88f62b0	1501	/*************************************************************************//
<>	128:9bcdf88f62b0	1502	* @brief
<>	128:9bcdf88f62b0	1503	* Set HFRCO calibration for the selected target frequency
<>	128:9bcdf88f62b0	1504	*
<>	128:9bcdf88f62b0	1505	* @deprecated
<>	128:9bcdf88f62b0	1506	* Deprecated function. New code should use @ref CMU_HFRCOBandSet().
<>	128:9bcdf88f62b0	1507	*
<>	128:9bcdf88f62b0	1508	* @param[in] setFreq
<>	128:9bcdf88f62b0	1509	* HFRCO frequency to set
<>	128:9bcdf88f62b0	1510	******************************************************************************/
<>	128:9bcdf88f62b0	1511	__STATIC_INLINE void CMU_HFRCOFreqSet(CMU_HFRCOFreq_TypeDef setFreq)
<>	128:9bcdf88f62b0	1512	{
<>	128:9bcdf88f62b0	1513	CMU_HFRCOBandSet(setFreq);
<>	128:9bcdf88f62b0	1514	}
<>	128:9bcdf88f62b0	1515	#endif
<>	128:9bcdf88f62b0	1516
<>	128:9bcdf88f62b0	1517
<>	128:9bcdf88f62b0	1518	#if defined( _CMU_AUXHFRCOCTRL_FREQRANGE_MASK )
<>	128:9bcdf88f62b0	1519	/*************************************************************************//
<>	128:9bcdf88f62b0	1520	* @brief
<>	128:9bcdf88f62b0	1521	* Get current AUXHFRCO frequency.
<>	128:9bcdf88f62b0	1522	*
<>	128:9bcdf88f62b0	1523	* @deprecated
<>	128:9bcdf88f62b0	1524	* Deprecated function. New code should use @ref CMU_AUXHFRCOBandGet().
<>	128:9bcdf88f62b0	1525	*
<>	128:9bcdf88f62b0	1526	* @return
<>	128:9bcdf88f62b0	1527	* AUXHFRCO frequency
<>	128:9bcdf88f62b0	1528	******************************************************************************/
<>	128:9bcdf88f62b0	1529	__STATIC_INLINE CMU_AUXHFRCOFreq_TypeDef CMU_AUXHFRCOFreqGet(void)
<>	128:9bcdf88f62b0	1530	{
<>	128:9bcdf88f62b0	1531	return CMU_AUXHFRCOBandGet();
<>	128:9bcdf88f62b0	1532	}
<>	128:9bcdf88f62b0	1533
<>	128:9bcdf88f62b0	1534
<>	128:9bcdf88f62b0	1535	/*************************************************************************//
<>	128:9bcdf88f62b0	1536	* @brief
<>	128:9bcdf88f62b0	1537	* Set AUXHFRCO calibration for the selected target frequency
<>	128:9bcdf88f62b0	1538	*
<>	128:9bcdf88f62b0	1539	* @deprecated
<>	128:9bcdf88f62b0	1540	* Deprecated function. New code should use @ref CMU_AUXHFRCOBandSet().
<>	128:9bcdf88f62b0	1541	*
<>	128:9bcdf88f62b0	1542	* @param[in] setFreq
<>	128:9bcdf88f62b0	1543	* AUXHFRCO frequency to set
<>	128:9bcdf88f62b0	1544	******************************************************************************/
<>	128:9bcdf88f62b0	1545	__STATIC_INLINE void CMU_AUXHFRCOFreqSet(CMU_AUXHFRCOFreq_TypeDef setFreq)
<>	128:9bcdf88f62b0	1546	{
<>	128:9bcdf88f62b0	1547	CMU_AUXHFRCOBandSet(setFreq);
<>	128:9bcdf88f62b0	1548	}
<>	128:9bcdf88f62b0	1549	#endif
<>	128:9bcdf88f62b0	1550
Kojto	98:8ab26030e058	1551	/** @} (end addtogroup CMU) */
<>	128:9bcdf88f62b0	1552	/** @} (end addtogroup emlib) */
Kojto	98:8ab26030e058	1553
Kojto	98:8ab26030e058	1554	#ifdef __cplusplus
Kojto	98:8ab26030e058	1555	}
Kojto	98:8ab26030e058	1556	#endif
Kojto	98:8ab26030e058	1557
Kojto	98:8ab26030e058	1558	#endif /* defined( CMU_PRESENT ) */
<>	128:9bcdf88f62b0	1559	#endif /* EM_CMU_H */