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TARGET_NUCLEO_L486RG/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_tim.h@140:97feb9bacc10, 2017-04-12 (annotated)

Committer:: <>
Date:: Wed Apr 12 16:07:08 2017 +0100
Revision:: 140:97feb9bacc10
Parent:: 128:9bcdf88f62b0
Child:: 145:64910690c574

Release 140 of the mbed library

Ports for Upcoming Targets

3841: Add nRf52840 target https://github.com/ARMmbed/mbed-os/pull/3841

3992: Introducing UBLOX_C030 platform. https://github.com/ARMmbed/mbed-os/pull/3992

Fixes and Changes

3951: [NUCLEO_F303ZE] Correct ARDUINO pin https://github.com/ARMmbed/mbed-os/pull/3951

4021: Fixing a macro to detect when RTOS was in use for the NRF52840_DK https://github.com/ARMmbed/mbed-os/pull/4021

3979: KW24D: Add missing SPI defines and Arduino connector definitions https://github.com/ARMmbed/mbed-os/pull/3979

3990: UBLOX_C027: construct a ticker-based wait, rather than calling wait_ms(), in the https://github.com/ARMmbed/mbed-os/pull/3990

4003: Fixed OBOE in async serial tx for NRF52 target, fixes #4002 https://github.com/ARMmbed/mbed-os/pull/4003

4012: STM32: Correct I2C master error handling https://github.com/ARMmbed/mbed-os/pull/4012

4020: NUCLEO_L011K4 remove unsupported tool chain files https://github.com/ARMmbed/mbed-os/pull/4020

4065: K66F: Move bss section to m_data_2 Section https://github.com/ARMmbed/mbed-os/pull/4065

4014: Issue 3763: Reduce heap allocation in the GCC linker file https://github.com/ARMmbed/mbed-os/pull/4014

4030: [STM32L0] reduce IAR heap and stack size for small targets https://github.com/ARMmbed/mbed-os/pull/4030

4109: NUCLEO_L476RG : minor serial pin update https://github.com/ARMmbed/mbed-os/pull/4109

3982: Ticker - kl25z bugfix for handling events in the past https://github.com/ARMmbed/mbed-os/pull/3982

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	122:f9eeca106725	1	/**
Kojto	122:f9eeca106725	2	******************************************************************************
Kojto	122:f9eeca106725	3	* @file stm32l4xx_ll_tim.h
Kojto	122:f9eeca106725	4	* @author MCD Application Team
Kojto	122:f9eeca106725	5	* @version V1.5.1
Kojto	122:f9eeca106725	6	* @date 31-May-2016
Kojto	122:f9eeca106725	7	* @brief Header file of TIM LL module.
Kojto	122:f9eeca106725	8	******************************************************************************
Kojto	122:f9eeca106725	9	* @attention
Kojto	122:f9eeca106725	10	*
Kojto	122:f9eeca106725	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto	122:f9eeca106725	12	*
Kojto	122:f9eeca106725	13	* Redistribution and use in source and binary forms, with or without modification,
Kojto	122:f9eeca106725	14	* are permitted provided that the following conditions are met:
Kojto	122:f9eeca106725	15	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	122:f9eeca106725	16	* this list of conditions and the following disclaimer.
Kojto	122:f9eeca106725	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	122:f9eeca106725	18	* this list of conditions and the following disclaimer in the documentation
Kojto	122:f9eeca106725	19	* and/or other materials provided with the distribution.
Kojto	122:f9eeca106725	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	122:f9eeca106725	21	* may be used to endorse or promote products derived from this software
Kojto	122:f9eeca106725	22	* without specific prior written permission.
Kojto	122:f9eeca106725	23	*
Kojto	122:f9eeca106725	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	122:f9eeca106725	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	122:f9eeca106725	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	122:f9eeca106725	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	122:f9eeca106725	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	122:f9eeca106725	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	122:f9eeca106725	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	122:f9eeca106725	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	122:f9eeca106725	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	122:f9eeca106725	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	122:f9eeca106725	34	*
Kojto	122:f9eeca106725	35	******************************************************************************
Kojto	122:f9eeca106725	36	*/
Kojto	122:f9eeca106725	37
Kojto	122:f9eeca106725	38	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	122:f9eeca106725	39	#ifndef __STM32L4xx_LL_TIM_H
Kojto	122:f9eeca106725	40	#define __STM32L4xx_LL_TIM_H
Kojto	122:f9eeca106725	41
Kojto	122:f9eeca106725	42	#ifdef __cplusplus
Kojto	122:f9eeca106725	43	extern "C" {
Kojto	122:f9eeca106725	44	#endif
Kojto	122:f9eeca106725	45
Kojto	122:f9eeca106725	46	/* Includes ------------------------------------------------------------------*/
Kojto	122:f9eeca106725	47	#include "stm32l4xx.h"
Kojto	122:f9eeca106725	48
Kojto	122:f9eeca106725	49	/** @addtogroup STM32L4xx_LL_Driver
Kojto	122:f9eeca106725	50	* @{
Kojto	122:f9eeca106725	51	*/
Kojto	122:f9eeca106725	52
Kojto	122:f9eeca106725	53	#if defined (TIM1) \|\| defined (TIM8) \|\| defined (TIM2) \|\| defined (TIM3) \|\| defined (TIM4) \|\| defined (TIM5) \|\| defined (TIM15) \|\| defined (TIM16) \|\| defined (TIM17) \|\| defined (TIM6) \|\| defined (TIM7)
Kojto	122:f9eeca106725	54
Kojto	122:f9eeca106725	55	/** @defgroup TIM_LL TIM
Kojto	122:f9eeca106725	56	* @{
Kojto	122:f9eeca106725	57	*/
Kojto	122:f9eeca106725	58
Kojto	122:f9eeca106725	59	/* Private types -------------------------------------------------------------*/
Kojto	122:f9eeca106725	60	/* Private variables ---------------------------------------------------------*/
Kojto	122:f9eeca106725	61	/** @defgroup TIM_LL_Private_Variables TIM Private Variables
Kojto	122:f9eeca106725	62	* @{
Kojto	122:f9eeca106725	63	*/
Kojto	122:f9eeca106725	64	static const uint8_t OFFSET_TAB_CCMRx[] =
Kojto	122:f9eeca106725	65	{
Kojto	122:f9eeca106725	66	0x00U, /* 0: TIMx_CH1 */
Kojto	122:f9eeca106725	67	0x00U, /* 1: TIMx_CH1N */
Kojto	122:f9eeca106725	68	0x00U, /* 2: TIMx_CH2 */
Kojto	122:f9eeca106725	69	0x00U, /* 3: TIMx_CH2N */
Kojto	122:f9eeca106725	70	0x04U, /* 4: TIMx_CH3 */
Kojto	122:f9eeca106725	71	0x04U, /* 5: TIMx_CH3N */
Kojto	122:f9eeca106725	72	0x04U, /* 6: TIMx_CH4 */
Kojto	122:f9eeca106725	73	0x3CU, /* 7: TIMx_CH5 */
Kojto	122:f9eeca106725	74	0x3CU /* 8: TIMx_CH6 */
Kojto	122:f9eeca106725	75	};
Kojto	122:f9eeca106725	76
Kojto	122:f9eeca106725	77	static const uint8_t SHIFT_TAB_OCxx[] =
Kojto	122:f9eeca106725	78	{
Kojto	122:f9eeca106725	79	0U, /* 0: OC1M, OC1FE, OC1PE */
Kojto	122:f9eeca106725	80	0U, /* 1: - NA */
Kojto	122:f9eeca106725	81	8U, /* 2: OC2M, OC2FE, OC2PE */
Kojto	122:f9eeca106725	82	0U, /* 3: - NA */
Kojto	122:f9eeca106725	83	0U, /* 4: OC3M, OC3FE, OC3PE */
Kojto	122:f9eeca106725	84	0U, /* 5: - NA */
Kojto	122:f9eeca106725	85	8U, /* 6: OC4M, OC4FE, OC4PE */
Kojto	122:f9eeca106725	86	0U, /* 7: OC5M, OC5FE, OC5PE */
Kojto	122:f9eeca106725	87	8U /* 8: OC6M, OC6FE, OC6PE */
Kojto	122:f9eeca106725	88	};
Kojto	122:f9eeca106725	89
Kojto	122:f9eeca106725	90	static const uint8_t SHIFT_TAB_ICxx[] =
Kojto	122:f9eeca106725	91	{
Kojto	122:f9eeca106725	92	0U, /* 0: CC1S, IC1PSC, IC1F */
Kojto	122:f9eeca106725	93	0U, /* 1: - NA */
Kojto	122:f9eeca106725	94	8U, /* 2: CC2S, IC2PSC, IC2F */
Kojto	122:f9eeca106725	95	0U, /* 3: - NA */
Kojto	122:f9eeca106725	96	0U, /* 4: CC3S, IC3PSC, IC3F */
Kojto	122:f9eeca106725	97	0U, /* 5: - NA */
Kojto	122:f9eeca106725	98	8U, /* 6: CC4S, IC4PSC, IC4F */
Kojto	122:f9eeca106725	99	0U, /* 7: - NA */
Kojto	122:f9eeca106725	100	0U /* 8: - NA */
Kojto	122:f9eeca106725	101	};
Kojto	122:f9eeca106725	102
Kojto	122:f9eeca106725	103	static const uint8_t SHIFT_TAB_CCxP[] =
Kojto	122:f9eeca106725	104	{
Kojto	122:f9eeca106725	105	0U, /* 0: CC1P */
Kojto	122:f9eeca106725	106	2U, /* 1: CC1NP */
Kojto	122:f9eeca106725	107	4U, /* 2: CC2P */
Kojto	122:f9eeca106725	108	6U, /* 3: CC2NP */
Kojto	122:f9eeca106725	109	8U, /* 4: CC3P */
Kojto	122:f9eeca106725	110	10U, /* 5: CC3NP */
Kojto	122:f9eeca106725	111	12U, /* 6: CC4P */
Kojto	122:f9eeca106725	112	16U, /* 7: CC5P */
Kojto	122:f9eeca106725	113	20U /* 8: CC6P */
Kojto	122:f9eeca106725	114	};
Kojto	122:f9eeca106725	115
Kojto	122:f9eeca106725	116	static const uint8_t SHIFT_TAB_OISx[] =
Kojto	122:f9eeca106725	117	{
Kojto	122:f9eeca106725	118	0U, /* 0: OIS1 */
Kojto	122:f9eeca106725	119	1U, /* 1: OIS1N */
Kojto	122:f9eeca106725	120	2U, /* 2: OIS2 */
Kojto	122:f9eeca106725	121	3U, /* 3: OIS2N */
Kojto	122:f9eeca106725	122	4U, /* 4: OIS3 */
Kojto	122:f9eeca106725	123	5U, /* 5: OIS3N */
Kojto	122:f9eeca106725	124	6U, /* 6: OIS4 */
Kojto	122:f9eeca106725	125	8U, /* 7: OIS5 */
Kojto	122:f9eeca106725	126	10U /* 8: OIS6 */
Kojto	122:f9eeca106725	127	};
Kojto	122:f9eeca106725	128	/**
Kojto	122:f9eeca106725	129	* @}
Kojto	122:f9eeca106725	130	*/
Kojto	122:f9eeca106725	131
Kojto	122:f9eeca106725	132
Kojto	122:f9eeca106725	133	/* Private constants ---------------------------------------------------------*/
Kojto	122:f9eeca106725	134	/** @defgroup TIM_LL_Private_Constants TIM Private Constants
Kojto	122:f9eeca106725	135	* @{
Kojto	122:f9eeca106725	136	*/
Kojto	122:f9eeca106725	137	/** @defgroup TIM_LL_POSITION_VAL Bit Position Value
Kojto	122:f9eeca106725	138	* @brief Position of the bit in the register.
Kojto	122:f9eeca106725	139	* @{
Kojto	122:f9eeca106725	140	*/
Kojto	122:f9eeca106725	141	#define TIM_POSITION_ICPSC POSITION_VAL(TIM_CCMR1_IC1PSC)
Kojto	122:f9eeca106725	142	/**
Kojto	122:f9eeca106725	143	* @}
Kojto	122:f9eeca106725	144	*/
Kojto	122:f9eeca106725	145
Kojto	122:f9eeca106725	146	/* Generic bit definitions for TIMx_OR2 register */
Kojto	122:f9eeca106725	147	#define TIMx_OR2_BKINE TIM1_OR2_BKINE /!< BRK BKIN input enable /
Kojto	122:f9eeca106725	148	#define TIMx_OR2_BKCOMP1E TIM1_OR2_BKCMP1E /!< BRK COMP1 enable /
Kojto	122:f9eeca106725	149	#define TIMx_OR2_BKCOMP2E TIM1_OR2_BKCMP2E /!< BRK COMP2 enable /
Kojto	122:f9eeca106725	150	#if defined(DFSDM1_Channel0)
Kojto	122:f9eeca106725	151	#define TIMx_OR2_BKDF1BK0E TIM1_OR2_BKDF1BK0E /!< BRK DFSDM1_BREAK[0] enable /
Kojto	122:f9eeca106725	152	#endif /* DFSDM1_Channel0 */
Kojto	122:f9eeca106725	153	#define TIMx_OR2_BKINP TIM1_OR2_BKINP /!< BRK BKIN input polarity /
Kojto	122:f9eeca106725	154	#define TIMx_OR2_BKCOMP1P TIM1_OR2_BKCMP1P /!< BRK COMP1 input polarity /
Kojto	122:f9eeca106725	155	#define TIMx_OR2_BKCOMP2P TIM1_OR2_BKCMP2P /!< BRK COMP2 input polarity /
Kojto	122:f9eeca106725	156	#define TIMx_OR2_ETRSEL TIM1_OR2_ETRSEL /!< TIMx ETR source selection /
Kojto	122:f9eeca106725	157
Kojto	122:f9eeca106725	158	/* Generic bit definitions for TIMx_OR3 register */
Kojto	122:f9eeca106725	159	#define TIMx_OR3_BK2INE TIM1_OR3_BK2INE /!< BRK2 BKIN2 input enable /
Kojto	122:f9eeca106725	160	#define TIMx_OR3_BK2COMP1E TIM1_OR3_BK2CMP1E /!< BRK2 COMP1 enable /
Kojto	122:f9eeca106725	161	#define TIMx_OR3_BK2COMP2E TIM1_OR3_BK2CMP2E /!< BRK2 COMP2 enable /
Kojto	122:f9eeca106725	162	#if defined(DFSDM1_Channel0)
Kojto	122:f9eeca106725	163	#define TIMx_OR3_BK2DF1BK1E TIM1_OR3_BK2DF1BK1E /!< BRK2 DFSDM1_BREAK[1] enable /
Kojto	122:f9eeca106725	164	#endif /* DFSDM1_Channel0 */
Kojto	122:f9eeca106725	165	#define TIMx_OR3_BK2INP TIM1_OR3_BK2INP /!< BRK2 BKIN2 input polarity /
Kojto	122:f9eeca106725	166	#define TIMx_OR3_BK2COMP1P TIM1_OR3_BK2CMP1P /!< BRK2 COMP1 input polarity /
Kojto	122:f9eeca106725	167	#define TIMx_OR3_BK2COMP2P TIM1_OR3_BK2CMP2P /!< BRK2 COMP2 input polarity /
Kojto	122:f9eeca106725	168
Kojto	122:f9eeca106725	169	/* Remap mask definitions */
Kojto	122:f9eeca106725	170	#define TIMx_OR1_RMP_SHIFT ((uint32_t)16U)
Kojto	122:f9eeca106725	171	#define TIMx_OR1_RMP_MASK ((uint32_t)0x0000FFFFU)
Kojto	122:f9eeca106725	172	#if defined(ADC3)
Kojto	122:f9eeca106725	173	#define TIM1_OR1_RMP_MASK ((uint32_t)((TIM1_OR1_ETR_ADC1_RMP \| TIM1_OR1_ETR_ADC3_RMP \| TIM1_OR1_TI1_RMP) << TIMx_OR1_RMP_SHIFT))
Kojto	122:f9eeca106725	174	#else
Kojto	122:f9eeca106725	175	#define TIM1_OR1_RMP_MASK ((uint32_t)((TIM1_OR1_ETR_ADC1_RMP \| TIM1_OR1_TI1_RMP) << TIMx_OR1_RMP_SHIFT))
Kojto	122:f9eeca106725	176	#endif /* ADC3 */
Kojto	122:f9eeca106725	177	#define TIM2_OR1_RMP_MASK ((uint32_t)((TIM2_OR1_TI4_RMP \| TIM2_OR1_ETR1_RMP \| TIM2_OR1_ITR1_RMP) << TIMx_OR1_RMP_SHIFT))
Kojto	122:f9eeca106725	178	#define TIM3_OR1_RMP_MASK ((uint32_t)(TIM3_OR1_TI1_RMP) << TIMx_OR1_RMP_SHIFT)
Kojto	122:f9eeca106725	179	#define TIM8_OR1_RMP_MASK ((uint32_t)((TIM8_OR1_ETR_ADC2_RMP \| TIM8_OR1_ETR_ADC3_RMP \| TIM8_OR1_TI1_RMP) << TIMx_OR1_RMP_SHIFT))
Kojto	122:f9eeca106725	180	#define TIM15_OR1_RMP_MASK ((uint32_t)((TIM15_OR1_TI1_RMP) << TIMx_OR1_RMP_SHIFT))
Kojto	122:f9eeca106725	181	#define TIM16_OR1_RMP_MASK ((uint32_t)((TIM16_OR1_TI1_RMP) << TIMx_OR1_RMP_SHIFT))
Kojto	122:f9eeca106725	182	#define TIM17_OR1_RMP_MASK ((uint32_t)((TIM17_OR1_TI1_RMP) << TIMx_OR1_RMP_SHIFT))
Kojto	122:f9eeca106725	183
Kojto	122:f9eeca106725	184	/* Mask used to set the TDG[x:0] of the DTG bits of the TIMx_BDTR register */
Kojto	122:f9eeca106725	185	#define DT_DELAY_1 ((uint8_t)0x7FU)
Kojto	122:f9eeca106725	186	#define DT_DELAY_2 ((uint8_t)0x3FU)
Kojto	122:f9eeca106725	187	#define DT_DELAY_3 ((uint8_t)0x1FU)
Kojto	122:f9eeca106725	188	#define DT_DELAY_4 ((uint8_t)0x1FU)
Kojto	122:f9eeca106725	189
Kojto	122:f9eeca106725	190	/* Mask used to set the DTG[7:5] bits of the DTG bits of the TIMx_BDTR register */
Kojto	122:f9eeca106725	191	#define DT_RANGE_1 ((uint8_t)0x00U)
Kojto	122:f9eeca106725	192	#define DT_RANGE_2 ((uint8_t)0x80U)
Kojto	122:f9eeca106725	193	#define DT_RANGE_3 ((uint8_t)0xC0U)
Kojto	122:f9eeca106725	194	#define DT_RANGE_4 ((uint8_t)0xE0U)
Kojto	122:f9eeca106725	195
Kojto	122:f9eeca106725	196	/** Legacy definitions for compatibility purpose
Kojto	122:f9eeca106725	197	@cond 0
Kojto	122:f9eeca106725	198	*/
Kojto	122:f9eeca106725	199	#if defined(DFSDM1_Channel0)
Kojto	122:f9eeca106725	200	#define TIMx_OR2_BKDFBK0E TIMx_OR2_BKDF1BK0E
Kojto	122:f9eeca106725	201	#define TIMx_OR3_BK2DFBK1E TIMx_OR3_BK2DF1BK1E
Kojto	122:f9eeca106725	202	#endif /* DFSDM1_Channel0 */
Kojto	122:f9eeca106725	203	/**
Kojto	122:f9eeca106725	204	@endcond
Kojto	122:f9eeca106725	205	*/
Kojto	122:f9eeca106725	206
Kojto	122:f9eeca106725	207	/**
Kojto	122:f9eeca106725	208	* @}
Kojto	122:f9eeca106725	209	*/
Kojto	122:f9eeca106725	210
Kojto	122:f9eeca106725	211
Kojto	122:f9eeca106725	212	/* Private macros ------------------------------------------------------------*/
Kojto	122:f9eeca106725	213	/** @defgroup TIM_LL_Private_Macros TIM Private Macros
Kojto	122:f9eeca106725	214	* @{
Kojto	122:f9eeca106725	215	*/
Kojto	122:f9eeca106725	216	/** @brief Convert channel id into channel index.
Kojto	122:f9eeca106725	217	* @param __CHANNEL__ This parameter can be one of the following values:
Kojto	122:f9eeca106725	218	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	219	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	220	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	221	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	222	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	223	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	224	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	225	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	226	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	227	* @retval none
Kojto	122:f9eeca106725	228	*/
Kojto	122:f9eeca106725	229	#define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \
Kojto	122:f9eeca106725	230	(((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\
Kojto	122:f9eeca106725	231	((__CHANNEL__) == LL_TIM_CHANNEL_CH1N) ? 1U :\
Kojto	122:f9eeca106725	232	((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\
Kojto	122:f9eeca106725	233	((__CHANNEL__) == LL_TIM_CHANNEL_CH2N) ? 3U :\
Kojto	122:f9eeca106725	234	((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U :\
Kojto	122:f9eeca106725	235	((__CHANNEL__) == LL_TIM_CHANNEL_CH3N) ? 5U :\
Kojto	122:f9eeca106725	236	((__CHANNEL__) == LL_TIM_CHANNEL_CH4) ? 6U :\
Kojto	122:f9eeca106725	237	((__CHANNEL__) == LL_TIM_CHANNEL_CH5) ? 7U : 8U)
Kojto	122:f9eeca106725	238
Kojto	122:f9eeca106725	239	/** @brief Calculate the deadtime sampling period(in ps).
Kojto	122:f9eeca106725	240	* @param __TIMCLK__ timer input clock frequency (in Hz).
Kojto	122:f9eeca106725	241	* @param __CKD__ This parameter can be one of the following values:
Kojto	122:f9eeca106725	242	* @arg @ref LL_TIM_CLOCKDIVISION_DIV1
Kojto	122:f9eeca106725	243	* @arg @ref LL_TIM_CLOCKDIVISION_DIV2
Kojto	122:f9eeca106725	244	* @arg @ref LL_TIM_CLOCKDIVISION_DIV4
Kojto	122:f9eeca106725	245	* @retval none
Kojto	122:f9eeca106725	246	*/
Kojto	122:f9eeca106725	247	#define TIM_CALC_DTS(__TIMCLK__, __CKD__) \
Kojto	122:f9eeca106725	248	(((__CKD__) == LL_TIM_CLOCKDIVISION_DIV1) ? ((uint64_t)1000000000000U/(__TIMCLK__)) : \
Kojto	122:f9eeca106725	249	((__CKD__) == LL_TIM_CLOCKDIVISION_DIV2) ? ((uint64_t)1000000000000U/((__TIMCLK__) >> 1U)) : \
Kojto	122:f9eeca106725	250	((uint64_t)1000000000000U/((__TIMCLK__) >> 2U)))
Kojto	122:f9eeca106725	251	/**
Kojto	122:f9eeca106725	252	* @}
Kojto	122:f9eeca106725	253	*/
Kojto	122:f9eeca106725	254
Kojto	122:f9eeca106725	255
Kojto	122:f9eeca106725	256	/* Exported types ------------------------------------------------------------*/
Kojto	122:f9eeca106725	257	#if defined(USE_FULL_LL_DRIVER)
Kojto	122:f9eeca106725	258	/** @defgroup TIM_LL_ES_INIT TIM Exported Init structure
Kojto	122:f9eeca106725	259	* @{
Kojto	122:f9eeca106725	260	*/
Kojto	122:f9eeca106725	261
Kojto	122:f9eeca106725	262	/**
Kojto	122:f9eeca106725	263	* @brief TIM Time Base configuration structure definition.
Kojto	122:f9eeca106725	264	*/
Kojto	122:f9eeca106725	265	typedef struct
Kojto	122:f9eeca106725	266	{
Kojto	122:f9eeca106725	267	uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
Kojto	122:f9eeca106725	268	This parameter can be a number between 0x0000 and 0xFFFF.
Kojto	122:f9eeca106725	269
Kojto	122:f9eeca106725	270	This feature can be modified afterwards using unitary function @ref LL_TIM_SetPrescaler().*/
Kojto	122:f9eeca106725	271
Kojto	122:f9eeca106725	272	uint32_t CounterMode; /*!< Specifies the counter mode.
Kojto	122:f9eeca106725	273	This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE.
Kojto	122:f9eeca106725	274
Kojto	122:f9eeca106725	275	This feature can be modified afterwards using unitary function @ref LL_TIM_SetCounterMode().*/
Kojto	122:f9eeca106725	276
Kojto	122:f9eeca106725	277	uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active
Kojto	122:f9eeca106725	278	Auto-Reload Register at the next update event.
Kojto	122:f9eeca106725	279	This parameter must be a number between 0x0000 and 0xFFFF.
Kojto	122:f9eeca106725	280	Some timer instances may support 32 bits counters. In that case this parameter must be a number between 0x0000 and 0xFFFFFFFF.
Kojto	122:f9eeca106725	281
Kojto	122:f9eeca106725	282	This feature can be modified afterwards using unitary function @ref LL_TIM_SetAutoReload().*/
Kojto	122:f9eeca106725	283
Kojto	122:f9eeca106725	284	uint32_t ClockDivision; /*!< Specifies the clock division.
Kojto	122:f9eeca106725	285	This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION.
Kojto	122:f9eeca106725	286
Kojto	122:f9eeca106725	287	This feature can be modified afterwards using unitary function @ref LL_TIM_SetClockDivision().*/
Kojto	122:f9eeca106725	288
Kojto	122:f9eeca106725	289	uint8_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
Kojto	122:f9eeca106725	290	reaches zero, an update event is generated and counting restarts
Kojto	122:f9eeca106725	291	from the RCR value (N).
Kojto	122:f9eeca106725	292	This means in PWM mode that (N+1) corresponds to:
Kojto	122:f9eeca106725	293	- the number of PWM periods in edge-aligned mode
Kojto	122:f9eeca106725	294	- the number of half PWM period in center-aligned mode
Kojto	122:f9eeca106725	295	This parameter must be a number between 0x00 and 0xFF.
Kojto	122:f9eeca106725	296
Kojto	122:f9eeca106725	297	This feature can be modified afterwards using unitary function @ref LL_TIM_SetRepetitionCounter().*/
Kojto	122:f9eeca106725	298	} LL_TIM_InitTypeDef;
Kojto	122:f9eeca106725	299
Kojto	122:f9eeca106725	300	/**
Kojto	122:f9eeca106725	301	* @brief TIM Output Compare configuration structure definition.
Kojto	122:f9eeca106725	302	*/
Kojto	122:f9eeca106725	303	typedef struct
Kojto	122:f9eeca106725	304	{
Kojto	122:f9eeca106725	305	uint32_t OCMode; /*!< Specifies the output mode.
Kojto	122:f9eeca106725	306	This parameter can be a value of @ref TIM_LL_EC_OCMODE.
Kojto	122:f9eeca106725	307
Kojto	122:f9eeca106725	308	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetMode().*/
Kojto	122:f9eeca106725	309
Kojto	122:f9eeca106725	310	uint32_t OCState; /*!< Specifies the TIM Output Compare state.
Kojto	122:f9eeca106725	311	This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
Kojto	122:f9eeca106725	312
Kojto	122:f9eeca106725	313	This feature can be modified afterwards using unitary functions @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
Kojto	122:f9eeca106725	314
Kojto	122:f9eeca106725	315	uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state.
Kojto	122:f9eeca106725	316	This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
Kojto	122:f9eeca106725	317
Kojto	122:f9eeca106725	318	This feature can be modified afterwards using unitary functions @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
Kojto	122:f9eeca106725	319
Kojto	122:f9eeca106725	320	uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Register.
Kojto	122:f9eeca106725	321	This parameter can be a number between 0x0000 and 0xFFFF.
Kojto	122:f9eeca106725	322
Kojto	122:f9eeca106725	323	This feature can be modified afterwards using unitary function LL_TIM_OC_SetCompareCHx (x=1..6).*/
Kojto	122:f9eeca106725	324
Kojto	122:f9eeca106725	325	uint32_t OCPolarity; /*!< Specifies the output polarity.
Kojto	122:f9eeca106725	326	This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
Kojto	122:f9eeca106725	327
Kojto	122:f9eeca106725	328	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetPolarity().*/
Kojto	122:f9eeca106725	329
Kojto	122:f9eeca106725	330	uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
Kojto	122:f9eeca106725	331	This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
Kojto	122:f9eeca106725	332
Kojto	122:f9eeca106725	333	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetPolarity().*/
Kojto	122:f9eeca106725	334
Kojto	122:f9eeca106725	335	uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
Kojto	122:f9eeca106725	336	This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
Kojto	122:f9eeca106725	337
Kojto	122:f9eeca106725	338	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetIdleState().*/
Kojto	122:f9eeca106725	339
Kojto	122:f9eeca106725	340	uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
Kojto	122:f9eeca106725	341	This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
Kojto	122:f9eeca106725	342
Kojto	122:f9eeca106725	343	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetIdleState().*/
Kojto	122:f9eeca106725	344	} LL_TIM_OC_InitTypeDef;
Kojto	122:f9eeca106725	345
Kojto	122:f9eeca106725	346	/**
Kojto	122:f9eeca106725	347	* @brief TIM Input Capture configuration structure definition.
Kojto	122:f9eeca106725	348	*/
Kojto	122:f9eeca106725	349
Kojto	122:f9eeca106725	350	typedef struct
Kojto	122:f9eeca106725	351	{
Kojto	122:f9eeca106725	352
Kojto	122:f9eeca106725	353	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
Kojto	122:f9eeca106725	354	This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
Kojto	122:f9eeca106725	355
Kojto	122:f9eeca106725	356	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
Kojto	122:f9eeca106725	357
Kojto	122:f9eeca106725	358	uint32_t ICActiveInput; /*!< Specifies the input.
Kojto	122:f9eeca106725	359	This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
Kojto	122:f9eeca106725	360
Kojto	122:f9eeca106725	361	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
Kojto	122:f9eeca106725	362
Kojto	122:f9eeca106725	363	uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
Kojto	122:f9eeca106725	364	This parameter can be a value of @ref TIM_LL_EC_ICPSC.
Kojto	122:f9eeca106725	365
Kojto	122:f9eeca106725	366	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
Kojto	122:f9eeca106725	367
Kojto	122:f9eeca106725	368	uint32_t ICFilter; /*!< Specifies the input capture filter.
Kojto	122:f9eeca106725	369	This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
Kojto	122:f9eeca106725	370
Kojto	122:f9eeca106725	371	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
Kojto	122:f9eeca106725	372	} LL_TIM_IC_InitTypeDef;
Kojto	122:f9eeca106725	373
Kojto	122:f9eeca106725	374
Kojto	122:f9eeca106725	375	/**
Kojto	122:f9eeca106725	376	* @brief TIM Encoder interface configuration structure definition.
Kojto	122:f9eeca106725	377	*/
Kojto	122:f9eeca106725	378	typedef struct
Kojto	122:f9eeca106725	379	{
Kojto	122:f9eeca106725	380	uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4).
Kojto	122:f9eeca106725	381	This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE.
Kojto	122:f9eeca106725	382
Kojto	122:f9eeca106725	383	This feature can be modified afterwards using unitary function @ref LL_TIM_SetEncoderMode().*/
Kojto	122:f9eeca106725	384
Kojto	122:f9eeca106725	385	uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
Kojto	122:f9eeca106725	386	This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
Kojto	122:f9eeca106725	387
Kojto	122:f9eeca106725	388	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
Kojto	122:f9eeca106725	389
Kojto	122:f9eeca106725	390	uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source
Kojto	122:f9eeca106725	391	This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
Kojto	122:f9eeca106725	392
Kojto	122:f9eeca106725	393	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
Kojto	122:f9eeca106725	394
Kojto	122:f9eeca106725	395	uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value.
Kojto	122:f9eeca106725	396	This parameter can be a value of @ref TIM_LL_EC_ICPSC.
Kojto	122:f9eeca106725	397
Kojto	122:f9eeca106725	398	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
Kojto	122:f9eeca106725	399
Kojto	122:f9eeca106725	400	uint32_t IC1Filter; /*!< Specifies the TI1 input filter.
Kojto	122:f9eeca106725	401	This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
Kojto	122:f9eeca106725	402
Kojto	122:f9eeca106725	403	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
Kojto	122:f9eeca106725	404
Kojto	122:f9eeca106725	405	uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input.
Kojto	122:f9eeca106725	406	This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
Kojto	122:f9eeca106725	407
Kojto	122:f9eeca106725	408	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
Kojto	122:f9eeca106725	409
Kojto	122:f9eeca106725	410	uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source
Kojto	122:f9eeca106725	411	This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
Kojto	122:f9eeca106725	412
Kojto	122:f9eeca106725	413	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
Kojto	122:f9eeca106725	414
Kojto	122:f9eeca106725	415	uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value.
Kojto	122:f9eeca106725	416	This parameter can be a value of @ref TIM_LL_EC_ICPSC.
Kojto	122:f9eeca106725	417
Kojto	122:f9eeca106725	418	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
Kojto	122:f9eeca106725	419
Kojto	122:f9eeca106725	420	uint32_t IC2Filter; /*!< Specifies the TI2 input filter.
Kojto	122:f9eeca106725	421	This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
Kojto	122:f9eeca106725	422
Kojto	122:f9eeca106725	423	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
Kojto	122:f9eeca106725	424
Kojto	122:f9eeca106725	425	} LL_TIM_ENCODER_InitTypeDef;
Kojto	122:f9eeca106725	426
Kojto	122:f9eeca106725	427	/**
Kojto	122:f9eeca106725	428	* @brief TIM Hall sensor interface configuration structure definition.
Kojto	122:f9eeca106725	429	*/
Kojto	122:f9eeca106725	430	typedef struct
Kojto	122:f9eeca106725	431	{
Kojto	122:f9eeca106725	432
Kojto	122:f9eeca106725	433	uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
Kojto	122:f9eeca106725	434	This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
Kojto	122:f9eeca106725	435
Kojto	122:f9eeca106725	436	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
Kojto	122:f9eeca106725	437
Kojto	122:f9eeca106725	438	uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value.
Kojto	122:f9eeca106725	439	Prescaler must be set to get a maximum counter period longer than the
Kojto	122:f9eeca106725	440	time interval between 2 consecutive changes on the Hall inputs.
Kojto	122:f9eeca106725	441	This parameter can be a value of @ref TIM_LL_EC_ICPSC.
Kojto	122:f9eeca106725	442
Kojto	122:f9eeca106725	443	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
Kojto	122:f9eeca106725	444
Kojto	122:f9eeca106725	445	uint32_t IC1Filter; /*!< Specifies the TI1 input filter.
Kojto	122:f9eeca106725	446	This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
Kojto	122:f9eeca106725	447
Kojto	122:f9eeca106725	448	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
Kojto	122:f9eeca106725	449
Kojto	122:f9eeca106725	450	uint32_t CommutationDelay; /*!< Specifies the compare value to be loaded into the Capture Compare Register.
Kojto	122:f9eeca106725	451	A positive pulse (TRGO event) is generated with a programmable delay every time
Kojto	122:f9eeca106725	452	a change occurs on the Hall inputs.
Kojto	122:f9eeca106725	453	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
Kojto	122:f9eeca106725	454
Kojto	122:f9eeca106725	455	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetCompareCH2().*/
Kojto	122:f9eeca106725	456	} LL_TIM_HALLSENSOR_InitTypeDef;
Kojto	122:f9eeca106725	457
Kojto	122:f9eeca106725	458	/**
Kojto	122:f9eeca106725	459	* @}
Kojto	122:f9eeca106725	460	*/
Kojto	122:f9eeca106725	461	#endif /* USE_FULL_LL_DRIVER */
Kojto	122:f9eeca106725	462
Kojto	122:f9eeca106725	463	/* Exported constants --------------------------------------------------------*/
Kojto	122:f9eeca106725	464	/** @defgroup TIM_LL_Exported_Constants TIM Exported Constants
Kojto	122:f9eeca106725	465	* @{
Kojto	122:f9eeca106725	466	*/
Kojto	122:f9eeca106725	467
Kojto	122:f9eeca106725	468	/** @defgroup TIM_LL_EC_GET_FLAG Get Flags Defines
Kojto	122:f9eeca106725	469	* @brief Flags defines which can be used with LL_TIM_ReadReg function.
Kojto	122:f9eeca106725	470	* @{
Kojto	122:f9eeca106725	471	*/
Kojto	122:f9eeca106725	472	#define LL_TIM_SR_UIF TIM_SR_UIF /!< Update interrupt flag /
Kojto	122:f9eeca106725	473	#define LL_TIM_SR_CC1IF TIM_SR_CC1IF /!< Capture/compare 1 interrupt flag /
Kojto	122:f9eeca106725	474	#define LL_TIM_SR_CC2IF TIM_SR_CC2IF /!< Capture/compare 2 interrupt flag /
Kojto	122:f9eeca106725	475	#define LL_TIM_SR_CC3IF TIM_SR_CC3IF /!< Capture/compare 3 interrupt flag /
Kojto	122:f9eeca106725	476	#define LL_TIM_SR_CC4IF TIM_SR_CC4IF /!< Capture/compare 4 interrupt flag /
Kojto	122:f9eeca106725	477	#define LL_TIM_SR_CC5IF TIM_SR_CC5IF /!< Capture/compare 5 interrupt flag /
Kojto	122:f9eeca106725	478	#define LL_TIM_SR_CC6IF TIM_SR_CC6IF /!< Capture/compare 6 interrupt flag /
Kojto	122:f9eeca106725	479	#define LL_TIM_SR_COMIF TIM_SR_COMIF /!< COM interrupt flag /
Kojto	122:f9eeca106725	480	#define LL_TIM_SR_TIF TIM_SR_TIF /!< Trigger interrupt flag /
Kojto	122:f9eeca106725	481	#define LL_TIM_SR_BIF TIM_SR_BIF /!< Break interrupt flag /
Kojto	122:f9eeca106725	482	#define LL_TIM_SR_B2IF TIM_SR_B2IF /!< Second break interrupt flag /
Kojto	122:f9eeca106725	483	#define LL_TIM_SR_CC1OF TIM_SR_CC1OF /!< Capture/Compare 1 overcapture flag /
Kojto	122:f9eeca106725	484	#define LL_TIM_SR_CC2OF TIM_SR_CC2OF /!< Capture/Compare 2 overcapture flag /
Kojto	122:f9eeca106725	485	#define LL_TIM_SR_CC3OF TIM_SR_CC3OF /!< Capture/Compare 3 overcapture flag /
Kojto	122:f9eeca106725	486	#define LL_TIM_SR_CC4OF TIM_SR_CC4OF /!< Capture/Compare 4 overcapture flag /
Kojto	122:f9eeca106725	487	#define LL_TIM_SR_SBIF TIM_SR_SBIF /!< System Break interrupt flag /
Kojto	122:f9eeca106725	488	/**
Kojto	122:f9eeca106725	489	* @}
Kojto	122:f9eeca106725	490	*/
Kojto	122:f9eeca106725	491
Kojto	122:f9eeca106725	492	/** @defgroup TIM_LL_EC_IT IT Defines
Kojto	122:f9eeca106725	493	* @brief IT defines which can be used with LL_TIM_ReadReg and LL_TIM_WriteReg functions.
Kojto	122:f9eeca106725	494	* @{
Kojto	122:f9eeca106725	495	*/
Kojto	122:f9eeca106725	496	#define LL_TIM_DIER_UIE TIM_DIER_UIE /!< Update interrupt enable /
Kojto	122:f9eeca106725	497	#define LL_TIM_DIER_CC1IE TIM_DIER_CC1IE /!< Capture/compare 1 interrupt enable /
Kojto	122:f9eeca106725	498	#define LL_TIM_DIER_CC2IE TIM_DIER_CC2IE /!< Capture/compare 2 interrupt enable /
Kojto	122:f9eeca106725	499	#define LL_TIM_DIER_CC3IE TIM_DIER_CC3IE /!< Capture/compare 3 interrupt enable /
Kojto	122:f9eeca106725	500	#define LL_TIM_DIER_CC4IE TIM_DIER_CC4IE /!< Capture/compare 4 interrupt enable /
Kojto	122:f9eeca106725	501	#define LL_TIM_DIER_COMIE TIM_DIER_COMIE /!< COM interrupt enable /
Kojto	122:f9eeca106725	502	#define LL_TIM_DIER_TIE TIM_DIER_TIE /!< Trigger interrupt enable /
Kojto	122:f9eeca106725	503	#define LL_TIM_DIER_BIE TIM_DIER_BIE /!< Break interrupt enable /
Kojto	122:f9eeca106725	504	/**
Kojto	122:f9eeca106725	505	* @}
Kojto	122:f9eeca106725	506	*/
Kojto	122:f9eeca106725	507
Kojto	122:f9eeca106725	508	/** @defgroup TIM_LL_EC_UPDATESOURCE Update Source
Kojto	122:f9eeca106725	509	* @{
Kojto	122:f9eeca106725	510	*/
Kojto	122:f9eeca106725	511	#define LL_TIM_UPDATESOURCE_REGULAR ((uint32_t)0x00000000U) /!< Counter overflow/underflow, Setting the UG bit or Update generation through the slave mode controller generates an update request /
Kojto	122:f9eeca106725	512	#define LL_TIM_UPDATESOURCE_COUNTER TIM_CR1_URS /!< Only counter overflow/underflow generates an update request /
Kojto	122:f9eeca106725	513	/**
Kojto	122:f9eeca106725	514	* @}
Kojto	122:f9eeca106725	515	*/
Kojto	122:f9eeca106725	516
Kojto	122:f9eeca106725	517	/** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode
Kojto	122:f9eeca106725	518	* @{
Kojto	122:f9eeca106725	519	*/
Kojto	122:f9eeca106725	520	#define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /!< Counter is not stopped at update event /
Kojto	122:f9eeca106725	521	#define LL_TIM_ONEPULSEMODE_REPETITIVE ((uint32_t)0x00000000U) /!< Counter stops counting at the next update event /
Kojto	122:f9eeca106725	522	/**
Kojto	122:f9eeca106725	523	* @}
Kojto	122:f9eeca106725	524	*/
Kojto	122:f9eeca106725	525
Kojto	122:f9eeca106725	526	/** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode
Kojto	122:f9eeca106725	527	* @{
Kojto	122:f9eeca106725	528	*/
Kojto	122:f9eeca106725	529	#define LL_TIM_COUNTERMODE_UP ((uint32_t)0x00000000U) /!<Counter used as upcounter /
Kojto	122:f9eeca106725	530	#define LL_TIM_COUNTERMODE_DOWN TIM_CR1_DIR /!< Counter used as downcounter /
Kojto	122:f9eeca106725	531	#define LL_TIM_COUNTERMODE_CENTER_UP TIM_CR1_CMS_0 /!< The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting down. /
Kojto	122:f9eeca106725	532	#define LL_TIM_COUNTERMODE_CENTER_DOWN TIM_CR1_CMS_1 /!<The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up /
Kojto	122:f9eeca106725	533	#define LL_TIM_COUNTERMODE_CENTER_UP_DOWN TIM_CR1_CMS /!< The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up or down. /
Kojto	122:f9eeca106725	534	/**
Kojto	122:f9eeca106725	535	* @}
Kojto	122:f9eeca106725	536	*/
Kojto	122:f9eeca106725	537
Kojto	122:f9eeca106725	538	/** @defgroup TIM_LL_EC_CLOCKDIVISION Clock Division
Kojto	122:f9eeca106725	539	* @{
Kojto	122:f9eeca106725	540	*/
Kojto	122:f9eeca106725	541	#define LL_TIM_CLOCKDIVISION_DIV1 ((uint32_t)0x00000000U) /!< tDTS=tCK_INT /
Kojto	122:f9eeca106725	542	#define LL_TIM_CLOCKDIVISION_DIV2 TIM_CR1_CKD_0 /!< tDTS=2tCK_INT */
Kojto	122:f9eeca106725	543	#define LL_TIM_CLOCKDIVISION_DIV4 TIM_CR1_CKD_1 /!< tDTS=4tCK_INT */
Kojto	122:f9eeca106725	544	/**
Kojto	122:f9eeca106725	545	* @}
Kojto	122:f9eeca106725	546	*/
Kojto	122:f9eeca106725	547
Kojto	122:f9eeca106725	548	/** @defgroup TIM_LL_EC_COUNTERDIRECTION Counter Direction
Kojto	122:f9eeca106725	549	* @{
Kojto	122:f9eeca106725	550	*/
Kojto	122:f9eeca106725	551	#define LL_TIM_COUNTERDIRECTION_UP ((uint32_t)0x00000000U) /!< Timer counter counts up /
Kojto	122:f9eeca106725	552	#define LL_TIM_COUNTERDIRECTION_DOWN TIM_CR1_DIR /!< Timer counter counts down /
Kojto	122:f9eeca106725	553	/**
Kojto	122:f9eeca106725	554	* @}
Kojto	122:f9eeca106725	555	*/
Kojto	122:f9eeca106725	556
Kojto	122:f9eeca106725	557	/** @defgroup TIM_LL_EC_CCUPDATESOURCE Capture Compare Update Source
Kojto	122:f9eeca106725	558	* @{
Kojto	122:f9eeca106725	559	*/
Kojto	122:f9eeca106725	560	#define LL_TIM_CCUPDATESOURCE_COMG_ONLY ((uint32_t)0x00000000U) /!< Capture/compare control bits are updated by setting the COMG bit only /
Kojto	122:f9eeca106725	561	#define LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI TIM_CR2_CCUS /!< Capture/compare control bits are updated by setting the COMG bit or when a rising edge occurs on trigger input (TRGI) /
Kojto	122:f9eeca106725	562	/**
Kojto	122:f9eeca106725	563	* @}
Kojto	122:f9eeca106725	564	*/
Kojto	122:f9eeca106725	565
Kojto	122:f9eeca106725	566	/** @defgroup TIM_LL_EC_CCDMAREQUEST Capture Compare DMA Request
Kojto	122:f9eeca106725	567	* @{
Kojto	122:f9eeca106725	568	*/
Kojto	122:f9eeca106725	569	#define LL_TIM_CCDMAREQUEST_CC ((uint32_t)0x00000000U) /!< CCx DMA request sent when CCx event occurs /
Kojto	122:f9eeca106725	570	#define LL_TIM_CCDMAREQUEST_UPDATE TIM_CR2_CCDS /!< CCx DMA requests sent when update event occurs /
Kojto	122:f9eeca106725	571	/**
Kojto	122:f9eeca106725	572	* @}
Kojto	122:f9eeca106725	573	*/
Kojto	122:f9eeca106725	574
Kojto	122:f9eeca106725	575	/** @defgroup TIM_LL_EC_LOCKLEVEL Lock Level
Kojto	122:f9eeca106725	576	* @{
Kojto	122:f9eeca106725	577	*/
Kojto	122:f9eeca106725	578	#define LL_TIM_LOCKLEVEL_OFF ((uint32_t)0x00000000U) /!< LOCK OFF - No bit is write protected /
Kojto	122:f9eeca106725	579	#define LL_TIM_LOCKLEVEL_1 TIM_BDTR_LOCK_0 /!< LOCK Level 1 /
Kojto	122:f9eeca106725	580	#define LL_TIM_LOCKLEVEL_2 TIM_BDTR_LOCK_1 /!< LOCK Level 2 /
Kojto	122:f9eeca106725	581	#define LL_TIM_LOCKLEVEL_3 TIM_BDTR_LOCK /!< LOCK Level 3 /
Kojto	122:f9eeca106725	582	/**
Kojto	122:f9eeca106725	583	* @}
Kojto	122:f9eeca106725	584	*/
Kojto	122:f9eeca106725	585
Kojto	122:f9eeca106725	586	/** @defgroup TIM_LL_EC_CHANNEL Channel
Kojto	122:f9eeca106725	587	* @{
Kojto	122:f9eeca106725	588	*/
Kojto	122:f9eeca106725	589	#define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /!< Timer input/output channel 1 /
Kojto	122:f9eeca106725	590	#define LL_TIM_CHANNEL_CH1N TIM_CCER_CC1NE /!< Timer complementary output channel 1 /
Kojto	122:f9eeca106725	591	#define LL_TIM_CHANNEL_CH2 TIM_CCER_CC2E /!< Timer input/output channel 2 /
Kojto	122:f9eeca106725	592	#define LL_TIM_CHANNEL_CH2N TIM_CCER_CC2NE /!< Timer complementary output channel 2 /
Kojto	122:f9eeca106725	593	#define LL_TIM_CHANNEL_CH3 TIM_CCER_CC3E /!< Timer input/output channel 3 /
Kojto	122:f9eeca106725	594	#define LL_TIM_CHANNEL_CH3N TIM_CCER_CC3NE /!< Timer complementary output channel 3 /
Kojto	122:f9eeca106725	595	#define LL_TIM_CHANNEL_CH4 TIM_CCER_CC4E /!< Timer input/output channel 4 /
Kojto	122:f9eeca106725	596	#define LL_TIM_CHANNEL_CH5 TIM_CCER_CC5E /!< Timer output channel 5 /
Kojto	122:f9eeca106725	597	#define LL_TIM_CHANNEL_CH6 TIM_CCER_CC6E /!< Timer output channel 6 /
Kojto	122:f9eeca106725	598	/**
Kojto	122:f9eeca106725	599	* @}
Kojto	122:f9eeca106725	600	*/
Kojto	122:f9eeca106725	601
Kojto	122:f9eeca106725	602	#if defined(USE_FULL_LL_DRIVER)
Kojto	122:f9eeca106725	603	/** @defgroup TIM_LL_EC_OCSTATE Output Configuration State
Kojto	122:f9eeca106725	604	* @{
Kojto	122:f9eeca106725	605	*/
Kojto	122:f9eeca106725	606	#define LL_TIM_OCSTATE_DISABLE ((uint32_t)0x00000000U) /!< OCx is not active /
Kojto	122:f9eeca106725	607	#define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /!< OCx signal is output on the corresponding output pin /
Kojto	122:f9eeca106725	608	/**
Kojto	122:f9eeca106725	609	* @}
Kojto	122:f9eeca106725	610	*/
Kojto	122:f9eeca106725	611	#endif /* USE_FULL_LL_DRIVER */
Kojto	122:f9eeca106725	612
Kojto	122:f9eeca106725	613	/** @defgroup TIM_LL_EC_OCMODE Output Configuration Mode
Kojto	122:f9eeca106725	614	* @{
Kojto	122:f9eeca106725	615	*/
Kojto	122:f9eeca106725	616	#define LL_TIM_OCMODE_FROZEN ((uint32_t)0x00000000U) /!<The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the output channel level /
Kojto	122:f9eeca106725	617	#define LL_TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0 /!<OCyREF is forced high on compare match/
Kojto	122:f9eeca106725	618	#define LL_TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1 /!<OCyREF is forced low on compare match/
Kojto	122:f9eeca106725	619	#define LL_TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0) /!<OCyREF toggles on compare match/
Kojto	122:f9eeca106725	620	#define LL_TIM_OCMODE_FORCED_INACTIVE (TIM_CCMR1_OC1M_2) /!<OCyREF is forced low/
Kojto	122:f9eeca106725	621	#define LL_TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_0) /!<OCyREF is forced high/
Kojto	122:f9eeca106725	622	#define LL_TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1) /!<In upcounting, channel y is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel y is inactive as long as TIMx_CNT>TIMx_CCRy else active./
Kojto	122:f9eeca106725	623	#define LL_TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0) /!<In upcounting, channel y is inactive as long as TIMx_CNT<TIMx_CCRy else active. In downcounting, channel y is active as long as TIMx_CNT>TIMx_CCRy else inactive/
Kojto	122:f9eeca106725	624	#define LL_TIM_OCMODE_RETRIG_OPM1 TIM_CCMR1_OC1M_3 /!<Retrigerrable OPM mode 1/
Kojto	122:f9eeca106725	625	#define LL_TIM_OCMODE_RETRIG_OPM2 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_0) /!<Retrigerrable OPM mode 2/
Kojto	122:f9eeca106725	626	#define LL_TIM_OCMODE_COMBINED_PWM1 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_2) /!<Combined PWM mode 1/
Kojto	122:f9eeca106725	627	#define LL_TIM_OCMODE_COMBINED_PWM2 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_0 \| TIM_CCMR1_OC1M_2) /!<Combined PWM mode 2/
Kojto	122:f9eeca106725	628	#define LL_TIM_OCMODE_ASSYMETRIC_PWM1 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_2) /!<Asymmetric PWM mode 1/
Kojto	122:f9eeca106725	629	#define LL_TIM_OCMODE_ASSYMETRIC_PWM2 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M) /!<Asymmetric PWM mode 2/
Kojto	122:f9eeca106725	630	/**
Kojto	122:f9eeca106725	631	* @}
Kojto	122:f9eeca106725	632	*/
Kojto	122:f9eeca106725	633
Kojto	122:f9eeca106725	634	/** @defgroup TIM_LL_EC_OCPOLARITY Output Configuration Polarity
Kojto	122:f9eeca106725	635	* @{
Kojto	122:f9eeca106725	636	*/
Kojto	122:f9eeca106725	637	#define LL_TIM_OCPOLARITY_HIGH ((uint32_t)0x00000000U) /!< OCxactive high/
Kojto	122:f9eeca106725	638	#define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /!< OCxactive low/
Kojto	122:f9eeca106725	639	/**
Kojto	122:f9eeca106725	640	* @}
Kojto	122:f9eeca106725	641	*/
Kojto	122:f9eeca106725	642
Kojto	122:f9eeca106725	643	/** @defgroup TIM_LL_EC_OCIDLESTATE Output Configuration Idle State
Kojto	122:f9eeca106725	644	* @{
Kojto	122:f9eeca106725	645	*/
Kojto	122:f9eeca106725	646	#define LL_TIM_OCIDLESTATE_LOW ((uint32_t)0x00000000U) /!<OCx=0 (after a dead-time if OC is implemented) when MOE=0/
Kojto	122:f9eeca106725	647	#define LL_TIM_OCIDLESTATE_HIGH TIM_CR2_OIS1 /!<OCx=1 (after a dead-time if OC is implemented) when MOE=0/
Kojto	122:f9eeca106725	648	/**
Kojto	122:f9eeca106725	649	* @}
Kojto	122:f9eeca106725	650	*/
Kojto	122:f9eeca106725	651
Kojto	122:f9eeca106725	652	/** @defgroup TIM_LL_EC_GROUPCH5 GROUPCH5
Kojto	122:f9eeca106725	653	* @{
Kojto	122:f9eeca106725	654	*/
Kojto	122:f9eeca106725	655	#define LL_TIM_GROUPCH5_NONE (uint32_t)0x00000000U /!< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC /
Kojto	122:f9eeca106725	656	#define LL_TIM_GROUPCH5_OC1REFC TIM_CCR5_GC5C1 /!< OC1REFC is the logical AND of OC1REFC and OC5REF /
Kojto	122:f9eeca106725	657	#define LL_TIM_GROUPCH5_OC2REFC TIM_CCR5_GC5C2 /!< OC2REFC is the logical AND of OC2REFC and OC5REF /
Kojto	122:f9eeca106725	658	#define LL_TIM_GROUPCH5_OC3REFC TIM_CCR5_GC5C3 /!< OC3REFC is the logical AND of OC3REFC and OC5REF /
Kojto	122:f9eeca106725	659	/**
Kojto	122:f9eeca106725	660	* @}
Kojto	122:f9eeca106725	661	*/
Kojto	122:f9eeca106725	662
Kojto	122:f9eeca106725	663	/** @defgroup TIM_LL_EC_ACTIVEINPUT Active Input Selection
Kojto	122:f9eeca106725	664	* @{
Kojto	122:f9eeca106725	665	*/
Kojto	122:f9eeca106725	666	#define LL_TIM_ACTIVEINPUT_DIRECTTI (uint32_t)(TIM_CCMR1_CC1S_0 << 16U) /!< ICx is mapped on TIx /
Kojto	122:f9eeca106725	667	#define LL_TIM_ACTIVEINPUT_INDIRECTTI (uint32_t)(TIM_CCMR1_CC1S_1 << 16U) /!< ICx is mapped on TIy /
Kojto	122:f9eeca106725	668	#define LL_TIM_ACTIVEINPUT_TRC (uint32_t)(TIM_CCMR1_CC1S << 16U) /!< ICx is mapped on TRC /
Kojto	122:f9eeca106725	669	/**
Kojto	122:f9eeca106725	670	* @}
Kojto	122:f9eeca106725	671	*/
Kojto	122:f9eeca106725	672
Kojto	122:f9eeca106725	673	/** @defgroup TIM_LL_EC_ICPSC Input Configuration Prescaler
Kojto	122:f9eeca106725	674	* @{
Kojto	122:f9eeca106725	675	*/
Kojto	122:f9eeca106725	676	#define LL_TIM_ICPSC_DIV1 ((uint32_t)0x00000000U) /!< No prescaler, capture is done each time an edge is detected on the capture input /
Kojto	122:f9eeca106725	677	#define LL_TIM_ICPSC_DIV2 (uint32_t)(TIM_CCMR1_IC1PSC_0 << 16U) /!< Capture is done once every 2 events /
Kojto	122:f9eeca106725	678	#define LL_TIM_ICPSC_DIV4 (uint32_t)(TIM_CCMR1_IC1PSC_1 << 16U) /!< Capture is done once every 4 events /
Kojto	122:f9eeca106725	679	#define LL_TIM_ICPSC_DIV8 (uint32_t)(TIM_CCMR1_IC1PSC << 16U) /!< Capture is done once every 8 events /
Kojto	122:f9eeca106725	680	/**
Kojto	122:f9eeca106725	681	* @}
Kojto	122:f9eeca106725	682	*/
Kojto	122:f9eeca106725	683
Kojto	122:f9eeca106725	684	/** @defgroup TIM_LL_EC_IC_FILTER Input Configuration Filter
Kojto	122:f9eeca106725	685	* @{
Kojto	122:f9eeca106725	686	*/
Kojto	122:f9eeca106725	687	#define LL_TIM_IC_FILTER_FDIV1 ((uint32_t)0x00000000U) /!< No filter, sampling is done at fDTS /
Kojto	122:f9eeca106725	688	#define LL_TIM_IC_FILTER_FDIV1_N2 (uint32_t)(TIM_CCMR1_IC1F_0 << 16U) /!< fSAMPLING=fCK_INT, N=2 /
Kojto	122:f9eeca106725	689	#define LL_TIM_IC_FILTER_FDIV1_N4 (uint32_t)(TIM_CCMR1_IC1F_1 << 16U) /!< fSAMPLING=fCK_INT, N=4 /
Kojto	122:f9eeca106725	690	#define LL_TIM_IC_FILTER_FDIV1_N8 (uint32_t)((TIM_CCMR1_IC1F_1 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fCK_INT, N=8 /
Kojto	122:f9eeca106725	691	#define LL_TIM_IC_FILTER_FDIV2_N6 (uint32_t)(TIM_CCMR1_IC1F_2 << 16U) /!< fSAMPLING=fDTS/2, N=6 /
Kojto	122:f9eeca106725	692	#define LL_TIM_IC_FILTER_FDIV2_N8 (uint32_t)((TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/2, N=8 /
Kojto	122:f9eeca106725	693	#define LL_TIM_IC_FILTER_FDIV4_N6 (uint32_t)((TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_1) << 16U) /!< fSAMPLING=fDTS/4, N=6 /
Kojto	122:f9eeca106725	694	#define LL_TIM_IC_FILTER_FDIV4_N8 (uint32_t)((TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_1 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/4, N=8 /
Kojto	122:f9eeca106725	695	#define LL_TIM_IC_FILTER_FDIV8_N6 (uint32_t)(TIM_CCMR1_IC1F_3 << 16U) /!< fSAMPLING=fDTS/8, N=6 /
Kojto	122:f9eeca106725	696	#define LL_TIM_IC_FILTER_FDIV8_N8 (uint32_t)((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/8, N=8 /
Kojto	122:f9eeca106725	697	#define LL_TIM_IC_FILTER_FDIV16_N5 (uint32_t)((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_1) << 16U) /!< fSAMPLING=fDTS/16, N=5 /
Kojto	122:f9eeca106725	698	#define LL_TIM_IC_FILTER_FDIV16_N6 (uint32_t)((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_1 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/16, N=6 /
Kojto	122:f9eeca106725	699	#define LL_TIM_IC_FILTER_FDIV16_N8 (uint32_t)((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_2) << 16U) /!< fSAMPLING=fDTS/16, N=8 /
Kojto	122:f9eeca106725	700	#define LL_TIM_IC_FILTER_FDIV32_N5 (uint32_t)((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/32, N=5 /
Kojto	122:f9eeca106725	701	#define LL_TIM_IC_FILTER_FDIV32_N6 (uint32_t)((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_1) << 16U) /!< fSAMPLING=fDTS/32, N=6 /
Kojto	122:f9eeca106725	702	#define LL_TIM_IC_FILTER_FDIV32_N8 (uint32_t)(TIM_CCMR1_IC1F << 16U) /!< fSAMPLING=fDTS/32, N=8 /
Kojto	122:f9eeca106725	703	/**
Kojto	122:f9eeca106725	704	* @}
Kojto	122:f9eeca106725	705	*/
Kojto	122:f9eeca106725	706
Kojto	122:f9eeca106725	707	/** @defgroup TIM_LL_EC_IC_POLARITY Input Configuration Polarity
Kojto	122:f9eeca106725	708	* @{
Kojto	122:f9eeca106725	709	*/
Kojto	122:f9eeca106725	710	#define LL_TIM_IC_POLARITY_RISING ((uint32_t)0x00000000U) /!< The circuit is sensitive to TIxFP1 rising edge, TIxFP1 is not inverted /
Kojto	122:f9eeca106725	711	#define LL_TIM_IC_POLARITY_FALLING TIM_CCER_CC1P /!< The circuit is sensitive to TIxFP1 falling edge, TIxFP1 is inverted /
Kojto	122:f9eeca106725	712	#define LL_TIM_IC_POLARITY_BOTHEDGE (TIM_CCER_CC1P \| TIM_CCER_CC1NP) /!< The circuit is sensitive to both TIxFP1 rising and falling edges, TIxFP1 is not inverted /
Kojto	122:f9eeca106725	713	/**
Kojto	122:f9eeca106725	714	* @}
Kojto	122:f9eeca106725	715	*/
Kojto	122:f9eeca106725	716
Kojto	122:f9eeca106725	717	/** @defgroup TIM_LL_EC_CLOCKSOURCE Clock Source
Kojto	122:f9eeca106725	718	* @{
Kojto	122:f9eeca106725	719	*/
Kojto	122:f9eeca106725	720	#define LL_TIM_CLOCKSOURCE_INTERNAL ((uint32_t)0x00000000U) /!< The timer is clocked by the internal clock provided from the RCC /
Kojto	122:f9eeca106725	721	#define LL_TIM_CLOCKSOURCE_EXT_MODE1 (TIM_SMCR_SMS_2 \| TIM_SMCR_SMS_1 \| TIM_SMCR_SMS_0 ) /!< Counter counts at each rising or falling edge on a selected inpu t/
Kojto	122:f9eeca106725	722	#define LL_TIM_CLOCKSOURCE_EXT_MODE2 TIM_SMCR_ECE /!< Counter counts at each rising or falling edge on the external trigger input ETR /
Kojto	122:f9eeca106725	723	/**
Kojto	122:f9eeca106725	724	* @}
Kojto	122:f9eeca106725	725	*/
Kojto	122:f9eeca106725	726
Kojto	122:f9eeca106725	727	/** @defgroup TIM_LL_EC_ENCODERMODE Encoder Mode
Kojto	122:f9eeca106725	728	* @{
Kojto	122:f9eeca106725	729	*/
Kojto	122:f9eeca106725	730	#define LL_TIM_ENCODERMODE_X2_TI1 TIM_SMCR_SMS_0 /!< Encoder mode 1 - Counter counts up/down on TI2FP2 edge depending on TI1FP1 level /
Kojto	122:f9eeca106725	731	#define LL_TIM_ENCODERMODE_X2_TI2 TIM_SMCR_SMS_1 /!< Encoder mode 2 - Counter counts up/down on TI1FP1 edge depending on TI2FP2 level /
Kojto	122:f9eeca106725	732	#define LL_TIM_ENCODERMODE_X4_TI12 (TIM_SMCR_SMS_1 \| TIM_SMCR_SMS_0) /!< Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input l /
Kojto	122:f9eeca106725	733	/**
Kojto	122:f9eeca106725	734	* @}
Kojto	122:f9eeca106725	735	*/
Kojto	122:f9eeca106725	736
Kojto	122:f9eeca106725	737	/** @defgroup TIM_LL_EC_TRGO Trigger Output
Kojto	122:f9eeca106725	738	* @{
Kojto	122:f9eeca106725	739	*/
Kojto	122:f9eeca106725	740	#define LL_TIM_TRGO_RESET ((uint32_t)0x00000000U) /!< UG bit from the TIMx_EGR register is used as trigger output /
Kojto	122:f9eeca106725	741	#define LL_TIM_TRGO_ENABLE TIM_CR2_MMS_0 /!< Counter Enable signal (CNT_EN) is used as trigger output /
Kojto	122:f9eeca106725	742	#define LL_TIM_TRGO_UPDATE TIM_CR2_MMS_1 /!< Update event is used as trigger output /
Kojto	122:f9eeca106725	743	#define LL_TIM_TRGO_CC1IF (TIM_CR2_MMS_1 \| TIM_CR2_MMS_0) /!< CC1 capture or a compare match is used as trigger output /
Kojto	122:f9eeca106725	744	#define LL_TIM_TRGO_OC1REF TIM_CR2_MMS_2 /!< OC1REF signal is used as trigger output /
Kojto	122:f9eeca106725	745	#define LL_TIM_TRGO_OC2REF (TIM_CR2_MMS_2 \| TIM_CR2_MMS_0) /!< OC2REF signal is used as trigger output /
Kojto	122:f9eeca106725	746	#define LL_TIM_TRGO_OC3REF (TIM_CR2_MMS_2 \| TIM_CR2_MMS_1) /!< OC3REF signal is used as trigger output /
Kojto	122:f9eeca106725	747	#define LL_TIM_TRGO_OC4REF (TIM_CR2_MMS_2 \| TIM_CR2_MMS_1 \| TIM_CR2_MMS_0) /!< OC4REF signal is used as trigger output /
Kojto	122:f9eeca106725	748	/**
Kojto	122:f9eeca106725	749	* @}
Kojto	122:f9eeca106725	750	*/
Kojto	122:f9eeca106725	751
Kojto	122:f9eeca106725	752	/** @defgroup TIM_LL_EC_TRGO2 Trigger Output 2
Kojto	122:f9eeca106725	753	* @{
Kojto	122:f9eeca106725	754	*/
Kojto	122:f9eeca106725	755	#define LL_TIM_TRGO2_RESET ((uint32_t)0x00000000U) /!< UG bit from the TIMx_EGR register is used as trigger output 2 /
Kojto	122:f9eeca106725	756	#define LL_TIM_TRGO2_ENABLE TIM_CR2_MMS2_0 /!< Counter Enable signal (CNT_EN) is used as trigger output 2 /
Kojto	122:f9eeca106725	757	#define LL_TIM_TRGO2_UPDATE TIM_CR2_MMS2_1 /!< Update event is used as trigger output 2 /
Kojto	122:f9eeca106725	758	#define LL_TIM_TRGO2_CC1F (TIM_CR2_MMS2_1 \| TIM_CR2_MMS2_0) /!< CC1 capture or a compare match is used as trigger output 2 /
Kojto	122:f9eeca106725	759	#define LL_TIM_TRGO2_OC1 TIM_CR2_MMS2_2 /!< OC1REF signal is used as trigger output 2 /
Kojto	122:f9eeca106725	760	#define LL_TIM_TRGO2_OC2 (TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_0) /!< OC2REF signal is used as trigger output 2 /
Kojto	122:f9eeca106725	761	#define LL_TIM_TRGO2_OC3 (TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_1) /!< OC3REF signal is used as trigger output 2 /
Kojto	122:f9eeca106725	762	#define LL_TIM_TRGO2_OC4 (TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_1 \| TIM_CR2_MMS2_0) /!< OC4REF signal is used as trigger output 2 /
Kojto	122:f9eeca106725	763	#define LL_TIM_TRGO2_OC5 TIM_CR2_MMS2_3 /!< OC5REF signal is used as trigger output 2 /
Kojto	122:f9eeca106725	764	#define LL_TIM_TRGO2_OC6 (TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_0) /!< OC6REF signal is used as trigger output 2 /
Kojto	122:f9eeca106725	765	#define LL_TIM_TRGO2_OC4_RISINGFALLING (TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_1) /!< OC4REF rising or falling edges are used as trigger output 2 /
Kojto	122:f9eeca106725	766	#define LL_TIM_TRGO2_OC6_RISINGFALLING (TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_1 \| TIM_CR2_MMS2_0) /!< OC6REF rising or falling edges are used as trigger output 2 /
Kojto	122:f9eeca106725	767	#define LL_TIM_TRGO2_OC4_RISING_OC6_RISING (TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_2) /!< OC4REF or OC6REF rising edges are used as trigger output 2 /
Kojto	122:f9eeca106725	768	#define LL_TIM_TRGO2_OC4_RISING_OC6_FALLING (TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_0) /!< OC4REF rising or OC6REF falling edges are used as trigger output 2 /
Kojto	122:f9eeca106725	769	#define LL_TIM_TRGO2_OC5_RISING_OC6_RISING (TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_2 \|TIM_CR2_MMS2_1) /!< OC5REF or OC6REF rising edges are used as trigger output 2 /
Kojto	122:f9eeca106725	770	#define LL_TIM_TRGO2_OC5_RISING_OC6_FALLING (TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_1 \| TIM_CR2_MMS2_0) /!< OC5REF rising or OC6REF falling edges are used as trigger output 2 /
Kojto	122:f9eeca106725	771	/**
Kojto	122:f9eeca106725	772	* @}
Kojto	122:f9eeca106725	773	*/
Kojto	122:f9eeca106725	774
Kojto	122:f9eeca106725	775	/** @defgroup TIM_LL_EC_SLAVEMODE Slave Mode
Kojto	122:f9eeca106725	776	* @{
Kojto	122:f9eeca106725	777	*/
Kojto	122:f9eeca106725	778	#define LL_TIM_SLAVEMODE_DISABLED ((uint32_t)0x00000000U) /!< Slave mode disabled /
Kojto	122:f9eeca106725	779	#define LL_TIM_SLAVEMODE_RESET TIM_SMCR_SMS_2 /!< Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter /
Kojto	122:f9eeca106725	780	#define LL_TIM_SLAVEMODE_GATED (TIM_SMCR_SMS_2 \| TIM_SMCR_SMS_0) /!< Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high /
Kojto	122:f9eeca106725	781	#define LL_TIM_SLAVEMODE_TRIGGER (TIM_SMCR_SMS_2 \| TIM_SMCR_SMS_1) /!< Trigger Mode - The counter starts at a rising edge of the trigger TRGI /
Kojto	122:f9eeca106725	782	#define LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER TIM_SMCR_SMS_3 /!< Combined reset + trigger mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter, generates an update of the registers and starts the counter /
Kojto	122:f9eeca106725	783	/**
Kojto	122:f9eeca106725	784	* @}
Kojto	122:f9eeca106725	785	*/
Kojto	122:f9eeca106725	786
Kojto	122:f9eeca106725	787	/** @defgroup TIM_LL_EC_TS Trigger Selection
Kojto	122:f9eeca106725	788	* @{
Kojto	122:f9eeca106725	789	*/
Kojto	122:f9eeca106725	790	#define LL_TIM_TS_ITR0 ((uint32_t)0x00000000U) /!< Internal Trigger 0 (ITR0) is used as trigger input /
Kojto	122:f9eeca106725	791	#define LL_TIM_TS_ITR1 TIM_SMCR_TS_0 /!< Internal Trigger 1 (ITR1) is used as trigger input /
Kojto	122:f9eeca106725	792	#define LL_TIM_TS_ITR2 TIM_SMCR_TS_1 /!< Internal Trigger 2 (ITR2) is used as trigger input /
Kojto	122:f9eeca106725	793	#define LL_TIM_TS_ITR3 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_1) /!< Internal Trigger 3 (ITR3) is used as trigger input /
Kojto	122:f9eeca106725	794	#define LL_TIM_TS_TI1F_ED TIM_SMCR_TS_2 /!< TI1 Edge Detector (TI1F_ED) is used as trigger input /
Kojto	122:f9eeca106725	795	#define LL_TIM_TS_TI1FP1 (TIM_SMCR_TS_2 \| TIM_SMCR_TS_0) /!< Filtered Timer Input 1 (TI1FP1) is used as trigger input /
Kojto	122:f9eeca106725	796	#define LL_TIM_TS_TI2FP2 (TIM_SMCR_TS_2 \| TIM_SMCR_TS_1) /!< Filtered Timer Input 2 (TI12P2) is used as trigger input /
Kojto	122:f9eeca106725	797	#define LL_TIM_TS_ETRF TIM_SMCR_TS /!< Filtered external Trigger (ETRF) is used as trigger input /
Kojto	122:f9eeca106725	798	/**
Kojto	122:f9eeca106725	799	* @}
Kojto	122:f9eeca106725	800	*/
Kojto	122:f9eeca106725	801
Kojto	122:f9eeca106725	802	/** @defgroup TIM_LL_EC_ETR_POLARITY External Trigger Polarity
Kojto	122:f9eeca106725	803	* @{
Kojto	122:f9eeca106725	804	*/
Kojto	122:f9eeca106725	805	#define LL_TIM_ETR_POLARITY_NONINVERTED ((uint32_t)0x00000000U) /!< ETR is non-inverted, active at high level or rising edge /
Kojto	122:f9eeca106725	806	#define LL_TIM_ETR_POLARITY_INVERTED TIM_SMCR_ETP /!< ETR is inverted, active at low level or falling edge /
Kojto	122:f9eeca106725	807	/**
Kojto	122:f9eeca106725	808	* @}
Kojto	122:f9eeca106725	809	*/
Kojto	122:f9eeca106725	810
Kojto	122:f9eeca106725	811	/** @defgroup TIM_LL_EC_ETR_PRESCALER External Trigger Prescaler
Kojto	122:f9eeca106725	812	* @{
Kojto	122:f9eeca106725	813	*/
Kojto	122:f9eeca106725	814	#define LL_TIM_ETR_PRESCALER_DIV1 ((uint32_t)0x00000000U) /!< ETR prescaler OFF /
Kojto	122:f9eeca106725	815	#define LL_TIM_ETR_PRESCALER_DIV2 TIM_SMCR_ETPS_0 /!< ETR frequency is divided by 2 /
Kojto	122:f9eeca106725	816	#define LL_TIM_ETR_PRESCALER_DIV4 TIM_SMCR_ETPS_1 /!< ETR frequency is divided by 4 /
Kojto	122:f9eeca106725	817	#define LL_TIM_ETR_PRESCALER_DIV8 TIM_SMCR_ETPS /!< ETR frequency is divided by 8 /
Kojto	122:f9eeca106725	818	/**
Kojto	122:f9eeca106725	819	* @}
Kojto	122:f9eeca106725	820	*/
Kojto	122:f9eeca106725	821
Kojto	122:f9eeca106725	822	/** @defgroup TIM_LL_EC_ETR_FILTER External Trigger Filter
Kojto	122:f9eeca106725	823	* @{
Kojto	122:f9eeca106725	824	*/
Kojto	122:f9eeca106725	825	#define LL_TIM_ETR_FILTER_FDIV1 ((uint32_t)0x00000000U) /!< No filter, sampling is done at fDTS /
Kojto	122:f9eeca106725	826	#define LL_TIM_ETR_FILTER_FDIV1_N2 TIM_SMCR_ETF_0 /!< fSAMPLING=fCK_INT, N=2 /
Kojto	122:f9eeca106725	827	#define LL_TIM_ETR_FILTER_FDIV1_N4 TIM_SMCR_ETF_1 /!< fSAMPLING=fCK_INT, N=4 /
Kojto	122:f9eeca106725	828	#define LL_TIM_ETR_FILTER_FDIV1_N8 (TIM_SMCR_ETF_1 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fCK_INT, N=8 /
Kojto	122:f9eeca106725	829	#define LL_TIM_ETR_FILTER_FDIV2_N6 TIM_SMCR_ETF_2 /!< fSAMPLING=fDTS/2, N=6 /
Kojto	122:f9eeca106725	830	#define LL_TIM_ETR_FILTER_FDIV2_N8 (TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/2, N=8 /
Kojto	122:f9eeca106725	831	#define LL_TIM_ETR_FILTER_FDIV4_N6 (TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_1 ) /!< fSAMPLING=fDTS/4, N=6 /
Kojto	122:f9eeca106725	832	#define LL_TIM_ETR_FILTER_FDIV4_N8 (TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_1 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/4, N=8 /
Kojto	122:f9eeca106725	833	#define LL_TIM_ETR_FILTER_FDIV8_N6 TIM_SMCR_ETF_3 /!< fSAMPLING=fDTS/8, N=8 /
Kojto	122:f9eeca106725	834	#define LL_TIM_ETR_FILTER_FDIV8_N8 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/16, N=5 /
Kojto	122:f9eeca106725	835	#define LL_TIM_ETR_FILTER_FDIV16_N5 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_1 ) /!< fSAMPLING=fDTS/16, N=6 /
Kojto	122:f9eeca106725	836	#define LL_TIM_ETR_FILTER_FDIV16_N6 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_1 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/16, N=8 /
Kojto	122:f9eeca106725	837	#define LL_TIM_ETR_FILTER_FDIV16_N8 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_2 ) /!< fSAMPLING=fDTS/16, N=5 /
Kojto	122:f9eeca106725	838	#define LL_TIM_ETR_FILTER_FDIV32_N5 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/32, N=5 /
Kojto	122:f9eeca106725	839	#define LL_TIM_ETR_FILTER_FDIV32_N6 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_1) /!< fSAMPLING=fDTS/32, N=6 /
Kojto	122:f9eeca106725	840	#define LL_TIM_ETR_FILTER_FDIV32_N8 TIM_SMCR_ETF /!< fSAMPLING=fDTS/32, N=8 /
Kojto	122:f9eeca106725	841	/**
Kojto	122:f9eeca106725	842	* @}
Kojto	122:f9eeca106725	843	*/
Kojto	122:f9eeca106725	844
Kojto	122:f9eeca106725	845	/** @defgroup TIM_LL_EC_ETRSOURCE External Trigger Source
Kojto	122:f9eeca106725	846	* @{
Kojto	122:f9eeca106725	847	*/
Kojto	122:f9eeca106725	848	#define LL_TIM_ETRSOURCE_LEGACY ((uint32_t)(0x00000000U)) /!< ETR legacy mode /
Kojto	122:f9eeca106725	849	#define LL_TIM_ETRSOURCE_COMP1 TIM1_OR2_ETRSEL_0 /!< COMP1 output connected to ETR input /
Kojto	122:f9eeca106725	850	#define LL_TIM_ETRSOURCE_COMP2 TIM1_OR2_ETRSEL_1 /!< COMP2 output connected to ETR input /
Kojto	122:f9eeca106725	851	/**
Kojto	122:f9eeca106725	852	* @}
Kojto	122:f9eeca106725	853	*/
Kojto	122:f9eeca106725	854
Kojto	122:f9eeca106725	855	/** @defgroup TIM_LL_EC_BREAK_POLARITY break polarity
Kojto	122:f9eeca106725	856	* @{
Kojto	122:f9eeca106725	857	*/
Kojto	122:f9eeca106725	858	#define LL_TIM_BREAK_POLARITY_LOW ((uint32_t)0x00000000U) /!< Break input BRK is active low /
Kojto	122:f9eeca106725	859	#define LL_TIM_BREAK_POLARITY_HIGH TIM_BDTR_BKP /!< Break input BRK is active high /
Kojto	122:f9eeca106725	860	/**
Kojto	122:f9eeca106725	861	* @}
Kojto	122:f9eeca106725	862	*/
Kojto	122:f9eeca106725	863
Kojto	122:f9eeca106725	864	/** @defgroup TIM_LL_EC_BREAK_FILTER break filter
Kojto	122:f9eeca106725	865	* @{
Kojto	122:f9eeca106725	866	*/
Kojto	122:f9eeca106725	867	#define LL_TIM_BREAK_FILTER_FDIV1 ((uint32_t)0x00000000U) /!< No filter, BRK acts asynchronously /
Kojto	122:f9eeca106725	868	#define LL_TIM_BREAK_FILTER_FDIV1_N2 ((uint32_t)0x00010000U) /!< fSAMPLING=fCK_INT, N=2 /
Kojto	122:f9eeca106725	869	#define LL_TIM_BREAK_FILTER_FDIV1_N4 ((uint32_t)0x00020000U) /!< fSAMPLING=fCK_INT, N=4 /
Kojto	122:f9eeca106725	870	#define LL_TIM_BREAK_FILTER_FDIV1_N8 ((uint32_t)0x00030000U) /!< fSAMPLING=fCK_INT, N=8 /
Kojto	122:f9eeca106725	871	#define LL_TIM_BREAK_FILTER_FDIV2_N6 ((uint32_t)0x00040000U) /!< fSAMPLING=fDTS/2, N=6 /
Kojto	122:f9eeca106725	872	#define LL_TIM_BREAK_FILTER_FDIV2_N8 ((uint32_t)0x00050000U) /!< fSAMPLING=fDTS/2, N=8 /
Kojto	122:f9eeca106725	873	#define LL_TIM_BREAK_FILTER_FDIV4_N6 ((uint32_t)0x00060000U) /!< fSAMPLING=fDTS/4, N=6 /
Kojto	122:f9eeca106725	874	#define LL_TIM_BREAK_FILTER_FDIV4_N8 ((uint32_t)0x00070000U) /!< fSAMPLING=fDTS/4, N=8 /
Kojto	122:f9eeca106725	875	#define LL_TIM_BREAK_FILTER_FDIV8_N6 ((uint32_t)0x00080000U) /!< fSAMPLING=fDTS/8, N=6 /
Kojto	122:f9eeca106725	876	#define LL_TIM_BREAK_FILTER_FDIV8_N8 ((uint32_t)0x00090000U) /!< fSAMPLING=fDTS/8, N=8 /
Kojto	122:f9eeca106725	877	#define LL_TIM_BREAK_FILTER_FDIV16_N5 ((uint32_t)0x000A0000U) /!< fSAMPLING=fDTS/16, N=5 /
Kojto	122:f9eeca106725	878	#define LL_TIM_BREAK_FILTER_FDIV16_N6 ((uint32_t)0x000B0000U) /!< fSAMPLING=fDTS/16, N=6 /
Kojto	122:f9eeca106725	879	#define LL_TIM_BREAK_FILTER_FDIV16_N8 ((uint32_t)0x000C0000U) /!< fSAMPLING=fDTS/16, N=8 /
Kojto	122:f9eeca106725	880	#define LL_TIM_BREAK_FILTER_FDIV32_N5 ((uint32_t)0x000D0000U) /!< fSAMPLING=fDTS/32, N=5 /
Kojto	122:f9eeca106725	881	#define LL_TIM_BREAK_FILTER_FDIV32_N6 ((uint32_t)0x000E0000U) /!< fSAMPLING=fDTS/32, N=6 /
Kojto	122:f9eeca106725	882	#define LL_TIM_BREAK_FILTER_FDIV32_N8 ((uint32_t)0x000F0000U) /!< fSAMPLING=fDTS/32, N=8 /
Kojto	122:f9eeca106725	883	/**
Kojto	122:f9eeca106725	884	* @}
Kojto	122:f9eeca106725	885	*/
Kojto	122:f9eeca106725	886
Kojto	122:f9eeca106725	887	/** @defgroup TIM_LL_EC_BREAK2_POLARITY BREAK2 POLARITY
Kojto	122:f9eeca106725	888	* @{
Kojto	122:f9eeca106725	889	*/
Kojto	122:f9eeca106725	890	#define LL_TIM_BREAK2_POLARITY_LOW ((uint32_t)0x00000000U) /!< Break input BRK2 is active low /
Kojto	122:f9eeca106725	891	#define LL_TIM_BREAK2_POLARITY_HIGH TIM_BDTR_BK2P /!< Break input BRK2 is active high /
Kojto	122:f9eeca106725	892	/**
Kojto	122:f9eeca106725	893	* @}
Kojto	122:f9eeca106725	894	*/
Kojto	122:f9eeca106725	895
Kojto	122:f9eeca106725	896	/** @defgroup TIM_LL_EC_BREAK2_FILTER BREAK2 FILTER
Kojto	122:f9eeca106725	897	* @{
Kojto	122:f9eeca106725	898	*/
Kojto	122:f9eeca106725	899	#define LL_TIM_BREAK2_FILTER_FDIV1 ((uint32_t)0x00000000U) /!< No filter, BRK acts asynchronously /
Kojto	122:f9eeca106725	900	#define LL_TIM_BREAK2_FILTER_FDIV1_N2 ((uint32_t)0x00100000U) /!< fSAMPLING=fCK_INT, N=2 /
Kojto	122:f9eeca106725	901	#define LL_TIM_BREAK2_FILTER_FDIV1_N4 ((uint32_t)0x00200000U) /!< fSAMPLING=fCK_INT, N=4 /
Kojto	122:f9eeca106725	902	#define LL_TIM_BREAK2_FILTER_FDIV1_N8 ((uint32_t)0x00300000U) /!< fSAMPLING=fCK_INT, N=8 /
Kojto	122:f9eeca106725	903	#define LL_TIM_BREAK2_FILTER_FDIV2_N6 ((uint32_t)0x00400000U) /!< fSAMPLING=fDTS/2, N=6 /
Kojto	122:f9eeca106725	904	#define LL_TIM_BREAK2_FILTER_FDIV2_N8 ((uint32_t)0x00500000U) /!< fSAMPLING=fDTS/2, N=8 /
Kojto	122:f9eeca106725	905	#define LL_TIM_BREAK2_FILTER_FDIV4_N6 ((uint32_t)0x00600000U) /!< fSAMPLING=fDTS/4, N=6 /
Kojto	122:f9eeca106725	906	#define LL_TIM_BREAK2_FILTER_FDIV4_N8 ((uint32_t)0x00700000U) /!< fSAMPLING=fDTS/4, N=8 /
Kojto	122:f9eeca106725	907	#define LL_TIM_BREAK2_FILTER_FDIV8_N6 ((uint32_t)0x00800000U) /!< fSAMPLING=fDTS/8, N=6 /
Kojto	122:f9eeca106725	908	#define LL_TIM_BREAK2_FILTER_FDIV8_N8 ((uint32_t)0x00900000U) /!< fSAMPLING=fDTS/8, N=8 /
Kojto	122:f9eeca106725	909	#define LL_TIM_BREAK2_FILTER_FDIV16_N5 ((uint32_t)0x00A00000U) /!< fSAMPLING=fDTS/16, N=5 /
Kojto	122:f9eeca106725	910	#define LL_TIM_BREAK2_FILTER_FDIV16_N6 ((uint32_t)0x00B00000U) /!< fSAMPLING=fDTS/16, N=6 /
Kojto	122:f9eeca106725	911	#define LL_TIM_BREAK2_FILTER_FDIV16_N8 ((uint32_t)0x00C00000U) /!< fSAMPLING=fDTS/16, N=8 /
Kojto	122:f9eeca106725	912	#define LL_TIM_BREAK2_FILTER_FDIV32_N5 ((uint32_t)0x00D00000U) /!< fSAMPLING=fDTS/32, N=5 /
Kojto	122:f9eeca106725	913	#define LL_TIM_BREAK2_FILTER_FDIV32_N6 ((uint32_t)0x00E00000U) /!< fSAMPLING=fDTS/32, N=6 /
Kojto	122:f9eeca106725	914	#define LL_TIM_BREAK2_FILTER_FDIV32_N8 ((uint32_t)0x00F00000U) /!< fSAMPLING=fDTS/32, N=8 /
Kojto	122:f9eeca106725	915	/**
Kojto	122:f9eeca106725	916	* @}
Kojto	122:f9eeca106725	917	*/
Kojto	122:f9eeca106725	918
Kojto	122:f9eeca106725	919	/** @defgroup TIM_LL_EC_OSSI OSSI
Kojto	122:f9eeca106725	920	* @{
Kojto	122:f9eeca106725	921	*/
Kojto	122:f9eeca106725	922	#define LL_TIM_OSSI_DISABLE ((uint32_t)0x00000000U) /!< When inactive, OCx/OCxN outputs are disabled /
Kojto	122:f9eeca106725	923	#define LL_TIM_OSSI_ENABLE TIM_BDTR_OSSI /!< When inactive, OxC/OCxN outputs are first forced with their inactive level then forced to their idle level after the deadtime /
Kojto	122:f9eeca106725	924	/**
Kojto	122:f9eeca106725	925	* @}
Kojto	122:f9eeca106725	926	*/
Kojto	122:f9eeca106725	927
Kojto	122:f9eeca106725	928	/** @defgroup TIM_LL_EC_OSSR OSSR
Kojto	122:f9eeca106725	929	* @{
Kojto	122:f9eeca106725	930	*/
Kojto	122:f9eeca106725	931	#define LL_TIM_OSSR_DISABLE ((uint32_t)0x00000000U) /!< When inactive, OCx/OCxN outputs are disabled /
Kojto	122:f9eeca106725	932	#define LL_TIM_OSSR_ENABLE TIM_BDTR_OSSR /!< When inactive, OC/OCN outputs are enabled with their inactive level as soon as CCxE=1 or CCxNE=1 /
Kojto	122:f9eeca106725	933	/**
Kojto	122:f9eeca106725	934	* @}
Kojto	122:f9eeca106725	935	*/
Kojto	122:f9eeca106725	936
Kojto	122:f9eeca106725	937	/** @defgroup TIM_LL_EC_BREAK_INPUT BREAK INPUT
Kojto	122:f9eeca106725	938	* @{
Kojto	122:f9eeca106725	939	*/
Kojto	122:f9eeca106725	940	#define LL_TIM_BREAK_INPUT_BKIN ((uint32_t)0x00000000U) /!< TIMx_BKIN input /
Kojto	122:f9eeca106725	941	#define LL_TIM_BREAK_INPUT_BKIN2 ((uint32_t)0x00000004U) /!< TIMx_BKIN2 input /
Kojto	122:f9eeca106725	942	/**
Kojto	122:f9eeca106725	943	* @}
Kojto	122:f9eeca106725	944	*/
Kojto	122:f9eeca106725	945
Kojto	122:f9eeca106725	946	/** @defgroup TIM_LL_EC_BKIN_SOURCE BKIN SOURCE
Kojto	122:f9eeca106725	947	* @{
Kojto	122:f9eeca106725	948	*/
Kojto	122:f9eeca106725	949	#define LL_TIM_BKIN_SOURCE_BKIN TIM1_OR2_BKINE /!< BKIN input from AF controller /
Kojto	122:f9eeca106725	950	#define LL_TIM_BKIN_SOURCE_BKCOMP1 TIM1_OR2_BKCMP1E /!< internal signal: COMP1 output /
Kojto	122:f9eeca106725	951	#define LL_TIM_BKIN_SOURCE_BKCOMP2 TIM1_OR2_BKCMP2E /!< internal signal: COMP2 output /
Kojto	122:f9eeca106725	952	#define LL_TIM_BKIN_SOURCE_DF1BK TIM1_OR2_BKDF1BK0E /!< internal signal: DFSDM1 break output /
Kojto	122:f9eeca106725	953	/**
Kojto	122:f9eeca106725	954	* @}
Kojto	122:f9eeca106725	955	*/
Kojto	122:f9eeca106725	956
Kojto	122:f9eeca106725	957	/** @defgroup TIM_LL_EC_BKIN_POLARITY BKIN POLARITY
Kojto	122:f9eeca106725	958	* @{
Kojto	122:f9eeca106725	959	*/
Kojto	122:f9eeca106725	960	#define LL_TIM_BKIN_POLARITY_LOW ((uint32_t)0x00000000U) /!< BRK BKIN input is active low /
Kojto	122:f9eeca106725	961	#define LL_TIM_BKIN_POLARITY_HIGH TIM1_OR2_BKINP /!< BRK BKIN input is active high /
Kojto	122:f9eeca106725	962	/**
Kojto	122:f9eeca106725	963	* @}
Kojto	122:f9eeca106725	964	*/
Kojto	122:f9eeca106725	965
Kojto	122:f9eeca106725	966	/** @defgroup TIM_LL_EC_DMABURST_BASEADDR DMA Burst Base Address
Kojto	122:f9eeca106725	967	* @{
Kojto	122:f9eeca106725	968	*/
Kojto	122:f9eeca106725	969	#define LL_TIM_DMABURST_BASEADDR_CR1 ((uint32_t)0x00000000U) /!< TIMx_CR1 register is the DMA base address for DMA burst / /!< TIMx_CR1 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	970	#define LL_TIM_DMABURST_BASEADDR_CR2 TIM_DCR_DBA_0 /!< TIMx_CR2 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	971	#define LL_TIM_DMABURST_BASEADDR_SMCR TIM_DCR_DBA_1 /!< TIMx_SMCR register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	972	#define LL_TIM_DMABURST_BASEADDR_DIER (TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_DIER register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	973	#define LL_TIM_DMABURST_BASEADDR_SR TIM_DCR_DBA_2 /!< TIMx_SR register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	974	#define LL_TIM_DMABURST_BASEADDR_EGR (TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) /!< TIMx_EGR register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	975	#define LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) /!< TIMx_CCMR1 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	976	#define LL_TIM_DMABURST_BASEADDR_CCMR2 (TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_CCMR2 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	977	#define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 /!< TIMx_CCER register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	978	#define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) /!< TIMx_CNT register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	979	#define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) /!< TIMx_PSC register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	980	#define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_ARR register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	981	#define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) /!< TIMx_RCR register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	982	#define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) /!< TIMx_CCR1 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	983	#define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) /!< TIMx_CCR2 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	984	#define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_CCR3 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	985	#define LL_TIM_DMABURST_BASEADDR_CCR4 TIM_DCR_DBA_4 /!< TIMx_CCR4 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	986	#define LL_TIM_DMABURST_BASEADDR_BDTR (TIM_DCR_DBA_4 \| TIM_DCR_DBA_0) /!< TIMx_BDTR register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	987	#define LL_TIM_DMABURST_BASEADDR_CCMR3 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_1) /!< TIMx_CCMR3 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	988	#define LL_TIM_DMABURST_BASEADDR_CCR5 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_CCR5 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	989	#define LL_TIM_DMABURST_BASEADDR_CCR6 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_2) /!< TIMx_CCR6 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	990	#define LL_TIM_DMABURST_BASEADDR_OR1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) /!< TIMx_OR1 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	991	#define LL_TIM_DMABURST_BASEADDR_OR2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) /!< TIMx_OR2 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	992	#define LL_TIM_DMABURST_BASEADDR_OR3 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_OR3 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	993	/**
Kojto	122:f9eeca106725	994	* @}
Kojto	122:f9eeca106725	995	*/
Kojto	122:f9eeca106725	996
Kojto	122:f9eeca106725	997	/** @defgroup TIM_LL_EC_DMABURST_LENGTH DMA Burst Length
Kojto	122:f9eeca106725	998	* @{
Kojto	122:f9eeca106725	999	*/
Kojto	122:f9eeca106725	1000	#define LL_TIM_DMABURST_LENGTH_1TRANSFER ((uint32_t)0x00000000U) /!< Transfer is done to 1 register starting from the DMA burst base address /
Kojto	122:f9eeca106725	1001	#define LL_TIM_DMABURST_LENGTH_2TRANSFERS TIM_DCR_DBL_0 /!< Transfer is done to 2 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1002	#define LL_TIM_DMABURST_LENGTH_3TRANSFERS TIM_DCR_DBL_1 /!< Transfer is done to 3 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1003	#define LL_TIM_DMABURST_LENGTH_4TRANSFERS (TIM_DCR_DBL_1 \| TIM_DCR_DBL_0) /!< Transfer is done to 4 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1004	#define LL_TIM_DMABURST_LENGTH_5TRANSFERS TIM_DCR_DBL_2 /!< Transfer is done to 5 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1005	#define LL_TIM_DMABURST_LENGTH_6TRANSFERS (TIM_DCR_DBL_2 \| TIM_DCR_DBL_0) /!< Transfer is done to 6 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1006	#define LL_TIM_DMABURST_LENGTH_7TRANSFERS (TIM_DCR_DBL_2 \| TIM_DCR_DBL_1) /!< Transfer is done to 7 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1007	#define LL_TIM_DMABURST_LENGTH_8TRANSFERS (TIM_DCR_DBL_2 \| TIM_DCR_DBL_1 \| TIM_DCR_DBL_0) /!< Transfer is done to 1 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1008	#define LL_TIM_DMABURST_LENGTH_9TRANSFERS TIM_DCR_DBL_3 /!< Transfer is done to 9 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1009	#define LL_TIM_DMABURST_LENGTH_10TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_0) /!< Transfer is done to 10 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1010	#define LL_TIM_DMABURST_LENGTH_11TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_1) /!< Transfer is done to 11 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1011	#define LL_TIM_DMABURST_LENGTH_12TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_1 \| TIM_DCR_DBL_0) /!< Transfer is done to 12 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1012	#define LL_TIM_DMABURST_LENGTH_13TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_2) /!< Transfer is done to 13 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1013	#define LL_TIM_DMABURST_LENGTH_14TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_2 \| TIM_DCR_DBL_0) /!< Transfer is done to 14 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1014	#define LL_TIM_DMABURST_LENGTH_15TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_2 \| TIM_DCR_DBL_1) /!< Transfer is done to 15 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1015	#define LL_TIM_DMABURST_LENGTH_16TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_2 \| TIM_DCR_DBL_1 \| TIM_DCR_DBL_0) /!< Transfer is done to 16 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1016	#define LL_TIM_DMABURST_LENGTH_17TRANSFERS TIM_DCR_DBL_4 /!< Transfer is done to 17 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1017	#define LL_TIM_DMABURST_LENGTH_18TRANSFERS (TIM_DCR_DBL_4 \| TIM_DCR_DBL_0) /!< Transfer is done to 18 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1018	/**
Kojto	122:f9eeca106725	1019	* @}
Kojto	122:f9eeca106725	1020	*/
Kojto	122:f9eeca106725	1021
Kojto	122:f9eeca106725	1022	/** @defgroup TIM_LL_EC_TIM1_ETR_ADC1_RMP TIM1 External Trigger ADC1 Remap
Kojto	122:f9eeca106725	1023	* @{
Kojto	122:f9eeca106725	1024	*/
Kojto	122:f9eeca106725	1025	#define LL_TIM_TIM1_ETR_ADC1_RMP_NC ((uint32_t)0x00000000U \| TIM1_OR1_RMP_MASK) /!< TIM1_ETR is not connected to ADC1 analog watchdog x /
Kojto	122:f9eeca106725	1026	#define LL_TIM_TIM1_ETR_ADC1_RMP_AWD1 (TIM1_OR1_ETR_ADC1_RMP_0 \| TIM1_OR1_RMP_MASK) /!< TIM1_ETR is connected to ADC1 analog watchdog 1 /
Kojto	122:f9eeca106725	1027	#define LL_TIM_TIM1_ETR_ADC1_RMP_AWD2 (TIM1_OR1_ETR_ADC1_RMP_1 \| TIM1_OR1_RMP_MASK) /!< TIM1_ETR is connected to ADC1 analog watchdog 2 /
Kojto	122:f9eeca106725	1028	#define LL_TIM_TIM1_ETR_ADC1_RMP_AWD3 (TIM1_OR1_ETR_ADC1_RMP \| TIM1_OR1_RMP_MASK) /!< TIM1_ETR is connected to ADC1 analog watchdog 3 /
Kojto	122:f9eeca106725	1029	/**
Kojto	122:f9eeca106725	1030	* @}
Kojto	122:f9eeca106725	1031	*/
Kojto	122:f9eeca106725	1032
Kojto	122:f9eeca106725	1033	/** @defgroup TIM_LL_EC_TIM1_ETR_ADC3_RMP TIM1 External Trigger ADC3 Remap
Kojto	122:f9eeca106725	1034	* @{
Kojto	122:f9eeca106725	1035	*/
Kojto	122:f9eeca106725	1036	#define LL_TIM_TIM1_ETR_ADC3_RMP_NC ((uint32_t)0x00000000U \| TIM1_OR1_RMP_MASK) /!< TIM1_ETR is not connected to ADC3 analog watchdog x/
Kojto	122:f9eeca106725	1037	#define LL_TIM_TIM1_ETR_ADC3_RMP_AWD1 (TIM1_OR1_ETR_ADC3_RMP_0 \| TIM1_OR1_RMP_MASK) /!< TIM1_ETR is connected to ADC3 analog watchdog 1 /
Kojto	122:f9eeca106725	1038	#define LL_TIM_TIM1_ETR_ADC3_RMP_AWD2 (TIM1_OR1_ETR_ADC3_RMP_1 \| TIM1_OR1_RMP_MASK) /!< TIM1_ETR is connected to ADC3 analog watchdog 2 /
Kojto	122:f9eeca106725	1039	#define LL_TIM_TIM1_ETR_ADC3_RMP_AWD3 (TIM1_OR1_ETR_ADC3_RMP \| TIM1_OR1_RMP_MASK) /!< TIM1_ETR is connected to ADC3 analog watchdog 3 /
Kojto	122:f9eeca106725	1040	/**
Kojto	122:f9eeca106725	1041	* @}
Kojto	122:f9eeca106725	1042	*/
Kojto	122:f9eeca106725	1043
Kojto	122:f9eeca106725	1044	/** @defgroup TIM_LL_EC_TIM1_TI1_RMP TIM1 External Input Ch1 Remap
Kojto	122:f9eeca106725	1045	* @{
Kojto	122:f9eeca106725	1046	*/
Kojto	122:f9eeca106725	1047	#define LL_TIM_TIM1_TI1_RMP_GPIO ((uint32_t)0x00000000U \| TIM1_OR1_RMP_MASK) /!< TIM1 input capture 1 is connected to GPIO /
Kojto	122:f9eeca106725	1048	#define LL_TIM_TIM1_TI1_RMP_COMP1 (TIM1_OR1_TI1_RMP \| TIM1_OR1_RMP_MASK) /!< TIM1 input capture 1 is connected to COMP1 output /
Kojto	122:f9eeca106725	1049	/**
Kojto	122:f9eeca106725	1050	* @}
Kojto	122:f9eeca106725	1051	*/
Kojto	122:f9eeca106725	1052
Kojto	122:f9eeca106725	1053	/** @defgroup TIM_LL_EC_TIM2_ITR1_RMP_TIM8 TIM2 Internal Trigger1 Remap TIM8
Kojto	122:f9eeca106725	1054	* @{
Kojto	122:f9eeca106725	1055	*/
Kojto	122:f9eeca106725	1056	#define LL_TIM_TIM2_ITR1_RMP_TIM8_TRGO ((uint32_t)0x00000000U \| TIM2_OR1_RMP_MASK) /!< TIM2_ITR1 is connected to TIM8_TRGO /
Kojto	122:f9eeca106725	1057	#define LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF (TIM2_OR1_ITR1_RMP \| TIM2_OR1_RMP_MASK) /!< TIM2_ITR1 is connected to OTG_FS SOF /
Kojto	122:f9eeca106725	1058	#define LL_TIM_TIM2_ETR_RMP_GPIO ((uint32_t)0x00000000U \| TIM2_OR1_RMP_MASK) /!< TIM2_ETR is connected to GPIO /
Kojto	122:f9eeca106725	1059	#define LL_TIM_TIM2_ETR_RMP_LSE (TIM2_OR1_ETR1_RMP \| TIM2_OR1_RMP_MASK) /!< TIM2_ETR is connected to LSE /
Kojto	122:f9eeca106725	1060	/**
Kojto	122:f9eeca106725	1061	* @}
Kojto	122:f9eeca106725	1062	*/
Kojto	122:f9eeca106725	1063
Kojto	122:f9eeca106725	1064	/** @defgroup TIM_LL_EC_TIM2_TI4_RMP TIM2 External Input Ch4 Remap
Kojto	122:f9eeca106725	1065	* @{
Kojto	122:f9eeca106725	1066	*/
Kojto	122:f9eeca106725	1067	#define LL_TIM_TIM2_TI4_RMP_GPIO ((uint32_t)0x00000000U \| TIM2_OR1_RMP_MASK) /!< TIM2 input capture 4 is connected to GPIO /
Kojto	122:f9eeca106725	1068	#define LL_TIM_TIM2_TI4_RMP_COMP1 (TIM2_OR1_TI4_RMP_0 \| TIM2_OR1_RMP_MASK) /!< TIM2 input capture 4 is connected to COMP1_OUT /
Kojto	122:f9eeca106725	1069	#define LL_TIM_TIM2_TI4_RMP_COMP2 (TIM2_OR1_TI4_RMP_1 \| TIM2_OR1_RMP_MASK) /!< TIM2 input capture 4 is connected to COMP2_OUT /
Kojto	122:f9eeca106725	1070	#define LL_TIM_TIM2_TI4_RMP_COMP1_COMP2 (TIM2_OR1_TI4_RMP \| TIM2_OR1_RMP_MASK) /!< TIM2 input capture 4 is connected to logical OR between COMP1_OUT and COMP2_OUT /
Kojto	122:f9eeca106725	1071	/**
Kojto	122:f9eeca106725	1072	* @}
Kojto	122:f9eeca106725	1073	*/
Kojto	122:f9eeca106725	1074
Kojto	122:f9eeca106725	1075	/** @defgroup TIM_LL_EC_TIM3_TI1_RMP TIM3 External Input Ch1 Remap
Kojto	122:f9eeca106725	1076	* @{
Kojto	122:f9eeca106725	1077	*/
Kojto	122:f9eeca106725	1078	#define LL_TIM_TIM3_TI1_RMP_GPIO ((uint32_t)0x00000000U \| TIM3_OR1_RMP_MASK) /!< TIM3 input capture 1 is connected to GPIO /
Kojto	122:f9eeca106725	1079	#define LL_TIM_TIM3_TI1_RMP_COMP1 (TIM3_OR1_TI1_RMP_0 \| TIM3_OR1_RMP_MASK) /!< TIM3 input capture 1 is connected to COMP1_OUT /
Kojto	122:f9eeca106725	1080	#define LL_TIM_TIM3_TI1_RMP_COMP2 (TIM3_OR1_TI1_RMP_1 \| TIM3_OR1_RMP_MASK) /!< TIM3 input capture 1 is connected to COMP2_OUT /
Kojto	122:f9eeca106725	1081	#define LL_TIM_TIM3_TI1_RMP_COMP1_COMP2 (TIM3_OR1_TI1_RMP \| TIM3_OR1_RMP_MASK) /!< TIM3 input capture 1 is connected to logical OR between COMP1_OUT and COMP2_OUT /
Kojto	122:f9eeca106725	1082	/**
Kojto	122:f9eeca106725	1083	* @}
Kojto	122:f9eeca106725	1084	*/
Kojto	122:f9eeca106725	1085
Kojto	122:f9eeca106725	1086	/** @defgroup TIM_LL_EC_TIM8_ETR_ADC2_RMP TIM8 External Trigger ADC2 Remap
Kojto	122:f9eeca106725	1087	* @{
Kojto	122:f9eeca106725	1088	*/
Kojto	122:f9eeca106725	1089	#define LL_TIM_TIM8_ETR_ADC2_RMP_NC ((uint32_t)0x00000000U \| TIM8_OR1_RMP_MASK) /!< TIM8_ETR is not connected to ADC2 analog watchdog x /
Kojto	122:f9eeca106725	1090	#define LL_TIM_TIM8_ETR_ADC2_RMP_AWD1 (TIM8_OR1_ETR_ADC2_RMP_0 \| TIM8_OR1_RMP_MASK) /!< TIM8_ETR is connected to ADC2 analog watchdog /
Kojto	122:f9eeca106725	1091	#define LL_TIM_TIM8_ETR_ADC2_RMP_AWD2 (TIM8_OR1_ETR_ADC2_RMP_1 \| TIM8_OR1_RMP_MASK) /!< TIM8_ETR is connected to ADC2 analog watchdog 2 /
Kojto	122:f9eeca106725	1092	#define LL_TIM_TIM8_ETR_ADC2_RMP_AWD3 (TIM8_OR1_ETR_ADC2_RMP \| TIM8_OR1_RMP_MASK) /!< TIM8_ETR is connected to ADC2 analog watchdog 3 /
Kojto	122:f9eeca106725	1093	/**
Kojto	122:f9eeca106725	1094	* @}
Kojto	122:f9eeca106725	1095	*/
Kojto	122:f9eeca106725	1096
Kojto	122:f9eeca106725	1097	/** @defgroup TIM_LL_EC_TIM8_ETR_ADC3_RMP TIM8 External Trigger ADC3 Remap
Kojto	122:f9eeca106725	1098	* @{
Kojto	122:f9eeca106725	1099	*/
Kojto	122:f9eeca106725	1100	#define LL_TIM_TIM8_ETR_ADC3_RMP_NC ((uint32_t)0x00000000U \| TIM8_OR1_RMP_MASK) /!< TIM8_ETR is not connected to ADC3 analog watchdog x /
Kojto	122:f9eeca106725	1101	#define LL_TIM_TIM8_ETR_ADC3_RMP_AWD1 (TIM8_OR1_ETR_ADC3_RMP_0 \| TIM8_OR1_RMP_MASK) /!< TIM8_ETR is connected to ADC3 analog watchdog 1 /
Kojto	122:f9eeca106725	1102	#define LL_TIM_TIM8_ETR_ADC3_RMP_AWD2 (TIM8_OR1_ETR_ADC3_RMP_1 \| TIM8_OR1_RMP_MASK) /!< TIM8_ETR is connected to ADC3 analog watchdog 2 /
Kojto	122:f9eeca106725	1103	#define LL_TIM_TIM8_ETR_ADC3_RMP_AWD3 (TIM8_OR1_ETR_ADC3_RMP \| TIM8_OR1_RMP_MASK) /!< TIM8_ETR is connected to ADC3 analog watchdog 3 /
Kojto	122:f9eeca106725	1104	/**
Kojto	122:f9eeca106725	1105	* @}
Kojto	122:f9eeca106725	1106	*/
Kojto	122:f9eeca106725	1107
Kojto	122:f9eeca106725	1108	/** @defgroup TIM_LL_EC_TIM8_TI1_RMP TIM8 External Input Ch1 Remap
Kojto	122:f9eeca106725	1109	* @{
Kojto	122:f9eeca106725	1110	*/
Kojto	122:f9eeca106725	1111	#define LL_TIM_TIM8_TI1_RMP_GPIO ((uint32_t)0x00000000U \| TIM8_OR1_RMP_MASK) /!< TIM8 input capture 1 is connected to GPIO /
Kojto	122:f9eeca106725	1112	#define LL_TIM_TIM8_TI1_RMP_COMP2 (TIM8_OR1_TI1_RMP \| TIM8_OR1_RMP_MASK) /!< TIM8 input capture 1 is connected to COMP2 output /
Kojto	122:f9eeca106725	1113	/**
Kojto	122:f9eeca106725	1114	* @}
Kojto	122:f9eeca106725	1115	*/
Kojto	122:f9eeca106725	1116
Kojto	122:f9eeca106725	1117	/** @defgroup TIM_LL_EC_TIM15_TI1_RMP TIM15 External Input Ch1 Remap
Kojto	122:f9eeca106725	1118	* @{
Kojto	122:f9eeca106725	1119	*/
Kojto	122:f9eeca106725	1120	#define LL_TIM_TIM15_TI1_RMP_GPIO ((uint32_t)0x00000000U \| TIM15_OR1_RMP_MASK) /!< TIM15 input capture 1 is connected to GPIO /
Kojto	122:f9eeca106725	1121	#define LL_TIM_TIM15_TI1_RMP_LSE (TIM15_OR1_TI1_RMP \| TIM15_OR1_RMP_MASK) /!< TIM15 input capture 1 is connected to LSE /
Kojto	122:f9eeca106725	1122	/**
Kojto	122:f9eeca106725	1123	* @}
Kojto	122:f9eeca106725	1124	*/
Kojto	122:f9eeca106725	1125
Kojto	122:f9eeca106725	1126	/** @defgroup TIM_LL_EC_TIM15_ENCODERMODE TIM15 ENCODERMODE
Kojto	122:f9eeca106725	1127	* @{
Kojto	122:f9eeca106725	1128	*/
Kojto	122:f9eeca106725	1129	#define LL_TIM_TIM15_ENCODERMODE_NOREDIRECTION ((uint32_t)0x00000000U \| TIM15_OR1_RMP_MASK) /!< No redirection/
Kojto	122:f9eeca106725	1130	#define LL_TIM_TIM15_ENCODERMODE_TIM2 (TIM15_OR1_ENCODER_MODE_0 \| TIM15_OR1_RMP_MASK) /!< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively /
Kojto	122:f9eeca106725	1131	#define LL_TIM_TIM15_ENCODERMODE_TIM3 (TIM15_OR1_ENCODER_MODE_1 \| TIM15_OR1_RMP_MASK) /!< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectivel y/
Kojto	122:f9eeca106725	1132	#define LL_TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE \| TIM15_OR1_RMP_MASK) /!< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively /
Kojto	122:f9eeca106725	1133	/**
Kojto	122:f9eeca106725	1134	* @}
Kojto	122:f9eeca106725	1135	*/
Kojto	122:f9eeca106725	1136
Kojto	122:f9eeca106725	1137	/** @defgroup TIM_LL_EC_TIM16_TI1_RMP TIM16 External Input Ch1 Remap
Kojto	122:f9eeca106725	1138	* @{
Kojto	122:f9eeca106725	1139	*/
Kojto	122:f9eeca106725	1140	#define LL_TIM_TIM16_TI1_RMP_GPIO ((uint32_t)0x00000000U \| TIM16_OR1_RMP_MASK) /!< TIM16 input capture 1 is connected to GPIO /
Kojto	122:f9eeca106725	1141	#define LL_TIM_TIM16_TI1_RMP_LSI (TIM16_OR1_TI1_RMP_0 \| TIM16_OR1_RMP_MASK) /!< TIM16 input capture 1 is connected to LSI /
Kojto	122:f9eeca106725	1142	#define LL_TIM_TIM16_TI1_RMP_LSE (TIM16_OR1_TI1_RMP_1 \| TIM16_OR1_RMP_MASK) /!< TIM16 input capture 1 is connected to LSE /
Kojto	122:f9eeca106725	1143	#define LL_TIM_TIM16_TI1_RMP_RTC (TIM16_OR1_TI1_RMP_1 \| TIM16_OR1_TI1_RMP_0 \| TIM16_OR1_RMP_MASK) /!< TIM16 input capture 1 is connected to RTC wakeup interrupt /
Kojto	122:f9eeca106725	1144	#if defined TIM16_OR1_TI1_RMP_2
Kojto	122:f9eeca106725	1145	#define LL_TIM_TIM16_TI1_RMP_MSI (TIM16_OR1_TI1_RMP_2 \| TIM16_OR1_RMP_MASK) /!< TIM16 input capture 1 is connected to MSI /
Kojto	122:f9eeca106725	1146	#define LL_TIM_TIM16_TI1_RMP_HSE_32 (TIM16_OR1_TI1_RMP_2 \| TIM16_OR1_TI1_RMP_0 \| TIM16_OR1_RMP_MASK) /!< TIM16 input capture 1 is connected to HSE/32 /
Kojto	122:f9eeca106725	1147	#define LL_TIM_TIM16_TI1_RMP_MCO (TIM16_OR1_TI1_RMP_2 \| TIM16_OR1_TI1_RMP_1 \| TIM16_OR1_RMP_MASK) /!< TIM16 input capture 1 is connected to MCO /
Kojto	122:f9eeca106725	1148	#endif
Kojto	122:f9eeca106725	1149	/**
Kojto	122:f9eeca106725	1150	* @}
Kojto	122:f9eeca106725	1151	*/
Kojto	122:f9eeca106725	1152
Kojto	122:f9eeca106725	1153	/** @defgroup TIM_LL_EC_TIM17_TI1_RMP TIM17 Timer Input Ch1 Remap
Kojto	122:f9eeca106725	1154	* @{
Kojto	122:f9eeca106725	1155	*/
Kojto	122:f9eeca106725	1156	#define LL_TIM_TIM17_TI1_RMP_GPIO ((uint32_t)0x00000000U \| TIM17_OR1_RMP_MASK) /!< TIM17 input capture 1 is connected to GPIO /
Kojto	122:f9eeca106725	1157	#define LL_TIM_TIM17_TI1_RMP_MSI (TIM17_OR1_TI1_RMP_0 \| TIM17_OR1_RMP_MASK) /!< TIM17 input capture 1 is connected to MSI /
Kojto	122:f9eeca106725	1158	#define LL_TIM_TIM17_TI1_RMP_HSE_32 (TIM17_OR1_TI1_RMP_1 \| TIM17_OR1_RMP_MASK) /!< TIM17 input capture 1 is connected to HSE/32 /
Kojto	122:f9eeca106725	1159	#define LL_TIM_TIM17_TI1_RMP_MCO (TIM17_OR1_TI1_RMP \| TIM17_OR1_RMP_MASK) /!< TIM17 input capture 1 is connected to MCO /
Kojto	122:f9eeca106725	1160	/**
Kojto	122:f9eeca106725	1161	* @}
Kojto	122:f9eeca106725	1162	*/
Kojto	122:f9eeca106725	1163
Kojto	122:f9eeca106725	1164	/** @defgroup TIM_LL_EC_OCREF_CLR_INT OCREF clear input selection
Kojto	122:f9eeca106725	1165	* @{
Kojto	122:f9eeca106725	1166	*/
Kojto	122:f9eeca106725	1167	#define LL_TIM_OCREF_CLR_INT_NC ((uint32_t)0x00000000U ) /!< OCREF_CLR_INT is not connected /
Kojto	122:f9eeca106725	1168	#define LL_TIM_OCREF_CLR_INT_ETR TIM_SMCR_OCCS /!< OCREF_CLR_INT is connected to ETRF /
Kojto	122:f9eeca106725	1169	/**
Kojto	122:f9eeca106725	1170	* @}
Kojto	122:f9eeca106725	1171	*/
Kojto	122:f9eeca106725	1172
Kojto	122:f9eeca106725	1173	/** Legacy definitions for compatibility purpose
Kojto	122:f9eeca106725	1174	@cond 0
Kojto	122:f9eeca106725	1175	*/
Kojto	122:f9eeca106725	1176	#define LL_TIM_BKIN_SOURCE_DFBK LL_TIM_BKIN_SOURCE_DF1BK
Kojto	122:f9eeca106725	1177	/**
Kojto	122:f9eeca106725	1178	@endcond
Kojto	122:f9eeca106725	1179	*/
Kojto	122:f9eeca106725	1180
Kojto	122:f9eeca106725	1181	/**
Kojto	122:f9eeca106725	1182	* @}
Kojto	122:f9eeca106725	1183	*/
Kojto	122:f9eeca106725	1184
Kojto	122:f9eeca106725	1185	/* Exported macro ------------------------------------------------------------*/
Kojto	122:f9eeca106725	1186	/** @defgroup TIM_LL_Exported_Macros TIM Exported Macros
Kojto	122:f9eeca106725	1187	* @{
Kojto	122:f9eeca106725	1188	*/
Kojto	122:f9eeca106725	1189
Kojto	122:f9eeca106725	1190	/** @defgroup TIM_LL_EM_WRITE_READ Common Write and read registers Macros
Kojto	122:f9eeca106725	1191	* @{
Kojto	122:f9eeca106725	1192	*/
Kojto	122:f9eeca106725	1193	/**
Kojto	122:f9eeca106725	1194	* @brief Write a value in TIM register.
Kojto	122:f9eeca106725	1195	* @param __INSTANCE__ TIM Instance
Kojto	122:f9eeca106725	1196	* @param __REG__ Register to be written
Kojto	122:f9eeca106725	1197	* @param __VALUE__ Value to be written in the register
Kojto	122:f9eeca106725	1198	* @retval None
Kojto	122:f9eeca106725	1199	*/
Kojto	122:f9eeca106725	1200	#define LL_TIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
Kojto	122:f9eeca106725	1201
Kojto	122:f9eeca106725	1202	/**
Kojto	122:f9eeca106725	1203	* @brief Read a value in TIM register.
Kojto	122:f9eeca106725	1204	* @param __INSTANCE__ TIM Instance
Kojto	122:f9eeca106725	1205	* @param __REG__ Register to be read
Kojto	122:f9eeca106725	1206	* @retval Register value
Kojto	122:f9eeca106725	1207	*/
Kojto	122:f9eeca106725	1208	#define LL_TIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
Kojto	122:f9eeca106725	1209	/**
Kojto	122:f9eeca106725	1210	* @}
Kojto	122:f9eeca106725	1211	*/
Kojto	122:f9eeca106725	1212
Kojto	122:f9eeca106725	1213	/** @defgroup TIM_LL_EM_Exported_Macros Exported_Macros
Kojto	122:f9eeca106725	1214	* @{
Kojto	122:f9eeca106725	1215	*/
Kojto	122:f9eeca106725	1216	/**
Kojto	122:f9eeca106725	1217	* @brief HELPER macro retrieving the UIFCPY flag from the counter value.
Kojto	122:f9eeca106725	1218	* @note ex: @ref __LL_TIM_GETFLAG_UIFCPY (@ref LL_TIM_GetCounter ());
Kojto	122:f9eeca106725	1219	* @note Relevant only if UIF flag remapping has been enabled (UIF status bit is copied
Kojto	122:f9eeca106725	1220	* to TIMx_CNT register bit 31)
Kojto	122:f9eeca106725	1221	* @param __CNT__ Counter value
Kojto	122:f9eeca106725	1222	* @retval UIF status bit
Kojto	122:f9eeca106725	1223	*/
Kojto	122:f9eeca106725	1224	#define __LL_TIM_GETFLAG_UIFCPY(__CNT__) \
Kojto	122:f9eeca106725	1225	(READ_BIT((__CNT__), TIM_CNT_UIFCPY) >> POSITION_VAL(TIM_CNT_UIFCPY))
Kojto	122:f9eeca106725	1226
Kojto	122:f9eeca106725	1227	/**
Kojto	122:f9eeca106725	1228	* @brief HELPER macro calculating DTG[0:7] in the TIMx_BDTR register to achieve the requested dead time duration.
Kojto	122:f9eeca106725	1229	* @note ex: @ref __LL_TIM_CALC_DEADTIME (80000000, @ref LL_TIM_GetClockDivision (), 120);
Kojto	122:f9eeca106725	1230	* @param __TIMCLK__ timer input clock frequency (in Hz)
Kojto	122:f9eeca106725	1231	* @param __CKD__ This parameter can be one of the following values:
Kojto	122:f9eeca106725	1232	* @arg @ref LL_TIM_CLOCKDIVISION_DIV1
Kojto	122:f9eeca106725	1233	* @arg @ref LL_TIM_CLOCKDIVISION_DIV2
Kojto	122:f9eeca106725	1234	* @arg @ref LL_TIM_CLOCKDIVISION_DIV4
Kojto	122:f9eeca106725	1235	* @param __DT__ deadtime duration (in ns)
Kojto	122:f9eeca106725	1236	* @retval DTG[0:7]
Kojto	122:f9eeca106725	1237	*/
Kojto	122:f9eeca106725	1238	#define __LL_TIM_CALC_DEADTIME(__TIMCLK__, __CKD__, __DT__) \
Kojto	122:f9eeca106725	1239	( (((uint64_t)((__DT__)1000U)) < ((DT_DELAY_1+1U) TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? (uint8_t)(((uint64_t)((__DT__)*1000U) / TIM_CALC_DTS((__TIMCLK__), (__CKD__))) & DT_DELAY_1) : \
Kojto	122:f9eeca106725	1240	(((uint64_t)((__DT__)1000U)) < (64U + (DT_DELAY_2+1U)) 2U * TIM_CALC_DTS((__TIMCLK__), (__CKD__))) ? (uint8_t)(DT_RANGE_2 \| ((uint8_t)((uint8_t)((((uint64_t)((__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 1U) - (uint8_t) 64U) & DT_DELAY_2)) :\
Kojto	122:f9eeca106725	1241	(((uint64_t)((__DT__)1000U)) < (32U + (DT_DELAY_3+1U)) 8U * TIM_CALC_DTS((__TIMCLK__), (__CKD__))) ? (uint8_t)(DT_RANGE_3 \| ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 3U) - (uint8_t) 32U) & DT_DELAY_3)) :\
Kojto	122:f9eeca106725	1242	(((uint64_t)((__DT__)1000U)) < (32U + (DT_DELAY_4+1U)) 16U * TIM_CALC_DTS((__TIMCLK__), (__CKD__))) ? (uint8_t)(DT_RANGE_4 \| ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 4U) - (uint8_t) 32U) & DT_DELAY_4)) :\
Kojto	122:f9eeca106725	1243	0U)
Kojto	122:f9eeca106725	1244
Kojto	122:f9eeca106725	1245	/**
Kojto	122:f9eeca106725	1246	* @brief HELPER macro calculating the prescaler value to achieve the required counter clock frequency.
Kojto	122:f9eeca106725	1247	* @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000);
Kojto	122:f9eeca106725	1248	* @param __TIMCLK__ timer input clock frequency (in Hz)
Kojto	122:f9eeca106725	1249	* @param __CNTCLK__ counter clock frequency (in Hz)
Kojto	122:f9eeca106725	1250	* @retval Prescaler value (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	1251	*/
Kojto	122:f9eeca106725	1252	#define __LL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \
Kojto	122:f9eeca106725	1253	((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((__TIMCLK__)/(__CNTCLK__) - 1U) : 0U
Kojto	122:f9eeca106725	1254
Kojto	122:f9eeca106725	1255	/**
Kojto	122:f9eeca106725	1256	* @brief HELPER macro calculating the auto-reload value to achieve the required output signal frequency.
Kojto	122:f9eeca106725	1257	* @note ex: @ref __LL_TIM_CALC_ARR (1000000, @ref LL_TIM_GetPrescaler (), 10000);
Kojto	122:f9eeca106725	1258	* @param __TIMCLK__ timer input clock frequency (in Hz)
Kojto	122:f9eeca106725	1259	* @param __PSC__ prescaler
Kojto	122:f9eeca106725	1260	* @param __FREQ__ output signal frequency (in Hz)
Kojto	122:f9eeca106725	1261	* @retval Auto-reload value (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	1262	*/
Kojto	122:f9eeca106725	1263	#define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \
Kojto	122:f9eeca106725	1264	(((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? ((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U)) - 1U) : 0U
Kojto	122:f9eeca106725	1265
Kojto	122:f9eeca106725	1266	/**
Kojto	122:f9eeca106725	1267	* @brief HELPER macro calculating the compare value required to achieve the required timer output compare active/inactive delay.
Kojto	122:f9eeca106725	1268	* @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10);
Kojto	122:f9eeca106725	1269	* @param __TIMCLK__ timer input clock frequency (in Hz)
Kojto	122:f9eeca106725	1270	* @param __PSC__ prescaler
Kojto	122:f9eeca106725	1271	* @param __DELAY__ timer output compare active/inactive delay (in us)
Kojto	122:f9eeca106725	1272	* @retval Compare value (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	1273	*/
Kojto	122:f9eeca106725	1274	#define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__) \
Kojto	122:f9eeca106725	1275	((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \
Kojto	122:f9eeca106725	1276	/ ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
Kojto	122:f9eeca106725	1277
Kojto	122:f9eeca106725	1278	/**
Kojto	122:f9eeca106725	1279	* @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration (when the timer operates in one pulse mode).
Kojto	122:f9eeca106725	1280	* @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20);
Kojto	122:f9eeca106725	1281	* @param __TIMCLK__ timer input clock frequency (in Hz)
Kojto	122:f9eeca106725	1282	* @param __PSC__ prescaler
Kojto	122:f9eeca106725	1283	* @param __DELAY__ timer output compare active/inactive delay (in us)
Kojto	122:f9eeca106725	1284	* @param __PULSE__ pulse duration (in us)
Kojto	122:f9eeca106725	1285	* @retval Auto-reload value (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	1286	*/
Kojto	122:f9eeca106725	1287	#define __LL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \
Kojto	122:f9eeca106725	1288	((uint32_t)(__LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__PULSE__)) \
Kojto	122:f9eeca106725	1289	+ __LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__DELAY__))))
Kojto	122:f9eeca106725	1290
Kojto	122:f9eeca106725	1291	/**
Kojto	122:f9eeca106725	1292	* @brief HELPER macro retrieving the ratio of the input capture prescaler
Kojto	122:f9eeca106725	1293	* @note ex: @ref __LL_TIM_GET_ICPSC_RATIO (@ref LL_TIM_IC_GetPrescaler ());
Kojto	122:f9eeca106725	1294	* @param __ICPSC__ This parameter can be one of the following values:
Kojto	122:f9eeca106725	1295	* @arg @ref LL_TIM_ICPSC_DIV1
Kojto	122:f9eeca106725	1296	* @arg @ref LL_TIM_ICPSC_DIV2
Kojto	122:f9eeca106725	1297	* @arg @ref LL_TIM_ICPSC_DIV4
Kojto	122:f9eeca106725	1298	* @arg @ref LL_TIM_ICPSC_DIV8
Kojto	122:f9eeca106725	1299	* @retval Input capture prescaler ratio (1, 2, 4 or 8)
Kojto	122:f9eeca106725	1300	*/
Kojto	122:f9eeca106725	1301	#define __LL_TIM_GET_ICPSC_RATIO(__ICPSC__) \
Kojto	122:f9eeca106725	1302	((uint32_t)((uint32_t)0x01U << (((__ICPSC__) >> 16U) >> TIM_POSITION_ICPSC)))
Kojto	122:f9eeca106725	1303
Kojto	122:f9eeca106725	1304
Kojto	122:f9eeca106725	1305	/**
Kojto	122:f9eeca106725	1306	* @}
Kojto	122:f9eeca106725	1307	*/
Kojto	122:f9eeca106725	1308
Kojto	122:f9eeca106725	1309
Kojto	122:f9eeca106725	1310	/**
Kojto	122:f9eeca106725	1311	* @}
Kojto	122:f9eeca106725	1312	*/
Kojto	122:f9eeca106725	1313
Kojto	122:f9eeca106725	1314	/* Exported functions --------------------------------------------------------*/
Kojto	122:f9eeca106725	1315	/** @defgroup TIM_LL_Exported_Functions TIM Exported Functions
Kojto	122:f9eeca106725	1316	* @{
Kojto	122:f9eeca106725	1317	*/
Kojto	122:f9eeca106725	1318
Kojto	122:f9eeca106725	1319	/** @defgroup TIM_LL_EF_Time_Base Time Base configuration
Kojto	122:f9eeca106725	1320	* @{
Kojto	122:f9eeca106725	1321	*/
Kojto	122:f9eeca106725	1322	/**
Kojto	122:f9eeca106725	1323	* @brief Enable timer counter.
Kojto	122:f9eeca106725	1324	* @rmtoll CR1 CEN LL_TIM_EnableCounter
Kojto	122:f9eeca106725	1325	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1326	* @retval None
Kojto	122:f9eeca106725	1327	*/
Kojto	122:f9eeca106725	1328	__STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1329	{
Kojto	122:f9eeca106725	1330	SET_BIT(TIMx->CR1, TIM_CR1_CEN);
Kojto	122:f9eeca106725	1331	}
Kojto	122:f9eeca106725	1332
Kojto	122:f9eeca106725	1333	/**
Kojto	122:f9eeca106725	1334	* @brief Disable timer counter.
Kojto	122:f9eeca106725	1335	* @rmtoll CR1 CEN LL_TIM_DisableCounter
Kojto	122:f9eeca106725	1336	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1337	* @retval None
Kojto	122:f9eeca106725	1338	*/
Kojto	122:f9eeca106725	1339	__STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1340	{
Kojto	122:f9eeca106725	1341	CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN);
Kojto	122:f9eeca106725	1342	}
Kojto	122:f9eeca106725	1343
Kojto	122:f9eeca106725	1344	/**
Kojto	122:f9eeca106725	1345	* @brief Indicates whether the timer counter is enabled.
Kojto	122:f9eeca106725	1346	* @rmtoll CR1 CEN LL_TIM_IsEnabledCounter
Kojto	122:f9eeca106725	1347	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1348	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1349	*/
Kojto	122:f9eeca106725	1350	__STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1351	{
Kojto	122:f9eeca106725	1352	return (READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN));
Kojto	122:f9eeca106725	1353	}
Kojto	122:f9eeca106725	1354
Kojto	122:f9eeca106725	1355	/**
Kojto	122:f9eeca106725	1356	* @brief Enable update event generation.
Kojto	122:f9eeca106725	1357	* @rmtoll CR1 UDIS LL_TIM_EnableUpdateEvent
Kojto	122:f9eeca106725	1358	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1359	* @retval None
Kojto	122:f9eeca106725	1360	*/
Kojto	122:f9eeca106725	1361	__STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1362	{
Kojto	122:f9eeca106725	1363	SET_BIT(TIMx->CR1, TIM_CR1_UDIS);
Kojto	122:f9eeca106725	1364	}
Kojto	122:f9eeca106725	1365
Kojto	122:f9eeca106725	1366	/**
Kojto	122:f9eeca106725	1367	* @brief Disable update event generation.
Kojto	122:f9eeca106725	1368	* @rmtoll CR1 UDIS LL_TIM_DisableUpdateEvent
Kojto	122:f9eeca106725	1369	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1370	* @retval None
Kojto	122:f9eeca106725	1371	*/
Kojto	122:f9eeca106725	1372	__STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1373	{
Kojto	122:f9eeca106725	1374	CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);
Kojto	122:f9eeca106725	1375	}
Kojto	122:f9eeca106725	1376
Kojto	122:f9eeca106725	1377	/**
Kojto	122:f9eeca106725	1378	* @brief Indicates whether update event generation is enabled.
Kojto	122:f9eeca106725	1379	* @rmtoll CR1 UDIS LL_TIM_IsEnabledUpdateEvent
Kojto	122:f9eeca106725	1380	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1381	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1382	*/
Kojto	122:f9eeca106725	1383	__STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1384	{
Kojto	122:f9eeca106725	1385	return (READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (TIM_CR1_UDIS));
Kojto	122:f9eeca106725	1386	}
Kojto	122:f9eeca106725	1387
Kojto	122:f9eeca106725	1388	/**
Kojto	122:f9eeca106725	1389	* @brief Set update event source
Kojto	122:f9eeca106725	1390	* @note Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events
Kojto	122:f9eeca106725	1391	* generate an update interrupt or DMA request if enabled:
Kojto	122:f9eeca106725	1392	* - Counter overflow/underflow
Kojto	122:f9eeca106725	1393	* - Setting the UG bit
Kojto	122:f9eeca106725	1394	* - Update generation through the slave mode controller
Kojto	122:f9eeca106725	1395	* @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter
Kojto	122:f9eeca106725	1396	* overflow/underflow generates an update interrupt or DMA request if enabled.
Kojto	122:f9eeca106725	1397	* @rmtoll CR1 URS LL_TIM_SetUpdateSource
Kojto	122:f9eeca106725	1398	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1399	* @param UpdateSource This parameter can be one of the following values:
Kojto	122:f9eeca106725	1400	* @arg @ref LL_TIM_UPDATESOURCE_REGULAR
Kojto	122:f9eeca106725	1401	* @arg @ref LL_TIM_UPDATESOURCE_COUNTER
Kojto	122:f9eeca106725	1402	* @retval None
Kojto	122:f9eeca106725	1403	*/
Kojto	122:f9eeca106725	1404	__STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef * TIMx, uint32_t UpdateSource)
Kojto	122:f9eeca106725	1405	{
Kojto	122:f9eeca106725	1406	MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource);
Kojto	122:f9eeca106725	1407	}
Kojto	122:f9eeca106725	1408
Kojto	122:f9eeca106725	1409	/**
Kojto	122:f9eeca106725	1410	* @brief Get actual event update source
Kojto	122:f9eeca106725	1411	* @rmtoll CR1 URS LL_TIM_GetUpdateSource
Kojto	122:f9eeca106725	1412	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1413	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1414	* @arg @ref LL_TIM_UPDATESOURCE_REGULAR
Kojto	122:f9eeca106725	1415	* @arg @ref LL_TIM_UPDATESOURCE_COUNTER
Kojto	122:f9eeca106725	1416	*/
Kojto	122:f9eeca106725	1417	__STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1418	{
Kojto	122:f9eeca106725	1419	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));
Kojto	122:f9eeca106725	1420	}
Kojto	122:f9eeca106725	1421
Kojto	122:f9eeca106725	1422	/**
Kojto	122:f9eeca106725	1423	* @brief Set one pulse mode (one shot v.s. repetitive).
Kojto	122:f9eeca106725	1424	* @rmtoll CR1 OPM LL_TIM_SetOnePulseMode
Kojto	122:f9eeca106725	1425	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1426	* @param OnePulseMode This parameter can be one of the following values:
Kojto	122:f9eeca106725	1427	* @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
Kojto	122:f9eeca106725	1428	* @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
Kojto	122:f9eeca106725	1429	* @retval None
Kojto	122:f9eeca106725	1430	*/
Kojto	122:f9eeca106725	1431	__STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef * TIMx, uint32_t OnePulseMode)
Kojto	122:f9eeca106725	1432	{
Kojto	122:f9eeca106725	1433	MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);
Kojto	122:f9eeca106725	1434	}
Kojto	122:f9eeca106725	1435
Kojto	122:f9eeca106725	1436	/**
Kojto	122:f9eeca106725	1437	* @brief Get actual one pulse mode.
Kojto	122:f9eeca106725	1438	* @rmtoll CR1 OPM LL_TIM_GetOnePulseMode
Kojto	122:f9eeca106725	1439	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1440	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1441	* @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
Kojto	122:f9eeca106725	1442	* @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
Kojto	122:f9eeca106725	1443	*/
Kojto	122:f9eeca106725	1444	__STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1445	{
Kojto	122:f9eeca106725	1446	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));
Kojto	122:f9eeca106725	1447	}
Kojto	122:f9eeca106725	1448
Kojto	122:f9eeca106725	1449	/**
Kojto	122:f9eeca106725	1450	* @brief Set the timer counter counting mode.
Kojto	122:f9eeca106725	1451	* @note Macro @ref IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
Kojto	122:f9eeca106725	1452	* check whether or not the counter mode selection feature is supported
Kojto	122:f9eeca106725	1453	* by a timer instance.
Kojto	122:f9eeca106725	1454	* @rmtoll CR1 DIR LL_TIM_SetCounterMode\n
Kojto	122:f9eeca106725	1455	* CR1 CMS LL_TIM_SetCounterMode
Kojto	122:f9eeca106725	1456	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1457	* @param CounterMode This parameter can be one of the following values:
Kojto	122:f9eeca106725	1458	* @arg @ref LL_TIM_COUNTERMODE_UP
Kojto	122:f9eeca106725	1459	* @arg @ref LL_TIM_COUNTERMODE_DOWN
Kojto	122:f9eeca106725	1460	* @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
Kojto	122:f9eeca106725	1461	* @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
Kojto	122:f9eeca106725	1462	* @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
Kojto	122:f9eeca106725	1463	* @retval None
Kojto	122:f9eeca106725	1464	*/
Kojto	122:f9eeca106725	1465	__STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef * TIMx, uint32_t CounterMode)
Kojto	122:f9eeca106725	1466	{
Kojto	122:f9eeca106725	1467	MODIFY_REG(TIMx->CR1, TIM_CR1_DIR \| TIM_CR1_CMS, CounterMode);
Kojto	122:f9eeca106725	1468	}
Kojto	122:f9eeca106725	1469
Kojto	122:f9eeca106725	1470	/**
Kojto	122:f9eeca106725	1471	* @brief Get actual counter mode.
Kojto	122:f9eeca106725	1472	* @note Macro @ref IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
Kojto	122:f9eeca106725	1473	* check whether or not the counter mode selection feature is supported
Kojto	122:f9eeca106725	1474	* by a timer instance.
Kojto	122:f9eeca106725	1475	* @rmtoll CR1 DIR LL_TIM_GetCounterMode\n
Kojto	122:f9eeca106725	1476	* CR1 CMS LL_TIM_GetCounterMode
Kojto	122:f9eeca106725	1477	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1478	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1479	* @arg @ref LL_TIM_COUNTERMODE_UP
Kojto	122:f9eeca106725	1480	* @arg @ref LL_TIM_COUNTERMODE_DOWN
Kojto	122:f9eeca106725	1481	* @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
Kojto	122:f9eeca106725	1482	* @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
Kojto	122:f9eeca106725	1483	* @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
Kojto	122:f9eeca106725	1484	*/
Kojto	122:f9eeca106725	1485	__STATIC_INLINE uint32_t LL_TIM_GetCounterMode(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1486	{
Kojto	122:f9eeca106725	1487	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR \| TIM_CR1_CMS));
Kojto	122:f9eeca106725	1488	}
Kojto	122:f9eeca106725	1489
Kojto	122:f9eeca106725	1490	/**
Kojto	122:f9eeca106725	1491	* @brief Enable auto-reload (ARR) preload.
Kojto	122:f9eeca106725	1492	* @rmtoll CR1 ARPE LL_TIM_EnableARRPreload
Kojto	122:f9eeca106725	1493	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1494	* @retval None
Kojto	122:f9eeca106725	1495	*/
Kojto	122:f9eeca106725	1496	__STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1497	{
Kojto	122:f9eeca106725	1498	SET_BIT(TIMx->CR1, TIM_CR1_ARPE);
Kojto	122:f9eeca106725	1499	}
Kojto	122:f9eeca106725	1500
Kojto	122:f9eeca106725	1501	/**
Kojto	122:f9eeca106725	1502	* @brief Disable auto-reload (ARR) preload.
Kojto	122:f9eeca106725	1503	* @rmtoll CR1 ARPE LL_TIM_DisableARRPreload
Kojto	122:f9eeca106725	1504	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1505	* @retval None
Kojto	122:f9eeca106725	1506	*/
Kojto	122:f9eeca106725	1507	__STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1508	{
Kojto	122:f9eeca106725	1509	CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);
Kojto	122:f9eeca106725	1510	}
Kojto	122:f9eeca106725	1511
Kojto	122:f9eeca106725	1512	/**
Kojto	122:f9eeca106725	1513	* @brief Indicates whether auto-reload (ARR) preload is enabled.
Kojto	122:f9eeca106725	1514	* @rmtoll CR1 ARPE LL_TIM_IsEnabledARRPreload
Kojto	122:f9eeca106725	1515	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1516	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1517	*/
Kojto	122:f9eeca106725	1518	__STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1519	{
Kojto	122:f9eeca106725	1520	return (READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE));
Kojto	122:f9eeca106725	1521	}
Kojto	122:f9eeca106725	1522
Kojto	122:f9eeca106725	1523	/**
Kojto	122:f9eeca106725	1524	* @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters.
Kojto	122:f9eeca106725	1525	* @note Macro @ref IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1526	* whether or not the clock division feature is supported by the timer
Kojto	122:f9eeca106725	1527	* instance.
Kojto	122:f9eeca106725	1528	* @rmtoll CR1 CKD LL_TIM_SetClockDivision
Kojto	122:f9eeca106725	1529	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1530	* @param ClockDivision This parameter can be one of the following values:
Kojto	122:f9eeca106725	1531	* @arg @ref LL_TIM_CLOCKDIVISION_DIV1
Kojto	122:f9eeca106725	1532	* @arg @ref LL_TIM_CLOCKDIVISION_DIV2
Kojto	122:f9eeca106725	1533	* @arg @ref LL_TIM_CLOCKDIVISION_DIV4
Kojto	122:f9eeca106725	1534	* @retval None
Kojto	122:f9eeca106725	1535	*/
Kojto	122:f9eeca106725	1536	__STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef * TIMx, uint32_t ClockDivision)
Kojto	122:f9eeca106725	1537	{
Kojto	122:f9eeca106725	1538	MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);
Kojto	122:f9eeca106725	1539	}
Kojto	122:f9eeca106725	1540
Kojto	122:f9eeca106725	1541	/**
Kojto	122:f9eeca106725	1542	* @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters.
Kojto	122:f9eeca106725	1543	* @note Macro @ref IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1544	* whether or not the clock division feature is supported by the timer
Kojto	122:f9eeca106725	1545	* instance.
Kojto	122:f9eeca106725	1546	* @rmtoll CR1 CKD LL_TIM_GetClockDivision
Kojto	122:f9eeca106725	1547	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1548	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1549	* @arg @ref LL_TIM_CLOCKDIVISION_DIV1
Kojto	122:f9eeca106725	1550	* @arg @ref LL_TIM_CLOCKDIVISION_DIV2
Kojto	122:f9eeca106725	1551	* @arg @ref LL_TIM_CLOCKDIVISION_DIV4
Kojto	122:f9eeca106725	1552	*/
Kojto	122:f9eeca106725	1553	__STATIC_INLINE uint32_t LL_TIM_GetClockDivision(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1554	{
Kojto	122:f9eeca106725	1555	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));
Kojto	122:f9eeca106725	1556	}
Kojto	122:f9eeca106725	1557
Kojto	122:f9eeca106725	1558	/**
Kojto	122:f9eeca106725	1559	* @brief Set the counter value.
Kojto	122:f9eeca106725	1560	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1561	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	1562	* @rmtoll CNT CNT LL_TIM_SetCounter
Kojto	122:f9eeca106725	1563	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1564	* @param Counter Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)
Kojto	122:f9eeca106725	1565	* @retval None
Kojto	122:f9eeca106725	1566	*/
Kojto	122:f9eeca106725	1567	__STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef * TIMx, uint32_t Counter)
Kojto	122:f9eeca106725	1568	{
Kojto	122:f9eeca106725	1569	WRITE_REG(TIMx->CNT, Counter);
Kojto	122:f9eeca106725	1570	}
Kojto	122:f9eeca106725	1571
Kojto	122:f9eeca106725	1572	/**
Kojto	122:f9eeca106725	1573	* @brief Get the counter value.
Kojto	122:f9eeca106725	1574	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1575	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	1576	* @rmtoll CNT CNT LL_TIM_GetCounter
Kojto	122:f9eeca106725	1577	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1578	* @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)
Kojto	122:f9eeca106725	1579	*/
Kojto	122:f9eeca106725	1580	__STATIC_INLINE uint32_t LL_TIM_GetCounter(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1581	{
Kojto	122:f9eeca106725	1582	return (uint32_t)(READ_REG(TIMx->CNT));
Kojto	122:f9eeca106725	1583	}
Kojto	122:f9eeca106725	1584
Kojto	122:f9eeca106725	1585	/**
Kojto	122:f9eeca106725	1586	* @brief Get the current direction of the counter
Kojto	122:f9eeca106725	1587	* @rmtoll CR1 DIR LL_TIM_GetDirection
Kojto	122:f9eeca106725	1588	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1589	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1590	* @arg @ref LL_TIM_COUNTERDIRECTION_UP
Kojto	122:f9eeca106725	1591	* @arg @ref LL_TIM_COUNTERDIRECTION_DOWN
Kojto	122:f9eeca106725	1592	*/
Kojto	122:f9eeca106725	1593	__STATIC_INLINE uint32_t LL_TIM_GetDirection(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1594	{
Kojto	122:f9eeca106725	1595	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
Kojto	122:f9eeca106725	1596	}
Kojto	122:f9eeca106725	1597
Kojto	122:f9eeca106725	1598	/**
Kojto	122:f9eeca106725	1599	* @brief Set the prescaler value.
Kojto	122:f9eeca106725	1600	* @note The counter clock frequency CK_CNT is equal to fCK_PSC / (PSC[15:0] + 1).
Kojto	122:f9eeca106725	1601	* @note The prescaler can be changed on the fly as this control register is buffered. The new
Kojto	122:f9eeca106725	1602	* prescaler ratio is taken into account at the next update event.
Kojto	122:f9eeca106725	1603	* @note Helper macro @ref __LL_TIM_CALC_PSC can be used to calculate the Prescaler parameter
Kojto	122:f9eeca106725	1604	* @rmtoll PSC PSC LL_TIM_SetPrescaler
Kojto	122:f9eeca106725	1605	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1606	* @param Prescaler between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	1607	* @retval None
Kojto	122:f9eeca106725	1608	*/
Kojto	122:f9eeca106725	1609	__STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef * TIMx, uint32_t Prescaler)
Kojto	122:f9eeca106725	1610	{
Kojto	122:f9eeca106725	1611	WRITE_REG(TIMx->PSC, Prescaler);
Kojto	122:f9eeca106725	1612	}
Kojto	122:f9eeca106725	1613
Kojto	122:f9eeca106725	1614	/**
Kojto	122:f9eeca106725	1615	* @brief Get the prescaler value.
Kojto	122:f9eeca106725	1616	* @rmtoll PSC PSC LL_TIM_GetPrescaler
Kojto	122:f9eeca106725	1617	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1618	* @retval Prescaler value between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	1619	*/
Kojto	122:f9eeca106725	1620	__STATIC_INLINE uint32_t LL_TIM_GetPrescaler(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1621	{
Kojto	122:f9eeca106725	1622	return (uint32_t)(READ_REG(TIMx->PSC));
Kojto	122:f9eeca106725	1623	}
Kojto	122:f9eeca106725	1624
Kojto	122:f9eeca106725	1625	/**
Kojto	122:f9eeca106725	1626	* @brief Set the auto-reload value.
Kojto	122:f9eeca106725	1627	* @note The counter is blocked while the auto-reload value is null.
Kojto	122:f9eeca106725	1628	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1629	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	1630	* @note Helper macro @ref __LL_TIM_CALC_ARR can be used to calculate the AutoReload parameter
Kojto	122:f9eeca106725	1631	* @rmtoll ARR ARR LL_TIM_SetAutoReload
Kojto	122:f9eeca106725	1632	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1633	* @param AutoReload between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	1634	* @retval None
Kojto	122:f9eeca106725	1635	*/
Kojto	122:f9eeca106725	1636	__STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef * TIMx, uint32_t AutoReload)
Kojto	122:f9eeca106725	1637	{
Kojto	122:f9eeca106725	1638	WRITE_REG(TIMx->ARR, AutoReload);
Kojto	122:f9eeca106725	1639	}
Kojto	122:f9eeca106725	1640
Kojto	122:f9eeca106725	1641	/**
Kojto	122:f9eeca106725	1642	* @brief Get the auto-reload value.
Kojto	122:f9eeca106725	1643	* @rmtoll ARR ARR LL_TIM_GetAutoReload
Kojto	122:f9eeca106725	1644	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1645	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	1646	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1647	* @retval Auto-reload value
Kojto	122:f9eeca106725	1648	*/
Kojto	122:f9eeca106725	1649	__STATIC_INLINE uint32_t LL_TIM_GetAutoReload(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1650	{
Kojto	122:f9eeca106725	1651	return (uint32_t)(READ_REG(TIMx->ARR));
Kojto	122:f9eeca106725	1652	}
Kojto	122:f9eeca106725	1653
Kojto	122:f9eeca106725	1654	/**
Kojto	122:f9eeca106725	1655	* @brief Set the repetition counter value.
Kojto	122:f9eeca106725	1656	* @note For advanced timer instances RepetitionCounter can be up to 65535.
Kojto	122:f9eeca106725	1657	* @note Macro @ref IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1658	* whether or not a timer instance supports a repetition counter.
Kojto	122:f9eeca106725	1659	* @rmtoll RCR REP LL_TIM_SetRepetitionCounter
Kojto	122:f9eeca106725	1660	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1661	* @param RepetitionCounter between Min_Data=0 and Max_Data=255
Kojto	122:f9eeca106725	1662	* @retval None
Kojto	122:f9eeca106725	1663	*/
Kojto	122:f9eeca106725	1664	__STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef * TIMx, uint32_t RepetitionCounter)
Kojto	122:f9eeca106725	1665	{
Kojto	122:f9eeca106725	1666	WRITE_REG(TIMx->RCR, RepetitionCounter);
Kojto	122:f9eeca106725	1667	}
Kojto	122:f9eeca106725	1668
Kojto	122:f9eeca106725	1669	/**
Kojto	122:f9eeca106725	1670	* @brief Get the repetition counter value.
Kojto	122:f9eeca106725	1671	* @note Macro @ref IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1672	* whether or not a timer instance supports a repetition counter.
Kojto	122:f9eeca106725	1673	* @rmtoll RCR REP LL_TIM_GetRepetitionCounter
Kojto	122:f9eeca106725	1674	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1675	* @retval Repetition counter value
Kojto	122:f9eeca106725	1676	*/
Kojto	122:f9eeca106725	1677	__STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1678	{
Kojto	122:f9eeca106725	1679	return (uint32_t)(READ_REG(TIMx->RCR));
Kojto	122:f9eeca106725	1680	}
Kojto	122:f9eeca106725	1681
Kojto	122:f9eeca106725	1682	/**
Kojto	122:f9eeca106725	1683	* @brief Force a continuous copy of the update interrupt flag (UIF) into the timer counter register (bit 31).
Kojto	122:f9eeca106725	1684	* @note This allows both the counter value and a potential roll-over condition signalled by the UIFCPY flag to be read in an atomic way.
Kojto	122:f9eeca106725	1685	* @rmtoll CR1 UIFREMAP LL_TIM_EnableUIFRemap
Kojto	122:f9eeca106725	1686	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1687	* @retval None
Kojto	122:f9eeca106725	1688	*/
Kojto	122:f9eeca106725	1689	__STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1690	{
Kojto	122:f9eeca106725	1691	SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
Kojto	122:f9eeca106725	1692	}
Kojto	122:f9eeca106725	1693
Kojto	122:f9eeca106725	1694	/**
Kojto	122:f9eeca106725	1695	* @brief Disable update interrupt flag (UIF) remapping.
Kojto	122:f9eeca106725	1696	* @rmtoll CR1 UIFREMAP LL_TIM_DisableUIFRemap
Kojto	122:f9eeca106725	1697	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1698	* @retval None
Kojto	122:f9eeca106725	1699	*/
Kojto	122:f9eeca106725	1700	__STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1701	{
Kojto	122:f9eeca106725	1702	CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
Kojto	122:f9eeca106725	1703	}
Kojto	122:f9eeca106725	1704
Kojto	122:f9eeca106725	1705	/**
Kojto	122:f9eeca106725	1706	* @}
Kojto	122:f9eeca106725	1707	*/
Kojto	122:f9eeca106725	1708
Kojto	122:f9eeca106725	1709	/** @defgroup TIM_LL_EF_Capture_Compare Capture Compare configuration
Kojto	122:f9eeca106725	1710	* @{
Kojto	122:f9eeca106725	1711	*/
Kojto	122:f9eeca106725	1712	/**
Kojto	122:f9eeca106725	1713	* @brief Enable the capture/compare control bits (CCxE, CCxNE and OCxM) preload.
Kojto	122:f9eeca106725	1714	* @note CCxE, CCxNE and OCxM bits are preloaded, after having been written,
Kojto	122:f9eeca106725	1715	* they are updated only when a commutation event (COM) occurs.
Kojto	122:f9eeca106725	1716	* @note Only on channels that have a complementary output.
Kojto	122:f9eeca106725	1717	* @note Macro @ref IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1718	* whether or not a timer instance is able to generate a commutation event.
Kojto	122:f9eeca106725	1719	* @rmtoll CR2 CCPC LL_TIM_CC_EnablePreload
Kojto	122:f9eeca106725	1720	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1721	* @retval None
Kojto	122:f9eeca106725	1722	*/
Kojto	122:f9eeca106725	1723	__STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1724	{
Kojto	122:f9eeca106725	1725	SET_BIT(TIMx->CR2, TIM_CR2_CCPC);
Kojto	122:f9eeca106725	1726	}
Kojto	122:f9eeca106725	1727
Kojto	122:f9eeca106725	1728	/**
Kojto	122:f9eeca106725	1729	* @brief Disable the capture/compare control bits (CCxE, CCxNE and OCxM) preload.
Kojto	122:f9eeca106725	1730	* @note Macro @ref IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1731	* whether or not a timer instance is able to generate a commutation event.
Kojto	122:f9eeca106725	1732	* @rmtoll CR2 CCPC LL_TIM_CC_DisablePreload
Kojto	122:f9eeca106725	1733	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1734	* @retval None
Kojto	122:f9eeca106725	1735	*/
Kojto	122:f9eeca106725	1736	__STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1737	{
Kojto	122:f9eeca106725	1738	CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);
Kojto	122:f9eeca106725	1739	}
Kojto	122:f9eeca106725	1740
Kojto	122:f9eeca106725	1741	/**
Kojto	122:f9eeca106725	1742	* @brief Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM).
Kojto	122:f9eeca106725	1743	* @note Macro @ref IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1744	* whether or not a timer instance is able to generate a commutation event.
Kojto	122:f9eeca106725	1745	* @rmtoll CR2 CCUS LL_TIM_CC_SetUpdate
Kojto	122:f9eeca106725	1746	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1747	* @param CCUpdateSource This parameter can be one of the following values:
Kojto	122:f9eeca106725	1748	* @arg @ref LL_TIM_CCUPDATESOURCE_COMG_ONLY
Kojto	122:f9eeca106725	1749	* @arg @ref LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI
Kojto	122:f9eeca106725	1750	* @retval None
Kojto	122:f9eeca106725	1751	*/
Kojto	122:f9eeca106725	1752	__STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef * TIMx, uint32_t CCUpdateSource)
Kojto	122:f9eeca106725	1753	{
Kojto	122:f9eeca106725	1754	MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource);
Kojto	122:f9eeca106725	1755	}
Kojto	122:f9eeca106725	1756
Kojto	122:f9eeca106725	1757	/**
Kojto	122:f9eeca106725	1758	* @brief Set the trigger of the capture/compare DMA request.
Kojto	122:f9eeca106725	1759	* @rmtoll CR2 CCDS LL_TIM_CC_SetDMAReqTrigger
Kojto	122:f9eeca106725	1760	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1761	* @param DMAReqTrigger This parameter can be one of the following values:
Kojto	122:f9eeca106725	1762	* @arg @ref LL_TIM_CCDMAREQUEST_CC
Kojto	122:f9eeca106725	1763	* @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
Kojto	122:f9eeca106725	1764	* @retval None
Kojto	122:f9eeca106725	1765	*/
Kojto	122:f9eeca106725	1766	__STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef * TIMx, uint32_t DMAReqTrigger)
Kojto	122:f9eeca106725	1767	{
Kojto	122:f9eeca106725	1768	MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger);
Kojto	122:f9eeca106725	1769	}
Kojto	122:f9eeca106725	1770
Kojto	122:f9eeca106725	1771	/**
Kojto	122:f9eeca106725	1772	* @brief Get actual trigger of the capture/compare DMA request.
Kojto	122:f9eeca106725	1773	* @rmtoll CR2 CCDS LL_TIM_CC_GetDMAReqTrigger
Kojto	122:f9eeca106725	1774	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1775	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1776	* @arg @ref LL_TIM_CCDMAREQUEST_CC
Kojto	122:f9eeca106725	1777	* @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
Kojto	122:f9eeca106725	1778	*/
Kojto	122:f9eeca106725	1779	__STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	1780	{
Kojto	122:f9eeca106725	1781	return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));
Kojto	122:f9eeca106725	1782	}
Kojto	122:f9eeca106725	1783
Kojto	122:f9eeca106725	1784	/**
Kojto	122:f9eeca106725	1785	* @brief Set the lock level to freeze the
Kojto	122:f9eeca106725	1786	* configuration of several capture/compare parameters.
Kojto	122:f9eeca106725	1787	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	1788	* the lock mechanism is supported by a timer instance.
Kojto	122:f9eeca106725	1789	* @rmtoll BDTR LOCK LL_TIM_CC_SetLockLevel
Kojto	122:f9eeca106725	1790	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1791	* @param LockLevel This parameter can be one of the following values:
Kojto	122:f9eeca106725	1792	* @arg @ref LL_TIM_LOCKLEVEL_OFF
Kojto	122:f9eeca106725	1793	* @arg @ref LL_TIM_LOCKLEVEL_1
Kojto	122:f9eeca106725	1794	* @arg @ref LL_TIM_LOCKLEVEL_2
Kojto	122:f9eeca106725	1795	* @arg @ref LL_TIM_LOCKLEVEL_3
Kojto	122:f9eeca106725	1796	* @retval None
Kojto	122:f9eeca106725	1797	*/
Kojto	122:f9eeca106725	1798	__STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef * TIMx, uint32_t LockLevel)
Kojto	122:f9eeca106725	1799	{
Kojto	122:f9eeca106725	1800	MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);
Kojto	122:f9eeca106725	1801	}
Kojto	122:f9eeca106725	1802
Kojto	122:f9eeca106725	1803	/**
Kojto	122:f9eeca106725	1804	* @brief Enable capture/compare channels.
Kojto	122:f9eeca106725	1805	* @rmtoll CCER CC1E LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1806	* CCER CC1NE LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1807	* CCER CC2E LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1808	* CCER CC2NE LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1809	* CCER CC3E LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1810	* CCER CC3NE LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1811	* CCER CC4E LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1812	* CCER CC5E LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1813	* CCER CC6E LL_TIM_CC_EnableChannel
Kojto	122:f9eeca106725	1814	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1815	* @param Channels This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	1816	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	1817	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	1818	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	1819	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	1820	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	1821	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	1822	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	1823	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	1824	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	1825	* @retval None
Kojto	122:f9eeca106725	1826	*/
Kojto	122:f9eeca106725	1827	__STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef * TIMx, uint32_t Channels)
Kojto	122:f9eeca106725	1828	{
Kojto	122:f9eeca106725	1829	SET_BIT(TIMx->CCER, Channels);
Kojto	122:f9eeca106725	1830	}
Kojto	122:f9eeca106725	1831
Kojto	122:f9eeca106725	1832	/**
Kojto	122:f9eeca106725	1833	* @brief Disable capture/compare channels.
Kojto	122:f9eeca106725	1834	* @rmtoll CCER CC1E LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1835	* CCER CC1NE LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1836	* CCER CC2E LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1837	* CCER CC2NE LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1838	* CCER CC3E LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1839	* CCER CC3NE LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1840	* CCER CC4E LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1841	* CCER CC5E LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1842	* CCER CC6E LL_TIM_CC_DisableChannel
Kojto	122:f9eeca106725	1843	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1844	* @param Channels This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	1845	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	1846	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	1847	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	1848	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	1849	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	1850	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	1851	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	1852	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	1853	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	1854	* @retval None
Kojto	122:f9eeca106725	1855	*/
Kojto	122:f9eeca106725	1856	__STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef * TIMx, uint32_t Channels)
Kojto	122:f9eeca106725	1857	{
Kojto	122:f9eeca106725	1858	CLEAR_BIT(TIMx->CCER, Channels);
Kojto	122:f9eeca106725	1859	}
Kojto	122:f9eeca106725	1860
Kojto	122:f9eeca106725	1861	/**
Kojto	122:f9eeca106725	1862	* @brief Indicate whether channel(s) is(are) enabled.
Kojto	122:f9eeca106725	1863	* @rmtoll CCER CC1E LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1864	* CCER CC1NE LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1865	* CCER CC2E LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1866	* CCER CC2NE LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1867	* CCER CC3E LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1868	* CCER CC3NE LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1869	* CCER CC4E LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1870	* CCER CC5E LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1871	* CCER CC6E LL_TIM_CC_IsEnabledChannel
Kojto	122:f9eeca106725	1872	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1873	* @param Channels This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	1874	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	1875	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	1876	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	1877	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	1878	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	1879	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	1880	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	1881	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	1882	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	1883	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1884	*/
Kojto	122:f9eeca106725	1885	__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(TIM_TypeDef * TIMx, uint32_t Channels)
Kojto	122:f9eeca106725	1886	{
Kojto	122:f9eeca106725	1887	return (READ_BIT(TIMx->CCER, Channels) == (Channels));
Kojto	122:f9eeca106725	1888	}
Kojto	122:f9eeca106725	1889
Kojto	122:f9eeca106725	1890	/**
Kojto	122:f9eeca106725	1891	* @}
Kojto	122:f9eeca106725	1892	*/
Kojto	122:f9eeca106725	1893
Kojto	122:f9eeca106725	1894	/** @defgroup TIM_LL_EF_Output_Channel Output channel configuration
Kojto	122:f9eeca106725	1895	* @{
Kojto	122:f9eeca106725	1896	*/
Kojto	122:f9eeca106725	1897	/**
Kojto	122:f9eeca106725	1898	* @brief Configure an output channel.
Kojto	122:f9eeca106725	1899	* @rmtoll CCMR1 CC1S LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1900	* CCMR1 CC2S LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1901	* CCMR2 CC3S LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1902	* CCMR2 CC4S LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1903	* CCMR3 CC5S LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1904	* CCMR3 CC6S LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1905	* CCER CC1P LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1906	* CCER CC2P LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1907	* CCER CC3P LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1908	* CCER CC4P LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1909	* CCER CC5P LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1910	* CCER CC6P LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1911	* CR2 OIS1 LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1912	* CR2 OIS2 LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1913	* CR2 OIS3 LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1914	* CR2 OIS4 LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1915	* CR2 OIS5 LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	1916	* CR2 OIS6 LL_TIM_OC_ConfigOutput
Kojto	122:f9eeca106725	1917	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1918	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	1919	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	1920	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	1921	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	1922	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	1923	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	1924	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	1925	* @param Configuration This parameter must be a combination of all the following values:
Kojto	122:f9eeca106725	1926	* @arg @ref LL_TIM_OCPOLARITY_HIGH or @ref LL_TIM_OCPOLARITY_LOW
Kojto	122:f9eeca106725	1927	* @arg @ref LL_TIM_OCIDLESTATE_LOW or @ref LL_TIM_OCIDLESTATE_HIGH
Kojto	122:f9eeca106725	1928	* @retval None
Kojto	122:f9eeca106725	1929	*/
Kojto	122:f9eeca106725	1930	__STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t Configuration)
Kojto	122:f9eeca106725	1931	{
Kojto	122:f9eeca106725	1932	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	1933	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	1934	CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel]));
Kojto	122:f9eeca106725	1935	MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]);
Kojto	122:f9eeca106725	1936	MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]);
Kojto	122:f9eeca106725	1937	}
Kojto	122:f9eeca106725	1938
Kojto	122:f9eeca106725	1939	/**
Kojto	122:f9eeca106725	1940	* @brief Define the behavior of the output reference signal OCxREF from which
Kojto	122:f9eeca106725	1941	* OCx and OCxN (when relevant) are derived.
Kojto	122:f9eeca106725	1942	* @rmtoll CCMR1 OC1M LL_TIM_OC_SetMode\n
Kojto	122:f9eeca106725	1943	* CCMR1 OC2M LL_TIM_OC_SetMode\n
Kojto	122:f9eeca106725	1944	* CCMR2 OC3M LL_TIM_OC_SetMode\n
Kojto	122:f9eeca106725	1945	* CCMR2 OC4M LL_TIM_OC_SetMode\n
Kojto	122:f9eeca106725	1946	* CCMR3 OC5M LL_TIM_OC_SetMode\n
Kojto	122:f9eeca106725	1947	* CCMR3 OC6M LL_TIM_OC_SetMode
Kojto	122:f9eeca106725	1948	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1949	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	1950	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	1951	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	1952	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	1953	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	1954	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	1955	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	1956	* @param Mode This parameter can be one of the following values:
Kojto	122:f9eeca106725	1957	* @arg @ref LL_TIM_OCMODE_FROZEN
Kojto	122:f9eeca106725	1958	* @arg @ref LL_TIM_OCMODE_ACTIVE
Kojto	122:f9eeca106725	1959	* @arg @ref LL_TIM_OCMODE_INACTIVE
Kojto	122:f9eeca106725	1960	* @arg @ref LL_TIM_OCMODE_TOGGLE
Kojto	122:f9eeca106725	1961	* @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
Kojto	122:f9eeca106725	1962	* @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
Kojto	122:f9eeca106725	1963	* @arg @ref LL_TIM_OCMODE_PWM1
Kojto	122:f9eeca106725	1964	* @arg @ref LL_TIM_OCMODE_PWM2
Kojto	122:f9eeca106725	1965	* @arg @ref LL_TIM_OCMODE_RETRIG_OPM1
Kojto	122:f9eeca106725	1966	* @arg @ref LL_TIM_OCMODE_RETRIG_OPM2
Kojto	122:f9eeca106725	1967	* @arg @ref LL_TIM_OCMODE_COMBINED_PWM1
Kojto	122:f9eeca106725	1968	* @arg @ref LL_TIM_OCMODE_COMBINED_PWM2
Kojto	122:f9eeca106725	1969	* @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM1
Kojto	122:f9eeca106725	1970	* @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM2
Kojto	122:f9eeca106725	1971	* @retval None
Kojto	122:f9eeca106725	1972	*/
Kojto	122:f9eeca106725	1973	__STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t Mode)
Kojto	122:f9eeca106725	1974	{
Kojto	122:f9eeca106725	1975	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	1976	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	1977	MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M \| TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]);
Kojto	122:f9eeca106725	1978	}
Kojto	122:f9eeca106725	1979
Kojto	122:f9eeca106725	1980	/**
Kojto	122:f9eeca106725	1981	* @brief Get the output compare mode of an output channel.
Kojto	122:f9eeca106725	1982	* @rmtoll CCMR1 OC1M LL_TIM_OC_GetMode\n
Kojto	122:f9eeca106725	1983	* CCMR1 OC2M LL_TIM_OC_GetMode\n
Kojto	122:f9eeca106725	1984	* CCMR2 OC3M LL_TIM_OC_GetMode\n
Kojto	122:f9eeca106725	1985	* CCMR2 OC4M LL_TIM_OC_GetMode\n
Kojto	122:f9eeca106725	1986	* CCMR3 OC5M LL_TIM_OC_GetMode\n
Kojto	122:f9eeca106725	1987	* CCMR3 OC6M LL_TIM_OC_GetMode
Kojto	122:f9eeca106725	1988	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1989	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	1990	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	1991	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	1992	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	1993	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	1994	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	1995	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	1996	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1997	* @arg @ref LL_TIM_OCMODE_FROZEN
Kojto	122:f9eeca106725	1998	* @arg @ref LL_TIM_OCMODE_ACTIVE
Kojto	122:f9eeca106725	1999	* @arg @ref LL_TIM_OCMODE_INACTIVE
Kojto	122:f9eeca106725	2000	* @arg @ref LL_TIM_OCMODE_TOGGLE
Kojto	122:f9eeca106725	2001	* @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
Kojto	122:f9eeca106725	2002	* @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
Kojto	122:f9eeca106725	2003	* @arg @ref LL_TIM_OCMODE_PWM1
Kojto	122:f9eeca106725	2004	* @arg @ref LL_TIM_OCMODE_PWM2
Kojto	122:f9eeca106725	2005	* @arg @ref LL_TIM_OCMODE_RETRIG_OPM1
Kojto	122:f9eeca106725	2006	* @arg @ref LL_TIM_OCMODE_RETRIG_OPM2
Kojto	122:f9eeca106725	2007	* @arg @ref LL_TIM_OCMODE_COMBINED_PWM1
Kojto	122:f9eeca106725	2008	* @arg @ref LL_TIM_OCMODE_COMBINED_PWM2
Kojto	122:f9eeca106725	2009	* @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM1
Kojto	122:f9eeca106725	2010	* @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM2
Kojto	122:f9eeca106725	2011	*/
Kojto	122:f9eeca106725	2012	__STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2013	{
Kojto	122:f9eeca106725	2014	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2015	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2016	return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M \| TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]);
Kojto	122:f9eeca106725	2017	}
Kojto	122:f9eeca106725	2018
Kojto	122:f9eeca106725	2019	/**
Kojto	122:f9eeca106725	2020	* @brief Set the polarity of an output channel.
Kojto	122:f9eeca106725	2021	* @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2022	* CCER CC1NP LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2023	* CCER CC2P LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2024	* CCER CC2NP LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2025	* CCER CC3P LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2026	* CCER CC3NP LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2027	* CCER CC4P LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2028	* CCER CC5P LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2029	* CCER CC6P LL_TIM_OC_SetPolarity
Kojto	122:f9eeca106725	2030	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2031	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2032	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2033	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	2034	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2035	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	2036	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2037	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	2038	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2039	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2040	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2041	* @param Polarity This parameter can be one of the following values:
Kojto	122:f9eeca106725	2042	* @arg @ref LL_TIM_OCPOLARITY_HIGH
Kojto	122:f9eeca106725	2043	* @arg @ref LL_TIM_OCPOLARITY_LOW
Kojto	122:f9eeca106725	2044	* @retval None
Kojto	122:f9eeca106725	2045	*/
Kojto	122:f9eeca106725	2046	__STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t Polarity)
Kojto	122:f9eeca106725	2047	{
Kojto	122:f9eeca106725	2048	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2049	MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iChannel]);
Kojto	122:f9eeca106725	2050	}
Kojto	122:f9eeca106725	2051
Kojto	122:f9eeca106725	2052	/**
Kojto	122:f9eeca106725	2053	* @brief Get the polarity of an output channel.
Kojto	122:f9eeca106725	2054	* @rmtoll CCER CC1P LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2055	* CCER CC1NP LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2056	* CCER CC2P LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2057	* CCER CC2NP LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2058	* CCER CC3P LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2059	* CCER CC3NP LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2060	* CCER CC4P LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2061	* CCER CC5P LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2062	* CCER CC6P LL_TIM_OC_GetPolarity
Kojto	122:f9eeca106725	2063	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2064	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2065	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2066	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	2067	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2068	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	2069	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2070	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	2071	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2072	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2073	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2074	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	2075	* @arg @ref LL_TIM_OCPOLARITY_HIGH
Kojto	122:f9eeca106725	2076	* @arg @ref LL_TIM_OCPOLARITY_LOW
Kojto	122:f9eeca106725	2077	*/
Kojto	122:f9eeca106725	2078	__STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2079	{
Kojto	122:f9eeca106725	2080	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2081	return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]);
Kojto	122:f9eeca106725	2082	}
Kojto	122:f9eeca106725	2083
Kojto	122:f9eeca106725	2084	/**
Kojto	122:f9eeca106725	2085	* @brief Set the IDLE state of an output channel
Kojto	122:f9eeca106725	2086	* @note This function is significant only for the timer instances
Kojto	122:f9eeca106725	2087	* supporting the break feature. Macro @ref IS_TIM_BREAK_INSTANCE(TIMx)
Kojto	122:f9eeca106725	2088	* can be used to check whether or not a timer instance provides
Kojto	122:f9eeca106725	2089	* a break input.
Kojto	122:f9eeca106725	2090	* @rmtoll CR2 OIS1 LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2091	* CR2 OIS2N LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2092	* CR2 OIS2 LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2093	* CR2 OIS2N LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2094	* CR2 OIS3 LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2095	* CR2 OIS3N LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2096	* CR2 OIS4 LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2097	* CR2 OIS5 LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2098	* CR2 OIS6 LL_TIM_OC_SetIdleState
Kojto	122:f9eeca106725	2099	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2100	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2101	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2102	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	2103	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2104	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	2105	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2106	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	2107	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2108	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2109	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2110	* @param IdleState This parameter can be one of the following values:
Kojto	122:f9eeca106725	2111	* @arg @ref LL_TIM_OCIDLESTATE_LOW
Kojto	122:f9eeca106725	2112	* @arg @ref LL_TIM_OCIDLESTATE_HIGH
Kojto	122:f9eeca106725	2113	* @retval None
Kojto	122:f9eeca106725	2114	*/
Kojto	122:f9eeca106725	2115	__STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t IdleState)
Kojto	122:f9eeca106725	2116	{
Kojto	122:f9eeca106725	2117	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2118	MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iChannel]);
Kojto	122:f9eeca106725	2119	}
Kojto	122:f9eeca106725	2120
Kojto	122:f9eeca106725	2121	/**
Kojto	122:f9eeca106725	2122	* @brief Get the IDLE state of an output channel
Kojto	122:f9eeca106725	2123	* @rmtoll CR2 OIS1 LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2124	* CR2 OIS2N LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2125	* CR2 OIS2 LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2126	* CR2 OIS2N LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2127	* CR2 OIS3 LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2128	* CR2 OIS3N LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2129	* CR2 OIS4 LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2130	* CR2 OIS5 LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2131	* CR2 OIS6 LL_TIM_OC_GetIdleState
Kojto	122:f9eeca106725	2132	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2133	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2134	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2135	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	2136	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2137	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	2138	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2139	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	2140	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2141	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2142	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2143	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	2144	* @arg @ref LL_TIM_OCIDLESTATE_LOW
Kojto	122:f9eeca106725	2145	* @arg @ref LL_TIM_OCIDLESTATE_HIGH
Kojto	122:f9eeca106725	2146	*/
Kojto	122:f9eeca106725	2147	__STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2148	{
Kojto	122:f9eeca106725	2149	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2150	return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel]);
Kojto	122:f9eeca106725	2151	}
Kojto	122:f9eeca106725	2152
Kojto	122:f9eeca106725	2153	/**
Kojto	122:f9eeca106725	2154	* @brief Enable fast mode for the output channel.
Kojto	122:f9eeca106725	2155	* @note Acts only if the channel is configured in PWM1 or PWM2 mode.
Kojto	122:f9eeca106725	2156	* @rmtoll CCMR1 OC1FE LL_TIM_OC_EnableFast\n
Kojto	122:f9eeca106725	2157	* CCMR1 OC2FE LL_TIM_OC_EnableFast\n
Kojto	122:f9eeca106725	2158	* CCMR2 OC3FE LL_TIM_OC_EnableFast\n
Kojto	122:f9eeca106725	2159	* CCMR2 OC4FE LL_TIM_OC_EnableFast\n
Kojto	122:f9eeca106725	2160	* CCMR3 OC5FE LL_TIM_OC_EnableFast\n
Kojto	122:f9eeca106725	2161	* CCMR3 OC6FE LL_TIM_OC_EnableFast
Kojto	122:f9eeca106725	2162	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2163	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2164	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2165	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2166	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2167	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2168	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2169	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2170	* @retval None
Kojto	122:f9eeca106725	2171	*/
Kojto	122:f9eeca106725	2172	__STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2173	{
Kojto	122:f9eeca106725	2174	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2175	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2176	SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
Kojto	122:f9eeca106725	2177
Kojto	122:f9eeca106725	2178	}
Kojto	122:f9eeca106725	2179
Kojto	122:f9eeca106725	2180	/**
Kojto	122:f9eeca106725	2181	* @brief Disable fast mode for the output channel.
Kojto	122:f9eeca106725	2182	* @rmtoll CCMR1 OC1FE LL_TIM_OC_DisableFast\n
Kojto	122:f9eeca106725	2183	* CCMR1 OC2FE LL_TIM_OC_DisableFast\n
Kojto	122:f9eeca106725	2184	* CCMR2 OC3FE LL_TIM_OC_DisableFast\n
Kojto	122:f9eeca106725	2185	* CCMR2 OC4FE LL_TIM_OC_DisableFast\n
Kojto	122:f9eeca106725	2186	* CCMR3 OC5FE LL_TIM_OC_DisableFast\n
Kojto	122:f9eeca106725	2187	* CCMR3 OC6FE LL_TIM_OC_DisableFast
Kojto	122:f9eeca106725	2188	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2189	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2190	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2191	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2192	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2193	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2194	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2195	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2196	* @retval None
Kojto	122:f9eeca106725	2197	*/
Kojto	122:f9eeca106725	2198	__STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2199	{
Kojto	122:f9eeca106725	2200	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2201	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2202	CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
Kojto	122:f9eeca106725	2203
Kojto	122:f9eeca106725	2204	}
Kojto	122:f9eeca106725	2205
Kojto	122:f9eeca106725	2206	/**
Kojto	122:f9eeca106725	2207	* @brief Indicates whether fast mode is enabled for the output channel.
Kojto	122:f9eeca106725	2208	* @rmtoll CCMR1 OC1FE LL_TIM_OC_IsEnabledFast\n
Kojto	122:f9eeca106725	2209	* CCMR1 OC2FE LL_TIM_OC_IsEnabledFast\n
Kojto	122:f9eeca106725	2210	* CCMR2 OC3FE LL_TIM_OC_IsEnabledFast\n
Kojto	122:f9eeca106725	2211	* CCMR2 OC4FE LL_TIM_OC_IsEnabledFast\n
Kojto	122:f9eeca106725	2212	* CCMR3 OC5FE LL_TIM_OC_IsEnabledFast\n
Kojto	122:f9eeca106725	2213	* CCMR3 OC6FE LL_TIM_OC_IsEnabledFast
Kojto	122:f9eeca106725	2214	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2215	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2216	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2217	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2218	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2219	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2220	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2221	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2222	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	2223	*/
Kojto	122:f9eeca106725	2224	__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2225	{
Kojto	122:f9eeca106725	2226	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2227	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2228	register uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel];
Kojto	122:f9eeca106725	2229	return (READ_BIT(*pReg, bitfield) == bitfield);
Kojto	122:f9eeca106725	2230	}
Kojto	122:f9eeca106725	2231
Kojto	122:f9eeca106725	2232	/**
Kojto	122:f9eeca106725	2233	* @brief Enable compare register (TIMx_CCRx) preload for the output channel.
Kojto	122:f9eeca106725	2234	* @rmtoll CCMR1 OC1PE LL_TIM_OC_EnablePreload\n
Kojto	122:f9eeca106725	2235	* CCMR1 OC2PE LL_TIM_OC_EnablePreload\n
Kojto	122:f9eeca106725	2236	* CCMR2 OC3PE LL_TIM_OC_EnablePreload\n
Kojto	122:f9eeca106725	2237	* CCMR2 OC4PE LL_TIM_OC_EnablePreload\n
Kojto	122:f9eeca106725	2238	* CCMR3 OC5PE LL_TIM_OC_EnablePreload\n
Kojto	122:f9eeca106725	2239	* CCMR3 OC6PE LL_TIM_OC_EnablePreload
Kojto	122:f9eeca106725	2240	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2241	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2242	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2243	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2244	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2245	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2246	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2247	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2248	* @retval None
Kojto	122:f9eeca106725	2249	*/
Kojto	122:f9eeca106725	2250	__STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2251	{
Kojto	122:f9eeca106725	2252	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2253	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2254	SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
Kojto	122:f9eeca106725	2255	}
Kojto	122:f9eeca106725	2256
Kojto	122:f9eeca106725	2257	/**
Kojto	122:f9eeca106725	2258	* @brief Disable compare register (TIMx_CCRx) preload for the output channel.
Kojto	122:f9eeca106725	2259	* @rmtoll CCMR1 OC1PE LL_TIM_OC_DisablePreload\n
Kojto	122:f9eeca106725	2260	* CCMR1 OC2PE LL_TIM_OC_DisablePreload\n
Kojto	122:f9eeca106725	2261	* CCMR2 OC3PE LL_TIM_OC_DisablePreload\n
Kojto	122:f9eeca106725	2262	* CCMR2 OC4PE LL_TIM_OC_DisablePreload\n
Kojto	122:f9eeca106725	2263	* CCMR3 OC5PE LL_TIM_OC_DisablePreload\n
Kojto	122:f9eeca106725	2264	* CCMR3 OC6PE LL_TIM_OC_DisablePreload
Kojto	122:f9eeca106725	2265	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2266	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2267	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2268	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2269	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2270	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2271	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2272	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2273	* @retval None
Kojto	122:f9eeca106725	2274	*/
Kojto	122:f9eeca106725	2275	__STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2276	{
Kojto	122:f9eeca106725	2277	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2278	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2279	CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
Kojto	122:f9eeca106725	2280	}
Kojto	122:f9eeca106725	2281
Kojto	122:f9eeca106725	2282	/**
Kojto	122:f9eeca106725	2283	* @brief Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channel.
Kojto	122:f9eeca106725	2284	* @rmtoll CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload\n
Kojto	122:f9eeca106725	2285	* CCMR1 OC2PE LL_TIM_OC_IsEnabledPreload\n
Kojto	122:f9eeca106725	2286	* CCMR2 OC3PE LL_TIM_OC_IsEnabledPreload\n
Kojto	122:f9eeca106725	2287	* CCMR2 OC4PE LL_TIM_OC_IsEnabledPreload\n
Kojto	122:f9eeca106725	2288	* CCMR3 OC5PE LL_TIM_OC_IsEnabledPreload\n
Kojto	122:f9eeca106725	2289	* CCMR3 OC6PE LL_TIM_OC_IsEnabledPreload
Kojto	122:f9eeca106725	2290	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2291	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2292	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2293	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2294	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2295	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2296	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2297	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2298	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	2299	*/
Kojto	122:f9eeca106725	2300	__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2301	{
Kojto	122:f9eeca106725	2302	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2303	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2304	register uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel];
Kojto	122:f9eeca106725	2305	return (READ_BIT(*pReg, bitfield) == bitfield);
Kojto	122:f9eeca106725	2306	}
Kojto	122:f9eeca106725	2307
Kojto	122:f9eeca106725	2308	/**
Kojto	122:f9eeca106725	2309	* @brief Enable clearing the output channel on an external event.
Kojto	122:f9eeca106725	2310	* @note This function can only be used in Output compare and PWM modes. It does not work in Forced mode.
Kojto	122:f9eeca106725	2311	* @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
Kojto	122:f9eeca106725	2312	* or not a timer instance can clear the OCxREF signal on an external event.
Kojto	122:f9eeca106725	2313	* @rmtoll CCMR1 OC1CE LL_TIM_OC_EnableClear\n
Kojto	122:f9eeca106725	2314	* CCMR1 OC2CE LL_TIM_OC_EnableClear\n
Kojto	122:f9eeca106725	2315	* CCMR2 OC3CE LL_TIM_OC_EnableClear\n
Kojto	122:f9eeca106725	2316	* CCMR2 OC4CE LL_TIM_OC_EnableClear\n
Kojto	122:f9eeca106725	2317	* CCMR3 OC5CE LL_TIM_OC_EnableClear\n
Kojto	122:f9eeca106725	2318	* CCMR3 OC6CE LL_TIM_OC_EnableClear
Kojto	122:f9eeca106725	2319	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2320	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2321	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2322	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2323	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2324	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2325	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2326	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2327	* @retval None
Kojto	122:f9eeca106725	2328	*/
Kojto	122:f9eeca106725	2329	__STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2330	{
Kojto	122:f9eeca106725	2331	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2332	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2333	SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
Kojto	122:f9eeca106725	2334	}
Kojto	122:f9eeca106725	2335
Kojto	122:f9eeca106725	2336	/**
Kojto	122:f9eeca106725	2337	* @brief Disable clearing the output channel on an external event.
Kojto	122:f9eeca106725	2338	* @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
Kojto	122:f9eeca106725	2339	* or not a timer instance can clear the OCxREF signal on an external event.
Kojto	122:f9eeca106725	2340	* @rmtoll CCMR1 OC1CE LL_TIM_OC_DisableClear\n
Kojto	122:f9eeca106725	2341	* CCMR1 OC2CE LL_TIM_OC_DisableClear\n
Kojto	122:f9eeca106725	2342	* CCMR2 OC3CE LL_TIM_OC_DisableClear\n
Kojto	122:f9eeca106725	2343	* CCMR2 OC4CE LL_TIM_OC_DisableClear\n
Kojto	122:f9eeca106725	2344	* CCMR3 OC5CE LL_TIM_OC_DisableClear\n
Kojto	122:f9eeca106725	2345	* CCMR3 OC6CE LL_TIM_OC_DisableClear
Kojto	122:f9eeca106725	2346	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2347	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2348	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2349	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2350	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2351	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2352	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2353	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2354	* @retval None
Kojto	122:f9eeca106725	2355	*/
Kojto	122:f9eeca106725	2356	__STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2357	{
Kojto	122:f9eeca106725	2358	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2359	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2360	CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
Kojto	122:f9eeca106725	2361	}
Kojto	122:f9eeca106725	2362
Kojto	122:f9eeca106725	2363	/**
Kojto	122:f9eeca106725	2364	* @brief Indicates clearing the output channel on an external event is enabled for the output channel.
Kojto	122:f9eeca106725	2365	* @note This function enables clearing the output channel on an external event.
Kojto	122:f9eeca106725	2366	* @note This function can only be used in Output compare and PWM modes. It does not work in Forced mode.
Kojto	122:f9eeca106725	2367	* @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
Kojto	122:f9eeca106725	2368	* or not a timer instance can clear the OCxREF signal on an external event.
Kojto	122:f9eeca106725	2369	* @rmtoll CCMR1 OC1CE LL_TIM_OC_IsEnabledClear\n
Kojto	122:f9eeca106725	2370	* CCMR1 OC2CE LL_TIM_OC_IsEnabledClear\n
Kojto	122:f9eeca106725	2371	* CCMR2 OC3CE LL_TIM_OC_IsEnabledClear\n
Kojto	122:f9eeca106725	2372	* CCMR2 OC4CE LL_TIM_OC_IsEnabledClear\n
Kojto	122:f9eeca106725	2373	* CCMR3 OC5CE LL_TIM_OC_IsEnabledClear\n
Kojto	122:f9eeca106725	2374	* CCMR3 OC6CE LL_TIM_OC_IsEnabledClear
Kojto	122:f9eeca106725	2375	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2376	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2377	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2378	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2379	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2380	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2381	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2382	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2383	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	2384	*/
Kojto	122:f9eeca106725	2385	__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2386	{
Kojto	122:f9eeca106725	2387	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2388	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2389	register uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel];
Kojto	122:f9eeca106725	2390	return (READ_BIT(*pReg, bitfield) == bitfield);
Kojto	122:f9eeca106725	2391	}
Kojto	122:f9eeca106725	2392
Kojto	122:f9eeca106725	2393	/**
Kojto	122:f9eeca106725	2394	* @brief Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal and the rising edge if the Ocx and OCxN signals).
Kojto	122:f9eeca106725	2395	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2396	* dead-time insertion feature is supported by a timer instance.
Kojto	122:f9eeca106725	2397	* @note Helper macro @ref __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter
Kojto	122:f9eeca106725	2398	* @rmtoll BDTR DTG LL_TIM_OC_SetDeadTime
Kojto	122:f9eeca106725	2399	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2400	* @param DeadTime between Min_Data=0 and Max_Data=255
Kojto	122:f9eeca106725	2401	* @retval None
Kojto	122:f9eeca106725	2402	*/
Kojto	122:f9eeca106725	2403	__STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef * TIMx, uint32_t DeadTime)
Kojto	122:f9eeca106725	2404	{
Kojto	122:f9eeca106725	2405	MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);
Kojto	122:f9eeca106725	2406	}
Kojto	122:f9eeca106725	2407
Kojto	122:f9eeca106725	2408	/**
Kojto	122:f9eeca106725	2409	* @brief Set compare value for output channel 1 (TIMx_CCR1).
Kojto	122:f9eeca106725	2410	* @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
Kojto	122:f9eeca106725	2411	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2412	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2413	* @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2414	* output channel 1 is supported by a timer instance.
Kojto	122:f9eeca106725	2415	* @rmtoll CCR1 CCR1 LL_TIM_OC_SetCompareCH1
Kojto	122:f9eeca106725	2416	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2417	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	2418	* @retval None
Kojto	122:f9eeca106725	2419	*/
Kojto	122:f9eeca106725	2420	__STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef * TIMx, uint32_t CompareValue)
Kojto	122:f9eeca106725	2421	{
Kojto	122:f9eeca106725	2422	WRITE_REG(TIMx->CCR1, CompareValue);
Kojto	122:f9eeca106725	2423	}
Kojto	122:f9eeca106725	2424
Kojto	122:f9eeca106725	2425	/**
Kojto	122:f9eeca106725	2426	* @brief Set compare value for output channel 2 (TIMx_CCR2).
Kojto	122:f9eeca106725	2427	* @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
Kojto	122:f9eeca106725	2428	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2429	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2430	* @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2431	* output channel 2 is supported by a timer instance.
Kojto	122:f9eeca106725	2432	* @rmtoll CCR2 CCR2 LL_TIM_OC_SetCompareCH2
Kojto	122:f9eeca106725	2433	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2434	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	2435	* @retval None
Kojto	122:f9eeca106725	2436	*/
Kojto	122:f9eeca106725	2437	__STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef * TIMx, uint32_t CompareValue)
Kojto	122:f9eeca106725	2438	{
Kojto	122:f9eeca106725	2439	WRITE_REG(TIMx->CCR2, CompareValue);
Kojto	122:f9eeca106725	2440	}
Kojto	122:f9eeca106725	2441
Kojto	122:f9eeca106725	2442	/**
Kojto	122:f9eeca106725	2443	* @brief Set compare value for output channel 3 (TIMx_CCR3).
Kojto	122:f9eeca106725	2444	* @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
Kojto	122:f9eeca106725	2445	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2446	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2447	* @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2448	* output channel is supported by a timer instance.
Kojto	122:f9eeca106725	2449	* @rmtoll CCR3 CCR3 LL_TIM_OC_SetCompareCH3
Kojto	122:f9eeca106725	2450	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2451	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	2452	* @retval None
Kojto	122:f9eeca106725	2453	*/
Kojto	122:f9eeca106725	2454	__STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef * TIMx, uint32_t CompareValue)
Kojto	122:f9eeca106725	2455	{
Kojto	122:f9eeca106725	2456	WRITE_REG(TIMx->CCR3, CompareValue);
Kojto	122:f9eeca106725	2457	}
Kojto	122:f9eeca106725	2458
Kojto	122:f9eeca106725	2459	/**
Kojto	122:f9eeca106725	2460	* @brief Set compare value for output channel 4 (TIMx_CCR4).
Kojto	122:f9eeca106725	2461	* @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
Kojto	122:f9eeca106725	2462	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2463	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2464	* @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2465	* output channel 4 is supported by a timer instance.
Kojto	122:f9eeca106725	2466	* @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4
Kojto	122:f9eeca106725	2467	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2468	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	2469	* @retval None
Kojto	122:f9eeca106725	2470	*/
Kojto	122:f9eeca106725	2471	__STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef * TIMx, uint32_t CompareValue)
Kojto	122:f9eeca106725	2472	{
Kojto	122:f9eeca106725	2473	WRITE_REG(TIMx->CCR4, CompareValue);
Kojto	122:f9eeca106725	2474	}
Kojto	122:f9eeca106725	2475
Kojto	122:f9eeca106725	2476	/**
Kojto	122:f9eeca106725	2477	* @brief Set compare value for output channel 5 (TIMx_CCR5).
Kojto	122:f9eeca106725	2478	* @note Macro @ref IS_TIM_CC5_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2479	* output channel 5 is supported by a timer instance.
Kojto	122:f9eeca106725	2480	* @rmtoll CCR5 CCR5 LL_TIM_OC_SetCompareCH5
Kojto	122:f9eeca106725	2481	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2482	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	2483	* @retval None
Kojto	122:f9eeca106725	2484	*/
Kojto	122:f9eeca106725	2485	__STATIC_INLINE void LL_TIM_OC_SetCompareCH5(TIM_TypeDef * TIMx, uint32_t CompareValue)
Kojto	122:f9eeca106725	2486	{
Kojto	122:f9eeca106725	2487	WRITE_REG(TIMx->CCR5, CompareValue);
Kojto	122:f9eeca106725	2488	}
Kojto	122:f9eeca106725	2489
Kojto	122:f9eeca106725	2490	/**
Kojto	122:f9eeca106725	2491	* @brief Set compare value for output channel 6 (TIMx_CCR6).
Kojto	122:f9eeca106725	2492	* @note Macro @ref IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2493	* output channel 6 is supported by a timer instance.
Kojto	122:f9eeca106725	2494	* @rmtoll CCR6 CCR6 LL_TIM_OC_SetCompareCH6
Kojto	122:f9eeca106725	2495	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2496	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	2497	* @retval None
Kojto	122:f9eeca106725	2498	*/
Kojto	122:f9eeca106725	2499	__STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef * TIMx, uint32_t CompareValue)
Kojto	122:f9eeca106725	2500	{
Kojto	122:f9eeca106725	2501	WRITE_REG(TIMx->CCR6, CompareValue);
Kojto	122:f9eeca106725	2502	}
Kojto	122:f9eeca106725	2503
Kojto	122:f9eeca106725	2504	/**
Kojto	122:f9eeca106725	2505	* @brief Get compare value (TIMx_CCR1) set for output channel 1.
Kojto	122:f9eeca106725	2506	* @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.
Kojto	122:f9eeca106725	2507	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2508	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2509	* @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2510	* output channel 1 is supported by a timer instance.
Kojto	122:f9eeca106725	2511	* @rmtoll CCR1 CCR1 LL_TIM_OC_GetCompareCH1
Kojto	122:f9eeca106725	2512	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2513	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2514	*/
Kojto	122:f9eeca106725	2515	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	2516	{
Kojto	122:f9eeca106725	2517	return (uint32_t)(READ_REG(TIMx->CCR1));
Kojto	122:f9eeca106725	2518	}
Kojto	122:f9eeca106725	2519
Kojto	122:f9eeca106725	2520	/**
Kojto	122:f9eeca106725	2521	* @brief Get compare value (TIMx_CCR2) set for output channel 2.
Kojto	122:f9eeca106725	2522	* @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.
Kojto	122:f9eeca106725	2523	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2524	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2525	* @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2526	* output channel 2 is supported by a timer instance.
Kojto	122:f9eeca106725	2527	* @rmtoll CCR2 CCR2 LL_TIM_OC_GetCompareCH2
Kojto	122:f9eeca106725	2528	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2529	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2530	*/
Kojto	122:f9eeca106725	2531	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	2532	{
Kojto	122:f9eeca106725	2533	return (uint32_t)(READ_REG(TIMx->CCR2));
Kojto	122:f9eeca106725	2534	}
Kojto	122:f9eeca106725	2535
Kojto	122:f9eeca106725	2536	/**
Kojto	122:f9eeca106725	2537	* @brief Get compare value (TIMx_CCR3) set for output channel 3.
Kojto	122:f9eeca106725	2538	* @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.
Kojto	122:f9eeca106725	2539	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2540	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2541	* @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2542	* output channel 3 is supported by a timer instance.
Kojto	122:f9eeca106725	2543	* @rmtoll CCR3 CCR3 LL_TIM_OC_GetCompareCH3
Kojto	122:f9eeca106725	2544	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2545	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2546	*/
Kojto	122:f9eeca106725	2547	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	2548	{
Kojto	122:f9eeca106725	2549	return (uint32_t)(READ_REG(TIMx->CCR3));
Kojto	122:f9eeca106725	2550	}
Kojto	122:f9eeca106725	2551
Kojto	122:f9eeca106725	2552	/**
Kojto	122:f9eeca106725	2553	* @brief Get compare value (TIMx_CCR4) set for output channel 4.
Kojto	122:f9eeca106725	2554	* @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.
Kojto	122:f9eeca106725	2555	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2556	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2557	* @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2558	* output channel 4 is supported by a timer instance.
Kojto	122:f9eeca106725	2559	* @rmtoll CCR4 CCR4 LL_TIM_OC_GetCompareCH4
Kojto	122:f9eeca106725	2560	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2561	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2562	*/
Kojto	122:f9eeca106725	2563	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	2564	{
Kojto	122:f9eeca106725	2565	return (uint32_t)(READ_REG(TIMx->CCR4));
Kojto	122:f9eeca106725	2566	}
Kojto	122:f9eeca106725	2567
Kojto	122:f9eeca106725	2568	/**
Kojto	122:f9eeca106725	2569	* @brief Get compare value (TIMx_CCR5) set for output channel 5.
Kojto	122:f9eeca106725	2570	* @note Macro @ref IS_TIM_CC5_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2571	* output channel 5 is supported by a timer instance.
Kojto	122:f9eeca106725	2572	* @rmtoll CCR5 CCR5 LL_TIM_OC_GetCompareCH5
Kojto	122:f9eeca106725	2573	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2574	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2575	*/
Kojto	122:f9eeca106725	2576	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	2577	{
Kojto	122:f9eeca106725	2578	return (uint32_t)(READ_REG(TIMx->CCR5));
Kojto	122:f9eeca106725	2579	}
Kojto	122:f9eeca106725	2580
Kojto	122:f9eeca106725	2581	/**
Kojto	122:f9eeca106725	2582	* @brief Get compare value (TIMx_CCR6) set for output channel 6.
Kojto	122:f9eeca106725	2583	* @note Macro @ref IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2584	* output channel 6 is supported by a timer instance.
Kojto	122:f9eeca106725	2585	* @rmtoll CCR6 CCR6 LL_TIM_OC_GetCompareCH6
Kojto	122:f9eeca106725	2586	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2587	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2588	*/
Kojto	122:f9eeca106725	2589	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	2590	{
Kojto	122:f9eeca106725	2591	return (uint32_t)(READ_REG(TIMx->CCR6));
Kojto	122:f9eeca106725	2592	}
Kojto	122:f9eeca106725	2593
Kojto	122:f9eeca106725	2594	/**
Kojto	122:f9eeca106725	2595	* @brief Select on which reference signal the OC5REF is combined to.
Kojto	122:f9eeca106725	2596	* @note Macro @ref IS_TIM_COMBINED3PHASEPWM_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2597	* whether or not a timer instance supports the combined 3-phase PWM mode.
Kojto	122:f9eeca106725	2598	* @rmtoll CCR5 GC5C3 LL_TIM_SetCH5CombinedChannels\n
Kojto	122:f9eeca106725	2599	* CCR5 GC5C2 LL_TIM_SetCH5CombinedChannels\n
Kojto	122:f9eeca106725	2600	* CCR5 GC5C1 LL_TIM_SetCH5CombinedChannels
Kojto	122:f9eeca106725	2601	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2602	* @param GroupCH5 This parameter can be one of the following values:
Kojto	122:f9eeca106725	2603	* @arg @ref LL_TIM_GROUPCH5_NONE
Kojto	122:f9eeca106725	2604	* @arg @ref LL_TIM_GROUPCH5_OC1REFC
Kojto	122:f9eeca106725	2605	* @arg @ref LL_TIM_GROUPCH5_OC2REFC
Kojto	122:f9eeca106725	2606	* @arg @ref LL_TIM_GROUPCH5_OC3REFC
Kojto	122:f9eeca106725	2607	* @retval None
Kojto	122:f9eeca106725	2608	*/
Kojto	122:f9eeca106725	2609	__STATIC_INLINE void LL_TIM_SetCH5CombinedChannels(TIM_TypeDef * TIMx, uint32_t GroupCH5)
Kojto	122:f9eeca106725	2610	{
Kojto	122:f9eeca106725	2611	MODIFY_REG(TIMx->CCR5, TIM_CCR5_CCR5, GroupCH5);
Kojto	122:f9eeca106725	2612	}
Kojto	122:f9eeca106725	2613
Kojto	122:f9eeca106725	2614	/**
Kojto	122:f9eeca106725	2615	* @}
Kojto	122:f9eeca106725	2616	*/
Kojto	122:f9eeca106725	2617
Kojto	122:f9eeca106725	2618	/** @defgroup TIM_LL_EF_Input_Channel Input channel configuration
Kojto	122:f9eeca106725	2619	* @{
Kojto	122:f9eeca106725	2620	*/
Kojto	122:f9eeca106725	2621	/**
Kojto	122:f9eeca106725	2622	* @brief Configure input channel.
Kojto	122:f9eeca106725	2623	* @rmtoll CCMR1 CC1S LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2624	* CCMR1 IC1PSC LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2625	* CCMR1 IC1F LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2626	* CCMR1 CC2S LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2627	* CCMR1 IC2PSC LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2628	* CCMR1 IC2F LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2629	* CCMR2 CC3S LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2630	* CCMR2 IC3PSC LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2631	* CCMR2 IC3F LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2632	* CCMR2 CC4S LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2633	* CCMR2 IC4PSC LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2634	* CCMR2 IC4F LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2635	* CCER CC1P LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2636	* CCER CC1NP LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2637	* CCER CC2P LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2638	* CCER CC2NP LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2639	* CCER CC3P LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2640	* CCER CC3NP LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2641	* CCER CC4P LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2642	* CCER CC4NP LL_TIM_IC_Config
Kojto	122:f9eeca106725	2643	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2644	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2645	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2646	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2647	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2648	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2649	* @param Configuration This parameter must be a combination of all the following values:
Kojto	122:f9eeca106725	2650	* @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI or @ref LL_TIM_ACTIVEINPUT_INDIRECTTI or @ref LL_TIM_ACTIVEINPUT_TRC
Kojto	122:f9eeca106725	2651	* @arg @ref LL_TIM_ICPSC_DIV1 or ... or @ref LL_TIM_ICPSC_DIV8
Kojto	122:f9eeca106725	2652	* @arg @ref LL_TIM_IC_FILTER_FDIV1 or ... or @ref LL_TIM_IC_FILTER_FDIV32_N8
Kojto	122:f9eeca106725	2653	* @arg @ref LL_TIM_IC_POLARITY_RISING or @ref LL_TIM_IC_POLARITY_FALLING or @ref LL_TIM_IC_POLARITY_BOTHEDGE
Kojto	122:f9eeca106725	2654	* @retval None
Kojto	122:f9eeca106725	2655	*/
Kojto	122:f9eeca106725	2656	__STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t Configuration)
Kojto	122:f9eeca106725	2657	{
Kojto	122:f9eeca106725	2658	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2659	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2660	MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F \| TIM_CCMR1_IC1PSC \| TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), ((Configuration >> 16U) & (TIM_CCMR1_IC1F \| TIM_CCMR1_IC1PSC \| TIM_CCMR1_CC1S)) << SHIFT_TAB_ICxx[iChannel]);
Kojto	122:f9eeca106725	2661	MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP \| TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), (Configuration & (TIM_CCER_CC1NP \| TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]);
Kojto	122:f9eeca106725	2662	}
Kojto	122:f9eeca106725	2663
Kojto	122:f9eeca106725	2664	/**
Kojto	122:f9eeca106725	2665	* @brief Set the active input.
Kojto	122:f9eeca106725	2666	* @rmtoll CCMR1 CC1S LL_TIM_IC_SetActiveInput\n
Kojto	122:f9eeca106725	2667	* CCMR1 CC2S LL_TIM_IC_SetActiveInput\n
Kojto	122:f9eeca106725	2668	* CCMR2 CC3S LL_TIM_IC_SetActiveInput\n
Kojto	122:f9eeca106725	2669	* CCMR2 CC4S LL_TIM_IC_SetActiveInput
Kojto	122:f9eeca106725	2670	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2671	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2672	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2673	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2674	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2675	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2676	* @param ICActiveInput This parameter can be one of the following values:
Kojto	122:f9eeca106725	2677	* @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
Kojto	122:f9eeca106725	2678	* @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
Kojto	122:f9eeca106725	2679	* @arg @ref LL_TIM_ACTIVEINPUT_TRC
Kojto	122:f9eeca106725	2680	* @retval None
Kojto	122:f9eeca106725	2681	*/
Kojto	122:f9eeca106725	2682	__STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t ICActiveInput)
Kojto	122:f9eeca106725	2683	{
Kojto	122:f9eeca106725	2684	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2685	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2686	MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT_TAB_ICxx[iChannel]);
Kojto	122:f9eeca106725	2687	}
Kojto	122:f9eeca106725	2688
Kojto	122:f9eeca106725	2689	/**
Kojto	122:f9eeca106725	2690	* @brief Get the current active input.
Kojto	122:f9eeca106725	2691	* @rmtoll CCMR1 CC1S LL_TIM_IC_GetActiveInput\n
Kojto	122:f9eeca106725	2692	* CCMR1 CC2S LL_TIM_IC_GetActiveInput\n
Kojto	122:f9eeca106725	2693	* CCMR2 CC3S LL_TIM_IC_GetActiveInput\n
Kojto	122:f9eeca106725	2694	* CCMR2 CC4S LL_TIM_IC_GetActiveInput
Kojto	122:f9eeca106725	2695	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2696	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2697	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2698	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2699	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2700	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2701	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	2702	* @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
Kojto	122:f9eeca106725	2703	* @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
Kojto	122:f9eeca106725	2704	* @arg @ref LL_TIM_ACTIVEINPUT_TRC
Kojto	122:f9eeca106725	2705	*/
Kojto	122:f9eeca106725	2706	__STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2707	{
Kojto	122:f9eeca106725	2708	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2709	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2710	return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
Kojto	122:f9eeca106725	2711	}
Kojto	122:f9eeca106725	2712
Kojto	122:f9eeca106725	2713	/**
Kojto	122:f9eeca106725	2714	* @brief Set the prescaler of input channel.
Kojto	122:f9eeca106725	2715	* @rmtoll CCMR1 IC1PSC LL_TIM_IC_SetPrescaler\n
Kojto	122:f9eeca106725	2716	* CCMR1 IC2PSC LL_TIM_IC_SetPrescaler\n
Kojto	122:f9eeca106725	2717	* CCMR2 IC3PSC LL_TIM_IC_SetPrescaler\n
Kojto	122:f9eeca106725	2718	* CCMR2 IC4PSC LL_TIM_IC_SetPrescaler
Kojto	122:f9eeca106725	2719	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2720	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2721	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2722	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2723	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2724	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2725	* @param ICPrescaler This parameter can be one of the following values:
Kojto	122:f9eeca106725	2726	* @arg @ref LL_TIM_ICPSC_DIV1
Kojto	122:f9eeca106725	2727	* @arg @ref LL_TIM_ICPSC_DIV2
Kojto	122:f9eeca106725	2728	* @arg @ref LL_TIM_ICPSC_DIV4
Kojto	122:f9eeca106725	2729	* @arg @ref LL_TIM_ICPSC_DIV8
Kojto	122:f9eeca106725	2730	* @retval None
Kojto	122:f9eeca106725	2731	*/
Kojto	122:f9eeca106725	2732	__STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t ICPrescaler)
Kojto	122:f9eeca106725	2733	{
Kojto	122:f9eeca106725	2734	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2735	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2736	MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT_TAB_ICxx[iChannel]);
Kojto	122:f9eeca106725	2737	}
Kojto	122:f9eeca106725	2738
Kojto	122:f9eeca106725	2739	/**
Kojto	122:f9eeca106725	2740	* @brief Get the current prescaler value acting on an input channel.
Kojto	122:f9eeca106725	2741	* @rmtoll CCMR1 IC1PSC LL_TIM_IC_GetPrescaler\n
Kojto	122:f9eeca106725	2742	* CCMR1 IC2PSC LL_TIM_IC_GetPrescaler\n
Kojto	122:f9eeca106725	2743	* CCMR2 IC3PSC LL_TIM_IC_GetPrescaler\n
Kojto	122:f9eeca106725	2744	* CCMR2 IC4PSC LL_TIM_IC_GetPrescaler
Kojto	122:f9eeca106725	2745	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2746	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2747	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2748	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2749	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2750	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2751	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	2752	* @arg @ref LL_TIM_ICPSC_DIV1
Kojto	122:f9eeca106725	2753	* @arg @ref LL_TIM_ICPSC_DIV2
Kojto	122:f9eeca106725	2754	* @arg @ref LL_TIM_ICPSC_DIV4
Kojto	122:f9eeca106725	2755	* @arg @ref LL_TIM_ICPSC_DIV8
Kojto	122:f9eeca106725	2756	*/
Kojto	122:f9eeca106725	2757	__STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2758	{
Kojto	122:f9eeca106725	2759	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2760	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2761	return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
Kojto	122:f9eeca106725	2762	}
Kojto	122:f9eeca106725	2763
Kojto	122:f9eeca106725	2764	/**
Kojto	122:f9eeca106725	2765	* @brief Set the input filter duration.
Kojto	122:f9eeca106725	2766	* @rmtoll CCMR1 IC1F LL_TIM_IC_SetFilter\n
Kojto	122:f9eeca106725	2767	* CCMR1 IC2F LL_TIM_IC_SetFilter\n
Kojto	122:f9eeca106725	2768	* CCMR2 IC3F LL_TIM_IC_SetFilter\n
Kojto	122:f9eeca106725	2769	* CCMR2 IC4F LL_TIM_IC_SetFilter
Kojto	122:f9eeca106725	2770	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2771	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2772	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2773	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2774	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2775	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2776	* @param ICFilter This parameter can be one of the following values:
Kojto	122:f9eeca106725	2777	* @arg @ref LL_TIM_IC_FILTER_FDIV1
Kojto	122:f9eeca106725	2778	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
Kojto	122:f9eeca106725	2779	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
Kojto	122:f9eeca106725	2780	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
Kojto	122:f9eeca106725	2781	* @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
Kojto	122:f9eeca106725	2782	* @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
Kojto	122:f9eeca106725	2783	* @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
Kojto	122:f9eeca106725	2784	* @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
Kojto	122:f9eeca106725	2785	* @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
Kojto	122:f9eeca106725	2786	* @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
Kojto	122:f9eeca106725	2787	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
Kojto	122:f9eeca106725	2788	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
Kojto	122:f9eeca106725	2789	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
Kojto	122:f9eeca106725	2790	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
Kojto	122:f9eeca106725	2791	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
Kojto	122:f9eeca106725	2792	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
Kojto	122:f9eeca106725	2793	* @retval None
Kojto	122:f9eeca106725	2794	*/
Kojto	122:f9eeca106725	2795	__STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t ICFilter)
Kojto	122:f9eeca106725	2796	{
Kojto	122:f9eeca106725	2797	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2798	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2799	MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel]), (ICFilter >> 16U) << SHIFT_TAB_ICxx[iChannel]);
Kojto	122:f9eeca106725	2800	}
Kojto	122:f9eeca106725	2801
Kojto	122:f9eeca106725	2802	/**
Kojto	122:f9eeca106725	2803	* @brief Get the input filter duration.
Kojto	122:f9eeca106725	2804	* @rmtoll CCMR1 IC1F LL_TIM_IC_GetFilter\n
Kojto	122:f9eeca106725	2805	* CCMR1 IC2F LL_TIM_IC_GetFilter\n
Kojto	122:f9eeca106725	2806	* CCMR2 IC3F LL_TIM_IC_GetFilter\n
Kojto	122:f9eeca106725	2807	* CCMR2 IC4F LL_TIM_IC_GetFilter
Kojto	122:f9eeca106725	2808	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2809	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2810	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2811	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2812	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2813	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2814	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	2815	* @arg @ref LL_TIM_IC_FILTER_FDIV1
Kojto	122:f9eeca106725	2816	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
Kojto	122:f9eeca106725	2817	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
Kojto	122:f9eeca106725	2818	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
Kojto	122:f9eeca106725	2819	* @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
Kojto	122:f9eeca106725	2820	* @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
Kojto	122:f9eeca106725	2821	* @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
Kojto	122:f9eeca106725	2822	* @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
Kojto	122:f9eeca106725	2823	* @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
Kojto	122:f9eeca106725	2824	* @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
Kojto	122:f9eeca106725	2825	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
Kojto	122:f9eeca106725	2826	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
Kojto	122:f9eeca106725	2827	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
Kojto	122:f9eeca106725	2828	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
Kojto	122:f9eeca106725	2829	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
Kojto	122:f9eeca106725	2830	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
Kojto	122:f9eeca106725	2831	*/
Kojto	122:f9eeca106725	2832	__STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2833	{
Kojto	122:f9eeca106725	2834	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2835	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2836	return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U );
Kojto	122:f9eeca106725	2837	}
Kojto	122:f9eeca106725	2838
Kojto	122:f9eeca106725	2839	/**
Kojto	122:f9eeca106725	2840	* @brief Set the input channel polarity.
Kojto	122:f9eeca106725	2841	* @rmtoll CCER CC1P LL_TIM_IC_SetPolarity\n
Kojto	122:f9eeca106725	2842	* CCER CC1NP LL_TIM_IC_SetPolarity\n
Kojto	122:f9eeca106725	2843	* CCER CC2P LL_TIM_IC_SetPolarity\n
Kojto	122:f9eeca106725	2844	* CCER CC2NP LL_TIM_IC_SetPolarity\n
Kojto	122:f9eeca106725	2845	* CCER CC3P LL_TIM_IC_SetPolarity\n
Kojto	122:f9eeca106725	2846	* CCER CC3NP LL_TIM_IC_SetPolarity\n
Kojto	122:f9eeca106725	2847	* CCER CC4P LL_TIM_IC_SetPolarity\n
Kojto	122:f9eeca106725	2848	* CCER CC4NP LL_TIM_IC_SetPolarity
Kojto	122:f9eeca106725	2849	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2850	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2851	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2852	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2853	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2854	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2855	* @param ICPolarity This parameter can be one of the following values:
Kojto	122:f9eeca106725	2856	* @arg @ref LL_TIM_IC_POLARITY_RISING
Kojto	122:f9eeca106725	2857	* @arg @ref LL_TIM_IC_POLARITY_FALLING
Kojto	122:f9eeca106725	2858	* @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
Kojto	122:f9eeca106725	2859	* @retval None
Kojto	122:f9eeca106725	2860	*/
Kojto	122:f9eeca106725	2861	__STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t ICPolarity)
Kojto	122:f9eeca106725	2862	{
Kojto	122:f9eeca106725	2863	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2864	MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP \| TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), ICPolarity << SHIFT_TAB_CCxP[iChannel]);
Kojto	122:f9eeca106725	2865	}
Kojto	122:f9eeca106725	2866
Kojto	122:f9eeca106725	2867	/**
Kojto	122:f9eeca106725	2868	* @brief Get the current input channel polarity.
Kojto	122:f9eeca106725	2869	* @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n
Kojto	122:f9eeca106725	2870	* CCER CC1NP LL_TIM_IC_GetPolarity\n
Kojto	122:f9eeca106725	2871	* CCER CC2P LL_TIM_IC_GetPolarity\n
Kojto	122:f9eeca106725	2872	* CCER CC2NP LL_TIM_IC_GetPolarity\n
Kojto	122:f9eeca106725	2873	* CCER CC3P LL_TIM_IC_GetPolarity\n
Kojto	122:f9eeca106725	2874	* CCER CC3NP LL_TIM_IC_GetPolarity\n
Kojto	122:f9eeca106725	2875	* CCER CC4P LL_TIM_IC_GetPolarity\n
Kojto	122:f9eeca106725	2876	* CCER CC4NP LL_TIM_IC_GetPolarity
Kojto	122:f9eeca106725	2877	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2878	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2879	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2880	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2881	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2882	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2883	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	2884	* @arg @ref LL_TIM_IC_POLARITY_RISING
Kojto	122:f9eeca106725	2885	* @arg @ref LL_TIM_IC_POLARITY_FALLING
Kojto	122:f9eeca106725	2886	* @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
Kojto	122:f9eeca106725	2887	*/
Kojto	122:f9eeca106725	2888	__STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2889	{
Kojto	122:f9eeca106725	2890	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2891	return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP \| TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]);
Kojto	122:f9eeca106725	2892	}
Kojto	122:f9eeca106725	2893
Kojto	122:f9eeca106725	2894	/**
Kojto	122:f9eeca106725	2895	* @brief Connect the TIMx_CH1, CH2 and CH3 pins to the TI1 input (XOR combination).
Kojto	122:f9eeca106725	2896	* @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2897	* a timer instance provides an XOR input.
Kojto	122:f9eeca106725	2898	* @rmtoll CR2 TI1S LL_TIM_IC_EnableXORCombination
Kojto	122:f9eeca106725	2899	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2900	* @retval None
Kojto	122:f9eeca106725	2901	*/
Kojto	122:f9eeca106725	2902	__STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	2903	{
Kojto	122:f9eeca106725	2904	SET_BIT(TIMx->CR2, TIM_CR2_TI1S);
Kojto	122:f9eeca106725	2905	}
Kojto	122:f9eeca106725	2906
Kojto	122:f9eeca106725	2907	/**
Kojto	122:f9eeca106725	2908	* @brief Disconnect the TIMx_CH1, CH2 and CH3 pins from the TI1 input.
Kojto	122:f9eeca106725	2909	* @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2910	* a timer instance provides an XOR input.
Kojto	122:f9eeca106725	2911	* @rmtoll CR2 TI1S LL_TIM_IC_DisableXORCombination
Kojto	122:f9eeca106725	2912	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2913	* @retval None
Kojto	122:f9eeca106725	2914	*/
Kojto	122:f9eeca106725	2915	__STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	2916	{
Kojto	122:f9eeca106725	2917	CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);
Kojto	122:f9eeca106725	2918	}
Kojto	122:f9eeca106725	2919
Kojto	122:f9eeca106725	2920	/**
Kojto	122:f9eeca106725	2921	* @brief Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input.
Kojto	122:f9eeca106725	2922	* @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2923	* a timer instance provides an XOR input.
Kojto	122:f9eeca106725	2924	* @rmtoll CR2 TI1S LL_TIM_IC_IsEnabledXORCombination
Kojto	122:f9eeca106725	2925	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2926	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	2927	*/
Kojto	122:f9eeca106725	2928	__STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	2929	{
Kojto	122:f9eeca106725	2930	return (READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S));
Kojto	122:f9eeca106725	2931	}
Kojto	122:f9eeca106725	2932
Kojto	122:f9eeca106725	2933	/**
Kojto	122:f9eeca106725	2934	* @brief Get captured value for input channel 1.
Kojto	122:f9eeca106725	2935	* @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.
Kojto	122:f9eeca106725	2936	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2937	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2938	* @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2939	* input channel 1 is supported by a timer instance.
Kojto	122:f9eeca106725	2940	* @rmtoll CCR1 CCR1 LL_TIM_IC_GetCaptureCH1
Kojto	122:f9eeca106725	2941	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2942	* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2943	*/
Kojto	122:f9eeca106725	2944	__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	2945	{
Kojto	122:f9eeca106725	2946	return (uint32_t)(READ_REG(TIMx->CCR1));
Kojto	122:f9eeca106725	2947	}
Kojto	122:f9eeca106725	2948
Kojto	122:f9eeca106725	2949	/**
Kojto	122:f9eeca106725	2950	* @brief Get captured value for input channel 2.
Kojto	122:f9eeca106725	2951	* @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.
Kojto	122:f9eeca106725	2952	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2953	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2954	* @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2955	* input channel 2 is supported by a timer instance.
Kojto	122:f9eeca106725	2956	* @rmtoll CCR2 CCR2 LL_TIM_IC_GetCaptureCH2
Kojto	122:f9eeca106725	2957	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2958	* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2959	*/
Kojto	122:f9eeca106725	2960	__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	2961	{
Kojto	122:f9eeca106725	2962	return (uint32_t)(READ_REG(TIMx->CCR2));
Kojto	122:f9eeca106725	2963	}
Kojto	122:f9eeca106725	2964
Kojto	122:f9eeca106725	2965	/**
Kojto	122:f9eeca106725	2966	* @brief Get captured value for input channel 3.
Kojto	122:f9eeca106725	2967	* @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.
Kojto	122:f9eeca106725	2968	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2969	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2970	* @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2971	* input channel 3 is supported by a timer instance.
Kojto	122:f9eeca106725	2972	* @rmtoll CCR3 CCR3 LL_TIM_IC_GetCaptureCH3
Kojto	122:f9eeca106725	2973	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2974	* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2975	*/
Kojto	122:f9eeca106725	2976	__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	2977	{
Kojto	122:f9eeca106725	2978	return (uint32_t)(READ_REG(TIMx->CCR3));
Kojto	122:f9eeca106725	2979	}
Kojto	122:f9eeca106725	2980
Kojto	122:f9eeca106725	2981	/**
Kojto	122:f9eeca106725	2982	* @brief Get captured value for input channel 4.
Kojto	122:f9eeca106725	2983	* @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.
Kojto	122:f9eeca106725	2984	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2985	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2986	* @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2987	* input channel 4 is supported by a timer instance.
Kojto	122:f9eeca106725	2988	* @rmtoll CCR4 CCR4 LL_TIM_IC_GetCaptureCH4
Kojto	122:f9eeca106725	2989	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2990	* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2991	*/
Kojto	122:f9eeca106725	2992	__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	2993	{
Kojto	122:f9eeca106725	2994	return (uint32_t)(READ_REG(TIMx->CCR4));
Kojto	122:f9eeca106725	2995	}
Kojto	122:f9eeca106725	2996
Kojto	122:f9eeca106725	2997	/**
Kojto	122:f9eeca106725	2998	* @}
Kojto	122:f9eeca106725	2999	*/
Kojto	122:f9eeca106725	3000
Kojto	122:f9eeca106725	3001	/** @defgroup TIM_LL_EF_Clock_Selection Counter clock selection
Kojto	122:f9eeca106725	3002	* @{
Kojto	122:f9eeca106725	3003	*/
Kojto	122:f9eeca106725	3004	/**
Kojto	122:f9eeca106725	3005	* @brief Enable external clock mode 2.
Kojto	122:f9eeca106725	3006	* @note When external clock mode 2 is enabled the counter is clocked by any active edge on the ETRF signal.
Kojto	122:f9eeca106725	3007	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3008	* whether or not a timer instance supports external clock mode2.
Kojto	122:f9eeca106725	3009	* @rmtoll SMCR ECE LL_TIM_EnableExternalClock
Kojto	122:f9eeca106725	3010	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3011	* @retval None
Kojto	122:f9eeca106725	3012	*/
Kojto	122:f9eeca106725	3013	__STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3014	{
Kojto	122:f9eeca106725	3015	SET_BIT(TIMx->SMCR, TIM_SMCR_ECE);
Kojto	122:f9eeca106725	3016	}
Kojto	122:f9eeca106725	3017
Kojto	122:f9eeca106725	3018	/**
Kojto	122:f9eeca106725	3019	* @brief Disable external clock mode 2.
Kojto	122:f9eeca106725	3020	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3021	* whether or not a timer instance supports external clock mode2.
Kojto	122:f9eeca106725	3022	* @rmtoll SMCR ECE LL_TIM_DisableExternalClock
Kojto	122:f9eeca106725	3023	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3024	* @retval None
Kojto	122:f9eeca106725	3025	*/
Kojto	122:f9eeca106725	3026	__STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3027	{
Kojto	122:f9eeca106725	3028	CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);
Kojto	122:f9eeca106725	3029	}
Kojto	122:f9eeca106725	3030
Kojto	122:f9eeca106725	3031	/**
Kojto	122:f9eeca106725	3032	* @brief Indicate whether external clock mode 2 is enabled.
Kojto	122:f9eeca106725	3033	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3034	* whether or not a timer instance supports external clock mode2.
Kojto	122:f9eeca106725	3035	* @rmtoll SMCR ECE LL_TIM_IsEnabledExternalClock
Kojto	122:f9eeca106725	3036	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3037	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3038	*/
Kojto	122:f9eeca106725	3039	__STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3040	{
Kojto	122:f9eeca106725	3041	return (READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE));
Kojto	122:f9eeca106725	3042	}
Kojto	122:f9eeca106725	3043
Kojto	122:f9eeca106725	3044	/**
Kojto	122:f9eeca106725	3045	* @brief Set the clock source of the counter clock.
Kojto	122:f9eeca106725	3046	* @note when selected clock source is external clock mode 1, the timer input
Kojto	122:f9eeca106725	3047	* the external clock is applied is selected by calling the @ref LL_TIM_SetTriggerInput()
Kojto	122:f9eeca106725	3048	* function. This timer input must be configured by calling
Kojto	122:f9eeca106725	3049	* the @ref LL_TIM_IC_Config() function.
Kojto	122:f9eeca106725	3050	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3051	* whether or not a timer instance supports external clock mode1.
Kojto	122:f9eeca106725	3052	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3053	* whether or not a timer instance supports external clock mode2.
Kojto	122:f9eeca106725	3054	* @rmtoll SMCR SMS LL_TIM_SetClockSource\n
Kojto	122:f9eeca106725	3055	* SMCR ECE LL_TIM_SetClockSource
Kojto	122:f9eeca106725	3056	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3057	* @param ClockSource This parameter can be one of the following values:
Kojto	122:f9eeca106725	3058	* @arg @ref LL_TIM_CLOCKSOURCE_INTERNAL
Kojto	122:f9eeca106725	3059	* @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE1
Kojto	122:f9eeca106725	3060	* @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE2
Kojto	122:f9eeca106725	3061	* @retval None
Kojto	122:f9eeca106725	3062	*/
Kojto	122:f9eeca106725	3063	__STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef * TIMx, uint32_t ClockSource)
Kojto	122:f9eeca106725	3064	{
Kojto	122:f9eeca106725	3065	MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS \| TIM_SMCR_ECE, ClockSource);
Kojto	122:f9eeca106725	3066	}
Kojto	122:f9eeca106725	3067
Kojto	122:f9eeca106725	3068	/**
Kojto	122:f9eeca106725	3069	* @brief Set the encoder interface mode.
Kojto	122:f9eeca106725	3070	* @note Macro @ref IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3071	* whether or not a timer instance supports the encoder mode.
Kojto	122:f9eeca106725	3072	* @rmtoll SMCR SMS LL_TIM_SetEncoderMode
Kojto	122:f9eeca106725	3073	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3074	* @param EncoderMode This parameter can be one of the following values:
Kojto	122:f9eeca106725	3075	* @arg @ref LL_TIM_ENCODERMODE_X2_TI1
Kojto	122:f9eeca106725	3076	* @arg @ref LL_TIM_ENCODERMODE_X2_TI2
Kojto	122:f9eeca106725	3077	* @arg @ref LL_TIM_ENCODERMODE_X4_TI12
Kojto	122:f9eeca106725	3078	* @retval None
Kojto	122:f9eeca106725	3079	*/
Kojto	122:f9eeca106725	3080	__STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef * TIMx, uint32_t EncoderMode)
Kojto	122:f9eeca106725	3081	{
Kojto	122:f9eeca106725	3082	MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode);
Kojto	122:f9eeca106725	3083	}
Kojto	122:f9eeca106725	3084
Kojto	122:f9eeca106725	3085	/**
Kojto	122:f9eeca106725	3086	* @}
Kojto	122:f9eeca106725	3087	*/
Kojto	122:f9eeca106725	3088
Kojto	122:f9eeca106725	3089	/** @defgroup TIM_LL_EF_Timer_Synchronization Timer synchronisation configuration
Kojto	122:f9eeca106725	3090	* @{
Kojto	122:f9eeca106725	3091	*/
Kojto	122:f9eeca106725	3092	/**
Kojto	122:f9eeca106725	3093	* @brief Set the trigger output (TRGO) used for timer synchronization .
Kojto	122:f9eeca106725	3094	* @note Macro @ref IS_TIM_MASTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3095	* whether or not a timer instance can operate as a master timer.
Kojto	122:f9eeca106725	3096	* @rmtoll CR2 MMS LL_TIM_SetTriggerOutput
Kojto	122:f9eeca106725	3097	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3098	* @param TimerSynchronization This parameter can be one of the following values:
Kojto	122:f9eeca106725	3099	* @arg @ref LL_TIM_TRGO_RESET
Kojto	122:f9eeca106725	3100	* @arg @ref LL_TIM_TRGO_ENABLE
Kojto	122:f9eeca106725	3101	* @arg @ref LL_TIM_TRGO_UPDATE
Kojto	122:f9eeca106725	3102	* @arg @ref LL_TIM_TRGO_CC1IF
Kojto	122:f9eeca106725	3103	* @arg @ref LL_TIM_TRGO_OC1REF
Kojto	122:f9eeca106725	3104	* @arg @ref LL_TIM_TRGO_OC2REF
Kojto	122:f9eeca106725	3105	* @arg @ref LL_TIM_TRGO_OC3REF
Kojto	122:f9eeca106725	3106	* @arg @ref LL_TIM_TRGO_OC4REF
Kojto	122:f9eeca106725	3107	* @retval None
Kojto	122:f9eeca106725	3108	*/
Kojto	122:f9eeca106725	3109	__STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef * TIMx, uint32_t TimerSynchronization)
Kojto	122:f9eeca106725	3110	{
Kojto	122:f9eeca106725	3111	MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);
Kojto	122:f9eeca106725	3112	}
Kojto	122:f9eeca106725	3113
Kojto	122:f9eeca106725	3114	/**
Kojto	122:f9eeca106725	3115	* @brief Set the trigger output 2 (TRGO2) used for ADC synchronization .
Kojto	122:f9eeca106725	3116	* @note Macro @ref IS_TIM_TRGO2_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3117	* whether or not a timer instance can be used for ADC synchronization.
Kojto	122:f9eeca106725	3118	* @rmtoll CR2 MMS2 LL_TIM_SetTriggerOutput2
Kojto	122:f9eeca106725	3119	* @param TIMx Timer Instance
Kojto	122:f9eeca106725	3120	* @param ADCSynchronization This parameter can be one of the following values:
Kojto	122:f9eeca106725	3121	* @arg @ref LL_TIM_TRGO2_RESET
Kojto	122:f9eeca106725	3122	* @arg @ref LL_TIM_TRGO2_ENABLE
Kojto	122:f9eeca106725	3123	* @arg @ref LL_TIM_TRGO2_UPDATE
Kojto	122:f9eeca106725	3124	* @arg @ref LL_TIM_TRGO2_CC1F
Kojto	122:f9eeca106725	3125	* @arg @ref LL_TIM_TRGO2_OC1
Kojto	122:f9eeca106725	3126	* @arg @ref LL_TIM_TRGO2_OC2
Kojto	122:f9eeca106725	3127	* @arg @ref LL_TIM_TRGO2_OC3
Kojto	122:f9eeca106725	3128	* @arg @ref LL_TIM_TRGO2_OC4
Kojto	122:f9eeca106725	3129	* @arg @ref LL_TIM_TRGO2_OC5
Kojto	122:f9eeca106725	3130	* @arg @ref LL_TIM_TRGO2_OC6
Kojto	122:f9eeca106725	3131	* @arg @ref LL_TIM_TRGO2_OC4_RISINGFALLING
Kojto	122:f9eeca106725	3132	* @arg @ref LL_TIM_TRGO2_OC6_RISINGFALLING
Kojto	122:f9eeca106725	3133	* @arg @ref LL_TIM_TRGO2_OC4_RISING_OC6_RISING
Kojto	122:f9eeca106725	3134	* @arg @ref LL_TIM_TRGO2_OC4_RISING_OC6_FALLING
Kojto	122:f9eeca106725	3135	* @arg @ref LL_TIM_TRGO2_OC5_RISING_OC6_RISING
Kojto	122:f9eeca106725	3136	* @arg @ref LL_TIM_TRGO2_OC5_RISING_OC6_FALLING
Kojto	122:f9eeca106725	3137	* @retval None
Kojto	122:f9eeca106725	3138	*/
Kojto	122:f9eeca106725	3139	__STATIC_INLINE void LL_TIM_SetTriggerOutput2(TIM_TypeDef * TIMx, uint32_t ADCSynchronization)
Kojto	122:f9eeca106725	3140	{
Kojto	122:f9eeca106725	3141	MODIFY_REG(TIMx->CR2, TIM_CR2_MMS2, ADCSynchronization);
Kojto	122:f9eeca106725	3142	}
Kojto	122:f9eeca106725	3143
Kojto	122:f9eeca106725	3144	/**
Kojto	122:f9eeca106725	3145	* @brief Set the synchronization mode of a slave timer.
Kojto	122:f9eeca106725	3146	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3147	* a timer instance can operate as a slave timer.
Kojto	122:f9eeca106725	3148	* @rmtoll SMCR SMS LL_TIM_SetSlaveMode
Kojto	122:f9eeca106725	3149	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3150	* @param SlaveMode This parameter can be one of the following values:
Kojto	122:f9eeca106725	3151	* @arg @ref LL_TIM_SLAVEMODE_DISABLED
Kojto	122:f9eeca106725	3152	* @arg @ref LL_TIM_SLAVEMODE_RESET
Kojto	122:f9eeca106725	3153	* @arg @ref LL_TIM_SLAVEMODE_GATED
Kojto	122:f9eeca106725	3154	* @arg @ref LL_TIM_SLAVEMODE_TRIGGER
Kojto	122:f9eeca106725	3155	* @arg @ref LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER
Kojto	122:f9eeca106725	3156	* @retval None
Kojto	122:f9eeca106725	3157	*/
Kojto	122:f9eeca106725	3158	__STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef * TIMx, uint32_t SlaveMode)
Kojto	122:f9eeca106725	3159	{
Kojto	122:f9eeca106725	3160	MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode);
Kojto	122:f9eeca106725	3161	}
Kojto	122:f9eeca106725	3162
Kojto	122:f9eeca106725	3163	/**
Kojto	122:f9eeca106725	3164	* @brief Set the selects the trigger input to be used to synchronize the counter.
Kojto	122:f9eeca106725	3165	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3166	* a timer instance can operate as a slave timer.
Kojto	122:f9eeca106725	3167	* @rmtoll SMCR TS LL_TIM_SetTriggerInput
Kojto	122:f9eeca106725	3168	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3169	* @param TriggerInput This parameter can be one of the following values:
Kojto	122:f9eeca106725	3170	* @arg @ref LL_TIM_TS_ITR0
Kojto	122:f9eeca106725	3171	* @arg @ref LL_TIM_TS_ITR1
Kojto	122:f9eeca106725	3172	* @arg @ref LL_TIM_TS_ITR2
Kojto	122:f9eeca106725	3173	* @arg @ref LL_TIM_TS_ITR3
Kojto	122:f9eeca106725	3174	* @arg @ref LL_TIM_TS_TI1F_ED
Kojto	122:f9eeca106725	3175	* @arg @ref LL_TIM_TS_TI1FP1
Kojto	122:f9eeca106725	3176	* @arg @ref LL_TIM_TS_TI2FP2
Kojto	122:f9eeca106725	3177	* @arg @ref LL_TIM_TS_ETRF
Kojto	122:f9eeca106725	3178	* @retval None
Kojto	122:f9eeca106725	3179	*/
Kojto	122:f9eeca106725	3180	__STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef * TIMx, uint32_t TriggerInput)
Kojto	122:f9eeca106725	3181	{
Kojto	122:f9eeca106725	3182	MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput);
Kojto	122:f9eeca106725	3183	}
Kojto	122:f9eeca106725	3184
Kojto	122:f9eeca106725	3185	/**
Kojto	122:f9eeca106725	3186	* @brief Enable the Master/Slave mode.
Kojto	122:f9eeca106725	3187	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3188	* a timer instance can operate as a slave timer.
Kojto	122:f9eeca106725	3189	* @rmtoll SMCR MSM LL_TIM_EnableMasterSlaveMode
Kojto	122:f9eeca106725	3190	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3191	* @retval None
Kojto	122:f9eeca106725	3192	*/
Kojto	122:f9eeca106725	3193	__STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3194	{
Kojto	122:f9eeca106725	3195	SET_BIT(TIMx->SMCR, TIM_SMCR_MSM);
Kojto	122:f9eeca106725	3196	}
Kojto	122:f9eeca106725	3197
Kojto	122:f9eeca106725	3198	/**
Kojto	122:f9eeca106725	3199	* @brief Disable the Master/Slave mode.
Kojto	122:f9eeca106725	3200	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3201	* a timer instance can operate as a slave timer.
Kojto	122:f9eeca106725	3202	* @rmtoll SMCR MSM LL_TIM_DisableMasterSlaveMode
Kojto	122:f9eeca106725	3203	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3204	* @retval None
Kojto	122:f9eeca106725	3205	*/
Kojto	122:f9eeca106725	3206	__STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3207	{
Kojto	122:f9eeca106725	3208	CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);
Kojto	122:f9eeca106725	3209	}
Kojto	122:f9eeca106725	3210
Kojto	122:f9eeca106725	3211	/**
Kojto	122:f9eeca106725	3212	* @brief Indicates whether the Master/Slave mode is enabled.
Kojto	122:f9eeca106725	3213	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3214	* a timer instance can operate as a slave timer.
Kojto	122:f9eeca106725	3215	* @rmtoll SMCR MSM LL_TIM_IsEnabledMasterSlaveMode
Kojto	122:f9eeca106725	3216	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3217	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3218	*/
Kojto	122:f9eeca106725	3219	__STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3220	{
Kojto	122:f9eeca106725	3221	return (READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM));
Kojto	122:f9eeca106725	3222	}
Kojto	122:f9eeca106725	3223
Kojto	122:f9eeca106725	3224	/**
Kojto	122:f9eeca106725	3225	* @brief Configure the external trigger (ETR) input.
Kojto	122:f9eeca106725	3226	* @note Macro @ref IS_TIM_ETR_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3227	* a timer instance provides an external trigger input.
Kojto	122:f9eeca106725	3228	* @rmtoll SMCR ETP LL_TIM_ConfigETR\n
Kojto	122:f9eeca106725	3229	* SMCR ETPS LL_TIM_ConfigETR\n
Kojto	122:f9eeca106725	3230	* SMCR ETF LL_TIM_ConfigETR
Kojto	122:f9eeca106725	3231	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3232	* @param ETRPolarity This parameter can be one of the following values:
Kojto	122:f9eeca106725	3233	* @arg @ref LL_TIM_ETR_POLARITY_NONINVERTED
Kojto	122:f9eeca106725	3234	* @arg @ref LL_TIM_ETR_POLARITY_INVERTED
Kojto	122:f9eeca106725	3235	* @param ETRPrescaler This parameter can be one of the following values:
Kojto	122:f9eeca106725	3236	* @arg @ref LL_TIM_ETR_PRESCALER_DIV1
Kojto	122:f9eeca106725	3237	* @arg @ref LL_TIM_ETR_PRESCALER_DIV2
Kojto	122:f9eeca106725	3238	* @arg @ref LL_TIM_ETR_PRESCALER_DIV4
Kojto	122:f9eeca106725	3239	* @arg @ref LL_TIM_ETR_PRESCALER_DIV8
Kojto	122:f9eeca106725	3240	* @param ETRFilter This parameter can be one of the following values:
Kojto	122:f9eeca106725	3241	* @arg @ref LL_TIM_ETR_FILTER_FDIV1
Kojto	122:f9eeca106725	3242	* @arg @ref LL_TIM_ETR_FILTER_FDIV1_N2
Kojto	122:f9eeca106725	3243	* @arg @ref LL_TIM_ETR_FILTER_FDIV1_N4
Kojto	122:f9eeca106725	3244	* @arg @ref LL_TIM_ETR_FILTER_FDIV1_N8
Kojto	122:f9eeca106725	3245	* @arg @ref LL_TIM_ETR_FILTER_FDIV2_N6
Kojto	122:f9eeca106725	3246	* @arg @ref LL_TIM_ETR_FILTER_FDIV2_N8
Kojto	122:f9eeca106725	3247	* @arg @ref LL_TIM_ETR_FILTER_FDIV4_N6
Kojto	122:f9eeca106725	3248	* @arg @ref LL_TIM_ETR_FILTER_FDIV4_N8
Kojto	122:f9eeca106725	3249	* @arg @ref LL_TIM_ETR_FILTER_FDIV8_N6
Kojto	122:f9eeca106725	3250	* @arg @ref LL_TIM_ETR_FILTER_FDIV8_N8
Kojto	122:f9eeca106725	3251	* @arg @ref LL_TIM_ETR_FILTER_FDIV16_N5
Kojto	122:f9eeca106725	3252	* @arg @ref LL_TIM_ETR_FILTER_FDIV16_N6
Kojto	122:f9eeca106725	3253	* @arg @ref LL_TIM_ETR_FILTER_FDIV16_N8
Kojto	122:f9eeca106725	3254	* @arg @ref LL_TIM_ETR_FILTER_FDIV32_N5
Kojto	122:f9eeca106725	3255	* @arg @ref LL_TIM_ETR_FILTER_FDIV32_N6
Kojto	122:f9eeca106725	3256	* @arg @ref LL_TIM_ETR_FILTER_FDIV32_N8
Kojto	122:f9eeca106725	3257	* @retval None
Kojto	122:f9eeca106725	3258	*/
Kojto	122:f9eeca106725	3259	__STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef * TIMx, uint32_t ETRPolarity, uint32_t ETRPrescaler, uint32_t ETRFilter)
Kojto	122:f9eeca106725	3260	{
Kojto	122:f9eeca106725	3261	MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP \| TIM_SMCR_ETPS \| TIM_SMCR_ETF, ETRPolarity \| ETRPrescaler \| ETRFilter);
Kojto	122:f9eeca106725	3262	}
Kojto	122:f9eeca106725	3263
Kojto	122:f9eeca106725	3264	/**
Kojto	122:f9eeca106725	3265	* @brief Select the external trigger (ETR) input source.
Kojto	122:f9eeca106725	3266	* @note Macro @ref IS_TIM_ETRSEL_INSTANCE(TIMx) can be used to check whether or
Kojto	122:f9eeca106725	3267	* not a timer instance supports ETR source selection.
Kojto	122:f9eeca106725	3268	* @rmtoll OR2 ETRSEL LL_TIM_SetETRSource
Kojto	122:f9eeca106725	3269	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3270	* @param ETRSource This parameter can be one of the following values:
Kojto	122:f9eeca106725	3271	* @arg @ref LL_TIM_ETRSOURCE_LEGACY
Kojto	122:f9eeca106725	3272	* @arg @ref LL_TIM_ETRSOURCE_COMP1
Kojto	122:f9eeca106725	3273	* @arg @ref LL_TIM_ETRSOURCE_COMP2
Kojto	122:f9eeca106725	3274	* @retval None
Kojto	122:f9eeca106725	3275	*/
Kojto	122:f9eeca106725	3276	__STATIC_INLINE void LL_TIM_SetETRSource(TIM_TypeDef * TIMx, uint32_t ETRSource)
Kojto	122:f9eeca106725	3277	{
Kojto	122:f9eeca106725	3278
Kojto	122:f9eeca106725	3279	MODIFY_REG(TIMx->OR2, TIMx_OR2_ETRSEL, ETRSource);
Kojto	122:f9eeca106725	3280	}
Kojto	122:f9eeca106725	3281
Kojto	122:f9eeca106725	3282	/**
Kojto	122:f9eeca106725	3283	* @}
Kojto	122:f9eeca106725	3284	*/
Kojto	122:f9eeca106725	3285
Kojto	122:f9eeca106725	3286	/** @defgroup TIM_LL_EF_Break_Function Break function configuration
Kojto	122:f9eeca106725	3287	* @{
Kojto	122:f9eeca106725	3288	*/
Kojto	122:f9eeca106725	3289	/**
Kojto	122:f9eeca106725	3290	* @brief Enable the break function.
Kojto	122:f9eeca106725	3291	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3292	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3293	* @rmtoll BDTR BKE LL_TIM_EnableBRK
Kojto	122:f9eeca106725	3294	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3295	* @retval None
Kojto	122:f9eeca106725	3296	*/
Kojto	122:f9eeca106725	3297	__STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3298	{
Kojto	122:f9eeca106725	3299	SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);
Kojto	122:f9eeca106725	3300	}
Kojto	122:f9eeca106725	3301
Kojto	122:f9eeca106725	3302	/**
Kojto	122:f9eeca106725	3303	* @brief Disable the break function.
Kojto	122:f9eeca106725	3304	* @rmtoll BDTR BKE LL_TIM_DisableBRK
Kojto	122:f9eeca106725	3305	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3306	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3307	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3308	* @retval None
Kojto	122:f9eeca106725	3309	*/
Kojto	122:f9eeca106725	3310	__STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3311	{
Kojto	122:f9eeca106725	3312	CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);
Kojto	122:f9eeca106725	3313	}
Kojto	122:f9eeca106725	3314
Kojto	122:f9eeca106725	3315	/**
Kojto	122:f9eeca106725	3316	* @brief Configure the break input.
Kojto	122:f9eeca106725	3317	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3318	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3319	* @rmtoll BDTR BKP LL_TIM_ConfigBRK\n
Kojto	122:f9eeca106725	3320	* BDTR BKF LL_TIM_ConfigBRK
Kojto	122:f9eeca106725	3321	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3322	* @param BreakPolarity This parameter can be one of the following values:
Kojto	122:f9eeca106725	3323	* @arg @ref LL_TIM_BREAK_POLARITY_LOW
Kojto	122:f9eeca106725	3324	* @arg @ref LL_TIM_BREAK_POLARITY_HIGH
Kojto	122:f9eeca106725	3325	* @param BreakFilter This parameter can be one of the following values:
Kojto	122:f9eeca106725	3326	* @arg @ref LL_TIM_BREAK_FILTER_FDIV1
Kojto	122:f9eeca106725	3327	* @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N2
Kojto	122:f9eeca106725	3328	* @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N4
Kojto	122:f9eeca106725	3329	* @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N8
Kojto	122:f9eeca106725	3330	* @arg @ref LL_TIM_BREAK_FILTER_FDIV2_N6
Kojto	122:f9eeca106725	3331	* @arg @ref LL_TIM_BREAK_FILTER_FDIV2_N8
Kojto	122:f9eeca106725	3332	* @arg @ref LL_TIM_BREAK_FILTER_FDIV4_N6
Kojto	122:f9eeca106725	3333	* @arg @ref LL_TIM_BREAK_FILTER_FDIV4_N8
Kojto	122:f9eeca106725	3334	* @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N6
Kojto	122:f9eeca106725	3335	* @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N8
Kojto	122:f9eeca106725	3336	* @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N5
Kojto	122:f9eeca106725	3337	* @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N6
Kojto	122:f9eeca106725	3338	* @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N8
Kojto	122:f9eeca106725	3339	* @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N5
Kojto	122:f9eeca106725	3340	* @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N6
Kojto	122:f9eeca106725	3341	* @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8
Kojto	122:f9eeca106725	3342	* @retval None
Kojto	122:f9eeca106725	3343	*/
Kojto	122:f9eeca106725	3344	__STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef * TIMx, uint32_t BreakPolarity, uint32_t BreakFilter)
Kojto	122:f9eeca106725	3345	{
Kojto	122:f9eeca106725	3346	MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP \| TIM_BDTR_BKF, BreakPolarity \| BreakFilter);
Kojto	122:f9eeca106725	3347	}
Kojto	122:f9eeca106725	3348
Kojto	122:f9eeca106725	3349	/**
Kojto	122:f9eeca106725	3350	* @brief Enable the break 2 function.
Kojto	122:f9eeca106725	3351	* @note Macro @ref IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3352	* a timer instance provides a second break input.
Kojto	122:f9eeca106725	3353	* @rmtoll BDTR BK2E LL_TIM_EnableBRK2
Kojto	122:f9eeca106725	3354	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3355	* @retval None
Kojto	122:f9eeca106725	3356	*/
Kojto	122:f9eeca106725	3357	__STATIC_INLINE void LL_TIM_EnableBRK2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3358	{
Kojto	122:f9eeca106725	3359	SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E);
Kojto	122:f9eeca106725	3360	}
Kojto	122:f9eeca106725	3361
Kojto	122:f9eeca106725	3362	/**
Kojto	122:f9eeca106725	3363	* @brief Disable the break 2 function.
Kojto	122:f9eeca106725	3364	* @note Macro @ref IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3365	* a timer instance provides a second break input.
Kojto	122:f9eeca106725	3366	* @rmtoll BDTR BK2E LL_TIM_DisableBRK2
Kojto	122:f9eeca106725	3367	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3368	* @retval None
Kojto	122:f9eeca106725	3369	*/
Kojto	122:f9eeca106725	3370	__STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3371	{
Kojto	122:f9eeca106725	3372	CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E);
Kojto	122:f9eeca106725	3373	}
Kojto	122:f9eeca106725	3374
Kojto	122:f9eeca106725	3375	/**
Kojto	122:f9eeca106725	3376	* @brief Configure the break 2 input.
Kojto	122:f9eeca106725	3377	* @note Macro @ref IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3378	* a timer instance provides a second break input.
Kojto	122:f9eeca106725	3379	* @rmtoll BDTR BK2P LL_TIM_ConfigBRK2\n
Kojto	122:f9eeca106725	3380	* BDTR BK2F LL_TIM_ConfigBRK2
Kojto	122:f9eeca106725	3381	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3382	* @param Break2Polarity This parameter can be one of the following values:
Kojto	122:f9eeca106725	3383	* @arg @ref LL_TIM_BREAK2_POLARITY_LOW
Kojto	122:f9eeca106725	3384	* @arg @ref LL_TIM_BREAK2_POLARITY_HIGH
Kojto	122:f9eeca106725	3385	* @param Break2Filter This parameter can be one of the following values:
Kojto	122:f9eeca106725	3386	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV1
Kojto	122:f9eeca106725	3387	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N2
Kojto	122:f9eeca106725	3388	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N4
Kojto	122:f9eeca106725	3389	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N8
Kojto	122:f9eeca106725	3390	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N6
Kojto	122:f9eeca106725	3391	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N8
Kojto	122:f9eeca106725	3392	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N6
Kojto	122:f9eeca106725	3393	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N8
Kojto	122:f9eeca106725	3394	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N6
Kojto	122:f9eeca106725	3395	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N8
Kojto	122:f9eeca106725	3396	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N5
Kojto	122:f9eeca106725	3397	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6
Kojto	122:f9eeca106725	3398	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8
Kojto	122:f9eeca106725	3399	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5
Kojto	122:f9eeca106725	3400	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N6
Kojto	122:f9eeca106725	3401	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N8
Kojto	122:f9eeca106725	3402	* @retval None
Kojto	122:f9eeca106725	3403	*/
Kojto	122:f9eeca106725	3404	__STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef * TIMx, uint32_t Break2Polarity, uint32_t Break2Filter)
Kojto	122:f9eeca106725	3405	{
Kojto	122:f9eeca106725	3406	MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P \| TIM_BDTR_BK2F, Break2Polarity \| Break2Filter);
Kojto	122:f9eeca106725	3407	}
Kojto	122:f9eeca106725	3408
Kojto	122:f9eeca106725	3409	/**
Kojto	122:f9eeca106725	3410	* @brief Select the outputs off state (enabled v.s. disabled) in Idle and Run modes.
Kojto	122:f9eeca106725	3411	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3412	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3413	* @rmtoll BDTR OSSI LL_TIM_SetOffStates\n
Kojto	122:f9eeca106725	3414	* BDTR OSSR LL_TIM_SetOffStates
Kojto	122:f9eeca106725	3415	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3416	* @param OffStateIdle This parameter can be one of the following values:
Kojto	122:f9eeca106725	3417	* @arg @ref LL_TIM_OSSI_DISABLE
Kojto	122:f9eeca106725	3418	* @arg @ref LL_TIM_OSSI_ENABLE
Kojto	122:f9eeca106725	3419	* @param OffStateRun This parameter can be one of the following values:
Kojto	122:f9eeca106725	3420	* @arg @ref LL_TIM_OSSR_DISABLE
Kojto	122:f9eeca106725	3421	* @arg @ref LL_TIM_OSSR_ENABLE
Kojto	122:f9eeca106725	3422	* @retval None
Kojto	122:f9eeca106725	3423	*/
Kojto	122:f9eeca106725	3424	__STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef * TIMx, uint32_t OffStateIdle, uint32_t OffStateRun)
Kojto	122:f9eeca106725	3425	{
Kojto	122:f9eeca106725	3426	MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI \| TIM_BDTR_OSSR, OffStateIdle \| OffStateRun);
Kojto	122:f9eeca106725	3427	}
Kojto	122:f9eeca106725	3428
Kojto	122:f9eeca106725	3429	/**
Kojto	122:f9eeca106725	3430	* @brief Enable automatic output (MOE can be set by software or automatically when a break input is active).
Kojto	122:f9eeca106725	3431	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3432	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3433	* @rmtoll BDTR AOE LL_TIM_EnableAutomaticOutput
Kojto	122:f9eeca106725	3434	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3435	* @retval None
Kojto	122:f9eeca106725	3436	*/
Kojto	122:f9eeca106725	3437	__STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3438	{
Kojto	122:f9eeca106725	3439	SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);
Kojto	122:f9eeca106725	3440	}
Kojto	122:f9eeca106725	3441
Kojto	122:f9eeca106725	3442	/**
Kojto	122:f9eeca106725	3443	* @brief Disable automatic output (MOE can be set only by software).
Kojto	122:f9eeca106725	3444	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3445	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3446	* @rmtoll BDTR AOE LL_TIM_DisableAutomaticOutput
Kojto	122:f9eeca106725	3447	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3448	* @retval None
Kojto	122:f9eeca106725	3449	*/
Kojto	122:f9eeca106725	3450	__STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3451	{
Kojto	122:f9eeca106725	3452	CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);
Kojto	122:f9eeca106725	3453	}
Kojto	122:f9eeca106725	3454
Kojto	122:f9eeca106725	3455	/**
Kojto	122:f9eeca106725	3456	* @brief Indicate whether automatic output is enabled.
Kojto	122:f9eeca106725	3457	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3458	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3459	* @rmtoll BDTR AOE LL_TIM_IsEnabledAutomaticOutput
Kojto	122:f9eeca106725	3460	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3461	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3462	*/
Kojto	122:f9eeca106725	3463	__STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3464	{
Kojto	122:f9eeca106725	3465	return (READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE));
Kojto	122:f9eeca106725	3466	}
Kojto	122:f9eeca106725	3467
Kojto	122:f9eeca106725	3468	/**
Kojto	122:f9eeca106725	3469	* @brief Enable the outputs (set the MOE bit in TIMx_BDTR register).
Kojto	122:f9eeca106725	3470	* @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by
Kojto	122:f9eeca106725	3471	* software and is reset in case of break or break2 event
Kojto	122:f9eeca106725	3472	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3473	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3474	* @rmtoll BDTR MOE LL_TIM_EnableAllOutputs
Kojto	122:f9eeca106725	3475	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3476	* @retval None
Kojto	122:f9eeca106725	3477	*/
Kojto	122:f9eeca106725	3478	__STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3479	{
Kojto	122:f9eeca106725	3480	SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);
Kojto	122:f9eeca106725	3481	}
Kojto	122:f9eeca106725	3482
Kojto	122:f9eeca106725	3483	/**
Kojto	122:f9eeca106725	3484	* @brief Disable the outputs (reset the MOE bit in TIMx_BDTR register).
Kojto	122:f9eeca106725	3485	* @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by
Kojto	122:f9eeca106725	3486	* software and is reset in case of break or break2 event.
Kojto	122:f9eeca106725	3487	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3488	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3489	* @rmtoll BDTR MOE LL_TIM_DisableAllOutputs
Kojto	122:f9eeca106725	3490	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3491	* @retval None
Kojto	122:f9eeca106725	3492	*/
Kojto	122:f9eeca106725	3493	__STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3494	{
Kojto	122:f9eeca106725	3495	CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);
Kojto	122:f9eeca106725	3496	}
Kojto	122:f9eeca106725	3497
Kojto	122:f9eeca106725	3498	/**
Kojto	122:f9eeca106725	3499	* @brief Indicates whether outputs are enabled.
Kojto	122:f9eeca106725	3500	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3501	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3502	* @rmtoll BDTR MOE LL_TIM_IsEnabledAllOutputs
Kojto	122:f9eeca106725	3503	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3504	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3505	*/
Kojto	122:f9eeca106725	3506	__STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3507	{
Kojto	122:f9eeca106725	3508	return (READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE));
Kojto	122:f9eeca106725	3509	}
Kojto	122:f9eeca106725	3510
Kojto	122:f9eeca106725	3511	/**
Kojto	122:f9eeca106725	3512	* @brief Enable the signals connected to the designated timer break input.
Kojto	122:f9eeca106725	3513	* @note Macro @ref IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
Kojto	122:f9eeca106725	3514	* or not a timer instance allows for break input selection.
Kojto	122:f9eeca106725	3515	* @rmtoll OR2 BKINE LL_TIM_EnableBreakInputSource\n
Kojto	122:f9eeca106725	3516	* OR2 BKCMP1E LL_TIM_EnableBreakInputSource\n
Kojto	122:f9eeca106725	3517	* OR2 BKCMP2E LL_TIM_EnableBreakInputSource\n
Kojto	122:f9eeca106725	3518	* OR2 BKDFBK0E LL_TIM_EnableBreakInputSource\n
Kojto	122:f9eeca106725	3519	* OR3 BKINE LL_TIM_EnableBreakInputSource\n
Kojto	122:f9eeca106725	3520	* OR3 BKCMP1E LL_TIM_EnableBreakInputSource\n
Kojto	122:f9eeca106725	3521	* OR3 BKCMP2E LL_TIM_EnableBreakInputSource\n
Kojto	122:f9eeca106725	3522	* OR3 BKDFBK0E LL_TIM_EnableBreakInputSource
Kojto	122:f9eeca106725	3523	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3524	* @param BreakInput This parameter can be one of the following values:
Kojto	122:f9eeca106725	3525	* @arg @ref LL_TIM_BREAK_INPUT_BKIN
Kojto	122:f9eeca106725	3526	* @arg @ref LL_TIM_BREAK_INPUT_BKIN2
Kojto	122:f9eeca106725	3527	* @param Source This parameter can be one of the following values:
Kojto	122:f9eeca106725	3528	* @arg @ref LL_TIM_BKIN_SOURCE_BKIN
Kojto	122:f9eeca106725	3529	* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP1
Kojto	122:f9eeca106725	3530	* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP2
Kojto	122:f9eeca106725	3531	* @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
Kojto	122:f9eeca106725	3532	* @retval None
Kojto	122:f9eeca106725	3533	*/
Kojto	122:f9eeca106725	3534	__STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef * TIMx, uint32_t BreakInput, uint32_t Source)
Kojto	122:f9eeca106725	3535	{
Kojto	122:f9eeca106725	3536	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->OR2)+ BreakInput));
Kojto	122:f9eeca106725	3537	SET_BIT(*pReg , Source);
Kojto	122:f9eeca106725	3538	}
Kojto	122:f9eeca106725	3539
Kojto	122:f9eeca106725	3540	/**
Kojto	122:f9eeca106725	3541	* @brief Disable the signals connected to the designated timer break input.
Kojto	122:f9eeca106725	3542	* @note Macro @ref IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
Kojto	122:f9eeca106725	3543	* or not a timer instance allows for break input selection.
Kojto	122:f9eeca106725	3544	* @rmtoll OR2 BKINE LL_TIM_DisableBreakInputSource\n
Kojto	122:f9eeca106725	3545	* OR2 BKCMP1E LL_TIM_DisableBreakInputSource\n
Kojto	122:f9eeca106725	3546	* OR2 BKCMP2E LL_TIM_DisableBreakInputSource\n
Kojto	122:f9eeca106725	3547	* OR2 BKDFBK0E LL_TIM_DisableBreakInputSource\n
Kojto	122:f9eeca106725	3548	* OR3 BKINE LL_TIM_DisableBreakInputSource\n
Kojto	122:f9eeca106725	3549	* OR3 BKCMP1E LL_TIM_DisableBreakInputSource\n
Kojto	122:f9eeca106725	3550	* OR3 BKCMP2E LL_TIM_DisableBreakInputSource\n
Kojto	122:f9eeca106725	3551	* OR3 BKDFBK0E LL_TIM_DisableBreakInputSource
Kojto	122:f9eeca106725	3552	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3553	* @param BreakInput This parameter can be one of the following values:
Kojto	122:f9eeca106725	3554	* @arg @ref LL_TIM_BREAK_INPUT_BKIN
Kojto	122:f9eeca106725	3555	* @arg @ref LL_TIM_BREAK_INPUT_BKIN2
Kojto	122:f9eeca106725	3556	* @param Source This parameter can be one of the following values:
Kojto	122:f9eeca106725	3557	* @arg @ref LL_TIM_BKIN_SOURCE_BKIN
Kojto	122:f9eeca106725	3558	* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP1
Kojto	122:f9eeca106725	3559	* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP2
Kojto	122:f9eeca106725	3560	* @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
Kojto	122:f9eeca106725	3561	* @retval None
Kojto	122:f9eeca106725	3562	*/
Kojto	122:f9eeca106725	3563	__STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef * TIMx, uint32_t BreakInput, uint32_t Source)
Kojto	122:f9eeca106725	3564	{
Kojto	122:f9eeca106725	3565	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->OR2)+ BreakInput));
Kojto	122:f9eeca106725	3566	CLEAR_BIT(*pReg, Source);
Kojto	122:f9eeca106725	3567	}
Kojto	122:f9eeca106725	3568
Kojto	122:f9eeca106725	3569	/**
Kojto	122:f9eeca106725	3570	* @brief Set the polarity of the break signal for the timer break input.
Kojto	122:f9eeca106725	3571	* @note Macro @ref IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
Kojto	122:f9eeca106725	3572	* or not a timer instance allows for break input selection.
Kojto	122:f9eeca106725	3573	* @rmtoll OR2 BKINE LL_TIM_SetBreakInputSourcePolarity\n
Kojto	122:f9eeca106725	3574	* OR2 BKCMP1E LL_TIM_SetBreakInputSourcePolarity\n
Kojto	122:f9eeca106725	3575	* OR2 BKCMP2E LL_TIM_SetBreakInputSourcePolarity\n
Kojto	122:f9eeca106725	3576	* OR2 BKINP LL_TIM_SetBreakInputSourcePolarity\n
Kojto	122:f9eeca106725	3577	* OR3 BKINE LL_TIM_SetBreakInputSourcePolarity\n
Kojto	122:f9eeca106725	3578	* OR3 BKCMP1E LL_TIM_SetBreakInputSourcePolarity\n
Kojto	122:f9eeca106725	3579	* OR3 BKCMP2E LL_TIM_SetBreakInputSourcePolarity\n
Kojto	122:f9eeca106725	3580	* OR3 BKINP LL_TIM_SetBreakInputSourcePolarity
Kojto	122:f9eeca106725	3581	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3582	* @param BreakInput This parameter can be one of the following values:
Kojto	122:f9eeca106725	3583	* @arg @ref LL_TIM_BREAK_INPUT_BKIN
Kojto	122:f9eeca106725	3584	* @arg @ref LL_TIM_BREAK_INPUT_BKIN2
Kojto	122:f9eeca106725	3585	* @param Source This parameter can be one of the following values:
Kojto	122:f9eeca106725	3586	* @arg @ref LL_TIM_BKIN_SOURCE_BKIN
Kojto	122:f9eeca106725	3587	* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP1
Kojto	122:f9eeca106725	3588	* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP2
Kojto	122:f9eeca106725	3589	* @param Polarity This parameter can be one of the following values:
Kojto	122:f9eeca106725	3590	* @arg @ref LL_TIM_BKIN_POLARITY_LOW
Kojto	122:f9eeca106725	3591	* @arg @ref LL_TIM_BKIN_POLARITY_HIGH
Kojto	122:f9eeca106725	3592	* @retval None
Kojto	122:f9eeca106725	3593	*/
Kojto	122:f9eeca106725	3594	__STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef * TIMx, uint32_t BreakInput, uint32_t Source, uint32_t Polarity)
Kojto	122:f9eeca106725	3595	{
Kojto	122:f9eeca106725	3596	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->OR2)+ BreakInput));
Kojto	122:f9eeca106725	3597	MODIFY_REG(*pReg, (TIMx_OR2_BKINP << (POSITION_VAL(Source))) , (Polarity << (POSITION_VAL(Source))));
Kojto	122:f9eeca106725	3598	}
Kojto	122:f9eeca106725	3599
Kojto	122:f9eeca106725	3600	/**
Kojto	122:f9eeca106725	3601	* @}
Kojto	122:f9eeca106725	3602	*/
Kojto	122:f9eeca106725	3603
Kojto	122:f9eeca106725	3604	/** @defgroup TIM_LL_EF_DMA_Burst_Mode DMA burst mode configuration
Kojto	122:f9eeca106725	3605	* @{
Kojto	122:f9eeca106725	3606	*/
Kojto	122:f9eeca106725	3607	/**
Kojto	122:f9eeca106725	3608	* @brief Configures the timer DMA burst feature.
Kojto	122:f9eeca106725	3609	* @note Macro @ref IS_TIM_DMABURST_INSTANCE(TIMx) can be used to check whether or
Kojto	122:f9eeca106725	3610	* not a timer instance supports the DMA burst mode.
Kojto	122:f9eeca106725	3611	* @rmtoll DCR DBL LL_TIM_ConfigDMABurst\n
Kojto	122:f9eeca106725	3612	* DCR DBA LL_TIM_ConfigDMABurst
Kojto	122:f9eeca106725	3613	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3614	* @param DMABurstBaseAddress This parameter can be one of the following values:
Kojto	122:f9eeca106725	3615	* @arg @ref LL_TIM_DMABURST_BASEADDR_CR1
Kojto	122:f9eeca106725	3616	* @arg @ref LL_TIM_DMABURST_BASEADDR_CR2
Kojto	122:f9eeca106725	3617	* @arg @ref LL_TIM_DMABURST_BASEADDR_SMCR
Kojto	122:f9eeca106725	3618	* @arg @ref LL_TIM_DMABURST_BASEADDR_DIER
Kojto	122:f9eeca106725	3619	* @arg @ref LL_TIM_DMABURST_BASEADDR_SR
Kojto	122:f9eeca106725	3620	* @arg @ref LL_TIM_DMABURST_BASEADDR_EGR
Kojto	122:f9eeca106725	3621	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR1
Kojto	122:f9eeca106725	3622	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR2
Kojto	122:f9eeca106725	3623	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCER
Kojto	122:f9eeca106725	3624	* @arg @ref LL_TIM_DMABURST_BASEADDR_CNT
Kojto	122:f9eeca106725	3625	* @arg @ref LL_TIM_DMABURST_BASEADDR_PSC
Kojto	122:f9eeca106725	3626	* @arg @ref LL_TIM_DMABURST_BASEADDR_ARR
Kojto	122:f9eeca106725	3627	* @arg @ref LL_TIM_DMABURST_BASEADDR_RCR
Kojto	122:f9eeca106725	3628	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR1
Kojto	122:f9eeca106725	3629	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR2
Kojto	122:f9eeca106725	3630	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR3
Kojto	122:f9eeca106725	3631	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR4
Kojto	122:f9eeca106725	3632	* @arg @ref LL_TIM_DMABURST_BASEADDR_BDTR
Kojto	122:f9eeca106725	3633	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR3
Kojto	122:f9eeca106725	3634	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR5
Kojto	122:f9eeca106725	3635	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR6
Kojto	122:f9eeca106725	3636	* @arg @ref LL_TIM_DMABURST_BASEADDR_OR1
Kojto	122:f9eeca106725	3637	* @arg @ref LL_TIM_DMABURST_BASEADDR_OR2
Kojto	122:f9eeca106725	3638	* @arg @ref LL_TIM_DMABURST_BASEADDR_OR3
Kojto	122:f9eeca106725	3639	* @param DMABurstLength This parameter can be one of the following values:
Kojto	122:f9eeca106725	3640	* @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER
Kojto	122:f9eeca106725	3641	* @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS
Kojto	122:f9eeca106725	3642	* @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS
Kojto	122:f9eeca106725	3643	* @arg @ref LL_TIM_DMABURST_LENGTH_4TRANSFERS
Kojto	122:f9eeca106725	3644	* @arg @ref LL_TIM_DMABURST_LENGTH_5TRANSFERS
Kojto	122:f9eeca106725	3645	* @arg @ref LL_TIM_DMABURST_LENGTH_6TRANSFERS
Kojto	122:f9eeca106725	3646	* @arg @ref LL_TIM_DMABURST_LENGTH_7TRANSFERS
Kojto	122:f9eeca106725	3647	* @arg @ref LL_TIM_DMABURST_LENGTH_8TRANSFERS
Kojto	122:f9eeca106725	3648	* @arg @ref LL_TIM_DMABURST_LENGTH_9TRANSFERS
Kojto	122:f9eeca106725	3649	* @arg @ref LL_TIM_DMABURST_LENGTH_10TRANSFERS
Kojto	122:f9eeca106725	3650	* @arg @ref LL_TIM_DMABURST_LENGTH_11TRANSFERS
Kojto	122:f9eeca106725	3651	* @arg @ref LL_TIM_DMABURST_LENGTH_12TRANSFERS
Kojto	122:f9eeca106725	3652	* @arg @ref LL_TIM_DMABURST_LENGTH_13TRANSFERS
Kojto	122:f9eeca106725	3653	* @arg @ref LL_TIM_DMABURST_LENGTH_14TRANSFERS
Kojto	122:f9eeca106725	3654	* @arg @ref LL_TIM_DMABURST_LENGTH_15TRANSFERS
Kojto	122:f9eeca106725	3655	* @arg @ref LL_TIM_DMABURST_LENGTH_16TRANSFERS
Kojto	122:f9eeca106725	3656	* @arg @ref LL_TIM_DMABURST_LENGTH_17TRANSFERS
Kojto	122:f9eeca106725	3657	* @arg @ref LL_TIM_DMABURST_LENGTH_18TRANSFERS
Kojto	122:f9eeca106725	3658	* @retval None
Kojto	122:f9eeca106725	3659	*/
Kojto	122:f9eeca106725	3660	__STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef * TIMx, uint32_t DMABurstBaseAddress, uint32_t DMABurstLength)
Kojto	122:f9eeca106725	3661	{
Kojto	122:f9eeca106725	3662	MODIFY_REG(TIMx->DCR, TIM_DCR_DBL \| TIM_DCR_DBA, DMABurstBaseAddress \| DMABurstLength);
Kojto	122:f9eeca106725	3663	}
Kojto	122:f9eeca106725	3664
Kojto	122:f9eeca106725	3665	/**
Kojto	122:f9eeca106725	3666	* @}
Kojto	122:f9eeca106725	3667	*/
Kojto	122:f9eeca106725	3668
Kojto	122:f9eeca106725	3669	/** @defgroup TIM_LL_EF_Timer_Inputs_Remapping Timer input remapping
Kojto	122:f9eeca106725	3670	* @{
Kojto	122:f9eeca106725	3671	*/
Kojto	122:f9eeca106725	3672	/**
Kojto	122:f9eeca106725	3673	* @brief Remap TIM inputs (input channel, internal/external triggers).
Kojto	122:f9eeca106725	3674	* @note Macro @ref IS_TIM_REMAP_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3675	* a some timer inputs can be remapped.
Kojto	122:f9eeca106725	3676	* @rmtoll TIM1_OR1 ETR_ADC1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3677	* TIM1_OR1 ETR_ADC3_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3678	* TIM1_OR1 TI1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3679	* TIM8_OR1 ETR_ADC2_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3680	* TIM8_OR1 ETR_ADC3_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3681	* TIM8_OR1 TI1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3682	* TIM2_OR1 ITR1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3683	* TIM2_OR1 TI4_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3684	* TIM2_OR1 TI1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3685	* TIM3_OR1 TI1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3686	* TIM15_OR1 TI1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3687	* TIM15_OR1 ENCODER_MODE LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3688	* TIM16_OR1 TI1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3689	* TIM17_OR1 TI1_RMP LL_TIM_SetRemap
Kojto	122:f9eeca106725	3690	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3691	* @param Remap Remap param depends on the TIMx. Description available only
Kojto	122:f9eeca106725	3692	* in CHM version of the User Manual (not in .pdf).
Kojto	122:f9eeca106725	3693	* Otherwise see Reference Manual description of OR registers.
Kojto	122:f9eeca106725	3694	*
Kojto	122:f9eeca106725	3695	* Below description summarizes "Timer Instance" and "Remap" param combinations:
Kojto	122:f9eeca106725	3696	*
Kojto	122:f9eeca106725	3697	* TIM1: any combination of TI1_RMP, ADC3_RMP, ADC1_RMP where
Kojto	122:f9eeca106725	3698	*
Kojto	122:f9eeca106725	3699	* . . ADC1_RMP can be one of the following values
Kojto	122:f9eeca106725	3700	* @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_NC
Kojto	122:f9eeca106725	3701	* @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD1
Kojto	122:f9eeca106725	3702	* @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD2
Kojto	122:f9eeca106725	3703	* @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD3
Kojto	122:f9eeca106725	3704	*
Kojto	122:f9eeca106725	3705	* . . ADC3_RMP can be one of the following values
Kojto	122:f9eeca106725	3706	* @arg @ref LL_TIM_TIM1_ETR_ADC3_RMP_NC
Kojto	122:f9eeca106725	3707	* @arg @ref LL_TIM_TIM1_ETR_ADC3_RMP_AWD1
Kojto	122:f9eeca106725	3708	* @arg @ref LL_TIM_TIM1_ETR_ADC3_RMP_AWD2
Kojto	122:f9eeca106725	3709	* @arg @ref LL_TIM_TIM1_ETR_ADC3_RMP_AWD3
Kojto	122:f9eeca106725	3710	*
Kojto	122:f9eeca106725	3711	* . . TI1_RMP can be one of the following values
Kojto	122:f9eeca106725	3712	* @arg @ref LL_TIM_TIM1_TI1_RMP_GPIO
Kojto	122:f9eeca106725	3713	* @arg @ref LL_TIM_TIM1_TI1_RMP_COMP1
Kojto	122:f9eeca106725	3714	*
Kojto	122:f9eeca106725	3715	* TIM2: any combination of ITR1_RMP, ETR1_RMP, TI4_RMP where
Kojto	122:f9eeca106725	3716	*
Kojto	122:f9eeca106725	3717	* ITR1_RMP can be one of the following values
Kojto	122:f9eeca106725	3718	* @arg @ref LL_TIM_TIM2_ITR1_RMP_TIM8_TRGO
Kojto	122:f9eeca106725	3719	* @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF
Kojto	122:f9eeca106725	3720	*
Kojto	122:f9eeca106725	3721	* . . ETR1_RMP can be one of the following values
Kojto	122:f9eeca106725	3722	* @arg @ref LL_TIM_TIM2_ETR_RMP_GPIO
Kojto	122:f9eeca106725	3723	* @arg @ref LL_TIM_TIM2_ETR_RMP_LSE
Kojto	122:f9eeca106725	3724	*
Kojto	122:f9eeca106725	3725	* . . TI4_RMP can be one of the following values
Kojto	122:f9eeca106725	3726	* @arg @ref LL_TIM_TIM2_TI4_RMP_GPIO
Kojto	122:f9eeca106725	3727	* @arg @ref LL_TIM_TIM2_TI4_RMP_COMP1
Kojto	122:f9eeca106725	3728	* @arg @ref LL_TIM_TIM2_TI4_RMP_COMP2
Kojto	122:f9eeca106725	3729	* @arg @ref LL_TIM_TIM2_TI4_RMP_COMP1_COMP2
Kojto	122:f9eeca106725	3730	*
Kojto	122:f9eeca106725	3731	* TIM3: one of the following values
Kojto	122:f9eeca106725	3732	*
Kojto	122:f9eeca106725	3733	* @arg @ref LL_TIM_TIM3_TI1_RMP_GPIO
Kojto	122:f9eeca106725	3734	* @arg @ref LL_TIM_TIM3_TI1_RMP_COMP1
Kojto	122:f9eeca106725	3735	* @arg @ref LL_TIM_TIM3_TI1_RMP_COMP2
Kojto	122:f9eeca106725	3736	* @arg @ref LL_TIM_TIM3_TI1_RMP_COMP1_COMP2
Kojto	122:f9eeca106725	3737	*
Kojto	122:f9eeca106725	3738	* TIM8: any combination of TI1_RMP, ADC3_RMP, ADC1_RMP where
Kojto	122:f9eeca106725	3739	*
Kojto	122:f9eeca106725	3740	* . . ADC1_RMP can be one of the following values
Kojto	122:f9eeca106725	3741	* @arg @ref LL_TIM_TIM8_ETR_ADC2_RMP_NC
Kojto	122:f9eeca106725	3742	* @arg @ref LL_TIM_TIM8_ETR_ADC2_RMP_AWD1
Kojto	122:f9eeca106725	3743	* @arg @ref LL_TIM_TIM8_ETR_ADC2_RMP_AWD2
Kojto	122:f9eeca106725	3744	* @arg @ref LL_TIM_TIM8_ETR_ADC2_RMP_AWD3
Kojto	122:f9eeca106725	3745	*
Kojto	122:f9eeca106725	3746	* . . ADC3_RMP can be one of the following values
Kojto	122:f9eeca106725	3747	* @arg @ref LL_TIM_TIM8_ETR_ADC3_RMP_NC
Kojto	122:f9eeca106725	3748	* @arg @ref LL_TIM_TIM8_ETR_ADC3_RMP_AWD1
Kojto	122:f9eeca106725	3749	* @arg @ref LL_TIM_TIM8_ETR_ADC3_RMP_AWD2
Kojto	122:f9eeca106725	3750	* @arg @ref LL_TIM_TIM8_ETR_ADC3_RMP_AWD3
Kojto	122:f9eeca106725	3751	*
Kojto	122:f9eeca106725	3752	* . . TI1_RMP can be one of the following values
Kojto	122:f9eeca106725	3753	* @arg @ref LL_TIM_TIM8_TI1_RMP_GPIO
Kojto	122:f9eeca106725	3754	* @arg @ref LL_TIM_TIM8_TI1_RMP_COMP2
Kojto	122:f9eeca106725	3755	*
Kojto	122:f9eeca106725	3756	* TIM15: any combination of TI1_RMP, ENCODER_MODE where
Kojto	122:f9eeca106725	3757	*
Kojto	122:f9eeca106725	3758	* . . TI1_RMP can be one of the following values
Kojto	122:f9eeca106725	3759	* @arg @ref LL_TIM_TIM15_TI1_RMP_GPIO
Kojto	122:f9eeca106725	3760	* @arg @ref LL_TIM_TIM15_TI1_RMP_LSE
Kojto	122:f9eeca106725	3761	*
Kojto	122:f9eeca106725	3762	* . . ENCODER_MODE can be one of the following values
Kojto	122:f9eeca106725	3763	* @arg @ref LL_TIM_TIM15_ENCODERMODE_NOREDIRECTION
Kojto	122:f9eeca106725	3764	* @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM2
Kojto	122:f9eeca106725	3765	* @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM3
Kojto	122:f9eeca106725	3766	* @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM4
Kojto	122:f9eeca106725	3767	*
Kojto	122:f9eeca106725	3768	* TIM16: one of the following values
Kojto	122:f9eeca106725	3769	*
Kojto	122:f9eeca106725	3770	* @arg @ref LL_TIM_TIM16_TI1_RMP_GPIO
Kojto	122:f9eeca106725	3771	* @arg @ref LL_TIM_TIM16_TI1_RMP_LSI
Kojto	122:f9eeca106725	3772	* @arg @ref LL_TIM_TIM16_TI1_RMP_LSE
Kojto	122:f9eeca106725	3773	* @arg @ref LL_TIM_TIM16_TI1_RMP_RTC
Kojto	122:f9eeca106725	3774	* @arg @ref LL_TIM_TIM16_TI1_RMP_MSI (*)
Kojto	122:f9eeca106725	3775	* @arg @ref LL_TIM_TIM16_TI1_RMP_HSE_32 (*)
Kojto	122:f9eeca106725	3776	* @arg @ref LL_TIM_TIM16_TI1_RMP_MCO (*)
Kojto	122:f9eeca106725	3777	*
Kojto	122:f9eeca106725	3778	* TIM17: one of the following values
Kojto	122:f9eeca106725	3779	*
Kojto	122:f9eeca106725	3780	* @arg @ref LL_TIM_TIM17_TI1_RMP_GPIO
Kojto	122:f9eeca106725	3781	* @arg @ref LL_TIM_TIM17_TI1_RMP_MSI
Kojto	122:f9eeca106725	3782	* @arg @ref LL_TIM_TIM17_TI1_RMP_HSE_32
Kojto	122:f9eeca106725	3783	* @arg @ref LL_TIM_TIM17_TI1_RMP_MCO
Kojto	122:f9eeca106725	3784	*
Kojto	122:f9eeca106725	3785	* (*) Value not defined in all devices. \n
Kojto	122:f9eeca106725	3786	* @retval None
Kojto	122:f9eeca106725	3787	*/
Kojto	122:f9eeca106725	3788	__STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef * TIMx, uint32_t Remap)
Kojto	122:f9eeca106725	3789	{
Kojto	122:f9eeca106725	3790	MODIFY_REG(TIMx->OR1, (Remap >> TIMx_OR1_RMP_SHIFT), (Remap & TIMx_OR1_RMP_MASK));
Kojto	122:f9eeca106725	3791	}
Kojto	122:f9eeca106725	3792
Kojto	122:f9eeca106725	3793	/**
Kojto	122:f9eeca106725	3794	* @}
Kojto	122:f9eeca106725	3795	*/
Kojto	122:f9eeca106725	3796
Kojto	122:f9eeca106725	3797	#if defined(TIM_SMCR_OCCS)
Kojto	122:f9eeca106725	3798	/** @defgroup TIM_LL_EF_OCREF_Clear OCREF_Clear_Management
Kojto	122:f9eeca106725	3799	* @{
Kojto	122:f9eeca106725	3800	*/
Kojto	122:f9eeca106725	3801	/**
Kojto	122:f9eeca106725	3802	* @brief Set the OCREF clear source
Kojto	122:f9eeca106725	3803	* @note The OCxREF signal of a given channel can be cleared when a high level is applied on the OCREF_CLR_INPUT
Kojto	122:f9eeca106725	3804	* @note This function can only be used in Output compare and PWM modes.
Kojto	122:f9eeca106725	3805	* @rmtoll SMCR OCCS LL_TIM_SetOCRefClearInputSource
Kojto	122:f9eeca106725	3806	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3807	* @param OCRefClearInputSource This parameter can be one of the following values:
Kojto	122:f9eeca106725	3808	* @arg @ref LL_TIM_OCREF_CLR_INT_NC
Kojto	122:f9eeca106725	3809	* @arg @ref LL_TIM_OCREF_CLR_INT_ETR
Kojto	122:f9eeca106725	3810	* @retval None
Kojto	122:f9eeca106725	3811	*/
Kojto	122:f9eeca106725	3812
Kojto	122:f9eeca106725	3813	__STATIC_INLINE void LL_TIM_SetOCRefClearInputSource(TIM_TypeDef * TIMx, uint32_t OCRefClearInputSource)
Kojto	122:f9eeca106725	3814	{
Kojto	122:f9eeca106725	3815	MODIFY_REG(TIMx->SMCR, TIM_SMCR_OCCS, OCRefClearInputSource);
Kojto	122:f9eeca106725	3816	}
Kojto	122:f9eeca106725	3817	/**
Kojto	122:f9eeca106725	3818	* @}
Kojto	122:f9eeca106725	3819	*/
Kojto	122:f9eeca106725	3820
Kojto	122:f9eeca106725	3821	#endif /* TIM_SMCR_OCCS */
Kojto	122:f9eeca106725	3822	/** @defgroup TIM_LL_EF_FLAG_Management FLAG-Management
Kojto	122:f9eeca106725	3823	* @{
Kojto	122:f9eeca106725	3824	*/
Kojto	122:f9eeca106725	3825	/**
Kojto	122:f9eeca106725	3826	* @brief Clear the update interrupt flag (UIF).
Kojto	122:f9eeca106725	3827	* @rmtoll SR UIF LL_TIM_ClearFlag_UPDATE
Kojto	122:f9eeca106725	3828	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3829	* @retval None
Kojto	122:f9eeca106725	3830	*/
Kojto	122:f9eeca106725	3831	__STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3832	{
Kojto	122:f9eeca106725	3833	WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));
Kojto	122:f9eeca106725	3834	}
Kojto	122:f9eeca106725	3835
Kojto	122:f9eeca106725	3836	/**
Kojto	122:f9eeca106725	3837	* @brief Indicate whether update interrupt flag (UIF) is set (update interrupt is pending).
Kojto	122:f9eeca106725	3838	* @rmtoll SR UIF LL_TIM_IsActiveFlag_UPDATE
Kojto	122:f9eeca106725	3839	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3840	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3841	*/
Kojto	122:f9eeca106725	3842	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3843	{
Kojto	122:f9eeca106725	3844	return (READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF));
Kojto	122:f9eeca106725	3845	}
Kojto	122:f9eeca106725	3846
Kojto	122:f9eeca106725	3847	/**
Kojto	122:f9eeca106725	3848	* @brief Clear the Capture/Compare 1 interrupt flag (CC1F).
Kojto	122:f9eeca106725	3849	* @rmtoll SR CC1IF LL_TIM_ClearFlag_CC1
Kojto	122:f9eeca106725	3850	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3851	* @retval None
Kojto	122:f9eeca106725	3852	*/
Kojto	122:f9eeca106725	3853	__STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3854	{
Kojto	122:f9eeca106725	3855	WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF));
Kojto	122:f9eeca106725	3856	}
Kojto	122:f9eeca106725	3857
Kojto	122:f9eeca106725	3858	/**
Kojto	122:f9eeca106725	3859	* @brief Indicate whether Capture/Compare 1 interrupt flag (CC1F) is set (Capture/Compare 1 interrupt is pending).
Kojto	122:f9eeca106725	3860	* @rmtoll SR CC1IF LL_TIM_IsActiveFlag_CC1
Kojto	122:f9eeca106725	3861	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3862	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3863	*/
Kojto	122:f9eeca106725	3864	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3865	{
Kojto	122:f9eeca106725	3866	return (READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF));
Kojto	122:f9eeca106725	3867	}
Kojto	122:f9eeca106725	3868
Kojto	122:f9eeca106725	3869	/**
Kojto	122:f9eeca106725	3870	* @brief Clear the Capture/Compare 2 interrupt flag (CC2F).
Kojto	122:f9eeca106725	3871	* @rmtoll SR CC2IF LL_TIM_ClearFlag_CC2
Kojto	122:f9eeca106725	3872	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3873	* @retval None
Kojto	122:f9eeca106725	3874	*/
Kojto	122:f9eeca106725	3875	__STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3876	{
Kojto	122:f9eeca106725	3877	WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF));
Kojto	122:f9eeca106725	3878	}
Kojto	122:f9eeca106725	3879
Kojto	122:f9eeca106725	3880	/**
Kojto	122:f9eeca106725	3881	* @brief Indicate whether Capture/Compare 2 interrupt flag (CC2F) is set (Capture/Compare 2 interrupt is pending).
Kojto	122:f9eeca106725	3882	* @rmtoll SR CC2IF LL_TIM_IsActiveFlag_CC2
Kojto	122:f9eeca106725	3883	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3884	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3885	*/
Kojto	122:f9eeca106725	3886	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3887	{
Kojto	122:f9eeca106725	3888	return (READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF));
Kojto	122:f9eeca106725	3889	}
Kojto	122:f9eeca106725	3890
Kojto	122:f9eeca106725	3891	/**
Kojto	122:f9eeca106725	3892	* @brief Clear the Capture/Compare 3 interrupt flag (CC3F).
Kojto	122:f9eeca106725	3893	* @rmtoll SR CC3IF LL_TIM_ClearFlag_CC3
Kojto	122:f9eeca106725	3894	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3895	* @retval None
Kojto	122:f9eeca106725	3896	*/
Kojto	122:f9eeca106725	3897	__STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3898	{
Kojto	122:f9eeca106725	3899	WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF));
Kojto	122:f9eeca106725	3900	}
Kojto	122:f9eeca106725	3901
Kojto	122:f9eeca106725	3902	/**
Kojto	122:f9eeca106725	3903	* @brief Indicate whether Capture/Compare 3 interrupt flag (CC3F) is set (Capture/Compare 3 interrupt is pending).
Kojto	122:f9eeca106725	3904	* @rmtoll SR CC3IF LL_TIM_IsActiveFlag_CC3
Kojto	122:f9eeca106725	3905	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3906	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3907	*/
Kojto	122:f9eeca106725	3908	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3909	{
Kojto	122:f9eeca106725	3910	return (READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF));
Kojto	122:f9eeca106725	3911	}
Kojto	122:f9eeca106725	3912
Kojto	122:f9eeca106725	3913	/**
Kojto	122:f9eeca106725	3914	* @brief Clear the Capture/Compare 4 interrupt flag (CC4F).
Kojto	122:f9eeca106725	3915	* @rmtoll SR CC4IF LL_TIM_ClearFlag_CC4
Kojto	122:f9eeca106725	3916	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3917	* @retval None
Kojto	122:f9eeca106725	3918	*/
Kojto	122:f9eeca106725	3919	__STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3920	{
Kojto	122:f9eeca106725	3921	WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF));
Kojto	122:f9eeca106725	3922	}
Kojto	122:f9eeca106725	3923
Kojto	122:f9eeca106725	3924	/**
Kojto	122:f9eeca106725	3925	* @brief Indicate whether Capture/Compare 4 interrupt flag (CC4F) is set (Capture/Compare 4 interrupt is pending).
Kojto	122:f9eeca106725	3926	* @rmtoll SR CC4IF LL_TIM_IsActiveFlag_CC4
Kojto	122:f9eeca106725	3927	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3928	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3929	*/
Kojto	122:f9eeca106725	3930	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3931	{
Kojto	122:f9eeca106725	3932	return (READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF));
Kojto	122:f9eeca106725	3933	}
Kojto	122:f9eeca106725	3934
Kojto	122:f9eeca106725	3935	/**
Kojto	122:f9eeca106725	3936	* @brief Clear the Capture/Compare 5 interrupt flag (CC5F).
Kojto	122:f9eeca106725	3937	* @rmtoll SR CC5IF LL_TIM_ClearFlag_CC5
Kojto	122:f9eeca106725	3938	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3939	* @retval None
Kojto	122:f9eeca106725	3940	*/
Kojto	122:f9eeca106725	3941	__STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3942	{
Kojto	122:f9eeca106725	3943	WRITE_REG(TIMx->SR, ~(TIM_SR_CC5IF));
Kojto	122:f9eeca106725	3944	}
Kojto	122:f9eeca106725	3945
Kojto	122:f9eeca106725	3946	/**
Kojto	122:f9eeca106725	3947	* @brief Indicate whether Capture/Compare 5 interrupt flag (CC5F) is set (Capture/Compare 5 interrupt is pending).
Kojto	122:f9eeca106725	3948	* @rmtoll SR CC5IF LL_TIM_IsActiveFlag_CC5
Kojto	122:f9eeca106725	3949	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3950	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3951	*/
Kojto	122:f9eeca106725	3952	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3953	{
Kojto	122:f9eeca106725	3954	return (READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF));
Kojto	122:f9eeca106725	3955	}
Kojto	122:f9eeca106725	3956
Kojto	122:f9eeca106725	3957	/**
Kojto	122:f9eeca106725	3958	* @brief Clear the Capture/Compare 6 interrupt flag (CC6F).
Kojto	122:f9eeca106725	3959	* @rmtoll SR CC6IF LL_TIM_ClearFlag_CC6
Kojto	122:f9eeca106725	3960	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3961	* @retval None
Kojto	122:f9eeca106725	3962	*/
Kojto	122:f9eeca106725	3963	__STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3964	{
Kojto	122:f9eeca106725	3965	WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF));
Kojto	122:f9eeca106725	3966	}
Kojto	122:f9eeca106725	3967
Kojto	122:f9eeca106725	3968	/**
Kojto	122:f9eeca106725	3969	* @brief Indicate whether Capture/Compare 6 interrupt flag (CC6F) is set (Capture/Compare 6 interrupt is pending).
Kojto	122:f9eeca106725	3970	* @rmtoll SR CC6IF LL_TIM_IsActiveFlag_CC6
Kojto	122:f9eeca106725	3971	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3972	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3973	*/
Kojto	122:f9eeca106725	3974	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3975	{
Kojto	122:f9eeca106725	3976	return (READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF));
Kojto	122:f9eeca106725	3977	}
Kojto	122:f9eeca106725	3978
Kojto	122:f9eeca106725	3979	/**
Kojto	122:f9eeca106725	3980	* @brief Clear the commutation interrupt flag (COMIF).
Kojto	122:f9eeca106725	3981	* @rmtoll SR COMIF LL_TIM_ClearFlag_COM
Kojto	122:f9eeca106725	3982	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3983	* @retval None
Kojto	122:f9eeca106725	3984	*/
Kojto	122:f9eeca106725	3985	__STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3986	{
Kojto	122:f9eeca106725	3987	WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF));
Kojto	122:f9eeca106725	3988	}
Kojto	122:f9eeca106725	3989
Kojto	122:f9eeca106725	3990	/**
Kojto	122:f9eeca106725	3991	* @brief Indicate whether commutation interrupt flag (COMIF) is set (commutation interrupt is pending).
Kojto	122:f9eeca106725	3992	* @rmtoll SR COMIF LL_TIM_IsActiveFlag_COM
Kojto	122:f9eeca106725	3993	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3994	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3995	*/
Kojto	122:f9eeca106725	3996	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	3997	{
Kojto	122:f9eeca106725	3998	return (READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF));
Kojto	122:f9eeca106725	3999	}
Kojto	122:f9eeca106725	4000
Kojto	122:f9eeca106725	4001	/**
Kojto	122:f9eeca106725	4002	* @brief Clear the trigger interrupt flag (TIF).
Kojto	122:f9eeca106725	4003	* @rmtoll SR TIF LL_TIM_ClearFlag_TRIG
Kojto	122:f9eeca106725	4004	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4005	* @retval None
Kojto	122:f9eeca106725	4006	*/
Kojto	122:f9eeca106725	4007	__STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4008	{
Kojto	122:f9eeca106725	4009	WRITE_REG(TIMx->SR, ~(TIM_SR_TIF));
Kojto	122:f9eeca106725	4010	}
Kojto	122:f9eeca106725	4011
Kojto	122:f9eeca106725	4012	/**
Kojto	122:f9eeca106725	4013	* @brief Indicate whether trigger interrupt flag (TIF) is set (trigger interrupt is pending).
Kojto	122:f9eeca106725	4014	* @rmtoll SR TIF LL_TIM_IsActiveFlag_TRIG
Kojto	122:f9eeca106725	4015	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4016	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4017	*/
Kojto	122:f9eeca106725	4018	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4019	{
Kojto	122:f9eeca106725	4020	return (READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF));
Kojto	122:f9eeca106725	4021	}
Kojto	122:f9eeca106725	4022
Kojto	122:f9eeca106725	4023	/**
Kojto	122:f9eeca106725	4024	* @brief Clear the break interrupt flag (BIF).
Kojto	122:f9eeca106725	4025	* @rmtoll SR BIF LL_TIM_ClearFlag_BRK
Kojto	122:f9eeca106725	4026	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4027	* @retval None
Kojto	122:f9eeca106725	4028	*/
Kojto	122:f9eeca106725	4029	__STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4030	{
Kojto	122:f9eeca106725	4031	WRITE_REG(TIMx->SR, ~(TIM_SR_BIF));
Kojto	122:f9eeca106725	4032	}
Kojto	122:f9eeca106725	4033
Kojto	122:f9eeca106725	4034	/**
Kojto	122:f9eeca106725	4035	* @brief Indicate whether break interrupt flag (BIF) is set (break interrupt is pending).
Kojto	122:f9eeca106725	4036	* @rmtoll SR BIF LL_TIM_IsActiveFlag_BRK
Kojto	122:f9eeca106725	4037	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4038	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4039	*/
Kojto	122:f9eeca106725	4040	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4041	{
Kojto	122:f9eeca106725	4042	return (READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF));
Kojto	122:f9eeca106725	4043	}
Kojto	122:f9eeca106725	4044
Kojto	122:f9eeca106725	4045	/**
Kojto	122:f9eeca106725	4046	* @brief Clear the break 2 interrupt flag (B2IF).
Kojto	122:f9eeca106725	4047	* @rmtoll SR B2IF LL_TIM_ClearFlag_BRK2
Kojto	122:f9eeca106725	4048	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4049	* @retval None
Kojto	122:f9eeca106725	4050	*/
Kojto	122:f9eeca106725	4051	__STATIC_INLINE void LL_TIM_ClearFlag_BRK2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4052	{
Kojto	122:f9eeca106725	4053	WRITE_REG(TIMx->SR, ~(TIM_SR_B2IF));
Kojto	122:f9eeca106725	4054	}
Kojto	122:f9eeca106725	4055
Kojto	122:f9eeca106725	4056	/**
Kojto	122:f9eeca106725	4057	* @brief Indicate whether break 2 interrupt flag (B2IF) is set (break 2 interrupt is pending).
Kojto	122:f9eeca106725	4058	* @rmtoll SR B2IF LL_TIM_IsActiveFlag_BRK2
Kojto	122:f9eeca106725	4059	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4060	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4061	*/
Kojto	122:f9eeca106725	4062	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4063	{
Kojto	122:f9eeca106725	4064	return (READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF));
Kojto	122:f9eeca106725	4065	}
Kojto	122:f9eeca106725	4066
Kojto	122:f9eeca106725	4067	/**
Kojto	122:f9eeca106725	4068	* @brief Clear the Capture/Compare 1 over-capture interrupt flag (CC1OF).
Kojto	122:f9eeca106725	4069	* @rmtoll SR CC1OF LL_TIM_ClearFlag_CC1OVR
Kojto	122:f9eeca106725	4070	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4071	* @retval None
Kojto	122:f9eeca106725	4072	*/
Kojto	122:f9eeca106725	4073	__STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4074	{
Kojto	122:f9eeca106725	4075	WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF));
Kojto	122:f9eeca106725	4076	}
Kojto	122:f9eeca106725	4077
Kojto	122:f9eeca106725	4078	/**
Kojto	122:f9eeca106725	4079	* @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set (Capture/Compare 1 interrupt is pending).
Kojto	122:f9eeca106725	4080	* @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR
Kojto	122:f9eeca106725	4081	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4082	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4083	*/
Kojto	122:f9eeca106725	4084	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4085	{
Kojto	122:f9eeca106725	4086	return (READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF));
Kojto	122:f9eeca106725	4087	}
Kojto	122:f9eeca106725	4088
Kojto	122:f9eeca106725	4089	/**
Kojto	122:f9eeca106725	4090	* @brief Clear the Capture/Compare 2 over-capture interrupt flag (CC2OF).
Kojto	122:f9eeca106725	4091	* @rmtoll SR CC2OF LL_TIM_ClearFlag_CC2OVR
Kojto	122:f9eeca106725	4092	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4093	* @retval None
Kojto	122:f9eeca106725	4094	*/
Kojto	122:f9eeca106725	4095	__STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4096	{
Kojto	122:f9eeca106725	4097	WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF));
Kojto	122:f9eeca106725	4098	}
Kojto	122:f9eeca106725	4099
Kojto	122:f9eeca106725	4100	/**
Kojto	122:f9eeca106725	4101	* @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set (Capture/Compare 2 over-capture interrupt is pending).
Kojto	122:f9eeca106725	4102	* @rmtoll SR CC2OF LL_TIM_IsActiveFlag_CC2OVR
Kojto	122:f9eeca106725	4103	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4104	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4105	*/
Kojto	122:f9eeca106725	4106	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4107	{
Kojto	122:f9eeca106725	4108	return (READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF));
Kojto	122:f9eeca106725	4109	}
Kojto	122:f9eeca106725	4110
Kojto	122:f9eeca106725	4111	/**
Kojto	122:f9eeca106725	4112	* @brief Clear the Capture/Compare 3 over-capture interrupt flag (CC3OF).
Kojto	122:f9eeca106725	4113	* @rmtoll SR CC3OF LL_TIM_ClearFlag_CC3OVR
Kojto	122:f9eeca106725	4114	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4115	* @retval None
Kojto	122:f9eeca106725	4116	*/
Kojto	122:f9eeca106725	4117	__STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4118	{
Kojto	122:f9eeca106725	4119	WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF));
Kojto	122:f9eeca106725	4120	}
Kojto	122:f9eeca106725	4121
Kojto	122:f9eeca106725	4122	/**
Kojto	122:f9eeca106725	4123	* @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set (Capture/Compare 3 over-capture interrupt is pending).
Kojto	122:f9eeca106725	4124	* @rmtoll SR CC3OF LL_TIM_IsActiveFlag_CC3OVR
Kojto	122:f9eeca106725	4125	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4126	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4127	*/
Kojto	122:f9eeca106725	4128	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4129	{
Kojto	122:f9eeca106725	4130	return (READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF));
Kojto	122:f9eeca106725	4131	}
Kojto	122:f9eeca106725	4132
Kojto	122:f9eeca106725	4133	/**
Kojto	122:f9eeca106725	4134	* @brief Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF).
Kojto	122:f9eeca106725	4135	* @rmtoll SR CC4OF LL_TIM_ClearFlag_CC4OVR
Kojto	122:f9eeca106725	4136	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4137	* @retval None
Kojto	122:f9eeca106725	4138	*/
Kojto	122:f9eeca106725	4139	__STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4140	{
Kojto	122:f9eeca106725	4141	WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF));
Kojto	122:f9eeca106725	4142	}
Kojto	122:f9eeca106725	4143
Kojto	122:f9eeca106725	4144	/**
Kojto	122:f9eeca106725	4145	* @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set (Capture/Compare 4 over-capture interrupt is pending).
Kojto	122:f9eeca106725	4146	* @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR
Kojto	122:f9eeca106725	4147	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4148	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4149	*/
Kojto	122:f9eeca106725	4150	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4151	{
Kojto	122:f9eeca106725	4152	return (READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF));
Kojto	122:f9eeca106725	4153	}
Kojto	122:f9eeca106725	4154
Kojto	122:f9eeca106725	4155	/**
Kojto	122:f9eeca106725	4156	* @brief Clear the system break interrupt flag (SBIF).
Kojto	122:f9eeca106725	4157	* @rmtoll SR SBIF LL_TIM_ClearFlag_SYSBRK
Kojto	122:f9eeca106725	4158	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4159	* @retval None
Kojto	122:f9eeca106725	4160	*/
Kojto	122:f9eeca106725	4161	__STATIC_INLINE void LL_TIM_ClearFlag_SYSBRK(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4162	{
Kojto	122:f9eeca106725	4163	WRITE_REG(TIMx->SR, ~(TIM_SR_SBIF));
Kojto	122:f9eeca106725	4164	}
Kojto	122:f9eeca106725	4165
Kojto	122:f9eeca106725	4166	/**
Kojto	122:f9eeca106725	4167	* @brief Indicate whether system break interrupt flag (SBIF) is set (system break interrupt is pending).
Kojto	122:f9eeca106725	4168	* @rmtoll SR SBIF LL_TIM_IsActiveFlag_SYSBRK
Kojto	122:f9eeca106725	4169	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4170	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4171	*/
Kojto	122:f9eeca106725	4172	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_SYSBRK(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4173	{
Kojto	122:f9eeca106725	4174	return (READ_BIT(TIMx->SR, TIM_SR_SBIF) == (TIM_SR_SBIF));
Kojto	122:f9eeca106725	4175	}
Kojto	122:f9eeca106725	4176
Kojto	122:f9eeca106725	4177	/**
Kojto	122:f9eeca106725	4178	* @}
Kojto	122:f9eeca106725	4179	*/
Kojto	122:f9eeca106725	4180
Kojto	122:f9eeca106725	4181	/** @defgroup TIM_LL_EF_IT_Management IT-Management
Kojto	122:f9eeca106725	4182	* @{
Kojto	122:f9eeca106725	4183	*/
Kojto	122:f9eeca106725	4184	/**
Kojto	122:f9eeca106725	4185	* @brief Enable update interrupt (UIE).
Kojto	122:f9eeca106725	4186	* @rmtoll DIER UIE LL_TIM_EnableIT_UPDATE
Kojto	122:f9eeca106725	4187	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4188	* @retval None
Kojto	122:f9eeca106725	4189	*/
Kojto	122:f9eeca106725	4190	__STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4191	{
Kojto	122:f9eeca106725	4192	SET_BIT(TIMx->DIER, TIM_DIER_UIE);
Kojto	122:f9eeca106725	4193	}
Kojto	122:f9eeca106725	4194
Kojto	122:f9eeca106725	4195	/**
Kojto	122:f9eeca106725	4196	* @brief Disable update interrupt (UIE).
Kojto	122:f9eeca106725	4197	* @rmtoll DIER UIE LL_TIM_DisableIT_UPDATE
Kojto	122:f9eeca106725	4198	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4199	* @retval None
Kojto	122:f9eeca106725	4200	*/
Kojto	122:f9eeca106725	4201	__STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4202	{
Kojto	122:f9eeca106725	4203	CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE);
Kojto	122:f9eeca106725	4204	}
Kojto	122:f9eeca106725	4205
Kojto	122:f9eeca106725	4206	/**
Kojto	122:f9eeca106725	4207	* @brief Indicates whether the update interrupt (UIE) is enabled.
Kojto	122:f9eeca106725	4208	* @rmtoll DIER UIE LL_TIM_IsEnabledIT_UPDATE
Kojto	122:f9eeca106725	4209	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4210	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4211	*/
Kojto	122:f9eeca106725	4212	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4213	{
Kojto	122:f9eeca106725	4214	return (READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE));
Kojto	122:f9eeca106725	4215	}
Kojto	122:f9eeca106725	4216
Kojto	122:f9eeca106725	4217	/**
Kojto	122:f9eeca106725	4218	* @brief Enable capture/compare 1 interrupt (CC1IE).
Kojto	122:f9eeca106725	4219	* @rmtoll DIER CC1IE LL_TIM_EnableIT_CC1
Kojto	122:f9eeca106725	4220	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4221	* @retval None
Kojto	122:f9eeca106725	4222	*/
Kojto	122:f9eeca106725	4223	__STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4224	{
Kojto	122:f9eeca106725	4225	SET_BIT(TIMx->DIER, TIM_DIER_CC1IE);
Kojto	122:f9eeca106725	4226	}
Kojto	122:f9eeca106725	4227
Kojto	122:f9eeca106725	4228	/**
Kojto	122:f9eeca106725	4229	* @brief Disable capture/compare 1 interrupt (CC1IE).
Kojto	122:f9eeca106725	4230	* @rmtoll DIER CC1IE LL_TIM_DisableIT_CC1
Kojto	122:f9eeca106725	4231	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4232	* @retval None
Kojto	122:f9eeca106725	4233	*/
Kojto	122:f9eeca106725	4234	__STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4235	{
Kojto	122:f9eeca106725	4236	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE);
Kojto	122:f9eeca106725	4237	}
Kojto	122:f9eeca106725	4238
Kojto	122:f9eeca106725	4239	/**
Kojto	122:f9eeca106725	4240	* @brief Indicates whether the capture/compare 1 interrupt (CC1IE) is enabled.
Kojto	122:f9eeca106725	4241	* @rmtoll DIER CC1IE LL_TIM_IsEnabledIT_CC1
Kojto	122:f9eeca106725	4242	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4243	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4244	*/
Kojto	122:f9eeca106725	4245	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4246	{
Kojto	122:f9eeca106725	4247	return (READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE));
Kojto	122:f9eeca106725	4248	}
Kojto	122:f9eeca106725	4249
Kojto	122:f9eeca106725	4250	/**
Kojto	122:f9eeca106725	4251	* @brief Enable capture/compare 2 interrupt (CC2IE).
Kojto	122:f9eeca106725	4252	* @rmtoll DIER CC2IE LL_TIM_EnableIT_CC2
Kojto	122:f9eeca106725	4253	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4254	* @retval None
Kojto	122:f9eeca106725	4255	*/
Kojto	122:f9eeca106725	4256	__STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4257	{
Kojto	122:f9eeca106725	4258	SET_BIT(TIMx->DIER, TIM_DIER_CC2IE);
Kojto	122:f9eeca106725	4259	}
Kojto	122:f9eeca106725	4260
Kojto	122:f9eeca106725	4261	/**
Kojto	122:f9eeca106725	4262	* @brief Disable capture/compare 2 interrupt (CC2IE).
Kojto	122:f9eeca106725	4263	* @rmtoll DIER CC2IE LL_TIM_DisableIT_CC2
Kojto	122:f9eeca106725	4264	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4265	* @retval None
Kojto	122:f9eeca106725	4266	*/
Kojto	122:f9eeca106725	4267	__STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4268	{
Kojto	122:f9eeca106725	4269	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE);
Kojto	122:f9eeca106725	4270	}
Kojto	122:f9eeca106725	4271
Kojto	122:f9eeca106725	4272	/**
Kojto	122:f9eeca106725	4273	* @brief Indicates whether the capture/compare 2 interrupt (CC2IE) is enabled.
Kojto	122:f9eeca106725	4274	* @rmtoll DIER CC2IE LL_TIM_IsEnabledIT_CC2
Kojto	122:f9eeca106725	4275	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4276	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4277	*/
Kojto	122:f9eeca106725	4278	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4279	{
Kojto	122:f9eeca106725	4280	return (READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE));
Kojto	122:f9eeca106725	4281	}
Kojto	122:f9eeca106725	4282
Kojto	122:f9eeca106725	4283	/**
Kojto	122:f9eeca106725	4284	* @brief Enable capture/compare 3 interrupt (CC3IE).
Kojto	122:f9eeca106725	4285	* @rmtoll DIER CC3IE LL_TIM_EnableIT_CC3
Kojto	122:f9eeca106725	4286	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4287	* @retval None
Kojto	122:f9eeca106725	4288	*/
Kojto	122:f9eeca106725	4289	__STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4290	{
Kojto	122:f9eeca106725	4291	SET_BIT(TIMx->DIER, TIM_DIER_CC3IE);
Kojto	122:f9eeca106725	4292	}
Kojto	122:f9eeca106725	4293
Kojto	122:f9eeca106725	4294	/**
Kojto	122:f9eeca106725	4295	* @brief Disable capture/compare 3 interrupt (CC3IE).
Kojto	122:f9eeca106725	4296	* @rmtoll DIER CC3IE LL_TIM_DisableIT_CC3
Kojto	122:f9eeca106725	4297	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4298	* @retval None
Kojto	122:f9eeca106725	4299	*/
Kojto	122:f9eeca106725	4300	__STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4301	{
Kojto	122:f9eeca106725	4302	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE);
Kojto	122:f9eeca106725	4303	}
Kojto	122:f9eeca106725	4304
Kojto	122:f9eeca106725	4305	/**
Kojto	122:f9eeca106725	4306	* @brief Indicates whether the capture/compare 3 interrupt (CC3IE) is enabled.
Kojto	122:f9eeca106725	4307	* @rmtoll DIER CC3IE LL_TIM_IsEnabledIT_CC3
Kojto	122:f9eeca106725	4308	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4309	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4310	*/
Kojto	122:f9eeca106725	4311	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4312	{
Kojto	122:f9eeca106725	4313	return (READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE));
Kojto	122:f9eeca106725	4314	}
Kojto	122:f9eeca106725	4315
Kojto	122:f9eeca106725	4316	/**
Kojto	122:f9eeca106725	4317	* @brief Enable capture/compare 4 interrupt (CC4IE).
Kojto	122:f9eeca106725	4318	* @rmtoll DIER CC4IE LL_TIM_EnableIT_CC4
Kojto	122:f9eeca106725	4319	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4320	* @retval None
Kojto	122:f9eeca106725	4321	*/
Kojto	122:f9eeca106725	4322	__STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4323	{
Kojto	122:f9eeca106725	4324	SET_BIT(TIMx->DIER, TIM_DIER_CC4IE);
Kojto	122:f9eeca106725	4325	}
Kojto	122:f9eeca106725	4326
Kojto	122:f9eeca106725	4327	/**
Kojto	122:f9eeca106725	4328	* @brief Disable capture/compare 4 interrupt (CC4IE).
Kojto	122:f9eeca106725	4329	* @rmtoll DIER CC4IE LL_TIM_DisableIT_CC4
Kojto	122:f9eeca106725	4330	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4331	* @retval None
Kojto	122:f9eeca106725	4332	*/
Kojto	122:f9eeca106725	4333	__STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4334	{
Kojto	122:f9eeca106725	4335	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE);
Kojto	122:f9eeca106725	4336	}
Kojto	122:f9eeca106725	4337
Kojto	122:f9eeca106725	4338	/**
Kojto	122:f9eeca106725	4339	* @brief Indicates whether the capture/compare 4 interrupt (CC4IE) is enabled.
Kojto	122:f9eeca106725	4340	* @rmtoll DIER CC4IE LL_TIM_IsEnabledIT_CC4
Kojto	122:f9eeca106725	4341	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4342	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4343	*/
Kojto	122:f9eeca106725	4344	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4345	{
Kojto	122:f9eeca106725	4346	return (READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE));
Kojto	122:f9eeca106725	4347	}
Kojto	122:f9eeca106725	4348
Kojto	122:f9eeca106725	4349	/**
Kojto	122:f9eeca106725	4350	* @brief Enable commutation interrupt (COMIE).
Kojto	122:f9eeca106725	4351	* @rmtoll DIER COMIE LL_TIM_EnableIT_COM
Kojto	122:f9eeca106725	4352	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4353	* @retval None
Kojto	122:f9eeca106725	4354	*/
Kojto	122:f9eeca106725	4355	__STATIC_INLINE void LL_TIM_EnableIT_COM(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4356	{
Kojto	122:f9eeca106725	4357	SET_BIT(TIMx->DIER, TIM_DIER_COMIE);
Kojto	122:f9eeca106725	4358	}
Kojto	122:f9eeca106725	4359
Kojto	122:f9eeca106725	4360	/**
Kojto	122:f9eeca106725	4361	* @brief Disable commutation interrupt (COMIE).
Kojto	122:f9eeca106725	4362	* @rmtoll DIER COMIE LL_TIM_DisableIT_COM
Kojto	122:f9eeca106725	4363	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4364	* @retval None
Kojto	122:f9eeca106725	4365	*/
Kojto	122:f9eeca106725	4366	__STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4367	{
Kojto	122:f9eeca106725	4368	CLEAR_BIT(TIMx->DIER, TIM_DIER_COMIE);
Kojto	122:f9eeca106725	4369	}
Kojto	122:f9eeca106725	4370
Kojto	122:f9eeca106725	4371	/**
Kojto	122:f9eeca106725	4372	* @brief Indicates whether the commutation interrupt (COMIE) is enabled.
Kojto	122:f9eeca106725	4373	* @rmtoll DIER COMIE LL_TIM_IsEnabledIT_COM
Kojto	122:f9eeca106725	4374	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4375	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4376	*/
Kojto	122:f9eeca106725	4377	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4378	{
Kojto	122:f9eeca106725	4379	return (READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE));
Kojto	122:f9eeca106725	4380	}
Kojto	122:f9eeca106725	4381
Kojto	122:f9eeca106725	4382	/**
Kojto	122:f9eeca106725	4383	* @brief Enable trigger interrupt (TIE).
Kojto	122:f9eeca106725	4384	* @rmtoll DIER TIE LL_TIM_EnableIT_TRIG
Kojto	122:f9eeca106725	4385	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4386	* @retval None
Kojto	122:f9eeca106725	4387	*/
Kojto	122:f9eeca106725	4388	__STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4389	{
Kojto	122:f9eeca106725	4390	SET_BIT(TIMx->DIER, TIM_DIER_TIE);
Kojto	122:f9eeca106725	4391	}
Kojto	122:f9eeca106725	4392
Kojto	122:f9eeca106725	4393	/**
Kojto	122:f9eeca106725	4394	* @brief Disable trigger interrupt (TIE).
Kojto	122:f9eeca106725	4395	* @rmtoll DIER TIE LL_TIM_DisableIT_TRIG
Kojto	122:f9eeca106725	4396	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4397	* @retval None
Kojto	122:f9eeca106725	4398	*/
Kojto	122:f9eeca106725	4399	__STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4400	{
Kojto	122:f9eeca106725	4401	CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE);
Kojto	122:f9eeca106725	4402	}
Kojto	122:f9eeca106725	4403
Kojto	122:f9eeca106725	4404	/**
Kojto	122:f9eeca106725	4405	* @brief Indicates whether the trigger interrupt (TIE) is enabled.
Kojto	122:f9eeca106725	4406	* @rmtoll DIER TIE LL_TIM_IsEnabledIT_TRIG
Kojto	122:f9eeca106725	4407	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4408	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4409	*/
Kojto	122:f9eeca106725	4410	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4411	{
Kojto	122:f9eeca106725	4412	return (READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE));
Kojto	122:f9eeca106725	4413	}
Kojto	122:f9eeca106725	4414
Kojto	122:f9eeca106725	4415	/**
Kojto	122:f9eeca106725	4416	* @brief Enable break interrupt (BIE).
Kojto	122:f9eeca106725	4417	* @rmtoll DIER BIE LL_TIM_EnableIT_BRK
Kojto	122:f9eeca106725	4418	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4419	* @retval None
Kojto	122:f9eeca106725	4420	*/
Kojto	122:f9eeca106725	4421	__STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4422	{
Kojto	122:f9eeca106725	4423	SET_BIT(TIMx->DIER, TIM_DIER_BIE);
Kojto	122:f9eeca106725	4424	}
Kojto	122:f9eeca106725	4425
Kojto	122:f9eeca106725	4426	/**
Kojto	122:f9eeca106725	4427	* @brief Disable break interrupt (BIE).
Kojto	122:f9eeca106725	4428	* @rmtoll DIER BIE LL_TIM_DisableIT_BRK
Kojto	122:f9eeca106725	4429	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4430	* @retval None
Kojto	122:f9eeca106725	4431	*/
Kojto	122:f9eeca106725	4432	__STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4433	{
Kojto	122:f9eeca106725	4434	CLEAR_BIT(TIMx->DIER, TIM_DIER_BIE);
Kojto	122:f9eeca106725	4435	}
Kojto	122:f9eeca106725	4436
Kojto	122:f9eeca106725	4437	/**
Kojto	122:f9eeca106725	4438	* @brief Indicates whether the break interrupt (BIE) is enabled.
Kojto	122:f9eeca106725	4439	* @rmtoll DIER BIE LL_TIM_IsEnabledIT_BRK
Kojto	122:f9eeca106725	4440	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4441	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4442	*/
Kojto	122:f9eeca106725	4443	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4444	{
Kojto	122:f9eeca106725	4445	return (READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE));
Kojto	122:f9eeca106725	4446	}
Kojto	122:f9eeca106725	4447
Kojto	122:f9eeca106725	4448	/**
Kojto	122:f9eeca106725	4449	* @}
Kojto	122:f9eeca106725	4450	*/
Kojto	122:f9eeca106725	4451
Kojto	122:f9eeca106725	4452	/** @defgroup TIM_LL_EF_DMA_Management DMA-Management
Kojto	122:f9eeca106725	4453	* @{
Kojto	122:f9eeca106725	4454	*/
Kojto	122:f9eeca106725	4455	/**
Kojto	122:f9eeca106725	4456	* @brief Enable update DMA request (UDE).
Kojto	122:f9eeca106725	4457	* @rmtoll DIER UDE LL_TIM_EnableDMAReq_UPDATE
Kojto	122:f9eeca106725	4458	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4459	* @retval None
Kojto	122:f9eeca106725	4460	*/
Kojto	122:f9eeca106725	4461	__STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4462	{
Kojto	122:f9eeca106725	4463	SET_BIT(TIMx->DIER, TIM_DIER_UDE);
Kojto	122:f9eeca106725	4464	}
Kojto	122:f9eeca106725	4465
Kojto	122:f9eeca106725	4466	/**
Kojto	122:f9eeca106725	4467	* @brief Disable update DMA request (UDE).
Kojto	122:f9eeca106725	4468	* @rmtoll DIER UDE LL_TIM_DisableDMAReq_UPDATE
Kojto	122:f9eeca106725	4469	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4470	* @retval None
Kojto	122:f9eeca106725	4471	*/
Kojto	122:f9eeca106725	4472	__STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4473	{
Kojto	122:f9eeca106725	4474	CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE);
Kojto	122:f9eeca106725	4475	}
Kojto	122:f9eeca106725	4476
Kojto	122:f9eeca106725	4477	/**
Kojto	122:f9eeca106725	4478	* @brief Indicates whether the update DMA request (UDE) is enabled.
Kojto	122:f9eeca106725	4479	* @rmtoll DIER UDE LL_TIM_IsEnabledDMAReq_UPDATE
Kojto	122:f9eeca106725	4480	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4481	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4482	*/
Kojto	122:f9eeca106725	4483	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4484	{
Kojto	122:f9eeca106725	4485	return (READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE));
Kojto	122:f9eeca106725	4486	}
Kojto	122:f9eeca106725	4487
Kojto	122:f9eeca106725	4488	/**
Kojto	122:f9eeca106725	4489	* @brief Enable capture/compare 1 DMA request (CC1DE).
Kojto	122:f9eeca106725	4490	* @rmtoll DIER CC1DE LL_TIM_EnableDMAReq_CC1
Kojto	122:f9eeca106725	4491	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4492	* @retval None
Kojto	122:f9eeca106725	4493	*/
Kojto	122:f9eeca106725	4494	__STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4495	{
Kojto	122:f9eeca106725	4496	SET_BIT(TIMx->DIER, TIM_DIER_CC1DE);
Kojto	122:f9eeca106725	4497	}
Kojto	122:f9eeca106725	4498
Kojto	122:f9eeca106725	4499	/**
Kojto	122:f9eeca106725	4500	* @brief Disable capture/compare 1 DMA request (CC1DE).
Kojto	122:f9eeca106725	4501	* @rmtoll DIER CC1DE LL_TIM_DisableDMAReq_CC1
Kojto	122:f9eeca106725	4502	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4503	* @retval None
Kojto	122:f9eeca106725	4504	*/
Kojto	122:f9eeca106725	4505	__STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4506	{
Kojto	122:f9eeca106725	4507	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE);
Kojto	122:f9eeca106725	4508	}
Kojto	122:f9eeca106725	4509
Kojto	122:f9eeca106725	4510	/**
Kojto	122:f9eeca106725	4511	* @brief Indicates whether the capture/compare 1 DMA request (CC1DE) is enabled.
Kojto	122:f9eeca106725	4512	* @rmtoll DIER CC1DE LL_TIM_IsEnabledDMAReq_CC1
Kojto	122:f9eeca106725	4513	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4514	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4515	*/
Kojto	122:f9eeca106725	4516	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4517	{
Kojto	122:f9eeca106725	4518	return (READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE));
Kojto	122:f9eeca106725	4519	}
Kojto	122:f9eeca106725	4520
Kojto	122:f9eeca106725	4521	/**
Kojto	122:f9eeca106725	4522	* @brief Enable capture/compare 2 DMA request (CC2DE).
Kojto	122:f9eeca106725	4523	* @rmtoll DIER CC2DE LL_TIM_EnableDMAReq_CC2
Kojto	122:f9eeca106725	4524	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4525	* @retval None
Kojto	122:f9eeca106725	4526	*/
Kojto	122:f9eeca106725	4527	__STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4528	{
Kojto	122:f9eeca106725	4529	SET_BIT(TIMx->DIER, TIM_DIER_CC2DE);
Kojto	122:f9eeca106725	4530	}
Kojto	122:f9eeca106725	4531
Kojto	122:f9eeca106725	4532	/**
Kojto	122:f9eeca106725	4533	* @brief Disable capture/compare 2 DMA request (CC2DE).
Kojto	122:f9eeca106725	4534	* @rmtoll DIER CC2DE LL_TIM_DisableDMAReq_CC2
Kojto	122:f9eeca106725	4535	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4536	* @retval None
Kojto	122:f9eeca106725	4537	*/
Kojto	122:f9eeca106725	4538	__STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4539	{
Kojto	122:f9eeca106725	4540	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE);
Kojto	122:f9eeca106725	4541	}
Kojto	122:f9eeca106725	4542
Kojto	122:f9eeca106725	4543	/**
Kojto	122:f9eeca106725	4544	* @brief Indicates whether the capture/compare 2 DMA request (CC2DE) is enabled.
Kojto	122:f9eeca106725	4545	* @rmtoll DIER CC2DE LL_TIM_IsEnabledDMAReq_CC2
Kojto	122:f9eeca106725	4546	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4547	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4548	*/
Kojto	122:f9eeca106725	4549	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4550	{
Kojto	122:f9eeca106725	4551	return (READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE));
Kojto	122:f9eeca106725	4552	}
Kojto	122:f9eeca106725	4553
Kojto	122:f9eeca106725	4554	/**
Kojto	122:f9eeca106725	4555	* @brief Enable capture/compare 3 DMA request (CC3DE).
Kojto	122:f9eeca106725	4556	* @rmtoll DIER CC3DE LL_TIM_EnableDMAReq_CC3
Kojto	122:f9eeca106725	4557	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4558	* @retval None
Kojto	122:f9eeca106725	4559	*/
Kojto	122:f9eeca106725	4560	__STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4561	{
Kojto	122:f9eeca106725	4562	SET_BIT(TIMx->DIER, TIM_DIER_CC3DE);
Kojto	122:f9eeca106725	4563	}
Kojto	122:f9eeca106725	4564
Kojto	122:f9eeca106725	4565	/**
Kojto	122:f9eeca106725	4566	* @brief Disable capture/compare 3 DMA request (CC3DE).
Kojto	122:f9eeca106725	4567	* @rmtoll DIER CC3DE LL_TIM_DisableDMAReq_CC3
Kojto	122:f9eeca106725	4568	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4569	* @retval None
Kojto	122:f9eeca106725	4570	*/
Kojto	122:f9eeca106725	4571	__STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4572	{
Kojto	122:f9eeca106725	4573	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE);
Kojto	122:f9eeca106725	4574	}
Kojto	122:f9eeca106725	4575
Kojto	122:f9eeca106725	4576	/**
Kojto	122:f9eeca106725	4577	* @brief Indicates whether the capture/compare 3 DMA request (CC3DE) is enabled.
Kojto	122:f9eeca106725	4578	* @rmtoll DIER CC3DE LL_TIM_IsEnabledDMAReq_CC3
Kojto	122:f9eeca106725	4579	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4580	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4581	*/
Kojto	122:f9eeca106725	4582	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4583	{
Kojto	122:f9eeca106725	4584	return (READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE));
Kojto	122:f9eeca106725	4585	}
Kojto	122:f9eeca106725	4586
Kojto	122:f9eeca106725	4587	/**
Kojto	122:f9eeca106725	4588	* @brief Enable capture/compare 4 DMA request (CC4DE).
Kojto	122:f9eeca106725	4589	* @rmtoll DIER CC4DE LL_TIM_EnableDMAReq_CC4
Kojto	122:f9eeca106725	4590	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4591	* @retval None
Kojto	122:f9eeca106725	4592	*/
Kojto	122:f9eeca106725	4593	__STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4594	{
Kojto	122:f9eeca106725	4595	SET_BIT(TIMx->DIER, TIM_DIER_CC4DE);
Kojto	122:f9eeca106725	4596	}
Kojto	122:f9eeca106725	4597
Kojto	122:f9eeca106725	4598	/**
Kojto	122:f9eeca106725	4599	* @brief Disable capture/compare 4 DMA request (CC4DE).
Kojto	122:f9eeca106725	4600	* @rmtoll DIER CC4DE LL_TIM_DisableDMAReq_CC4
Kojto	122:f9eeca106725	4601	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4602	* @retval None
Kojto	122:f9eeca106725	4603	*/
Kojto	122:f9eeca106725	4604	__STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4605	{
Kojto	122:f9eeca106725	4606	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE);
Kojto	122:f9eeca106725	4607	}
Kojto	122:f9eeca106725	4608
Kojto	122:f9eeca106725	4609	/**
Kojto	122:f9eeca106725	4610	* @brief Indicates whether the capture/compare 4 DMA request (CC4DE) is enabled.
Kojto	122:f9eeca106725	4611	* @rmtoll DIER CC4DE LL_TIM_IsEnabledDMAReq_CC4
Kojto	122:f9eeca106725	4612	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4613	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4614	*/
Kojto	122:f9eeca106725	4615	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4616	{
Kojto	122:f9eeca106725	4617	return (READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE));
Kojto	122:f9eeca106725	4618	}
Kojto	122:f9eeca106725	4619
Kojto	122:f9eeca106725	4620	/**
Kojto	122:f9eeca106725	4621	* @brief Enable commutation DMA request (COMDE).
Kojto	122:f9eeca106725	4622	* @rmtoll DIER COMDE LL_TIM_EnableDMAReq_COM
Kojto	122:f9eeca106725	4623	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4624	* @retval None
Kojto	122:f9eeca106725	4625	*/
Kojto	122:f9eeca106725	4626	__STATIC_INLINE void LL_TIM_EnableDMAReq_COM(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4627	{
Kojto	122:f9eeca106725	4628	SET_BIT(TIMx->DIER, TIM_DIER_COMDE);
Kojto	122:f9eeca106725	4629	}
Kojto	122:f9eeca106725	4630
Kojto	122:f9eeca106725	4631	/**
Kojto	122:f9eeca106725	4632	* @brief Disable commutation DMA request (COMDE).
Kojto	122:f9eeca106725	4633	* @rmtoll DIER COMDE LL_TIM_DisableDMAReq_COM
Kojto	122:f9eeca106725	4634	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4635	* @retval None
Kojto	122:f9eeca106725	4636	*/
Kojto	122:f9eeca106725	4637	__STATIC_INLINE void LL_TIM_DisableDMAReq_COM(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4638	{
Kojto	122:f9eeca106725	4639	CLEAR_BIT(TIMx->DIER, TIM_DIER_COMDE);
Kojto	122:f9eeca106725	4640	}
Kojto	122:f9eeca106725	4641
Kojto	122:f9eeca106725	4642	/**
Kojto	122:f9eeca106725	4643	* @brief Indicates whether the commutation DMA request (COMDE) is enabled.
Kojto	122:f9eeca106725	4644	* @rmtoll DIER COMDE LL_TIM_IsEnabledDMAReq_COM
Kojto	122:f9eeca106725	4645	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4646	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4647	*/
Kojto	122:f9eeca106725	4648	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4649	{
Kojto	122:f9eeca106725	4650	return (READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE));
Kojto	122:f9eeca106725	4651	}
Kojto	122:f9eeca106725	4652
Kojto	122:f9eeca106725	4653	/**
Kojto	122:f9eeca106725	4654	* @brief Enable trigger interrupt (TDE).
Kojto	122:f9eeca106725	4655	* @rmtoll DIER TDE LL_TIM_EnableDMAReq_TRIG
Kojto	122:f9eeca106725	4656	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4657	* @retval None
Kojto	122:f9eeca106725	4658	*/
Kojto	122:f9eeca106725	4659	__STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4660	{
Kojto	122:f9eeca106725	4661	SET_BIT(TIMx->DIER, TIM_DIER_TDE);
Kojto	122:f9eeca106725	4662	}
Kojto	122:f9eeca106725	4663
Kojto	122:f9eeca106725	4664	/**
Kojto	122:f9eeca106725	4665	* @brief Disable trigger interrupt (TDE).
Kojto	122:f9eeca106725	4666	* @rmtoll DIER TDE LL_TIM_DisableDMAReq_TRIG
Kojto	122:f9eeca106725	4667	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4668	* @retval None
Kojto	122:f9eeca106725	4669	*/
Kojto	122:f9eeca106725	4670	__STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4671	{
Kojto	122:f9eeca106725	4672	CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE);
Kojto	122:f9eeca106725	4673	}
Kojto	122:f9eeca106725	4674
Kojto	122:f9eeca106725	4675	/**
Kojto	122:f9eeca106725	4676	* @brief Indicates whether the trigger interrupt (TDE) is enabled.
Kojto	122:f9eeca106725	4677	* @rmtoll DIER TDE LL_TIM_IsEnabledDMAReq_TRIG
Kojto	122:f9eeca106725	4678	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4679	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4680	*/
Kojto	122:f9eeca106725	4681	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4682	{
Kojto	122:f9eeca106725	4683	return (READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE));
Kojto	122:f9eeca106725	4684	}
Kojto	122:f9eeca106725	4685
Kojto	122:f9eeca106725	4686	/**
Kojto	122:f9eeca106725	4687	* @}
Kojto	122:f9eeca106725	4688	*/
Kojto	122:f9eeca106725	4689
Kojto	122:f9eeca106725	4690	/** @defgroup TIM_LL_EF_EVENT_Management EVENT-Management
Kojto	122:f9eeca106725	4691	* @{
Kojto	122:f9eeca106725	4692	*/
Kojto	122:f9eeca106725	4693	/**
Kojto	122:f9eeca106725	4694	* @brief Generate an update event.
Kojto	122:f9eeca106725	4695	* @rmtoll EGR UG LL_TIM_GenerateEvent_UPDATE
Kojto	122:f9eeca106725	4696	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4697	* @retval None
Kojto	122:f9eeca106725	4698	*/
Kojto	122:f9eeca106725	4699	__STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4700	{
Kojto	122:f9eeca106725	4701	SET_BIT(TIMx->EGR, TIM_EGR_UG);
Kojto	122:f9eeca106725	4702	}
Kojto	122:f9eeca106725	4703
Kojto	122:f9eeca106725	4704	/**
Kojto	122:f9eeca106725	4705	* @brief Generate Capture/Compare 1 event.
Kojto	122:f9eeca106725	4706	* @rmtoll EGR CC1G LL_TIM_GenerateEvent_CC1
Kojto	122:f9eeca106725	4707	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4708	* @retval None
Kojto	122:f9eeca106725	4709	*/
Kojto	122:f9eeca106725	4710	__STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4711	{
Kojto	122:f9eeca106725	4712	SET_BIT(TIMx->EGR, TIM_EGR_CC1G);
Kojto	122:f9eeca106725	4713	}
Kojto	122:f9eeca106725	4714
Kojto	122:f9eeca106725	4715	/**
Kojto	122:f9eeca106725	4716	* @brief Generate Capture/Compare 2 event.
Kojto	122:f9eeca106725	4717	* @rmtoll EGR CC2G LL_TIM_GenerateEvent_CC2
Kojto	122:f9eeca106725	4718	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4719	* @retval None
Kojto	122:f9eeca106725	4720	*/
Kojto	122:f9eeca106725	4721	__STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4722	{
Kojto	122:f9eeca106725	4723	SET_BIT(TIMx->EGR, TIM_EGR_CC2G);
Kojto	122:f9eeca106725	4724	}
Kojto	122:f9eeca106725	4725
Kojto	122:f9eeca106725	4726	/**
Kojto	122:f9eeca106725	4727	* @brief Generate Capture/Compare 3 event.
Kojto	122:f9eeca106725	4728	* @rmtoll EGR CC3G LL_TIM_GenerateEvent_CC3
Kojto	122:f9eeca106725	4729	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4730	* @retval None
Kojto	122:f9eeca106725	4731	*/
Kojto	122:f9eeca106725	4732	__STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4733	{
Kojto	122:f9eeca106725	4734	SET_BIT(TIMx->EGR, TIM_EGR_CC3G);
Kojto	122:f9eeca106725	4735	}
Kojto	122:f9eeca106725	4736
Kojto	122:f9eeca106725	4737	/**
Kojto	122:f9eeca106725	4738	* @brief Generate Capture/Compare 4 event.
Kojto	122:f9eeca106725	4739	* @rmtoll EGR CC4G LL_TIM_GenerateEvent_CC4
Kojto	122:f9eeca106725	4740	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4741	* @retval None
Kojto	122:f9eeca106725	4742	*/
Kojto	122:f9eeca106725	4743	__STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4744	{
Kojto	122:f9eeca106725	4745	SET_BIT(TIMx->EGR, TIM_EGR_CC4G);
Kojto	122:f9eeca106725	4746	}
Kojto	122:f9eeca106725	4747
Kojto	122:f9eeca106725	4748	/**
Kojto	122:f9eeca106725	4749	* @brief Generate commutation event.
Kojto	122:f9eeca106725	4750	* @rmtoll EGR COMG LL_TIM_GenerateEvent_COM
Kojto	122:f9eeca106725	4751	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4752	* @retval None
Kojto	122:f9eeca106725	4753	*/
Kojto	122:f9eeca106725	4754	__STATIC_INLINE void LL_TIM_GenerateEvent_COM(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4755	{
Kojto	122:f9eeca106725	4756	SET_BIT(TIMx->EGR, TIM_EGR_COMG);
Kojto	122:f9eeca106725	4757	}
Kojto	122:f9eeca106725	4758
Kojto	122:f9eeca106725	4759	/**
Kojto	122:f9eeca106725	4760	* @brief Generate trigger event.
Kojto	122:f9eeca106725	4761	* @rmtoll EGR TG LL_TIM_GenerateEvent_TRIG
Kojto	122:f9eeca106725	4762	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4763	* @retval None
Kojto	122:f9eeca106725	4764	*/
Kojto	122:f9eeca106725	4765	__STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4766	{
Kojto	122:f9eeca106725	4767	SET_BIT(TIMx->EGR, TIM_EGR_TG);
Kojto	122:f9eeca106725	4768	}
Kojto	122:f9eeca106725	4769
Kojto	122:f9eeca106725	4770	/**
Kojto	122:f9eeca106725	4771	* @brief Generate break event.
Kojto	122:f9eeca106725	4772	* @rmtoll EGR BG LL_TIM_GenerateEvent_BRK
Kojto	122:f9eeca106725	4773	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4774	* @retval None
Kojto	122:f9eeca106725	4775	*/
Kojto	122:f9eeca106725	4776	__STATIC_INLINE void LL_TIM_GenerateEvent_BRK(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4777	{
Kojto	122:f9eeca106725	4778	SET_BIT(TIMx->EGR, TIM_EGR_BG);
Kojto	122:f9eeca106725	4779	}
Kojto	122:f9eeca106725	4780
Kojto	122:f9eeca106725	4781	/**
Kojto	122:f9eeca106725	4782	* @brief Generate break 2 event.
Kojto	122:f9eeca106725	4783	* @rmtoll EGR B2G LL_TIM_GenerateEvent_BRK2
Kojto	122:f9eeca106725	4784	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4785	* @retval None
Kojto	122:f9eeca106725	4786	*/
Kojto	122:f9eeca106725	4787	__STATIC_INLINE void LL_TIM_GenerateEvent_BRK2(TIM_TypeDef * TIMx)
Kojto	122:f9eeca106725	4788	{
Kojto	122:f9eeca106725	4789	SET_BIT(TIMx->EGR, TIM_EGR_B2G);
Kojto	122:f9eeca106725	4790	}
Kojto	122:f9eeca106725	4791
Kojto	122:f9eeca106725	4792	/**
Kojto	122:f9eeca106725	4793	* @}
Kojto	122:f9eeca106725	4794	*/
Kojto	122:f9eeca106725	4795
Kojto	122:f9eeca106725	4796	#if defined(USE_FULL_LL_DRIVER)
Kojto	122:f9eeca106725	4797	/** @defgroup TIM_LL_EF_Init Initialisation and deinitialisation functions
Kojto	122:f9eeca106725	4798	* @{
Kojto	122:f9eeca106725	4799	*/
Kojto	122:f9eeca106725	4800
Kojto	122:f9eeca106725	4801	ErrorStatus LL_TIM_DeInit(TIM_TypeDef* TIMx);
Kojto	122:f9eeca106725	4802	void LL_TIM_StructInit(LL_TIM_InitTypeDef* TIM_InitStruct);
Kojto	122:f9eeca106725	4803	ErrorStatus LL_TIM_Init(TIM_TypeDef* TIMx, LL_TIM_InitTypeDef* TIM_InitStruct);
Kojto	122:f9eeca106725	4804	void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef* TIM_OC_InitStruct);
Kojto	122:f9eeca106725	4805	ErrorStatus LL_TIM_OC_Init(TIM_TypeDef* TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef* TIM_OC_InitStruct);
Kojto	122:f9eeca106725	4806	void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef* TIM_ICInitStruct);
Kojto	122:f9eeca106725	4807	ErrorStatus LL_TIM_IC_Init(TIM_TypeDef* TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef* TIM_IC_InitStruct);
Kojto	122:f9eeca106725	4808	void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef* TIM_EncoderInitStruct);
Kojto	122:f9eeca106725	4809	ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef* TIMx, LL_TIM_ENCODER_InitTypeDef* TIM_EncoderInitStruct);
Kojto	122:f9eeca106725	4810	void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef* TIM_HallSensorInitStruct);
Kojto	122:f9eeca106725	4811	ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef* TIMx, LL_TIM_HALLSENSOR_InitTypeDef* TIM_HallSensorInitStruct);
Kojto	122:f9eeca106725	4812	/**
Kojto	122:f9eeca106725	4813	* @}
Kojto	122:f9eeca106725	4814	*/
Kojto	122:f9eeca106725	4815	#endif /* USE_FULL_LL_DRIVER */
Kojto	122:f9eeca106725	4816
Kojto	122:f9eeca106725	4817	/**
Kojto	122:f9eeca106725	4818	* @}
Kojto	122:f9eeca106725	4819	*/
Kojto	122:f9eeca106725	4820
Kojto	122:f9eeca106725	4821	/**
Kojto	122:f9eeca106725	4822	* @}
Kojto	122:f9eeca106725	4823	*/
Kojto	122:f9eeca106725	4824
Kojto	122:f9eeca106725	4825	#endif /* TIM1 \|\| TIM8 \|\| TIM2 \|\| TIM3 \|\| TIM4 \|\| TIM5 \|\| TIM15 \|\| TIM16 \|\| TIM17 \|\| TIM6 \|\| TIM7 */
Kojto	122:f9eeca106725	4826
Kojto	122:f9eeca106725	4827	/**
Kojto	122:f9eeca106725	4828	* @}
Kojto	122:f9eeca106725	4829	*/
Kojto	122:f9eeca106725	4830
Kojto	122:f9eeca106725	4831	#ifdef __cplusplus
Kojto	122:f9eeca106725	4832	}
Kojto	122:f9eeca106725	4833	#endif
Kojto	122:f9eeca106725	4834
Kojto	122:f9eeca106725	4835	#endif /* __STM32L4xx_LL_TIM_H */
Kojto	122:f9eeca106725	4836
Kojto	122:f9eeca106725	4837	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/