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TARGET_NUCLEO_L486RG/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_tim.h@145:64910690c574, 2017-06-21 (annotated)

Committer:: AnnaBridge
Date:: Wed Jun 21 17:31:38 2017 +0100
Revision:: 145:64910690c574
Parent:: 128:9bcdf88f62b0

Release 145 of the mbed library.

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	122:f9eeca106725	1	/**
Kojto	122:f9eeca106725	2	******************************************************************************
Kojto	122:f9eeca106725	3	* @file stm32l4xx_ll_tim.h
Kojto	122:f9eeca106725	4	* @author MCD Application Team
AnnaBridge	145:64910690c574	5	* @version V1.7.1
AnnaBridge	145:64910690c574	6	* @date 21-April-2017
Kojto	122:f9eeca106725	7	* @brief Header file of TIM LL module.
Kojto	122:f9eeca106725	8	******************************************************************************
Kojto	122:f9eeca106725	9	* @attention
Kojto	122:f9eeca106725	10	*
AnnaBridge	145:64910690c574	11	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
Kojto	122:f9eeca106725	12	*
Kojto	122:f9eeca106725	13	* Redistribution and use in source and binary forms, with or without modification,
Kojto	122:f9eeca106725	14	* are permitted provided that the following conditions are met:
Kojto	122:f9eeca106725	15	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	122:f9eeca106725	16	* this list of conditions and the following disclaimer.
Kojto	122:f9eeca106725	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	122:f9eeca106725	18	* this list of conditions and the following disclaimer in the documentation
Kojto	122:f9eeca106725	19	* and/or other materials provided with the distribution.
Kojto	122:f9eeca106725	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	122:f9eeca106725	21	* may be used to endorse or promote products derived from this software
Kojto	122:f9eeca106725	22	* without specific prior written permission.
Kojto	122:f9eeca106725	23	*
Kojto	122:f9eeca106725	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	122:f9eeca106725	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	122:f9eeca106725	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	122:f9eeca106725	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	122:f9eeca106725	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	122:f9eeca106725	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	122:f9eeca106725	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	122:f9eeca106725	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	122:f9eeca106725	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	122:f9eeca106725	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	122:f9eeca106725	34	*
Kojto	122:f9eeca106725	35	******************************************************************************
Kojto	122:f9eeca106725	36	*/
Kojto	122:f9eeca106725	37
Kojto	122:f9eeca106725	38	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	122:f9eeca106725	39	#ifndef __STM32L4xx_LL_TIM_H
Kojto	122:f9eeca106725	40	#define __STM32L4xx_LL_TIM_H
Kojto	122:f9eeca106725	41
Kojto	122:f9eeca106725	42	#ifdef __cplusplus
Kojto	122:f9eeca106725	43	extern "C" {
Kojto	122:f9eeca106725	44	#endif
Kojto	122:f9eeca106725	45
Kojto	122:f9eeca106725	46	/* Includes ------------------------------------------------------------------*/
Kojto	122:f9eeca106725	47	#include "stm32l4xx.h"
Kojto	122:f9eeca106725	48
Kojto	122:f9eeca106725	49	/** @addtogroup STM32L4xx_LL_Driver
Kojto	122:f9eeca106725	50	* @{
Kojto	122:f9eeca106725	51	*/
Kojto	122:f9eeca106725	52
Kojto	122:f9eeca106725	53	#if defined (TIM1) \|\| defined (TIM8) \|\| defined (TIM2) \|\| defined (TIM3) \|\| defined (TIM4) \|\| defined (TIM5) \|\| defined (TIM15) \|\| defined (TIM16) \|\| defined (TIM17) \|\| defined (TIM6) \|\| defined (TIM7)
Kojto	122:f9eeca106725	54
Kojto	122:f9eeca106725	55	/** @defgroup TIM_LL TIM
Kojto	122:f9eeca106725	56	* @{
Kojto	122:f9eeca106725	57	*/
Kojto	122:f9eeca106725	58
Kojto	122:f9eeca106725	59	/* Private types -------------------------------------------------------------*/
Kojto	122:f9eeca106725	60	/* Private variables ---------------------------------------------------------*/
Kojto	122:f9eeca106725	61	/** @defgroup TIM_LL_Private_Variables TIM Private Variables
Kojto	122:f9eeca106725	62	* @{
Kojto	122:f9eeca106725	63	*/
AnnaBridge	145:64910690c574	64	static const uint8_t OFFSET_TAB_CCMRx[] =
AnnaBridge	145:64910690c574	65	{
AnnaBridge	145:64910690c574	66	0x00U, /* 0: TIMx_CH1 */
AnnaBridge	145:64910690c574	67	0x00U, /* 1: TIMx_CH1N */
AnnaBridge	145:64910690c574	68	0x00U, /* 2: TIMx_CH2 */
AnnaBridge	145:64910690c574	69	0x00U, /* 3: TIMx_CH2N */
AnnaBridge	145:64910690c574	70	0x04U, /* 4: TIMx_CH3 */
AnnaBridge	145:64910690c574	71	0x04U, /* 5: TIMx_CH3N */
AnnaBridge	145:64910690c574	72	0x04U, /* 6: TIMx_CH4 */
AnnaBridge	145:64910690c574	73	0x3CU, /* 7: TIMx_CH5 */
AnnaBridge	145:64910690c574	74	0x3CU /* 8: TIMx_CH6 */
AnnaBridge	145:64910690c574	75	};
Kojto	122:f9eeca106725	76
Kojto	122:f9eeca106725	77	static const uint8_t SHIFT_TAB_OCxx[] =
Kojto	122:f9eeca106725	78	{
Kojto	122:f9eeca106725	79	0U, /* 0: OC1M, OC1FE, OC1PE */
Kojto	122:f9eeca106725	80	0U, /* 1: - NA */
Kojto	122:f9eeca106725	81	8U, /* 2: OC2M, OC2FE, OC2PE */
Kojto	122:f9eeca106725	82	0U, /* 3: - NA */
Kojto	122:f9eeca106725	83	0U, /* 4: OC3M, OC3FE, OC3PE */
Kojto	122:f9eeca106725	84	0U, /* 5: - NA */
Kojto	122:f9eeca106725	85	8U, /* 6: OC4M, OC4FE, OC4PE */
Kojto	122:f9eeca106725	86	0U, /* 7: OC5M, OC5FE, OC5PE */
Kojto	122:f9eeca106725	87	8U /* 8: OC6M, OC6FE, OC6PE */
Kojto	122:f9eeca106725	88	};
Kojto	122:f9eeca106725	89
Kojto	122:f9eeca106725	90	static const uint8_t SHIFT_TAB_ICxx[] =
Kojto	122:f9eeca106725	91	{
Kojto	122:f9eeca106725	92	0U, /* 0: CC1S, IC1PSC, IC1F */
Kojto	122:f9eeca106725	93	0U, /* 1: - NA */
Kojto	122:f9eeca106725	94	8U, /* 2: CC2S, IC2PSC, IC2F */
Kojto	122:f9eeca106725	95	0U, /* 3: - NA */
Kojto	122:f9eeca106725	96	0U, /* 4: CC3S, IC3PSC, IC3F */
Kojto	122:f9eeca106725	97	0U, /* 5: - NA */
Kojto	122:f9eeca106725	98	8U, /* 6: CC4S, IC4PSC, IC4F */
Kojto	122:f9eeca106725	99	0U, /* 7: - NA */
Kojto	122:f9eeca106725	100	0U /* 8: - NA */
Kojto	122:f9eeca106725	101	};
Kojto	122:f9eeca106725	102
Kojto	122:f9eeca106725	103	static const uint8_t SHIFT_TAB_CCxP[] =
Kojto	122:f9eeca106725	104	{
Kojto	122:f9eeca106725	105	0U, /* 0: CC1P */
Kojto	122:f9eeca106725	106	2U, /* 1: CC1NP */
Kojto	122:f9eeca106725	107	4U, /* 2: CC2P */
Kojto	122:f9eeca106725	108	6U, /* 3: CC2NP */
Kojto	122:f9eeca106725	109	8U, /* 4: CC3P */
Kojto	122:f9eeca106725	110	10U, /* 5: CC3NP */
Kojto	122:f9eeca106725	111	12U, /* 6: CC4P */
Kojto	122:f9eeca106725	112	16U, /* 7: CC5P */
Kojto	122:f9eeca106725	113	20U /* 8: CC6P */
Kojto	122:f9eeca106725	114	};
Kojto	122:f9eeca106725	115
Kojto	122:f9eeca106725	116	static const uint8_t SHIFT_TAB_OISx[] =
Kojto	122:f9eeca106725	117	{
Kojto	122:f9eeca106725	118	0U, /* 0: OIS1 */
Kojto	122:f9eeca106725	119	1U, /* 1: OIS1N */
Kojto	122:f9eeca106725	120	2U, /* 2: OIS2 */
Kojto	122:f9eeca106725	121	3U, /* 3: OIS2N */
Kojto	122:f9eeca106725	122	4U, /* 4: OIS3 */
Kojto	122:f9eeca106725	123	5U, /* 5: OIS3N */
Kojto	122:f9eeca106725	124	6U, /* 6: OIS4 */
Kojto	122:f9eeca106725	125	8U, /* 7: OIS5 */
Kojto	122:f9eeca106725	126	10U /* 8: OIS6 */
Kojto	122:f9eeca106725	127	};
Kojto	122:f9eeca106725	128	/**
Kojto	122:f9eeca106725	129	* @}
Kojto	122:f9eeca106725	130	*/
Kojto	122:f9eeca106725	131
Kojto	122:f9eeca106725	132
Kojto	122:f9eeca106725	133	/* Private constants ---------------------------------------------------------*/
Kojto	122:f9eeca106725	134	/** @defgroup TIM_LL_Private_Constants TIM Private Constants
Kojto	122:f9eeca106725	135	* @{
Kojto	122:f9eeca106725	136	*/
AnnaBridge	145:64910690c574	137
AnnaBridge	145:64910690c574	138	/* Defines used for the bit position in the register and perform offsets */
AnnaBridge	145:64910690c574	139	#define TIM_POSITION_BRK_SOURCE POSITION_VAL(Source)
Kojto	122:f9eeca106725	140
Kojto	122:f9eeca106725	141	/* Generic bit definitions for TIMx_OR2 register */
Kojto	122:f9eeca106725	142	#define TIMx_OR2_BKINE TIM1_OR2_BKINE /!< BRK BKIN input enable /
Kojto	122:f9eeca106725	143	#define TIMx_OR2_BKCOMP1E TIM1_OR2_BKCMP1E /!< BRK COMP1 enable /
Kojto	122:f9eeca106725	144	#define TIMx_OR2_BKCOMP2E TIM1_OR2_BKCMP2E /!< BRK COMP2 enable /
Kojto	122:f9eeca106725	145	#if defined(DFSDM1_Channel0)
Kojto	122:f9eeca106725	146	#define TIMx_OR2_BKDF1BK0E TIM1_OR2_BKDF1BK0E /!< BRK DFSDM1_BREAK[0] enable /
Kojto	122:f9eeca106725	147	#endif /* DFSDM1_Channel0 */
Kojto	122:f9eeca106725	148	#define TIMx_OR2_BKINP TIM1_OR2_BKINP /!< BRK BKIN input polarity /
Kojto	122:f9eeca106725	149	#define TIMx_OR2_BKCOMP1P TIM1_OR2_BKCMP1P /!< BRK COMP1 input polarity /
Kojto	122:f9eeca106725	150	#define TIMx_OR2_BKCOMP2P TIM1_OR2_BKCMP2P /!< BRK COMP2 input polarity /
Kojto	122:f9eeca106725	151	#define TIMx_OR2_ETRSEL TIM1_OR2_ETRSEL /!< TIMx ETR source selection /
Kojto	122:f9eeca106725	152
Kojto	122:f9eeca106725	153	/* Generic bit definitions for TIMx_OR3 register */
AnnaBridge	145:64910690c574	154	#define TIMx_OR3_BK2INE TIM1_OR3_BK2INE /!< BRK2 BKIN2 input enable /
AnnaBridge	145:64910690c574	155	#define TIMx_OR3_BK2COMP1E TIM1_OR3_BK2CMP1E /!< BRK2 COMP1 enable /
AnnaBridge	145:64910690c574	156	#define TIMx_OR3_BK2COMP2E TIM1_OR3_BK2CMP2E /!< BRK2 COMP2 enable /
Kojto	122:f9eeca106725	157	#if defined(DFSDM1_Channel0)
Kojto	122:f9eeca106725	158	#define TIMx_OR3_BK2DF1BK1E TIM1_OR3_BK2DF1BK1E /!< BRK2 DFSDM1_BREAK[1] enable /
Kojto	122:f9eeca106725	159	#endif /* DFSDM1_Channel0 */
AnnaBridge	145:64910690c574	160	#define TIMx_OR3_BK2INP TIM1_OR3_BK2INP /!< BRK2 BKIN2 input polarity /
AnnaBridge	145:64910690c574	161	#define TIMx_OR3_BK2COMP1P TIM1_OR3_BK2CMP1P /!< BRK2 COMP1 input polarity /
AnnaBridge	145:64910690c574	162	#define TIMx_OR3_BK2COMP2P TIM1_OR3_BK2CMP2P /!< BRK2 COMP2 input polarity /
Kojto	122:f9eeca106725	163
Kojto	122:f9eeca106725	164	/* Remap mask definitions */
AnnaBridge	145:64910690c574	165	#define TIMx_OR1_RMP_SHIFT 16U
AnnaBridge	145:64910690c574	166	#define TIMx_OR1_RMP_MASK 0x0000FFFFU
Kojto	122:f9eeca106725	167	#if defined(ADC3)
AnnaBridge	145:64910690c574	168	#define TIM1_OR1_RMP_MASK ((TIM1_OR1_ETR_ADC1_RMP \| TIM1_OR1_ETR_ADC3_RMP \| TIM1_OR1_TI1_RMP) << TIMx_OR1_RMP_SHIFT)
Kojto	122:f9eeca106725	169	#else
AnnaBridge	145:64910690c574	170	#define TIM1_OR1_RMP_MASK ((TIM1_OR1_ETR_ADC1_RMP \| TIM1_OR1_TI1_RMP) << TIMx_OR1_RMP_SHIFT)
Kojto	122:f9eeca106725	171	#endif /* ADC3 */
AnnaBridge	145:64910690c574	172	#define TIM2_OR1_RMP_MASK ((TIM2_OR1_TI4_RMP \| TIM2_OR1_ETR1_RMP \| TIM2_OR1_ITR1_RMP) << TIMx_OR1_RMP_SHIFT)
AnnaBridge	145:64910690c574	173	#define TIM3_OR1_RMP_MASK (TIM3_OR1_TI1_RMP << TIMx_OR1_RMP_SHIFT)
AnnaBridge	145:64910690c574	174	#define TIM8_OR1_RMP_MASK ((TIM8_OR1_ETR_ADC2_RMP \| TIM8_OR1_ETR_ADC3_RMP \| TIM8_OR1_TI1_RMP) << TIMx_OR1_RMP_SHIFT)
AnnaBridge	145:64910690c574	175	#define TIM15_OR1_RMP_MASK (TIM15_OR1_TI1_RMP << TIMx_OR1_RMP_SHIFT)
AnnaBridge	145:64910690c574	176	#define TIM16_OR1_RMP_MASK (TIM16_OR1_TI1_RMP << TIMx_OR1_RMP_SHIFT)
AnnaBridge	145:64910690c574	177	#define TIM17_OR1_RMP_MASK (TIM17_OR1_TI1_RMP << TIMx_OR1_RMP_SHIFT)
Kojto	122:f9eeca106725	178
Kojto	122:f9eeca106725	179	/* Mask used to set the TDG[x:0] of the DTG bits of the TIMx_BDTR register */
Kojto	122:f9eeca106725	180	#define DT_DELAY_1 ((uint8_t)0x7FU)
Kojto	122:f9eeca106725	181	#define DT_DELAY_2 ((uint8_t)0x3FU)
Kojto	122:f9eeca106725	182	#define DT_DELAY_3 ((uint8_t)0x1FU)
Kojto	122:f9eeca106725	183	#define DT_DELAY_4 ((uint8_t)0x1FU)
AnnaBridge	145:64910690c574	184
Kojto	122:f9eeca106725	185	/* Mask used to set the DTG[7:5] bits of the DTG bits of the TIMx_BDTR register */
Kojto	122:f9eeca106725	186	#define DT_RANGE_1 ((uint8_t)0x00U)
Kojto	122:f9eeca106725	187	#define DT_RANGE_2 ((uint8_t)0x80U)
Kojto	122:f9eeca106725	188	#define DT_RANGE_3 ((uint8_t)0xC0U)
Kojto	122:f9eeca106725	189	#define DT_RANGE_4 ((uint8_t)0xE0U)
Kojto	122:f9eeca106725	190
Kojto	122:f9eeca106725	191	/** Legacy definitions for compatibility purpose
Kojto	122:f9eeca106725	192	@cond 0
Kojto	122:f9eeca106725	193	*/
Kojto	122:f9eeca106725	194	#if defined(DFSDM1_Channel0)
Kojto	122:f9eeca106725	195	#define TIMx_OR2_BKDFBK0E TIMx_OR2_BKDF1BK0E
Kojto	122:f9eeca106725	196	#define TIMx_OR3_BK2DFBK1E TIMx_OR3_BK2DF1BK1E
Kojto	122:f9eeca106725	197	#endif /* DFSDM1_Channel0 */
Kojto	122:f9eeca106725	198	/**
Kojto	122:f9eeca106725	199	@endcond
Kojto	122:f9eeca106725	200	*/
Kojto	122:f9eeca106725	201
Kojto	122:f9eeca106725	202	/**
Kojto	122:f9eeca106725	203	* @}
Kojto	122:f9eeca106725	204	*/
Kojto	122:f9eeca106725	205
Kojto	122:f9eeca106725	206	/* Private macros ------------------------------------------------------------*/
Kojto	122:f9eeca106725	207	/** @defgroup TIM_LL_Private_Macros TIM Private Macros
Kojto	122:f9eeca106725	208	* @{
Kojto	122:f9eeca106725	209	*/
Kojto	122:f9eeca106725	210	/** @brief Convert channel id into channel index.
AnnaBridge	145:64910690c574	211	* @param __CHANNEL__ This parameter can be one of the following values:
Kojto	122:f9eeca106725	212	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	213	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	214	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	215	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	216	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	217	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	218	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	219	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	220	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	221	* @retval none
Kojto	122:f9eeca106725	222	*/
Kojto	122:f9eeca106725	223	#define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \
Kojto	122:f9eeca106725	224	(((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\
Kojto	122:f9eeca106725	225	((__CHANNEL__) == LL_TIM_CHANNEL_CH1N) ? 1U :\
Kojto	122:f9eeca106725	226	((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\
Kojto	122:f9eeca106725	227	((__CHANNEL__) == LL_TIM_CHANNEL_CH2N) ? 3U :\
Kojto	122:f9eeca106725	228	((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U :\
Kojto	122:f9eeca106725	229	((__CHANNEL__) == LL_TIM_CHANNEL_CH3N) ? 5U :\
Kojto	122:f9eeca106725	230	((__CHANNEL__) == LL_TIM_CHANNEL_CH4) ? 6U :\
Kojto	122:f9eeca106725	231	((__CHANNEL__) == LL_TIM_CHANNEL_CH5) ? 7U : 8U)
Kojto	122:f9eeca106725	232
Kojto	122:f9eeca106725	233	/** @brief Calculate the deadtime sampling period(in ps).
Kojto	122:f9eeca106725	234	* @param __TIMCLK__ timer input clock frequency (in Hz).
AnnaBridge	145:64910690c574	235	* @param __CKD__ This parameter can be one of the following values:
Kojto	122:f9eeca106725	236	* @arg @ref LL_TIM_CLOCKDIVISION_DIV1
Kojto	122:f9eeca106725	237	* @arg @ref LL_TIM_CLOCKDIVISION_DIV2
Kojto	122:f9eeca106725	238	* @arg @ref LL_TIM_CLOCKDIVISION_DIV4
Kojto	122:f9eeca106725	239	* @retval none
Kojto	122:f9eeca106725	240	*/
Kojto	122:f9eeca106725	241	#define TIM_CALC_DTS(__TIMCLK__, __CKD__) \
Kojto	122:f9eeca106725	242	(((__CKD__) == LL_TIM_CLOCKDIVISION_DIV1) ? ((uint64_t)1000000000000U/(__TIMCLK__)) : \
Kojto	122:f9eeca106725	243	((__CKD__) == LL_TIM_CLOCKDIVISION_DIV2) ? ((uint64_t)1000000000000U/((__TIMCLK__) >> 1U)) : \
Kojto	122:f9eeca106725	244	((uint64_t)1000000000000U/((__TIMCLK__) >> 2U)))
Kojto	122:f9eeca106725	245	/**
Kojto	122:f9eeca106725	246	* @}
Kojto	122:f9eeca106725	247	*/
Kojto	122:f9eeca106725	248
Kojto	122:f9eeca106725	249
Kojto	122:f9eeca106725	250	/* Exported types ------------------------------------------------------------*/
Kojto	122:f9eeca106725	251	#if defined(USE_FULL_LL_DRIVER)
Kojto	122:f9eeca106725	252	/** @defgroup TIM_LL_ES_INIT TIM Exported Init structure
Kojto	122:f9eeca106725	253	* @{
Kojto	122:f9eeca106725	254	*/
Kojto	122:f9eeca106725	255
AnnaBridge	145:64910690c574	256	/**
AnnaBridge	145:64910690c574	257	* @brief TIM Time Base configuration structure definition.
Kojto	122:f9eeca106725	258	*/
Kojto	122:f9eeca106725	259	typedef struct
Kojto	122:f9eeca106725	260	{
Kojto	122:f9eeca106725	261	uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
AnnaBridge	145:64910690c574	262	This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
Kojto	122:f9eeca106725	263
Kojto	122:f9eeca106725	264	This feature can be modified afterwards using unitary function @ref LL_TIM_SetPrescaler().*/
Kojto	122:f9eeca106725	265
Kojto	122:f9eeca106725	266	uint32_t CounterMode; /*!< Specifies the counter mode.
Kojto	122:f9eeca106725	267	This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE.
Kojto	122:f9eeca106725	268
Kojto	122:f9eeca106725	269	This feature can be modified afterwards using unitary function @ref LL_TIM_SetCounterMode().*/
Kojto	122:f9eeca106725	270
AnnaBridge	145:64910690c574	271	uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active
Kojto	122:f9eeca106725	272	Auto-Reload Register at the next update event.
AnnaBridge	145:64910690c574	273	This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
AnnaBridge	145:64910690c574	274	Some timer instances may support 32 bits counters. In that case this parameter must be a number between 0x0000 and 0xFFFFFFFF.
AnnaBridge	145:64910690c574	275
AnnaBridge	145:64910690c574	276	This feature can be modified afterwards using unitary function @ref LL_TIM_SetAutoReload().*/
Kojto	122:f9eeca106725	277
Kojto	122:f9eeca106725	278	uint32_t ClockDivision; /*!< Specifies the clock division.
AnnaBridge	145:64910690c574	279	This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION.
AnnaBridge	145:64910690c574	280
Kojto	122:f9eeca106725	281	This feature can be modified afterwards using unitary function @ref LL_TIM_SetClockDivision().*/
Kojto	122:f9eeca106725	282
Kojto	122:f9eeca106725	283	uint8_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
Kojto	122:f9eeca106725	284	reaches zero, an update event is generated and counting restarts
Kojto	122:f9eeca106725	285	from the RCR value (N).
Kojto	122:f9eeca106725	286	This means in PWM mode that (N+1) corresponds to:
Kojto	122:f9eeca106725	287	- the number of PWM periods in edge-aligned mode
Kojto	122:f9eeca106725	288	- the number of half PWM period in center-aligned mode
AnnaBridge	145:64910690c574	289	This parameter must be a number between 0x00 and 0xFF.
AnnaBridge	145:64910690c574	290
Kojto	122:f9eeca106725	291	This feature can be modified afterwards using unitary function @ref LL_TIM_SetRepetitionCounter().*/
AnnaBridge	145:64910690c574	292	} LL_TIM_InitTypeDef;
AnnaBridge	145:64910690c574	293
AnnaBridge	145:64910690c574	294	/**
AnnaBridge	145:64910690c574	295	* @brief TIM Output Compare configuration structure definition.
Kojto	122:f9eeca106725	296	*/
Kojto	122:f9eeca106725	297	typedef struct
Kojto	122:f9eeca106725	298	{
Kojto	122:f9eeca106725	299	uint32_t OCMode; /*!< Specifies the output mode.
Kojto	122:f9eeca106725	300	This parameter can be a value of @ref TIM_LL_EC_OCMODE.
Kojto	122:f9eeca106725	301
Kojto	122:f9eeca106725	302	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetMode().*/
Kojto	122:f9eeca106725	303
Kojto	122:f9eeca106725	304	uint32_t OCState; /*!< Specifies the TIM Output Compare state.
Kojto	122:f9eeca106725	305	This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
Kojto	122:f9eeca106725	306
Kojto	122:f9eeca106725	307	This feature can be modified afterwards using unitary functions @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
Kojto	122:f9eeca106725	308
Kojto	122:f9eeca106725	309	uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state.
Kojto	122:f9eeca106725	310	This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
Kojto	122:f9eeca106725	311
Kojto	122:f9eeca106725	312	This feature can be modified afterwards using unitary functions @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
Kojto	122:f9eeca106725	313
Kojto	122:f9eeca106725	314	uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Register.
AnnaBridge	145:64910690c574	315	This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
Kojto	122:f9eeca106725	316
Kojto	122:f9eeca106725	317	This feature can be modified afterwards using unitary function LL_TIM_OC_SetCompareCHx (x=1..6).*/
Kojto	122:f9eeca106725	318
Kojto	122:f9eeca106725	319	uint32_t OCPolarity; /*!< Specifies the output polarity.
Kojto	122:f9eeca106725	320	This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
Kojto	122:f9eeca106725	321
Kojto	122:f9eeca106725	322	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetPolarity().*/
Kojto	122:f9eeca106725	323
Kojto	122:f9eeca106725	324	uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
Kojto	122:f9eeca106725	325	This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
Kojto	122:f9eeca106725	326
Kojto	122:f9eeca106725	327	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetPolarity().*/
AnnaBridge	145:64910690c574	328
AnnaBridge	145:64910690c574	329
Kojto	122:f9eeca106725	330	uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
Kojto	122:f9eeca106725	331	This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
Kojto	122:f9eeca106725	332
Kojto	122:f9eeca106725	333	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetIdleState().*/
Kojto	122:f9eeca106725	334
Kojto	122:f9eeca106725	335	uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
Kojto	122:f9eeca106725	336	This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
Kojto	122:f9eeca106725	337
Kojto	122:f9eeca106725	338	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetIdleState().*/
Kojto	122:f9eeca106725	339	} LL_TIM_OC_InitTypeDef;
Kojto	122:f9eeca106725	340
AnnaBridge	145:64910690c574	341	/**
AnnaBridge	145:64910690c574	342	* @brief TIM Input Capture configuration structure definition.
Kojto	122:f9eeca106725	343	*/
Kojto	122:f9eeca106725	344
Kojto	122:f9eeca106725	345	typedef struct
Kojto	122:f9eeca106725	346	{
Kojto	122:f9eeca106725	347
Kojto	122:f9eeca106725	348	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
Kojto	122:f9eeca106725	349	This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
Kojto	122:f9eeca106725	350
Kojto	122:f9eeca106725	351	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
Kojto	122:f9eeca106725	352
Kojto	122:f9eeca106725	353	uint32_t ICActiveInput; /*!< Specifies the input.
Kojto	122:f9eeca106725	354	This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
Kojto	122:f9eeca106725	355
Kojto	122:f9eeca106725	356	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
Kojto	122:f9eeca106725	357
Kojto	122:f9eeca106725	358	uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
Kojto	122:f9eeca106725	359	This parameter can be a value of @ref TIM_LL_EC_ICPSC.
Kojto	122:f9eeca106725	360
Kojto	122:f9eeca106725	361	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
Kojto	122:f9eeca106725	362
Kojto	122:f9eeca106725	363	uint32_t ICFilter; /*!< Specifies the input capture filter.
Kojto	122:f9eeca106725	364	This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
Kojto	122:f9eeca106725	365
Kojto	122:f9eeca106725	366	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
Kojto	122:f9eeca106725	367	} LL_TIM_IC_InitTypeDef;
Kojto	122:f9eeca106725	368
Kojto	122:f9eeca106725	369
Kojto	122:f9eeca106725	370	/**
Kojto	122:f9eeca106725	371	* @brief TIM Encoder interface configuration structure definition.
Kojto	122:f9eeca106725	372	*/
Kojto	122:f9eeca106725	373	typedef struct
Kojto	122:f9eeca106725	374	{
Kojto	122:f9eeca106725	375	uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4).
Kojto	122:f9eeca106725	376	This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE.
Kojto	122:f9eeca106725	377
Kojto	122:f9eeca106725	378	This feature can be modified afterwards using unitary function @ref LL_TIM_SetEncoderMode().*/
Kojto	122:f9eeca106725	379
Kojto	122:f9eeca106725	380	uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
Kojto	122:f9eeca106725	381	This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
Kojto	122:f9eeca106725	382
Kojto	122:f9eeca106725	383	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
Kojto	122:f9eeca106725	384
Kojto	122:f9eeca106725	385	uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source
Kojto	122:f9eeca106725	386	This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
Kojto	122:f9eeca106725	387
Kojto	122:f9eeca106725	388	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
Kojto	122:f9eeca106725	389
Kojto	122:f9eeca106725	390	uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value.
Kojto	122:f9eeca106725	391	This parameter can be a value of @ref TIM_LL_EC_ICPSC.
Kojto	122:f9eeca106725	392
Kojto	122:f9eeca106725	393	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
Kojto	122:f9eeca106725	394
Kojto	122:f9eeca106725	395	uint32_t IC1Filter; /*!< Specifies the TI1 input filter.
Kojto	122:f9eeca106725	396	This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
Kojto	122:f9eeca106725	397
Kojto	122:f9eeca106725	398	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
Kojto	122:f9eeca106725	399
Kojto	122:f9eeca106725	400	uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input.
Kojto	122:f9eeca106725	401	This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
Kojto	122:f9eeca106725	402
Kojto	122:f9eeca106725	403	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
Kojto	122:f9eeca106725	404
Kojto	122:f9eeca106725	405	uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source
Kojto	122:f9eeca106725	406	This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
Kojto	122:f9eeca106725	407
Kojto	122:f9eeca106725	408	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
Kojto	122:f9eeca106725	409
Kojto	122:f9eeca106725	410	uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value.
Kojto	122:f9eeca106725	411	This parameter can be a value of @ref TIM_LL_EC_ICPSC.
Kojto	122:f9eeca106725	412
Kojto	122:f9eeca106725	413	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
Kojto	122:f9eeca106725	414
Kojto	122:f9eeca106725	415	uint32_t IC2Filter; /*!< Specifies the TI2 input filter.
Kojto	122:f9eeca106725	416	This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
Kojto	122:f9eeca106725	417
Kojto	122:f9eeca106725	418	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
Kojto	122:f9eeca106725	419
Kojto	122:f9eeca106725	420	} LL_TIM_ENCODER_InitTypeDef;
Kojto	122:f9eeca106725	421
AnnaBridge	145:64910690c574	422	/**
AnnaBridge	145:64910690c574	423	* @brief TIM Hall sensor interface configuration structure definition.
Kojto	122:f9eeca106725	424	*/
Kojto	122:f9eeca106725	425	typedef struct
Kojto	122:f9eeca106725	426	{
AnnaBridge	145:64910690c574	427
Kojto	122:f9eeca106725	428	uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
Kojto	122:f9eeca106725	429	This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
Kojto	122:f9eeca106725	430
Kojto	122:f9eeca106725	431	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
Kojto	122:f9eeca106725	432
Kojto	122:f9eeca106725	433	uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value.
Kojto	122:f9eeca106725	434	Prescaler must be set to get a maximum counter period longer than the
Kojto	122:f9eeca106725	435	time interval between 2 consecutive changes on the Hall inputs.
Kojto	122:f9eeca106725	436	This parameter can be a value of @ref TIM_LL_EC_ICPSC.
Kojto	122:f9eeca106725	437
Kojto	122:f9eeca106725	438	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
Kojto	122:f9eeca106725	439
Kojto	122:f9eeca106725	440	uint32_t IC1Filter; /*!< Specifies the TI1 input filter.
Kojto	122:f9eeca106725	441	This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
Kojto	122:f9eeca106725	442
Kojto	122:f9eeca106725	443	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
Kojto	122:f9eeca106725	444
Kojto	122:f9eeca106725	445	uint32_t CommutationDelay; /*!< Specifies the compare value to be loaded into the Capture Compare Register.
Kojto	122:f9eeca106725	446	A positive pulse (TRGO event) is generated with a programmable delay every time
Kojto	122:f9eeca106725	447	a change occurs on the Hall inputs.
Kojto	122:f9eeca106725	448	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
Kojto	122:f9eeca106725	449
AnnaBridge	145:64910690c574	450	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetCompareCH2().*/
Kojto	122:f9eeca106725	451	} LL_TIM_HALLSENSOR_InitTypeDef;
Kojto	122:f9eeca106725	452
AnnaBridge	145:64910690c574	453	/**
AnnaBridge	145:64910690c574	454	* @brief BDTR (Break and Dead Time) structure definition
AnnaBridge	145:64910690c574	455	*/
AnnaBridge	145:64910690c574	456	typedef struct
AnnaBridge	145:64910690c574	457	{
AnnaBridge	145:64910690c574	458	uint32_t OSSRState; /*!< Specifies the Off-State selection used in Run mode.
AnnaBridge	145:64910690c574	459	This parameter can be a value of @ref TIM_LL_EC_OSSR
AnnaBridge	145:64910690c574	460
AnnaBridge	145:64910690c574	461	This feature can be modified afterwards using unitary function @ref LL_TIM_SetOffStates()
AnnaBridge	145:64910690c574	462
AnnaBridge	145:64910690c574	463	@note This bit-field cannot be modified as long as LOCK level 2 has been programmed. */
AnnaBridge	145:64910690c574	464
AnnaBridge	145:64910690c574	465	uint32_t OSSIState; /*!< Specifies the Off-State used in Idle state.
AnnaBridge	145:64910690c574	466	This parameter can be a value of @ref TIM_LL_EC_OSSI
AnnaBridge	145:64910690c574	467
AnnaBridge	145:64910690c574	468	This feature can be modified afterwards using unitary function @ref LL_TIM_SetOffStates()
AnnaBridge	145:64910690c574	469
AnnaBridge	145:64910690c574	470	@note This bit-field cannot be modified as long as LOCK level 2 has been programmed. */
AnnaBridge	145:64910690c574	471
AnnaBridge	145:64910690c574	472	uint32_t LockLevel; /*!< Specifies the LOCK level parameters.
AnnaBridge	145:64910690c574	473	This parameter can be a value of @ref TIM_LL_EC_LOCKLEVEL
AnnaBridge	145:64910690c574	474
AnnaBridge	145:64910690c574	475	@note The LOCK bits can be written only once after the reset. Once the TIMx_BDTR register
AnnaBridge	145:64910690c574	476	has been written, their content is frozen until the next reset.*/
AnnaBridge	145:64910690c574	477
AnnaBridge	145:64910690c574	478	uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the
AnnaBridge	145:64910690c574	479	switching-on of the outputs.
AnnaBridge	145:64910690c574	480	This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF.
AnnaBridge	145:64910690c574	481
AnnaBridge	145:64910690c574	482	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetDeadTime()
AnnaBridge	145:64910690c574	483
AnnaBridge	145:64910690c574	484	@note This bit-field can not be modified as long as LOCK level 1, 2 or 3 has been programmed. */
AnnaBridge	145:64910690c574	485
AnnaBridge	145:64910690c574	486	uint16_t BreakState; /*!< Specifies whether the TIM Break input is enabled or not.
AnnaBridge	145:64910690c574	487	This parameter can be a value of @ref TIM_LL_EC_BREAK_ENABLE
AnnaBridge	145:64910690c574	488
AnnaBridge	145:64910690c574	489	This feature can be modified afterwards using unitary functions @ref LL_TIM_EnableBRK() or @ref LL_TIM_DisableBRK()
AnnaBridge	145:64910690c574	490
AnnaBridge	145:64910690c574	491	@note This bit-field can not be modified as long as LOCK level 1 has been programmed. */
AnnaBridge	145:64910690c574	492
AnnaBridge	145:64910690c574	493	uint32_t BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
AnnaBridge	145:64910690c574	494	This parameter can be a value of @ref TIM_LL_EC_BREAK_POLARITY
AnnaBridge	145:64910690c574	495
AnnaBridge	145:64910690c574	496	This feature can be modified afterwards using unitary function @ref LL_TIM_ConfigBRK()
AnnaBridge	145:64910690c574	497
AnnaBridge	145:64910690c574	498	@note This bit-field can not be modified as long as LOCK level 1 has been programmed. */
AnnaBridge	145:64910690c574	499
AnnaBridge	145:64910690c574	500	uint32_t BreakFilter; /*!< Specifies the TIM Break Filter.
AnnaBridge	145:64910690c574	501	This parameter can be a value of @ref TIM_LL_EC_BREAK_FILTER
AnnaBridge	145:64910690c574	502
AnnaBridge	145:64910690c574	503	This feature can be modified afterwards using unitary function @ref LL_TIM_ConfigBRK()
AnnaBridge	145:64910690c574	504
AnnaBridge	145:64910690c574	505	@note This bit-field can not be modified as long as LOCK level 1 has been programmed. */
AnnaBridge	145:64910690c574	506
AnnaBridge	145:64910690c574	507	uint32_t Break2State; /*!< Specifies whether the TIM Break2 input is enabled or not.
AnnaBridge	145:64910690c574	508	This parameter can be a value of @ref TIM_LL_EC_BREAK2_ENABLE
AnnaBridge	145:64910690c574	509
AnnaBridge	145:64910690c574	510	This feature can be modified afterwards using unitary functions @ref LL_TIM_EnableBRK2() or @ref LL_TIM_DisableBRK2()
AnnaBridge	145:64910690c574	511
AnnaBridge	145:64910690c574	512	@note This bit-field can not be modified as long as LOCK level 1 has been programmed. */
AnnaBridge	145:64910690c574	513
AnnaBridge	145:64910690c574	514	uint32_t Break2Polarity; /*!< Specifies the TIM Break2 Input pin polarity.
AnnaBridge	145:64910690c574	515	This parameter can be a value of @ref TIM_LL_EC_BREAK2_POLARITY
AnnaBridge	145:64910690c574	516
AnnaBridge	145:64910690c574	517	This feature can be modified afterwards using unitary function @ref LL_TIM_ConfigBRK2()
AnnaBridge	145:64910690c574	518
AnnaBridge	145:64910690c574	519	@note This bit-field can not be modified as long as LOCK level 1 has been programmed. */
AnnaBridge	145:64910690c574	520
AnnaBridge	145:64910690c574	521	uint32_t Break2Filter; /*!< Specifies the TIM Break2 Filter.
AnnaBridge	145:64910690c574	522	This parameter can be a value of @ref TIM_LL_EC_BREAK2_FILTER
AnnaBridge	145:64910690c574	523
AnnaBridge	145:64910690c574	524	This feature can be modified afterwards using unitary function @ref LL_TIM_ConfigBRK2()
AnnaBridge	145:64910690c574	525
AnnaBridge	145:64910690c574	526	@note This bit-field can not be modified as long as LOCK level 1 has been programmed. */
AnnaBridge	145:64910690c574	527
AnnaBridge	145:64910690c574	528	uint32_t AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not.
AnnaBridge	145:64910690c574	529	This parameter can be a value of @ref TIM_LL_EC_AUTOMATICOUTPUT_ENABLE
AnnaBridge	145:64910690c574	530
AnnaBridge	145:64910690c574	531	This feature can be modified afterwards using unitary functions @ref LL_TIM_EnableAutomaticOutput() or @ref LL_TIM_DisableAutomaticOutput()
AnnaBridge	145:64910690c574	532
AnnaBridge	145:64910690c574	533	@note This bit-field can not be modified as long as LOCK level 1 has been programmed. */
AnnaBridge	145:64910690c574	534	} LL_TIM_BDTR_InitTypeDef;
AnnaBridge	145:64910690c574	535
Kojto	122:f9eeca106725	536	/**
Kojto	122:f9eeca106725	537	* @}
Kojto	122:f9eeca106725	538	*/
Kojto	122:f9eeca106725	539	#endif /* USE_FULL_LL_DRIVER */
Kojto	122:f9eeca106725	540
Kojto	122:f9eeca106725	541	/* Exported constants --------------------------------------------------------*/
Kojto	122:f9eeca106725	542	/** @defgroup TIM_LL_Exported_Constants TIM Exported Constants
Kojto	122:f9eeca106725	543	* @{
Kojto	122:f9eeca106725	544	*/
AnnaBridge	145:64910690c574	545
Kojto	122:f9eeca106725	546	/** @defgroup TIM_LL_EC_GET_FLAG Get Flags Defines
Kojto	122:f9eeca106725	547	* @brief Flags defines which can be used with LL_TIM_ReadReg function.
Kojto	122:f9eeca106725	548	* @{
Kojto	122:f9eeca106725	549	*/
Kojto	122:f9eeca106725	550	#define LL_TIM_SR_UIF TIM_SR_UIF /!< Update interrupt flag /
Kojto	122:f9eeca106725	551	#define LL_TIM_SR_CC1IF TIM_SR_CC1IF /!< Capture/compare 1 interrupt flag /
Kojto	122:f9eeca106725	552	#define LL_TIM_SR_CC2IF TIM_SR_CC2IF /!< Capture/compare 2 interrupt flag /
Kojto	122:f9eeca106725	553	#define LL_TIM_SR_CC3IF TIM_SR_CC3IF /!< Capture/compare 3 interrupt flag /
Kojto	122:f9eeca106725	554	#define LL_TIM_SR_CC4IF TIM_SR_CC4IF /!< Capture/compare 4 interrupt flag /
Kojto	122:f9eeca106725	555	#define LL_TIM_SR_CC5IF TIM_SR_CC5IF /!< Capture/compare 5 interrupt flag /
Kojto	122:f9eeca106725	556	#define LL_TIM_SR_CC6IF TIM_SR_CC6IF /!< Capture/compare 6 interrupt flag /
Kojto	122:f9eeca106725	557	#define LL_TIM_SR_COMIF TIM_SR_COMIF /!< COM interrupt flag /
Kojto	122:f9eeca106725	558	#define LL_TIM_SR_TIF TIM_SR_TIF /!< Trigger interrupt flag /
Kojto	122:f9eeca106725	559	#define LL_TIM_SR_BIF TIM_SR_BIF /!< Break interrupt flag /
Kojto	122:f9eeca106725	560	#define LL_TIM_SR_B2IF TIM_SR_B2IF /!< Second break interrupt flag /
Kojto	122:f9eeca106725	561	#define LL_TIM_SR_CC1OF TIM_SR_CC1OF /!< Capture/Compare 1 overcapture flag /
Kojto	122:f9eeca106725	562	#define LL_TIM_SR_CC2OF TIM_SR_CC2OF /!< Capture/Compare 2 overcapture flag /
Kojto	122:f9eeca106725	563	#define LL_TIM_SR_CC3OF TIM_SR_CC3OF /!< Capture/Compare 3 overcapture flag /
Kojto	122:f9eeca106725	564	#define LL_TIM_SR_CC4OF TIM_SR_CC4OF /!< Capture/Compare 4 overcapture flag /
Kojto	122:f9eeca106725	565	#define LL_TIM_SR_SBIF TIM_SR_SBIF /!< System Break interrupt flag /
Kojto	122:f9eeca106725	566	/**
Kojto	122:f9eeca106725	567	* @}
Kojto	122:f9eeca106725	568	*/
Kojto	122:f9eeca106725	569
AnnaBridge	145:64910690c574	570	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	145:64910690c574	571	/** @defgroup TIM_LL_EC_BREAK_ENABLE Break Enable
AnnaBridge	145:64910690c574	572	* @{
AnnaBridge	145:64910690c574	573	*/
AnnaBridge	145:64910690c574	574	#define LL_TIM_BREAK_DISABLE 0x00000000U /!< Break function disabled /
AnnaBridge	145:64910690c574	575	#define LL_TIM_BREAK_ENABLE TIM_BDTR_BKE /!< Break function enabled /
AnnaBridge	145:64910690c574	576	/**
AnnaBridge	145:64910690c574	577	* @}
AnnaBridge	145:64910690c574	578	*/
AnnaBridge	145:64910690c574	579
AnnaBridge	145:64910690c574	580	/** @defgroup TIM_LL_EC_BREAK2_ENABLE Break2 Enable
AnnaBridge	145:64910690c574	581	* @{
AnnaBridge	145:64910690c574	582	*/
AnnaBridge	145:64910690c574	583	#define LL_TIM_BREAK2_DISABLE 0x00000000U /!< Break2 function disabled /
AnnaBridge	145:64910690c574	584	#define LL_TIM_BREAK2_ENABLE TIM_BDTR_BK2E /!< Break2 function enabled /
AnnaBridge	145:64910690c574	585	/**
AnnaBridge	145:64910690c574	586	* @}
AnnaBridge	145:64910690c574	587	*/
AnnaBridge	145:64910690c574	588
AnnaBridge	145:64910690c574	589	/** @defgroup TIM_LL_EC_AUTOMATICOUTPUT_ENABLE Automatic output enable
AnnaBridge	145:64910690c574	590	* @{
AnnaBridge	145:64910690c574	591	*/
AnnaBridge	145:64910690c574	592	#define LL_TIM_AUTOMATICOUTPUT_DISABLE 0x00000000U /!< MOE can be set only by software /
AnnaBridge	145:64910690c574	593	#define LL_TIM_AUTOMATICOUTPUT_ENABLE TIM_BDTR_AOE /!< MOE can be set by software or automatically at the next update event /
AnnaBridge	145:64910690c574	594	/**
AnnaBridge	145:64910690c574	595	* @}
AnnaBridge	145:64910690c574	596	*/
AnnaBridge	145:64910690c574	597	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	145:64910690c574	598
Kojto	122:f9eeca106725	599	/** @defgroup TIM_LL_EC_IT IT Defines
Kojto	122:f9eeca106725	600	* @brief IT defines which can be used with LL_TIM_ReadReg and LL_TIM_WriteReg functions.
Kojto	122:f9eeca106725	601	* @{
Kojto	122:f9eeca106725	602	*/
Kojto	122:f9eeca106725	603	#define LL_TIM_DIER_UIE TIM_DIER_UIE /!< Update interrupt enable /
Kojto	122:f9eeca106725	604	#define LL_TIM_DIER_CC1IE TIM_DIER_CC1IE /!< Capture/compare 1 interrupt enable /
Kojto	122:f9eeca106725	605	#define LL_TIM_DIER_CC2IE TIM_DIER_CC2IE /!< Capture/compare 2 interrupt enable /
Kojto	122:f9eeca106725	606	#define LL_TIM_DIER_CC3IE TIM_DIER_CC3IE /!< Capture/compare 3 interrupt enable /
Kojto	122:f9eeca106725	607	#define LL_TIM_DIER_CC4IE TIM_DIER_CC4IE /!< Capture/compare 4 interrupt enable /
Kojto	122:f9eeca106725	608	#define LL_TIM_DIER_COMIE TIM_DIER_COMIE /!< COM interrupt enable /
Kojto	122:f9eeca106725	609	#define LL_TIM_DIER_TIE TIM_DIER_TIE /!< Trigger interrupt enable /
Kojto	122:f9eeca106725	610	#define LL_TIM_DIER_BIE TIM_DIER_BIE /!< Break interrupt enable /
Kojto	122:f9eeca106725	611	/**
Kojto	122:f9eeca106725	612	* @}
Kojto	122:f9eeca106725	613	*/
Kojto	122:f9eeca106725	614
Kojto	122:f9eeca106725	615	/** @defgroup TIM_LL_EC_UPDATESOURCE Update Source
Kojto	122:f9eeca106725	616	* @{
Kojto	122:f9eeca106725	617	*/
AnnaBridge	145:64910690c574	618	#define LL_TIM_UPDATESOURCE_REGULAR 0x00000000U /!< Counter overflow/underflow, Setting the UG bit or Update generation through the slave mode controller generates an update request /
AnnaBridge	145:64910690c574	619	#define LL_TIM_UPDATESOURCE_COUNTER TIM_CR1_URS /!< Only counter overflow/underflow generates an update request /
Kojto	122:f9eeca106725	620	/**
Kojto	122:f9eeca106725	621	* @}
Kojto	122:f9eeca106725	622	*/
Kojto	122:f9eeca106725	623
Kojto	122:f9eeca106725	624	/** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode
Kojto	122:f9eeca106725	625	* @{
Kojto	122:f9eeca106725	626	*/
AnnaBridge	145:64910690c574	627	#define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /!< Counter is not stopped at update event /
AnnaBridge	145:64910690c574	628	#define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /!< Counter stops counting at the next update event /
Kojto	122:f9eeca106725	629	/**
Kojto	122:f9eeca106725	630	* @}
Kojto	122:f9eeca106725	631	*/
Kojto	122:f9eeca106725	632
Kojto	122:f9eeca106725	633	/** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode
Kojto	122:f9eeca106725	634	* @{
Kojto	122:f9eeca106725	635	*/
AnnaBridge	145:64910690c574	636	#define LL_TIM_COUNTERMODE_UP 0x00000000U /!<Counter used as upcounter /
AnnaBridge	145:64910690c574	637	#define LL_TIM_COUNTERMODE_DOWN TIM_CR1_DIR /!< Counter used as downcounter /
AnnaBridge	145:64910690c574	638	#define LL_TIM_COUNTERMODE_CENTER_UP TIM_CR1_CMS_0 /!< The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting down. /
AnnaBridge	145:64910690c574	639	#define LL_TIM_COUNTERMODE_CENTER_DOWN TIM_CR1_CMS_1 /!<The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up /
AnnaBridge	145:64910690c574	640	#define LL_TIM_COUNTERMODE_CENTER_UP_DOWN TIM_CR1_CMS /!< The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up or down. /
Kojto	122:f9eeca106725	641	/**
Kojto	122:f9eeca106725	642	* @}
Kojto	122:f9eeca106725	643	*/
Kojto	122:f9eeca106725	644
Kojto	122:f9eeca106725	645	/** @defgroup TIM_LL_EC_CLOCKDIVISION Clock Division
Kojto	122:f9eeca106725	646	* @{
Kojto	122:f9eeca106725	647	*/
AnnaBridge	145:64910690c574	648	#define LL_TIM_CLOCKDIVISION_DIV1 0x00000000U /!< tDTS=tCK_INT /
AnnaBridge	145:64910690c574	649	#define LL_TIM_CLOCKDIVISION_DIV2 TIM_CR1_CKD_0 /!< tDTS=2tCK_INT */
AnnaBridge	145:64910690c574	650	#define LL_TIM_CLOCKDIVISION_DIV4 TIM_CR1_CKD_1 /!< tDTS=4tCK_INT */
Kojto	122:f9eeca106725	651	/**
Kojto	122:f9eeca106725	652	* @}
Kojto	122:f9eeca106725	653	*/
Kojto	122:f9eeca106725	654
Kojto	122:f9eeca106725	655	/** @defgroup TIM_LL_EC_COUNTERDIRECTION Counter Direction
Kojto	122:f9eeca106725	656	* @{
Kojto	122:f9eeca106725	657	*/
AnnaBridge	145:64910690c574	658	#define LL_TIM_COUNTERDIRECTION_UP 0x00000000U /!< Timer counter counts up /
AnnaBridge	145:64910690c574	659	#define LL_TIM_COUNTERDIRECTION_DOWN TIM_CR1_DIR /!< Timer counter counts down /
Kojto	122:f9eeca106725	660	/**
Kojto	122:f9eeca106725	661	* @}
Kojto	122:f9eeca106725	662	*/
Kojto	122:f9eeca106725	663
Kojto	122:f9eeca106725	664	/** @defgroup TIM_LL_EC_CCUPDATESOURCE Capture Compare Update Source
Kojto	122:f9eeca106725	665	* @{
Kojto	122:f9eeca106725	666	*/
AnnaBridge	145:64910690c574	667	#define LL_TIM_CCUPDATESOURCE_COMG_ONLY 0x00000000U /!< Capture/compare control bits are updated by setting the COMG bit only /
AnnaBridge	145:64910690c574	668	#define LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI TIM_CR2_CCUS /!< Capture/compare control bits are updated by setting the COMG bit or when a rising edge occurs on trigger input (TRGI) /
Kojto	122:f9eeca106725	669	/**
Kojto	122:f9eeca106725	670	* @}
Kojto	122:f9eeca106725	671	*/
Kojto	122:f9eeca106725	672
Kojto	122:f9eeca106725	673	/** @defgroup TIM_LL_EC_CCDMAREQUEST Capture Compare DMA Request
Kojto	122:f9eeca106725	674	* @{
Kojto	122:f9eeca106725	675	*/
AnnaBridge	145:64910690c574	676	#define LL_TIM_CCDMAREQUEST_CC 0x00000000U /!< CCx DMA request sent when CCx event occurs /
AnnaBridge	145:64910690c574	677	#define LL_TIM_CCDMAREQUEST_UPDATE TIM_CR2_CCDS /!< CCx DMA requests sent when update event occurs /
Kojto	122:f9eeca106725	678	/**
Kojto	122:f9eeca106725	679	* @}
Kojto	122:f9eeca106725	680	*/
Kojto	122:f9eeca106725	681
Kojto	122:f9eeca106725	682	/** @defgroup TIM_LL_EC_LOCKLEVEL Lock Level
Kojto	122:f9eeca106725	683	* @{
Kojto	122:f9eeca106725	684	*/
AnnaBridge	145:64910690c574	685	#define LL_TIM_LOCKLEVEL_OFF 0x00000000U /!< LOCK OFF - No bit is write protected /
AnnaBridge	145:64910690c574	686	#define LL_TIM_LOCKLEVEL_1 TIM_BDTR_LOCK_0 /!< LOCK Level 1 /
AnnaBridge	145:64910690c574	687	#define LL_TIM_LOCKLEVEL_2 TIM_BDTR_LOCK_1 /!< LOCK Level 2 /
AnnaBridge	145:64910690c574	688	#define LL_TIM_LOCKLEVEL_3 TIM_BDTR_LOCK /!< LOCK Level 3 /
Kojto	122:f9eeca106725	689	/**
Kojto	122:f9eeca106725	690	* @}
Kojto	122:f9eeca106725	691	*/
Kojto	122:f9eeca106725	692
Kojto	122:f9eeca106725	693	/** @defgroup TIM_LL_EC_CHANNEL Channel
Kojto	122:f9eeca106725	694	* @{
Kojto	122:f9eeca106725	695	*/
Kojto	122:f9eeca106725	696	#define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /!< Timer input/output channel 1 /
Kojto	122:f9eeca106725	697	#define LL_TIM_CHANNEL_CH1N TIM_CCER_CC1NE /!< Timer complementary output channel 1 /
Kojto	122:f9eeca106725	698	#define LL_TIM_CHANNEL_CH2 TIM_CCER_CC2E /!< Timer input/output channel 2 /
Kojto	122:f9eeca106725	699	#define LL_TIM_CHANNEL_CH2N TIM_CCER_CC2NE /!< Timer complementary output channel 2 /
Kojto	122:f9eeca106725	700	#define LL_TIM_CHANNEL_CH3 TIM_CCER_CC3E /!< Timer input/output channel 3 /
Kojto	122:f9eeca106725	701	#define LL_TIM_CHANNEL_CH3N TIM_CCER_CC3NE /!< Timer complementary output channel 3 /
Kojto	122:f9eeca106725	702	#define LL_TIM_CHANNEL_CH4 TIM_CCER_CC4E /!< Timer input/output channel 4 /
Kojto	122:f9eeca106725	703	#define LL_TIM_CHANNEL_CH5 TIM_CCER_CC5E /!< Timer output channel 5 /
Kojto	122:f9eeca106725	704	#define LL_TIM_CHANNEL_CH6 TIM_CCER_CC6E /!< Timer output channel 6 /
Kojto	122:f9eeca106725	705	/**
Kojto	122:f9eeca106725	706	* @}
Kojto	122:f9eeca106725	707	*/
Kojto	122:f9eeca106725	708
Kojto	122:f9eeca106725	709	#if defined(USE_FULL_LL_DRIVER)
Kojto	122:f9eeca106725	710	/** @defgroup TIM_LL_EC_OCSTATE Output Configuration State
Kojto	122:f9eeca106725	711	* @{
Kojto	122:f9eeca106725	712	*/
AnnaBridge	145:64910690c574	713	#define LL_TIM_OCSTATE_DISABLE 0x00000000U /!< OCx is not active /
AnnaBridge	145:64910690c574	714	#define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /!< OCx signal is output on the corresponding output pin /
Kojto	122:f9eeca106725	715	/**
Kojto	122:f9eeca106725	716	* @}
Kojto	122:f9eeca106725	717	*/
Kojto	122:f9eeca106725	718	#endif /* USE_FULL_LL_DRIVER */
Kojto	122:f9eeca106725	719
Kojto	122:f9eeca106725	720	/** @defgroup TIM_LL_EC_OCMODE Output Configuration Mode
Kojto	122:f9eeca106725	721	* @{
Kojto	122:f9eeca106725	722	*/
AnnaBridge	145:64910690c574	723	#define LL_TIM_OCMODE_FROZEN 0x00000000U /!<The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the output channel level /
AnnaBridge	145:64910690c574	724	#define LL_TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0 /!<OCyREF is forced high on compare match/
AnnaBridge	145:64910690c574	725	#define LL_TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1 /!<OCyREF is forced low on compare match/
AnnaBridge	145:64910690c574	726	#define LL_TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0) /!<OCyREF toggles on compare match/
AnnaBridge	145:64910690c574	727	#define LL_TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2 /!<OCyREF is forced low/
AnnaBridge	145:64910690c574	728	#define LL_TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_0) /!<OCyREF is forced high/
AnnaBridge	145:64910690c574	729	#define LL_TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1) /!<In upcounting, channel y is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel y is inactive as long as TIMx_CNT>TIMx_CCRy else active./
AnnaBridge	145:64910690c574	730	#define LL_TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0) /!<In upcounting, channel y is inactive as long as TIMx_CNT<TIMx_CCRy else active. In downcounting, channel y is active as long as TIMx_CNT>TIMx_CCRy else inactive/
AnnaBridge	145:64910690c574	731	#define LL_TIM_OCMODE_RETRIG_OPM1 TIM_CCMR1_OC1M_3 /!<Retrigerrable OPM mode 1/
AnnaBridge	145:64910690c574	732	#define LL_TIM_OCMODE_RETRIG_OPM2 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_0) /!<Retrigerrable OPM mode 2/
AnnaBridge	145:64910690c574	733	#define LL_TIM_OCMODE_COMBINED_PWM1 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_2) /!<Combined PWM mode 1/
AnnaBridge	145:64910690c574	734	#define LL_TIM_OCMODE_COMBINED_PWM2 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_0 \| TIM_CCMR1_OC1M_2) /!<Combined PWM mode 2/
AnnaBridge	145:64910690c574	735	#define LL_TIM_OCMODE_ASSYMETRIC_PWM1 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_2) /!<Asymmetric PWM mode 1/
AnnaBridge	145:64910690c574	736	#define LL_TIM_OCMODE_ASSYMETRIC_PWM2 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M) /!<Asymmetric PWM mode 2/
Kojto	122:f9eeca106725	737	/**
Kojto	122:f9eeca106725	738	* @}
Kojto	122:f9eeca106725	739	*/
Kojto	122:f9eeca106725	740
Kojto	122:f9eeca106725	741	/** @defgroup TIM_LL_EC_OCPOLARITY Output Configuration Polarity
Kojto	122:f9eeca106725	742	* @{
Kojto	122:f9eeca106725	743	*/
AnnaBridge	145:64910690c574	744	#define LL_TIM_OCPOLARITY_HIGH 0x00000000U /!< OCxactive high/
AnnaBridge	145:64910690c574	745	#define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /!< OCxactive low/
Kojto	122:f9eeca106725	746	/**
Kojto	122:f9eeca106725	747	* @}
Kojto	122:f9eeca106725	748	*/
Kojto	122:f9eeca106725	749
Kojto	122:f9eeca106725	750	/** @defgroup TIM_LL_EC_OCIDLESTATE Output Configuration Idle State
Kojto	122:f9eeca106725	751	* @{
Kojto	122:f9eeca106725	752	*/
AnnaBridge	145:64910690c574	753	#define LL_TIM_OCIDLESTATE_LOW 0x00000000U /!<OCx=0 (after a dead-time if OC is implemented) when MOE=0/
AnnaBridge	145:64910690c574	754	#define LL_TIM_OCIDLESTATE_HIGH TIM_CR2_OIS1 /!<OCx=1 (after a dead-time if OC is implemented) when MOE=0/
Kojto	122:f9eeca106725	755	/**
Kojto	122:f9eeca106725	756	* @}
Kojto	122:f9eeca106725	757	*/
Kojto	122:f9eeca106725	758
Kojto	122:f9eeca106725	759	/** @defgroup TIM_LL_EC_GROUPCH5 GROUPCH5
Kojto	122:f9eeca106725	760	* @{
Kojto	122:f9eeca106725	761	*/
AnnaBridge	145:64910690c574	762	#define LL_TIM_GROUPCH5_NONE 0x00000000U /!< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC /
Kojto	122:f9eeca106725	763	#define LL_TIM_GROUPCH5_OC1REFC TIM_CCR5_GC5C1 /!< OC1REFC is the logical AND of OC1REFC and OC5REF /
Kojto	122:f9eeca106725	764	#define LL_TIM_GROUPCH5_OC2REFC TIM_CCR5_GC5C2 /!< OC2REFC is the logical AND of OC2REFC and OC5REF /
Kojto	122:f9eeca106725	765	#define LL_TIM_GROUPCH5_OC3REFC TIM_CCR5_GC5C3 /!< OC3REFC is the logical AND of OC3REFC and OC5REF /
Kojto	122:f9eeca106725	766	/**
Kojto	122:f9eeca106725	767	* @}
Kojto	122:f9eeca106725	768	*/
Kojto	122:f9eeca106725	769
Kojto	122:f9eeca106725	770	/** @defgroup TIM_LL_EC_ACTIVEINPUT Active Input Selection
Kojto	122:f9eeca106725	771	* @{
Kojto	122:f9eeca106725	772	*/
AnnaBridge	145:64910690c574	773	#define LL_TIM_ACTIVEINPUT_DIRECTTI (TIM_CCMR1_CC1S_0 << 16U) /!< ICx is mapped on TIx /
AnnaBridge	145:64910690c574	774	#define LL_TIM_ACTIVEINPUT_INDIRECTTI (TIM_CCMR1_CC1S_1 << 16U) /!< ICx is mapped on TIy /
AnnaBridge	145:64910690c574	775	#define LL_TIM_ACTIVEINPUT_TRC (TIM_CCMR1_CC1S << 16U) /!< ICx is mapped on TRC /
Kojto	122:f9eeca106725	776	/**
Kojto	122:f9eeca106725	777	* @}
Kojto	122:f9eeca106725	778	*/
Kojto	122:f9eeca106725	779
Kojto	122:f9eeca106725	780	/** @defgroup TIM_LL_EC_ICPSC Input Configuration Prescaler
Kojto	122:f9eeca106725	781	* @{
Kojto	122:f9eeca106725	782	*/
AnnaBridge	145:64910690c574	783	#define LL_TIM_ICPSC_DIV1 0x00000000U /!< No prescaler, capture is done each time an edge is detected on the capture input /
AnnaBridge	145:64910690c574	784	#define LL_TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0 << 16U) /!< Capture is done once every 2 events /
AnnaBridge	145:64910690c574	785	#define LL_TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1 << 16U) /!< Capture is done once every 4 events /
AnnaBridge	145:64910690c574	786	#define LL_TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC << 16U) /!< Capture is done once every 8 events /
Kojto	122:f9eeca106725	787	/**
Kojto	122:f9eeca106725	788	* @}
Kojto	122:f9eeca106725	789	*/
Kojto	122:f9eeca106725	790
Kojto	122:f9eeca106725	791	/** @defgroup TIM_LL_EC_IC_FILTER Input Configuration Filter
Kojto	122:f9eeca106725	792	* @{
Kojto	122:f9eeca106725	793	*/
AnnaBridge	145:64910690c574	794	#define LL_TIM_IC_FILTER_FDIV1 0x00000000U /!< No filter, sampling is done at fDTS /
AnnaBridge	145:64910690c574	795	#define LL_TIM_IC_FILTER_FDIV1_N2 (TIM_CCMR1_IC1F_0 << 16U) /!< fSAMPLING=fCK_INT, N=2 /
AnnaBridge	145:64910690c574	796	#define LL_TIM_IC_FILTER_FDIV1_N4 (TIM_CCMR1_IC1F_1 << 16U) /!< fSAMPLING=fCK_INT, N=4 /
AnnaBridge	145:64910690c574	797	#define LL_TIM_IC_FILTER_FDIV1_N8 ((TIM_CCMR1_IC1F_1 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fCK_INT, N=8 /
AnnaBridge	145:64910690c574	798	#define LL_TIM_IC_FILTER_FDIV2_N6 (TIM_CCMR1_IC1F_2 << 16U) /!< fSAMPLING=fDTS/2, N=6 /
AnnaBridge	145:64910690c574	799	#define LL_TIM_IC_FILTER_FDIV2_N8 ((TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/2, N=8 /
AnnaBridge	145:64910690c574	800	#define LL_TIM_IC_FILTER_FDIV4_N6 ((TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_1) << 16U) /!< fSAMPLING=fDTS/4, N=6 /
AnnaBridge	145:64910690c574	801	#define LL_TIM_IC_FILTER_FDIV4_N8 ((TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_1 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/4, N=8 /
AnnaBridge	145:64910690c574	802	#define LL_TIM_IC_FILTER_FDIV8_N6 (TIM_CCMR1_IC1F_3 << 16U) /!< fSAMPLING=fDTS/8, N=6 /
AnnaBridge	145:64910690c574	803	#define LL_TIM_IC_FILTER_FDIV8_N8 ((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/8, N=8 /
AnnaBridge	145:64910690c574	804	#define LL_TIM_IC_FILTER_FDIV16_N5 ((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_1) << 16U) /!< fSAMPLING=fDTS/16, N=5 /
AnnaBridge	145:64910690c574	805	#define LL_TIM_IC_FILTER_FDIV16_N6 ((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_1 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/16, N=6 /
AnnaBridge	145:64910690c574	806	#define LL_TIM_IC_FILTER_FDIV16_N8 ((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_2) << 16U) /!< fSAMPLING=fDTS/16, N=8 /
AnnaBridge	145:64910690c574	807	#define LL_TIM_IC_FILTER_FDIV32_N5 ((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/32, N=5 /
AnnaBridge	145:64910690c574	808	#define LL_TIM_IC_FILTER_FDIV32_N6 ((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_1) << 16U) /!< fSAMPLING=fDTS/32, N=6 /
AnnaBridge	145:64910690c574	809	#define LL_TIM_IC_FILTER_FDIV32_N8 (TIM_CCMR1_IC1F << 16U) /!< fSAMPLING=fDTS/32, N=8 /
Kojto	122:f9eeca106725	810	/**
Kojto	122:f9eeca106725	811	* @}
Kojto	122:f9eeca106725	812	*/
Kojto	122:f9eeca106725	813
Kojto	122:f9eeca106725	814	/** @defgroup TIM_LL_EC_IC_POLARITY Input Configuration Polarity
Kojto	122:f9eeca106725	815	* @{
Kojto	122:f9eeca106725	816	*/
AnnaBridge	145:64910690c574	817	#define LL_TIM_IC_POLARITY_RISING 0x00000000U /!< The circuit is sensitive to TIxFP1 rising edge, TIxFP1 is not inverted /
AnnaBridge	145:64910690c574	818	#define LL_TIM_IC_POLARITY_FALLING TIM_CCER_CC1P /!< The circuit is sensitive to TIxFP1 falling edge, TIxFP1 is inverted /
AnnaBridge	145:64910690c574	819	#define LL_TIM_IC_POLARITY_BOTHEDGE (TIM_CCER_CC1P \| TIM_CCER_CC1NP) /!< The circuit is sensitive to both TIxFP1 rising and falling edges, TIxFP1 is not inverted /
Kojto	122:f9eeca106725	820	/**
Kojto	122:f9eeca106725	821	* @}
Kojto	122:f9eeca106725	822	*/
Kojto	122:f9eeca106725	823
Kojto	122:f9eeca106725	824	/** @defgroup TIM_LL_EC_CLOCKSOURCE Clock Source
Kojto	122:f9eeca106725	825	* @{
Kojto	122:f9eeca106725	826	*/
AnnaBridge	145:64910690c574	827	#define LL_TIM_CLOCKSOURCE_INTERNAL 0x00000000U /!< The timer is clocked by the internal clock provided from the RCC /
AnnaBridge	145:64910690c574	828	#define LL_TIM_CLOCKSOURCE_EXT_MODE1 (TIM_SMCR_SMS_2 \| TIM_SMCR_SMS_1 \| TIM_SMCR_SMS_0) /!< Counter counts at each rising or falling edge on a selected inpu t/
AnnaBridge	145:64910690c574	829	#define LL_TIM_CLOCKSOURCE_EXT_MODE2 TIM_SMCR_ECE /!< Counter counts at each rising or falling edge on the external trigger input ETR /
Kojto	122:f9eeca106725	830	/**
Kojto	122:f9eeca106725	831	* @}
Kojto	122:f9eeca106725	832	*/
Kojto	122:f9eeca106725	833
Kojto	122:f9eeca106725	834	/** @defgroup TIM_LL_EC_ENCODERMODE Encoder Mode
Kojto	122:f9eeca106725	835	* @{
Kojto	122:f9eeca106725	836	*/
AnnaBridge	145:64910690c574	837	#define LL_TIM_ENCODERMODE_X2_TI1 TIM_SMCR_SMS_0 /!< Encoder mode 1 - Counter counts up/down on TI2FP2 edge depending on TI1FP1 level /
AnnaBridge	145:64910690c574	838	#define LL_TIM_ENCODERMODE_X2_TI2 TIM_SMCR_SMS_1 /!< Encoder mode 2 - Counter counts up/down on TI1FP1 edge depending on TI2FP2 level /
Kojto	122:f9eeca106725	839	#define LL_TIM_ENCODERMODE_X4_TI12 (TIM_SMCR_SMS_1 \| TIM_SMCR_SMS_0) /!< Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input l /
Kojto	122:f9eeca106725	840	/**
Kojto	122:f9eeca106725	841	* @}
Kojto	122:f9eeca106725	842	*/
Kojto	122:f9eeca106725	843
Kojto	122:f9eeca106725	844	/** @defgroup TIM_LL_EC_TRGO Trigger Output
Kojto	122:f9eeca106725	845	* @{
Kojto	122:f9eeca106725	846	*/
AnnaBridge	145:64910690c574	847	#define LL_TIM_TRGO_RESET 0x00000000U /!< UG bit from the TIMx_EGR register is used as trigger output /
AnnaBridge	145:64910690c574	848	#define LL_TIM_TRGO_ENABLE TIM_CR2_MMS_0 /!< Counter Enable signal (CNT_EN) is used as trigger output /
AnnaBridge	145:64910690c574	849	#define LL_TIM_TRGO_UPDATE TIM_CR2_MMS_1 /!< Update event is used as trigger output /
AnnaBridge	145:64910690c574	850	#define LL_TIM_TRGO_CC1IF (TIM_CR2_MMS_1 \| TIM_CR2_MMS_0) /!< CC1 capture or a compare match is used as trigger output /
AnnaBridge	145:64910690c574	851	#define LL_TIM_TRGO_OC1REF TIM_CR2_MMS_2 /!< OC1REF signal is used as trigger output /
AnnaBridge	145:64910690c574	852	#define LL_TIM_TRGO_OC2REF (TIM_CR2_MMS_2 \| TIM_CR2_MMS_0) /!< OC2REF signal is used as trigger output /
AnnaBridge	145:64910690c574	853	#define LL_TIM_TRGO_OC3REF (TIM_CR2_MMS_2 \| TIM_CR2_MMS_1) /!< OC3REF signal is used as trigger output /
AnnaBridge	145:64910690c574	854	#define LL_TIM_TRGO_OC4REF (TIM_CR2_MMS_2 \| TIM_CR2_MMS_1 \| TIM_CR2_MMS_0) /!< OC4REF signal is used as trigger output /
Kojto	122:f9eeca106725	855	/**
Kojto	122:f9eeca106725	856	* @}
Kojto	122:f9eeca106725	857	*/
Kojto	122:f9eeca106725	858
Kojto	122:f9eeca106725	859	/** @defgroup TIM_LL_EC_TRGO2 Trigger Output 2
Kojto	122:f9eeca106725	860	* @{
Kojto	122:f9eeca106725	861	*/
AnnaBridge	145:64910690c574	862	#define LL_TIM_TRGO2_RESET 0x00000000U /!< UG bit from the TIMx_EGR register is used as trigger output 2 /
AnnaBridge	145:64910690c574	863	#define LL_TIM_TRGO2_ENABLE TIM_CR2_MMS2_0 /!< Counter Enable signal (CNT_EN) is used as trigger output 2 /
AnnaBridge	145:64910690c574	864	#define LL_TIM_TRGO2_UPDATE TIM_CR2_MMS2_1 /!< Update event is used as trigger output 2 /
AnnaBridge	145:64910690c574	865	#define LL_TIM_TRGO2_CC1F (TIM_CR2_MMS2_1 \| TIM_CR2_MMS2_0) /!< CC1 capture or a compare match is used as trigger output 2 /
AnnaBridge	145:64910690c574	866	#define LL_TIM_TRGO2_OC1 TIM_CR2_MMS2_2 /!< OC1REF signal is used as trigger output 2 /
AnnaBridge	145:64910690c574	867	#define LL_TIM_TRGO2_OC2 (TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_0) /!< OC2REF signal is used as trigger output 2 /
AnnaBridge	145:64910690c574	868	#define LL_TIM_TRGO2_OC3 (TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_1) /!< OC3REF signal is used as trigger output 2 /
AnnaBridge	145:64910690c574	869	#define LL_TIM_TRGO2_OC4 (TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_1 \| TIM_CR2_MMS2_0) /!< OC4REF signal is used as trigger output 2 /
AnnaBridge	145:64910690c574	870	#define LL_TIM_TRGO2_OC5 TIM_CR2_MMS2_3 /!< OC5REF signal is used as trigger output 2 /
AnnaBridge	145:64910690c574	871	#define LL_TIM_TRGO2_OC6 (TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_0) /!< OC6REF signal is used as trigger output 2 /
AnnaBridge	145:64910690c574	872	#define LL_TIM_TRGO2_OC4_RISINGFALLING (TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_1) /!< OC4REF rising or falling edges are used as trigger output 2 /
AnnaBridge	145:64910690c574	873	#define LL_TIM_TRGO2_OC6_RISINGFALLING (TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_1 \| TIM_CR2_MMS2_0) /!< OC6REF rising or falling edges are used as trigger output 2 /
AnnaBridge	145:64910690c574	874	#define LL_TIM_TRGO2_OC4_RISING_OC6_RISING (TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_2) /!< OC4REF or OC6REF rising edges are used as trigger output 2 /
AnnaBridge	145:64910690c574	875	#define LL_TIM_TRGO2_OC4_RISING_OC6_FALLING (TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_0) /!< OC4REF rising or OC6REF falling edges are used as trigger output 2 /
AnnaBridge	145:64910690c574	876	#define LL_TIM_TRGO2_OC5_RISING_OC6_RISING (TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_2 \|TIM_CR2_MMS2_1) /!< OC5REF or OC6REF rising edges are used as trigger output 2 /
AnnaBridge	145:64910690c574	877	#define LL_TIM_TRGO2_OC5_RISING_OC6_FALLING (TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_1 \| TIM_CR2_MMS2_0) /!< OC5REF rising or OC6REF falling edges are used as trigger output 2 /
Kojto	122:f9eeca106725	878	/**
Kojto	122:f9eeca106725	879	* @}
Kojto	122:f9eeca106725	880	*/
Kojto	122:f9eeca106725	881
Kojto	122:f9eeca106725	882	/** @defgroup TIM_LL_EC_SLAVEMODE Slave Mode
Kojto	122:f9eeca106725	883	* @{
Kojto	122:f9eeca106725	884	*/
AnnaBridge	145:64910690c574	885	#define LL_TIM_SLAVEMODE_DISABLED 0x00000000U /!< Slave mode disabled /
AnnaBridge	145:64910690c574	886	#define LL_TIM_SLAVEMODE_RESET TIM_SMCR_SMS_2 /!< Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter /
AnnaBridge	145:64910690c574	887	#define LL_TIM_SLAVEMODE_GATED (TIM_SMCR_SMS_2 \| TIM_SMCR_SMS_0) /!< Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high /
AnnaBridge	145:64910690c574	888	#define LL_TIM_SLAVEMODE_TRIGGER (TIM_SMCR_SMS_2 \| TIM_SMCR_SMS_1) /!< Trigger Mode - The counter starts at a rising edge of the trigger TRGI /
AnnaBridge	145:64910690c574	889	#define LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER TIM_SMCR_SMS_3 /!< Combined reset + trigger mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter, generates an update of the registers and starts the counter /
Kojto	122:f9eeca106725	890	/**
Kojto	122:f9eeca106725	891	* @}
Kojto	122:f9eeca106725	892	*/
Kojto	122:f9eeca106725	893
Kojto	122:f9eeca106725	894	/** @defgroup TIM_LL_EC_TS Trigger Selection
Kojto	122:f9eeca106725	895	* @{
Kojto	122:f9eeca106725	896	*/
AnnaBridge	145:64910690c574	897	#define LL_TIM_TS_ITR0 0x00000000U /!< Internal Trigger 0 (ITR0) is used as trigger input /
AnnaBridge	145:64910690c574	898	#define LL_TIM_TS_ITR1 TIM_SMCR_TS_0 /!< Internal Trigger 1 (ITR1) is used as trigger input /
AnnaBridge	145:64910690c574	899	#define LL_TIM_TS_ITR2 TIM_SMCR_TS_1 /!< Internal Trigger 2 (ITR2) is used as trigger input /
AnnaBridge	145:64910690c574	900	#define LL_TIM_TS_ITR3 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_1) /!< Internal Trigger 3 (ITR3) is used as trigger input /
AnnaBridge	145:64910690c574	901	#define LL_TIM_TS_TI1F_ED TIM_SMCR_TS_2 /!< TI1 Edge Detector (TI1F_ED) is used as trigger input /
AnnaBridge	145:64910690c574	902	#define LL_TIM_TS_TI1FP1 (TIM_SMCR_TS_2 \| TIM_SMCR_TS_0) /!< Filtered Timer Input 1 (TI1FP1) is used as trigger input /
AnnaBridge	145:64910690c574	903	#define LL_TIM_TS_TI2FP2 (TIM_SMCR_TS_2 \| TIM_SMCR_TS_1) /!< Filtered Timer Input 2 (TI12P2) is used as trigger input /
AnnaBridge	145:64910690c574	904	#define LL_TIM_TS_ETRF (TIM_SMCR_TS_2 \| TIM_SMCR_TS_1 \| TIM_SMCR_TS_0) /!< Filtered external Trigger (ETRF) is used as trigger input /
Kojto	122:f9eeca106725	905	/**
Kojto	122:f9eeca106725	906	* @}
Kojto	122:f9eeca106725	907	*/
Kojto	122:f9eeca106725	908
Kojto	122:f9eeca106725	909	/** @defgroup TIM_LL_EC_ETR_POLARITY External Trigger Polarity
Kojto	122:f9eeca106725	910	* @{
Kojto	122:f9eeca106725	911	*/
AnnaBridge	145:64910690c574	912	#define LL_TIM_ETR_POLARITY_NONINVERTED 0x00000000U /!< ETR is non-inverted, active at high level or rising edge /
AnnaBridge	145:64910690c574	913	#define LL_TIM_ETR_POLARITY_INVERTED TIM_SMCR_ETP /!< ETR is inverted, active at low level or falling edge /
Kojto	122:f9eeca106725	914	/**
Kojto	122:f9eeca106725	915	* @}
Kojto	122:f9eeca106725	916	*/
Kojto	122:f9eeca106725	917
Kojto	122:f9eeca106725	918	/** @defgroup TIM_LL_EC_ETR_PRESCALER External Trigger Prescaler
Kojto	122:f9eeca106725	919	* @{
Kojto	122:f9eeca106725	920	*/
AnnaBridge	145:64910690c574	921	#define LL_TIM_ETR_PRESCALER_DIV1 0x00000000U /!< ETR prescaler OFF /
AnnaBridge	145:64910690c574	922	#define LL_TIM_ETR_PRESCALER_DIV2 TIM_SMCR_ETPS_0 /!< ETR frequency is divided by 2 /
AnnaBridge	145:64910690c574	923	#define LL_TIM_ETR_PRESCALER_DIV4 TIM_SMCR_ETPS_1 /!< ETR frequency is divided by 4 /
AnnaBridge	145:64910690c574	924	#define LL_TIM_ETR_PRESCALER_DIV8 TIM_SMCR_ETPS /!< ETR frequency is divided by 8 /
Kojto	122:f9eeca106725	925	/**
Kojto	122:f9eeca106725	926	* @}
Kojto	122:f9eeca106725	927	*/
Kojto	122:f9eeca106725	928
Kojto	122:f9eeca106725	929	/** @defgroup TIM_LL_EC_ETR_FILTER External Trigger Filter
Kojto	122:f9eeca106725	930	* @{
Kojto	122:f9eeca106725	931	*/
AnnaBridge	145:64910690c574	932	#define LL_TIM_ETR_FILTER_FDIV1 0x00000000U /!< No filter, sampling is done at fDTS /
AnnaBridge	145:64910690c574	933	#define LL_TIM_ETR_FILTER_FDIV1_N2 TIM_SMCR_ETF_0 /!< fSAMPLING=fCK_INT, N=2 /
AnnaBridge	145:64910690c574	934	#define LL_TIM_ETR_FILTER_FDIV1_N4 TIM_SMCR_ETF_1 /!< fSAMPLING=fCK_INT, N=4 /
AnnaBridge	145:64910690c574	935	#define LL_TIM_ETR_FILTER_FDIV1_N8 (TIM_SMCR_ETF_1 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fCK_INT, N=8 /
AnnaBridge	145:64910690c574	936	#define LL_TIM_ETR_FILTER_FDIV2_N6 TIM_SMCR_ETF_2 /!< fSAMPLING=fDTS/2, N=6 /
AnnaBridge	145:64910690c574	937	#define LL_TIM_ETR_FILTER_FDIV2_N8 (TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/2, N=8 /
AnnaBridge	145:64910690c574	938	#define LL_TIM_ETR_FILTER_FDIV4_N6 (TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_1) /!< fSAMPLING=fDTS/4, N=6 /
AnnaBridge	145:64910690c574	939	#define LL_TIM_ETR_FILTER_FDIV4_N8 (TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_1 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/4, N=8 /
AnnaBridge	145:64910690c574	940	#define LL_TIM_ETR_FILTER_FDIV8_N6 TIM_SMCR_ETF_3 /!< fSAMPLING=fDTS/8, N=8 /
AnnaBridge	145:64910690c574	941	#define LL_TIM_ETR_FILTER_FDIV8_N8 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/16, N=5 /
AnnaBridge	145:64910690c574	942	#define LL_TIM_ETR_FILTER_FDIV16_N5 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_1) /!< fSAMPLING=fDTS/16, N=6 /
AnnaBridge	145:64910690c574	943	#define LL_TIM_ETR_FILTER_FDIV16_N6 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_1 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/16, N=8 /
AnnaBridge	145:64910690c574	944	#define LL_TIM_ETR_FILTER_FDIV16_N8 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_2) /!< fSAMPLING=fDTS/16, N=5 /
AnnaBridge	145:64910690c574	945	#define LL_TIM_ETR_FILTER_FDIV32_N5 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/32, N=5 /
AnnaBridge	145:64910690c574	946	#define LL_TIM_ETR_FILTER_FDIV32_N6 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_1) /!< fSAMPLING=fDTS/32, N=6 /
AnnaBridge	145:64910690c574	947	#define LL_TIM_ETR_FILTER_FDIV32_N8 TIM_SMCR_ETF /!< fSAMPLING=fDTS/32, N=8 /
Kojto	122:f9eeca106725	948	/**
Kojto	122:f9eeca106725	949	* @}
Kojto	122:f9eeca106725	950	*/
Kojto	122:f9eeca106725	951
Kojto	122:f9eeca106725	952	/** @defgroup TIM_LL_EC_ETRSOURCE External Trigger Source
Kojto	122:f9eeca106725	953	* @{
Kojto	122:f9eeca106725	954	*/
AnnaBridge	145:64910690c574	955	#define LL_TIM_ETRSOURCE_LEGACY 0x00000000U /!< ETR legacy mode /
AnnaBridge	145:64910690c574	956	#define LL_TIM_ETRSOURCE_COMP1 TIM1_OR2_ETRSEL_0 /!< COMP1 output connected to ETR input /
AnnaBridge	145:64910690c574	957	#define LL_TIM_ETRSOURCE_COMP2 TIM1_OR2_ETRSEL_1 /!< COMP2 output connected to ETR input /
Kojto	122:f9eeca106725	958	/**
Kojto	122:f9eeca106725	959	* @}
Kojto	122:f9eeca106725	960	*/
Kojto	122:f9eeca106725	961
Kojto	122:f9eeca106725	962	/** @defgroup TIM_LL_EC_BREAK_POLARITY break polarity
Kojto	122:f9eeca106725	963	* @{
Kojto	122:f9eeca106725	964	*/
AnnaBridge	145:64910690c574	965	#define LL_TIM_BREAK_POLARITY_LOW 0x00000000U /!< Break input BRK is active low /
AnnaBridge	145:64910690c574	966	#define LL_TIM_BREAK_POLARITY_HIGH TIM_BDTR_BKP /!< Break input BRK is active high /
Kojto	122:f9eeca106725	967	/**
Kojto	122:f9eeca106725	968	* @}
Kojto	122:f9eeca106725	969	*/
Kojto	122:f9eeca106725	970
Kojto	122:f9eeca106725	971	/** @defgroup TIM_LL_EC_BREAK_FILTER break filter
Kojto	122:f9eeca106725	972	* @{
Kojto	122:f9eeca106725	973	*/
AnnaBridge	145:64910690c574	974	#define LL_TIM_BREAK_FILTER_FDIV1 0x00000000U /!< No filter, BRK acts asynchronously /
AnnaBridge	145:64910690c574	975	#define LL_TIM_BREAK_FILTER_FDIV1_N2 0x00010000U /!< fSAMPLING=fCK_INT, N=2 /
AnnaBridge	145:64910690c574	976	#define LL_TIM_BREAK_FILTER_FDIV1_N4 0x00020000U /!< fSAMPLING=fCK_INT, N=4 /
AnnaBridge	145:64910690c574	977	#define LL_TIM_BREAK_FILTER_FDIV1_N8 0x00030000U /!< fSAMPLING=fCK_INT, N=8 /
AnnaBridge	145:64910690c574	978	#define LL_TIM_BREAK_FILTER_FDIV2_N6 0x00040000U /!< fSAMPLING=fDTS/2, N=6 /
AnnaBridge	145:64910690c574	979	#define LL_TIM_BREAK_FILTER_FDIV2_N8 0x00050000U /!< fSAMPLING=fDTS/2, N=8 /
AnnaBridge	145:64910690c574	980	#define LL_TIM_BREAK_FILTER_FDIV4_N6 0x00060000U /!< fSAMPLING=fDTS/4, N=6 /
AnnaBridge	145:64910690c574	981	#define LL_TIM_BREAK_FILTER_FDIV4_N8 0x00070000U /!< fSAMPLING=fDTS/4, N=8 /
AnnaBridge	145:64910690c574	982	#define LL_TIM_BREAK_FILTER_FDIV8_N6 0x00080000U /!< fSAMPLING=fDTS/8, N=6 /
AnnaBridge	145:64910690c574	983	#define LL_TIM_BREAK_FILTER_FDIV8_N8 0x00090000U /!< fSAMPLING=fDTS/8, N=8 /
AnnaBridge	145:64910690c574	984	#define LL_TIM_BREAK_FILTER_FDIV16_N5 0x000A0000U /!< fSAMPLING=fDTS/16, N=5 /
AnnaBridge	145:64910690c574	985	#define LL_TIM_BREAK_FILTER_FDIV16_N6 0x000B0000U /!< fSAMPLING=fDTS/16, N=6 /
AnnaBridge	145:64910690c574	986	#define LL_TIM_BREAK_FILTER_FDIV16_N8 0x000C0000U /!< fSAMPLING=fDTS/16, N=8 /
AnnaBridge	145:64910690c574	987	#define LL_TIM_BREAK_FILTER_FDIV32_N5 0x000D0000U /!< fSAMPLING=fDTS/32, N=5 /
AnnaBridge	145:64910690c574	988	#define LL_TIM_BREAK_FILTER_FDIV32_N6 0x000E0000U /!< fSAMPLING=fDTS/32, N=6 /
AnnaBridge	145:64910690c574	989	#define LL_TIM_BREAK_FILTER_FDIV32_N8 0x000F0000U /!< fSAMPLING=fDTS/32, N=8 /
Kojto	122:f9eeca106725	990	/**
Kojto	122:f9eeca106725	991	* @}
Kojto	122:f9eeca106725	992	*/
Kojto	122:f9eeca106725	993
Kojto	122:f9eeca106725	994	/** @defgroup TIM_LL_EC_BREAK2_POLARITY BREAK2 POLARITY
Kojto	122:f9eeca106725	995	* @{
Kojto	122:f9eeca106725	996	*/
AnnaBridge	145:64910690c574	997	#define LL_TIM_BREAK2_POLARITY_LOW 0x00000000U /!< Break input BRK2 is active low /
AnnaBridge	145:64910690c574	998	#define LL_TIM_BREAK2_POLARITY_HIGH TIM_BDTR_BK2P /!< Break input BRK2 is active high /
Kojto	122:f9eeca106725	999	/**
Kojto	122:f9eeca106725	1000	* @}
Kojto	122:f9eeca106725	1001	*/
Kojto	122:f9eeca106725	1002
Kojto	122:f9eeca106725	1003	/** @defgroup TIM_LL_EC_BREAK2_FILTER BREAK2 FILTER
Kojto	122:f9eeca106725	1004	* @{
Kojto	122:f9eeca106725	1005	*/
AnnaBridge	145:64910690c574	1006	#define LL_TIM_BREAK2_FILTER_FDIV1 0x00000000U /!< No filter, BRK acts asynchronously /
AnnaBridge	145:64910690c574	1007	#define LL_TIM_BREAK2_FILTER_FDIV1_N2 0x00100000U /!< fSAMPLING=fCK_INT, N=2 /
AnnaBridge	145:64910690c574	1008	#define LL_TIM_BREAK2_FILTER_FDIV1_N4 0x00200000U /!< fSAMPLING=fCK_INT, N=4 /
AnnaBridge	145:64910690c574	1009	#define LL_TIM_BREAK2_FILTER_FDIV1_N8 0x00300000U /!< fSAMPLING=fCK_INT, N=8 /
AnnaBridge	145:64910690c574	1010	#define LL_TIM_BREAK2_FILTER_FDIV2_N6 0x00400000U /!< fSAMPLING=fDTS/2, N=6 /
AnnaBridge	145:64910690c574	1011	#define LL_TIM_BREAK2_FILTER_FDIV2_N8 0x00500000U /!< fSAMPLING=fDTS/2, N=8 /
AnnaBridge	145:64910690c574	1012	#define LL_TIM_BREAK2_FILTER_FDIV4_N6 0x00600000U /!< fSAMPLING=fDTS/4, N=6 /
AnnaBridge	145:64910690c574	1013	#define LL_TIM_BREAK2_FILTER_FDIV4_N8 0x00700000U /!< fSAMPLING=fDTS/4, N=8 /
AnnaBridge	145:64910690c574	1014	#define LL_TIM_BREAK2_FILTER_FDIV8_N6 0x00800000U /!< fSAMPLING=fDTS/8, N=6 /
AnnaBridge	145:64910690c574	1015	#define LL_TIM_BREAK2_FILTER_FDIV8_N8 0x00900000U /!< fSAMPLING=fDTS/8, N=8 /
AnnaBridge	145:64910690c574	1016	#define LL_TIM_BREAK2_FILTER_FDIV16_N5 0x00A00000U /!< fSAMPLING=fDTS/16, N=5 /
AnnaBridge	145:64910690c574	1017	#define LL_TIM_BREAK2_FILTER_FDIV16_N6 0x00B00000U /!< fSAMPLING=fDTS/16, N=6 /
AnnaBridge	145:64910690c574	1018	#define LL_TIM_BREAK2_FILTER_FDIV16_N8 0x00C00000U /!< fSAMPLING=fDTS/16, N=8 /
AnnaBridge	145:64910690c574	1019	#define LL_TIM_BREAK2_FILTER_FDIV32_N5 0x00D00000U /!< fSAMPLING=fDTS/32, N=5 /
AnnaBridge	145:64910690c574	1020	#define LL_TIM_BREAK2_FILTER_FDIV32_N6 0x00E00000U /!< fSAMPLING=fDTS/32, N=6 /
AnnaBridge	145:64910690c574	1021	#define LL_TIM_BREAK2_FILTER_FDIV32_N8 0x00F00000U /!< fSAMPLING=fDTS/32, N=8 /
Kojto	122:f9eeca106725	1022	/**
Kojto	122:f9eeca106725	1023	* @}
Kojto	122:f9eeca106725	1024	*/
Kojto	122:f9eeca106725	1025
Kojto	122:f9eeca106725	1026	/** @defgroup TIM_LL_EC_OSSI OSSI
Kojto	122:f9eeca106725	1027	* @{
Kojto	122:f9eeca106725	1028	*/
AnnaBridge	145:64910690c574	1029	#define LL_TIM_OSSI_DISABLE 0x00000000U /!< When inactive, OCx/OCxN outputs are disabled /
AnnaBridge	145:64910690c574	1030	#define LL_TIM_OSSI_ENABLE TIM_BDTR_OSSI /!< When inactive, OxC/OCxN outputs are first forced with their inactive level then forced to their idle level after the deadtime /
Kojto	122:f9eeca106725	1031	/**
Kojto	122:f9eeca106725	1032	* @}
Kojto	122:f9eeca106725	1033	*/
Kojto	122:f9eeca106725	1034
Kojto	122:f9eeca106725	1035	/** @defgroup TIM_LL_EC_OSSR OSSR
Kojto	122:f9eeca106725	1036	* @{
Kojto	122:f9eeca106725	1037	*/
AnnaBridge	145:64910690c574	1038	#define LL_TIM_OSSR_DISABLE 0x00000000U /!< When inactive, OCx/OCxN outputs are disabled /
AnnaBridge	145:64910690c574	1039	#define LL_TIM_OSSR_ENABLE TIM_BDTR_OSSR /!< When inactive, OC/OCN outputs are enabled with their inactive level as soon as CCxE=1 or CCxNE=1 /
Kojto	122:f9eeca106725	1040	/**
Kojto	122:f9eeca106725	1041	* @}
Kojto	122:f9eeca106725	1042	*/
Kojto	122:f9eeca106725	1043
Kojto	122:f9eeca106725	1044	/** @defgroup TIM_LL_EC_BREAK_INPUT BREAK INPUT
Kojto	122:f9eeca106725	1045	* @{
Kojto	122:f9eeca106725	1046	*/
AnnaBridge	145:64910690c574	1047	#define LL_TIM_BREAK_INPUT_BKIN 0x00000000U /!< TIMx_BKIN input /
AnnaBridge	145:64910690c574	1048	#define LL_TIM_BREAK_INPUT_BKIN2 0x00000004U /!< TIMx_BKIN2 input /
Kojto	122:f9eeca106725	1049	/**
Kojto	122:f9eeca106725	1050	* @}
Kojto	122:f9eeca106725	1051	*/
Kojto	122:f9eeca106725	1052
Kojto	122:f9eeca106725	1053	/** @defgroup TIM_LL_EC_BKIN_SOURCE BKIN SOURCE
Kojto	122:f9eeca106725	1054	* @{
Kojto	122:f9eeca106725	1055	*/
AnnaBridge	145:64910690c574	1056	#define LL_TIM_BKIN_SOURCE_BKIN TIM1_OR2_BKINE /!< BKIN input from AF controller /
AnnaBridge	145:64910690c574	1057	#define LL_TIM_BKIN_SOURCE_BKCOMP1 TIM1_OR2_BKCMP1E /!< internal signal: COMP1 output /
AnnaBridge	145:64910690c574	1058	#define LL_TIM_BKIN_SOURCE_BKCOMP2 TIM1_OR2_BKCMP2E /!< internal signal: COMP2 output /
AnnaBridge	145:64910690c574	1059	#define LL_TIM_BKIN_SOURCE_DF1BK TIM1_OR2_BKDF1BK0E /!< internal signal: DFSDM1 break output /
Kojto	122:f9eeca106725	1060	/**
Kojto	122:f9eeca106725	1061	* @}
Kojto	122:f9eeca106725	1062	*/
Kojto	122:f9eeca106725	1063
Kojto	122:f9eeca106725	1064	/** @defgroup TIM_LL_EC_BKIN_POLARITY BKIN POLARITY
Kojto	122:f9eeca106725	1065	* @{
Kojto	122:f9eeca106725	1066	*/
AnnaBridge	145:64910690c574	1067	#define LL_TIM_BKIN_POLARITY_LOW TIM1_OR2_BKINP /!< BRK BKIN input is active low /
AnnaBridge	145:64910690c574	1068	#define LL_TIM_BKIN_POLARITY_HIGH 0x00000000U /!< BRK BKIN input is active high /
Kojto	122:f9eeca106725	1069	/**
Kojto	122:f9eeca106725	1070	* @}
Kojto	122:f9eeca106725	1071	*/
Kojto	122:f9eeca106725	1072
Kojto	122:f9eeca106725	1073	/** @defgroup TIM_LL_EC_DMABURST_BASEADDR DMA Burst Base Address
Kojto	122:f9eeca106725	1074	* @{
Kojto	122:f9eeca106725	1075	*/
AnnaBridge	145:64910690c574	1076	#define LL_TIM_DMABURST_BASEADDR_CR1 0x00000000U /!< TIMx_CR1 register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1077	#define LL_TIM_DMABURST_BASEADDR_CR2 TIM_DCR_DBA_0 /!< TIMx_CR2 register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1078	#define LL_TIM_DMABURST_BASEADDR_SMCR TIM_DCR_DBA_1 /!< TIMx_SMCR register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1079	#define LL_TIM_DMABURST_BASEADDR_DIER (TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_DIER register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1080	#define LL_TIM_DMABURST_BASEADDR_SR TIM_DCR_DBA_2 /!< TIMx_SR register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1081	#define LL_TIM_DMABURST_BASEADDR_EGR (TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) /!< TIMx_EGR register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1082	#define LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) /!< TIMx_CCMR1 register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1083	#define LL_TIM_DMABURST_BASEADDR_CCMR2 (TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_CCMR2 register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1084	#define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 /!< TIMx_CCER register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1085	#define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) /!< TIMx_CNT register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1086	#define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) /!< TIMx_PSC register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1087	#define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_ARR register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1088	#define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) /!< TIMx_RCR register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1089	#define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) /!< TIMx_CCR1 register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1090	#define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) /!< TIMx_CCR2 register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1091	#define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_CCR3 register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1092	#define LL_TIM_DMABURST_BASEADDR_CCR4 TIM_DCR_DBA_4 /!< TIMx_CCR4 register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1093	#define LL_TIM_DMABURST_BASEADDR_BDTR (TIM_DCR_DBA_4 \| TIM_DCR_DBA_0) /!< TIMx_BDTR register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1094	#define LL_TIM_DMABURST_BASEADDR_CCMR3 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_1) /!< TIMx_CCMR3 register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1095	#define LL_TIM_DMABURST_BASEADDR_CCR5 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_CCR5 register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1096	#define LL_TIM_DMABURST_BASEADDR_CCR6 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_2) /!< TIMx_CCR6 register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1097	#define LL_TIM_DMABURST_BASEADDR_OR1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) /!< TIMx_OR1 register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1098	#define LL_TIM_DMABURST_BASEADDR_OR2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) /!< TIMx_OR2 register is the DMA base address for DMA burst /
AnnaBridge	145:64910690c574	1099	#define LL_TIM_DMABURST_BASEADDR_OR3 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_OR3 register is the DMA base address for DMA burst /
Kojto	122:f9eeca106725	1100	/**
Kojto	122:f9eeca106725	1101	* @}
Kojto	122:f9eeca106725	1102	*/
Kojto	122:f9eeca106725	1103
Kojto	122:f9eeca106725	1104	/** @defgroup TIM_LL_EC_DMABURST_LENGTH DMA Burst Length
Kojto	122:f9eeca106725	1105	* @{
Kojto	122:f9eeca106725	1106	*/
AnnaBridge	145:64910690c574	1107	#define LL_TIM_DMABURST_LENGTH_1TRANSFER 0x00000000U /!< Transfer is done to 1 register starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1108	#define LL_TIM_DMABURST_LENGTH_2TRANSFERS TIM_DCR_DBL_0 /!< Transfer is done to 2 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1109	#define LL_TIM_DMABURST_LENGTH_3TRANSFERS TIM_DCR_DBL_1 /!< Transfer is done to 3 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1110	#define LL_TIM_DMABURST_LENGTH_4TRANSFERS (TIM_DCR_DBL_1 \| TIM_DCR_DBL_0) /!< Transfer is done to 4 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1111	#define LL_TIM_DMABURST_LENGTH_5TRANSFERS TIM_DCR_DBL_2 /!< Transfer is done to 5 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1112	#define LL_TIM_DMABURST_LENGTH_6TRANSFERS (TIM_DCR_DBL_2 \| TIM_DCR_DBL_0) /!< Transfer is done to 6 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1113	#define LL_TIM_DMABURST_LENGTH_7TRANSFERS (TIM_DCR_DBL_2 \| TIM_DCR_DBL_1) /!< Transfer is done to 7 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1114	#define LL_TIM_DMABURST_LENGTH_8TRANSFERS (TIM_DCR_DBL_2 \| TIM_DCR_DBL_1 \| TIM_DCR_DBL_0) /!< Transfer is done to 1 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1115	#define LL_TIM_DMABURST_LENGTH_9TRANSFERS TIM_DCR_DBL_3 /!< Transfer is done to 9 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1116	#define LL_TIM_DMABURST_LENGTH_10TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_0) /!< Transfer is done to 10 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1117	#define LL_TIM_DMABURST_LENGTH_11TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_1) /!< Transfer is done to 11 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1118	#define LL_TIM_DMABURST_LENGTH_12TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_1 \| TIM_DCR_DBL_0) /!< Transfer is done to 12 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1119	#define LL_TIM_DMABURST_LENGTH_13TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_2) /!< Transfer is done to 13 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1120	#define LL_TIM_DMABURST_LENGTH_14TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_2 \| TIM_DCR_DBL_0) /!< Transfer is done to 14 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1121	#define LL_TIM_DMABURST_LENGTH_15TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_2 \| TIM_DCR_DBL_1) /!< Transfer is done to 15 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1122	#define LL_TIM_DMABURST_LENGTH_16TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_2 \| TIM_DCR_DBL_1 \| TIM_DCR_DBL_0) /!< Transfer is done to 16 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1123	#define LL_TIM_DMABURST_LENGTH_17TRANSFERS TIM_DCR_DBL_4 /!< Transfer is done to 17 registers starting from the DMA burst base address /
AnnaBridge	145:64910690c574	1124	#define LL_TIM_DMABURST_LENGTH_18TRANSFERS (TIM_DCR_DBL_4 \| TIM_DCR_DBL_0) /!< Transfer is done to 18 registers starting from the DMA burst base address /
Kojto	122:f9eeca106725	1125	/**
Kojto	122:f9eeca106725	1126	* @}
Kojto	122:f9eeca106725	1127	*/
Kojto	122:f9eeca106725	1128
Kojto	122:f9eeca106725	1129	/** @defgroup TIM_LL_EC_TIM1_ETR_ADC1_RMP TIM1 External Trigger ADC1 Remap
AnnaBridge	145:64910690c574	1130	* @{
AnnaBridge	145:64910690c574	1131	*/
AnnaBridge	145:64910690c574	1132	#define LL_TIM_TIM1_ETR_ADC1_RMP_NC TIM1_OR1_RMP_MASK /!< TIM1_ETR is not connected to ADC1 analog watchdog x /
AnnaBridge	145:64910690c574	1133	#define LL_TIM_TIM1_ETR_ADC1_RMP_AWD1 (TIM1_OR1_ETR_ADC1_RMP_0 \| TIM1_OR1_RMP_MASK) /!< TIM1_ETR is connected to ADC1 analog watchdog 1 /
AnnaBridge	145:64910690c574	1134	#define LL_TIM_TIM1_ETR_ADC1_RMP_AWD2 (TIM1_OR1_ETR_ADC1_RMP_1 \| TIM1_OR1_RMP_MASK) /!< TIM1_ETR is connected to ADC1 analog watchdog 2 /
AnnaBridge	145:64910690c574	1135	#define LL_TIM_TIM1_ETR_ADC1_RMP_AWD3 (TIM1_OR1_ETR_ADC1_RMP \| TIM1_OR1_RMP_MASK) /!< TIM1_ETR is connected to ADC1 analog watchdog 3 /
Kojto	122:f9eeca106725	1136	/**
Kojto	122:f9eeca106725	1137	* @}
Kojto	122:f9eeca106725	1138	*/
Kojto	122:f9eeca106725	1139
AnnaBridge	145:64910690c574	1140	#if defined(ADC3)
Kojto	122:f9eeca106725	1141	/** @defgroup TIM_LL_EC_TIM1_ETR_ADC3_RMP TIM1 External Trigger ADC3 Remap
AnnaBridge	145:64910690c574	1142	* @{
AnnaBridge	145:64910690c574	1143	*/
AnnaBridge	145:64910690c574	1144	#define LL_TIM_TIM1_ETR_ADC3_RMP_NC TIM1_OR1_RMP_MASK /!< TIM1_ETR is not connected to ADC3 analog watchdog x/
AnnaBridge	145:64910690c574	1145	#define LL_TIM_TIM1_ETR_ADC3_RMP_AWD1 (TIM1_OR1_ETR_ADC3_RMP_0 \| TIM1_OR1_RMP_MASK) /!< TIM1_ETR is connected to ADC3 analog watchdog 1 /
AnnaBridge	145:64910690c574	1146	#define LL_TIM_TIM1_ETR_ADC3_RMP_AWD2 (TIM1_OR1_ETR_ADC3_RMP_1 \| TIM1_OR1_RMP_MASK) /!< TIM1_ETR is connected to ADC3 analog watchdog 2 /
AnnaBridge	145:64910690c574	1147	#define LL_TIM_TIM1_ETR_ADC3_RMP_AWD3 (TIM1_OR1_ETR_ADC3_RMP \| TIM1_OR1_RMP_MASK) /!< TIM1_ETR is connected to ADC3 analog watchdog 3 /
Kojto	122:f9eeca106725	1148	/**
Kojto	122:f9eeca106725	1149	* @}
Kojto	122:f9eeca106725	1150	*/
AnnaBridge	145:64910690c574	1151	#endif /* ADC3 */
Kojto	122:f9eeca106725	1152
Kojto	122:f9eeca106725	1153	/** @defgroup TIM_LL_EC_TIM1_TI1_RMP TIM1 External Input Ch1 Remap
AnnaBridge	145:64910690c574	1154	* @{
AnnaBridge	145:64910690c574	1155	*/
AnnaBridge	145:64910690c574	1156	#define LL_TIM_TIM1_TI1_RMP_GPIO TIM1_OR1_RMP_MASK /!< TIM1 input capture 1 is connected to GPIO /
AnnaBridge	145:64910690c574	1157	#define LL_TIM_TIM1_TI1_RMP_COMP1 (TIM1_OR1_TI1_RMP \| TIM1_OR1_RMP_MASK) /!< TIM1 input capture 1 is connected to COMP1 output /
Kojto	122:f9eeca106725	1158	/**
Kojto	122:f9eeca106725	1159	* @}
Kojto	122:f9eeca106725	1160	*/
Kojto	122:f9eeca106725	1161
AnnaBridge	145:64910690c574	1162	/** @defgroup TIM_LL_EC_TIM2_ITR1_RMP TIM2 Internal Trigger1 Remap
AnnaBridge	145:64910690c574	1163	* @{
AnnaBridge	145:64910690c574	1164	*/
AnnaBridge	145:64910690c574	1165	#if defined (STM32L471xx) \|\| defined (STM32L475xx) \|\| defined (STM32L476xx) \|\| defined (STM32L485xx) \|\| defined (STM32L486xx) \|\| defined (STM32L496xx) \|\| defined (STM32L4A6xx)
AnnaBridge	145:64910690c574	1166	#define LL_TIM_TIM2_ITR1_RMP_TIM8_TRGO TIM2_OR1_RMP_MASK /!< TIM2_ITR1 is connected to TIM8_TRGO /
AnnaBridge	145:64910690c574	1167	#define LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF (TIM2_OR1_ITR1_RMP \| TIM2_OR1_RMP_MASK) /!< TIM2_ITR1 is connected to OTG_FS SOF /
AnnaBridge	145:64910690c574	1168	#endif /* STM32L471xx \|\| STM32L475xx \|\| STM32L476xx \|\| STM32L485xx \|\| STM32L486xx \|\| */
AnnaBridge	145:64910690c574	1169	/* STM32L496xx \|\| STM32L4A6xx */
AnnaBridge	145:64910690c574	1170	#if defined (STM32L431xx) \|\| defined (STM32L432xx) \|\| defined (STM32L433xx) \|\| defined (STM32L442xx) \|\| defined (STM32L443xx) \|\| defined (STM32L451xx) \|\| defined (STM32L452xx) \|\| defined (STM32L462xx)
AnnaBridge	145:64910690c574	1171	#define LL_TIM_TIM2_ITR1_RMP_NONE 0x00000000U /* !< No internal trigger on TIM2_ITR1 */
AnnaBridge	145:64910690c574	1172	#define LL_TIM_TIM2_ITR1_RMP_USB_SOF TIM2_OR1_ITR1_RMP /* !< TIM2_ITR1 is connected to USB SOF */
AnnaBridge	145:64910690c574	1173	#endif /* STM32L431xx \|\| STM32L432xx \|\| STM32L442xx \|\| STM32L433xx \|\| STM32L443xx \|\| */
AnnaBridge	145:64910690c574	1174	/* STM32L451xx \|\| STM32L452xx \|\| STM32L462xx */
AnnaBridge	145:64910690c574	1175	#define LL_TIM_TIM2_ETR_RMP_GPIO TIM2_OR1_RMP_MASK /!< TIM2_ETR is connected to GPIO /
AnnaBridge	145:64910690c574	1176	#define LL_TIM_TIM2_ETR_RMP_LSE (TIM2_OR1_ETR1_RMP \| TIM2_OR1_RMP_MASK) /!< TIM2_ETR is connected to LSE /
Kojto	122:f9eeca106725	1177	/**
Kojto	122:f9eeca106725	1178	* @}
Kojto	122:f9eeca106725	1179	*/
Kojto	122:f9eeca106725	1180
Kojto	122:f9eeca106725	1181	/** @defgroup TIM_LL_EC_TIM2_TI4_RMP TIM2 External Input Ch4 Remap
AnnaBridge	145:64910690c574	1182	* @{
AnnaBridge	145:64910690c574	1183	*/
AnnaBridge	145:64910690c574	1184	#define LL_TIM_TIM2_TI4_RMP_GPIO TIM2_OR1_RMP_MASK /!< TIM2 input capture 4 is connected to GPIO /
AnnaBridge	145:64910690c574	1185	#define LL_TIM_TIM2_TI4_RMP_COMP1 (TIM2_OR1_TI4_RMP_0 \| TIM2_OR1_RMP_MASK) /!< TIM2 input capture 4 is connected to COMP1_OUT /
AnnaBridge	145:64910690c574	1186	#define LL_TIM_TIM2_TI4_RMP_COMP2 (TIM2_OR1_TI4_RMP_1 \| TIM2_OR1_RMP_MASK) /!< TIM2 input capture 4 is connected to COMP2_OUT /
AnnaBridge	145:64910690c574	1187	#define LL_TIM_TIM2_TI4_RMP_COMP1_COMP2 (TIM2_OR1_TI4_RMP \| TIM2_OR1_RMP_MASK) /!< TIM2 input capture 4 is connected to logical OR between COMP1_OUT and COMP2_OUT /
Kojto	122:f9eeca106725	1188	/**
Kojto	122:f9eeca106725	1189	* @}
Kojto	122:f9eeca106725	1190	*/
Kojto	122:f9eeca106725	1191
AnnaBridge	145:64910690c574	1192	#if defined(TIM3)
Kojto	122:f9eeca106725	1193	/** @defgroup TIM_LL_EC_TIM3_TI1_RMP TIM3 External Input Ch1 Remap
AnnaBridge	145:64910690c574	1194	* @{
AnnaBridge	145:64910690c574	1195	*/
AnnaBridge	145:64910690c574	1196	#define LL_TIM_TIM3_TI1_RMP_GPIO TIM3_OR1_RMP_MASK /!< TIM3 input capture 1 is connected to GPIO /
AnnaBridge	145:64910690c574	1197	#define LL_TIM_TIM3_TI1_RMP_COMP1 (TIM3_OR1_TI1_RMP_0 \| TIM3_OR1_RMP_MASK) /!< TIM3 input capture 1 is connected to COMP1_OUT /
AnnaBridge	145:64910690c574	1198	#define LL_TIM_TIM3_TI1_RMP_COMP2 (TIM3_OR1_TI1_RMP_1 \| TIM3_OR1_RMP_MASK) /!< TIM3 input capture 1 is connected to COMP2_OUT /
AnnaBridge	145:64910690c574	1199	#define LL_TIM_TIM3_TI1_RMP_COMP1_COMP2 (TIM3_OR1_TI1_RMP \| TIM3_OR1_RMP_MASK) /!< TIM3 input capture 1 is connected to logical OR between COMP1_OUT and COMP2_OUT /
Kojto	122:f9eeca106725	1200	/**
Kojto	122:f9eeca106725	1201	* @}
Kojto	122:f9eeca106725	1202	*/
AnnaBridge	145:64910690c574	1203	#endif /* TIM3 */
AnnaBridge	145:64910690c574	1204
AnnaBridge	145:64910690c574	1205	#if defined(TIM8)
Kojto	122:f9eeca106725	1206	/** @defgroup TIM_LL_EC_TIM8_ETR_ADC2_RMP TIM8 External Trigger ADC2 Remap
AnnaBridge	145:64910690c574	1207	* @{
AnnaBridge	145:64910690c574	1208	*/
AnnaBridge	145:64910690c574	1209	#define LL_TIM_TIM8_ETR_ADC2_RMP_NC TIM8_OR1_RMP_MASK /!< TIM8_ETR is not connected to ADC2 analog watchdog x /
AnnaBridge	145:64910690c574	1210	#define LL_TIM_TIM8_ETR_ADC2_RMP_AWD1 (TIM8_OR1_ETR_ADC2_RMP_0 \| TIM8_OR1_RMP_MASK) /!< TIM8_ETR is connected to ADC2 analog watchdog /
AnnaBridge	145:64910690c574	1211	#define LL_TIM_TIM8_ETR_ADC2_RMP_AWD2 (TIM8_OR1_ETR_ADC2_RMP_1 \| TIM8_OR1_RMP_MASK) /!< TIM8_ETR is connected to ADC2 analog watchdog 2 /
AnnaBridge	145:64910690c574	1212	#define LL_TIM_TIM8_ETR_ADC2_RMP_AWD3 (TIM8_OR1_ETR_ADC2_RMP \| TIM8_OR1_RMP_MASK) /!< TIM8_ETR is connected to ADC2 analog watchdog 3 /
Kojto	122:f9eeca106725	1213	/**
Kojto	122:f9eeca106725	1214	* @}
Kojto	122:f9eeca106725	1215	*/
Kojto	122:f9eeca106725	1216
Kojto	122:f9eeca106725	1217	/** @defgroup TIM_LL_EC_TIM8_ETR_ADC3_RMP TIM8 External Trigger ADC3 Remap
AnnaBridge	145:64910690c574	1218	* @{
AnnaBridge	145:64910690c574	1219	*/
AnnaBridge	145:64910690c574	1220	#define LL_TIM_TIM8_ETR_ADC3_RMP_NC TIM8_OR1_RMP_MASK /!< TIM8_ETR is not connected to ADC3 analog watchdog x /
AnnaBridge	145:64910690c574	1221	#define LL_TIM_TIM8_ETR_ADC3_RMP_AWD1 (TIM8_OR1_ETR_ADC3_RMP_0 \| TIM8_OR1_RMP_MASK) /!< TIM8_ETR is connected to ADC3 analog watchdog 1 /
AnnaBridge	145:64910690c574	1222	#define LL_TIM_TIM8_ETR_ADC3_RMP_AWD2 (TIM8_OR1_ETR_ADC3_RMP_1 \| TIM8_OR1_RMP_MASK) /!< TIM8_ETR is connected to ADC3 analog watchdog 2 /
AnnaBridge	145:64910690c574	1223	#define LL_TIM_TIM8_ETR_ADC3_RMP_AWD3 (TIM8_OR1_ETR_ADC3_RMP \| TIM8_OR1_RMP_MASK) /!< TIM8_ETR is connected to ADC3 analog watchdog 3 /
Kojto	122:f9eeca106725	1224	/**
Kojto	122:f9eeca106725	1225	* @}
Kojto	122:f9eeca106725	1226	*/
Kojto	122:f9eeca106725	1227
Kojto	122:f9eeca106725	1228	/** @defgroup TIM_LL_EC_TIM8_TI1_RMP TIM8 External Input Ch1 Remap
AnnaBridge	145:64910690c574	1229	* @{
AnnaBridge	145:64910690c574	1230	*/
AnnaBridge	145:64910690c574	1231	#define LL_TIM_TIM8_TI1_RMP_GPIO TIM8_OR1_RMP_MASK /!< TIM8 input capture 1 is connected to GPIO /
AnnaBridge	145:64910690c574	1232	#define LL_TIM_TIM8_TI1_RMP_COMP2 (TIM8_OR1_TI1_RMP \| TIM8_OR1_RMP_MASK) /!< TIM8 input capture 1 is connected to COMP2 output /
Kojto	122:f9eeca106725	1233	/**
Kojto	122:f9eeca106725	1234	* @}
Kojto	122:f9eeca106725	1235	*/
AnnaBridge	145:64910690c574	1236	#endif /* TIM8 */
Kojto	122:f9eeca106725	1237
Kojto	122:f9eeca106725	1238	/** @defgroup TIM_LL_EC_TIM15_TI1_RMP TIM15 External Input Ch1 Remap
AnnaBridge	145:64910690c574	1239	* @{
AnnaBridge	145:64910690c574	1240	*/
AnnaBridge	145:64910690c574	1241	#define LL_TIM_TIM15_TI1_RMP_GPIO TIM15_OR1_RMP_MASK /!< TIM15 input capture 1 is connected to GPIO /
AnnaBridge	145:64910690c574	1242	#define LL_TIM_TIM15_TI1_RMP_LSE (TIM15_OR1_TI1_RMP \| TIM15_OR1_RMP_MASK) /!< TIM15 input capture 1 is connected to LSE /
Kojto	122:f9eeca106725	1243	/**
Kojto	122:f9eeca106725	1244	* @}
Kojto	122:f9eeca106725	1245	*/
Kojto	122:f9eeca106725	1246
Kojto	122:f9eeca106725	1247	/** @defgroup TIM_LL_EC_TIM15_ENCODERMODE TIM15 ENCODERMODE
AnnaBridge	145:64910690c574	1248	* @{
AnnaBridge	145:64910690c574	1249	*/
AnnaBridge	145:64910690c574	1250	#define LL_TIM_TIM15_ENCODERMODE_NOREDIRECTION TIM15_OR1_RMP_MASK /!< No redirection/
AnnaBridge	145:64910690c574	1251	#define LL_TIM_TIM15_ENCODERMODE_TIM2 (TIM15_OR1_ENCODER_MODE_0 \| TIM15_OR1_RMP_MASK) /!< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively /
AnnaBridge	145:64910690c574	1252	#define LL_TIM_TIM15_ENCODERMODE_TIM3 (TIM15_OR1_ENCODER_MODE_1 \| TIM15_OR1_RMP_MASK) /!< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectivel y/
AnnaBridge	145:64910690c574	1253	#define LL_TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE \| TIM15_OR1_RMP_MASK) /!< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively /
Kojto	122:f9eeca106725	1254	/**
Kojto	122:f9eeca106725	1255	* @}
Kojto	122:f9eeca106725	1256	*/
Kojto	122:f9eeca106725	1257
Kojto	122:f9eeca106725	1258	/** @defgroup TIM_LL_EC_TIM16_TI1_RMP TIM16 External Input Ch1 Remap
AnnaBridge	145:64910690c574	1259	* @{
AnnaBridge	145:64910690c574	1260	*/
AnnaBridge	145:64910690c574	1261	#define LL_TIM_TIM16_TI1_RMP_GPIO TIM16_OR1_RMP_MASK /!< TIM16 input capture 1 is connected to GPIO /
AnnaBridge	145:64910690c574	1262	#define LL_TIM_TIM16_TI1_RMP_LSI (TIM16_OR1_TI1_RMP_0 \| TIM16_OR1_RMP_MASK) /!< TIM16 input capture 1 is connected to LSI /
AnnaBridge	145:64910690c574	1263	#define LL_TIM_TIM16_TI1_RMP_LSE (TIM16_OR1_TI1_RMP_1 \| TIM16_OR1_RMP_MASK) /!< TIM16 input capture 1 is connected to LSE /
AnnaBridge	145:64910690c574	1264	#define LL_TIM_TIM16_TI1_RMP_RTC (TIM16_OR1_TI1_RMP_1 \| TIM16_OR1_TI1_RMP_0 \| TIM16_OR1_RMP_MASK) /!< TIM16 input capture 1 is connected to RTC wakeup interrupt /
Kojto	122:f9eeca106725	1265	#if defined TIM16_OR1_TI1_RMP_2
AnnaBridge	145:64910690c574	1266	#define LL_TIM_TIM16_TI1_RMP_MSI (TIM16_OR1_TI1_RMP_2 \| TIM16_OR1_RMP_MASK) /!< TIM16 input capture 1 is connected to MSI /
AnnaBridge	145:64910690c574	1267	#define LL_TIM_TIM16_TI1_RMP_HSE_32 (TIM16_OR1_TI1_RMP_2 \| TIM16_OR1_TI1_RMP_0 \| TIM16_OR1_RMP_MASK) /!< TIM16 input capture 1 is connected to HSE/32 /
AnnaBridge	145:64910690c574	1268	#define LL_TIM_TIM16_TI1_RMP_MCO (TIM16_OR1_TI1_RMP_2 \| TIM16_OR1_TI1_RMP_1 \| TIM16_OR1_RMP_MASK) /!< TIM16 input capture 1 is connected to MCO /
Kojto	122:f9eeca106725	1269	#endif
Kojto	122:f9eeca106725	1270	/**
Kojto	122:f9eeca106725	1271	* @}
Kojto	122:f9eeca106725	1272	*/
Kojto	122:f9eeca106725	1273
AnnaBridge	145:64910690c574	1274	#if defined(TIM17)
Kojto	122:f9eeca106725	1275	/** @defgroup TIM_LL_EC_TIM17_TI1_RMP TIM17 Timer Input Ch1 Remap
AnnaBridge	145:64910690c574	1276	* @{
AnnaBridge	145:64910690c574	1277	*/
AnnaBridge	145:64910690c574	1278	#define LL_TIM_TIM17_TI1_RMP_GPIO TIM17_OR1_RMP_MASK /!< TIM17 input capture 1 is connected to GPIO /
AnnaBridge	145:64910690c574	1279	#define LL_TIM_TIM17_TI1_RMP_MSI (TIM17_OR1_TI1_RMP_0 \| TIM17_OR1_RMP_MASK) /!< TIM17 input capture 1 is connected to MSI /
AnnaBridge	145:64910690c574	1280	#define LL_TIM_TIM17_TI1_RMP_HSE_32 (TIM17_OR1_TI1_RMP_1 \| TIM17_OR1_RMP_MASK) /!< TIM17 input capture 1 is connected to HSE/32 /
AnnaBridge	145:64910690c574	1281	#define LL_TIM_TIM17_TI1_RMP_MCO (TIM17_OR1_TI1_RMP \| TIM17_OR1_RMP_MASK) /!< TIM17 input capture 1 is connected to MCO /
Kojto	122:f9eeca106725	1282	/**
Kojto	122:f9eeca106725	1283	* @}
Kojto	122:f9eeca106725	1284	*/
AnnaBridge	145:64910690c574	1285	#endif /* TIM17 */
Kojto	122:f9eeca106725	1286
Kojto	122:f9eeca106725	1287	/** @defgroup TIM_LL_EC_OCREF_CLR_INT OCREF clear input selection
Kojto	122:f9eeca106725	1288	* @{
Kojto	122:f9eeca106725	1289	*/
AnnaBridge	145:64910690c574	1290	#define LL_TIM_OCREF_CLR_INT_NC 0x00000000U /!< OCREF_CLR_INT is not connected /
AnnaBridge	145:64910690c574	1291	#define LL_TIM_OCREF_CLR_INT_ETR TIM_SMCR_OCCS /!< OCREF_CLR_INT is connected to ETRF /
Kojto	122:f9eeca106725	1292	/**
Kojto	122:f9eeca106725	1293	* @}
Kojto	122:f9eeca106725	1294	*/
Kojto	122:f9eeca106725	1295
Kojto	122:f9eeca106725	1296	/** Legacy definitions for compatibility purpose
Kojto	122:f9eeca106725	1297	@cond 0
Kojto	122:f9eeca106725	1298	*/
Kojto	122:f9eeca106725	1299	#define LL_TIM_BKIN_SOURCE_DFBK LL_TIM_BKIN_SOURCE_DF1BK
Kojto	122:f9eeca106725	1300	/**
Kojto	122:f9eeca106725	1301	@endcond
Kojto	122:f9eeca106725	1302	*/
Kojto	122:f9eeca106725	1303	/**
Kojto	122:f9eeca106725	1304	* @}
Kojto	122:f9eeca106725	1305	*/
AnnaBridge	145:64910690c574	1306
Kojto	122:f9eeca106725	1307	/* Exported macro ------------------------------------------------------------*/
Kojto	122:f9eeca106725	1308	/** @defgroup TIM_LL_Exported_Macros TIM Exported Macros
Kojto	122:f9eeca106725	1309	* @{
Kojto	122:f9eeca106725	1310	*/
Kojto	122:f9eeca106725	1311
Kojto	122:f9eeca106725	1312	/** @defgroup TIM_LL_EM_WRITE_READ Common Write and read registers Macros
Kojto	122:f9eeca106725	1313	* @{
Kojto	122:f9eeca106725	1314	*/
Kojto	122:f9eeca106725	1315	/**
Kojto	122:f9eeca106725	1316	* @brief Write a value in TIM register.
Kojto	122:f9eeca106725	1317	* @param __INSTANCE__ TIM Instance
Kojto	122:f9eeca106725	1318	* @param __REG__ Register to be written
Kojto	122:f9eeca106725	1319	* @param __VALUE__ Value to be written in the register
Kojto	122:f9eeca106725	1320	* @retval None
Kojto	122:f9eeca106725	1321	*/
Kojto	122:f9eeca106725	1322	#define LL_TIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
Kojto	122:f9eeca106725	1323
Kojto	122:f9eeca106725	1324	/**
Kojto	122:f9eeca106725	1325	* @brief Read a value in TIM register.
Kojto	122:f9eeca106725	1326	* @param __INSTANCE__ TIM Instance
Kojto	122:f9eeca106725	1327	* @param __REG__ Register to be read
Kojto	122:f9eeca106725	1328	* @retval Register value
Kojto	122:f9eeca106725	1329	*/
Kojto	122:f9eeca106725	1330	#define LL_TIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
Kojto	122:f9eeca106725	1331	/**
Kojto	122:f9eeca106725	1332	* @}
Kojto	122:f9eeca106725	1333	*/
Kojto	122:f9eeca106725	1334
Kojto	122:f9eeca106725	1335	/** @defgroup TIM_LL_EM_Exported_Macros Exported_Macros
Kojto	122:f9eeca106725	1336	* @{
Kojto	122:f9eeca106725	1337	*/
Kojto	122:f9eeca106725	1338	/**
Kojto	122:f9eeca106725	1339	* @brief HELPER macro retrieving the UIFCPY flag from the counter value.
Kojto	122:f9eeca106725	1340	* @note ex: @ref __LL_TIM_GETFLAG_UIFCPY (@ref LL_TIM_GetCounter ());
Kojto	122:f9eeca106725	1341	* @note Relevant only if UIF flag remapping has been enabled (UIF status bit is copied
Kojto	122:f9eeca106725	1342	* to TIMx_CNT register bit 31)
Kojto	122:f9eeca106725	1343	* @param __CNT__ Counter value
Kojto	122:f9eeca106725	1344	* @retval UIF status bit
Kojto	122:f9eeca106725	1345	*/
Kojto	122:f9eeca106725	1346	#define __LL_TIM_GETFLAG_UIFCPY(__CNT__) \
AnnaBridge	145:64910690c574	1347	(READ_BIT((__CNT__), TIM_CNT_UIFCPY) >> TIM_CNT_UIFCPY_Pos)
Kojto	122:f9eeca106725	1348
Kojto	122:f9eeca106725	1349	/**
Kojto	122:f9eeca106725	1350	* @brief HELPER macro calculating DTG[0:7] in the TIMx_BDTR register to achieve the requested dead time duration.
Kojto	122:f9eeca106725	1351	* @note ex: @ref __LL_TIM_CALC_DEADTIME (80000000, @ref LL_TIM_GetClockDivision (), 120);
Kojto	122:f9eeca106725	1352	* @param __TIMCLK__ timer input clock frequency (in Hz)
Kojto	122:f9eeca106725	1353	* @param __CKD__ This parameter can be one of the following values:
Kojto	122:f9eeca106725	1354	* @arg @ref LL_TIM_CLOCKDIVISION_DIV1
Kojto	122:f9eeca106725	1355	* @arg @ref LL_TIM_CLOCKDIVISION_DIV2
Kojto	122:f9eeca106725	1356	* @arg @ref LL_TIM_CLOCKDIVISION_DIV4
Kojto	122:f9eeca106725	1357	* @param __DT__ deadtime duration (in ns)
Kojto	122:f9eeca106725	1358	* @retval DTG[0:7]
Kojto	122:f9eeca106725	1359	*/
Kojto	122:f9eeca106725	1360	#define __LL_TIM_CALC_DEADTIME(__TIMCLK__, __CKD__, __DT__) \
Kojto	122:f9eeca106725	1361	( (((uint64_t)((__DT__)1000U)) < ((DT_DELAY_1+1U) TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? (uint8_t)(((uint64_t)((__DT__)*1000U) / TIM_CALC_DTS((__TIMCLK__), (__CKD__))) & DT_DELAY_1) : \
Kojto	122:f9eeca106725	1362	(((uint64_t)((__DT__)1000U)) < (64U + (DT_DELAY_2+1U)) 2U * TIM_CALC_DTS((__TIMCLK__), (__CKD__))) ? (uint8_t)(DT_RANGE_2 \| ((uint8_t)((uint8_t)((((uint64_t)((__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 1U) - (uint8_t) 64U) & DT_DELAY_2)) :\
Kojto	122:f9eeca106725	1363	(((uint64_t)((__DT__)1000U)) < (32U + (DT_DELAY_3+1U)) 8U * TIM_CALC_DTS((__TIMCLK__), (__CKD__))) ? (uint8_t)(DT_RANGE_3 \| ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 3U) - (uint8_t) 32U) & DT_DELAY_3)) :\
Kojto	122:f9eeca106725	1364	(((uint64_t)((__DT__)1000U)) < (32U + (DT_DELAY_4+1U)) 16U * TIM_CALC_DTS((__TIMCLK__), (__CKD__))) ? (uint8_t)(DT_RANGE_4 \| ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 4U) - (uint8_t) 32U) & DT_DELAY_4)) :\
AnnaBridge	145:64910690c574	1365	0U)
Kojto	122:f9eeca106725	1366
Kojto	122:f9eeca106725	1367	/**
Kojto	122:f9eeca106725	1368	* @brief HELPER macro calculating the prescaler value to achieve the required counter clock frequency.
Kojto	122:f9eeca106725	1369	* @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000);
Kojto	122:f9eeca106725	1370	* @param __TIMCLK__ timer input clock frequency (in Hz)
Kojto	122:f9eeca106725	1371	* @param __CNTCLK__ counter clock frequency (in Hz)
Kojto	122:f9eeca106725	1372	* @retval Prescaler value (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	1373	*/
Kojto	122:f9eeca106725	1374	#define __LL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \
Kojto	122:f9eeca106725	1375	((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((__TIMCLK__)/(__CNTCLK__) - 1U) : 0U
Kojto	122:f9eeca106725	1376
Kojto	122:f9eeca106725	1377	/**
Kojto	122:f9eeca106725	1378	* @brief HELPER macro calculating the auto-reload value to achieve the required output signal frequency.
Kojto	122:f9eeca106725	1379	* @note ex: @ref __LL_TIM_CALC_ARR (1000000, @ref LL_TIM_GetPrescaler (), 10000);
Kojto	122:f9eeca106725	1380	* @param __TIMCLK__ timer input clock frequency (in Hz)
Kojto	122:f9eeca106725	1381	* @param __PSC__ prescaler
Kojto	122:f9eeca106725	1382	* @param __FREQ__ output signal frequency (in Hz)
Kojto	122:f9eeca106725	1383	* @retval Auto-reload value (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	1384	*/
Kojto	122:f9eeca106725	1385	#define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \
Kojto	122:f9eeca106725	1386	(((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? ((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U)) - 1U) : 0U
Kojto	122:f9eeca106725	1387
Kojto	122:f9eeca106725	1388	/**
Kojto	122:f9eeca106725	1389	* @brief HELPER macro calculating the compare value required to achieve the required timer output compare active/inactive delay.
Kojto	122:f9eeca106725	1390	* @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10);
Kojto	122:f9eeca106725	1391	* @param __TIMCLK__ timer input clock frequency (in Hz)
Kojto	122:f9eeca106725	1392	* @param __PSC__ prescaler
Kojto	122:f9eeca106725	1393	* @param __DELAY__ timer output compare active/inactive delay (in us)
Kojto	122:f9eeca106725	1394	* @retval Compare value (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	1395	*/
Kojto	122:f9eeca106725	1396	#define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__) \
Kojto	122:f9eeca106725	1397	((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \
Kojto	122:f9eeca106725	1398	/ ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
Kojto	122:f9eeca106725	1399
Kojto	122:f9eeca106725	1400	/**
Kojto	122:f9eeca106725	1401	* @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration (when the timer operates in one pulse mode).
Kojto	122:f9eeca106725	1402	* @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20);
Kojto	122:f9eeca106725	1403	* @param __TIMCLK__ timer input clock frequency (in Hz)
Kojto	122:f9eeca106725	1404	* @param __PSC__ prescaler
Kojto	122:f9eeca106725	1405	* @param __DELAY__ timer output compare active/inactive delay (in us)
Kojto	122:f9eeca106725	1406	* @param __PULSE__ pulse duration (in us)
Kojto	122:f9eeca106725	1407	* @retval Auto-reload value (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	1408	*/
Kojto	122:f9eeca106725	1409	#define __LL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \
Kojto	122:f9eeca106725	1410	((uint32_t)(__LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__PULSE__)) \
Kojto	122:f9eeca106725	1411	+ __LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__DELAY__))))
Kojto	122:f9eeca106725	1412
Kojto	122:f9eeca106725	1413	/**
AnnaBridge	145:64910690c574	1414	* @brief HELPER macro retrieving the ratio of the input capture prescaler
Kojto	122:f9eeca106725	1415	* @note ex: @ref __LL_TIM_GET_ICPSC_RATIO (@ref LL_TIM_IC_GetPrescaler ());
Kojto	122:f9eeca106725	1416	* @param __ICPSC__ This parameter can be one of the following values:
Kojto	122:f9eeca106725	1417	* @arg @ref LL_TIM_ICPSC_DIV1
Kojto	122:f9eeca106725	1418	* @arg @ref LL_TIM_ICPSC_DIV2
Kojto	122:f9eeca106725	1419	* @arg @ref LL_TIM_ICPSC_DIV4
Kojto	122:f9eeca106725	1420	* @arg @ref LL_TIM_ICPSC_DIV8
Kojto	122:f9eeca106725	1421	* @retval Input capture prescaler ratio (1, 2, 4 or 8)
Kojto	122:f9eeca106725	1422	*/
Kojto	122:f9eeca106725	1423	#define __LL_TIM_GET_ICPSC_RATIO(__ICPSC__) \
AnnaBridge	145:64910690c574	1424	((uint32_t)(0x01U << (((__ICPSC__) >> 16U) >> TIM_CCMR1_IC1PSC_Pos)))
AnnaBridge	145:64910690c574	1425
AnnaBridge	145:64910690c574	1426
Kojto	122:f9eeca106725	1427	/**
Kojto	122:f9eeca106725	1428	* @}
Kojto	122:f9eeca106725	1429	*/
Kojto	122:f9eeca106725	1430
Kojto	122:f9eeca106725	1431
Kojto	122:f9eeca106725	1432	/**
Kojto	122:f9eeca106725	1433	* @}
Kojto	122:f9eeca106725	1434	*/
Kojto	122:f9eeca106725	1435
Kojto	122:f9eeca106725	1436	/* Exported functions --------------------------------------------------------*/
Kojto	122:f9eeca106725	1437	/** @defgroup TIM_LL_Exported_Functions TIM Exported Functions
Kojto	122:f9eeca106725	1438	* @{
Kojto	122:f9eeca106725	1439	*/
AnnaBridge	145:64910690c574	1440
Kojto	122:f9eeca106725	1441	/** @defgroup TIM_LL_EF_Time_Base Time Base configuration
Kojto	122:f9eeca106725	1442	* @{
Kojto	122:f9eeca106725	1443	*/
Kojto	122:f9eeca106725	1444	/**
Kojto	122:f9eeca106725	1445	* @brief Enable timer counter.
Kojto	122:f9eeca106725	1446	* @rmtoll CR1 CEN LL_TIM_EnableCounter
Kojto	122:f9eeca106725	1447	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1448	* @retval None
Kojto	122:f9eeca106725	1449	*/
AnnaBridge	145:64910690c574	1450	__STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1451	{
Kojto	122:f9eeca106725	1452	SET_BIT(TIMx->CR1, TIM_CR1_CEN);
Kojto	122:f9eeca106725	1453	}
Kojto	122:f9eeca106725	1454
Kojto	122:f9eeca106725	1455	/**
Kojto	122:f9eeca106725	1456	* @brief Disable timer counter.
Kojto	122:f9eeca106725	1457	* @rmtoll CR1 CEN LL_TIM_DisableCounter
Kojto	122:f9eeca106725	1458	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1459	* @retval None
Kojto	122:f9eeca106725	1460	*/
AnnaBridge	145:64910690c574	1461	__STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1462	{
Kojto	122:f9eeca106725	1463	CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN);
Kojto	122:f9eeca106725	1464	}
Kojto	122:f9eeca106725	1465
Kojto	122:f9eeca106725	1466	/**
Kojto	122:f9eeca106725	1467	* @brief Indicates whether the timer counter is enabled.
Kojto	122:f9eeca106725	1468	* @rmtoll CR1 CEN LL_TIM_IsEnabledCounter
Kojto	122:f9eeca106725	1469	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1470	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1471	*/
AnnaBridge	145:64910690c574	1472	__STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1473	{
Kojto	122:f9eeca106725	1474	return (READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN));
Kojto	122:f9eeca106725	1475	}
Kojto	122:f9eeca106725	1476
Kojto	122:f9eeca106725	1477	/**
Kojto	122:f9eeca106725	1478	* @brief Enable update event generation.
Kojto	122:f9eeca106725	1479	* @rmtoll CR1 UDIS LL_TIM_EnableUpdateEvent
Kojto	122:f9eeca106725	1480	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1481	* @retval None
Kojto	122:f9eeca106725	1482	*/
AnnaBridge	145:64910690c574	1483	__STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1484	{
Kojto	122:f9eeca106725	1485	SET_BIT(TIMx->CR1, TIM_CR1_UDIS);
Kojto	122:f9eeca106725	1486	}
Kojto	122:f9eeca106725	1487
Kojto	122:f9eeca106725	1488	/**
Kojto	122:f9eeca106725	1489	* @brief Disable update event generation.
Kojto	122:f9eeca106725	1490	* @rmtoll CR1 UDIS LL_TIM_DisableUpdateEvent
Kojto	122:f9eeca106725	1491	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1492	* @retval None
Kojto	122:f9eeca106725	1493	*/
AnnaBridge	145:64910690c574	1494	__STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1495	{
Kojto	122:f9eeca106725	1496	CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);
Kojto	122:f9eeca106725	1497	}
Kojto	122:f9eeca106725	1498
Kojto	122:f9eeca106725	1499	/**
Kojto	122:f9eeca106725	1500	* @brief Indicates whether update event generation is enabled.
Kojto	122:f9eeca106725	1501	* @rmtoll CR1 UDIS LL_TIM_IsEnabledUpdateEvent
Kojto	122:f9eeca106725	1502	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1503	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1504	*/
AnnaBridge	145:64910690c574	1505	__STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1506	{
Kojto	122:f9eeca106725	1507	return (READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (TIM_CR1_UDIS));
Kojto	122:f9eeca106725	1508	}
Kojto	122:f9eeca106725	1509
Kojto	122:f9eeca106725	1510	/**
Kojto	122:f9eeca106725	1511	* @brief Set update event source
AnnaBridge	145:64910690c574	1512	* @note Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events
Kojto	122:f9eeca106725	1513	* generate an update interrupt or DMA request if enabled:
Kojto	122:f9eeca106725	1514	* - Counter overflow/underflow
Kojto	122:f9eeca106725	1515	* - Setting the UG bit
Kojto	122:f9eeca106725	1516	* - Update generation through the slave mode controller
AnnaBridge	145:64910690c574	1517	* @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter
Kojto	122:f9eeca106725	1518	* overflow/underflow generates an update interrupt or DMA request if enabled.
Kojto	122:f9eeca106725	1519	* @rmtoll CR1 URS LL_TIM_SetUpdateSource
Kojto	122:f9eeca106725	1520	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1521	* @param UpdateSource This parameter can be one of the following values:
Kojto	122:f9eeca106725	1522	* @arg @ref LL_TIM_UPDATESOURCE_REGULAR
Kojto	122:f9eeca106725	1523	* @arg @ref LL_TIM_UPDATESOURCE_COUNTER
Kojto	122:f9eeca106725	1524	* @retval None
Kojto	122:f9eeca106725	1525	*/
AnnaBridge	145:64910690c574	1526	__STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource)
Kojto	122:f9eeca106725	1527	{
Kojto	122:f9eeca106725	1528	MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource);
Kojto	122:f9eeca106725	1529	}
Kojto	122:f9eeca106725	1530
Kojto	122:f9eeca106725	1531	/**
Kojto	122:f9eeca106725	1532	* @brief Get actual event update source
Kojto	122:f9eeca106725	1533	* @rmtoll CR1 URS LL_TIM_GetUpdateSource
Kojto	122:f9eeca106725	1534	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1535	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1536	* @arg @ref LL_TIM_UPDATESOURCE_REGULAR
Kojto	122:f9eeca106725	1537	* @arg @ref LL_TIM_UPDATESOURCE_COUNTER
Kojto	122:f9eeca106725	1538	*/
AnnaBridge	145:64910690c574	1539	__STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1540	{
Kojto	122:f9eeca106725	1541	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));
Kojto	122:f9eeca106725	1542	}
Kojto	122:f9eeca106725	1543
Kojto	122:f9eeca106725	1544	/**
Kojto	122:f9eeca106725	1545	* @brief Set one pulse mode (one shot v.s. repetitive).
Kojto	122:f9eeca106725	1546	* @rmtoll CR1 OPM LL_TIM_SetOnePulseMode
Kojto	122:f9eeca106725	1547	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1548	* @param OnePulseMode This parameter can be one of the following values:
Kojto	122:f9eeca106725	1549	* @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
Kojto	122:f9eeca106725	1550	* @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
Kojto	122:f9eeca106725	1551	* @retval None
Kojto	122:f9eeca106725	1552	*/
AnnaBridge	145:64910690c574	1553	__STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode)
Kojto	122:f9eeca106725	1554	{
Kojto	122:f9eeca106725	1555	MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);
Kojto	122:f9eeca106725	1556	}
Kojto	122:f9eeca106725	1557
Kojto	122:f9eeca106725	1558	/**
Kojto	122:f9eeca106725	1559	* @brief Get actual one pulse mode.
Kojto	122:f9eeca106725	1560	* @rmtoll CR1 OPM LL_TIM_GetOnePulseMode
Kojto	122:f9eeca106725	1561	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1562	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1563	* @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
Kojto	122:f9eeca106725	1564	* @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
Kojto	122:f9eeca106725	1565	*/
AnnaBridge	145:64910690c574	1566	__STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1567	{
Kojto	122:f9eeca106725	1568	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));
Kojto	122:f9eeca106725	1569	}
Kojto	122:f9eeca106725	1570
Kojto	122:f9eeca106725	1571	/**
Kojto	122:f9eeca106725	1572	* @brief Set the timer counter counting mode.
Kojto	122:f9eeca106725	1573	* @note Macro @ref IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
AnnaBridge	145:64910690c574	1574	* check whether or not the counter mode selection feature is supported
Kojto	122:f9eeca106725	1575	* by a timer instance.
Kojto	122:f9eeca106725	1576	* @rmtoll CR1 DIR LL_TIM_SetCounterMode\n
Kojto	122:f9eeca106725	1577	* CR1 CMS LL_TIM_SetCounterMode
Kojto	122:f9eeca106725	1578	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1579	* @param CounterMode This parameter can be one of the following values:
Kojto	122:f9eeca106725	1580	* @arg @ref LL_TIM_COUNTERMODE_UP
Kojto	122:f9eeca106725	1581	* @arg @ref LL_TIM_COUNTERMODE_DOWN
Kojto	122:f9eeca106725	1582	* @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
Kojto	122:f9eeca106725	1583	* @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
Kojto	122:f9eeca106725	1584	* @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
Kojto	122:f9eeca106725	1585	* @retval None
Kojto	122:f9eeca106725	1586	*/
AnnaBridge	145:64910690c574	1587	__STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode)
Kojto	122:f9eeca106725	1588	{
Kojto	122:f9eeca106725	1589	MODIFY_REG(TIMx->CR1, TIM_CR1_DIR \| TIM_CR1_CMS, CounterMode);
Kojto	122:f9eeca106725	1590	}
Kojto	122:f9eeca106725	1591
Kojto	122:f9eeca106725	1592	/**
Kojto	122:f9eeca106725	1593	* @brief Get actual counter mode.
Kojto	122:f9eeca106725	1594	* @note Macro @ref IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
AnnaBridge	145:64910690c574	1595	* check whether or not the counter mode selection feature is supported
Kojto	122:f9eeca106725	1596	* by a timer instance.
Kojto	122:f9eeca106725	1597	* @rmtoll CR1 DIR LL_TIM_GetCounterMode\n
Kojto	122:f9eeca106725	1598	* CR1 CMS LL_TIM_GetCounterMode
Kojto	122:f9eeca106725	1599	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1600	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1601	* @arg @ref LL_TIM_COUNTERMODE_UP
Kojto	122:f9eeca106725	1602	* @arg @ref LL_TIM_COUNTERMODE_DOWN
Kojto	122:f9eeca106725	1603	* @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
Kojto	122:f9eeca106725	1604	* @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
Kojto	122:f9eeca106725	1605	* @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
Kojto	122:f9eeca106725	1606	*/
AnnaBridge	145:64910690c574	1607	__STATIC_INLINE uint32_t LL_TIM_GetCounterMode(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1608	{
Kojto	122:f9eeca106725	1609	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR \| TIM_CR1_CMS));
Kojto	122:f9eeca106725	1610	}
Kojto	122:f9eeca106725	1611
Kojto	122:f9eeca106725	1612	/**
Kojto	122:f9eeca106725	1613	* @brief Enable auto-reload (ARR) preload.
Kojto	122:f9eeca106725	1614	* @rmtoll CR1 ARPE LL_TIM_EnableARRPreload
Kojto	122:f9eeca106725	1615	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1616	* @retval None
Kojto	122:f9eeca106725	1617	*/
AnnaBridge	145:64910690c574	1618	__STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1619	{
Kojto	122:f9eeca106725	1620	SET_BIT(TIMx->CR1, TIM_CR1_ARPE);
Kojto	122:f9eeca106725	1621	}
Kojto	122:f9eeca106725	1622
Kojto	122:f9eeca106725	1623	/**
Kojto	122:f9eeca106725	1624	* @brief Disable auto-reload (ARR) preload.
Kojto	122:f9eeca106725	1625	* @rmtoll CR1 ARPE LL_TIM_DisableARRPreload
Kojto	122:f9eeca106725	1626	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1627	* @retval None
Kojto	122:f9eeca106725	1628	*/
AnnaBridge	145:64910690c574	1629	__STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1630	{
Kojto	122:f9eeca106725	1631	CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);
Kojto	122:f9eeca106725	1632	}
Kojto	122:f9eeca106725	1633
Kojto	122:f9eeca106725	1634	/**
Kojto	122:f9eeca106725	1635	* @brief Indicates whether auto-reload (ARR) preload is enabled.
Kojto	122:f9eeca106725	1636	* @rmtoll CR1 ARPE LL_TIM_IsEnabledARRPreload
Kojto	122:f9eeca106725	1637	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1638	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1639	*/
AnnaBridge	145:64910690c574	1640	__STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1641	{
Kojto	122:f9eeca106725	1642	return (READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE));
Kojto	122:f9eeca106725	1643	}
Kojto	122:f9eeca106725	1644
Kojto	122:f9eeca106725	1645	/**
Kojto	122:f9eeca106725	1646	* @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters.
AnnaBridge	145:64910690c574	1647	* @note Macro @ref IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1648	* whether or not the clock division feature is supported by the timer
Kojto	122:f9eeca106725	1649	* instance.
Kojto	122:f9eeca106725	1650	* @rmtoll CR1 CKD LL_TIM_SetClockDivision
Kojto	122:f9eeca106725	1651	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1652	* @param ClockDivision This parameter can be one of the following values:
Kojto	122:f9eeca106725	1653	* @arg @ref LL_TIM_CLOCKDIVISION_DIV1
Kojto	122:f9eeca106725	1654	* @arg @ref LL_TIM_CLOCKDIVISION_DIV2
Kojto	122:f9eeca106725	1655	* @arg @ref LL_TIM_CLOCKDIVISION_DIV4
Kojto	122:f9eeca106725	1656	* @retval None
Kojto	122:f9eeca106725	1657	*/
AnnaBridge	145:64910690c574	1658	__STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision)
Kojto	122:f9eeca106725	1659	{
Kojto	122:f9eeca106725	1660	MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);
Kojto	122:f9eeca106725	1661	}
Kojto	122:f9eeca106725	1662
Kojto	122:f9eeca106725	1663	/**
Kojto	122:f9eeca106725	1664	* @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters.
AnnaBridge	145:64910690c574	1665	* @note Macro @ref IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1666	* whether or not the clock division feature is supported by the timer
Kojto	122:f9eeca106725	1667	* instance.
Kojto	122:f9eeca106725	1668	* @rmtoll CR1 CKD LL_TIM_GetClockDivision
Kojto	122:f9eeca106725	1669	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1670	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1671	* @arg @ref LL_TIM_CLOCKDIVISION_DIV1
Kojto	122:f9eeca106725	1672	* @arg @ref LL_TIM_CLOCKDIVISION_DIV2
Kojto	122:f9eeca106725	1673	* @arg @ref LL_TIM_CLOCKDIVISION_DIV4
Kojto	122:f9eeca106725	1674	*/
AnnaBridge	145:64910690c574	1675	__STATIC_INLINE uint32_t LL_TIM_GetClockDivision(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1676	{
Kojto	122:f9eeca106725	1677	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));
Kojto	122:f9eeca106725	1678	}
Kojto	122:f9eeca106725	1679
Kojto	122:f9eeca106725	1680	/**
Kojto	122:f9eeca106725	1681	* @brief Set the counter value.
AnnaBridge	145:64910690c574	1682	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1683	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	1684	* @rmtoll CNT CNT LL_TIM_SetCounter
Kojto	122:f9eeca106725	1685	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1686	* @param Counter Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)
Kojto	122:f9eeca106725	1687	* @retval None
Kojto	122:f9eeca106725	1688	*/
AnnaBridge	145:64910690c574	1689	__STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)
Kojto	122:f9eeca106725	1690	{
Kojto	122:f9eeca106725	1691	WRITE_REG(TIMx->CNT, Counter);
Kojto	122:f9eeca106725	1692	}
Kojto	122:f9eeca106725	1693
Kojto	122:f9eeca106725	1694	/**
Kojto	122:f9eeca106725	1695	* @brief Get the counter value.
AnnaBridge	145:64910690c574	1696	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1697	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	1698	* @rmtoll CNT CNT LL_TIM_GetCounter
Kojto	122:f9eeca106725	1699	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1700	* @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)
Kojto	122:f9eeca106725	1701	*/
AnnaBridge	145:64910690c574	1702	__STATIC_INLINE uint32_t LL_TIM_GetCounter(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1703	{
Kojto	122:f9eeca106725	1704	return (uint32_t)(READ_REG(TIMx->CNT));
Kojto	122:f9eeca106725	1705	}
Kojto	122:f9eeca106725	1706
Kojto	122:f9eeca106725	1707	/**
Kojto	122:f9eeca106725	1708	* @brief Get the current direction of the counter
Kojto	122:f9eeca106725	1709	* @rmtoll CR1 DIR LL_TIM_GetDirection
Kojto	122:f9eeca106725	1710	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1711	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1712	* @arg @ref LL_TIM_COUNTERDIRECTION_UP
Kojto	122:f9eeca106725	1713	* @arg @ref LL_TIM_COUNTERDIRECTION_DOWN
Kojto	122:f9eeca106725	1714	*/
AnnaBridge	145:64910690c574	1715	__STATIC_INLINE uint32_t LL_TIM_GetDirection(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1716	{
Kojto	122:f9eeca106725	1717	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
Kojto	122:f9eeca106725	1718	}
Kojto	122:f9eeca106725	1719
Kojto	122:f9eeca106725	1720	/**
Kojto	122:f9eeca106725	1721	* @brief Set the prescaler value.
Kojto	122:f9eeca106725	1722	* @note The counter clock frequency CK_CNT is equal to fCK_PSC / (PSC[15:0] + 1).
Kojto	122:f9eeca106725	1723	* @note The prescaler can be changed on the fly as this control register is buffered. The new
Kojto	122:f9eeca106725	1724	* prescaler ratio is taken into account at the next update event.
Kojto	122:f9eeca106725	1725	* @note Helper macro @ref __LL_TIM_CALC_PSC can be used to calculate the Prescaler parameter
Kojto	122:f9eeca106725	1726	* @rmtoll PSC PSC LL_TIM_SetPrescaler
Kojto	122:f9eeca106725	1727	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1728	* @param Prescaler between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	1729	* @retval None
Kojto	122:f9eeca106725	1730	*/
AnnaBridge	145:64910690c574	1731	__STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)
Kojto	122:f9eeca106725	1732	{
Kojto	122:f9eeca106725	1733	WRITE_REG(TIMx->PSC, Prescaler);
Kojto	122:f9eeca106725	1734	}
Kojto	122:f9eeca106725	1735
Kojto	122:f9eeca106725	1736	/**
Kojto	122:f9eeca106725	1737	* @brief Get the prescaler value.
Kojto	122:f9eeca106725	1738	* @rmtoll PSC PSC LL_TIM_GetPrescaler
Kojto	122:f9eeca106725	1739	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1740	* @retval Prescaler value between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	1741	*/
AnnaBridge	145:64910690c574	1742	__STATIC_INLINE uint32_t LL_TIM_GetPrescaler(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1743	{
Kojto	122:f9eeca106725	1744	return (uint32_t)(READ_REG(TIMx->PSC));
Kojto	122:f9eeca106725	1745	}
Kojto	122:f9eeca106725	1746
Kojto	122:f9eeca106725	1747	/**
Kojto	122:f9eeca106725	1748	* @brief Set the auto-reload value.
Kojto	122:f9eeca106725	1749	* @note The counter is blocked while the auto-reload value is null.
AnnaBridge	145:64910690c574	1750	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1751	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	1752	* @note Helper macro @ref __LL_TIM_CALC_ARR can be used to calculate the AutoReload parameter
Kojto	122:f9eeca106725	1753	* @rmtoll ARR ARR LL_TIM_SetAutoReload
Kojto	122:f9eeca106725	1754	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1755	* @param AutoReload between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	1756	* @retval None
Kojto	122:f9eeca106725	1757	*/
AnnaBridge	145:64910690c574	1758	__STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload)
Kojto	122:f9eeca106725	1759	{
Kojto	122:f9eeca106725	1760	WRITE_REG(TIMx->ARR, AutoReload);
Kojto	122:f9eeca106725	1761	}
Kojto	122:f9eeca106725	1762
Kojto	122:f9eeca106725	1763	/**
Kojto	122:f9eeca106725	1764	* @brief Get the auto-reload value.
Kojto	122:f9eeca106725	1765	* @rmtoll ARR ARR LL_TIM_GetAutoReload
AnnaBridge	145:64910690c574	1766	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1767	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	1768	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1769	* @retval Auto-reload value
Kojto	122:f9eeca106725	1770	*/
AnnaBridge	145:64910690c574	1771	__STATIC_INLINE uint32_t LL_TIM_GetAutoReload(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1772	{
Kojto	122:f9eeca106725	1773	return (uint32_t)(READ_REG(TIMx->ARR));
Kojto	122:f9eeca106725	1774	}
Kojto	122:f9eeca106725	1775
Kojto	122:f9eeca106725	1776	/**
Kojto	122:f9eeca106725	1777	* @brief Set the repetition counter value.
Kojto	122:f9eeca106725	1778	* @note For advanced timer instances RepetitionCounter can be up to 65535.
AnnaBridge	145:64910690c574	1779	* @note Macro @ref IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1780	* whether or not a timer instance supports a repetition counter.
Kojto	122:f9eeca106725	1781	* @rmtoll RCR REP LL_TIM_SetRepetitionCounter
Kojto	122:f9eeca106725	1782	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1783	* @param RepetitionCounter between Min_Data=0 and Max_Data=255
Kojto	122:f9eeca106725	1784	* @retval None
Kojto	122:f9eeca106725	1785	*/
AnnaBridge	145:64910690c574	1786	__STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter)
Kojto	122:f9eeca106725	1787	{
Kojto	122:f9eeca106725	1788	WRITE_REG(TIMx->RCR, RepetitionCounter);
Kojto	122:f9eeca106725	1789	}
Kojto	122:f9eeca106725	1790
Kojto	122:f9eeca106725	1791	/**
Kojto	122:f9eeca106725	1792	* @brief Get the repetition counter value.
AnnaBridge	145:64910690c574	1793	* @note Macro @ref IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1794	* whether or not a timer instance supports a repetition counter.
Kojto	122:f9eeca106725	1795	* @rmtoll RCR REP LL_TIM_GetRepetitionCounter
Kojto	122:f9eeca106725	1796	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1797	* @retval Repetition counter value
Kojto	122:f9eeca106725	1798	*/
AnnaBridge	145:64910690c574	1799	__STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1800	{
Kojto	122:f9eeca106725	1801	return (uint32_t)(READ_REG(TIMx->RCR));
Kojto	122:f9eeca106725	1802	}
Kojto	122:f9eeca106725	1803
Kojto	122:f9eeca106725	1804	/**
AnnaBridge	145:64910690c574	1805	* @brief Force a continuous copy of the update interrupt flag (UIF) into the timer counter register (bit 31).
Kojto	122:f9eeca106725	1806	* @note This allows both the counter value and a potential roll-over condition signalled by the UIFCPY flag to be read in an atomic way.
Kojto	122:f9eeca106725	1807	* @rmtoll CR1 UIFREMAP LL_TIM_EnableUIFRemap
Kojto	122:f9eeca106725	1808	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1809	* @retval None
Kojto	122:f9eeca106725	1810	*/
AnnaBridge	145:64910690c574	1811	__STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1812	{
Kojto	122:f9eeca106725	1813	SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
Kojto	122:f9eeca106725	1814	}
Kojto	122:f9eeca106725	1815
Kojto	122:f9eeca106725	1816	/**
Kojto	122:f9eeca106725	1817	* @brief Disable update interrupt flag (UIF) remapping.
Kojto	122:f9eeca106725	1818	* @rmtoll CR1 UIFREMAP LL_TIM_DisableUIFRemap
Kojto	122:f9eeca106725	1819	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1820	* @retval None
Kojto	122:f9eeca106725	1821	*/
AnnaBridge	145:64910690c574	1822	__STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1823	{
Kojto	122:f9eeca106725	1824	CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
Kojto	122:f9eeca106725	1825	}
Kojto	122:f9eeca106725	1826
Kojto	122:f9eeca106725	1827	/**
Kojto	122:f9eeca106725	1828	* @}
Kojto	122:f9eeca106725	1829	*/
Kojto	122:f9eeca106725	1830
Kojto	122:f9eeca106725	1831	/** @defgroup TIM_LL_EF_Capture_Compare Capture Compare configuration
Kojto	122:f9eeca106725	1832	* @{
Kojto	122:f9eeca106725	1833	*/
Kojto	122:f9eeca106725	1834	/**
Kojto	122:f9eeca106725	1835	* @brief Enable the capture/compare control bits (CCxE, CCxNE and OCxM) preload.
AnnaBridge	145:64910690c574	1836	* @note CCxE, CCxNE and OCxM bits are preloaded, after having been written,
Kojto	122:f9eeca106725	1837	* they are updated only when a commutation event (COM) occurs.
Kojto	122:f9eeca106725	1838	* @note Only on channels that have a complementary output.
AnnaBridge	145:64910690c574	1839	* @note Macro @ref IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1840	* whether or not a timer instance is able to generate a commutation event.
Kojto	122:f9eeca106725	1841	* @rmtoll CR2 CCPC LL_TIM_CC_EnablePreload
Kojto	122:f9eeca106725	1842	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1843	* @retval None
Kojto	122:f9eeca106725	1844	*/
AnnaBridge	145:64910690c574	1845	__STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1846	{
Kojto	122:f9eeca106725	1847	SET_BIT(TIMx->CR2, TIM_CR2_CCPC);
Kojto	122:f9eeca106725	1848	}
Kojto	122:f9eeca106725	1849
Kojto	122:f9eeca106725	1850	/**
Kojto	122:f9eeca106725	1851	* @brief Disable the capture/compare control bits (CCxE, CCxNE and OCxM) preload.
AnnaBridge	145:64910690c574	1852	* @note Macro @ref IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1853	* whether or not a timer instance is able to generate a commutation event.
Kojto	122:f9eeca106725	1854	* @rmtoll CR2 CCPC LL_TIM_CC_DisablePreload
Kojto	122:f9eeca106725	1855	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1856	* @retval None
Kojto	122:f9eeca106725	1857	*/
AnnaBridge	145:64910690c574	1858	__STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1859	{
Kojto	122:f9eeca106725	1860	CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);
Kojto	122:f9eeca106725	1861	}
Kojto	122:f9eeca106725	1862
Kojto	122:f9eeca106725	1863	/**
Kojto	122:f9eeca106725	1864	* @brief Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM).
AnnaBridge	145:64910690c574	1865	* @note Macro @ref IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	1866	* whether or not a timer instance is able to generate a commutation event.
Kojto	122:f9eeca106725	1867	* @rmtoll CR2 CCUS LL_TIM_CC_SetUpdate
Kojto	122:f9eeca106725	1868	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1869	* @param CCUpdateSource This parameter can be one of the following values:
Kojto	122:f9eeca106725	1870	* @arg @ref LL_TIM_CCUPDATESOURCE_COMG_ONLY
Kojto	122:f9eeca106725	1871	* @arg @ref LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI
Kojto	122:f9eeca106725	1872	* @retval None
Kojto	122:f9eeca106725	1873	*/
AnnaBridge	145:64910690c574	1874	__STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource)
Kojto	122:f9eeca106725	1875	{
Kojto	122:f9eeca106725	1876	MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource);
Kojto	122:f9eeca106725	1877	}
Kojto	122:f9eeca106725	1878
Kojto	122:f9eeca106725	1879	/**
Kojto	122:f9eeca106725	1880	* @brief Set the trigger of the capture/compare DMA request.
Kojto	122:f9eeca106725	1881	* @rmtoll CR2 CCDS LL_TIM_CC_SetDMAReqTrigger
Kojto	122:f9eeca106725	1882	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1883	* @param DMAReqTrigger This parameter can be one of the following values:
Kojto	122:f9eeca106725	1884	* @arg @ref LL_TIM_CCDMAREQUEST_CC
Kojto	122:f9eeca106725	1885	* @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
Kojto	122:f9eeca106725	1886	* @retval None
Kojto	122:f9eeca106725	1887	*/
AnnaBridge	145:64910690c574	1888	__STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger)
Kojto	122:f9eeca106725	1889	{
Kojto	122:f9eeca106725	1890	MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger);
Kojto	122:f9eeca106725	1891	}
Kojto	122:f9eeca106725	1892
Kojto	122:f9eeca106725	1893	/**
Kojto	122:f9eeca106725	1894	* @brief Get actual trigger of the capture/compare DMA request.
Kojto	122:f9eeca106725	1895	* @rmtoll CR2 CCDS LL_TIM_CC_GetDMAReqTrigger
Kojto	122:f9eeca106725	1896	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1897	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1898	* @arg @ref LL_TIM_CCDMAREQUEST_CC
Kojto	122:f9eeca106725	1899	* @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
Kojto	122:f9eeca106725	1900	*/
AnnaBridge	145:64910690c574	1901	__STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	1902	{
Kojto	122:f9eeca106725	1903	return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));
Kojto	122:f9eeca106725	1904	}
Kojto	122:f9eeca106725	1905
Kojto	122:f9eeca106725	1906	/**
Kojto	122:f9eeca106725	1907	* @brief Set the lock level to freeze the
Kojto	122:f9eeca106725	1908	* configuration of several capture/compare parameters.
Kojto	122:f9eeca106725	1909	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	1910	* the lock mechanism is supported by a timer instance.
Kojto	122:f9eeca106725	1911	* @rmtoll BDTR LOCK LL_TIM_CC_SetLockLevel
Kojto	122:f9eeca106725	1912	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1913	* @param LockLevel This parameter can be one of the following values:
Kojto	122:f9eeca106725	1914	* @arg @ref LL_TIM_LOCKLEVEL_OFF
Kojto	122:f9eeca106725	1915	* @arg @ref LL_TIM_LOCKLEVEL_1
Kojto	122:f9eeca106725	1916	* @arg @ref LL_TIM_LOCKLEVEL_2
Kojto	122:f9eeca106725	1917	* @arg @ref LL_TIM_LOCKLEVEL_3
Kojto	122:f9eeca106725	1918	* @retval None
Kojto	122:f9eeca106725	1919	*/
AnnaBridge	145:64910690c574	1920	__STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel)
Kojto	122:f9eeca106725	1921	{
Kojto	122:f9eeca106725	1922	MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);
Kojto	122:f9eeca106725	1923	}
Kojto	122:f9eeca106725	1924
Kojto	122:f9eeca106725	1925	/**
Kojto	122:f9eeca106725	1926	* @brief Enable capture/compare channels.
Kojto	122:f9eeca106725	1927	* @rmtoll CCER CC1E LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1928	* CCER CC1NE LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1929	* CCER CC2E LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1930	* CCER CC2NE LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1931	* CCER CC3E LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1932	* CCER CC3NE LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1933	* CCER CC4E LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1934	* CCER CC5E LL_TIM_CC_EnableChannel\n
Kojto	122:f9eeca106725	1935	* CCER CC6E LL_TIM_CC_EnableChannel
Kojto	122:f9eeca106725	1936	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1937	* @param Channels This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	1938	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	1939	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	1940	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	1941	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	1942	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	1943	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	1944	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	1945	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	1946	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	1947	* @retval None
Kojto	122:f9eeca106725	1948	*/
AnnaBridge	145:64910690c574	1949	__STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
Kojto	122:f9eeca106725	1950	{
Kojto	122:f9eeca106725	1951	SET_BIT(TIMx->CCER, Channels);
Kojto	122:f9eeca106725	1952	}
Kojto	122:f9eeca106725	1953
Kojto	122:f9eeca106725	1954	/**
Kojto	122:f9eeca106725	1955	* @brief Disable capture/compare channels.
Kojto	122:f9eeca106725	1956	* @rmtoll CCER CC1E LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1957	* CCER CC1NE LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1958	* CCER CC2E LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1959	* CCER CC2NE LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1960	* CCER CC3E LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1961	* CCER CC3NE LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1962	* CCER CC4E LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1963	* CCER CC5E LL_TIM_CC_DisableChannel\n
Kojto	122:f9eeca106725	1964	* CCER CC6E LL_TIM_CC_DisableChannel
Kojto	122:f9eeca106725	1965	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1966	* @param Channels This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	1967	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	1968	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	1969	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	1970	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	1971	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	1972	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	1973	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	1974	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	1975	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	1976	* @retval None
Kojto	122:f9eeca106725	1977	*/
AnnaBridge	145:64910690c574	1978	__STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
Kojto	122:f9eeca106725	1979	{
Kojto	122:f9eeca106725	1980	CLEAR_BIT(TIMx->CCER, Channels);
Kojto	122:f9eeca106725	1981	}
Kojto	122:f9eeca106725	1982
Kojto	122:f9eeca106725	1983	/**
Kojto	122:f9eeca106725	1984	* @brief Indicate whether channel(s) is(are) enabled.
Kojto	122:f9eeca106725	1985	* @rmtoll CCER CC1E LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1986	* CCER CC1NE LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1987	* CCER CC2E LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1988	* CCER CC2NE LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1989	* CCER CC3E LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1990	* CCER CC3NE LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1991	* CCER CC4E LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1992	* CCER CC5E LL_TIM_CC_IsEnabledChannel\n
Kojto	122:f9eeca106725	1993	* CCER CC6E LL_TIM_CC_IsEnabledChannel
Kojto	122:f9eeca106725	1994	* @param TIMx Timer instance
Kojto	122:f9eeca106725	1995	* @param Channels This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	1996	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	1997	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	1998	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	1999	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	2000	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2001	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	2002	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2003	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2004	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2005	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	2006	*/
AnnaBridge	145:64910690c574	2007	__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(TIM_TypeDef *TIMx, uint32_t Channels)
AnnaBridge	145:64910690c574	2008	{
AnnaBridge	145:64910690c574	2009	return (READ_BIT(TIMx->CCER, Channels) == (Channels));
Kojto	122:f9eeca106725	2010	}
Kojto	122:f9eeca106725	2011
Kojto	122:f9eeca106725	2012	/**
Kojto	122:f9eeca106725	2013	* @}
Kojto	122:f9eeca106725	2014	*/
Kojto	122:f9eeca106725	2015
Kojto	122:f9eeca106725	2016	/** @defgroup TIM_LL_EF_Output_Channel Output channel configuration
Kojto	122:f9eeca106725	2017	* @{
Kojto	122:f9eeca106725	2018	*/
Kojto	122:f9eeca106725	2019	/**
Kojto	122:f9eeca106725	2020	* @brief Configure an output channel.
Kojto	122:f9eeca106725	2021	* @rmtoll CCMR1 CC1S LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2022	* CCMR1 CC2S LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2023	* CCMR2 CC3S LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2024	* CCMR2 CC4S LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2025	* CCMR3 CC5S LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2026	* CCMR3 CC6S LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2027	* CCER CC1P LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2028	* CCER CC2P LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2029	* CCER CC3P LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2030	* CCER CC4P LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2031	* CCER CC5P LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2032	* CCER CC6P LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2033	* CR2 OIS1 LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2034	* CR2 OIS2 LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2035	* CR2 OIS3 LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2036	* CR2 OIS4 LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2037	* CR2 OIS5 LL_TIM_OC_ConfigOutput\n
Kojto	122:f9eeca106725	2038	* CR2 OIS6 LL_TIM_OC_ConfigOutput
Kojto	122:f9eeca106725	2039	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2040	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2041	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2042	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2043	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2044	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2045	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2046	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2047	* @param Configuration This parameter must be a combination of all the following values:
Kojto	122:f9eeca106725	2048	* @arg @ref LL_TIM_OCPOLARITY_HIGH or @ref LL_TIM_OCPOLARITY_LOW
Kojto	122:f9eeca106725	2049	* @arg @ref LL_TIM_OCIDLESTATE_LOW or @ref LL_TIM_OCIDLESTATE_HIGH
Kojto	122:f9eeca106725	2050	* @retval None
Kojto	122:f9eeca106725	2051	*/
AnnaBridge	145:64910690c574	2052	__STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)
Kojto	122:f9eeca106725	2053	{
Kojto	122:f9eeca106725	2054	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2055	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2056	CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel]));
AnnaBridge	145:64910690c574	2057	MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),
AnnaBridge	145:64910690c574	2058	(Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]);
AnnaBridge	145:64910690c574	2059	MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),
AnnaBridge	145:64910690c574	2060	(Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]);
Kojto	122:f9eeca106725	2061	}
Kojto	122:f9eeca106725	2062
Kojto	122:f9eeca106725	2063	/**
Kojto	122:f9eeca106725	2064	* @brief Define the behavior of the output reference signal OCxREF from which
Kojto	122:f9eeca106725	2065	* OCx and OCxN (when relevant) are derived.
Kojto	122:f9eeca106725	2066	* @rmtoll CCMR1 OC1M LL_TIM_OC_SetMode\n
Kojto	122:f9eeca106725	2067	* CCMR1 OC2M LL_TIM_OC_SetMode\n
Kojto	122:f9eeca106725	2068	* CCMR2 OC3M LL_TIM_OC_SetMode\n
Kojto	122:f9eeca106725	2069	* CCMR2 OC4M LL_TIM_OC_SetMode\n
Kojto	122:f9eeca106725	2070	* CCMR3 OC5M LL_TIM_OC_SetMode\n
Kojto	122:f9eeca106725	2071	* CCMR3 OC6M LL_TIM_OC_SetMode
Kojto	122:f9eeca106725	2072	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2073	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2074	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2075	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2076	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2077	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2078	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2079	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2080	* @param Mode This parameter can be one of the following values:
Kojto	122:f9eeca106725	2081	* @arg @ref LL_TIM_OCMODE_FROZEN
Kojto	122:f9eeca106725	2082	* @arg @ref LL_TIM_OCMODE_ACTIVE
Kojto	122:f9eeca106725	2083	* @arg @ref LL_TIM_OCMODE_INACTIVE
Kojto	122:f9eeca106725	2084	* @arg @ref LL_TIM_OCMODE_TOGGLE
Kojto	122:f9eeca106725	2085	* @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
Kojto	122:f9eeca106725	2086	* @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
Kojto	122:f9eeca106725	2087	* @arg @ref LL_TIM_OCMODE_PWM1
Kojto	122:f9eeca106725	2088	* @arg @ref LL_TIM_OCMODE_PWM2
Kojto	122:f9eeca106725	2089	* @arg @ref LL_TIM_OCMODE_RETRIG_OPM1
Kojto	122:f9eeca106725	2090	* @arg @ref LL_TIM_OCMODE_RETRIG_OPM2
Kojto	122:f9eeca106725	2091	* @arg @ref LL_TIM_OCMODE_COMBINED_PWM1
Kojto	122:f9eeca106725	2092	* @arg @ref LL_TIM_OCMODE_COMBINED_PWM2
Kojto	122:f9eeca106725	2093	* @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM1
Kojto	122:f9eeca106725	2094	* @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM2
Kojto	122:f9eeca106725	2095	* @retval None
Kojto	122:f9eeca106725	2096	*/
AnnaBridge	145:64910690c574	2097	__STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode)
Kojto	122:f9eeca106725	2098	{
Kojto	122:f9eeca106725	2099	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2100	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2101	MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M \| TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]);
Kojto	122:f9eeca106725	2102	}
Kojto	122:f9eeca106725	2103
Kojto	122:f9eeca106725	2104	/**
Kojto	122:f9eeca106725	2105	* @brief Get the output compare mode of an output channel.
Kojto	122:f9eeca106725	2106	* @rmtoll CCMR1 OC1M LL_TIM_OC_GetMode\n
Kojto	122:f9eeca106725	2107	* CCMR1 OC2M LL_TIM_OC_GetMode\n
Kojto	122:f9eeca106725	2108	* CCMR2 OC3M LL_TIM_OC_GetMode\n
Kojto	122:f9eeca106725	2109	* CCMR2 OC4M LL_TIM_OC_GetMode\n
Kojto	122:f9eeca106725	2110	* CCMR3 OC5M LL_TIM_OC_GetMode\n
Kojto	122:f9eeca106725	2111	* CCMR3 OC6M LL_TIM_OC_GetMode
Kojto	122:f9eeca106725	2112	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2113	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2114	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2115	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2116	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2117	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2118	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2119	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2120	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	2121	* @arg @ref LL_TIM_OCMODE_FROZEN
Kojto	122:f9eeca106725	2122	* @arg @ref LL_TIM_OCMODE_ACTIVE
Kojto	122:f9eeca106725	2123	* @arg @ref LL_TIM_OCMODE_INACTIVE
Kojto	122:f9eeca106725	2124	* @arg @ref LL_TIM_OCMODE_TOGGLE
Kojto	122:f9eeca106725	2125	* @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
Kojto	122:f9eeca106725	2126	* @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
Kojto	122:f9eeca106725	2127	* @arg @ref LL_TIM_OCMODE_PWM1
Kojto	122:f9eeca106725	2128	* @arg @ref LL_TIM_OCMODE_PWM2
Kojto	122:f9eeca106725	2129	* @arg @ref LL_TIM_OCMODE_RETRIG_OPM1
Kojto	122:f9eeca106725	2130	* @arg @ref LL_TIM_OCMODE_RETRIG_OPM2
Kojto	122:f9eeca106725	2131	* @arg @ref LL_TIM_OCMODE_COMBINED_PWM1
Kojto	122:f9eeca106725	2132	* @arg @ref LL_TIM_OCMODE_COMBINED_PWM2
Kojto	122:f9eeca106725	2133	* @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM1
Kojto	122:f9eeca106725	2134	* @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM2
Kojto	122:f9eeca106725	2135	*/
AnnaBridge	145:64910690c574	2136	__STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2137	{
Kojto	122:f9eeca106725	2138	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2139	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2140	return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M \| TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]);
Kojto	122:f9eeca106725	2141	}
Kojto	122:f9eeca106725	2142
Kojto	122:f9eeca106725	2143	/**
Kojto	122:f9eeca106725	2144	* @brief Set the polarity of an output channel.
Kojto	122:f9eeca106725	2145	* @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2146	* CCER CC1NP LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2147	* CCER CC2P LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2148	* CCER CC2NP LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2149	* CCER CC3P LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2150	* CCER CC3NP LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2151	* CCER CC4P LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2152	* CCER CC5P LL_TIM_OC_SetPolarity\n
Kojto	122:f9eeca106725	2153	* CCER CC6P LL_TIM_OC_SetPolarity
Kojto	122:f9eeca106725	2154	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2155	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2156	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2157	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	2158	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2159	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	2160	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2161	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	2162	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2163	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2164	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2165	* @param Polarity This parameter can be one of the following values:
Kojto	122:f9eeca106725	2166	* @arg @ref LL_TIM_OCPOLARITY_HIGH
Kojto	122:f9eeca106725	2167	* @arg @ref LL_TIM_OCPOLARITY_LOW
Kojto	122:f9eeca106725	2168	* @retval None
Kojto	122:f9eeca106725	2169	*/
AnnaBridge	145:64910690c574	2170	__STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity)
Kojto	122:f9eeca106725	2171	{
Kojto	122:f9eeca106725	2172	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2173	MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iChannel]);
Kojto	122:f9eeca106725	2174	}
Kojto	122:f9eeca106725	2175
Kojto	122:f9eeca106725	2176	/**
Kojto	122:f9eeca106725	2177	* @brief Get the polarity of an output channel.
Kojto	122:f9eeca106725	2178	* @rmtoll CCER CC1P LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2179	* CCER CC1NP LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2180	* CCER CC2P LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2181	* CCER CC2NP LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2182	* CCER CC3P LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2183	* CCER CC3NP LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2184	* CCER CC4P LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2185	* CCER CC5P LL_TIM_OC_GetPolarity\n
Kojto	122:f9eeca106725	2186	* CCER CC6P LL_TIM_OC_GetPolarity
Kojto	122:f9eeca106725	2187	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2188	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2189	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2190	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	2191	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2192	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	2193	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2194	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	2195	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2196	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2197	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2198	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	2199	* @arg @ref LL_TIM_OCPOLARITY_HIGH
Kojto	122:f9eeca106725	2200	* @arg @ref LL_TIM_OCPOLARITY_LOW
Kojto	122:f9eeca106725	2201	*/
AnnaBridge	145:64910690c574	2202	__STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2203	{
Kojto	122:f9eeca106725	2204	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2205	return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]);
Kojto	122:f9eeca106725	2206	}
Kojto	122:f9eeca106725	2207
Kojto	122:f9eeca106725	2208	/**
Kojto	122:f9eeca106725	2209	* @brief Set the IDLE state of an output channel
Kojto	122:f9eeca106725	2210	* @note This function is significant only for the timer instances
Kojto	122:f9eeca106725	2211	* supporting the break feature. Macro @ref IS_TIM_BREAK_INSTANCE(TIMx)
Kojto	122:f9eeca106725	2212	* can be used to check whether or not a timer instance provides
Kojto	122:f9eeca106725	2213	* a break input.
Kojto	122:f9eeca106725	2214	* @rmtoll CR2 OIS1 LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2215	* CR2 OIS2N LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2216	* CR2 OIS2 LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2217	* CR2 OIS2N LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2218	* CR2 OIS3 LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2219	* CR2 OIS3N LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2220	* CR2 OIS4 LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2221	* CR2 OIS5 LL_TIM_OC_SetIdleState\n
Kojto	122:f9eeca106725	2222	* CR2 OIS6 LL_TIM_OC_SetIdleState
Kojto	122:f9eeca106725	2223	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2224	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2225	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2226	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	2227	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2228	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	2229	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2230	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	2231	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2232	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2233	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2234	* @param IdleState This parameter can be one of the following values:
Kojto	122:f9eeca106725	2235	* @arg @ref LL_TIM_OCIDLESTATE_LOW
Kojto	122:f9eeca106725	2236	* @arg @ref LL_TIM_OCIDLESTATE_HIGH
Kojto	122:f9eeca106725	2237	* @retval None
Kojto	122:f9eeca106725	2238	*/
AnnaBridge	145:64910690c574	2239	__STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState)
Kojto	122:f9eeca106725	2240	{
Kojto	122:f9eeca106725	2241	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2242	MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iChannel]);
Kojto	122:f9eeca106725	2243	}
Kojto	122:f9eeca106725	2244
Kojto	122:f9eeca106725	2245	/**
Kojto	122:f9eeca106725	2246	* @brief Get the IDLE state of an output channel
Kojto	122:f9eeca106725	2247	* @rmtoll CR2 OIS1 LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2248	* CR2 OIS2N LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2249	* CR2 OIS2 LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2250	* CR2 OIS2N LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2251	* CR2 OIS3 LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2252	* CR2 OIS3N LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2253	* CR2 OIS4 LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2254	* CR2 OIS5 LL_TIM_OC_GetIdleState\n
Kojto	122:f9eeca106725	2255	* CR2 OIS6 LL_TIM_OC_GetIdleState
Kojto	122:f9eeca106725	2256	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2257	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2258	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2259	* @arg @ref LL_TIM_CHANNEL_CH1N
Kojto	122:f9eeca106725	2260	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2261	* @arg @ref LL_TIM_CHANNEL_CH2N
Kojto	122:f9eeca106725	2262	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2263	* @arg @ref LL_TIM_CHANNEL_CH3N
Kojto	122:f9eeca106725	2264	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2265	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2266	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2267	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	2268	* @arg @ref LL_TIM_OCIDLESTATE_LOW
Kojto	122:f9eeca106725	2269	* @arg @ref LL_TIM_OCIDLESTATE_HIGH
Kojto	122:f9eeca106725	2270	*/
AnnaBridge	145:64910690c574	2271	__STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2272	{
Kojto	122:f9eeca106725	2273	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	122:f9eeca106725	2274	return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel]);
Kojto	122:f9eeca106725	2275	}
Kojto	122:f9eeca106725	2276
Kojto	122:f9eeca106725	2277	/**
Kojto	122:f9eeca106725	2278	* @brief Enable fast mode for the output channel.
Kojto	122:f9eeca106725	2279	* @note Acts only if the channel is configured in PWM1 or PWM2 mode.
Kojto	122:f9eeca106725	2280	* @rmtoll CCMR1 OC1FE LL_TIM_OC_EnableFast\n
Kojto	122:f9eeca106725	2281	* CCMR1 OC2FE LL_TIM_OC_EnableFast\n
Kojto	122:f9eeca106725	2282	* CCMR2 OC3FE LL_TIM_OC_EnableFast\n
Kojto	122:f9eeca106725	2283	* CCMR2 OC4FE LL_TIM_OC_EnableFast\n
Kojto	122:f9eeca106725	2284	* CCMR3 OC5FE LL_TIM_OC_EnableFast\n
Kojto	122:f9eeca106725	2285	* CCMR3 OC6FE LL_TIM_OC_EnableFast
Kojto	122:f9eeca106725	2286	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2287	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2288	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2289	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2290	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2291	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2292	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2293	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2294	* @retval None
Kojto	122:f9eeca106725	2295	*/
AnnaBridge	145:64910690c574	2296	__STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2297	{
Kojto	122:f9eeca106725	2298	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2299	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2300	SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
Kojto	122:f9eeca106725	2301
Kojto	122:f9eeca106725	2302	}
Kojto	122:f9eeca106725	2303
Kojto	122:f9eeca106725	2304	/**
Kojto	122:f9eeca106725	2305	* @brief Disable fast mode for the output channel.
Kojto	122:f9eeca106725	2306	* @rmtoll CCMR1 OC1FE LL_TIM_OC_DisableFast\n
Kojto	122:f9eeca106725	2307	* CCMR1 OC2FE LL_TIM_OC_DisableFast\n
Kojto	122:f9eeca106725	2308	* CCMR2 OC3FE LL_TIM_OC_DisableFast\n
Kojto	122:f9eeca106725	2309	* CCMR2 OC4FE LL_TIM_OC_DisableFast\n
Kojto	122:f9eeca106725	2310	* CCMR3 OC5FE LL_TIM_OC_DisableFast\n
Kojto	122:f9eeca106725	2311	* CCMR3 OC6FE LL_TIM_OC_DisableFast
Kojto	122:f9eeca106725	2312	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2313	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2314	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2315	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2316	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2317	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2318	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2319	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2320	* @retval None
Kojto	122:f9eeca106725	2321	*/
AnnaBridge	145:64910690c574	2322	__STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2323	{
Kojto	122:f9eeca106725	2324	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2325	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2326	CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
Kojto	122:f9eeca106725	2327
Kojto	122:f9eeca106725	2328	}
Kojto	122:f9eeca106725	2329
Kojto	122:f9eeca106725	2330	/**
Kojto	122:f9eeca106725	2331	* @brief Indicates whether fast mode is enabled for the output channel.
Kojto	122:f9eeca106725	2332	* @rmtoll CCMR1 OC1FE LL_TIM_OC_IsEnabledFast\n
Kojto	122:f9eeca106725	2333	* CCMR1 OC2FE LL_TIM_OC_IsEnabledFast\n
Kojto	122:f9eeca106725	2334	* CCMR2 OC3FE LL_TIM_OC_IsEnabledFast\n
Kojto	122:f9eeca106725	2335	* CCMR2 OC4FE LL_TIM_OC_IsEnabledFast\n
Kojto	122:f9eeca106725	2336	* CCMR3 OC5FE LL_TIM_OC_IsEnabledFast\n
Kojto	122:f9eeca106725	2337	* CCMR3 OC6FE LL_TIM_OC_IsEnabledFast
Kojto	122:f9eeca106725	2338	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2339	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2340	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2341	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2342	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2343	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2344	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2345	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2346	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	2347	*/
AnnaBridge	145:64910690c574	2348	__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2349	{
Kojto	122:f9eeca106725	2350	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2351	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2352	register uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel];
Kojto	122:f9eeca106725	2353	return (READ_BIT(*pReg, bitfield) == bitfield);
Kojto	122:f9eeca106725	2354	}
Kojto	122:f9eeca106725	2355
Kojto	122:f9eeca106725	2356	/**
Kojto	122:f9eeca106725	2357	* @brief Enable compare register (TIMx_CCRx) preload for the output channel.
Kojto	122:f9eeca106725	2358	* @rmtoll CCMR1 OC1PE LL_TIM_OC_EnablePreload\n
Kojto	122:f9eeca106725	2359	* CCMR1 OC2PE LL_TIM_OC_EnablePreload\n
Kojto	122:f9eeca106725	2360	* CCMR2 OC3PE LL_TIM_OC_EnablePreload\n
Kojto	122:f9eeca106725	2361	* CCMR2 OC4PE LL_TIM_OC_EnablePreload\n
Kojto	122:f9eeca106725	2362	* CCMR3 OC5PE LL_TIM_OC_EnablePreload\n
Kojto	122:f9eeca106725	2363	* CCMR3 OC6PE LL_TIM_OC_EnablePreload
Kojto	122:f9eeca106725	2364	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2365	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2366	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2367	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2368	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2369	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2370	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2371	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2372	* @retval None
Kojto	122:f9eeca106725	2373	*/
AnnaBridge	145:64910690c574	2374	__STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2375	{
Kojto	122:f9eeca106725	2376	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2377	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2378	SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
Kojto	122:f9eeca106725	2379	}
Kojto	122:f9eeca106725	2380
Kojto	122:f9eeca106725	2381	/**
Kojto	122:f9eeca106725	2382	* @brief Disable compare register (TIMx_CCRx) preload for the output channel.
Kojto	122:f9eeca106725	2383	* @rmtoll CCMR1 OC1PE LL_TIM_OC_DisablePreload\n
Kojto	122:f9eeca106725	2384	* CCMR1 OC2PE LL_TIM_OC_DisablePreload\n
Kojto	122:f9eeca106725	2385	* CCMR2 OC3PE LL_TIM_OC_DisablePreload\n
Kojto	122:f9eeca106725	2386	* CCMR2 OC4PE LL_TIM_OC_DisablePreload\n
Kojto	122:f9eeca106725	2387	* CCMR3 OC5PE LL_TIM_OC_DisablePreload\n
Kojto	122:f9eeca106725	2388	* CCMR3 OC6PE LL_TIM_OC_DisablePreload
Kojto	122:f9eeca106725	2389	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2390	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2391	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2392	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2393	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2394	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2395	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2396	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2397	* @retval None
Kojto	122:f9eeca106725	2398	*/
AnnaBridge	145:64910690c574	2399	__STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2400	{
Kojto	122:f9eeca106725	2401	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2402	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2403	CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
Kojto	122:f9eeca106725	2404	}
Kojto	122:f9eeca106725	2405
Kojto	122:f9eeca106725	2406	/**
Kojto	122:f9eeca106725	2407	* @brief Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channel.
Kojto	122:f9eeca106725	2408	* @rmtoll CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload\n
Kojto	122:f9eeca106725	2409	* CCMR1 OC2PE LL_TIM_OC_IsEnabledPreload\n
Kojto	122:f9eeca106725	2410	* CCMR2 OC3PE LL_TIM_OC_IsEnabledPreload\n
Kojto	122:f9eeca106725	2411	* CCMR2 OC4PE LL_TIM_OC_IsEnabledPreload\n
Kojto	122:f9eeca106725	2412	* CCMR3 OC5PE LL_TIM_OC_IsEnabledPreload\n
Kojto	122:f9eeca106725	2413	* CCMR3 OC6PE LL_TIM_OC_IsEnabledPreload
Kojto	122:f9eeca106725	2414	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2415	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2416	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2417	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2418	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2419	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2420	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2421	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2422	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	2423	*/
AnnaBridge	145:64910690c574	2424	__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2425	{
Kojto	122:f9eeca106725	2426	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2427	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2428	register uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel];
Kojto	122:f9eeca106725	2429	return (READ_BIT(*pReg, bitfield) == bitfield);
Kojto	122:f9eeca106725	2430	}
Kojto	122:f9eeca106725	2431
Kojto	122:f9eeca106725	2432	/**
Kojto	122:f9eeca106725	2433	* @brief Enable clearing the output channel on an external event.
Kojto	122:f9eeca106725	2434	* @note This function can only be used in Output compare and PWM modes. It does not work in Forced mode.
Kojto	122:f9eeca106725	2435	* @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
Kojto	122:f9eeca106725	2436	* or not a timer instance can clear the OCxREF signal on an external event.
Kojto	122:f9eeca106725	2437	* @rmtoll CCMR1 OC1CE LL_TIM_OC_EnableClear\n
Kojto	122:f9eeca106725	2438	* CCMR1 OC2CE LL_TIM_OC_EnableClear\n
Kojto	122:f9eeca106725	2439	* CCMR2 OC3CE LL_TIM_OC_EnableClear\n
Kojto	122:f9eeca106725	2440	* CCMR2 OC4CE LL_TIM_OC_EnableClear\n
Kojto	122:f9eeca106725	2441	* CCMR3 OC5CE LL_TIM_OC_EnableClear\n
Kojto	122:f9eeca106725	2442	* CCMR3 OC6CE LL_TIM_OC_EnableClear
Kojto	122:f9eeca106725	2443	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2444	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2445	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2446	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2447	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2448	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2449	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2450	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2451	* @retval None
Kojto	122:f9eeca106725	2452	*/
AnnaBridge	145:64910690c574	2453	__STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2454	{
Kojto	122:f9eeca106725	2455	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2456	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2457	SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
Kojto	122:f9eeca106725	2458	}
Kojto	122:f9eeca106725	2459
Kojto	122:f9eeca106725	2460	/**
Kojto	122:f9eeca106725	2461	* @brief Disable clearing the output channel on an external event.
Kojto	122:f9eeca106725	2462	* @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
Kojto	122:f9eeca106725	2463	* or not a timer instance can clear the OCxREF signal on an external event.
Kojto	122:f9eeca106725	2464	* @rmtoll CCMR1 OC1CE LL_TIM_OC_DisableClear\n
Kojto	122:f9eeca106725	2465	* CCMR1 OC2CE LL_TIM_OC_DisableClear\n
Kojto	122:f9eeca106725	2466	* CCMR2 OC3CE LL_TIM_OC_DisableClear\n
Kojto	122:f9eeca106725	2467	* CCMR2 OC4CE LL_TIM_OC_DisableClear\n
Kojto	122:f9eeca106725	2468	* CCMR3 OC5CE LL_TIM_OC_DisableClear\n
Kojto	122:f9eeca106725	2469	* CCMR3 OC6CE LL_TIM_OC_DisableClear
Kojto	122:f9eeca106725	2470	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2471	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2472	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2473	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2474	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2475	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2476	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2477	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2478	* @retval None
Kojto	122:f9eeca106725	2479	*/
AnnaBridge	145:64910690c574	2480	__STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2481	{
Kojto	122:f9eeca106725	2482	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2483	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2484	CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
Kojto	122:f9eeca106725	2485	}
Kojto	122:f9eeca106725	2486
Kojto	122:f9eeca106725	2487	/**
Kojto	122:f9eeca106725	2488	* @brief Indicates clearing the output channel on an external event is enabled for the output channel.
Kojto	122:f9eeca106725	2489	* @note This function enables clearing the output channel on an external event.
Kojto	122:f9eeca106725	2490	* @note This function can only be used in Output compare and PWM modes. It does not work in Forced mode.
Kojto	122:f9eeca106725	2491	* @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
Kojto	122:f9eeca106725	2492	* or not a timer instance can clear the OCxREF signal on an external event.
Kojto	122:f9eeca106725	2493	* @rmtoll CCMR1 OC1CE LL_TIM_OC_IsEnabledClear\n
Kojto	122:f9eeca106725	2494	* CCMR1 OC2CE LL_TIM_OC_IsEnabledClear\n
Kojto	122:f9eeca106725	2495	* CCMR2 OC3CE LL_TIM_OC_IsEnabledClear\n
Kojto	122:f9eeca106725	2496	* CCMR2 OC4CE LL_TIM_OC_IsEnabledClear\n
Kojto	122:f9eeca106725	2497	* CCMR3 OC5CE LL_TIM_OC_IsEnabledClear\n
Kojto	122:f9eeca106725	2498	* CCMR3 OC6CE LL_TIM_OC_IsEnabledClear
Kojto	122:f9eeca106725	2499	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2500	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2501	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2502	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2503	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2504	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2505	* @arg @ref LL_TIM_CHANNEL_CH5
Kojto	122:f9eeca106725	2506	* @arg @ref LL_TIM_CHANNEL_CH6
Kojto	122:f9eeca106725	2507	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	2508	*/
AnnaBridge	145:64910690c574	2509	__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2510	{
Kojto	122:f9eeca106725	2511	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2512	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2513	register uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel];
Kojto	122:f9eeca106725	2514	return (READ_BIT(*pReg, bitfield) == bitfield);
Kojto	122:f9eeca106725	2515	}
Kojto	122:f9eeca106725	2516
Kojto	122:f9eeca106725	2517	/**
Kojto	122:f9eeca106725	2518	* @brief Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal and the rising edge if the Ocx and OCxN signals).
Kojto	122:f9eeca106725	2519	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2520	* dead-time insertion feature is supported by a timer instance.
Kojto	122:f9eeca106725	2521	* @note Helper macro @ref __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter
Kojto	122:f9eeca106725	2522	* @rmtoll BDTR DTG LL_TIM_OC_SetDeadTime
Kojto	122:f9eeca106725	2523	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2524	* @param DeadTime between Min_Data=0 and Max_Data=255
Kojto	122:f9eeca106725	2525	* @retval None
Kojto	122:f9eeca106725	2526	*/
AnnaBridge	145:64910690c574	2527	__STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)
Kojto	122:f9eeca106725	2528	{
Kojto	122:f9eeca106725	2529	MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);
Kojto	122:f9eeca106725	2530	}
Kojto	122:f9eeca106725	2531
Kojto	122:f9eeca106725	2532	/**
Kojto	122:f9eeca106725	2533	* @brief Set compare value for output channel 1 (TIMx_CCR1).
Kojto	122:f9eeca106725	2534	* @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
AnnaBridge	145:64910690c574	2535	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2536	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2537	* @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2538	* output channel 1 is supported by a timer instance.
Kojto	122:f9eeca106725	2539	* @rmtoll CCR1 CCR1 LL_TIM_OC_SetCompareCH1
Kojto	122:f9eeca106725	2540	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2541	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	2542	* @retval None
Kojto	122:f9eeca106725	2543	*/
AnnaBridge	145:64910690c574	2544	__STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue)
Kojto	122:f9eeca106725	2545	{
Kojto	122:f9eeca106725	2546	WRITE_REG(TIMx->CCR1, CompareValue);
Kojto	122:f9eeca106725	2547	}
Kojto	122:f9eeca106725	2548
Kojto	122:f9eeca106725	2549	/**
Kojto	122:f9eeca106725	2550	* @brief Set compare value for output channel 2 (TIMx_CCR2).
Kojto	122:f9eeca106725	2551	* @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
AnnaBridge	145:64910690c574	2552	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2553	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2554	* @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2555	* output channel 2 is supported by a timer instance.
Kojto	122:f9eeca106725	2556	* @rmtoll CCR2 CCR2 LL_TIM_OC_SetCompareCH2
Kojto	122:f9eeca106725	2557	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2558	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	2559	* @retval None
Kojto	122:f9eeca106725	2560	*/
AnnaBridge	145:64910690c574	2561	__STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue)
Kojto	122:f9eeca106725	2562	{
Kojto	122:f9eeca106725	2563	WRITE_REG(TIMx->CCR2, CompareValue);
Kojto	122:f9eeca106725	2564	}
Kojto	122:f9eeca106725	2565
Kojto	122:f9eeca106725	2566	/**
Kojto	122:f9eeca106725	2567	* @brief Set compare value for output channel 3 (TIMx_CCR3).
Kojto	122:f9eeca106725	2568	* @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
AnnaBridge	145:64910690c574	2569	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2570	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2571	* @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2572	* output channel is supported by a timer instance.
Kojto	122:f9eeca106725	2573	* @rmtoll CCR3 CCR3 LL_TIM_OC_SetCompareCH3
Kojto	122:f9eeca106725	2574	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2575	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	2576	* @retval None
Kojto	122:f9eeca106725	2577	*/
AnnaBridge	145:64910690c574	2578	__STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue)
Kojto	122:f9eeca106725	2579	{
Kojto	122:f9eeca106725	2580	WRITE_REG(TIMx->CCR3, CompareValue);
Kojto	122:f9eeca106725	2581	}
Kojto	122:f9eeca106725	2582
Kojto	122:f9eeca106725	2583	/**
Kojto	122:f9eeca106725	2584	* @brief Set compare value for output channel 4 (TIMx_CCR4).
Kojto	122:f9eeca106725	2585	* @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
AnnaBridge	145:64910690c574	2586	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2587	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2588	* @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2589	* output channel 4 is supported by a timer instance.
Kojto	122:f9eeca106725	2590	* @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4
Kojto	122:f9eeca106725	2591	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2592	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	2593	* @retval None
Kojto	122:f9eeca106725	2594	*/
AnnaBridge	145:64910690c574	2595	__STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue)
Kojto	122:f9eeca106725	2596	{
Kojto	122:f9eeca106725	2597	WRITE_REG(TIMx->CCR4, CompareValue);
Kojto	122:f9eeca106725	2598	}
Kojto	122:f9eeca106725	2599
Kojto	122:f9eeca106725	2600	/**
Kojto	122:f9eeca106725	2601	* @brief Set compare value for output channel 5 (TIMx_CCR5).
Kojto	122:f9eeca106725	2602	* @note Macro @ref IS_TIM_CC5_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2603	* output channel 5 is supported by a timer instance.
Kojto	122:f9eeca106725	2604	* @rmtoll CCR5 CCR5 LL_TIM_OC_SetCompareCH5
Kojto	122:f9eeca106725	2605	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2606	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	2607	* @retval None
Kojto	122:f9eeca106725	2608	*/
AnnaBridge	145:64910690c574	2609	__STATIC_INLINE void LL_TIM_OC_SetCompareCH5(TIM_TypeDef *TIMx, uint32_t CompareValue)
Kojto	122:f9eeca106725	2610	{
Kojto	122:f9eeca106725	2611	WRITE_REG(TIMx->CCR5, CompareValue);
Kojto	122:f9eeca106725	2612	}
Kojto	122:f9eeca106725	2613
Kojto	122:f9eeca106725	2614	/**
Kojto	122:f9eeca106725	2615	* @brief Set compare value for output channel 6 (TIMx_CCR6).
Kojto	122:f9eeca106725	2616	* @note Macro @ref IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2617	* output channel 6 is supported by a timer instance.
Kojto	122:f9eeca106725	2618	* @rmtoll CCR6 CCR6 LL_TIM_OC_SetCompareCH6
Kojto	122:f9eeca106725	2619	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2620	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	122:f9eeca106725	2621	* @retval None
Kojto	122:f9eeca106725	2622	*/
AnnaBridge	145:64910690c574	2623	__STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t CompareValue)
Kojto	122:f9eeca106725	2624	{
Kojto	122:f9eeca106725	2625	WRITE_REG(TIMx->CCR6, CompareValue);
Kojto	122:f9eeca106725	2626	}
Kojto	122:f9eeca106725	2627
Kojto	122:f9eeca106725	2628	/**
Kojto	122:f9eeca106725	2629	* @brief Get compare value (TIMx_CCR1) set for output channel 1.
Kojto	122:f9eeca106725	2630	* @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.
AnnaBridge	145:64910690c574	2631	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2632	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2633	* @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2634	* output channel 1 is supported by a timer instance.
Kojto	122:f9eeca106725	2635	* @rmtoll CCR1 CCR1 LL_TIM_OC_GetCompareCH1
Kojto	122:f9eeca106725	2636	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2637	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2638	*/
AnnaBridge	145:64910690c574	2639	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	2640	{
Kojto	122:f9eeca106725	2641	return (uint32_t)(READ_REG(TIMx->CCR1));
Kojto	122:f9eeca106725	2642	}
Kojto	122:f9eeca106725	2643
Kojto	122:f9eeca106725	2644	/**
Kojto	122:f9eeca106725	2645	* @brief Get compare value (TIMx_CCR2) set for output channel 2.
Kojto	122:f9eeca106725	2646	* @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.
AnnaBridge	145:64910690c574	2647	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2648	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2649	* @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2650	* output channel 2 is supported by a timer instance.
Kojto	122:f9eeca106725	2651	* @rmtoll CCR2 CCR2 LL_TIM_OC_GetCompareCH2
Kojto	122:f9eeca106725	2652	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2653	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2654	*/
AnnaBridge	145:64910690c574	2655	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	2656	{
Kojto	122:f9eeca106725	2657	return (uint32_t)(READ_REG(TIMx->CCR2));
Kojto	122:f9eeca106725	2658	}
Kojto	122:f9eeca106725	2659
Kojto	122:f9eeca106725	2660	/**
Kojto	122:f9eeca106725	2661	* @brief Get compare value (TIMx_CCR3) set for output channel 3.
Kojto	122:f9eeca106725	2662	* @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.
AnnaBridge	145:64910690c574	2663	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2664	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2665	* @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2666	* output channel 3 is supported by a timer instance.
Kojto	122:f9eeca106725	2667	* @rmtoll CCR3 CCR3 LL_TIM_OC_GetCompareCH3
Kojto	122:f9eeca106725	2668	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2669	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2670	*/
AnnaBridge	145:64910690c574	2671	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	2672	{
Kojto	122:f9eeca106725	2673	return (uint32_t)(READ_REG(TIMx->CCR3));
Kojto	122:f9eeca106725	2674	}
Kojto	122:f9eeca106725	2675
Kojto	122:f9eeca106725	2676	/**
Kojto	122:f9eeca106725	2677	* @brief Get compare value (TIMx_CCR4) set for output channel 4.
Kojto	122:f9eeca106725	2678	* @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.
AnnaBridge	145:64910690c574	2679	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2680	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	2681	* @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2682	* output channel 4 is supported by a timer instance.
Kojto	122:f9eeca106725	2683	* @rmtoll CCR4 CCR4 LL_TIM_OC_GetCompareCH4
Kojto	122:f9eeca106725	2684	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2685	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2686	*/
AnnaBridge	145:64910690c574	2687	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	2688	{
Kojto	122:f9eeca106725	2689	return (uint32_t)(READ_REG(TIMx->CCR4));
Kojto	122:f9eeca106725	2690	}
Kojto	122:f9eeca106725	2691
Kojto	122:f9eeca106725	2692	/**
Kojto	122:f9eeca106725	2693	* @brief Get compare value (TIMx_CCR5) set for output channel 5.
Kojto	122:f9eeca106725	2694	* @note Macro @ref IS_TIM_CC5_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2695	* output channel 5 is supported by a timer instance.
Kojto	122:f9eeca106725	2696	* @rmtoll CCR5 CCR5 LL_TIM_OC_GetCompareCH5
Kojto	122:f9eeca106725	2697	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2698	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2699	*/
AnnaBridge	145:64910690c574	2700	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	2701	{
Kojto	122:f9eeca106725	2702	return (uint32_t)(READ_REG(TIMx->CCR5));
Kojto	122:f9eeca106725	2703	}
Kojto	122:f9eeca106725	2704
Kojto	122:f9eeca106725	2705	/**
Kojto	122:f9eeca106725	2706	* @brief Get compare value (TIMx_CCR6) set for output channel 6.
Kojto	122:f9eeca106725	2707	* @note Macro @ref IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	2708	* output channel 6 is supported by a timer instance.
Kojto	122:f9eeca106725	2709	* @rmtoll CCR6 CCR6 LL_TIM_OC_GetCompareCH6
Kojto	122:f9eeca106725	2710	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2711	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	2712	*/
AnnaBridge	145:64910690c574	2713	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	2714	{
Kojto	122:f9eeca106725	2715	return (uint32_t)(READ_REG(TIMx->CCR6));
Kojto	122:f9eeca106725	2716	}
Kojto	122:f9eeca106725	2717
Kojto	122:f9eeca106725	2718	/**
Kojto	122:f9eeca106725	2719	* @brief Select on which reference signal the OC5REF is combined to.
AnnaBridge	145:64910690c574	2720	* @note Macro @ref IS_TIM_COMBINED3PHASEPWM_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	2721	* whether or not a timer instance supports the combined 3-phase PWM mode.
Kojto	122:f9eeca106725	2722	* @rmtoll CCR5 GC5C3 LL_TIM_SetCH5CombinedChannels\n
Kojto	122:f9eeca106725	2723	* CCR5 GC5C2 LL_TIM_SetCH5CombinedChannels\n
Kojto	122:f9eeca106725	2724	* CCR5 GC5C1 LL_TIM_SetCH5CombinedChannels
Kojto	122:f9eeca106725	2725	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2726	* @param GroupCH5 This parameter can be one of the following values:
Kojto	122:f9eeca106725	2727	* @arg @ref LL_TIM_GROUPCH5_NONE
Kojto	122:f9eeca106725	2728	* @arg @ref LL_TIM_GROUPCH5_OC1REFC
Kojto	122:f9eeca106725	2729	* @arg @ref LL_TIM_GROUPCH5_OC2REFC
Kojto	122:f9eeca106725	2730	* @arg @ref LL_TIM_GROUPCH5_OC3REFC
Kojto	122:f9eeca106725	2731	* @retval None
Kojto	122:f9eeca106725	2732	*/
AnnaBridge	145:64910690c574	2733	__STATIC_INLINE void LL_TIM_SetCH5CombinedChannels(TIM_TypeDef *TIMx, uint32_t GroupCH5)
Kojto	122:f9eeca106725	2734	{
Kojto	122:f9eeca106725	2735	MODIFY_REG(TIMx->CCR5, TIM_CCR5_CCR5, GroupCH5);
Kojto	122:f9eeca106725	2736	}
Kojto	122:f9eeca106725	2737
Kojto	122:f9eeca106725	2738	/**
Kojto	122:f9eeca106725	2739	* @}
Kojto	122:f9eeca106725	2740	*/
Kojto	122:f9eeca106725	2741
Kojto	122:f9eeca106725	2742	/** @defgroup TIM_LL_EF_Input_Channel Input channel configuration
Kojto	122:f9eeca106725	2743	* @{
Kojto	122:f9eeca106725	2744	*/
Kojto	122:f9eeca106725	2745	/**
Kojto	122:f9eeca106725	2746	* @brief Configure input channel.
Kojto	122:f9eeca106725	2747	* @rmtoll CCMR1 CC1S LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2748	* CCMR1 IC1PSC LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2749	* CCMR1 IC1F LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2750	* CCMR1 CC2S LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2751	* CCMR1 IC2PSC LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2752	* CCMR1 IC2F LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2753	* CCMR2 CC3S LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2754	* CCMR2 IC3PSC LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2755	* CCMR2 IC3F LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2756	* CCMR2 CC4S LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2757	* CCMR2 IC4PSC LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2758	* CCMR2 IC4F LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2759	* CCER CC1P LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2760	* CCER CC1NP LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2761	* CCER CC2P LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2762	* CCER CC2NP LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2763	* CCER CC3P LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2764	* CCER CC3NP LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2765	* CCER CC4P LL_TIM_IC_Config\n
Kojto	122:f9eeca106725	2766	* CCER CC4NP LL_TIM_IC_Config
Kojto	122:f9eeca106725	2767	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2768	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2769	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2770	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2771	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2772	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2773	* @param Configuration This parameter must be a combination of all the following values:
Kojto	122:f9eeca106725	2774	* @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI or @ref LL_TIM_ACTIVEINPUT_INDIRECTTI or @ref LL_TIM_ACTIVEINPUT_TRC
Kojto	122:f9eeca106725	2775	* @arg @ref LL_TIM_ICPSC_DIV1 or ... or @ref LL_TIM_ICPSC_DIV8
Kojto	122:f9eeca106725	2776	* @arg @ref LL_TIM_IC_FILTER_FDIV1 or ... or @ref LL_TIM_IC_FILTER_FDIV32_N8
Kojto	122:f9eeca106725	2777	* @arg @ref LL_TIM_IC_POLARITY_RISING or @ref LL_TIM_IC_POLARITY_FALLING or @ref LL_TIM_IC_POLARITY_BOTHEDGE
Kojto	122:f9eeca106725	2778	* @retval None
Kojto	122:f9eeca106725	2779	*/
AnnaBridge	145:64910690c574	2780	__STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)
Kojto	122:f9eeca106725	2781	{
Kojto	122:f9eeca106725	2782	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2783	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
AnnaBridge	145:64910690c574	2784	MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F \| TIM_CCMR1_IC1PSC \| TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]),
AnnaBridge	145:64910690c574	2785	((Configuration >> 16U) & (TIM_CCMR1_IC1F \| TIM_CCMR1_IC1PSC \| TIM_CCMR1_CC1S)) << SHIFT_TAB_ICxx[iChannel]);
AnnaBridge	145:64910690c574	2786	MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP \| TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
AnnaBridge	145:64910690c574	2787	(Configuration & (TIM_CCER_CC1NP \| TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]);
Kojto	122:f9eeca106725	2788	}
Kojto	122:f9eeca106725	2789
Kojto	122:f9eeca106725	2790	/**
Kojto	122:f9eeca106725	2791	* @brief Set the active input.
Kojto	122:f9eeca106725	2792	* @rmtoll CCMR1 CC1S LL_TIM_IC_SetActiveInput\n
Kojto	122:f9eeca106725	2793	* CCMR1 CC2S LL_TIM_IC_SetActiveInput\n
Kojto	122:f9eeca106725	2794	* CCMR2 CC3S LL_TIM_IC_SetActiveInput\n
Kojto	122:f9eeca106725	2795	* CCMR2 CC4S LL_TIM_IC_SetActiveInput
Kojto	122:f9eeca106725	2796	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2797	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2798	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2799	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2800	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2801	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2802	* @param ICActiveInput This parameter can be one of the following values:
Kojto	122:f9eeca106725	2803	* @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
Kojto	122:f9eeca106725	2804	* @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
Kojto	122:f9eeca106725	2805	* @arg @ref LL_TIM_ACTIVEINPUT_TRC
Kojto	122:f9eeca106725	2806	* @retval None
Kojto	122:f9eeca106725	2807	*/
AnnaBridge	145:64910690c574	2808	__STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiveInput)
Kojto	122:f9eeca106725	2809	{
Kojto	122:f9eeca106725	2810	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2811	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
AnnaBridge	145:64910690c574	2812	MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT_TAB_ICxx[iChannel]);
Kojto	122:f9eeca106725	2813	}
Kojto	122:f9eeca106725	2814
Kojto	122:f9eeca106725	2815	/**
Kojto	122:f9eeca106725	2816	* @brief Get the current active input.
Kojto	122:f9eeca106725	2817	* @rmtoll CCMR1 CC1S LL_TIM_IC_GetActiveInput\n
Kojto	122:f9eeca106725	2818	* CCMR1 CC2S LL_TIM_IC_GetActiveInput\n
Kojto	122:f9eeca106725	2819	* CCMR2 CC3S LL_TIM_IC_GetActiveInput\n
Kojto	122:f9eeca106725	2820	* CCMR2 CC4S LL_TIM_IC_GetActiveInput
Kojto	122:f9eeca106725	2821	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2822	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2823	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2824	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2825	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2826	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2827	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	2828	* @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
Kojto	122:f9eeca106725	2829	* @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
Kojto	122:f9eeca106725	2830	* @arg @ref LL_TIM_ACTIVEINPUT_TRC
Kojto	122:f9eeca106725	2831	*/
AnnaBridge	145:64910690c574	2832	__STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2833	{
Kojto	122:f9eeca106725	2834	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2835	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2836	return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
Kojto	122:f9eeca106725	2837	}
Kojto	122:f9eeca106725	2838
Kojto	122:f9eeca106725	2839	/**
Kojto	122:f9eeca106725	2840	* @brief Set the prescaler of input channel.
Kojto	122:f9eeca106725	2841	* @rmtoll CCMR1 IC1PSC LL_TIM_IC_SetPrescaler\n
Kojto	122:f9eeca106725	2842	* CCMR1 IC2PSC LL_TIM_IC_SetPrescaler\n
Kojto	122:f9eeca106725	2843	* CCMR2 IC3PSC LL_TIM_IC_SetPrescaler\n
Kojto	122:f9eeca106725	2844	* CCMR2 IC4PSC LL_TIM_IC_SetPrescaler
Kojto	122:f9eeca106725	2845	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2846	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2847	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2848	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2849	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2850	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2851	* @param ICPrescaler This parameter can be one of the following values:
Kojto	122:f9eeca106725	2852	* @arg @ref LL_TIM_ICPSC_DIV1
Kojto	122:f9eeca106725	2853	* @arg @ref LL_TIM_ICPSC_DIV2
Kojto	122:f9eeca106725	2854	* @arg @ref LL_TIM_ICPSC_DIV4
Kojto	122:f9eeca106725	2855	* @arg @ref LL_TIM_ICPSC_DIV8
Kojto	122:f9eeca106725	2856	* @retval None
Kojto	122:f9eeca106725	2857	*/
AnnaBridge	145:64910690c574	2858	__STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescaler)
Kojto	122:f9eeca106725	2859	{
Kojto	122:f9eeca106725	2860	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2861	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
AnnaBridge	145:64910690c574	2862	MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT_TAB_ICxx[iChannel]);
Kojto	122:f9eeca106725	2863	}
Kojto	122:f9eeca106725	2864
Kojto	122:f9eeca106725	2865	/**
Kojto	122:f9eeca106725	2866	* @brief Get the current prescaler value acting on an input channel.
Kojto	122:f9eeca106725	2867	* @rmtoll CCMR1 IC1PSC LL_TIM_IC_GetPrescaler\n
Kojto	122:f9eeca106725	2868	* CCMR1 IC2PSC LL_TIM_IC_GetPrescaler\n
Kojto	122:f9eeca106725	2869	* CCMR2 IC3PSC LL_TIM_IC_GetPrescaler\n
Kojto	122:f9eeca106725	2870	* CCMR2 IC4PSC LL_TIM_IC_GetPrescaler
Kojto	122:f9eeca106725	2871	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2872	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2873	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2874	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2875	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2876	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2877	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	2878	* @arg @ref LL_TIM_ICPSC_DIV1
Kojto	122:f9eeca106725	2879	* @arg @ref LL_TIM_ICPSC_DIV2
Kojto	122:f9eeca106725	2880	* @arg @ref LL_TIM_ICPSC_DIV4
Kojto	122:f9eeca106725	2881	* @arg @ref LL_TIM_ICPSC_DIV8
Kojto	122:f9eeca106725	2882	*/
AnnaBridge	145:64910690c574	2883	__STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2884	{
Kojto	122:f9eeca106725	2885	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2886	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
Kojto	122:f9eeca106725	2887	return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
Kojto	122:f9eeca106725	2888	}
Kojto	122:f9eeca106725	2889
Kojto	122:f9eeca106725	2890	/**
Kojto	122:f9eeca106725	2891	* @brief Set the input filter duration.
Kojto	122:f9eeca106725	2892	* @rmtoll CCMR1 IC1F LL_TIM_IC_SetFilter\n
Kojto	122:f9eeca106725	2893	* CCMR1 IC2F LL_TIM_IC_SetFilter\n
Kojto	122:f9eeca106725	2894	* CCMR2 IC3F LL_TIM_IC_SetFilter\n
Kojto	122:f9eeca106725	2895	* CCMR2 IC4F LL_TIM_IC_SetFilter
Kojto	122:f9eeca106725	2896	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2897	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2898	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2899	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2900	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2901	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2902	* @param ICFilter This parameter can be one of the following values:
Kojto	122:f9eeca106725	2903	* @arg @ref LL_TIM_IC_FILTER_FDIV1
Kojto	122:f9eeca106725	2904	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
Kojto	122:f9eeca106725	2905	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
Kojto	122:f9eeca106725	2906	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
Kojto	122:f9eeca106725	2907	* @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
Kojto	122:f9eeca106725	2908	* @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
Kojto	122:f9eeca106725	2909	* @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
Kojto	122:f9eeca106725	2910	* @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
Kojto	122:f9eeca106725	2911	* @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
Kojto	122:f9eeca106725	2912	* @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
Kojto	122:f9eeca106725	2913	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
Kojto	122:f9eeca106725	2914	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
Kojto	122:f9eeca106725	2915	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
Kojto	122:f9eeca106725	2916	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
Kojto	122:f9eeca106725	2917	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
Kojto	122:f9eeca106725	2918	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
Kojto	122:f9eeca106725	2919	* @retval None
Kojto	122:f9eeca106725	2920	*/
AnnaBridge	145:64910690c574	2921	__STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter)
Kojto	122:f9eeca106725	2922	{
Kojto	122:f9eeca106725	2923	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2924	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
AnnaBridge	145:64910690c574	2925	MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel]), (ICFilter >> 16U) << SHIFT_TAB_ICxx[iChannel]);
Kojto	122:f9eeca106725	2926	}
Kojto	122:f9eeca106725	2927
Kojto	122:f9eeca106725	2928	/**
Kojto	122:f9eeca106725	2929	* @brief Get the input filter duration.
Kojto	122:f9eeca106725	2930	* @rmtoll CCMR1 IC1F LL_TIM_IC_GetFilter\n
Kojto	122:f9eeca106725	2931	* CCMR1 IC2F LL_TIM_IC_GetFilter\n
Kojto	122:f9eeca106725	2932	* CCMR2 IC3F LL_TIM_IC_GetFilter\n
Kojto	122:f9eeca106725	2933	* CCMR2 IC4F LL_TIM_IC_GetFilter
Kojto	122:f9eeca106725	2934	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2935	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2936	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2937	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2938	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2939	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2940	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	2941	* @arg @ref LL_TIM_IC_FILTER_FDIV1
Kojto	122:f9eeca106725	2942	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
Kojto	122:f9eeca106725	2943	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
Kojto	122:f9eeca106725	2944	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
Kojto	122:f9eeca106725	2945	* @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
Kojto	122:f9eeca106725	2946	* @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
Kojto	122:f9eeca106725	2947	* @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
Kojto	122:f9eeca106725	2948	* @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
Kojto	122:f9eeca106725	2949	* @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
Kojto	122:f9eeca106725	2950	* @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
Kojto	122:f9eeca106725	2951	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
Kojto	122:f9eeca106725	2952	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
Kojto	122:f9eeca106725	2953	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
Kojto	122:f9eeca106725	2954	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
Kojto	122:f9eeca106725	2955	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
Kojto	122:f9eeca106725	2956	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
Kojto	122:f9eeca106725	2957	*/
AnnaBridge	145:64910690c574	2958	__STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	2959	{
Kojto	122:f9eeca106725	2960	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2961	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
AnnaBridge	145:64910690c574	2962	return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
Kojto	122:f9eeca106725	2963	}
Kojto	122:f9eeca106725	2964
Kojto	122:f9eeca106725	2965	/**
Kojto	122:f9eeca106725	2966	* @brief Set the input channel polarity.
Kojto	122:f9eeca106725	2967	* @rmtoll CCER CC1P LL_TIM_IC_SetPolarity\n
Kojto	122:f9eeca106725	2968	* CCER CC1NP LL_TIM_IC_SetPolarity\n
Kojto	122:f9eeca106725	2969	* CCER CC2P LL_TIM_IC_SetPolarity\n
Kojto	122:f9eeca106725	2970	* CCER CC2NP LL_TIM_IC_SetPolarity\n
Kojto	122:f9eeca106725	2971	* CCER CC3P LL_TIM_IC_SetPolarity\n
Kojto	122:f9eeca106725	2972	* CCER CC3NP LL_TIM_IC_SetPolarity\n
Kojto	122:f9eeca106725	2973	* CCER CC4P LL_TIM_IC_SetPolarity\n
Kojto	122:f9eeca106725	2974	* CCER CC4NP LL_TIM_IC_SetPolarity
Kojto	122:f9eeca106725	2975	* @param TIMx Timer instance
Kojto	122:f9eeca106725	2976	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	2977	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	2978	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	2979	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	2980	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	2981	* @param ICPolarity This parameter can be one of the following values:
Kojto	122:f9eeca106725	2982	* @arg @ref LL_TIM_IC_POLARITY_RISING
Kojto	122:f9eeca106725	2983	* @arg @ref LL_TIM_IC_POLARITY_FALLING
Kojto	122:f9eeca106725	2984	* @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
Kojto	122:f9eeca106725	2985	* @retval None
Kojto	122:f9eeca106725	2986	*/
AnnaBridge	145:64910690c574	2987	__STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity)
Kojto	122:f9eeca106725	2988	{
Kojto	122:f9eeca106725	2989	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	2990	MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP \| TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
AnnaBridge	145:64910690c574	2991	ICPolarity << SHIFT_TAB_CCxP[iChannel]);
Kojto	122:f9eeca106725	2992	}
Kojto	122:f9eeca106725	2993
Kojto	122:f9eeca106725	2994	/**
Kojto	122:f9eeca106725	2995	* @brief Get the current input channel polarity.
Kojto	122:f9eeca106725	2996	* @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n
Kojto	122:f9eeca106725	2997	* CCER CC1NP LL_TIM_IC_GetPolarity\n
Kojto	122:f9eeca106725	2998	* CCER CC2P LL_TIM_IC_GetPolarity\n
Kojto	122:f9eeca106725	2999	* CCER CC2NP LL_TIM_IC_GetPolarity\n
Kojto	122:f9eeca106725	3000	* CCER CC3P LL_TIM_IC_GetPolarity\n
Kojto	122:f9eeca106725	3001	* CCER CC3NP LL_TIM_IC_GetPolarity\n
Kojto	122:f9eeca106725	3002	* CCER CC4P LL_TIM_IC_GetPolarity\n
Kojto	122:f9eeca106725	3003	* CCER CC4NP LL_TIM_IC_GetPolarity
Kojto	122:f9eeca106725	3004	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3005	* @param Channel This parameter can be one of the following values:
Kojto	122:f9eeca106725	3006	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	122:f9eeca106725	3007	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	122:f9eeca106725	3008	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	122:f9eeca106725	3009	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	122:f9eeca106725	3010	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	3011	* @arg @ref LL_TIM_IC_POLARITY_RISING
Kojto	122:f9eeca106725	3012	* @arg @ref LL_TIM_IC_POLARITY_FALLING
Kojto	122:f9eeca106725	3013	* @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
Kojto	122:f9eeca106725	3014	*/
AnnaBridge	145:64910690c574	3015	__STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel)
Kojto	122:f9eeca106725	3016	{
Kojto	122:f9eeca106725	3017	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
AnnaBridge	145:64910690c574	3018	return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP \| TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >>
AnnaBridge	145:64910690c574	3019	SHIFT_TAB_CCxP[iChannel]);
Kojto	122:f9eeca106725	3020	}
Kojto	122:f9eeca106725	3021
Kojto	122:f9eeca106725	3022	/**
Kojto	122:f9eeca106725	3023	* @brief Connect the TIMx_CH1, CH2 and CH3 pins to the TI1 input (XOR combination).
Kojto	122:f9eeca106725	3024	* @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3025	* a timer instance provides an XOR input.
Kojto	122:f9eeca106725	3026	* @rmtoll CR2 TI1S LL_TIM_IC_EnableXORCombination
Kojto	122:f9eeca106725	3027	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3028	* @retval None
Kojto	122:f9eeca106725	3029	*/
AnnaBridge	145:64910690c574	3030	__STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3031	{
Kojto	122:f9eeca106725	3032	SET_BIT(TIMx->CR2, TIM_CR2_TI1S);
Kojto	122:f9eeca106725	3033	}
Kojto	122:f9eeca106725	3034
Kojto	122:f9eeca106725	3035	/**
Kojto	122:f9eeca106725	3036	* @brief Disconnect the TIMx_CH1, CH2 and CH3 pins from the TI1 input.
Kojto	122:f9eeca106725	3037	* @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3038	* a timer instance provides an XOR input.
Kojto	122:f9eeca106725	3039	* @rmtoll CR2 TI1S LL_TIM_IC_DisableXORCombination
Kojto	122:f9eeca106725	3040	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3041	* @retval None
Kojto	122:f9eeca106725	3042	*/
AnnaBridge	145:64910690c574	3043	__STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3044	{
Kojto	122:f9eeca106725	3045	CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);
Kojto	122:f9eeca106725	3046	}
Kojto	122:f9eeca106725	3047
Kojto	122:f9eeca106725	3048	/**
Kojto	122:f9eeca106725	3049	* @brief Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input.
Kojto	122:f9eeca106725	3050	* @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3051	* a timer instance provides an XOR input.
Kojto	122:f9eeca106725	3052	* @rmtoll CR2 TI1S LL_TIM_IC_IsEnabledXORCombination
Kojto	122:f9eeca106725	3053	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3054	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3055	*/
AnnaBridge	145:64910690c574	3056	__STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3057	{
Kojto	122:f9eeca106725	3058	return (READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S));
Kojto	122:f9eeca106725	3059	}
Kojto	122:f9eeca106725	3060
Kojto	122:f9eeca106725	3061	/**
Kojto	122:f9eeca106725	3062	* @brief Get captured value for input channel 1.
Kojto	122:f9eeca106725	3063	* @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.
AnnaBridge	145:64910690c574	3064	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3065	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	3066	* @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3067	* input channel 1 is supported by a timer instance.
Kojto	122:f9eeca106725	3068	* @rmtoll CCR1 CCR1 LL_TIM_IC_GetCaptureCH1
Kojto	122:f9eeca106725	3069	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3070	* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	3071	*/
AnnaBridge	145:64910690c574	3072	__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3073	{
Kojto	122:f9eeca106725	3074	return (uint32_t)(READ_REG(TIMx->CCR1));
Kojto	122:f9eeca106725	3075	}
Kojto	122:f9eeca106725	3076
Kojto	122:f9eeca106725	3077	/**
Kojto	122:f9eeca106725	3078	* @brief Get captured value for input channel 2.
Kojto	122:f9eeca106725	3079	* @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.
AnnaBridge	145:64910690c574	3080	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3081	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	3082	* @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3083	* input channel 2 is supported by a timer instance.
Kojto	122:f9eeca106725	3084	* @rmtoll CCR2 CCR2 LL_TIM_IC_GetCaptureCH2
Kojto	122:f9eeca106725	3085	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3086	* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	3087	*/
AnnaBridge	145:64910690c574	3088	__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3089	{
Kojto	122:f9eeca106725	3090	return (uint32_t)(READ_REG(TIMx->CCR2));
Kojto	122:f9eeca106725	3091	}
Kojto	122:f9eeca106725	3092
Kojto	122:f9eeca106725	3093	/**
Kojto	122:f9eeca106725	3094	* @brief Get captured value for input channel 3.
Kojto	122:f9eeca106725	3095	* @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.
AnnaBridge	145:64910690c574	3096	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3097	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	3098	* @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3099	* input channel 3 is supported by a timer instance.
Kojto	122:f9eeca106725	3100	* @rmtoll CCR3 CCR3 LL_TIM_IC_GetCaptureCH3
Kojto	122:f9eeca106725	3101	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3102	* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	3103	*/
AnnaBridge	145:64910690c574	3104	__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3105	{
Kojto	122:f9eeca106725	3106	return (uint32_t)(READ_REG(TIMx->CCR3));
Kojto	122:f9eeca106725	3107	}
Kojto	122:f9eeca106725	3108
Kojto	122:f9eeca106725	3109	/**
Kojto	122:f9eeca106725	3110	* @brief Get captured value for input channel 4.
Kojto	122:f9eeca106725	3111	* @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.
AnnaBridge	145:64910690c574	3112	* @note Macro @ref IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3113	* whether or not a timer instance supports a 32 bits counter.
Kojto	122:f9eeca106725	3114	* @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3115	* input channel 4 is supported by a timer instance.
Kojto	122:f9eeca106725	3116	* @rmtoll CCR4 CCR4 LL_TIM_IC_GetCaptureCH4
Kojto	122:f9eeca106725	3117	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3118	* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
Kojto	122:f9eeca106725	3119	*/
AnnaBridge	145:64910690c574	3120	__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3121	{
Kojto	122:f9eeca106725	3122	return (uint32_t)(READ_REG(TIMx->CCR4));
Kojto	122:f9eeca106725	3123	}
Kojto	122:f9eeca106725	3124
Kojto	122:f9eeca106725	3125	/**
Kojto	122:f9eeca106725	3126	* @}
Kojto	122:f9eeca106725	3127	*/
Kojto	122:f9eeca106725	3128
Kojto	122:f9eeca106725	3129	/** @defgroup TIM_LL_EF_Clock_Selection Counter clock selection
Kojto	122:f9eeca106725	3130	* @{
Kojto	122:f9eeca106725	3131	*/
Kojto	122:f9eeca106725	3132	/**
Kojto	122:f9eeca106725	3133	* @brief Enable external clock mode 2.
Kojto	122:f9eeca106725	3134	* @note When external clock mode 2 is enabled the counter is clocked by any active edge on the ETRF signal.
AnnaBridge	145:64910690c574	3135	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3136	* whether or not a timer instance supports external clock mode2.
Kojto	122:f9eeca106725	3137	* @rmtoll SMCR ECE LL_TIM_EnableExternalClock
Kojto	122:f9eeca106725	3138	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3139	* @retval None
Kojto	122:f9eeca106725	3140	*/
AnnaBridge	145:64910690c574	3141	__STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3142	{
Kojto	122:f9eeca106725	3143	SET_BIT(TIMx->SMCR, TIM_SMCR_ECE);
Kojto	122:f9eeca106725	3144	}
Kojto	122:f9eeca106725	3145
Kojto	122:f9eeca106725	3146	/**
Kojto	122:f9eeca106725	3147	* @brief Disable external clock mode 2.
AnnaBridge	145:64910690c574	3148	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3149	* whether or not a timer instance supports external clock mode2.
Kojto	122:f9eeca106725	3150	* @rmtoll SMCR ECE LL_TIM_DisableExternalClock
Kojto	122:f9eeca106725	3151	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3152	* @retval None
Kojto	122:f9eeca106725	3153	*/
AnnaBridge	145:64910690c574	3154	__STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3155	{
Kojto	122:f9eeca106725	3156	CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);
Kojto	122:f9eeca106725	3157	}
Kojto	122:f9eeca106725	3158
Kojto	122:f9eeca106725	3159	/**
Kojto	122:f9eeca106725	3160	* @brief Indicate whether external clock mode 2 is enabled.
AnnaBridge	145:64910690c574	3161	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3162	* whether or not a timer instance supports external clock mode2.
Kojto	122:f9eeca106725	3163	* @rmtoll SMCR ECE LL_TIM_IsEnabledExternalClock
Kojto	122:f9eeca106725	3164	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3165	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3166	*/
AnnaBridge	145:64910690c574	3167	__STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3168	{
Kojto	122:f9eeca106725	3169	return (READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE));
Kojto	122:f9eeca106725	3170	}
Kojto	122:f9eeca106725	3171
Kojto	122:f9eeca106725	3172	/**
Kojto	122:f9eeca106725	3173	* @brief Set the clock source of the counter clock.
AnnaBridge	145:64910690c574	3174	* @note when selected clock source is external clock mode 1, the timer input
AnnaBridge	145:64910690c574	3175	* the external clock is applied is selected by calling the @ref LL_TIM_SetTriggerInput()
AnnaBridge	145:64910690c574	3176	* function. This timer input must be configured by calling
Kojto	122:f9eeca106725	3177	* the @ref LL_TIM_IC_Config() function.
AnnaBridge	145:64910690c574	3178	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3179	* whether or not a timer instance supports external clock mode1.
AnnaBridge	145:64910690c574	3180	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3181	* whether or not a timer instance supports external clock mode2.
Kojto	122:f9eeca106725	3182	* @rmtoll SMCR SMS LL_TIM_SetClockSource\n
Kojto	122:f9eeca106725	3183	* SMCR ECE LL_TIM_SetClockSource
Kojto	122:f9eeca106725	3184	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3185	* @param ClockSource This parameter can be one of the following values:
Kojto	122:f9eeca106725	3186	* @arg @ref LL_TIM_CLOCKSOURCE_INTERNAL
Kojto	122:f9eeca106725	3187	* @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE1
Kojto	122:f9eeca106725	3188	* @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE2
Kojto	122:f9eeca106725	3189	* @retval None
Kojto	122:f9eeca106725	3190	*/
AnnaBridge	145:64910690c574	3191	__STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)
Kojto	122:f9eeca106725	3192	{
Kojto	122:f9eeca106725	3193	MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS \| TIM_SMCR_ECE, ClockSource);
Kojto	122:f9eeca106725	3194	}
Kojto	122:f9eeca106725	3195
Kojto	122:f9eeca106725	3196	/**
Kojto	122:f9eeca106725	3197	* @brief Set the encoder interface mode.
AnnaBridge	145:64910690c574	3198	* @note Macro @ref IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3199	* whether or not a timer instance supports the encoder mode.
Kojto	122:f9eeca106725	3200	* @rmtoll SMCR SMS LL_TIM_SetEncoderMode
Kojto	122:f9eeca106725	3201	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3202	* @param EncoderMode This parameter can be one of the following values:
Kojto	122:f9eeca106725	3203	* @arg @ref LL_TIM_ENCODERMODE_X2_TI1
Kojto	122:f9eeca106725	3204	* @arg @ref LL_TIM_ENCODERMODE_X2_TI2
Kojto	122:f9eeca106725	3205	* @arg @ref LL_TIM_ENCODERMODE_X4_TI12
Kojto	122:f9eeca106725	3206	* @retval None
Kojto	122:f9eeca106725	3207	*/
AnnaBridge	145:64910690c574	3208	__STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode)
Kojto	122:f9eeca106725	3209	{
Kojto	122:f9eeca106725	3210	MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode);
Kojto	122:f9eeca106725	3211	}
Kojto	122:f9eeca106725	3212
Kojto	122:f9eeca106725	3213	/**
Kojto	122:f9eeca106725	3214	* @}
Kojto	122:f9eeca106725	3215	*/
Kojto	122:f9eeca106725	3216
Kojto	122:f9eeca106725	3217	/** @defgroup TIM_LL_EF_Timer_Synchronization Timer synchronisation configuration
Kojto	122:f9eeca106725	3218	* @{
Kojto	122:f9eeca106725	3219	*/
Kojto	122:f9eeca106725	3220	/**
Kojto	122:f9eeca106725	3221	* @brief Set the trigger output (TRGO) used for timer synchronization .
AnnaBridge	145:64910690c574	3222	* @note Macro @ref IS_TIM_MASTER_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3223	* whether or not a timer instance can operate as a master timer.
Kojto	122:f9eeca106725	3224	* @rmtoll CR2 MMS LL_TIM_SetTriggerOutput
Kojto	122:f9eeca106725	3225	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3226	* @param TimerSynchronization This parameter can be one of the following values:
Kojto	122:f9eeca106725	3227	* @arg @ref LL_TIM_TRGO_RESET
Kojto	122:f9eeca106725	3228	* @arg @ref LL_TIM_TRGO_ENABLE
Kojto	122:f9eeca106725	3229	* @arg @ref LL_TIM_TRGO_UPDATE
Kojto	122:f9eeca106725	3230	* @arg @ref LL_TIM_TRGO_CC1IF
Kojto	122:f9eeca106725	3231	* @arg @ref LL_TIM_TRGO_OC1REF
Kojto	122:f9eeca106725	3232	* @arg @ref LL_TIM_TRGO_OC2REF
Kojto	122:f9eeca106725	3233	* @arg @ref LL_TIM_TRGO_OC3REF
Kojto	122:f9eeca106725	3234	* @arg @ref LL_TIM_TRGO_OC4REF
Kojto	122:f9eeca106725	3235	* @retval None
Kojto	122:f9eeca106725	3236	*/
AnnaBridge	145:64910690c574	3237	__STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)
Kojto	122:f9eeca106725	3238	{
Kojto	122:f9eeca106725	3239	MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);
Kojto	122:f9eeca106725	3240	}
Kojto	122:f9eeca106725	3241
Kojto	122:f9eeca106725	3242	/**
Kojto	122:f9eeca106725	3243	* @brief Set the trigger output 2 (TRGO2) used for ADC synchronization .
AnnaBridge	145:64910690c574	3244	* @note Macro @ref IS_TIM_TRGO2_INSTANCE(TIMx) can be used to check
Kojto	122:f9eeca106725	3245	* whether or not a timer instance can be used for ADC synchronization.
Kojto	122:f9eeca106725	3246	* @rmtoll CR2 MMS2 LL_TIM_SetTriggerOutput2
Kojto	122:f9eeca106725	3247	* @param TIMx Timer Instance
Kojto	122:f9eeca106725	3248	* @param ADCSynchronization This parameter can be one of the following values:
Kojto	122:f9eeca106725	3249	* @arg @ref LL_TIM_TRGO2_RESET
Kojto	122:f9eeca106725	3250	* @arg @ref LL_TIM_TRGO2_ENABLE
Kojto	122:f9eeca106725	3251	* @arg @ref LL_TIM_TRGO2_UPDATE
Kojto	122:f9eeca106725	3252	* @arg @ref LL_TIM_TRGO2_CC1F
Kojto	122:f9eeca106725	3253	* @arg @ref LL_TIM_TRGO2_OC1
Kojto	122:f9eeca106725	3254	* @arg @ref LL_TIM_TRGO2_OC2
Kojto	122:f9eeca106725	3255	* @arg @ref LL_TIM_TRGO2_OC3
Kojto	122:f9eeca106725	3256	* @arg @ref LL_TIM_TRGO2_OC4
Kojto	122:f9eeca106725	3257	* @arg @ref LL_TIM_TRGO2_OC5
Kojto	122:f9eeca106725	3258	* @arg @ref LL_TIM_TRGO2_OC6
Kojto	122:f9eeca106725	3259	* @arg @ref LL_TIM_TRGO2_OC4_RISINGFALLING
Kojto	122:f9eeca106725	3260	* @arg @ref LL_TIM_TRGO2_OC6_RISINGFALLING
Kojto	122:f9eeca106725	3261	* @arg @ref LL_TIM_TRGO2_OC4_RISING_OC6_RISING
Kojto	122:f9eeca106725	3262	* @arg @ref LL_TIM_TRGO2_OC4_RISING_OC6_FALLING
Kojto	122:f9eeca106725	3263	* @arg @ref LL_TIM_TRGO2_OC5_RISING_OC6_RISING
Kojto	122:f9eeca106725	3264	* @arg @ref LL_TIM_TRGO2_OC5_RISING_OC6_FALLING
Kojto	122:f9eeca106725	3265	* @retval None
Kojto	122:f9eeca106725	3266	*/
AnnaBridge	145:64910690c574	3267	__STATIC_INLINE void LL_TIM_SetTriggerOutput2(TIM_TypeDef *TIMx, uint32_t ADCSynchronization)
Kojto	122:f9eeca106725	3268	{
Kojto	122:f9eeca106725	3269	MODIFY_REG(TIMx->CR2, TIM_CR2_MMS2, ADCSynchronization);
Kojto	122:f9eeca106725	3270	}
Kojto	122:f9eeca106725	3271
Kojto	122:f9eeca106725	3272	/**
Kojto	122:f9eeca106725	3273	* @brief Set the synchronization mode of a slave timer.
AnnaBridge	145:64910690c574	3274	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3275	* a timer instance can operate as a slave timer.
Kojto	122:f9eeca106725	3276	* @rmtoll SMCR SMS LL_TIM_SetSlaveMode
Kojto	122:f9eeca106725	3277	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3278	* @param SlaveMode This parameter can be one of the following values:
Kojto	122:f9eeca106725	3279	* @arg @ref LL_TIM_SLAVEMODE_DISABLED
Kojto	122:f9eeca106725	3280	* @arg @ref LL_TIM_SLAVEMODE_RESET
Kojto	122:f9eeca106725	3281	* @arg @ref LL_TIM_SLAVEMODE_GATED
Kojto	122:f9eeca106725	3282	* @arg @ref LL_TIM_SLAVEMODE_TRIGGER
Kojto	122:f9eeca106725	3283	* @arg @ref LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER
Kojto	122:f9eeca106725	3284	* @retval None
Kojto	122:f9eeca106725	3285	*/
AnnaBridge	145:64910690c574	3286	__STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode)
Kojto	122:f9eeca106725	3287	{
Kojto	122:f9eeca106725	3288	MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode);
Kojto	122:f9eeca106725	3289	}
Kojto	122:f9eeca106725	3290
Kojto	122:f9eeca106725	3291	/**
Kojto	122:f9eeca106725	3292	* @brief Set the selects the trigger input to be used to synchronize the counter.
AnnaBridge	145:64910690c574	3293	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3294	* a timer instance can operate as a slave timer.
Kojto	122:f9eeca106725	3295	* @rmtoll SMCR TS LL_TIM_SetTriggerInput
Kojto	122:f9eeca106725	3296	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3297	* @param TriggerInput This parameter can be one of the following values:
Kojto	122:f9eeca106725	3298	* @arg @ref LL_TIM_TS_ITR0
Kojto	122:f9eeca106725	3299	* @arg @ref LL_TIM_TS_ITR1
Kojto	122:f9eeca106725	3300	* @arg @ref LL_TIM_TS_ITR2
Kojto	122:f9eeca106725	3301	* @arg @ref LL_TIM_TS_ITR3
Kojto	122:f9eeca106725	3302	* @arg @ref LL_TIM_TS_TI1F_ED
Kojto	122:f9eeca106725	3303	* @arg @ref LL_TIM_TS_TI1FP1
Kojto	122:f9eeca106725	3304	* @arg @ref LL_TIM_TS_TI2FP2
Kojto	122:f9eeca106725	3305	* @arg @ref LL_TIM_TS_ETRF
Kojto	122:f9eeca106725	3306	* @retval None
Kojto	122:f9eeca106725	3307	*/
AnnaBridge	145:64910690c574	3308	__STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput)
Kojto	122:f9eeca106725	3309	{
Kojto	122:f9eeca106725	3310	MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput);
Kojto	122:f9eeca106725	3311	}
Kojto	122:f9eeca106725	3312
Kojto	122:f9eeca106725	3313	/**
Kojto	122:f9eeca106725	3314	* @brief Enable the Master/Slave mode.
AnnaBridge	145:64910690c574	3315	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3316	* a timer instance can operate as a slave timer.
Kojto	122:f9eeca106725	3317	* @rmtoll SMCR MSM LL_TIM_EnableMasterSlaveMode
Kojto	122:f9eeca106725	3318	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3319	* @retval None
Kojto	122:f9eeca106725	3320	*/
AnnaBridge	145:64910690c574	3321	__STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3322	{
Kojto	122:f9eeca106725	3323	SET_BIT(TIMx->SMCR, TIM_SMCR_MSM);
Kojto	122:f9eeca106725	3324	}
Kojto	122:f9eeca106725	3325
Kojto	122:f9eeca106725	3326	/**
Kojto	122:f9eeca106725	3327	* @brief Disable the Master/Slave mode.
AnnaBridge	145:64910690c574	3328	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3329	* a timer instance can operate as a slave timer.
Kojto	122:f9eeca106725	3330	* @rmtoll SMCR MSM LL_TIM_DisableMasterSlaveMode
Kojto	122:f9eeca106725	3331	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3332	* @retval None
Kojto	122:f9eeca106725	3333	*/
AnnaBridge	145:64910690c574	3334	__STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3335	{
Kojto	122:f9eeca106725	3336	CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);
Kojto	122:f9eeca106725	3337	}
Kojto	122:f9eeca106725	3338
Kojto	122:f9eeca106725	3339	/**
Kojto	122:f9eeca106725	3340	* @brief Indicates whether the Master/Slave mode is enabled.
AnnaBridge	145:64910690c574	3341	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3342	* a timer instance can operate as a slave timer.
Kojto	122:f9eeca106725	3343	* @rmtoll SMCR MSM LL_TIM_IsEnabledMasterSlaveMode
Kojto	122:f9eeca106725	3344	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3345	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3346	*/
AnnaBridge	145:64910690c574	3347	__STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3348	{
Kojto	122:f9eeca106725	3349	return (READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM));
Kojto	122:f9eeca106725	3350	}
Kojto	122:f9eeca106725	3351
Kojto	122:f9eeca106725	3352	/**
Kojto	122:f9eeca106725	3353	* @brief Configure the external trigger (ETR) input.
AnnaBridge	145:64910690c574	3354	* @note Macro @ref IS_TIM_ETR_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3355	* a timer instance provides an external trigger input.
Kojto	122:f9eeca106725	3356	* @rmtoll SMCR ETP LL_TIM_ConfigETR\n
Kojto	122:f9eeca106725	3357	* SMCR ETPS LL_TIM_ConfigETR\n
Kojto	122:f9eeca106725	3358	* SMCR ETF LL_TIM_ConfigETR
Kojto	122:f9eeca106725	3359	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3360	* @param ETRPolarity This parameter can be one of the following values:
Kojto	122:f9eeca106725	3361	* @arg @ref LL_TIM_ETR_POLARITY_NONINVERTED
Kojto	122:f9eeca106725	3362	* @arg @ref LL_TIM_ETR_POLARITY_INVERTED
Kojto	122:f9eeca106725	3363	* @param ETRPrescaler This parameter can be one of the following values:
Kojto	122:f9eeca106725	3364	* @arg @ref LL_TIM_ETR_PRESCALER_DIV1
Kojto	122:f9eeca106725	3365	* @arg @ref LL_TIM_ETR_PRESCALER_DIV2
Kojto	122:f9eeca106725	3366	* @arg @ref LL_TIM_ETR_PRESCALER_DIV4
Kojto	122:f9eeca106725	3367	* @arg @ref LL_TIM_ETR_PRESCALER_DIV8
Kojto	122:f9eeca106725	3368	* @param ETRFilter This parameter can be one of the following values:
Kojto	122:f9eeca106725	3369	* @arg @ref LL_TIM_ETR_FILTER_FDIV1
Kojto	122:f9eeca106725	3370	* @arg @ref LL_TIM_ETR_FILTER_FDIV1_N2
Kojto	122:f9eeca106725	3371	* @arg @ref LL_TIM_ETR_FILTER_FDIV1_N4
Kojto	122:f9eeca106725	3372	* @arg @ref LL_TIM_ETR_FILTER_FDIV1_N8
Kojto	122:f9eeca106725	3373	* @arg @ref LL_TIM_ETR_FILTER_FDIV2_N6
Kojto	122:f9eeca106725	3374	* @arg @ref LL_TIM_ETR_FILTER_FDIV2_N8
Kojto	122:f9eeca106725	3375	* @arg @ref LL_TIM_ETR_FILTER_FDIV4_N6
Kojto	122:f9eeca106725	3376	* @arg @ref LL_TIM_ETR_FILTER_FDIV4_N8
Kojto	122:f9eeca106725	3377	* @arg @ref LL_TIM_ETR_FILTER_FDIV8_N6
Kojto	122:f9eeca106725	3378	* @arg @ref LL_TIM_ETR_FILTER_FDIV8_N8
Kojto	122:f9eeca106725	3379	* @arg @ref LL_TIM_ETR_FILTER_FDIV16_N5
Kojto	122:f9eeca106725	3380	* @arg @ref LL_TIM_ETR_FILTER_FDIV16_N6
Kojto	122:f9eeca106725	3381	* @arg @ref LL_TIM_ETR_FILTER_FDIV16_N8
Kojto	122:f9eeca106725	3382	* @arg @ref LL_TIM_ETR_FILTER_FDIV32_N5
Kojto	122:f9eeca106725	3383	* @arg @ref LL_TIM_ETR_FILTER_FDIV32_N6
Kojto	122:f9eeca106725	3384	* @arg @ref LL_TIM_ETR_FILTER_FDIV32_N8
Kojto	122:f9eeca106725	3385	* @retval None
Kojto	122:f9eeca106725	3386	*/
AnnaBridge	145:64910690c574	3387	__STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescaler,
AnnaBridge	145:64910690c574	3388	uint32_t ETRFilter)
Kojto	122:f9eeca106725	3389	{
Kojto	122:f9eeca106725	3390	MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP \| TIM_SMCR_ETPS \| TIM_SMCR_ETF, ETRPolarity \| ETRPrescaler \| ETRFilter);
Kojto	122:f9eeca106725	3391	}
Kojto	122:f9eeca106725	3392
Kojto	122:f9eeca106725	3393	/**
Kojto	122:f9eeca106725	3394	* @brief Select the external trigger (ETR) input source.
Kojto	122:f9eeca106725	3395	* @note Macro @ref IS_TIM_ETRSEL_INSTANCE(TIMx) can be used to check whether or
Kojto	122:f9eeca106725	3396	* not a timer instance supports ETR source selection.
Kojto	122:f9eeca106725	3397	* @rmtoll OR2 ETRSEL LL_TIM_SetETRSource
Kojto	122:f9eeca106725	3398	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3399	* @param ETRSource This parameter can be one of the following values:
Kojto	122:f9eeca106725	3400	* @arg @ref LL_TIM_ETRSOURCE_LEGACY
Kojto	122:f9eeca106725	3401	* @arg @ref LL_TIM_ETRSOURCE_COMP1
Kojto	122:f9eeca106725	3402	* @arg @ref LL_TIM_ETRSOURCE_COMP2
Kojto	122:f9eeca106725	3403	* @retval None
Kojto	122:f9eeca106725	3404	*/
AnnaBridge	145:64910690c574	3405	__STATIC_INLINE void LL_TIM_SetETRSource(TIM_TypeDef *TIMx, uint32_t ETRSource)
Kojto	122:f9eeca106725	3406	{
Kojto	122:f9eeca106725	3407
Kojto	122:f9eeca106725	3408	MODIFY_REG(TIMx->OR2, TIMx_OR2_ETRSEL, ETRSource);
Kojto	122:f9eeca106725	3409	}
Kojto	122:f9eeca106725	3410
Kojto	122:f9eeca106725	3411	/**
Kojto	122:f9eeca106725	3412	* @}
Kojto	122:f9eeca106725	3413	*/
Kojto	122:f9eeca106725	3414
Kojto	122:f9eeca106725	3415	/** @defgroup TIM_LL_EF_Break_Function Break function configuration
Kojto	122:f9eeca106725	3416	* @{
Kojto	122:f9eeca106725	3417	*/
Kojto	122:f9eeca106725	3418	/**
Kojto	122:f9eeca106725	3419	* @brief Enable the break function.
AnnaBridge	145:64910690c574	3420	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3421	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3422	* @rmtoll BDTR BKE LL_TIM_EnableBRK
Kojto	122:f9eeca106725	3423	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3424	* @retval None
Kojto	122:f9eeca106725	3425	*/
AnnaBridge	145:64910690c574	3426	__STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3427	{
Kojto	122:f9eeca106725	3428	SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);
Kojto	122:f9eeca106725	3429	}
Kojto	122:f9eeca106725	3430
Kojto	122:f9eeca106725	3431	/**
Kojto	122:f9eeca106725	3432	* @brief Disable the break function.
Kojto	122:f9eeca106725	3433	* @rmtoll BDTR BKE LL_TIM_DisableBRK
Kojto	122:f9eeca106725	3434	* @param TIMx Timer instance
AnnaBridge	145:64910690c574	3435	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3436	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3437	* @retval None
Kojto	122:f9eeca106725	3438	*/
AnnaBridge	145:64910690c574	3439	__STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3440	{
Kojto	122:f9eeca106725	3441	CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);
Kojto	122:f9eeca106725	3442	}
Kojto	122:f9eeca106725	3443
Kojto	122:f9eeca106725	3444	/**
Kojto	122:f9eeca106725	3445	* @brief Configure the break input.
AnnaBridge	145:64910690c574	3446	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3447	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3448	* @rmtoll BDTR BKP LL_TIM_ConfigBRK\n
Kojto	122:f9eeca106725	3449	* BDTR BKF LL_TIM_ConfigBRK
Kojto	122:f9eeca106725	3450	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3451	* @param BreakPolarity This parameter can be one of the following values:
Kojto	122:f9eeca106725	3452	* @arg @ref LL_TIM_BREAK_POLARITY_LOW
Kojto	122:f9eeca106725	3453	* @arg @ref LL_TIM_BREAK_POLARITY_HIGH
Kojto	122:f9eeca106725	3454	* @param BreakFilter This parameter can be one of the following values:
Kojto	122:f9eeca106725	3455	* @arg @ref LL_TIM_BREAK_FILTER_FDIV1
Kojto	122:f9eeca106725	3456	* @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N2
Kojto	122:f9eeca106725	3457	* @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N4
Kojto	122:f9eeca106725	3458	* @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N8
Kojto	122:f9eeca106725	3459	* @arg @ref LL_TIM_BREAK_FILTER_FDIV2_N6
Kojto	122:f9eeca106725	3460	* @arg @ref LL_TIM_BREAK_FILTER_FDIV2_N8
Kojto	122:f9eeca106725	3461	* @arg @ref LL_TIM_BREAK_FILTER_FDIV4_N6
Kojto	122:f9eeca106725	3462	* @arg @ref LL_TIM_BREAK_FILTER_FDIV4_N8
Kojto	122:f9eeca106725	3463	* @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N6
Kojto	122:f9eeca106725	3464	* @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N8
Kojto	122:f9eeca106725	3465	* @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N5
Kojto	122:f9eeca106725	3466	* @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N6
Kojto	122:f9eeca106725	3467	* @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N8
Kojto	122:f9eeca106725	3468	* @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N5
Kojto	122:f9eeca106725	3469	* @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N6
Kojto	122:f9eeca106725	3470	* @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8
Kojto	122:f9eeca106725	3471	* @retval None
Kojto	122:f9eeca106725	3472	*/
AnnaBridge	145:64910690c574	3473	__STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, uint32_t BreakFilter)
Kojto	122:f9eeca106725	3474	{
Kojto	122:f9eeca106725	3475	MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP \| TIM_BDTR_BKF, BreakPolarity \| BreakFilter);
Kojto	122:f9eeca106725	3476	}
Kojto	122:f9eeca106725	3477
Kojto	122:f9eeca106725	3478	/**
Kojto	122:f9eeca106725	3479	* @brief Enable the break 2 function.
AnnaBridge	145:64910690c574	3480	* @note Macro @ref IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3481	* a timer instance provides a second break input.
Kojto	122:f9eeca106725	3482	* @rmtoll BDTR BK2E LL_TIM_EnableBRK2
Kojto	122:f9eeca106725	3483	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3484	* @retval None
Kojto	122:f9eeca106725	3485	*/
AnnaBridge	145:64910690c574	3486	__STATIC_INLINE void LL_TIM_EnableBRK2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3487	{
Kojto	122:f9eeca106725	3488	SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E);
Kojto	122:f9eeca106725	3489	}
Kojto	122:f9eeca106725	3490
Kojto	122:f9eeca106725	3491	/**
Kojto	122:f9eeca106725	3492	* @brief Disable the break 2 function.
AnnaBridge	145:64910690c574	3493	* @note Macro @ref IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3494	* a timer instance provides a second break input.
Kojto	122:f9eeca106725	3495	* @rmtoll BDTR BK2E LL_TIM_DisableBRK2
Kojto	122:f9eeca106725	3496	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3497	* @retval None
Kojto	122:f9eeca106725	3498	*/
AnnaBridge	145:64910690c574	3499	__STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3500	{
Kojto	122:f9eeca106725	3501	CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E);
Kojto	122:f9eeca106725	3502	}
Kojto	122:f9eeca106725	3503
Kojto	122:f9eeca106725	3504	/**
Kojto	122:f9eeca106725	3505	* @brief Configure the break 2 input.
AnnaBridge	145:64910690c574	3506	* @note Macro @ref IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3507	* a timer instance provides a second break input.
Kojto	122:f9eeca106725	3508	* @rmtoll BDTR BK2P LL_TIM_ConfigBRK2\n
Kojto	122:f9eeca106725	3509	* BDTR BK2F LL_TIM_ConfigBRK2
Kojto	122:f9eeca106725	3510	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3511	* @param Break2Polarity This parameter can be one of the following values:
Kojto	122:f9eeca106725	3512	* @arg @ref LL_TIM_BREAK2_POLARITY_LOW
Kojto	122:f9eeca106725	3513	* @arg @ref LL_TIM_BREAK2_POLARITY_HIGH
Kojto	122:f9eeca106725	3514	* @param Break2Filter This parameter can be one of the following values:
Kojto	122:f9eeca106725	3515	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV1
Kojto	122:f9eeca106725	3516	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N2
Kojto	122:f9eeca106725	3517	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N4
Kojto	122:f9eeca106725	3518	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N8
Kojto	122:f9eeca106725	3519	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N6
Kojto	122:f9eeca106725	3520	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N8
Kojto	122:f9eeca106725	3521	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N6
Kojto	122:f9eeca106725	3522	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N8
Kojto	122:f9eeca106725	3523	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N6
Kojto	122:f9eeca106725	3524	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N8
Kojto	122:f9eeca106725	3525	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N5
Kojto	122:f9eeca106725	3526	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6
Kojto	122:f9eeca106725	3527	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8
Kojto	122:f9eeca106725	3528	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5
Kojto	122:f9eeca106725	3529	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N6
Kojto	122:f9eeca106725	3530	* @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N8
Kojto	122:f9eeca106725	3531	* @retval None
Kojto	122:f9eeca106725	3532	*/
AnnaBridge	145:64910690c574	3533	__STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2Filter)
Kojto	122:f9eeca106725	3534	{
Kojto	122:f9eeca106725	3535	MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P \| TIM_BDTR_BK2F, Break2Polarity \| Break2Filter);
Kojto	122:f9eeca106725	3536	}
Kojto	122:f9eeca106725	3537
Kojto	122:f9eeca106725	3538	/**
Kojto	122:f9eeca106725	3539	* @brief Select the outputs off state (enabled v.s. disabled) in Idle and Run modes.
AnnaBridge	145:64910690c574	3540	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3541	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3542	* @rmtoll BDTR OSSI LL_TIM_SetOffStates\n
Kojto	122:f9eeca106725	3543	* BDTR OSSR LL_TIM_SetOffStates
Kojto	122:f9eeca106725	3544	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3545	* @param OffStateIdle This parameter can be one of the following values:
Kojto	122:f9eeca106725	3546	* @arg @ref LL_TIM_OSSI_DISABLE
Kojto	122:f9eeca106725	3547	* @arg @ref LL_TIM_OSSI_ENABLE
Kojto	122:f9eeca106725	3548	* @param OffStateRun This parameter can be one of the following values:
Kojto	122:f9eeca106725	3549	* @arg @ref LL_TIM_OSSR_DISABLE
Kojto	122:f9eeca106725	3550	* @arg @ref LL_TIM_OSSR_ENABLE
Kojto	122:f9eeca106725	3551	* @retval None
Kojto	122:f9eeca106725	3552	*/
AnnaBridge	145:64910690c574	3553	__STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStateRun)
Kojto	122:f9eeca106725	3554	{
Kojto	122:f9eeca106725	3555	MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI \| TIM_BDTR_OSSR, OffStateIdle \| OffStateRun);
Kojto	122:f9eeca106725	3556	}
Kojto	122:f9eeca106725	3557
Kojto	122:f9eeca106725	3558	/**
Kojto	122:f9eeca106725	3559	* @brief Enable automatic output (MOE can be set by software or automatically when a break input is active).
AnnaBridge	145:64910690c574	3560	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3561	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3562	* @rmtoll BDTR AOE LL_TIM_EnableAutomaticOutput
Kojto	122:f9eeca106725	3563	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3564	* @retval None
Kojto	122:f9eeca106725	3565	*/
AnnaBridge	145:64910690c574	3566	__STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3567	{
Kojto	122:f9eeca106725	3568	SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);
Kojto	122:f9eeca106725	3569	}
Kojto	122:f9eeca106725	3570
Kojto	122:f9eeca106725	3571	/**
Kojto	122:f9eeca106725	3572	* @brief Disable automatic output (MOE can be set only by software).
AnnaBridge	145:64910690c574	3573	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3574	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3575	* @rmtoll BDTR AOE LL_TIM_DisableAutomaticOutput
Kojto	122:f9eeca106725	3576	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3577	* @retval None
Kojto	122:f9eeca106725	3578	*/
AnnaBridge	145:64910690c574	3579	__STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3580	{
Kojto	122:f9eeca106725	3581	CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);
Kojto	122:f9eeca106725	3582	}
Kojto	122:f9eeca106725	3583
Kojto	122:f9eeca106725	3584	/**
Kojto	122:f9eeca106725	3585	* @brief Indicate whether automatic output is enabled.
AnnaBridge	145:64910690c574	3586	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3587	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3588	* @rmtoll BDTR AOE LL_TIM_IsEnabledAutomaticOutput
Kojto	122:f9eeca106725	3589	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3590	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3591	*/
AnnaBridge	145:64910690c574	3592	__STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3593	{
Kojto	122:f9eeca106725	3594	return (READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE));
Kojto	122:f9eeca106725	3595	}
Kojto	122:f9eeca106725	3596
Kojto	122:f9eeca106725	3597	/**
Kojto	122:f9eeca106725	3598	* @brief Enable the outputs (set the MOE bit in TIMx_BDTR register).
Kojto	122:f9eeca106725	3599	* @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by
Kojto	122:f9eeca106725	3600	* software and is reset in case of break or break2 event
AnnaBridge	145:64910690c574	3601	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3602	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3603	* @rmtoll BDTR MOE LL_TIM_EnableAllOutputs
Kojto	122:f9eeca106725	3604	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3605	* @retval None
Kojto	122:f9eeca106725	3606	*/
AnnaBridge	145:64910690c574	3607	__STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3608	{
Kojto	122:f9eeca106725	3609	SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);
Kojto	122:f9eeca106725	3610	}
Kojto	122:f9eeca106725	3611
Kojto	122:f9eeca106725	3612	/**
Kojto	122:f9eeca106725	3613	* @brief Disable the outputs (reset the MOE bit in TIMx_BDTR register).
Kojto	122:f9eeca106725	3614	* @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by
Kojto	122:f9eeca106725	3615	* software and is reset in case of break or break2 event.
AnnaBridge	145:64910690c574	3616	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3617	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3618	* @rmtoll BDTR MOE LL_TIM_DisableAllOutputs
Kojto	122:f9eeca106725	3619	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3620	* @retval None
Kojto	122:f9eeca106725	3621	*/
AnnaBridge	145:64910690c574	3622	__STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3623	{
Kojto	122:f9eeca106725	3624	CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);
Kojto	122:f9eeca106725	3625	}
Kojto	122:f9eeca106725	3626
Kojto	122:f9eeca106725	3627	/**
Kojto	122:f9eeca106725	3628	* @brief Indicates whether outputs are enabled.
AnnaBridge	145:64910690c574	3629	* @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3630	* a timer instance provides a break input.
Kojto	122:f9eeca106725	3631	* @rmtoll BDTR MOE LL_TIM_IsEnabledAllOutputs
Kojto	122:f9eeca106725	3632	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3633	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	3634	*/
AnnaBridge	145:64910690c574	3635	__STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	3636	{
Kojto	122:f9eeca106725	3637	return (READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE));
Kojto	122:f9eeca106725	3638	}
Kojto	122:f9eeca106725	3639
Kojto	122:f9eeca106725	3640	/**
Kojto	122:f9eeca106725	3641	* @brief Enable the signals connected to the designated timer break input.
Kojto	122:f9eeca106725	3642	* @note Macro @ref IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
Kojto	122:f9eeca106725	3643	* or not a timer instance allows for break input selection.
Kojto	122:f9eeca106725	3644	* @rmtoll OR2 BKINE LL_TIM_EnableBreakInputSource\n
Kojto	122:f9eeca106725	3645	* OR2 BKCMP1E LL_TIM_EnableBreakInputSource\n
Kojto	122:f9eeca106725	3646	* OR2 BKCMP2E LL_TIM_EnableBreakInputSource\n
Kojto	122:f9eeca106725	3647	* OR2 BKDFBK0E LL_TIM_EnableBreakInputSource\n
Kojto	122:f9eeca106725	3648	* OR3 BKINE LL_TIM_EnableBreakInputSource\n
Kojto	122:f9eeca106725	3649	* OR3 BKCMP1E LL_TIM_EnableBreakInputSource\n
Kojto	122:f9eeca106725	3650	* OR3 BKCMP2E LL_TIM_EnableBreakInputSource\n
Kojto	122:f9eeca106725	3651	* OR3 BKDFBK0E LL_TIM_EnableBreakInputSource
Kojto	122:f9eeca106725	3652	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3653	* @param BreakInput This parameter can be one of the following values:
Kojto	122:f9eeca106725	3654	* @arg @ref LL_TIM_BREAK_INPUT_BKIN
Kojto	122:f9eeca106725	3655	* @arg @ref LL_TIM_BREAK_INPUT_BKIN2
Kojto	122:f9eeca106725	3656	* @param Source This parameter can be one of the following values:
Kojto	122:f9eeca106725	3657	* @arg @ref LL_TIM_BKIN_SOURCE_BKIN
Kojto	122:f9eeca106725	3658	* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP1
Kojto	122:f9eeca106725	3659	* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP2
Kojto	122:f9eeca106725	3660	* @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
Kojto	122:f9eeca106725	3661	* @retval None
Kojto	122:f9eeca106725	3662	*/
AnnaBridge	145:64910690c574	3663	__STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t Source)
AnnaBridge	145:64910690c574	3664	{
AnnaBridge	145:64910690c574	3665	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->OR2) + BreakInput));
AnnaBridge	145:64910690c574	3666	SET_BIT(*pReg , Source);
Kojto	122:f9eeca106725	3667	}
Kojto	122:f9eeca106725	3668
Kojto	122:f9eeca106725	3669	/**
Kojto	122:f9eeca106725	3670	* @brief Disable the signals connected to the designated timer break input.
Kojto	122:f9eeca106725	3671	* @note Macro @ref IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
Kojto	122:f9eeca106725	3672	* or not a timer instance allows for break input selection.
Kojto	122:f9eeca106725	3673	* @rmtoll OR2 BKINE LL_TIM_DisableBreakInputSource\n
Kojto	122:f9eeca106725	3674	* OR2 BKCMP1E LL_TIM_DisableBreakInputSource\n
Kojto	122:f9eeca106725	3675	* OR2 BKCMP2E LL_TIM_DisableBreakInputSource\n
Kojto	122:f9eeca106725	3676	* OR2 BKDFBK0E LL_TIM_DisableBreakInputSource\n
Kojto	122:f9eeca106725	3677	* OR3 BKINE LL_TIM_DisableBreakInputSource\n
Kojto	122:f9eeca106725	3678	* OR3 BKCMP1E LL_TIM_DisableBreakInputSource\n
Kojto	122:f9eeca106725	3679	* OR3 BKCMP2E LL_TIM_DisableBreakInputSource\n
Kojto	122:f9eeca106725	3680	* OR3 BKDFBK0E LL_TIM_DisableBreakInputSource
Kojto	122:f9eeca106725	3681	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3682	* @param BreakInput This parameter can be one of the following values:
Kojto	122:f9eeca106725	3683	* @arg @ref LL_TIM_BREAK_INPUT_BKIN
Kojto	122:f9eeca106725	3684	* @arg @ref LL_TIM_BREAK_INPUT_BKIN2
Kojto	122:f9eeca106725	3685	* @param Source This parameter can be one of the following values:
Kojto	122:f9eeca106725	3686	* @arg @ref LL_TIM_BKIN_SOURCE_BKIN
Kojto	122:f9eeca106725	3687	* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP1
Kojto	122:f9eeca106725	3688	* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP2
Kojto	122:f9eeca106725	3689	* @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
Kojto	122:f9eeca106725	3690	* @retval None
Kojto	122:f9eeca106725	3691	*/
AnnaBridge	145:64910690c574	3692	__STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t Source)
AnnaBridge	145:64910690c574	3693	{
AnnaBridge	145:64910690c574	3694	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->OR2) + BreakInput));
AnnaBridge	145:64910690c574	3695	CLEAR_BIT(*pReg, Source);
Kojto	122:f9eeca106725	3696	}
Kojto	122:f9eeca106725	3697
Kojto	122:f9eeca106725	3698	/**
Kojto	122:f9eeca106725	3699	* @brief Set the polarity of the break signal for the timer break input.
Kojto	122:f9eeca106725	3700	* @note Macro @ref IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
Kojto	122:f9eeca106725	3701	* or not a timer instance allows for break input selection.
Kojto	122:f9eeca106725	3702	* @rmtoll OR2 BKINE LL_TIM_SetBreakInputSourcePolarity\n
Kojto	122:f9eeca106725	3703	* OR2 BKCMP1E LL_TIM_SetBreakInputSourcePolarity\n
Kojto	122:f9eeca106725	3704	* OR2 BKCMP2E LL_TIM_SetBreakInputSourcePolarity\n
Kojto	122:f9eeca106725	3705	* OR2 BKINP LL_TIM_SetBreakInputSourcePolarity\n
Kojto	122:f9eeca106725	3706	* OR3 BKINE LL_TIM_SetBreakInputSourcePolarity\n
Kojto	122:f9eeca106725	3707	* OR3 BKCMP1E LL_TIM_SetBreakInputSourcePolarity\n
Kojto	122:f9eeca106725	3708	* OR3 BKCMP2E LL_TIM_SetBreakInputSourcePolarity\n
Kojto	122:f9eeca106725	3709	* OR3 BKINP LL_TIM_SetBreakInputSourcePolarity
Kojto	122:f9eeca106725	3710	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3711	* @param BreakInput This parameter can be one of the following values:
Kojto	122:f9eeca106725	3712	* @arg @ref LL_TIM_BREAK_INPUT_BKIN
Kojto	122:f9eeca106725	3713	* @arg @ref LL_TIM_BREAK_INPUT_BKIN2
Kojto	122:f9eeca106725	3714	* @param Source This parameter can be one of the following values:
Kojto	122:f9eeca106725	3715	* @arg @ref LL_TIM_BKIN_SOURCE_BKIN
Kojto	122:f9eeca106725	3716	* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP1
Kojto	122:f9eeca106725	3717	* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP2
Kojto	122:f9eeca106725	3718	* @param Polarity This parameter can be one of the following values:
Kojto	122:f9eeca106725	3719	* @arg @ref LL_TIM_BKIN_POLARITY_LOW
Kojto	122:f9eeca106725	3720	* @arg @ref LL_TIM_BKIN_POLARITY_HIGH
Kojto	122:f9eeca106725	3721	* @retval None
Kojto	122:f9eeca106725	3722	*/
AnnaBridge	145:64910690c574	3723	__STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t Source,
AnnaBridge	145:64910690c574	3724	uint32_t Polarity)
AnnaBridge	145:64910690c574	3725	{
AnnaBridge	145:64910690c574	3726	register uint32_t pReg = (uint32_t )((uint32_t)((uint32_t)(&TIMx->OR2) + BreakInput));
AnnaBridge	145:64910690c574	3727	MODIFY_REG(*pReg, (TIMx_OR2_BKINP << (TIM_POSITION_BRK_SOURCE)) , (Polarity << (TIM_POSITION_BRK_SOURCE)));
AnnaBridge	145:64910690c574	3728	}
Kojto	122:f9eeca106725	3729	/**
Kojto	122:f9eeca106725	3730	* @}
Kojto	122:f9eeca106725	3731	*/
Kojto	122:f9eeca106725	3732
Kojto	122:f9eeca106725	3733	/** @defgroup TIM_LL_EF_DMA_Burst_Mode DMA burst mode configuration
Kojto	122:f9eeca106725	3734	* @{
Kojto	122:f9eeca106725	3735	*/
Kojto	122:f9eeca106725	3736	/**
Kojto	122:f9eeca106725	3737	* @brief Configures the timer DMA burst feature.
Kojto	122:f9eeca106725	3738	* @note Macro @ref IS_TIM_DMABURST_INSTANCE(TIMx) can be used to check whether or
Kojto	122:f9eeca106725	3739	* not a timer instance supports the DMA burst mode.
Kojto	122:f9eeca106725	3740	* @rmtoll DCR DBL LL_TIM_ConfigDMABurst\n
Kojto	122:f9eeca106725	3741	* DCR DBA LL_TIM_ConfigDMABurst
Kojto	122:f9eeca106725	3742	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3743	* @param DMABurstBaseAddress This parameter can be one of the following values:
Kojto	122:f9eeca106725	3744	* @arg @ref LL_TIM_DMABURST_BASEADDR_CR1
Kojto	122:f9eeca106725	3745	* @arg @ref LL_TIM_DMABURST_BASEADDR_CR2
Kojto	122:f9eeca106725	3746	* @arg @ref LL_TIM_DMABURST_BASEADDR_SMCR
Kojto	122:f9eeca106725	3747	* @arg @ref LL_TIM_DMABURST_BASEADDR_DIER
Kojto	122:f9eeca106725	3748	* @arg @ref LL_TIM_DMABURST_BASEADDR_SR
Kojto	122:f9eeca106725	3749	* @arg @ref LL_TIM_DMABURST_BASEADDR_EGR
Kojto	122:f9eeca106725	3750	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR1
Kojto	122:f9eeca106725	3751	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR2
Kojto	122:f9eeca106725	3752	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCER
Kojto	122:f9eeca106725	3753	* @arg @ref LL_TIM_DMABURST_BASEADDR_CNT
Kojto	122:f9eeca106725	3754	* @arg @ref LL_TIM_DMABURST_BASEADDR_PSC
Kojto	122:f9eeca106725	3755	* @arg @ref LL_TIM_DMABURST_BASEADDR_ARR
Kojto	122:f9eeca106725	3756	* @arg @ref LL_TIM_DMABURST_BASEADDR_RCR
Kojto	122:f9eeca106725	3757	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR1
Kojto	122:f9eeca106725	3758	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR2
Kojto	122:f9eeca106725	3759	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR3
Kojto	122:f9eeca106725	3760	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR4
Kojto	122:f9eeca106725	3761	* @arg @ref LL_TIM_DMABURST_BASEADDR_BDTR
Kojto	122:f9eeca106725	3762	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR3
Kojto	122:f9eeca106725	3763	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR5
Kojto	122:f9eeca106725	3764	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR6
Kojto	122:f9eeca106725	3765	* @arg @ref LL_TIM_DMABURST_BASEADDR_OR1
Kojto	122:f9eeca106725	3766	* @arg @ref LL_TIM_DMABURST_BASEADDR_OR2
Kojto	122:f9eeca106725	3767	* @arg @ref LL_TIM_DMABURST_BASEADDR_OR3
Kojto	122:f9eeca106725	3768	* @param DMABurstLength This parameter can be one of the following values:
Kojto	122:f9eeca106725	3769	* @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER
Kojto	122:f9eeca106725	3770	* @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS
Kojto	122:f9eeca106725	3771	* @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS
Kojto	122:f9eeca106725	3772	* @arg @ref LL_TIM_DMABURST_LENGTH_4TRANSFERS
Kojto	122:f9eeca106725	3773	* @arg @ref LL_TIM_DMABURST_LENGTH_5TRANSFERS
Kojto	122:f9eeca106725	3774	* @arg @ref LL_TIM_DMABURST_LENGTH_6TRANSFERS
Kojto	122:f9eeca106725	3775	* @arg @ref LL_TIM_DMABURST_LENGTH_7TRANSFERS
Kojto	122:f9eeca106725	3776	* @arg @ref LL_TIM_DMABURST_LENGTH_8TRANSFERS
Kojto	122:f9eeca106725	3777	* @arg @ref LL_TIM_DMABURST_LENGTH_9TRANSFERS
Kojto	122:f9eeca106725	3778	* @arg @ref LL_TIM_DMABURST_LENGTH_10TRANSFERS
Kojto	122:f9eeca106725	3779	* @arg @ref LL_TIM_DMABURST_LENGTH_11TRANSFERS
Kojto	122:f9eeca106725	3780	* @arg @ref LL_TIM_DMABURST_LENGTH_12TRANSFERS
Kojto	122:f9eeca106725	3781	* @arg @ref LL_TIM_DMABURST_LENGTH_13TRANSFERS
Kojto	122:f9eeca106725	3782	* @arg @ref LL_TIM_DMABURST_LENGTH_14TRANSFERS
Kojto	122:f9eeca106725	3783	* @arg @ref LL_TIM_DMABURST_LENGTH_15TRANSFERS
Kojto	122:f9eeca106725	3784	* @arg @ref LL_TIM_DMABURST_LENGTH_16TRANSFERS
Kojto	122:f9eeca106725	3785	* @arg @ref LL_TIM_DMABURST_LENGTH_17TRANSFERS
Kojto	122:f9eeca106725	3786	* @arg @ref LL_TIM_DMABURST_LENGTH_18TRANSFERS
Kojto	122:f9eeca106725	3787	* @retval None
Kojto	122:f9eeca106725	3788	*/
AnnaBridge	145:64910690c574	3789	__STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_t DMABurstLength)
Kojto	122:f9eeca106725	3790	{
Kojto	122:f9eeca106725	3791	MODIFY_REG(TIMx->DCR, TIM_DCR_DBL \| TIM_DCR_DBA, DMABurstBaseAddress \| DMABurstLength);
Kojto	122:f9eeca106725	3792	}
Kojto	122:f9eeca106725	3793
Kojto	122:f9eeca106725	3794	/**
Kojto	122:f9eeca106725	3795	* @}
Kojto	122:f9eeca106725	3796	*/
Kojto	122:f9eeca106725	3797
Kojto	122:f9eeca106725	3798	/** @defgroup TIM_LL_EF_Timer_Inputs_Remapping Timer input remapping
Kojto	122:f9eeca106725	3799	* @{
Kojto	122:f9eeca106725	3800	*/
Kojto	122:f9eeca106725	3801	/**
Kojto	122:f9eeca106725	3802	* @brief Remap TIM inputs (input channel, internal/external triggers).
Kojto	122:f9eeca106725	3803	* @note Macro @ref IS_TIM_REMAP_INSTANCE(TIMx) can be used to check whether or not
Kojto	122:f9eeca106725	3804	* a some timer inputs can be remapped.
AnnaBridge	145:64910690c574	3805	@if STM32L486xx
Kojto	122:f9eeca106725	3806	* @rmtoll TIM1_OR1 ETR_ADC1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3807	* TIM1_OR1 ETR_ADC3_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3808	* TIM1_OR1 TI1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3809	* TIM8_OR1 ETR_ADC2_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3810	* TIM8_OR1 ETR_ADC3_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3811	* TIM8_OR1 TI1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3812	* TIM2_OR1 ITR1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3813	* TIM2_OR1 TI4_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3814	* TIM2_OR1 TI1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3815	* TIM3_OR1 TI1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3816	* TIM15_OR1 TI1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3817	* TIM15_OR1 ENCODER_MODE LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3818	* TIM16_OR1 TI1_RMP LL_TIM_SetRemap\n
Kojto	122:f9eeca106725	3819	* TIM17_OR1 TI1_RMP LL_TIM_SetRemap
AnnaBridge	145:64910690c574	3820	@endif
AnnaBridge	145:64910690c574	3821	@if STM32L443xx
AnnaBridge	145:64910690c574	3822	* @rmtoll TIM1_OR1 ETR_ADC1_RMP LL_TIM_SetRemap\n
AnnaBridge	145:64910690c574	3823	* TIM1_OR1 ETR_ADC3_RMP LL_TIM_SetRemap\n
AnnaBridge	145:64910690c574	3824	* TIM1_OR1 TI1_RMP LL_TIM_SetRemap\n
AnnaBridge	145:64910690c574	3825	* TIM2_OR1 ITR1_RMP LL_TIM_SetRemap\n
AnnaBridge	145:64910690c574	3826	* TIM2_OR1 TI4_RMP LL_TIM_SetRemap\n
AnnaBridge	145:64910690c574	3827	* TIM2_OR1 TI1_RMP LL_TIM_SetRemap\n
AnnaBridge	145:64910690c574	3828	* TIM15_OR1 TI1_RMP LL_TIM_SetRemap\n
AnnaBridge	145:64910690c574	3829	* TIM15_OR1 ENCODER_MODE LL_TIM_SetRemap\n
AnnaBridge	145:64910690c574	3830	* TIM16_OR1 TI1_RMP LL_TIM_SetRemap\n
AnnaBridge	145:64910690c574	3831	@endif
AnnaBridge	145:64910690c574	3832	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3833	* @param Remap Remap param depends on the TIMx. Description available only
AnnaBridge	145:64910690c574	3834	* in CHM version of the User Manual (not in .pdf).
Kojto	122:f9eeca106725	3835	* Otherwise see Reference Manual description of OR registers.
Kojto	122:f9eeca106725	3836	*
AnnaBridge	145:64910690c574	3837	* Below description summarizes "Timer Instance" and "Remap" param combinations:
Kojto	122:f9eeca106725	3838	*
AnnaBridge	145:64910690c574	3839	@if STM32L486xx
Kojto	122:f9eeca106725	3840	* TIM1: any combination of TI1_RMP, ADC3_RMP, ADC1_RMP where
Kojto	122:f9eeca106725	3841	*
Kojto	122:f9eeca106725	3842	* . . ADC1_RMP can be one of the following values
Kojto	122:f9eeca106725	3843	* @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_NC
Kojto	122:f9eeca106725	3844	* @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD1
Kojto	122:f9eeca106725	3845	* @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD2
Kojto	122:f9eeca106725	3846	* @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD3
Kojto	122:f9eeca106725	3847	*
Kojto	122:f9eeca106725	3848	* . . ADC3_RMP can be one of the following values
Kojto	122:f9eeca106725	3849	* @arg @ref LL_TIM_TIM1_ETR_ADC3_RMP_NC
Kojto	122:f9eeca106725	3850	* @arg @ref LL_TIM_TIM1_ETR_ADC3_RMP_AWD1
Kojto	122:f9eeca106725	3851	* @arg @ref LL_TIM_TIM1_ETR_ADC3_RMP_AWD2
Kojto	122:f9eeca106725	3852	* @arg @ref LL_TIM_TIM1_ETR_ADC3_RMP_AWD3
Kojto	122:f9eeca106725	3853	*
Kojto	122:f9eeca106725	3854	* . . TI1_RMP can be one of the following values
Kojto	122:f9eeca106725	3855	* @arg @ref LL_TIM_TIM1_TI1_RMP_GPIO
Kojto	122:f9eeca106725	3856	* @arg @ref LL_TIM_TIM1_TI1_RMP_COMP1
Kojto	122:f9eeca106725	3857	*
Kojto	122:f9eeca106725	3858	* TIM2: any combination of ITR1_RMP, ETR1_RMP, TI4_RMP where
Kojto	122:f9eeca106725	3859	*
Kojto	122:f9eeca106725	3860	* ITR1_RMP can be one of the following values
Kojto	122:f9eeca106725	3861	* @arg @ref LL_TIM_TIM2_ITR1_RMP_TIM8_TRGO
Kojto	122:f9eeca106725	3862	* @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF
Kojto	122:f9eeca106725	3863	*
Kojto	122:f9eeca106725	3864	* . . ETR1_RMP can be one of the following values
Kojto	122:f9eeca106725	3865	* @arg @ref LL_TIM_TIM2_ETR_RMP_GPIO
Kojto	122:f9eeca106725	3866	* @arg @ref LL_TIM_TIM2_ETR_RMP_LSE
Kojto	122:f9eeca106725	3867	*
Kojto	122:f9eeca106725	3868	* . . TI4_RMP can be one of the following values
Kojto	122:f9eeca106725	3869	* @arg @ref LL_TIM_TIM2_TI4_RMP_GPIO
Kojto	122:f9eeca106725	3870	* @arg @ref LL_TIM_TIM2_TI4_RMP_COMP1
Kojto	122:f9eeca106725	3871	* @arg @ref LL_TIM_TIM2_TI4_RMP_COMP2
Kojto	122:f9eeca106725	3872	* @arg @ref LL_TIM_TIM2_TI4_RMP_COMP1_COMP2
Kojto	122:f9eeca106725	3873	*
Kojto	122:f9eeca106725	3874	* TIM3: one of the following values
Kojto	122:f9eeca106725	3875	*
Kojto	122:f9eeca106725	3876	* @arg @ref LL_TIM_TIM3_TI1_RMP_GPIO
Kojto	122:f9eeca106725	3877	* @arg @ref LL_TIM_TIM3_TI1_RMP_COMP1
Kojto	122:f9eeca106725	3878	* @arg @ref LL_TIM_TIM3_TI1_RMP_COMP2
Kojto	122:f9eeca106725	3879	* @arg @ref LL_TIM_TIM3_TI1_RMP_COMP1_COMP2
Kojto	122:f9eeca106725	3880	*
Kojto	122:f9eeca106725	3881	* TIM8: any combination of TI1_RMP, ADC3_RMP, ADC1_RMP where
Kojto	122:f9eeca106725	3882	*
Kojto	122:f9eeca106725	3883	* . . ADC1_RMP can be one of the following values
Kojto	122:f9eeca106725	3884	* @arg @ref LL_TIM_TIM8_ETR_ADC2_RMP_NC
Kojto	122:f9eeca106725	3885	* @arg @ref LL_TIM_TIM8_ETR_ADC2_RMP_AWD1
Kojto	122:f9eeca106725	3886	* @arg @ref LL_TIM_TIM8_ETR_ADC2_RMP_AWD2
Kojto	122:f9eeca106725	3887	* @arg @ref LL_TIM_TIM8_ETR_ADC2_RMP_AWD3
Kojto	122:f9eeca106725	3888	*
Kojto	122:f9eeca106725	3889	* . . ADC3_RMP can be one of the following values
Kojto	122:f9eeca106725	3890	* @arg @ref LL_TIM_TIM8_ETR_ADC3_RMP_NC
Kojto	122:f9eeca106725	3891	* @arg @ref LL_TIM_TIM8_ETR_ADC3_RMP_AWD1
Kojto	122:f9eeca106725	3892	* @arg @ref LL_TIM_TIM8_ETR_ADC3_RMP_AWD2
Kojto	122:f9eeca106725	3893	* @arg @ref LL_TIM_TIM8_ETR_ADC3_RMP_AWD3
Kojto	122:f9eeca106725	3894	*
Kojto	122:f9eeca106725	3895	* . . TI1_RMP can be one of the following values
Kojto	122:f9eeca106725	3896	* @arg @ref LL_TIM_TIM8_TI1_RMP_GPIO
Kojto	122:f9eeca106725	3897	* @arg @ref LL_TIM_TIM8_TI1_RMP_COMP2
Kojto	122:f9eeca106725	3898	*
Kojto	122:f9eeca106725	3899	* TIM15: any combination of TI1_RMP, ENCODER_MODE where
Kojto	122:f9eeca106725	3900	*
Kojto	122:f9eeca106725	3901	* . . TI1_RMP can be one of the following values
Kojto	122:f9eeca106725	3902	* @arg @ref LL_TIM_TIM15_TI1_RMP_GPIO
Kojto	122:f9eeca106725	3903	* @arg @ref LL_TIM_TIM15_TI1_RMP_LSE
Kojto	122:f9eeca106725	3904	*
Kojto	122:f9eeca106725	3905	* . . ENCODER_MODE can be one of the following values
Kojto	122:f9eeca106725	3906	* @arg @ref LL_TIM_TIM15_ENCODERMODE_NOREDIRECTION
AnnaBridge	145:64910690c574	3907	* @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM2
Kojto	122:f9eeca106725	3908	* @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM3
Kojto	122:f9eeca106725	3909	* @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM4
Kojto	122:f9eeca106725	3910	*
Kojto	122:f9eeca106725	3911	* TIM16: one of the following values
Kojto	122:f9eeca106725	3912	*
Kojto	122:f9eeca106725	3913	* @arg @ref LL_TIM_TIM16_TI1_RMP_GPIO
Kojto	122:f9eeca106725	3914	* @arg @ref LL_TIM_TIM16_TI1_RMP_LSI
Kojto	122:f9eeca106725	3915	* @arg @ref LL_TIM_TIM16_TI1_RMP_LSE
Kojto	122:f9eeca106725	3916	* @arg @ref LL_TIM_TIM16_TI1_RMP_RTC
AnnaBridge	145:64910690c574	3917	* @arg @ref LL_TIM_TIM16_TI1_RMP_MSI
AnnaBridge	145:64910690c574	3918	* @arg @ref LL_TIM_TIM16_TI1_RMP_HSE_32
AnnaBridge	145:64910690c574	3919	* @arg @ref LL_TIM_TIM16_TI1_RMP_MCO
Kojto	122:f9eeca106725	3920	*
Kojto	122:f9eeca106725	3921	* TIM17: one of the following values
Kojto	122:f9eeca106725	3922	*
Kojto	122:f9eeca106725	3923	* @arg @ref LL_TIM_TIM17_TI1_RMP_GPIO
Kojto	122:f9eeca106725	3924	* @arg @ref LL_TIM_TIM17_TI1_RMP_MSI
Kojto	122:f9eeca106725	3925	* @arg @ref LL_TIM_TIM17_TI1_RMP_HSE_32
Kojto	122:f9eeca106725	3926	* @arg @ref LL_TIM_TIM17_TI1_RMP_MCO
AnnaBridge	145:64910690c574	3927	@endif
AnnaBridge	145:64910690c574	3928	@if STM32L443xx
AnnaBridge	145:64910690c574	3929	* TIM1: any combination of TI1_RMP, ADC3_RMP, ADC1_RMP where
Kojto	122:f9eeca106725	3930	*
AnnaBridge	145:64910690c574	3931	* . . ADC1_RMP can be one of the following values
AnnaBridge	145:64910690c574	3932	* @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_NC
AnnaBridge	145:64910690c574	3933	* @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD1
AnnaBridge	145:64910690c574	3934	* @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD2
AnnaBridge	145:64910690c574	3935	* @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD3
AnnaBridge	145:64910690c574	3936	*
AnnaBridge	145:64910690c574	3937	* . . TI1_RMP can be one of the following values
AnnaBridge	145:64910690c574	3938	* @arg @ref LL_TIM_TIM1_TI1_RMP_GPIO
AnnaBridge	145:64910690c574	3939	* @arg @ref LL_TIM_TIM1_TI1_RMP_COMP1
AnnaBridge	145:64910690c574	3940	*
AnnaBridge	145:64910690c574	3941	* TIM2: any combination of ITR1_RMP, ETR1_RMP, TI4_RMP where
AnnaBridge	145:64910690c574	3942	*
AnnaBridge	145:64910690c574	3943	* ITR1_RMP can be one of the following values
AnnaBridge	145:64910690c574	3944	* @arg @ref LL_TIM_TIM2_ITR1_RMP_NONE
AnnaBridge	145:64910690c574	3945	* @arg @ref LL_TIM_TIM2_ITR1_RMP_USB_SOF
AnnaBridge	145:64910690c574	3946	*
AnnaBridge	145:64910690c574	3947	* . . ETR1_RMP can be one of the following values
AnnaBridge	145:64910690c574	3948	* @arg @ref LL_TIM_TIM2_ETR_RMP_GPIO
AnnaBridge	145:64910690c574	3949	* @arg @ref LL_TIM_TIM2_ETR_RMP_LSE
AnnaBridge	145:64910690c574	3950	*
AnnaBridge	145:64910690c574	3951	* . . TI4_RMP can be one of the following values
AnnaBridge	145:64910690c574	3952	* @arg @ref LL_TIM_TIM2_TI4_RMP_GPIO
AnnaBridge	145:64910690c574	3953	* @arg @ref LL_TIM_TIM2_TI4_RMP_COMP1
AnnaBridge	145:64910690c574	3954	* @arg @ref LL_TIM_TIM2_TI4_RMP_COMP2
AnnaBridge	145:64910690c574	3955	* @arg @ref LL_TIM_TIM2_TI4_RMP_COMP1_COMP2
AnnaBridge	145:64910690c574	3956	*
AnnaBridge	145:64910690c574	3957	* TIM15: any combination of TI1_RMP, ENCODER_MODE where
AnnaBridge	145:64910690c574	3958	*
AnnaBridge	145:64910690c574	3959	* . . TI1_RMP can be one of the following values
AnnaBridge	145:64910690c574	3960	* @arg @ref LL_TIM_TIM15_TI1_RMP_GPIO
AnnaBridge	145:64910690c574	3961	* @arg @ref LL_TIM_TIM15_TI1_RMP_LSE
AnnaBridge	145:64910690c574	3962	*
AnnaBridge	145:64910690c574	3963	* . . ENCODER_MODE can be one of the following values
AnnaBridge	145:64910690c574	3964	* @arg @ref LL_TIM_TIM15_ENCODERMODE_NOREDIRECTION
AnnaBridge	145:64910690c574	3965	* @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM2
AnnaBridge	145:64910690c574	3966	* @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM3
AnnaBridge	145:64910690c574	3967	* @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM4
AnnaBridge	145:64910690c574	3968	*
AnnaBridge	145:64910690c574	3969	* TIM16: one of the following values
AnnaBridge	145:64910690c574	3970	*
AnnaBridge	145:64910690c574	3971	* @arg @ref LL_TIM_TIM16_TI1_RMP_GPIO
AnnaBridge	145:64910690c574	3972	* @arg @ref LL_TIM_TIM16_TI1_RMP_LSI
AnnaBridge	145:64910690c574	3973	* @arg @ref LL_TIM_TIM16_TI1_RMP_LSE
AnnaBridge	145:64910690c574	3974	* @arg @ref LL_TIM_TIM16_TI1_RMP_RTC
AnnaBridge	145:64910690c574	3975	* @arg @ref LL_TIM_TIM16_TI1_RMP_MSI
AnnaBridge	145:64910690c574	3976	* @arg @ref LL_TIM_TIM16_TI1_RMP_HSE_32
AnnaBridge	145:64910690c574	3977	* @arg @ref LL_TIM_TIM16_TI1_RMP_MCO
AnnaBridge	145:64910690c574	3978	@endif
Kojto	122:f9eeca106725	3979	* @retval None
Kojto	122:f9eeca106725	3980	*/
AnnaBridge	145:64910690c574	3981	__STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap)
Kojto	122:f9eeca106725	3982	{
Kojto	122:f9eeca106725	3983	MODIFY_REG(TIMx->OR1, (Remap >> TIMx_OR1_RMP_SHIFT), (Remap & TIMx_OR1_RMP_MASK));
Kojto	122:f9eeca106725	3984	}
Kojto	122:f9eeca106725	3985
Kojto	122:f9eeca106725	3986	/**
Kojto	122:f9eeca106725	3987	* @}
Kojto	122:f9eeca106725	3988	*/
Kojto	122:f9eeca106725	3989
Kojto	122:f9eeca106725	3990	/** @defgroup TIM_LL_EF_OCREF_Clear OCREF_Clear_Management
Kojto	122:f9eeca106725	3991	* @{
Kojto	122:f9eeca106725	3992	*/
Kojto	122:f9eeca106725	3993	/**
AnnaBridge	145:64910690c574	3994	* @brief Set the OCREF clear input source
Kojto	122:f9eeca106725	3995	* @note The OCxREF signal of a given channel can be cleared when a high level is applied on the OCREF_CLR_INPUT
Kojto	122:f9eeca106725	3996	* @note This function can only be used in Output compare and PWM modes.
AnnaBridge	145:64910690c574	3997	* @rmtoll SMCR OCCS LL_TIM_SetOCRefClearInputSource
Kojto	122:f9eeca106725	3998	* @param TIMx Timer instance
Kojto	122:f9eeca106725	3999	* @param OCRefClearInputSource This parameter can be one of the following values:
Kojto	122:f9eeca106725	4000	* @arg @ref LL_TIM_OCREF_CLR_INT_NC
Kojto	122:f9eeca106725	4001	* @arg @ref LL_TIM_OCREF_CLR_INT_ETR
Kojto	122:f9eeca106725	4002	* @retval None
Kojto	122:f9eeca106725	4003	*/
AnnaBridge	145:64910690c574	4004	__STATIC_INLINE void LL_TIM_SetOCRefClearInputSource(TIM_TypeDef *TIMx, uint32_t OCRefClearInputSource)
Kojto	122:f9eeca106725	4005	{
Kojto	122:f9eeca106725	4006	MODIFY_REG(TIMx->SMCR, TIM_SMCR_OCCS, OCRefClearInputSource);
Kojto	122:f9eeca106725	4007	}
Kojto	122:f9eeca106725	4008	/**
Kojto	122:f9eeca106725	4009	* @}
Kojto	122:f9eeca106725	4010	*/
Kojto	122:f9eeca106725	4011
Kojto	122:f9eeca106725	4012	/** @defgroup TIM_LL_EF_FLAG_Management FLAG-Management
Kojto	122:f9eeca106725	4013	* @{
Kojto	122:f9eeca106725	4014	*/
Kojto	122:f9eeca106725	4015	/**
Kojto	122:f9eeca106725	4016	* @brief Clear the update interrupt flag (UIF).
Kojto	122:f9eeca106725	4017	* @rmtoll SR UIF LL_TIM_ClearFlag_UPDATE
Kojto	122:f9eeca106725	4018	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4019	* @retval None
Kojto	122:f9eeca106725	4020	*/
AnnaBridge	145:64910690c574	4021	__STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4022	{
Kojto	122:f9eeca106725	4023	WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));
Kojto	122:f9eeca106725	4024	}
Kojto	122:f9eeca106725	4025
Kojto	122:f9eeca106725	4026	/**
Kojto	122:f9eeca106725	4027	* @brief Indicate whether update interrupt flag (UIF) is set (update interrupt is pending).
Kojto	122:f9eeca106725	4028	* @rmtoll SR UIF LL_TIM_IsActiveFlag_UPDATE
Kojto	122:f9eeca106725	4029	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4030	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4031	*/
AnnaBridge	145:64910690c574	4032	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4033	{
Kojto	122:f9eeca106725	4034	return (READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF));
Kojto	122:f9eeca106725	4035	}
Kojto	122:f9eeca106725	4036
Kojto	122:f9eeca106725	4037	/**
Kojto	122:f9eeca106725	4038	* @brief Clear the Capture/Compare 1 interrupt flag (CC1F).
Kojto	122:f9eeca106725	4039	* @rmtoll SR CC1IF LL_TIM_ClearFlag_CC1
Kojto	122:f9eeca106725	4040	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4041	* @retval None
Kojto	122:f9eeca106725	4042	*/
AnnaBridge	145:64910690c574	4043	__STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4044	{
Kojto	122:f9eeca106725	4045	WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF));
Kojto	122:f9eeca106725	4046	}
Kojto	122:f9eeca106725	4047
Kojto	122:f9eeca106725	4048	/**
Kojto	122:f9eeca106725	4049	* @brief Indicate whether Capture/Compare 1 interrupt flag (CC1F) is set (Capture/Compare 1 interrupt is pending).
Kojto	122:f9eeca106725	4050	* @rmtoll SR CC1IF LL_TIM_IsActiveFlag_CC1
Kojto	122:f9eeca106725	4051	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4052	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4053	*/
AnnaBridge	145:64910690c574	4054	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4055	{
Kojto	122:f9eeca106725	4056	return (READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF));
Kojto	122:f9eeca106725	4057	}
Kojto	122:f9eeca106725	4058
Kojto	122:f9eeca106725	4059	/**
Kojto	122:f9eeca106725	4060	* @brief Clear the Capture/Compare 2 interrupt flag (CC2F).
Kojto	122:f9eeca106725	4061	* @rmtoll SR CC2IF LL_TIM_ClearFlag_CC2
Kojto	122:f9eeca106725	4062	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4063	* @retval None
Kojto	122:f9eeca106725	4064	*/
AnnaBridge	145:64910690c574	4065	__STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4066	{
Kojto	122:f9eeca106725	4067	WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF));
Kojto	122:f9eeca106725	4068	}
Kojto	122:f9eeca106725	4069
Kojto	122:f9eeca106725	4070	/**
Kojto	122:f9eeca106725	4071	* @brief Indicate whether Capture/Compare 2 interrupt flag (CC2F) is set (Capture/Compare 2 interrupt is pending).
Kojto	122:f9eeca106725	4072	* @rmtoll SR CC2IF LL_TIM_IsActiveFlag_CC2
Kojto	122:f9eeca106725	4073	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4074	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4075	*/
AnnaBridge	145:64910690c574	4076	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4077	{
Kojto	122:f9eeca106725	4078	return (READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF));
Kojto	122:f9eeca106725	4079	}
Kojto	122:f9eeca106725	4080
Kojto	122:f9eeca106725	4081	/**
Kojto	122:f9eeca106725	4082	* @brief Clear the Capture/Compare 3 interrupt flag (CC3F).
Kojto	122:f9eeca106725	4083	* @rmtoll SR CC3IF LL_TIM_ClearFlag_CC3
Kojto	122:f9eeca106725	4084	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4085	* @retval None
Kojto	122:f9eeca106725	4086	*/
AnnaBridge	145:64910690c574	4087	__STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4088	{
Kojto	122:f9eeca106725	4089	WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF));
Kojto	122:f9eeca106725	4090	}
Kojto	122:f9eeca106725	4091
Kojto	122:f9eeca106725	4092	/**
Kojto	122:f9eeca106725	4093	* @brief Indicate whether Capture/Compare 3 interrupt flag (CC3F) is set (Capture/Compare 3 interrupt is pending).
Kojto	122:f9eeca106725	4094	* @rmtoll SR CC3IF LL_TIM_IsActiveFlag_CC3
Kojto	122:f9eeca106725	4095	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4096	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4097	*/
AnnaBridge	145:64910690c574	4098	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4099	{
Kojto	122:f9eeca106725	4100	return (READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF));
Kojto	122:f9eeca106725	4101	}
Kojto	122:f9eeca106725	4102
Kojto	122:f9eeca106725	4103	/**
Kojto	122:f9eeca106725	4104	* @brief Clear the Capture/Compare 4 interrupt flag (CC4F).
Kojto	122:f9eeca106725	4105	* @rmtoll SR CC4IF LL_TIM_ClearFlag_CC4
Kojto	122:f9eeca106725	4106	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4107	* @retval None
Kojto	122:f9eeca106725	4108	*/
AnnaBridge	145:64910690c574	4109	__STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4110	{
Kojto	122:f9eeca106725	4111	WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF));
Kojto	122:f9eeca106725	4112	}
Kojto	122:f9eeca106725	4113
Kojto	122:f9eeca106725	4114	/**
Kojto	122:f9eeca106725	4115	* @brief Indicate whether Capture/Compare 4 interrupt flag (CC4F) is set (Capture/Compare 4 interrupt is pending).
Kojto	122:f9eeca106725	4116	* @rmtoll SR CC4IF LL_TIM_IsActiveFlag_CC4
Kojto	122:f9eeca106725	4117	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4118	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4119	*/
AnnaBridge	145:64910690c574	4120	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4121	{
Kojto	122:f9eeca106725	4122	return (READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF));
Kojto	122:f9eeca106725	4123	}
Kojto	122:f9eeca106725	4124
Kojto	122:f9eeca106725	4125	/**
Kojto	122:f9eeca106725	4126	* @brief Clear the Capture/Compare 5 interrupt flag (CC5F).
Kojto	122:f9eeca106725	4127	* @rmtoll SR CC5IF LL_TIM_ClearFlag_CC5
Kojto	122:f9eeca106725	4128	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4129	* @retval None
Kojto	122:f9eeca106725	4130	*/
AnnaBridge	145:64910690c574	4131	__STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4132	{
Kojto	122:f9eeca106725	4133	WRITE_REG(TIMx->SR, ~(TIM_SR_CC5IF));
Kojto	122:f9eeca106725	4134	}
Kojto	122:f9eeca106725	4135
Kojto	122:f9eeca106725	4136	/**
Kojto	122:f9eeca106725	4137	* @brief Indicate whether Capture/Compare 5 interrupt flag (CC5F) is set (Capture/Compare 5 interrupt is pending).
Kojto	122:f9eeca106725	4138	* @rmtoll SR CC5IF LL_TIM_IsActiveFlag_CC5
Kojto	122:f9eeca106725	4139	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4140	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4141	*/
AnnaBridge	145:64910690c574	4142	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4143	{
Kojto	122:f9eeca106725	4144	return (READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF));
Kojto	122:f9eeca106725	4145	}
Kojto	122:f9eeca106725	4146
Kojto	122:f9eeca106725	4147	/**
Kojto	122:f9eeca106725	4148	* @brief Clear the Capture/Compare 6 interrupt flag (CC6F).
Kojto	122:f9eeca106725	4149	* @rmtoll SR CC6IF LL_TIM_ClearFlag_CC6
Kojto	122:f9eeca106725	4150	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4151	* @retval None
Kojto	122:f9eeca106725	4152	*/
AnnaBridge	145:64910690c574	4153	__STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4154	{
Kojto	122:f9eeca106725	4155	WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF));
Kojto	122:f9eeca106725	4156	}
Kojto	122:f9eeca106725	4157
Kojto	122:f9eeca106725	4158	/**
Kojto	122:f9eeca106725	4159	* @brief Indicate whether Capture/Compare 6 interrupt flag (CC6F) is set (Capture/Compare 6 interrupt is pending).
Kojto	122:f9eeca106725	4160	* @rmtoll SR CC6IF LL_TIM_IsActiveFlag_CC6
Kojto	122:f9eeca106725	4161	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4162	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4163	*/
AnnaBridge	145:64910690c574	4164	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4165	{
Kojto	122:f9eeca106725	4166	return (READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF));
Kojto	122:f9eeca106725	4167	}
Kojto	122:f9eeca106725	4168
Kojto	122:f9eeca106725	4169	/**
Kojto	122:f9eeca106725	4170	* @brief Clear the commutation interrupt flag (COMIF).
Kojto	122:f9eeca106725	4171	* @rmtoll SR COMIF LL_TIM_ClearFlag_COM
Kojto	122:f9eeca106725	4172	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4173	* @retval None
Kojto	122:f9eeca106725	4174	*/
AnnaBridge	145:64910690c574	4175	__STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4176	{
Kojto	122:f9eeca106725	4177	WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF));
Kojto	122:f9eeca106725	4178	}
Kojto	122:f9eeca106725	4179
Kojto	122:f9eeca106725	4180	/**
Kojto	122:f9eeca106725	4181	* @brief Indicate whether commutation interrupt flag (COMIF) is set (commutation interrupt is pending).
Kojto	122:f9eeca106725	4182	* @rmtoll SR COMIF LL_TIM_IsActiveFlag_COM
Kojto	122:f9eeca106725	4183	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4184	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4185	*/
AnnaBridge	145:64910690c574	4186	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4187	{
Kojto	122:f9eeca106725	4188	return (READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF));
Kojto	122:f9eeca106725	4189	}
Kojto	122:f9eeca106725	4190
Kojto	122:f9eeca106725	4191	/**
Kojto	122:f9eeca106725	4192	* @brief Clear the trigger interrupt flag (TIF).
Kojto	122:f9eeca106725	4193	* @rmtoll SR TIF LL_TIM_ClearFlag_TRIG
Kojto	122:f9eeca106725	4194	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4195	* @retval None
Kojto	122:f9eeca106725	4196	*/
AnnaBridge	145:64910690c574	4197	__STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4198	{
Kojto	122:f9eeca106725	4199	WRITE_REG(TIMx->SR, ~(TIM_SR_TIF));
Kojto	122:f9eeca106725	4200	}
Kojto	122:f9eeca106725	4201
Kojto	122:f9eeca106725	4202	/**
Kojto	122:f9eeca106725	4203	* @brief Indicate whether trigger interrupt flag (TIF) is set (trigger interrupt is pending).
Kojto	122:f9eeca106725	4204	* @rmtoll SR TIF LL_TIM_IsActiveFlag_TRIG
Kojto	122:f9eeca106725	4205	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4206	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4207	*/
AnnaBridge	145:64910690c574	4208	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4209	{
Kojto	122:f9eeca106725	4210	return (READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF));
Kojto	122:f9eeca106725	4211	}
Kojto	122:f9eeca106725	4212
Kojto	122:f9eeca106725	4213	/**
Kojto	122:f9eeca106725	4214	* @brief Clear the break interrupt flag (BIF).
Kojto	122:f9eeca106725	4215	* @rmtoll SR BIF LL_TIM_ClearFlag_BRK
Kojto	122:f9eeca106725	4216	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4217	* @retval None
Kojto	122:f9eeca106725	4218	*/
AnnaBridge	145:64910690c574	4219	__STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4220	{
Kojto	122:f9eeca106725	4221	WRITE_REG(TIMx->SR, ~(TIM_SR_BIF));
Kojto	122:f9eeca106725	4222	}
Kojto	122:f9eeca106725	4223
Kojto	122:f9eeca106725	4224	/**
Kojto	122:f9eeca106725	4225	* @brief Indicate whether break interrupt flag (BIF) is set (break interrupt is pending).
Kojto	122:f9eeca106725	4226	* @rmtoll SR BIF LL_TIM_IsActiveFlag_BRK
Kojto	122:f9eeca106725	4227	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4228	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4229	*/
AnnaBridge	145:64910690c574	4230	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4231	{
Kojto	122:f9eeca106725	4232	return (READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF));
Kojto	122:f9eeca106725	4233	}
Kojto	122:f9eeca106725	4234
Kojto	122:f9eeca106725	4235	/**
Kojto	122:f9eeca106725	4236	* @brief Clear the break 2 interrupt flag (B2IF).
Kojto	122:f9eeca106725	4237	* @rmtoll SR B2IF LL_TIM_ClearFlag_BRK2
Kojto	122:f9eeca106725	4238	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4239	* @retval None
Kojto	122:f9eeca106725	4240	*/
AnnaBridge	145:64910690c574	4241	__STATIC_INLINE void LL_TIM_ClearFlag_BRK2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4242	{
Kojto	122:f9eeca106725	4243	WRITE_REG(TIMx->SR, ~(TIM_SR_B2IF));
Kojto	122:f9eeca106725	4244	}
Kojto	122:f9eeca106725	4245
Kojto	122:f9eeca106725	4246	/**
Kojto	122:f9eeca106725	4247	* @brief Indicate whether break 2 interrupt flag (B2IF) is set (break 2 interrupt is pending).
Kojto	122:f9eeca106725	4248	* @rmtoll SR B2IF LL_TIM_IsActiveFlag_BRK2
Kojto	122:f9eeca106725	4249	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4250	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4251	*/
AnnaBridge	145:64910690c574	4252	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4253	{
Kojto	122:f9eeca106725	4254	return (READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF));
Kojto	122:f9eeca106725	4255	}
Kojto	122:f9eeca106725	4256
Kojto	122:f9eeca106725	4257	/**
Kojto	122:f9eeca106725	4258	* @brief Clear the Capture/Compare 1 over-capture interrupt flag (CC1OF).
Kojto	122:f9eeca106725	4259	* @rmtoll SR CC1OF LL_TIM_ClearFlag_CC1OVR
Kojto	122:f9eeca106725	4260	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4261	* @retval None
Kojto	122:f9eeca106725	4262	*/
AnnaBridge	145:64910690c574	4263	__STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4264	{
Kojto	122:f9eeca106725	4265	WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF));
Kojto	122:f9eeca106725	4266	}
Kojto	122:f9eeca106725	4267
Kojto	122:f9eeca106725	4268	/**
Kojto	122:f9eeca106725	4269	* @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set (Capture/Compare 1 interrupt is pending).
Kojto	122:f9eeca106725	4270	* @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR
Kojto	122:f9eeca106725	4271	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4272	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4273	*/
AnnaBridge	145:64910690c574	4274	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4275	{
Kojto	122:f9eeca106725	4276	return (READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF));
Kojto	122:f9eeca106725	4277	}
Kojto	122:f9eeca106725	4278
Kojto	122:f9eeca106725	4279	/**
Kojto	122:f9eeca106725	4280	* @brief Clear the Capture/Compare 2 over-capture interrupt flag (CC2OF).
Kojto	122:f9eeca106725	4281	* @rmtoll SR CC2OF LL_TIM_ClearFlag_CC2OVR
Kojto	122:f9eeca106725	4282	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4283	* @retval None
Kojto	122:f9eeca106725	4284	*/
AnnaBridge	145:64910690c574	4285	__STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4286	{
Kojto	122:f9eeca106725	4287	WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF));
Kojto	122:f9eeca106725	4288	}
Kojto	122:f9eeca106725	4289
Kojto	122:f9eeca106725	4290	/**
Kojto	122:f9eeca106725	4291	* @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set (Capture/Compare 2 over-capture interrupt is pending).
Kojto	122:f9eeca106725	4292	* @rmtoll SR CC2OF LL_TIM_IsActiveFlag_CC2OVR
Kojto	122:f9eeca106725	4293	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4294	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4295	*/
AnnaBridge	145:64910690c574	4296	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4297	{
Kojto	122:f9eeca106725	4298	return (READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF));
Kojto	122:f9eeca106725	4299	}
Kojto	122:f9eeca106725	4300
Kojto	122:f9eeca106725	4301	/**
Kojto	122:f9eeca106725	4302	* @brief Clear the Capture/Compare 3 over-capture interrupt flag (CC3OF).
Kojto	122:f9eeca106725	4303	* @rmtoll SR CC3OF LL_TIM_ClearFlag_CC3OVR
Kojto	122:f9eeca106725	4304	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4305	* @retval None
Kojto	122:f9eeca106725	4306	*/
AnnaBridge	145:64910690c574	4307	__STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4308	{
Kojto	122:f9eeca106725	4309	WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF));
Kojto	122:f9eeca106725	4310	}
Kojto	122:f9eeca106725	4311
Kojto	122:f9eeca106725	4312	/**
Kojto	122:f9eeca106725	4313	* @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set (Capture/Compare 3 over-capture interrupt is pending).
Kojto	122:f9eeca106725	4314	* @rmtoll SR CC3OF LL_TIM_IsActiveFlag_CC3OVR
Kojto	122:f9eeca106725	4315	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4316	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4317	*/
AnnaBridge	145:64910690c574	4318	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4319	{
Kojto	122:f9eeca106725	4320	return (READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF));
Kojto	122:f9eeca106725	4321	}
Kojto	122:f9eeca106725	4322
Kojto	122:f9eeca106725	4323	/**
Kojto	122:f9eeca106725	4324	* @brief Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF).
Kojto	122:f9eeca106725	4325	* @rmtoll SR CC4OF LL_TIM_ClearFlag_CC4OVR
Kojto	122:f9eeca106725	4326	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4327	* @retval None
Kojto	122:f9eeca106725	4328	*/
AnnaBridge	145:64910690c574	4329	__STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4330	{
Kojto	122:f9eeca106725	4331	WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF));
Kojto	122:f9eeca106725	4332	}
Kojto	122:f9eeca106725	4333
Kojto	122:f9eeca106725	4334	/**
Kojto	122:f9eeca106725	4335	* @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set (Capture/Compare 4 over-capture interrupt is pending).
Kojto	122:f9eeca106725	4336	* @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR
Kojto	122:f9eeca106725	4337	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4338	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4339	*/
AnnaBridge	145:64910690c574	4340	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4341	{
Kojto	122:f9eeca106725	4342	return (READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF));
Kojto	122:f9eeca106725	4343	}
Kojto	122:f9eeca106725	4344
Kojto	122:f9eeca106725	4345	/**
Kojto	122:f9eeca106725	4346	* @brief Clear the system break interrupt flag (SBIF).
Kojto	122:f9eeca106725	4347	* @rmtoll SR SBIF LL_TIM_ClearFlag_SYSBRK
Kojto	122:f9eeca106725	4348	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4349	* @retval None
Kojto	122:f9eeca106725	4350	*/
AnnaBridge	145:64910690c574	4351	__STATIC_INLINE void LL_TIM_ClearFlag_SYSBRK(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4352	{
Kojto	122:f9eeca106725	4353	WRITE_REG(TIMx->SR, ~(TIM_SR_SBIF));
Kojto	122:f9eeca106725	4354	}
Kojto	122:f9eeca106725	4355
Kojto	122:f9eeca106725	4356	/**
Kojto	122:f9eeca106725	4357	* @brief Indicate whether system break interrupt flag (SBIF) is set (system break interrupt is pending).
Kojto	122:f9eeca106725	4358	* @rmtoll SR SBIF LL_TIM_IsActiveFlag_SYSBRK
Kojto	122:f9eeca106725	4359	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4360	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4361	*/
AnnaBridge	145:64910690c574	4362	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_SYSBRK(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4363	{
Kojto	122:f9eeca106725	4364	return (READ_BIT(TIMx->SR, TIM_SR_SBIF) == (TIM_SR_SBIF));
Kojto	122:f9eeca106725	4365	}
Kojto	122:f9eeca106725	4366
Kojto	122:f9eeca106725	4367	/**
Kojto	122:f9eeca106725	4368	* @}
Kojto	122:f9eeca106725	4369	*/
Kojto	122:f9eeca106725	4370
Kojto	122:f9eeca106725	4371	/** @defgroup TIM_LL_EF_IT_Management IT-Management
Kojto	122:f9eeca106725	4372	* @{
Kojto	122:f9eeca106725	4373	*/
Kojto	122:f9eeca106725	4374	/**
Kojto	122:f9eeca106725	4375	* @brief Enable update interrupt (UIE).
Kojto	122:f9eeca106725	4376	* @rmtoll DIER UIE LL_TIM_EnableIT_UPDATE
Kojto	122:f9eeca106725	4377	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4378	* @retval None
Kojto	122:f9eeca106725	4379	*/
AnnaBridge	145:64910690c574	4380	__STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4381	{
Kojto	122:f9eeca106725	4382	SET_BIT(TIMx->DIER, TIM_DIER_UIE);
Kojto	122:f9eeca106725	4383	}
Kojto	122:f9eeca106725	4384
Kojto	122:f9eeca106725	4385	/**
Kojto	122:f9eeca106725	4386	* @brief Disable update interrupt (UIE).
Kojto	122:f9eeca106725	4387	* @rmtoll DIER UIE LL_TIM_DisableIT_UPDATE
Kojto	122:f9eeca106725	4388	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4389	* @retval None
Kojto	122:f9eeca106725	4390	*/
AnnaBridge	145:64910690c574	4391	__STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4392	{
Kojto	122:f9eeca106725	4393	CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE);
Kojto	122:f9eeca106725	4394	}
Kojto	122:f9eeca106725	4395
Kojto	122:f9eeca106725	4396	/**
Kojto	122:f9eeca106725	4397	* @brief Indicates whether the update interrupt (UIE) is enabled.
Kojto	122:f9eeca106725	4398	* @rmtoll DIER UIE LL_TIM_IsEnabledIT_UPDATE
Kojto	122:f9eeca106725	4399	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4400	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4401	*/
AnnaBridge	145:64910690c574	4402	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4403	{
Kojto	122:f9eeca106725	4404	return (READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE));
Kojto	122:f9eeca106725	4405	}
Kojto	122:f9eeca106725	4406
Kojto	122:f9eeca106725	4407	/**
Kojto	122:f9eeca106725	4408	* @brief Enable capture/compare 1 interrupt (CC1IE).
Kojto	122:f9eeca106725	4409	* @rmtoll DIER CC1IE LL_TIM_EnableIT_CC1
Kojto	122:f9eeca106725	4410	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4411	* @retval None
Kojto	122:f9eeca106725	4412	*/
AnnaBridge	145:64910690c574	4413	__STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4414	{
Kojto	122:f9eeca106725	4415	SET_BIT(TIMx->DIER, TIM_DIER_CC1IE);
Kojto	122:f9eeca106725	4416	}
Kojto	122:f9eeca106725	4417
Kojto	122:f9eeca106725	4418	/**
Kojto	122:f9eeca106725	4419	* @brief Disable capture/compare 1 interrupt (CC1IE).
Kojto	122:f9eeca106725	4420	* @rmtoll DIER CC1IE LL_TIM_DisableIT_CC1
Kojto	122:f9eeca106725	4421	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4422	* @retval None
Kojto	122:f9eeca106725	4423	*/
AnnaBridge	145:64910690c574	4424	__STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4425	{
Kojto	122:f9eeca106725	4426	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE);
Kojto	122:f9eeca106725	4427	}
Kojto	122:f9eeca106725	4428
Kojto	122:f9eeca106725	4429	/**
Kojto	122:f9eeca106725	4430	* @brief Indicates whether the capture/compare 1 interrupt (CC1IE) is enabled.
Kojto	122:f9eeca106725	4431	* @rmtoll DIER CC1IE LL_TIM_IsEnabledIT_CC1
Kojto	122:f9eeca106725	4432	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4433	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4434	*/
AnnaBridge	145:64910690c574	4435	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4436	{
Kojto	122:f9eeca106725	4437	return (READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE));
Kojto	122:f9eeca106725	4438	}
Kojto	122:f9eeca106725	4439
Kojto	122:f9eeca106725	4440	/**
Kojto	122:f9eeca106725	4441	* @brief Enable capture/compare 2 interrupt (CC2IE).
Kojto	122:f9eeca106725	4442	* @rmtoll DIER CC2IE LL_TIM_EnableIT_CC2
Kojto	122:f9eeca106725	4443	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4444	* @retval None
Kojto	122:f9eeca106725	4445	*/
AnnaBridge	145:64910690c574	4446	__STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4447	{
Kojto	122:f9eeca106725	4448	SET_BIT(TIMx->DIER, TIM_DIER_CC2IE);
Kojto	122:f9eeca106725	4449	}
Kojto	122:f9eeca106725	4450
Kojto	122:f9eeca106725	4451	/**
Kojto	122:f9eeca106725	4452	* @brief Disable capture/compare 2 interrupt (CC2IE).
Kojto	122:f9eeca106725	4453	* @rmtoll DIER CC2IE LL_TIM_DisableIT_CC2
Kojto	122:f9eeca106725	4454	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4455	* @retval None
Kojto	122:f9eeca106725	4456	*/
AnnaBridge	145:64910690c574	4457	__STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4458	{
Kojto	122:f9eeca106725	4459	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE);
Kojto	122:f9eeca106725	4460	}
Kojto	122:f9eeca106725	4461
Kojto	122:f9eeca106725	4462	/**
Kojto	122:f9eeca106725	4463	* @brief Indicates whether the capture/compare 2 interrupt (CC2IE) is enabled.
Kojto	122:f9eeca106725	4464	* @rmtoll DIER CC2IE LL_TIM_IsEnabledIT_CC2
Kojto	122:f9eeca106725	4465	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4466	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4467	*/
AnnaBridge	145:64910690c574	4468	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4469	{
Kojto	122:f9eeca106725	4470	return (READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE));
Kojto	122:f9eeca106725	4471	}
Kojto	122:f9eeca106725	4472
Kojto	122:f9eeca106725	4473	/**
Kojto	122:f9eeca106725	4474	* @brief Enable capture/compare 3 interrupt (CC3IE).
Kojto	122:f9eeca106725	4475	* @rmtoll DIER CC3IE LL_TIM_EnableIT_CC3
Kojto	122:f9eeca106725	4476	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4477	* @retval None
Kojto	122:f9eeca106725	4478	*/
AnnaBridge	145:64910690c574	4479	__STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4480	{
Kojto	122:f9eeca106725	4481	SET_BIT(TIMx->DIER, TIM_DIER_CC3IE);
Kojto	122:f9eeca106725	4482	}
Kojto	122:f9eeca106725	4483
Kojto	122:f9eeca106725	4484	/**
Kojto	122:f9eeca106725	4485	* @brief Disable capture/compare 3 interrupt (CC3IE).
Kojto	122:f9eeca106725	4486	* @rmtoll DIER CC3IE LL_TIM_DisableIT_CC3
Kojto	122:f9eeca106725	4487	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4488	* @retval None
Kojto	122:f9eeca106725	4489	*/
AnnaBridge	145:64910690c574	4490	__STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4491	{
Kojto	122:f9eeca106725	4492	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE);
Kojto	122:f9eeca106725	4493	}
Kojto	122:f9eeca106725	4494
Kojto	122:f9eeca106725	4495	/**
Kojto	122:f9eeca106725	4496	* @brief Indicates whether the capture/compare 3 interrupt (CC3IE) is enabled.
Kojto	122:f9eeca106725	4497	* @rmtoll DIER CC3IE LL_TIM_IsEnabledIT_CC3
Kojto	122:f9eeca106725	4498	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4499	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4500	*/
AnnaBridge	145:64910690c574	4501	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4502	{
Kojto	122:f9eeca106725	4503	return (READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE));
Kojto	122:f9eeca106725	4504	}
Kojto	122:f9eeca106725	4505
Kojto	122:f9eeca106725	4506	/**
Kojto	122:f9eeca106725	4507	* @brief Enable capture/compare 4 interrupt (CC4IE).
Kojto	122:f9eeca106725	4508	* @rmtoll DIER CC4IE LL_TIM_EnableIT_CC4
Kojto	122:f9eeca106725	4509	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4510	* @retval None
Kojto	122:f9eeca106725	4511	*/
AnnaBridge	145:64910690c574	4512	__STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4513	{
Kojto	122:f9eeca106725	4514	SET_BIT(TIMx->DIER, TIM_DIER_CC4IE);
Kojto	122:f9eeca106725	4515	}
Kojto	122:f9eeca106725	4516
Kojto	122:f9eeca106725	4517	/**
Kojto	122:f9eeca106725	4518	* @brief Disable capture/compare 4 interrupt (CC4IE).
Kojto	122:f9eeca106725	4519	* @rmtoll DIER CC4IE LL_TIM_DisableIT_CC4
Kojto	122:f9eeca106725	4520	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4521	* @retval None
Kojto	122:f9eeca106725	4522	*/
AnnaBridge	145:64910690c574	4523	__STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4524	{
Kojto	122:f9eeca106725	4525	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE);
Kojto	122:f9eeca106725	4526	}
Kojto	122:f9eeca106725	4527
Kojto	122:f9eeca106725	4528	/**
Kojto	122:f9eeca106725	4529	* @brief Indicates whether the capture/compare 4 interrupt (CC4IE) is enabled.
Kojto	122:f9eeca106725	4530	* @rmtoll DIER CC4IE LL_TIM_IsEnabledIT_CC4
Kojto	122:f9eeca106725	4531	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4532	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4533	*/
AnnaBridge	145:64910690c574	4534	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4535	{
Kojto	122:f9eeca106725	4536	return (READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE));
Kojto	122:f9eeca106725	4537	}
Kojto	122:f9eeca106725	4538
Kojto	122:f9eeca106725	4539	/**
Kojto	122:f9eeca106725	4540	* @brief Enable commutation interrupt (COMIE).
Kojto	122:f9eeca106725	4541	* @rmtoll DIER COMIE LL_TIM_EnableIT_COM
Kojto	122:f9eeca106725	4542	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4543	* @retval None
Kojto	122:f9eeca106725	4544	*/
AnnaBridge	145:64910690c574	4545	__STATIC_INLINE void LL_TIM_EnableIT_COM(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4546	{
Kojto	122:f9eeca106725	4547	SET_BIT(TIMx->DIER, TIM_DIER_COMIE);
Kojto	122:f9eeca106725	4548	}
Kojto	122:f9eeca106725	4549
Kojto	122:f9eeca106725	4550	/**
Kojto	122:f9eeca106725	4551	* @brief Disable commutation interrupt (COMIE).
Kojto	122:f9eeca106725	4552	* @rmtoll DIER COMIE LL_TIM_DisableIT_COM
Kojto	122:f9eeca106725	4553	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4554	* @retval None
Kojto	122:f9eeca106725	4555	*/
AnnaBridge	145:64910690c574	4556	__STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4557	{
Kojto	122:f9eeca106725	4558	CLEAR_BIT(TIMx->DIER, TIM_DIER_COMIE);
Kojto	122:f9eeca106725	4559	}
Kojto	122:f9eeca106725	4560
Kojto	122:f9eeca106725	4561	/**
Kojto	122:f9eeca106725	4562	* @brief Indicates whether the commutation interrupt (COMIE) is enabled.
Kojto	122:f9eeca106725	4563	* @rmtoll DIER COMIE LL_TIM_IsEnabledIT_COM
Kojto	122:f9eeca106725	4564	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4565	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4566	*/
AnnaBridge	145:64910690c574	4567	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4568	{
Kojto	122:f9eeca106725	4569	return (READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE));
Kojto	122:f9eeca106725	4570	}
Kojto	122:f9eeca106725	4571
Kojto	122:f9eeca106725	4572	/**
Kojto	122:f9eeca106725	4573	* @brief Enable trigger interrupt (TIE).
Kojto	122:f9eeca106725	4574	* @rmtoll DIER TIE LL_TIM_EnableIT_TRIG
Kojto	122:f9eeca106725	4575	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4576	* @retval None
Kojto	122:f9eeca106725	4577	*/
AnnaBridge	145:64910690c574	4578	__STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4579	{
Kojto	122:f9eeca106725	4580	SET_BIT(TIMx->DIER, TIM_DIER_TIE);
Kojto	122:f9eeca106725	4581	}
Kojto	122:f9eeca106725	4582
Kojto	122:f9eeca106725	4583	/**
Kojto	122:f9eeca106725	4584	* @brief Disable trigger interrupt (TIE).
Kojto	122:f9eeca106725	4585	* @rmtoll DIER TIE LL_TIM_DisableIT_TRIG
Kojto	122:f9eeca106725	4586	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4587	* @retval None
Kojto	122:f9eeca106725	4588	*/
AnnaBridge	145:64910690c574	4589	__STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4590	{
Kojto	122:f9eeca106725	4591	CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE);
Kojto	122:f9eeca106725	4592	}
Kojto	122:f9eeca106725	4593
Kojto	122:f9eeca106725	4594	/**
Kojto	122:f9eeca106725	4595	* @brief Indicates whether the trigger interrupt (TIE) is enabled.
Kojto	122:f9eeca106725	4596	* @rmtoll DIER TIE LL_TIM_IsEnabledIT_TRIG
Kojto	122:f9eeca106725	4597	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4598	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4599	*/
AnnaBridge	145:64910690c574	4600	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4601	{
Kojto	122:f9eeca106725	4602	return (READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE));
Kojto	122:f9eeca106725	4603	}
Kojto	122:f9eeca106725	4604
Kojto	122:f9eeca106725	4605	/**
Kojto	122:f9eeca106725	4606	* @brief Enable break interrupt (BIE).
Kojto	122:f9eeca106725	4607	* @rmtoll DIER BIE LL_TIM_EnableIT_BRK
Kojto	122:f9eeca106725	4608	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4609	* @retval None
Kojto	122:f9eeca106725	4610	*/
AnnaBridge	145:64910690c574	4611	__STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4612	{
Kojto	122:f9eeca106725	4613	SET_BIT(TIMx->DIER, TIM_DIER_BIE);
Kojto	122:f9eeca106725	4614	}
Kojto	122:f9eeca106725	4615
Kojto	122:f9eeca106725	4616	/**
Kojto	122:f9eeca106725	4617	* @brief Disable break interrupt (BIE).
Kojto	122:f9eeca106725	4618	* @rmtoll DIER BIE LL_TIM_DisableIT_BRK
Kojto	122:f9eeca106725	4619	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4620	* @retval None
Kojto	122:f9eeca106725	4621	*/
AnnaBridge	145:64910690c574	4622	__STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4623	{
Kojto	122:f9eeca106725	4624	CLEAR_BIT(TIMx->DIER, TIM_DIER_BIE);
Kojto	122:f9eeca106725	4625	}
Kojto	122:f9eeca106725	4626
Kojto	122:f9eeca106725	4627	/**
Kojto	122:f9eeca106725	4628	* @brief Indicates whether the break interrupt (BIE) is enabled.
Kojto	122:f9eeca106725	4629	* @rmtoll DIER BIE LL_TIM_IsEnabledIT_BRK
Kojto	122:f9eeca106725	4630	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4631	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4632	*/
AnnaBridge	145:64910690c574	4633	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4634	{
Kojto	122:f9eeca106725	4635	return (READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE));
Kojto	122:f9eeca106725	4636	}
Kojto	122:f9eeca106725	4637
Kojto	122:f9eeca106725	4638	/**
Kojto	122:f9eeca106725	4639	* @}
Kojto	122:f9eeca106725	4640	*/
Kojto	122:f9eeca106725	4641
Kojto	122:f9eeca106725	4642	/** @defgroup TIM_LL_EF_DMA_Management DMA-Management
Kojto	122:f9eeca106725	4643	* @{
Kojto	122:f9eeca106725	4644	*/
Kojto	122:f9eeca106725	4645	/**
Kojto	122:f9eeca106725	4646	* @brief Enable update DMA request (UDE).
Kojto	122:f9eeca106725	4647	* @rmtoll DIER UDE LL_TIM_EnableDMAReq_UPDATE
Kojto	122:f9eeca106725	4648	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4649	* @retval None
Kojto	122:f9eeca106725	4650	*/
AnnaBridge	145:64910690c574	4651	__STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4652	{
Kojto	122:f9eeca106725	4653	SET_BIT(TIMx->DIER, TIM_DIER_UDE);
Kojto	122:f9eeca106725	4654	}
Kojto	122:f9eeca106725	4655
Kojto	122:f9eeca106725	4656	/**
Kojto	122:f9eeca106725	4657	* @brief Disable update DMA request (UDE).
Kojto	122:f9eeca106725	4658	* @rmtoll DIER UDE LL_TIM_DisableDMAReq_UPDATE
Kojto	122:f9eeca106725	4659	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4660	* @retval None
Kojto	122:f9eeca106725	4661	*/
AnnaBridge	145:64910690c574	4662	__STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4663	{
Kojto	122:f9eeca106725	4664	CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE);
Kojto	122:f9eeca106725	4665	}
Kojto	122:f9eeca106725	4666
Kojto	122:f9eeca106725	4667	/**
Kojto	122:f9eeca106725	4668	* @brief Indicates whether the update DMA request (UDE) is enabled.
Kojto	122:f9eeca106725	4669	* @rmtoll DIER UDE LL_TIM_IsEnabledDMAReq_UPDATE
Kojto	122:f9eeca106725	4670	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4671	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4672	*/
AnnaBridge	145:64910690c574	4673	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4674	{
Kojto	122:f9eeca106725	4675	return (READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE));
Kojto	122:f9eeca106725	4676	}
Kojto	122:f9eeca106725	4677
Kojto	122:f9eeca106725	4678	/**
Kojto	122:f9eeca106725	4679	* @brief Enable capture/compare 1 DMA request (CC1DE).
Kojto	122:f9eeca106725	4680	* @rmtoll DIER CC1DE LL_TIM_EnableDMAReq_CC1
Kojto	122:f9eeca106725	4681	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4682	* @retval None
Kojto	122:f9eeca106725	4683	*/
AnnaBridge	145:64910690c574	4684	__STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4685	{
Kojto	122:f9eeca106725	4686	SET_BIT(TIMx->DIER, TIM_DIER_CC1DE);
Kojto	122:f9eeca106725	4687	}
Kojto	122:f9eeca106725	4688
Kojto	122:f9eeca106725	4689	/**
Kojto	122:f9eeca106725	4690	* @brief Disable capture/compare 1 DMA request (CC1DE).
Kojto	122:f9eeca106725	4691	* @rmtoll DIER CC1DE LL_TIM_DisableDMAReq_CC1
Kojto	122:f9eeca106725	4692	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4693	* @retval None
Kojto	122:f9eeca106725	4694	*/
AnnaBridge	145:64910690c574	4695	__STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4696	{
Kojto	122:f9eeca106725	4697	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE);
Kojto	122:f9eeca106725	4698	}
Kojto	122:f9eeca106725	4699
Kojto	122:f9eeca106725	4700	/**
Kojto	122:f9eeca106725	4701	* @brief Indicates whether the capture/compare 1 DMA request (CC1DE) is enabled.
Kojto	122:f9eeca106725	4702	* @rmtoll DIER CC1DE LL_TIM_IsEnabledDMAReq_CC1
Kojto	122:f9eeca106725	4703	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4704	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4705	*/
AnnaBridge	145:64910690c574	4706	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4707	{
Kojto	122:f9eeca106725	4708	return (READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE));
Kojto	122:f9eeca106725	4709	}
Kojto	122:f9eeca106725	4710
Kojto	122:f9eeca106725	4711	/**
Kojto	122:f9eeca106725	4712	* @brief Enable capture/compare 2 DMA request (CC2DE).
Kojto	122:f9eeca106725	4713	* @rmtoll DIER CC2DE LL_TIM_EnableDMAReq_CC2
Kojto	122:f9eeca106725	4714	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4715	* @retval None
Kojto	122:f9eeca106725	4716	*/
AnnaBridge	145:64910690c574	4717	__STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4718	{
Kojto	122:f9eeca106725	4719	SET_BIT(TIMx->DIER, TIM_DIER_CC2DE);
Kojto	122:f9eeca106725	4720	}
Kojto	122:f9eeca106725	4721
Kojto	122:f9eeca106725	4722	/**
Kojto	122:f9eeca106725	4723	* @brief Disable capture/compare 2 DMA request (CC2DE).
Kojto	122:f9eeca106725	4724	* @rmtoll DIER CC2DE LL_TIM_DisableDMAReq_CC2
Kojto	122:f9eeca106725	4725	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4726	* @retval None
Kojto	122:f9eeca106725	4727	*/
AnnaBridge	145:64910690c574	4728	__STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4729	{
Kojto	122:f9eeca106725	4730	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE);
Kojto	122:f9eeca106725	4731	}
Kojto	122:f9eeca106725	4732
Kojto	122:f9eeca106725	4733	/**
Kojto	122:f9eeca106725	4734	* @brief Indicates whether the capture/compare 2 DMA request (CC2DE) is enabled.
Kojto	122:f9eeca106725	4735	* @rmtoll DIER CC2DE LL_TIM_IsEnabledDMAReq_CC2
Kojto	122:f9eeca106725	4736	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4737	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4738	*/
AnnaBridge	145:64910690c574	4739	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4740	{
Kojto	122:f9eeca106725	4741	return (READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE));
Kojto	122:f9eeca106725	4742	}
Kojto	122:f9eeca106725	4743
Kojto	122:f9eeca106725	4744	/**
Kojto	122:f9eeca106725	4745	* @brief Enable capture/compare 3 DMA request (CC3DE).
Kojto	122:f9eeca106725	4746	* @rmtoll DIER CC3DE LL_TIM_EnableDMAReq_CC3
Kojto	122:f9eeca106725	4747	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4748	* @retval None
Kojto	122:f9eeca106725	4749	*/
AnnaBridge	145:64910690c574	4750	__STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4751	{
Kojto	122:f9eeca106725	4752	SET_BIT(TIMx->DIER, TIM_DIER_CC3DE);
Kojto	122:f9eeca106725	4753	}
Kojto	122:f9eeca106725	4754
Kojto	122:f9eeca106725	4755	/**
Kojto	122:f9eeca106725	4756	* @brief Disable capture/compare 3 DMA request (CC3DE).
Kojto	122:f9eeca106725	4757	* @rmtoll DIER CC3DE LL_TIM_DisableDMAReq_CC3
Kojto	122:f9eeca106725	4758	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4759	* @retval None
Kojto	122:f9eeca106725	4760	*/
AnnaBridge	145:64910690c574	4761	__STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4762	{
Kojto	122:f9eeca106725	4763	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE);
Kojto	122:f9eeca106725	4764	}
Kojto	122:f9eeca106725	4765
Kojto	122:f9eeca106725	4766	/**
Kojto	122:f9eeca106725	4767	* @brief Indicates whether the capture/compare 3 DMA request (CC3DE) is enabled.
Kojto	122:f9eeca106725	4768	* @rmtoll DIER CC3DE LL_TIM_IsEnabledDMAReq_CC3
Kojto	122:f9eeca106725	4769	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4770	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4771	*/
AnnaBridge	145:64910690c574	4772	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4773	{
Kojto	122:f9eeca106725	4774	return (READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE));
Kojto	122:f9eeca106725	4775	}
Kojto	122:f9eeca106725	4776
Kojto	122:f9eeca106725	4777	/**
Kojto	122:f9eeca106725	4778	* @brief Enable capture/compare 4 DMA request (CC4DE).
Kojto	122:f9eeca106725	4779	* @rmtoll DIER CC4DE LL_TIM_EnableDMAReq_CC4
Kojto	122:f9eeca106725	4780	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4781	* @retval None
Kojto	122:f9eeca106725	4782	*/
AnnaBridge	145:64910690c574	4783	__STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4784	{
Kojto	122:f9eeca106725	4785	SET_BIT(TIMx->DIER, TIM_DIER_CC4DE);
Kojto	122:f9eeca106725	4786	}
Kojto	122:f9eeca106725	4787
Kojto	122:f9eeca106725	4788	/**
Kojto	122:f9eeca106725	4789	* @brief Disable capture/compare 4 DMA request (CC4DE).
Kojto	122:f9eeca106725	4790	* @rmtoll DIER CC4DE LL_TIM_DisableDMAReq_CC4
Kojto	122:f9eeca106725	4791	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4792	* @retval None
Kojto	122:f9eeca106725	4793	*/
AnnaBridge	145:64910690c574	4794	__STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4795	{
Kojto	122:f9eeca106725	4796	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE);
Kojto	122:f9eeca106725	4797	}
Kojto	122:f9eeca106725	4798
Kojto	122:f9eeca106725	4799	/**
Kojto	122:f9eeca106725	4800	* @brief Indicates whether the capture/compare 4 DMA request (CC4DE) is enabled.
Kojto	122:f9eeca106725	4801	* @rmtoll DIER CC4DE LL_TIM_IsEnabledDMAReq_CC4
Kojto	122:f9eeca106725	4802	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4803	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4804	*/
AnnaBridge	145:64910690c574	4805	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4806	{
Kojto	122:f9eeca106725	4807	return (READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE));
Kojto	122:f9eeca106725	4808	}
Kojto	122:f9eeca106725	4809
Kojto	122:f9eeca106725	4810	/**
Kojto	122:f9eeca106725	4811	* @brief Enable commutation DMA request (COMDE).
Kojto	122:f9eeca106725	4812	* @rmtoll DIER COMDE LL_TIM_EnableDMAReq_COM
Kojto	122:f9eeca106725	4813	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4814	* @retval None
Kojto	122:f9eeca106725	4815	*/
AnnaBridge	145:64910690c574	4816	__STATIC_INLINE void LL_TIM_EnableDMAReq_COM(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4817	{
Kojto	122:f9eeca106725	4818	SET_BIT(TIMx->DIER, TIM_DIER_COMDE);
Kojto	122:f9eeca106725	4819	}
Kojto	122:f9eeca106725	4820
Kojto	122:f9eeca106725	4821	/**
Kojto	122:f9eeca106725	4822	* @brief Disable commutation DMA request (COMDE).
Kojto	122:f9eeca106725	4823	* @rmtoll DIER COMDE LL_TIM_DisableDMAReq_COM
Kojto	122:f9eeca106725	4824	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4825	* @retval None
Kojto	122:f9eeca106725	4826	*/
AnnaBridge	145:64910690c574	4827	__STATIC_INLINE void LL_TIM_DisableDMAReq_COM(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4828	{
Kojto	122:f9eeca106725	4829	CLEAR_BIT(TIMx->DIER, TIM_DIER_COMDE);
Kojto	122:f9eeca106725	4830	}
Kojto	122:f9eeca106725	4831
Kojto	122:f9eeca106725	4832	/**
Kojto	122:f9eeca106725	4833	* @brief Indicates whether the commutation DMA request (COMDE) is enabled.
Kojto	122:f9eeca106725	4834	* @rmtoll DIER COMDE LL_TIM_IsEnabledDMAReq_COM
Kojto	122:f9eeca106725	4835	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4836	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4837	*/
AnnaBridge	145:64910690c574	4838	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4839	{
Kojto	122:f9eeca106725	4840	return (READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE));
Kojto	122:f9eeca106725	4841	}
Kojto	122:f9eeca106725	4842
Kojto	122:f9eeca106725	4843	/**
Kojto	122:f9eeca106725	4844	* @brief Enable trigger interrupt (TDE).
Kojto	122:f9eeca106725	4845	* @rmtoll DIER TDE LL_TIM_EnableDMAReq_TRIG
Kojto	122:f9eeca106725	4846	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4847	* @retval None
Kojto	122:f9eeca106725	4848	*/
AnnaBridge	145:64910690c574	4849	__STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4850	{
Kojto	122:f9eeca106725	4851	SET_BIT(TIMx->DIER, TIM_DIER_TDE);
Kojto	122:f9eeca106725	4852	}
Kojto	122:f9eeca106725	4853
Kojto	122:f9eeca106725	4854	/**
Kojto	122:f9eeca106725	4855	* @brief Disable trigger interrupt (TDE).
Kojto	122:f9eeca106725	4856	* @rmtoll DIER TDE LL_TIM_DisableDMAReq_TRIG
Kojto	122:f9eeca106725	4857	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4858	* @retval None
Kojto	122:f9eeca106725	4859	*/
AnnaBridge	145:64910690c574	4860	__STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4861	{
Kojto	122:f9eeca106725	4862	CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE);
Kojto	122:f9eeca106725	4863	}
Kojto	122:f9eeca106725	4864
Kojto	122:f9eeca106725	4865	/**
Kojto	122:f9eeca106725	4866	* @brief Indicates whether the trigger interrupt (TDE) is enabled.
Kojto	122:f9eeca106725	4867	* @rmtoll DIER TDE LL_TIM_IsEnabledDMAReq_TRIG
Kojto	122:f9eeca106725	4868	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4869	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	4870	*/
AnnaBridge	145:64910690c574	4871	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4872	{
Kojto	122:f9eeca106725	4873	return (READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE));
Kojto	122:f9eeca106725	4874	}
Kojto	122:f9eeca106725	4875
Kojto	122:f9eeca106725	4876	/**
Kojto	122:f9eeca106725	4877	* @}
Kojto	122:f9eeca106725	4878	*/
Kojto	122:f9eeca106725	4879
Kojto	122:f9eeca106725	4880	/** @defgroup TIM_LL_EF_EVENT_Management EVENT-Management
Kojto	122:f9eeca106725	4881	* @{
Kojto	122:f9eeca106725	4882	*/
Kojto	122:f9eeca106725	4883	/**
Kojto	122:f9eeca106725	4884	* @brief Generate an update event.
Kojto	122:f9eeca106725	4885	* @rmtoll EGR UG LL_TIM_GenerateEvent_UPDATE
Kojto	122:f9eeca106725	4886	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4887	* @retval None
Kojto	122:f9eeca106725	4888	*/
AnnaBridge	145:64910690c574	4889	__STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4890	{
Kojto	122:f9eeca106725	4891	SET_BIT(TIMx->EGR, TIM_EGR_UG);
Kojto	122:f9eeca106725	4892	}
Kojto	122:f9eeca106725	4893
Kojto	122:f9eeca106725	4894	/**
Kojto	122:f9eeca106725	4895	* @brief Generate Capture/Compare 1 event.
Kojto	122:f9eeca106725	4896	* @rmtoll EGR CC1G LL_TIM_GenerateEvent_CC1
Kojto	122:f9eeca106725	4897	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4898	* @retval None
Kojto	122:f9eeca106725	4899	*/
AnnaBridge	145:64910690c574	4900	__STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4901	{
Kojto	122:f9eeca106725	4902	SET_BIT(TIMx->EGR, TIM_EGR_CC1G);
Kojto	122:f9eeca106725	4903	}
Kojto	122:f9eeca106725	4904
Kojto	122:f9eeca106725	4905	/**
Kojto	122:f9eeca106725	4906	* @brief Generate Capture/Compare 2 event.
Kojto	122:f9eeca106725	4907	* @rmtoll EGR CC2G LL_TIM_GenerateEvent_CC2
Kojto	122:f9eeca106725	4908	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4909	* @retval None
Kojto	122:f9eeca106725	4910	*/
AnnaBridge	145:64910690c574	4911	__STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4912	{
Kojto	122:f9eeca106725	4913	SET_BIT(TIMx->EGR, TIM_EGR_CC2G);
Kojto	122:f9eeca106725	4914	}
Kojto	122:f9eeca106725	4915
Kojto	122:f9eeca106725	4916	/**
Kojto	122:f9eeca106725	4917	* @brief Generate Capture/Compare 3 event.
Kojto	122:f9eeca106725	4918	* @rmtoll EGR CC3G LL_TIM_GenerateEvent_CC3
Kojto	122:f9eeca106725	4919	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4920	* @retval None
Kojto	122:f9eeca106725	4921	*/
AnnaBridge	145:64910690c574	4922	__STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4923	{
Kojto	122:f9eeca106725	4924	SET_BIT(TIMx->EGR, TIM_EGR_CC3G);
Kojto	122:f9eeca106725	4925	}
Kojto	122:f9eeca106725	4926
Kojto	122:f9eeca106725	4927	/**
Kojto	122:f9eeca106725	4928	* @brief Generate Capture/Compare 4 event.
Kojto	122:f9eeca106725	4929	* @rmtoll EGR CC4G LL_TIM_GenerateEvent_CC4
Kojto	122:f9eeca106725	4930	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4931	* @retval None
Kojto	122:f9eeca106725	4932	*/
AnnaBridge	145:64910690c574	4933	__STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4934	{
Kojto	122:f9eeca106725	4935	SET_BIT(TIMx->EGR, TIM_EGR_CC4G);
Kojto	122:f9eeca106725	4936	}
Kojto	122:f9eeca106725	4937
Kojto	122:f9eeca106725	4938	/**
Kojto	122:f9eeca106725	4939	* @brief Generate commutation event.
Kojto	122:f9eeca106725	4940	* @rmtoll EGR COMG LL_TIM_GenerateEvent_COM
Kojto	122:f9eeca106725	4941	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4942	* @retval None
Kojto	122:f9eeca106725	4943	*/
AnnaBridge	145:64910690c574	4944	__STATIC_INLINE void LL_TIM_GenerateEvent_COM(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4945	{
Kojto	122:f9eeca106725	4946	SET_BIT(TIMx->EGR, TIM_EGR_COMG);
Kojto	122:f9eeca106725	4947	}
Kojto	122:f9eeca106725	4948
Kojto	122:f9eeca106725	4949	/**
Kojto	122:f9eeca106725	4950	* @brief Generate trigger event.
Kojto	122:f9eeca106725	4951	* @rmtoll EGR TG LL_TIM_GenerateEvent_TRIG
Kojto	122:f9eeca106725	4952	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4953	* @retval None
Kojto	122:f9eeca106725	4954	*/
AnnaBridge	145:64910690c574	4955	__STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4956	{
Kojto	122:f9eeca106725	4957	SET_BIT(TIMx->EGR, TIM_EGR_TG);
Kojto	122:f9eeca106725	4958	}
Kojto	122:f9eeca106725	4959
Kojto	122:f9eeca106725	4960	/**
Kojto	122:f9eeca106725	4961	* @brief Generate break event.
Kojto	122:f9eeca106725	4962	* @rmtoll EGR BG LL_TIM_GenerateEvent_BRK
Kojto	122:f9eeca106725	4963	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4964	* @retval None
Kojto	122:f9eeca106725	4965	*/
AnnaBridge	145:64910690c574	4966	__STATIC_INLINE void LL_TIM_GenerateEvent_BRK(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4967	{
Kojto	122:f9eeca106725	4968	SET_BIT(TIMx->EGR, TIM_EGR_BG);
Kojto	122:f9eeca106725	4969	}
Kojto	122:f9eeca106725	4970
Kojto	122:f9eeca106725	4971	/**
Kojto	122:f9eeca106725	4972	* @brief Generate break 2 event.
Kojto	122:f9eeca106725	4973	* @rmtoll EGR B2G LL_TIM_GenerateEvent_BRK2
Kojto	122:f9eeca106725	4974	* @param TIMx Timer instance
Kojto	122:f9eeca106725	4975	* @retval None
Kojto	122:f9eeca106725	4976	*/
AnnaBridge	145:64910690c574	4977	__STATIC_INLINE void LL_TIM_GenerateEvent_BRK2(TIM_TypeDef *TIMx)
Kojto	122:f9eeca106725	4978	{
Kojto	122:f9eeca106725	4979	SET_BIT(TIMx->EGR, TIM_EGR_B2G);
Kojto	122:f9eeca106725	4980	}
Kojto	122:f9eeca106725	4981
Kojto	122:f9eeca106725	4982	/**
Kojto	122:f9eeca106725	4983	* @}
Kojto	122:f9eeca106725	4984	*/
Kojto	122:f9eeca106725	4985
Kojto	122:f9eeca106725	4986	#if defined(USE_FULL_LL_DRIVER)
Kojto	122:f9eeca106725	4987	/** @defgroup TIM_LL_EF_Init Initialisation and deinitialisation functions
Kojto	122:f9eeca106725	4988	* @{
Kojto	122:f9eeca106725	4989	*/
AnnaBridge	145:64910690c574	4990
AnnaBridge	145:64910690c574	4991	ErrorStatus LL_TIM_DeInit(TIM_TypeDef *TIMx);
AnnaBridge	145:64910690c574	4992	void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct);
AnnaBridge	145:64910690c574	4993	ErrorStatus LL_TIM_Init(TIM_TypeDef TIMx, LL_TIM_InitTypeDef TIM_InitStruct);
AnnaBridge	145:64910690c574	4994	void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
AnnaBridge	145:64910690c574	4995	ErrorStatus LL_TIM_OC_Init(TIM_TypeDef TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef TIM_OC_InitStruct);
AnnaBridge	145:64910690c574	4996	void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
AnnaBridge	145:64910690c574	4997	ErrorStatus LL_TIM_IC_Init(TIM_TypeDef TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef TIM_IC_InitStruct);
AnnaBridge	145:64910690c574	4998	void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
AnnaBridge	145:64910690c574	4999	ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef TIMx, LL_TIM_ENCODER_InitTypeDef TIM_EncoderInitStruct);
AnnaBridge	145:64910690c574	5000	void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct);
AnnaBridge	145:64910690c574	5001	ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef TIMx, LL_TIM_HALLSENSOR_InitTypeDef TIM_HallSensorInitStruct);
AnnaBridge	145:64910690c574	5002	void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);
AnnaBridge	145:64910690c574	5003	ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef TIMx, LL_TIM_BDTR_InitTypeDef TIM_BDTRInitStruct);
Kojto	122:f9eeca106725	5004	/**
Kojto	122:f9eeca106725	5005	* @}
Kojto	122:f9eeca106725	5006	*/
Kojto	122:f9eeca106725	5007	#endif /* USE_FULL_LL_DRIVER */
Kojto	122:f9eeca106725	5008
Kojto	122:f9eeca106725	5009	/**
Kojto	122:f9eeca106725	5010	* @}
Kojto	122:f9eeca106725	5011	*/
Kojto	122:f9eeca106725	5012
Kojto	122:f9eeca106725	5013	/**
Kojto	122:f9eeca106725	5014	* @}
Kojto	122:f9eeca106725	5015	*/
Kojto	122:f9eeca106725	5016
Kojto	122:f9eeca106725	5017	#endif /* TIM1 \|\| TIM8 \|\| TIM2 \|\| TIM3 \|\| TIM4 \|\| TIM5 \|\| TIM15 \|\| TIM16 \|\| TIM17 \|\| TIM6 \|\| TIM7 */
Kojto	122:f9eeca106725	5018
Kojto	122:f9eeca106725	5019	/**
Kojto	122:f9eeca106725	5020	* @}
Kojto	122:f9eeca106725	5021	*/
Kojto	122:f9eeca106725	5022
Kojto	122:f9eeca106725	5023	#ifdef __cplusplus
Kojto	122:f9eeca106725	5024	}
Kojto	122:f9eeca106725	5025	#endif
Kojto	122:f9eeca106725	5026
Kojto	122:f9eeca106725	5027	#endif /* __STM32L4xx_LL_TIM_H */
Kojto	122:f9eeca106725	5028	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/