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TARGET_NUCLEO_L486RG/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_system.h@140:97feb9bacc10, 2017-04-12 (annotated)

Committer:: <>
Date:: Wed Apr 12 16:07:08 2017 +0100
Revision:: 140:97feb9bacc10
Parent:: 128:9bcdf88f62b0
Child:: 145:64910690c574

Release 140 of the mbed library

Ports for Upcoming Targets

3841: Add nRf52840 target https://github.com/ARMmbed/mbed-os/pull/3841

3992: Introducing UBLOX_C030 platform. https://github.com/ARMmbed/mbed-os/pull/3992

Fixes and Changes

3951: [NUCLEO_F303ZE] Correct ARDUINO pin https://github.com/ARMmbed/mbed-os/pull/3951

4021: Fixing a macro to detect when RTOS was in use for the NRF52840_DK https://github.com/ARMmbed/mbed-os/pull/4021

3979: KW24D: Add missing SPI defines and Arduino connector definitions https://github.com/ARMmbed/mbed-os/pull/3979

3990: UBLOX_C027: construct a ticker-based wait, rather than calling wait_ms(), in the https://github.com/ARMmbed/mbed-os/pull/3990

4003: Fixed OBOE in async serial tx for NRF52 target, fixes #4002 https://github.com/ARMmbed/mbed-os/pull/4003

4012: STM32: Correct I2C master error handling https://github.com/ARMmbed/mbed-os/pull/4012

4020: NUCLEO_L011K4 remove unsupported tool chain files https://github.com/ARMmbed/mbed-os/pull/4020

4065: K66F: Move bss section to m_data_2 Section https://github.com/ARMmbed/mbed-os/pull/4065

4014: Issue 3763: Reduce heap allocation in the GCC linker file https://github.com/ARMmbed/mbed-os/pull/4014

4030: [STM32L0] reduce IAR heap and stack size for small targets https://github.com/ARMmbed/mbed-os/pull/4030

4109: NUCLEO_L476RG : minor serial pin update https://github.com/ARMmbed/mbed-os/pull/4109

3982: Ticker - kl25z bugfix for handling events in the past https://github.com/ARMmbed/mbed-os/pull/3982

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	122:f9eeca106725	1	/**
Kojto	122:f9eeca106725	2	******************************************************************************
Kojto	122:f9eeca106725	3	* @file stm32l4xx_ll_system.h
Kojto	122:f9eeca106725	4	* @author MCD Application Team
Kojto	122:f9eeca106725	5	* @version V1.5.1
Kojto	122:f9eeca106725	6	* @date 31-May-2016
Kojto	122:f9eeca106725	7	* @brief Header file of SYSTEM LL module.
Kojto	122:f9eeca106725	8	@verbatim
Kojto	122:f9eeca106725	9	==============================================================================
Kojto	122:f9eeca106725	10	##### How to use this driver #####
Kojto	122:f9eeca106725	11	==============================================================================
Kojto	122:f9eeca106725	12	[..]
Kojto	122:f9eeca106725	13	The LL SYSTEM driver contains a set of generic APIs that can be
Kojto	122:f9eeca106725	14	used by user:
Kojto	122:f9eeca106725	15	(+) Some of the FLASH features need to be handled in the SYSTEM file.
Kojto	122:f9eeca106725	16	(+) Access to DBGCMU registers
Kojto	122:f9eeca106725	17	(+) Access to SYSCFG registers
Kojto	122:f9eeca106725	18	(+) Access to VREFBUF registers
Kojto	122:f9eeca106725	19
Kojto	122:f9eeca106725	20	@endverbatim
Kojto	122:f9eeca106725	21	******************************************************************************
Kojto	122:f9eeca106725	22	* @attention
Kojto	122:f9eeca106725	23	*
Kojto	122:f9eeca106725	24	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto	122:f9eeca106725	25	*
Kojto	122:f9eeca106725	26	* Redistribution and use in source and binary forms, with or without modification,
Kojto	122:f9eeca106725	27	* are permitted provided that the following conditions are met:
Kojto	122:f9eeca106725	28	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	122:f9eeca106725	29	* this list of conditions and the following disclaimer.
Kojto	122:f9eeca106725	30	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	122:f9eeca106725	31	* this list of conditions and the following disclaimer in the documentation
Kojto	122:f9eeca106725	32	* and/or other materials provided with the distribution.
Kojto	122:f9eeca106725	33	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	122:f9eeca106725	34	* may be used to endorse or promote products derived from this software
Kojto	122:f9eeca106725	35	* without specific prior written permission.
Kojto	122:f9eeca106725	36	*
Kojto	122:f9eeca106725	37	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	122:f9eeca106725	38	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	122:f9eeca106725	39	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	122:f9eeca106725	40	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	122:f9eeca106725	41	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	122:f9eeca106725	42	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	122:f9eeca106725	43	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	122:f9eeca106725	44	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	122:f9eeca106725	45	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	122:f9eeca106725	46	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	122:f9eeca106725	47	*
Kojto	122:f9eeca106725	48	******************************************************************************
Kojto	122:f9eeca106725	49	*/
Kojto	122:f9eeca106725	50
Kojto	122:f9eeca106725	51	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	122:f9eeca106725	52	#ifndef __STM32L4xx_LL_SYSTEM_H
Kojto	122:f9eeca106725	53	#define __STM32L4xx_LL_SYSTEM_H
Kojto	122:f9eeca106725	54
Kojto	122:f9eeca106725	55	#ifdef __cplusplus
Kojto	122:f9eeca106725	56	extern "C" {
Kojto	122:f9eeca106725	57	#endif
Kojto	122:f9eeca106725	58
Kojto	122:f9eeca106725	59	/* Includes ------------------------------------------------------------------*/
Kojto	122:f9eeca106725	60	#include "stm32l4xx.h"
Kojto	122:f9eeca106725	61
Kojto	122:f9eeca106725	62	/** @addtogroup STM32L4xx_LL_Driver
Kojto	122:f9eeca106725	63	* @{
Kojto	122:f9eeca106725	64	*/
Kojto	122:f9eeca106725	65
Kojto	122:f9eeca106725	66	#if defined (FLASH) \|\| defined (SYSCFG) \|\| defined (DBGMCU) \|\| defined (VREFBUF)
Kojto	122:f9eeca106725	67
Kojto	122:f9eeca106725	68	/** @defgroup SYSTEM_LL SYSTEM
Kojto	122:f9eeca106725	69	* @{
Kojto	122:f9eeca106725	70	*/
Kojto	122:f9eeca106725	71
Kojto	122:f9eeca106725	72	/* Private types -------------------------------------------------------------*/
Kojto	122:f9eeca106725	73	/* Private variables ---------------------------------------------------------*/
Kojto	122:f9eeca106725	74
Kojto	122:f9eeca106725	75	/* Private constants ---------------------------------------------------------*/
Kojto	122:f9eeca106725	76	/** @defgroup SYSTEM_LL_Private_Constants SYSTEM Private Constants
Kojto	122:f9eeca106725	77	* @{
Kojto	122:f9eeca106725	78	*/
Kojto	122:f9eeca106725	79
Kojto	122:f9eeca106725	80	/* Defines used for position in the register */
Kojto	122:f9eeca106725	81	#define DBGMCU_REVID_POSITION (uint32_t)POSITION_VAL(DBGMCU_IDCODE_REV_ID)
Kojto	122:f9eeca106725	82
Kojto	122:f9eeca106725	83	/**
Kojto	122:f9eeca106725	84	* @brief Power-down in Run mode Flash key
Kojto	122:f9eeca106725	85	*/
Kojto	122:f9eeca106725	86	#define FLASH_PDKEY1 ((uint32_t)0x04152637U) /!< Flash power down key1 /
Kojto	122:f9eeca106725	87	#define FLASH_PDKEY2 ((uint32_t)0xFAFBFCFDU) /*!< Flash power down key2: used with FLASH_PDKEY1
Kojto	122:f9eeca106725	88	to unlock the RUN_PD bit in FLASH_ACR */
Kojto	122:f9eeca106725	89
Kojto	122:f9eeca106725	90	/**
Kojto	122:f9eeca106725	91	* @}
Kojto	122:f9eeca106725	92	*/
Kojto	122:f9eeca106725	93
Kojto	122:f9eeca106725	94	/* Private macros ------------------------------------------------------------*/
Kojto	122:f9eeca106725	95
Kojto	122:f9eeca106725	96	/* Exported types ------------------------------------------------------------*/
Kojto	122:f9eeca106725	97	/* Exported constants --------------------------------------------------------*/
Kojto	122:f9eeca106725	98	/** @defgroup SYSTEM_LL_Exported_Constants SYSTEM Exported Constants
Kojto	122:f9eeca106725	99	* @{
Kojto	122:f9eeca106725	100	*/
Kojto	122:f9eeca106725	101
Kojto	122:f9eeca106725	102	/** @defgroup SYSTEM_LL_EC_REMAP SYSCFG REMAP
Kojto	122:f9eeca106725	103	* @{
Kojto	122:f9eeca106725	104	*/
Kojto	122:f9eeca106725	105	#define LL_SYSCFG_REMAP_FLASH (uint32_t)0x00000000 /!< Main Flash memory mapped at 0x00000000 /
Kojto	122:f9eeca106725	106	#define LL_SYSCFG_REMAP_SYSTEMFLASH SYSCFG_MEMRMP_MEM_MODE_0 /!< System Flash memory mapped at 0x00000000 /
Kojto	122:f9eeca106725	107	#define LL_SYSCFG_REMAP_SRAM (SYSCFG_MEMRMP_MEM_MODE_1 \| SYSCFG_MEMRMP_MEM_MODE_0) /!< SRAM1 mapped at 0x00000000 /
Kojto	122:f9eeca106725	108	#if defined(FMC_Bank1_R)
Kojto	122:f9eeca106725	109	#define LL_SYSCFG_REMAP_FMC SYSCFG_MEMRMP_MEM_MODE_1 /!< FMC bank 1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 /
Kojto	122:f9eeca106725	110	#endif /* FMC_Bank1_R */
Kojto	122:f9eeca106725	111	#define LL_SYSCFG_REMAP_QUADSPI (SYSCFG_MEMRMP_MEM_MODE_2 \| SYSCFG_MEMRMP_MEM_MODE_1) /!< QUADSPI memory mapped at 0x00000000 /
Kojto	122:f9eeca106725	112	/**
Kojto	122:f9eeca106725	113	* @}
Kojto	122:f9eeca106725	114	*/
Kojto	122:f9eeca106725	115
Kojto	122:f9eeca106725	116	#if defined(SYSCFG_MEMRMP_FB_MODE)
Kojto	122:f9eeca106725	117	/** @defgroup SYSTEM_LL_EC_BANKMODE SYSCFG BANK MODE
Kojto	122:f9eeca106725	118	* @{
Kojto	122:f9eeca106725	119	*/
Kojto	122:f9eeca106725	120	#define LL_SYSCFG_BANKMODE_BANK1 (uint32_t)0x00000000 /*!< Flash Bank1 mapped at 0x08000000 (and aliased @0x00000000)
Kojto	122:f9eeca106725	121	and Flash Bank2 mapped at 0x08080000 (and aliased at 0x00080000) */
Kojto	122:f9eeca106725	122	#define LL_SYSCFG_BANKMODE_BANK2 SYSCFG_MEMRMP_FB_MODE /*!< Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000)
Kojto	122:f9eeca106725	123	and Flash Bank1 mapped at 0x08080000 (and aliased at 0x00080000) */
Kojto	122:f9eeca106725	124	/**
Kojto	122:f9eeca106725	125	* @}
Kojto	122:f9eeca106725	126	*/
Kojto	122:f9eeca106725	127
Kojto	122:f9eeca106725	128	#endif /* SYSCFG_MEMRMP_FB_MODE */
Kojto	122:f9eeca106725	129	/** @defgroup SYSTEM_LL_EC_I2C_FASTMODEPLUS SYSCFG I2C FASTMODEPLUS
Kojto	122:f9eeca106725	130	* @{
Kojto	122:f9eeca106725	131	*/
Kojto	122:f9eeca106725	132	#define LL_SYSCFG_I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /!< Enable Fast Mode Plus on PB6 /
Kojto	122:f9eeca106725	133	#define LL_SYSCFG_I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /!< Enable Fast Mode Plus on PB7 /
Kojto	122:f9eeca106725	134	#if defined(SYSCFG_CFGR1_I2C_PB8_FMP)
Kojto	122:f9eeca106725	135	#define LL_SYSCFG_I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /!< Enable Fast Mode Plus on PB8 /
Kojto	122:f9eeca106725	136	#endif /* SYSCFG_CFGR1_I2C_PB8_FMP */
Kojto	122:f9eeca106725	137	#if defined(SYSCFG_CFGR1_I2C_PB9_FMP)
Kojto	122:f9eeca106725	138	#define LL_SYSCFG_I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /!< Enable Fast Mode Plus on PB9 /
Kojto	122:f9eeca106725	139	#endif /* SYSCFG_CFGR1_I2C_PB9_FMP */
Kojto	122:f9eeca106725	140	#define LL_SYSCFG_I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /!< Enable Fast Mode Plus on I2C1 pins /
Kojto	122:f9eeca106725	141	#if defined(I2C2)
Kojto	122:f9eeca106725	142	#define LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /!< Enable Fast Mode Plus on I2C2 pins /
Kojto	122:f9eeca106725	143	#endif /* I2C2 */
Kojto	122:f9eeca106725	144	#define LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /!< Enable Fast Mode Plus on I2C3 pins /
Kojto	122:f9eeca106725	145	/**
Kojto	122:f9eeca106725	146	* @}
Kojto	122:f9eeca106725	147	*/
Kojto	122:f9eeca106725	148
Kojto	122:f9eeca106725	149	/** @defgroup SYSTEM_LL_EC_EXTI_PORT SYSCFG EXTI PORT
Kojto	122:f9eeca106725	150	* @{
Kojto	122:f9eeca106725	151	*/
Kojto	122:f9eeca106725	152	#define LL_SYSCFG_EXTI_PORTA (uint32_t)0 /!< EXTI PORT A /
Kojto	122:f9eeca106725	153	#define LL_SYSCFG_EXTI_PORTB (uint32_t)1 /!< EXTI PORT B /
Kojto	122:f9eeca106725	154	#define LL_SYSCFG_EXTI_PORTC (uint32_t)2 /!< EXTI PORT C /
Kojto	122:f9eeca106725	155	#define LL_SYSCFG_EXTI_PORTD (uint32_t)3 /!< EXTI PORT D /
Kojto	122:f9eeca106725	156	#define LL_SYSCFG_EXTI_PORTE (uint32_t)4 /!< EXTI PORT E /
Kojto	122:f9eeca106725	157	#if defined(GPIOF)
Kojto	122:f9eeca106725	158	#define LL_SYSCFG_EXTI_PORTF (uint32_t)5 /!< EXTI PORT F /
Kojto	122:f9eeca106725	159	#endif /* GPIOF */
Kojto	122:f9eeca106725	160	#if defined(GPIOG)
Kojto	122:f9eeca106725	161	#define LL_SYSCFG_EXTI_PORTG (uint32_t)6 /!< EXTI PORT G /
Kojto	122:f9eeca106725	162	#endif /* GPIOG */
Kojto	122:f9eeca106725	163	#define LL_SYSCFG_EXTI_PORTH (uint32_t)7 /!< EXTI PORT H /
Kojto	122:f9eeca106725	164	/**
Kojto	122:f9eeca106725	165	* @}
Kojto	122:f9eeca106725	166	*/
Kojto	122:f9eeca106725	167
Kojto	122:f9eeca106725	168	/** @defgroup SYSTEM_LL_EC_EXTI_LINE SYSCFG EXTI LINE
Kojto	122:f9eeca106725	169	* @{
Kojto	122:f9eeca106725	170	*/
Kojto	122:f9eeca106725	171	#define LL_SYSCFG_EXTI_LINE0 (uint32_t)(0x000FU << 16 \| 0) /* !< EXTI_POSITION_0 \| EXTICR[0] */
Kojto	122:f9eeca106725	172	#define LL_SYSCFG_EXTI_LINE1 (uint32_t)(0x00F0U << 16 \| 0) /* !< EXTI_POSITION_4 \| EXTICR[0] */
Kojto	122:f9eeca106725	173	#define LL_SYSCFG_EXTI_LINE2 (uint32_t)(0x0F00U << 16 \| 0) /* !< EXTI_POSITION_8 \| EXTICR[0] */
Kojto	122:f9eeca106725	174	#define LL_SYSCFG_EXTI_LINE3 (uint32_t)(0xF000U << 16 \| 0) /* !< EXTI_POSITION_12 \| EXTICR[0] */
Kojto	122:f9eeca106725	175	#define LL_SYSCFG_EXTI_LINE4 (uint32_t)(0x000FU << 16 \| 1) /* !< EXTI_POSITION_0 \| EXTICR[1] */
Kojto	122:f9eeca106725	176	#define LL_SYSCFG_EXTI_LINE5 (uint32_t)(0x00F0U << 16 \| 1) /* !< EXTI_POSITION_4 \| EXTICR[1] */
Kojto	122:f9eeca106725	177	#define LL_SYSCFG_EXTI_LINE6 (uint32_t)(0x0F00U << 16 \| 1) /* !< EXTI_POSITION_8 \| EXTICR[1] */
Kojto	122:f9eeca106725	178	#define LL_SYSCFG_EXTI_LINE7 (uint32_t)(0xF000U << 16 \| 1) /* !< EXTI_POSITION_12 \| EXTICR[1] */
Kojto	122:f9eeca106725	179	#define LL_SYSCFG_EXTI_LINE8 (uint32_t)(0x000FU << 16 \| 2) /* !< EXTI_POSITION_0 \| EXTICR[2] */
Kojto	122:f9eeca106725	180	#define LL_SYSCFG_EXTI_LINE9 (uint32_t)(0x00F0U << 16 \| 2) /* !< EXTI_POSITION_4 \| EXTICR[2] */
Kojto	122:f9eeca106725	181	#define LL_SYSCFG_EXTI_LINE10 (uint32_t)(0x0F00U << 16 \| 2) /* !< EXTI_POSITION_8 \| EXTICR[2] */
Kojto	122:f9eeca106725	182	#define LL_SYSCFG_EXTI_LINE11 (uint32_t)(0xF000U << 16 \| 2) /* !< EXTI_POSITION_12 \| EXTICR[2] */
Kojto	122:f9eeca106725	183	#define LL_SYSCFG_EXTI_LINE12 (uint32_t)(0x000FU << 16 \| 3) /* !< EXTI_POSITION_0 \| EXTICR[3] */
Kojto	122:f9eeca106725	184	#define LL_SYSCFG_EXTI_LINE13 (uint32_t)(0x00F0U << 16 \| 3) /* !< EXTI_POSITION_4 \| EXTICR[3] */
Kojto	122:f9eeca106725	185	#define LL_SYSCFG_EXTI_LINE14 (uint32_t)(0x0F00U << 16 \| 3) /* !< EXTI_POSITION_8 \| EXTICR[3] */
Kojto	122:f9eeca106725	186	#define LL_SYSCFG_EXTI_LINE15 (uint32_t)(0xF000U << 16 \| 3) /* !< EXTI_POSITION_12 \| EXTICR[3] */
Kojto	122:f9eeca106725	187	/**
Kojto	122:f9eeca106725	188	* @}
Kojto	122:f9eeca106725	189	*/
Kojto	122:f9eeca106725	190
Kojto	122:f9eeca106725	191	/** @defgroup SYSTEM_LL_EC_TIMBREAK SYSCFG TIMER BREAK
Kojto	122:f9eeca106725	192	* @{
Kojto	122:f9eeca106725	193	*/
Kojto	122:f9eeca106725	194	#define LL_SYSCFG_TIMBREAK_ECC SYSCFG_CFGR2_ECCL /*!< Enables and locks the ECC error signal
Kojto	122:f9eeca106725	195	with Break Input of TIM1/8/15/16/17 */
Kojto	122:f9eeca106725	196	#define LL_SYSCFG_TIMBREAK_PVD SYSCFG_CFGR2_PVDL /*!< Enables and locks the PVD connection
Kojto	122:f9eeca106725	197	with TIM1/8/15/16/17 Break Input
Kojto	122:f9eeca106725	198	and also the PVDE and PLS bits of the Power Control Interface */
Kojto	122:f9eeca106725	199	#define LL_SYSCFG_TIMBREAK_SRAM2_PARITY SYSCFG_CFGR2_SPL /*!< Enables and locks the SRAM2_PARITY error signal
Kojto	122:f9eeca106725	200	with Break Input of TIM1/8/15/16/17 */
Kojto	122:f9eeca106725	201	#define LL_SYSCFG_TIMBREAK_LOCKUP SYSCFG_CFGR2_CLL /*!< Enables and locks the LOCKUP output of CortexM4
Kojto	122:f9eeca106725	202	with Break Input of TIM1/15/16/17 */
Kojto	122:f9eeca106725	203	/**
Kojto	122:f9eeca106725	204	* @}
Kojto	122:f9eeca106725	205	*/
Kojto	122:f9eeca106725	206
Kojto	122:f9eeca106725	207	/** @defgroup SYSTEM_LL_EC_SRAM2WRP SYSCFG SRAM2 WRP
Kojto	122:f9eeca106725	208	* @{
Kojto	122:f9eeca106725	209	*/
Kojto	122:f9eeca106725	210	#define LL_SYSCFG_SRAM2WRP_PAGE0 SYSCFG_SWPR_PAGE0 /!< SRAM2 Write protection page 0 /
Kojto	122:f9eeca106725	211	#define LL_SYSCFG_SRAM2WRP_PAGE1 SYSCFG_SWPR_PAGE1 /!< SRAM2 Write protection page 1 /
Kojto	122:f9eeca106725	212	#define LL_SYSCFG_SRAM2WRP_PAGE2 SYSCFG_SWPR_PAGE2 /!< SRAM2 Write protection page 2 /
Kojto	122:f9eeca106725	213	#define LL_SYSCFG_SRAM2WRP_PAGE3 SYSCFG_SWPR_PAGE3 /!< SRAM2 Write protection page 3 /
Kojto	122:f9eeca106725	214	#define LL_SYSCFG_SRAM2WRP_PAGE4 SYSCFG_SWPR_PAGE4 /!< SRAM2 Write protection page 4 /
Kojto	122:f9eeca106725	215	#define LL_SYSCFG_SRAM2WRP_PAGE5 SYSCFG_SWPR_PAGE5 /!< SRAM2 Write protection page 5 /
Kojto	122:f9eeca106725	216	#define LL_SYSCFG_SRAM2WRP_PAGE6 SYSCFG_SWPR_PAGE6 /!< SRAM2 Write protection page 6 /
Kojto	122:f9eeca106725	217	#define LL_SYSCFG_SRAM2WRP_PAGE7 SYSCFG_SWPR_PAGE7 /!< SRAM2 Write protection page 7 /
Kojto	122:f9eeca106725	218	#define LL_SYSCFG_SRAM2WRP_PAGE8 SYSCFG_SWPR_PAGE8 /!< SRAM2 Write protection page 8 /
Kojto	122:f9eeca106725	219	#define LL_SYSCFG_SRAM2WRP_PAGE9 SYSCFG_SWPR_PAGE9 /!< SRAM2 Write protection page 9 /
Kojto	122:f9eeca106725	220	#define LL_SYSCFG_SRAM2WRP_PAGE10 SYSCFG_SWPR_PAGE10 /!< SRAM2 Write protection page 10 /
Kojto	122:f9eeca106725	221	#define LL_SYSCFG_SRAM2WRP_PAGE11 SYSCFG_SWPR_PAGE11 /!< SRAM2 Write protection page 11 /
Kojto	122:f9eeca106725	222	#define LL_SYSCFG_SRAM2WRP_PAGE12 SYSCFG_SWPR_PAGE12 /!< SRAM2 Write protection page 12 /
Kojto	122:f9eeca106725	223	#define LL_SYSCFG_SRAM2WRP_PAGE13 SYSCFG_SWPR_PAGE13 /!< SRAM2 Write protection page 13 /
Kojto	122:f9eeca106725	224	#define LL_SYSCFG_SRAM2WRP_PAGE14 SYSCFG_SWPR_PAGE14 /!< SRAM2 Write protection page 14 /
Kojto	122:f9eeca106725	225	#define LL_SYSCFG_SRAM2WRP_PAGE15 SYSCFG_SWPR_PAGE15 /!< SRAM2 Write protection page 15 /
Kojto	122:f9eeca106725	226	#if defined(SYSCFG_SWPR_PAGE16)
Kojto	122:f9eeca106725	227	#define LL_SYSCFG_SRAM2WRP_PAGE16 SYSCFG_SWPR_PAGE16 /!< SRAM2 Write protection page 16 /
Kojto	122:f9eeca106725	228	#define LL_SYSCFG_SRAM2WRP_PAGE17 SYSCFG_SWPR_PAGE17 /!< SRAM2 Write protection page 17 /
Kojto	122:f9eeca106725	229	#define LL_SYSCFG_SRAM2WRP_PAGE18 SYSCFG_SWPR_PAGE18 /!< SRAM2 Write protection page 18 /
Kojto	122:f9eeca106725	230	#define LL_SYSCFG_SRAM2WRP_PAGE19 SYSCFG_SWPR_PAGE19 /!< SRAM2 Write protection page 19 /
Kojto	122:f9eeca106725	231	#define LL_SYSCFG_SRAM2WRP_PAGE20 SYSCFG_SWPR_PAGE20 /!< SRAM2 Write protection page 20 /
Kojto	122:f9eeca106725	232	#define LL_SYSCFG_SRAM2WRP_PAGE21 SYSCFG_SWPR_PAGE21 /!< SRAM2 Write protection page 21 /
Kojto	122:f9eeca106725	233	#define LL_SYSCFG_SRAM2WRP_PAGE22 SYSCFG_SWPR_PAGE22 /!< SRAM2 Write protection page 22 /
Kojto	122:f9eeca106725	234	#define LL_SYSCFG_SRAM2WRP_PAGE23 SYSCFG_SWPR_PAGE23 /!< SRAM2 Write protection page 23 /
Kojto	122:f9eeca106725	235	#define LL_SYSCFG_SRAM2WRP_PAGE24 SYSCFG_SWPR_PAGE24 /!< SRAM2 Write protection page 24 /
Kojto	122:f9eeca106725	236	#define LL_SYSCFG_SRAM2WRP_PAGE25 SYSCFG_SWPR_PAGE25 /!< SRAM2 Write protection page 25 /
Kojto	122:f9eeca106725	237	#define LL_SYSCFG_SRAM2WRP_PAGE26 SYSCFG_SWPR_PAGE26 /!< SRAM2 Write protection page 26 /
Kojto	122:f9eeca106725	238	#define LL_SYSCFG_SRAM2WRP_PAGE27 SYSCFG_SWPR_PAGE27 /!< SRAM2 Write protection page 27 /
Kojto	122:f9eeca106725	239	#define LL_SYSCFG_SRAM2WRP_PAGE28 SYSCFG_SWPR_PAGE28 /!< SRAM2 Write protection page 28 /
Kojto	122:f9eeca106725	240	#define LL_SYSCFG_SRAM2WRP_PAGE29 SYSCFG_SWPR_PAGE29 /!< SRAM2 Write protection page 29 /
Kojto	122:f9eeca106725	241	#define LL_SYSCFG_SRAM2WRP_PAGE30 SYSCFG_SWPR_PAGE30 /!< SRAM2 Write protection page 30 /
Kojto	122:f9eeca106725	242	#define LL_SYSCFG_SRAM2WRP_PAGE31 SYSCFG_SWPR_PAGE31 /!< SRAM2 Write protection page 31 /
Kojto	122:f9eeca106725	243	#endif /* SYSCFG_SWPR_PAGE16 */
Kojto	122:f9eeca106725	244	/**
Kojto	122:f9eeca106725	245	* @}
Kojto	122:f9eeca106725	246	*/
Kojto	122:f9eeca106725	247
Kojto	122:f9eeca106725	248	/** @defgroup SYSTEM_LL_EC_TRACE DBGMCU TRACE Pin Assignment
Kojto	122:f9eeca106725	249	* @{
Kojto	122:f9eeca106725	250	*/
Kojto	122:f9eeca106725	251	#define LL_DBGMCU_TRACE_NONE (uint32_t)0x00000000U /!< TRACE pins not assigned (default state) /
Kojto	122:f9eeca106725	252	#define LL_DBGMCU_TRACE_ASYNCH DBGMCU_CR_TRACE_IOEN /!< TRACE pin assignment for Asynchronous Mode /
Kojto	122:f9eeca106725	253	#define LL_DBGMCU_TRACE_SYNCH_SIZE1 (DBGMCU_CR_TRACE_IOEN \| DBGMCU_CR_TRACE_MODE_0) /!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 1 /
Kojto	122:f9eeca106725	254	#define LL_DBGMCU_TRACE_SYNCH_SIZE2 (DBGMCU_CR_TRACE_IOEN \| DBGMCU_CR_TRACE_MODE_1) /!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 2 /
Kojto	122:f9eeca106725	255	#define LL_DBGMCU_TRACE_SYNCH_SIZE4 (DBGMCU_CR_TRACE_IOEN \| DBGMCU_CR_TRACE_MODE) /!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 4 /
Kojto	122:f9eeca106725	256	/**
Kojto	122:f9eeca106725	257	* @}
Kojto	122:f9eeca106725	258	*/
Kojto	122:f9eeca106725	259
Kojto	122:f9eeca106725	260	/** @defgroup SYSTEM_LL_EC_APB1_GRP1_STOP_IP DBGMCU APB1 GRP1 STOP IP
Kojto	122:f9eeca106725	261	* @{
Kojto	122:f9eeca106725	262	*/
Kojto	122:f9eeca106725	263	#define LL_DBGMCU_APB1_GRP1_TIM2_STOP DBGMCU_APB1FZR1_DBG_TIM2_STOP /!< The counter clock of TIM2 is stopped when the core is halted/
Kojto	122:f9eeca106725	264	#if defined(TIM3)
Kojto	122:f9eeca106725	265	#define LL_DBGMCU_APB1_GRP1_TIM3_STOP DBGMCU_APB1FZR1_DBG_TIM3_STOP /!< The counter clock of TIM3 is stopped when the core is halted/
Kojto	122:f9eeca106725	266	#endif /* TIM3 */
Kojto	122:f9eeca106725	267	#if defined(TIM4)
Kojto	122:f9eeca106725	268	#define LL_DBGMCU_APB1_GRP1_TIM4_STOP DBGMCU_APB1FZR1_DBG_TIM4_STOP /!< The counter clock of TIM4 is stopped when the core is halted/
Kojto	122:f9eeca106725	269	#endif /* TIM4 */
Kojto	122:f9eeca106725	270	#if defined(TIM5)
Kojto	122:f9eeca106725	271	#define LL_DBGMCU_APB1_GRP1_TIM5_STOP DBGMCU_APB1FZR1_DBG_TIM5_STOP /!< The counter clock of TIM5 is stopped when the core is halted/
Kojto	122:f9eeca106725	272	#endif /* TIM5 */
Kojto	122:f9eeca106725	273	#define LL_DBGMCU_APB1_GRP1_TIM6_STOP DBGMCU_APB1FZR1_DBG_TIM6_STOP /!< The counter clock of TIM6 is stopped when the core is halted/
Kojto	122:f9eeca106725	274	#if defined(TIM7)
Kojto	122:f9eeca106725	275	#define LL_DBGMCU_APB1_GRP1_TIM7_STOP DBGMCU_APB1FZR1_DBG_TIM7_STOP /!< The counter clock of TIM7 is stopped when the core is halted/
Kojto	122:f9eeca106725	276	#endif /* TIM7 */
Kojto	122:f9eeca106725	277	#define LL_DBGMCU_APB1_GRP1_RTC_STOP DBGMCU_APB1FZR1_DBG_RTC_STOP /!< The clock of the RTC counter is stopped when the core is halted/
Kojto	122:f9eeca106725	278	#define LL_DBGMCU_APB1_GRP1_WWDG_STOP DBGMCU_APB1FZR1_DBG_WWDG_STOP /!< The window watchdog counter clock is stopped when the core is halted/
Kojto	122:f9eeca106725	279	#define LL_DBGMCU_APB1_GRP1_IWDG_STOP DBGMCU_APB1FZR1_DBG_IWDG_STOP /!< The independent watchdog counter clock is stopped when the core is halted/
Kojto	122:f9eeca106725	280	#define LL_DBGMCU_APB1_GRP1_I2C1_STOP DBGMCU_APB1FZR1_DBG_I2C1_STOP /!< The I2C1 SMBus timeout is frozen/
Kojto	122:f9eeca106725	281	#if defined(I2C2)
Kojto	122:f9eeca106725	282	#define LL_DBGMCU_APB1_GRP1_I2C2_STOP DBGMCU_APB1FZR1_DBG_I2C2_STOP /!< The I2C2 SMBus timeout is frozen/
Kojto	122:f9eeca106725	283	#endif /* I2C2 */
Kojto	122:f9eeca106725	284	#define LL_DBGMCU_APB1_GRP1_I2C3_STOP DBGMCU_APB1FZR1_DBG_I2C3_STOP /!< The I2C3 SMBus timeout is frozen/
Kojto	122:f9eeca106725	285	#define LL_DBGMCU_APB1_GRP1_CAN_STOP DBGMCU_APB1FZR1_DBG_CAN_STOP /!< The bxCAN receive registers are frozen/
Kojto	122:f9eeca106725	286	#define LL_DBGMCU_APB1_GRP1_LPTIM1_STOP DBGMCU_APB1FZR1_DBG_LPTIM1_STOP /!< The counter clock of LPTIM1 is stopped when the core is halted/
Kojto	122:f9eeca106725	287	/**
Kojto	122:f9eeca106725	288	* @}
Kojto	122:f9eeca106725	289	*/
Kojto	122:f9eeca106725	290
Kojto	122:f9eeca106725	291	/** @defgroup SYSTEM_LL_EC_APB1_GRP2_STOP_IP DBGMCU APB1 GRP2 STOP IP
Kojto	122:f9eeca106725	292	* @{
Kojto	122:f9eeca106725	293	*/
Kojto	122:f9eeca106725	294	#define LL_DBGMCU_APB1_GRP2_LPTIM2_STOP DBGMCU_APB1FZR2_DBG_LPTIM2_STOP /!< The counter clock of LPTIM2 is stopped when the core is halted/
Kojto	122:f9eeca106725	295	/**
Kojto	122:f9eeca106725	296	* @}
Kojto	122:f9eeca106725	297	*/
Kojto	122:f9eeca106725	298
Kojto	122:f9eeca106725	299	/** @defgroup SYSTEM_LL_EC_APB2_GRP1_STOP_IP DBGMCU APB2 GRP1 STOP IP
Kojto	122:f9eeca106725	300	* @{
Kojto	122:f9eeca106725	301	*/
Kojto	122:f9eeca106725	302	#define LL_DBGMCU_APB2_GRP1_TIM1_STOP DBGMCU_APB2FZ_DBG_TIM1_STOP /!< The counter clock of TIM1 is stopped when the core is halted/
Kojto	122:f9eeca106725	303	#if defined(TIM8)
Kojto	122:f9eeca106725	304	#define LL_DBGMCU_APB2_GRP1_TIM8_STOP DBGMCU_APB2FZ_DBG_TIM8_STOP /!< The counter clock of TIM8 is stopped when the core is halted/
Kojto	122:f9eeca106725	305	#endif /* TIM8 */
Kojto	122:f9eeca106725	306	#define LL_DBGMCU_APB2_GRP1_TIM15_STOP DBGMCU_APB2FZ_DBG_TIM15_STOP /!< The counter clock of TIM15 is stopped when the core is halted/
Kojto	122:f9eeca106725	307	#define LL_DBGMCU_APB2_GRP1_TIM16_STOP DBGMCU_APB2FZ_DBG_TIM16_STOP /!< The counter clock of TIM16 is stopped when the core is halted/
Kojto	122:f9eeca106725	308	#if defined(TIM17)
Kojto	122:f9eeca106725	309	#define LL_DBGMCU_APB2_GRP1_TIM17_STOP DBGMCU_APB2FZ_DBG_TIM17_STOP /!< The counter clock of TIM17 is stopped when the core is halted/
Kojto	122:f9eeca106725	310	#endif /* TIM17 */
Kojto	122:f9eeca106725	311	/**
Kojto	122:f9eeca106725	312	* @}
Kojto	122:f9eeca106725	313	*/
Kojto	122:f9eeca106725	314
Kojto	122:f9eeca106725	315	#if defined(VREFBUF)
Kojto	122:f9eeca106725	316	/** @defgroup SYSTEM_LL_EC_VOLTAGE VREFBUF VOLTAGE
Kojto	122:f9eeca106725	317	* @{
Kojto	122:f9eeca106725	318	*/
Kojto	122:f9eeca106725	319	#define LL_VREFBUF_VOLTAGE_SCALE0 ((uint32_t)0x00000000) /!< Voltage reference scale 0 (VREF_OUT1) /
Kojto	122:f9eeca106725	320	#define LL_VREFBUF_VOLTAGE_SCALE1 VREFBUF_CSR_VRS /!< Voltage reference scale 1 (VREF_OUT2) /
Kojto	122:f9eeca106725	321	/**
Kojto	122:f9eeca106725	322	* @}
Kojto	122:f9eeca106725	323	*/
Kojto	122:f9eeca106725	324	#endif /* VREFBUF */
Kojto	122:f9eeca106725	325
Kojto	122:f9eeca106725	326	/** @defgroup SYSTEM_LL_EC_LATENCY FLASH LATENCY
Kojto	122:f9eeca106725	327	* @{
Kojto	122:f9eeca106725	328	*/
Kojto	122:f9eeca106725	329	#define LL_FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /!< FLASH Zero wait state /
Kojto	122:f9eeca106725	330	#define LL_FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /!< FLASH One wait state /
Kojto	122:f9eeca106725	331	#define LL_FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /!< FLASH Two wait states /
Kojto	122:f9eeca106725	332	#define LL_FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /!< FLASH Three wait states /
Kojto	122:f9eeca106725	333	#define LL_FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /!< FLASH Four wait states /
Kojto	122:f9eeca106725	334	/**
Kojto	122:f9eeca106725	335	* @}
Kojto	122:f9eeca106725	336	*/
Kojto	122:f9eeca106725	337
Kojto	122:f9eeca106725	338	/**
Kojto	122:f9eeca106725	339	* @}
Kojto	122:f9eeca106725	340	*/
Kojto	122:f9eeca106725	341
Kojto	122:f9eeca106725	342	/* Exported macro ------------------------------------------------------------*/
Kojto	122:f9eeca106725	343
Kojto	122:f9eeca106725	344	/* Exported functions --------------------------------------------------------*/
Kojto	122:f9eeca106725	345	/** @defgroup SYSTEM_LL_Exported_Functions SYSTEM Exported Functions
Kojto	122:f9eeca106725	346	* @{
Kojto	122:f9eeca106725	347	*/
Kojto	122:f9eeca106725	348
Kojto	122:f9eeca106725	349	/** @defgroup SYSTEM_LL_EF_SYSCFG SYSCFG
Kojto	122:f9eeca106725	350	* @{
Kojto	122:f9eeca106725	351	*/
Kojto	122:f9eeca106725	352
Kojto	122:f9eeca106725	353	/**
Kojto	122:f9eeca106725	354	* @brief Set memory mapping at address 0x00000000
Kojto	122:f9eeca106725	355	* @rmtoll SYSCFG_MEMRMP MEM_MODE LL_SYSCFG_SetRemapMemory
Kojto	122:f9eeca106725	356	* @param Memory This parameter can be one of the following values:
Kojto	122:f9eeca106725	357	* @arg @ref LL_SYSCFG_REMAP_FLASH
Kojto	122:f9eeca106725	358	* @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH
Kojto	122:f9eeca106725	359	* @arg @ref LL_SYSCFG_REMAP_SRAM
Kojto	122:f9eeca106725	360	* @arg @ref LL_SYSCFG_REMAP_FMC (*)
Kojto	122:f9eeca106725	361	* @arg @ref LL_SYSCFG_REMAP_QUADSPI
Kojto	122:f9eeca106725	362	*
Kojto	122:f9eeca106725	363	* (*) value not defined in all devices
Kojto	122:f9eeca106725	364	* @retval None
Kojto	122:f9eeca106725	365	*/
Kojto	122:f9eeca106725	366	__STATIC_INLINE void LL_SYSCFG_SetRemapMemory(uint32_t Memory)
Kojto	122:f9eeca106725	367	{
Kojto	122:f9eeca106725	368	MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, Memory);
Kojto	122:f9eeca106725	369	}
Kojto	122:f9eeca106725	370
Kojto	122:f9eeca106725	371	/**
Kojto	122:f9eeca106725	372	* @brief Get memory mapping at address 0x00000000
Kojto	122:f9eeca106725	373	* @rmtoll SYSCFG_MEMRMP MEM_MODE LL_SYSCFG_GetRemapMemory
Kojto	122:f9eeca106725	374	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	375	* @arg @ref LL_SYSCFG_REMAP_FLASH
Kojto	122:f9eeca106725	376	* @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH
Kojto	122:f9eeca106725	377	* @arg @ref LL_SYSCFG_REMAP_SRAM
Kojto	122:f9eeca106725	378	* @arg @ref LL_SYSCFG_REMAP_FMC (*)
Kojto	122:f9eeca106725	379	* @arg @ref LL_SYSCFG_REMAP_QUADSPI
Kojto	122:f9eeca106725	380	*
Kojto	122:f9eeca106725	381	* (*) value not defined in all devices
Kojto	122:f9eeca106725	382	*/
Kojto	122:f9eeca106725	383	__STATIC_INLINE uint32_t LL_SYSCFG_GetRemapMemory(void)
Kojto	122:f9eeca106725	384	{
Kojto	122:f9eeca106725	385	return (uint32_t)(READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE));
Kojto	122:f9eeca106725	386	}
Kojto	122:f9eeca106725	387
Kojto	122:f9eeca106725	388	#if defined(SYSCFG_MEMRMP_FB_MODE)
Kojto	122:f9eeca106725	389	/**
Kojto	122:f9eeca106725	390	* @brief Select Flash bank mode (Bank flashed at 0x08000000)
Kojto	122:f9eeca106725	391	* @rmtoll SYSCFG_MEMRMP FB_MODE LL_SYSCFG_SetFlashBankMode
Kojto	122:f9eeca106725	392	* @param Bank This parameter can be one of the following values:
Kojto	122:f9eeca106725	393	* @arg @ref LL_SYSCFG_BANKMODE_BANK1
Kojto	122:f9eeca106725	394	* @arg @ref LL_SYSCFG_BANKMODE_BANK2
Kojto	122:f9eeca106725	395	* @retval None
Kojto	122:f9eeca106725	396	*/
Kojto	122:f9eeca106725	397	__STATIC_INLINE void LL_SYSCFG_SetFlashBankMode(uint32_t Bank)
Kojto	122:f9eeca106725	398	{
Kojto	122:f9eeca106725	399	MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE, Bank);
Kojto	122:f9eeca106725	400	}
Kojto	122:f9eeca106725	401
Kojto	122:f9eeca106725	402	/**
Kojto	122:f9eeca106725	403	* @brief Get Flash bank mode (Bank flashed at 0x08000000)
Kojto	122:f9eeca106725	404	* @rmtoll SYSCFG_MEMRMP FB_MODE LL_SYSCFG_GetFlashBankMode
Kojto	122:f9eeca106725	405	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	406	* @arg @ref LL_SYSCFG_BANKMODE_BANK1
Kojto	122:f9eeca106725	407	* @arg @ref LL_SYSCFG_BANKMODE_BANK2
Kojto	122:f9eeca106725	408	*/
Kojto	122:f9eeca106725	409	__STATIC_INLINE uint32_t LL_SYSCFG_GetFlashBankMode(void)
Kojto	122:f9eeca106725	410	{
Kojto	122:f9eeca106725	411	return (uint32_t)(READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE));
Kojto	122:f9eeca106725	412	}
Kojto	122:f9eeca106725	413	#endif /* SYSCFG_MEMRMP_FB_MODE */
Kojto	122:f9eeca106725	414
Kojto	122:f9eeca106725	415	/**
Kojto	122:f9eeca106725	416	* @brief Firewall protection enabled
Kojto	122:f9eeca106725	417	* @rmtoll SYSCFG_CFGR1 FWDIS LL_SYSCFG_EnableFirewall
Kojto	122:f9eeca106725	418	* @retval None
Kojto	122:f9eeca106725	419	*/
Kojto	122:f9eeca106725	420	__STATIC_INLINE void LL_SYSCFG_EnableFirewall(void)
Kojto	122:f9eeca106725	421	{
Kojto	122:f9eeca106725	422	CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS);
Kojto	122:f9eeca106725	423	}
Kojto	122:f9eeca106725	424
Kojto	122:f9eeca106725	425	/**
Kojto	122:f9eeca106725	426	* @brief Check if Firewall protection is enabled or not
Kojto	122:f9eeca106725	427	* @rmtoll SYSCFG_CFGR1 FWDIS LL_SYSCFG_IsEnabledFirewall
Kojto	122:f9eeca106725	428	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	429	*/
Kojto	122:f9eeca106725	430	__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledFirewall(void)
Kojto	122:f9eeca106725	431	{
Kojto	122:f9eeca106725	432	return !(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS) == SYSCFG_CFGR1_FWDIS);
Kojto	122:f9eeca106725	433	}
Kojto	122:f9eeca106725	434
Kojto	122:f9eeca106725	435	/**
Kojto	122:f9eeca106725	436	* @brief Enable I/O analog switch voltage booster.
Kojto	122:f9eeca106725	437	* @note When voltage booster is enabled, I/O analog switches are supplied
Kojto	122:f9eeca106725	438	* by a dedicated voltage booster, from VDD power domain. This is
Kojto	122:f9eeca106725	439	* the recommended configuration with low VDDA voltage operation.
Kojto	122:f9eeca106725	440	* @note The I/O analog switch voltage booster is relevant for peripherals
Kojto	122:f9eeca106725	441	* using I/O in analog input: ADC, COMP, OPAMP.
Kojto	122:f9eeca106725	442	* However, COMP and OPAMP inputs have a high impedance and
Kojto	122:f9eeca106725	443	* voltage booster do not impact performance significantly.
Kojto	122:f9eeca106725	444	* Therefore, the voltage booster is mainly intended for
Kojto	122:f9eeca106725	445	* usage with ADC.
Kojto	122:f9eeca106725	446	* @rmtoll SYSCFG_CFGR1 BOOSTEN LL_SYSCFG_EnableAnalogBooster
Kojto	122:f9eeca106725	447	* @retval None
Kojto	122:f9eeca106725	448	*/
Kojto	122:f9eeca106725	449	__STATIC_INLINE void LL_SYSCFG_EnableAnalogBooster(void)
Kojto	122:f9eeca106725	450	{
Kojto	122:f9eeca106725	451	SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN);
Kojto	122:f9eeca106725	452	}
Kojto	122:f9eeca106725	453
Kojto	122:f9eeca106725	454	/**
Kojto	122:f9eeca106725	455	* @brief Disable I/O analog switch voltage booster.
Kojto	122:f9eeca106725	456	* @note When voltage booster is enabled, I/O analog switches are supplied
Kojto	122:f9eeca106725	457	* by a dedicated voltage booster, from VDD power domain. This is
Kojto	122:f9eeca106725	458	* the recommended configuration with low VDDA voltage operation.
Kojto	122:f9eeca106725	459	* @note The I/O analog switch voltage booster is relevant for peripherals
Kojto	122:f9eeca106725	460	* using I/O in analog input: ADC, COMP, OPAMP.
Kojto	122:f9eeca106725	461	* However, COMP and OPAMP inputs have a high impedance and
Kojto	122:f9eeca106725	462	* voltage booster do not impact performance significantly.
Kojto	122:f9eeca106725	463	* Therefore, the voltage booster is mainly intended for
Kojto	122:f9eeca106725	464	* usage with ADC.
Kojto	122:f9eeca106725	465	* @rmtoll SYSCFG_CFGR1 BOOSTEN LL_SYSCFG_DisableAnalogBooster
Kojto	122:f9eeca106725	466	* @retval None
Kojto	122:f9eeca106725	467	*/
Kojto	122:f9eeca106725	468	__STATIC_INLINE void LL_SYSCFG_DisableAnalogBooster(void)
Kojto	122:f9eeca106725	469	{
Kojto	122:f9eeca106725	470	CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN);
Kojto	122:f9eeca106725	471	}
Kojto	122:f9eeca106725	472
Kojto	122:f9eeca106725	473	/**
Kojto	122:f9eeca106725	474	* @brief Enable the I2C fast mode plus driving capability.
Kojto	122:f9eeca106725	475	* @rmtoll SYSCFG_CFGR1 I2C_PBx_FMP LL_SYSCFG_EnableFastModePlus\n
Kojto	122:f9eeca106725	476	* SYSCFG_CFGR1 I2Cx_FMP LL_SYSCFG_EnableFastModePlus
Kojto	122:f9eeca106725	477	* @param ConfigFastModePlus This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	478	* @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB6
Kojto	122:f9eeca106725	479	* @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB7
Kojto	122:f9eeca106725	480	* @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB8 (*)
Kojto	122:f9eeca106725	481	* @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB9 (*)
Kojto	122:f9eeca106725	482	* @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C1
Kojto	122:f9eeca106725	483	* @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 (*)
Kojto	122:f9eeca106725	484	* @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C3
Kojto	122:f9eeca106725	485	*
Kojto	122:f9eeca106725	486	* (*) value not defined in all devices
Kojto	122:f9eeca106725	487	* @retval None
Kojto	122:f9eeca106725	488	*/
Kojto	122:f9eeca106725	489	__STATIC_INLINE void LL_SYSCFG_EnableFastModePlus(uint32_t ConfigFastModePlus)
Kojto	122:f9eeca106725	490	{
Kojto	122:f9eeca106725	491	SET_BIT(SYSCFG->CFGR1, ConfigFastModePlus);
Kojto	122:f9eeca106725	492	}
Kojto	122:f9eeca106725	493
Kojto	122:f9eeca106725	494	/**
Kojto	122:f9eeca106725	495	* @brief Disable the I2C fast mode plus driving capability.
Kojto	122:f9eeca106725	496	* @rmtoll SYSCFG_CFGR1 I2C_PBx_FMP LL_SYSCFG_DisableFastModePlus\n
Kojto	122:f9eeca106725	497	* SYSCFG_CFGR1 I2Cx_FMP LL_SYSCFG_DisableFastModePlus
Kojto	122:f9eeca106725	498	* @param ConfigFastModePlus This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	499	* @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB6
Kojto	122:f9eeca106725	500	* @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB7
Kojto	122:f9eeca106725	501	* @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB8 (*)
Kojto	122:f9eeca106725	502	* @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB9 (*)
Kojto	122:f9eeca106725	503	* @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C1
Kojto	122:f9eeca106725	504	* @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 (*)
Kojto	122:f9eeca106725	505	* @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C3
Kojto	122:f9eeca106725	506	*
Kojto	122:f9eeca106725	507	* (*) value not defined in all devices
Kojto	122:f9eeca106725	508	* @retval None
Kojto	122:f9eeca106725	509	*/
Kojto	122:f9eeca106725	510	__STATIC_INLINE void LL_SYSCFG_DisableFastModePlus(uint32_t ConfigFastModePlus)
Kojto	122:f9eeca106725	511	{
Kojto	122:f9eeca106725	512	CLEAR_BIT(SYSCFG->CFGR1, ConfigFastModePlus);
Kojto	122:f9eeca106725	513	}
Kojto	122:f9eeca106725	514
Kojto	122:f9eeca106725	515	/**
Kojto	122:f9eeca106725	516	* @brief Enable Floating Point Unit Invalid operation Interrupt
Kojto	122:f9eeca106725	517	* @rmtoll SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_EnableIT_FPU_IOC
Kojto	122:f9eeca106725	518	* @retval None
Kojto	122:f9eeca106725	519	*/
Kojto	122:f9eeca106725	520	__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IOC(void)
Kojto	122:f9eeca106725	521	{
Kojto	122:f9eeca106725	522	SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0);
Kojto	122:f9eeca106725	523	}
Kojto	122:f9eeca106725	524
Kojto	122:f9eeca106725	525	/**
Kojto	122:f9eeca106725	526	* @brief Enable Floating Point Unit Divide-by-zero Interrupt
Kojto	122:f9eeca106725	527	* @rmtoll SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_EnableIT_FPU_DZC
Kojto	122:f9eeca106725	528	* @retval None
Kojto	122:f9eeca106725	529	*/
Kojto	122:f9eeca106725	530	__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_DZC(void)
Kojto	122:f9eeca106725	531	{
Kojto	122:f9eeca106725	532	SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1);
Kojto	122:f9eeca106725	533	}
Kojto	122:f9eeca106725	534
Kojto	122:f9eeca106725	535	/**
Kojto	122:f9eeca106725	536	* @brief Enable Floating Point Unit Underflow Interrupt
Kojto	122:f9eeca106725	537	* @rmtoll SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_EnableIT_FPU_UFC
Kojto	122:f9eeca106725	538	* @retval None
Kojto	122:f9eeca106725	539	*/
Kojto	122:f9eeca106725	540	__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_UFC(void)
Kojto	122:f9eeca106725	541	{
Kojto	122:f9eeca106725	542	SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2);
Kojto	122:f9eeca106725	543	}
Kojto	122:f9eeca106725	544
Kojto	122:f9eeca106725	545	/**
Kojto	122:f9eeca106725	546	* @brief Enable Floating Point Unit Overflow Interrupt
Kojto	122:f9eeca106725	547	* @rmtoll SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_EnableIT_FPU_OFC
Kojto	122:f9eeca106725	548	* @retval None
Kojto	122:f9eeca106725	549	*/
Kojto	122:f9eeca106725	550	__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_OFC(void)
Kojto	122:f9eeca106725	551	{
Kojto	122:f9eeca106725	552	SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3);
Kojto	122:f9eeca106725	553	}
Kojto	122:f9eeca106725	554
Kojto	122:f9eeca106725	555	/**
Kojto	122:f9eeca106725	556	* @brief Enable Floating Point Unit Input denormal Interrupt
Kojto	122:f9eeca106725	557	* @rmtoll SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_EnableIT_FPU_IDC
Kojto	122:f9eeca106725	558	* @retval None
Kojto	122:f9eeca106725	559	*/
Kojto	122:f9eeca106725	560	__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IDC(void)
Kojto	122:f9eeca106725	561	{
Kojto	122:f9eeca106725	562	SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_4);
Kojto	122:f9eeca106725	563	}
Kojto	122:f9eeca106725	564
Kojto	122:f9eeca106725	565	/**
Kojto	122:f9eeca106725	566	* @brief Enable Floating Point Unit Inexact Interrupt
Kojto	122:f9eeca106725	567	* @rmtoll SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_EnableIT_FPU_IXC
Kojto	122:f9eeca106725	568	* @retval None
Kojto	122:f9eeca106725	569	*/
Kojto	122:f9eeca106725	570	__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IXC(void)
Kojto	122:f9eeca106725	571	{
Kojto	122:f9eeca106725	572	SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_5);
Kojto	122:f9eeca106725	573	}
Kojto	122:f9eeca106725	574
Kojto	122:f9eeca106725	575	/**
Kojto	122:f9eeca106725	576	* @brief Disable Floating Point Unit Invalid operation Interrupt
Kojto	122:f9eeca106725	577	* @rmtoll SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_DisableIT_FPU_IOC
Kojto	122:f9eeca106725	578	* @retval None
Kojto	122:f9eeca106725	579	*/
Kojto	122:f9eeca106725	580	__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IOC(void)
Kojto	122:f9eeca106725	581	{
Kojto	122:f9eeca106725	582	CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0);
Kojto	122:f9eeca106725	583	}
Kojto	122:f9eeca106725	584
Kojto	122:f9eeca106725	585	/**
Kojto	122:f9eeca106725	586	* @brief Disable Floating Point Unit Divide-by-zero Interrupt
Kojto	122:f9eeca106725	587	* @rmtoll SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_DisableIT_FPU_DZC
Kojto	122:f9eeca106725	588	* @retval None
Kojto	122:f9eeca106725	589	*/
Kojto	122:f9eeca106725	590	__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_DZC(void)
Kojto	122:f9eeca106725	591	{
Kojto	122:f9eeca106725	592	CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1);
Kojto	122:f9eeca106725	593	}
Kojto	122:f9eeca106725	594
Kojto	122:f9eeca106725	595	/**
Kojto	122:f9eeca106725	596	* @brief Disable Floating Point Unit Underflow Interrupt
Kojto	122:f9eeca106725	597	* @rmtoll SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_DisableIT_FPU_UFC
Kojto	122:f9eeca106725	598	* @retval None
Kojto	122:f9eeca106725	599	*/
Kojto	122:f9eeca106725	600	__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_UFC(void)
Kojto	122:f9eeca106725	601	{
Kojto	122:f9eeca106725	602	CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2);
Kojto	122:f9eeca106725	603	}
Kojto	122:f9eeca106725	604
Kojto	122:f9eeca106725	605	/**
Kojto	122:f9eeca106725	606	* @brief Disable Floating Point Unit Overflow Interrupt
Kojto	122:f9eeca106725	607	* @rmtoll SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_DisableIT_FPU_OFC
Kojto	122:f9eeca106725	608	* @retval None
Kojto	122:f9eeca106725	609	*/
Kojto	122:f9eeca106725	610	__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_OFC(void)
Kojto	122:f9eeca106725	611	{
Kojto	122:f9eeca106725	612	CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3);
Kojto	122:f9eeca106725	613	}
Kojto	122:f9eeca106725	614
Kojto	122:f9eeca106725	615	/**
Kojto	122:f9eeca106725	616	* @brief Disable Floating Point Unit Input denormal Interrupt
Kojto	122:f9eeca106725	617	* @rmtoll SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_DisableIT_FPU_IDC
Kojto	122:f9eeca106725	618	* @retval None
Kojto	122:f9eeca106725	619	*/
Kojto	122:f9eeca106725	620	__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IDC(void)
Kojto	122:f9eeca106725	621	{
Kojto	122:f9eeca106725	622	CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_4);
Kojto	122:f9eeca106725	623	}
Kojto	122:f9eeca106725	624
Kojto	122:f9eeca106725	625	/**
Kojto	122:f9eeca106725	626	* @brief Disable Floating Point Unit Inexact Interrupt
Kojto	122:f9eeca106725	627	* @rmtoll SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_DisableIT_FPU_IXC
Kojto	122:f9eeca106725	628	* @retval None
Kojto	122:f9eeca106725	629	*/
Kojto	122:f9eeca106725	630	__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IXC(void)
Kojto	122:f9eeca106725	631	{
Kojto	122:f9eeca106725	632	CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_5);
Kojto	122:f9eeca106725	633	}
Kojto	122:f9eeca106725	634
Kojto	122:f9eeca106725	635	/**
Kojto	122:f9eeca106725	636	* @brief Check if Floating Point Unit Invalid operation Interrupt source is enabled or disabled.
Kojto	122:f9eeca106725	637	* @rmtoll SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_IsEnabledIT_FPU_IOC
Kojto	122:f9eeca106725	638	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	639	*/
Kojto	122:f9eeca106725	640	__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IOC(void)
Kojto	122:f9eeca106725	641	{
Kojto	122:f9eeca106725	642	return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0) == (SYSCFG_CFGR1_FPU_IE_0));
Kojto	122:f9eeca106725	643	}
Kojto	122:f9eeca106725	644
Kojto	122:f9eeca106725	645	/**
Kojto	122:f9eeca106725	646	* @brief Check if Floating Point Unit Divide-by-zero Interrupt source is enabled or disabled.
Kojto	122:f9eeca106725	647	* @rmtoll SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_IsEnabledIT_FPU_DZC
Kojto	122:f9eeca106725	648	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	649	*/
Kojto	122:f9eeca106725	650	__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_DZC(void)
Kojto	122:f9eeca106725	651	{
Kojto	122:f9eeca106725	652	return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1) == (SYSCFG_CFGR1_FPU_IE_1));
Kojto	122:f9eeca106725	653	}
Kojto	122:f9eeca106725	654
Kojto	122:f9eeca106725	655	/**
Kojto	122:f9eeca106725	656	* @brief Check if Floating Point Unit Underflow Interrupt source is enabled or disabled.
Kojto	122:f9eeca106725	657	* @rmtoll SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_IsEnabledIT_FPU_UFC
Kojto	122:f9eeca106725	658	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	659	*/
Kojto	122:f9eeca106725	660	__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_UFC(void)
Kojto	122:f9eeca106725	661	{
Kojto	122:f9eeca106725	662	return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2) == (SYSCFG_CFGR1_FPU_IE_2));
Kojto	122:f9eeca106725	663	}
Kojto	122:f9eeca106725	664
Kojto	122:f9eeca106725	665	/**
Kojto	122:f9eeca106725	666	* @brief Check if Floating Point Unit Overflow Interrupt source is enabled or disabled.
Kojto	122:f9eeca106725	667	* @rmtoll SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_IsEnabledIT_FPU_OFC
Kojto	122:f9eeca106725	668	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	669	*/
Kojto	122:f9eeca106725	670	__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_OFC(void)
Kojto	122:f9eeca106725	671	{
Kojto	122:f9eeca106725	672	return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3) == (SYSCFG_CFGR1_FPU_IE_3));
Kojto	122:f9eeca106725	673	}
Kojto	122:f9eeca106725	674
Kojto	122:f9eeca106725	675	/**
Kojto	122:f9eeca106725	676	* @brief Check if Floating Point Unit Input denormal Interrupt source is enabled or disabled.
Kojto	122:f9eeca106725	677	* @rmtoll SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_IsEnabledIT_FPU_IDC
Kojto	122:f9eeca106725	678	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	679	*/
Kojto	122:f9eeca106725	680	__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IDC(void)
Kojto	122:f9eeca106725	681	{
Kojto	122:f9eeca106725	682	return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_4) == (SYSCFG_CFGR1_FPU_IE_4));
Kojto	122:f9eeca106725	683	}
Kojto	122:f9eeca106725	684
Kojto	122:f9eeca106725	685	/**
Kojto	122:f9eeca106725	686	* @brief Check if Floating Point Unit Inexact Interrupt source is enabled or disabled.
Kojto	122:f9eeca106725	687	* @rmtoll SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_IsEnabledIT_FPU_IXC
Kojto	122:f9eeca106725	688	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	689	*/
Kojto	122:f9eeca106725	690	__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IXC(void)
Kojto	122:f9eeca106725	691	{
Kojto	122:f9eeca106725	692	return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_5) == (SYSCFG_CFGR1_FPU_IE_5));
Kojto	122:f9eeca106725	693	}
Kojto	122:f9eeca106725	694
Kojto	122:f9eeca106725	695	/**
Kojto	122:f9eeca106725	696	* @brief Configure source input for the EXTI external interrupt.
Kojto	122:f9eeca106725	697	* @rmtoll SYSCFG_EXTICR1 EXTIx LL_SYSCFG_SetEXTISource\n
Kojto	122:f9eeca106725	698	* SYSCFG_EXTICR2 EXTIx LL_SYSCFG_SetEXTISource\n
Kojto	122:f9eeca106725	699	* SYSCFG_EXTICR3 EXTIx LL_SYSCFG_SetEXTISource\n
Kojto	122:f9eeca106725	700	* SYSCFG_EXTICR4 EXTIx LL_SYSCFG_SetEXTISource
Kojto	122:f9eeca106725	701	* @param Port This parameter can be one of the following values:
Kojto	122:f9eeca106725	702	* @arg @ref LL_SYSCFG_EXTI_PORTA
Kojto	122:f9eeca106725	703	* @arg @ref LL_SYSCFG_EXTI_PORTB
Kojto	122:f9eeca106725	704	* @arg @ref LL_SYSCFG_EXTI_PORTC
Kojto	122:f9eeca106725	705	* @arg @ref LL_SYSCFG_EXTI_PORTD
Kojto	122:f9eeca106725	706	* @arg @ref LL_SYSCFG_EXTI_PORTE
Kojto	122:f9eeca106725	707	* @arg @ref LL_SYSCFG_EXTI_PORTF (*)
Kojto	122:f9eeca106725	708	* @arg @ref LL_SYSCFG_EXTI_PORTG (*)
Kojto	122:f9eeca106725	709	* @arg @ref LL_SYSCFG_EXTI_PORTH
Kojto	122:f9eeca106725	710	*
Kojto	122:f9eeca106725	711	* (*) value not defined in all devices
Kojto	122:f9eeca106725	712	* @param Line This parameter can be one of the following values:
Kojto	122:f9eeca106725	713	* @arg @ref LL_SYSCFG_EXTI_LINE0
Kojto	122:f9eeca106725	714	* @arg @ref LL_SYSCFG_EXTI_LINE1
Kojto	122:f9eeca106725	715	* @arg @ref LL_SYSCFG_EXTI_LINE2
Kojto	122:f9eeca106725	716	* @arg @ref LL_SYSCFG_EXTI_LINE3
Kojto	122:f9eeca106725	717	* @arg @ref LL_SYSCFG_EXTI_LINE4
Kojto	122:f9eeca106725	718	* @arg @ref LL_SYSCFG_EXTI_LINE5
Kojto	122:f9eeca106725	719	* @arg @ref LL_SYSCFG_EXTI_LINE6
Kojto	122:f9eeca106725	720	* @arg @ref LL_SYSCFG_EXTI_LINE7
Kojto	122:f9eeca106725	721	* @arg @ref LL_SYSCFG_EXTI_LINE8
Kojto	122:f9eeca106725	722	* @arg @ref LL_SYSCFG_EXTI_LINE9
Kojto	122:f9eeca106725	723	* @arg @ref LL_SYSCFG_EXTI_LINE10
Kojto	122:f9eeca106725	724	* @arg @ref LL_SYSCFG_EXTI_LINE11
Kojto	122:f9eeca106725	725	* @arg @ref LL_SYSCFG_EXTI_LINE12
Kojto	122:f9eeca106725	726	* @arg @ref LL_SYSCFG_EXTI_LINE13
Kojto	122:f9eeca106725	727	* @arg @ref LL_SYSCFG_EXTI_LINE14
Kojto	122:f9eeca106725	728	* @arg @ref LL_SYSCFG_EXTI_LINE15
Kojto	122:f9eeca106725	729	* @retval None
Kojto	122:f9eeca106725	730	*/
Kojto	122:f9eeca106725	731	__STATIC_INLINE void LL_SYSCFG_SetEXTISource(uint32_t Port, uint32_t Line)
Kojto	122:f9eeca106725	732	{
Kojto	122:f9eeca106725	733	MODIFY_REG(SYSCFG->EXTICR[Line & 0xFF], (Line >> 16), Port << POSITION_VAL((Line >> 16)));
Kojto	122:f9eeca106725	734	}
Kojto	122:f9eeca106725	735
Kojto	122:f9eeca106725	736	/**
Kojto	122:f9eeca106725	737	* @brief Get the configured defined for specific EXTI Line
Kojto	122:f9eeca106725	738	* @rmtoll SYSCFG_EXTICR1 EXTIx LL_SYSCFG_GetEXTISource\n
Kojto	122:f9eeca106725	739	* SYSCFG_EXTICR2 EXTIx LL_SYSCFG_GetEXTISource\n
Kojto	122:f9eeca106725	740	* SYSCFG_EXTICR3 EXTIx LL_SYSCFG_GetEXTISource\n
Kojto	122:f9eeca106725	741	* SYSCFG_EXTICR4 EXTIx LL_SYSCFG_GetEXTISource
Kojto	122:f9eeca106725	742	* @param Line This parameter can be one of the following values:
Kojto	122:f9eeca106725	743	* @arg @ref LL_SYSCFG_EXTI_LINE0
Kojto	122:f9eeca106725	744	* @arg @ref LL_SYSCFG_EXTI_LINE1
Kojto	122:f9eeca106725	745	* @arg @ref LL_SYSCFG_EXTI_LINE2
Kojto	122:f9eeca106725	746	* @arg @ref LL_SYSCFG_EXTI_LINE3
Kojto	122:f9eeca106725	747	* @arg @ref LL_SYSCFG_EXTI_LINE4
Kojto	122:f9eeca106725	748	* @arg @ref LL_SYSCFG_EXTI_LINE5
Kojto	122:f9eeca106725	749	* @arg @ref LL_SYSCFG_EXTI_LINE6
Kojto	122:f9eeca106725	750	* @arg @ref LL_SYSCFG_EXTI_LINE7
Kojto	122:f9eeca106725	751	* @arg @ref LL_SYSCFG_EXTI_LINE8
Kojto	122:f9eeca106725	752	* @arg @ref LL_SYSCFG_EXTI_LINE9
Kojto	122:f9eeca106725	753	* @arg @ref LL_SYSCFG_EXTI_LINE10
Kojto	122:f9eeca106725	754	* @arg @ref LL_SYSCFG_EXTI_LINE11
Kojto	122:f9eeca106725	755	* @arg @ref LL_SYSCFG_EXTI_LINE12
Kojto	122:f9eeca106725	756	* @arg @ref LL_SYSCFG_EXTI_LINE13
Kojto	122:f9eeca106725	757	* @arg @ref LL_SYSCFG_EXTI_LINE14
Kojto	122:f9eeca106725	758	* @arg @ref LL_SYSCFG_EXTI_LINE15
Kojto	122:f9eeca106725	759	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	760	* @arg @ref LL_SYSCFG_EXTI_PORTA
Kojto	122:f9eeca106725	761	* @arg @ref LL_SYSCFG_EXTI_PORTB
Kojto	122:f9eeca106725	762	* @arg @ref LL_SYSCFG_EXTI_PORTC
Kojto	122:f9eeca106725	763	* @arg @ref LL_SYSCFG_EXTI_PORTD
Kojto	122:f9eeca106725	764	* @arg @ref LL_SYSCFG_EXTI_PORTE
Kojto	122:f9eeca106725	765	* @arg @ref LL_SYSCFG_EXTI_PORTF (*)
Kojto	122:f9eeca106725	766	* @arg @ref LL_SYSCFG_EXTI_PORTG (*)
Kojto	122:f9eeca106725	767	* @arg @ref LL_SYSCFG_EXTI_PORTH
Kojto	122:f9eeca106725	768	*
Kojto	122:f9eeca106725	769	* (*) value not defined in all devices
Kojto	122:f9eeca106725	770	*/
Kojto	122:f9eeca106725	771	__STATIC_INLINE uint32_t LL_SYSCFG_GetEXTISource(uint32_t Line)
Kojto	122:f9eeca106725	772	{
Kojto	122:f9eeca106725	773	return (uint32_t)(READ_BIT(SYSCFG->EXTICR[Line & 0xFF], (Line >> 16)) >> POSITION_VAL(Line >> 16));
Kojto	122:f9eeca106725	774	}
Kojto	122:f9eeca106725	775
Kojto	122:f9eeca106725	776	/**
Kojto	122:f9eeca106725	777	* @brief Enable SRAM2 Erase (starts a hardware SRAM2 erase operation. This bit is
Kojto	122:f9eeca106725	778	* automatically cleared at the end of the SRAM2 erase operation.)
Kojto	122:f9eeca106725	779	* @note This bit is write-protected: setting this bit is possible only after the
Kojto	122:f9eeca106725	780	* correct key sequence is written in the SYSCFG_SKR register.
Kojto	122:f9eeca106725	781	* @rmtoll SYSCFG_SCSR SRAM2ER LL_SYSCFG_EnableSRAM2Erase
Kojto	122:f9eeca106725	782	* @retval None
Kojto	122:f9eeca106725	783	*/
Kojto	122:f9eeca106725	784	__STATIC_INLINE void LL_SYSCFG_EnableSRAM2Erase(void)
Kojto	122:f9eeca106725	785	{
Kojto	122:f9eeca106725	786	/* unlock the write protection of the SRAM2ER bit */
Kojto	122:f9eeca106725	787	WRITE_REG(SYSCFG->SKR, 0xCA);
Kojto	122:f9eeca106725	788	WRITE_REG(SYSCFG->SKR, 0x53);
Kojto	122:f9eeca106725	789
Kojto	122:f9eeca106725	790	/* Starts a hardware SRAM2 erase operation*/
Kojto	122:f9eeca106725	791	SET_BIT(SYSCFG->SCSR, SYSCFG_SCSR_SRAM2ER);
Kojto	122:f9eeca106725	792	}
Kojto	122:f9eeca106725	793
Kojto	122:f9eeca106725	794	/**
Kojto	122:f9eeca106725	795	* @brief Check if SRAM2 erase operation is on going
Kojto	122:f9eeca106725	796	* @rmtoll SYSCFG_SCSR SRAM2BSY LL_SYSCFG_IsSRAM2EraseOngoing
Kojto	122:f9eeca106725	797	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	798	*/
Kojto	122:f9eeca106725	799	__STATIC_INLINE uint32_t LL_SYSCFG_IsSRAM2EraseOngoing(void)
Kojto	122:f9eeca106725	800	{
Kojto	122:f9eeca106725	801	return (READ_BIT(SYSCFG->SCSR, SYSCFG_SCSR_SRAM2BSY) == (SYSCFG_SCSR_SRAM2BSY));
Kojto	122:f9eeca106725	802	}
Kojto	122:f9eeca106725	803
Kojto	122:f9eeca106725	804	/**
Kojto	122:f9eeca106725	805	* @brief Set connections to TIM1/8/15/16/17 Break inputs
Kojto	122:f9eeca106725	806	* @rmtoll SYSCFG_CFGR2 CLL LL_SYSCFG_SetTIMBreakInputs\n
Kojto	122:f9eeca106725	807	* SYSCFG_CFGR2 SPL LL_SYSCFG_SetTIMBreakInputs\n
Kojto	122:f9eeca106725	808	* SYSCFG_CFGR2 PVDL LL_SYSCFG_SetTIMBreakInputs\n
Kojto	122:f9eeca106725	809	* SYSCFG_CFGR2 ECCL LL_SYSCFG_SetTIMBreakInputs
Kojto	122:f9eeca106725	810	* @param Break This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	811	* @arg @ref LL_SYSCFG_TIMBREAK_ECC
Kojto	122:f9eeca106725	812	* @arg @ref LL_SYSCFG_TIMBREAK_PVD
Kojto	122:f9eeca106725	813	* @arg @ref LL_SYSCFG_TIMBREAK_SRAM2_PARITY
Kojto	122:f9eeca106725	814	* @arg @ref LL_SYSCFG_TIMBREAK_LOCKUP
Kojto	122:f9eeca106725	815	* @retval None
Kojto	122:f9eeca106725	816	*/
Kojto	122:f9eeca106725	817	__STATIC_INLINE void LL_SYSCFG_SetTIMBreakInputs(uint32_t Break)
Kojto	122:f9eeca106725	818	{
Kojto	122:f9eeca106725	819	MODIFY_REG(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL \| SYSCFG_CFGR2_SPL \| SYSCFG_CFGR2_PVDL \| SYSCFG_CFGR2_ECCL, Break);
Kojto	122:f9eeca106725	820	}
Kojto	122:f9eeca106725	821
Kojto	122:f9eeca106725	822	/**
Kojto	122:f9eeca106725	823	* @brief Get connections to TIM1/8/15/16/17 Break inputs
Kojto	122:f9eeca106725	824	* @rmtoll SYSCFG_CFGR2 CLL LL_SYSCFG_GetTIMBreakInputs\n
Kojto	122:f9eeca106725	825	* SYSCFG_CFGR2 SPL LL_SYSCFG_GetTIMBreakInputs\n
Kojto	122:f9eeca106725	826	* SYSCFG_CFGR2 PVDL LL_SYSCFG_GetTIMBreakInputs\n
Kojto	122:f9eeca106725	827	* SYSCFG_CFGR2 ECCL LL_SYSCFG_GetTIMBreakInputs
Kojto	122:f9eeca106725	828	* @retval Returned value can be can be a combination of the following values:
Kojto	122:f9eeca106725	829	* @arg @ref LL_SYSCFG_TIMBREAK_ECC
Kojto	122:f9eeca106725	830	* @arg @ref LL_SYSCFG_TIMBREAK_PVD
Kojto	122:f9eeca106725	831	* @arg @ref LL_SYSCFG_TIMBREAK_SRAM2_PARITY
Kojto	122:f9eeca106725	832	* @arg @ref LL_SYSCFG_TIMBREAK_LOCKUP
Kojto	122:f9eeca106725	833	*/
Kojto	122:f9eeca106725	834	__STATIC_INLINE uint32_t LL_SYSCFG_GetTIMBreakInputs(void)
Kojto	122:f9eeca106725	835	{
Kojto	122:f9eeca106725	836	return (uint32_t)(READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL \| SYSCFG_CFGR2_SPL \| SYSCFG_CFGR2_PVDL \| SYSCFG_CFGR2_ECCL));
Kojto	122:f9eeca106725	837	}
Kojto	122:f9eeca106725	838
Kojto	122:f9eeca106725	839	/**
Kojto	122:f9eeca106725	840	* @brief Check if SRAM2 parity error detected
Kojto	122:f9eeca106725	841	* @rmtoll SYSCFG_CFGR2 SPF LL_SYSCFG_IsActiveFlag_SP
Kojto	122:f9eeca106725	842	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	843	*/
Kojto	122:f9eeca106725	844	__STATIC_INLINE uint32_t LL_SYSCFG_IsActiveFlag_SP(void)
Kojto	122:f9eeca106725	845	{
Kojto	122:f9eeca106725	846	return (READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF) == (SYSCFG_CFGR2_SPF));
Kojto	122:f9eeca106725	847	}
Kojto	122:f9eeca106725	848
Kojto	122:f9eeca106725	849	/**
Kojto	122:f9eeca106725	850	* @brief Clear SRAM2 parity error flag
Kojto	122:f9eeca106725	851	* @rmtoll SYSCFG_CFGR2 SPF LL_SYSCFG_ClearFlag_SP
Kojto	122:f9eeca106725	852	* @retval None
Kojto	122:f9eeca106725	853	*/
Kojto	122:f9eeca106725	854	__STATIC_INLINE void LL_SYSCFG_ClearFlag_SP(void)
Kojto	122:f9eeca106725	855	{
Kojto	122:f9eeca106725	856	SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF);
Kojto	122:f9eeca106725	857	}
Kojto	122:f9eeca106725	858
Kojto	122:f9eeca106725	859	/**
Kojto	122:f9eeca106725	860	* @brief Enable SRAM2 page write protection
Kojto	122:f9eeca106725	861	* @note Write protection is cleared only by a system reset
Kojto	122:f9eeca106725	862	* @rmtoll SYSCFG_SWPR PAGEx LL_SYSCFG_EnableSRAM2PageWRP
Kojto	122:f9eeca106725	863	* @param SRAM2WRP This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	864	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE0
Kojto	122:f9eeca106725	865	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE1
Kojto	122:f9eeca106725	866	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE2
Kojto	122:f9eeca106725	867	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE3
Kojto	122:f9eeca106725	868	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE4
Kojto	122:f9eeca106725	869	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE5
Kojto	122:f9eeca106725	870	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE6
Kojto	122:f9eeca106725	871	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE7
Kojto	122:f9eeca106725	872	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE8
Kojto	122:f9eeca106725	873	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE9
Kojto	122:f9eeca106725	874	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE10
Kojto	122:f9eeca106725	875	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE11
Kojto	122:f9eeca106725	876	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE12
Kojto	122:f9eeca106725	877	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE13
Kojto	122:f9eeca106725	878	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE14
Kojto	122:f9eeca106725	879	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE15
Kojto	122:f9eeca106725	880	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE16 (*)
Kojto	122:f9eeca106725	881	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE17 (*)
Kojto	122:f9eeca106725	882	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE18 (*)
Kojto	122:f9eeca106725	883	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE19 (*)
Kojto	122:f9eeca106725	884	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE20 (*)
Kojto	122:f9eeca106725	885	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE21 (*)
Kojto	122:f9eeca106725	886	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE22 (*)
Kojto	122:f9eeca106725	887	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE23 (*)
Kojto	122:f9eeca106725	888	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE24 (*)
Kojto	122:f9eeca106725	889	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE25 (*)
Kojto	122:f9eeca106725	890	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE26 (*)
Kojto	122:f9eeca106725	891	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE27 (*)
Kojto	122:f9eeca106725	892	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE28 (*)
Kojto	122:f9eeca106725	893	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE29 (*)
Kojto	122:f9eeca106725	894	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE30 (*)
Kojto	122:f9eeca106725	895	* @arg @ref LL_SYSCFG_SRAM2WRP_PAGE31 (*)
Kojto	122:f9eeca106725	896	*
Kojto	122:f9eeca106725	897	* (*) value not defined in all devices
Kojto	122:f9eeca106725	898	* @retval None
Kojto	122:f9eeca106725	899	*/
Kojto	122:f9eeca106725	900	__STATIC_INLINE void LL_SYSCFG_EnableSRAM2PageWRP(uint32_t SRAM2WRP)
Kojto	122:f9eeca106725	901	{
Kojto	122:f9eeca106725	902	SET_BIT(SYSCFG->SWPR, SRAM2WRP);
Kojto	122:f9eeca106725	903	}
Kojto	122:f9eeca106725	904
Kojto	122:f9eeca106725	905	/**
Kojto	122:f9eeca106725	906	* @brief SRAM2 page write protection lock prior to erase
Kojto	122:f9eeca106725	907	* @rmtoll SYSCFG_SKR KEY LL_SYSCFG_LockSRAM2WRP
Kojto	122:f9eeca106725	908	* @retval None
Kojto	122:f9eeca106725	909	*/
Kojto	122:f9eeca106725	910	__STATIC_INLINE void LL_SYSCFG_LockSRAM2WRP(void)
Kojto	122:f9eeca106725	911	{
Kojto	122:f9eeca106725	912	/* Writing a wrong key reactivates the write protection */
Kojto	122:f9eeca106725	913	WRITE_REG(SYSCFG->SKR, 0x00);
Kojto	122:f9eeca106725	914	}
Kojto	122:f9eeca106725	915
Kojto	122:f9eeca106725	916	/**
Kojto	122:f9eeca106725	917	* @brief SRAM2 page write protection unlock prior to erase
Kojto	122:f9eeca106725	918	* @rmtoll SYSCFG_SKR KEY LL_SYSCFG_UnlockSRAM2WRP
Kojto	122:f9eeca106725	919	* @retval None
Kojto	122:f9eeca106725	920	*/
Kojto	122:f9eeca106725	921	__STATIC_INLINE void LL_SYSCFG_UnlockSRAM2WRP(void)
Kojto	122:f9eeca106725	922	{
Kojto	122:f9eeca106725	923	/* unlock the write protection of the SRAM2ER bit */
Kojto	122:f9eeca106725	924	WRITE_REG(SYSCFG->SKR, 0xCA);
Kojto	122:f9eeca106725	925	WRITE_REG(SYSCFG->SKR, 0x53);
Kojto	122:f9eeca106725	926	}
Kojto	122:f9eeca106725	927
Kojto	122:f9eeca106725	928	/**
Kojto	122:f9eeca106725	929	* @}
Kojto	122:f9eeca106725	930	*/
Kojto	122:f9eeca106725	931
Kojto	122:f9eeca106725	932
Kojto	122:f9eeca106725	933	/** @defgroup SYSTEM_LL_EF_DBGMCU DBGMCU
Kojto	122:f9eeca106725	934	* @{
Kojto	122:f9eeca106725	935	*/
Kojto	122:f9eeca106725	936
Kojto	122:f9eeca106725	937	/**
Kojto	122:f9eeca106725	938	* @brief Return the device identifier
Kojto	122:f9eeca106725	939	* @rmtoll DBGMCU_IDCODE DEV_ID LL_DBGMCU_GetDeviceID
Kojto	122:f9eeca106725	940	* @retval Values between Min_Data=0x00 and Max_Data=0xFFFF (ex: device ID is 0x6415)
Kojto	122:f9eeca106725	941	*/
Kojto	122:f9eeca106725	942	__STATIC_INLINE uint32_t LL_DBGMCU_GetDeviceID(void)
Kojto	122:f9eeca106725	943	{
Kojto	122:f9eeca106725	944	return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_DEV_ID));
Kojto	122:f9eeca106725	945	}
Kojto	122:f9eeca106725	946
Kojto	122:f9eeca106725	947	/**
Kojto	122:f9eeca106725	948	* @brief Return the device revision identifier
Kojto	122:f9eeca106725	949	* @note This field indicates the revision of the device.
Kojto	122:f9eeca106725	950	* @rmtoll DBGMCU_IDCODE REV_ID LL_DBGMCU_GetRevisionID
Kojto	122:f9eeca106725	951	* @retval Values between Min_Data=0x00 and Max_Data=0xFFFF
Kojto	122:f9eeca106725	952	*/
Kojto	122:f9eeca106725	953	__STATIC_INLINE uint32_t LL_DBGMCU_GetRevisionID(void)
Kojto	122:f9eeca106725	954	{
Kojto	122:f9eeca106725	955	return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_REV_ID) >> DBGMCU_REVID_POSITION);
Kojto	122:f9eeca106725	956	}
Kojto	122:f9eeca106725	957
Kojto	122:f9eeca106725	958	/**
Kojto	122:f9eeca106725	959	* @brief Enable the Debug Module during SLEEP mode
Kojto	122:f9eeca106725	960	* @rmtoll DBGMCU_CR DBG_SLEEP LL_DBGMCU_EnableDBGSleepMode
Kojto	122:f9eeca106725	961	* @retval None
Kojto	122:f9eeca106725	962	*/
Kojto	122:f9eeca106725	963	__STATIC_INLINE void LL_DBGMCU_EnableDBGSleepMode(void)
Kojto	122:f9eeca106725	964	{
Kojto	122:f9eeca106725	965	SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
Kojto	122:f9eeca106725	966	}
Kojto	122:f9eeca106725	967
Kojto	122:f9eeca106725	968	/**
Kojto	122:f9eeca106725	969	* @brief Disable the Debug Module during SLEEP mode
Kojto	122:f9eeca106725	970	* @rmtoll DBGMCU_CR DBG_SLEEP LL_DBGMCU_DisableDBGSleepMode
Kojto	122:f9eeca106725	971	* @retval None
Kojto	122:f9eeca106725	972	*/
Kojto	122:f9eeca106725	973	__STATIC_INLINE void LL_DBGMCU_DisableDBGSleepMode(void)
Kojto	122:f9eeca106725	974	{
Kojto	122:f9eeca106725	975	CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
Kojto	122:f9eeca106725	976	}
Kojto	122:f9eeca106725	977
Kojto	122:f9eeca106725	978	/**
Kojto	122:f9eeca106725	979	* @brief Enable the Debug Module during STOP mode
Kojto	122:f9eeca106725	980	* @rmtoll DBGMCU_CR DBG_STOP LL_DBGMCU_EnableDBGStopMode
Kojto	122:f9eeca106725	981	* @retval None
Kojto	122:f9eeca106725	982	*/
Kojto	122:f9eeca106725	983	__STATIC_INLINE void LL_DBGMCU_EnableDBGStopMode(void)
Kojto	122:f9eeca106725	984	{
Kojto	122:f9eeca106725	985	SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
Kojto	122:f9eeca106725	986	}
Kojto	122:f9eeca106725	987
Kojto	122:f9eeca106725	988	/**
Kojto	122:f9eeca106725	989	* @brief Disable the Debug Module during STOP mode
Kojto	122:f9eeca106725	990	* @rmtoll DBGMCU_CR DBG_STOP LL_DBGMCU_DisableDBGStopMode
Kojto	122:f9eeca106725	991	* @retval None
Kojto	122:f9eeca106725	992	*/
Kojto	122:f9eeca106725	993	__STATIC_INLINE void LL_DBGMCU_DisableDBGStopMode(void)
Kojto	122:f9eeca106725	994	{
Kojto	122:f9eeca106725	995	CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
Kojto	122:f9eeca106725	996	}
Kojto	122:f9eeca106725	997
Kojto	122:f9eeca106725	998	/**
Kojto	122:f9eeca106725	999	* @brief Enable the Debug Module during STANDBY mode
Kojto	122:f9eeca106725	1000	* @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_EnableDBGStandbyMode
Kojto	122:f9eeca106725	1001	* @retval None
Kojto	122:f9eeca106725	1002	*/
Kojto	122:f9eeca106725	1003	__STATIC_INLINE void LL_DBGMCU_EnableDBGStandbyMode(void)
Kojto	122:f9eeca106725	1004	{
Kojto	122:f9eeca106725	1005	SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
Kojto	122:f9eeca106725	1006	}
Kojto	122:f9eeca106725	1007
Kojto	122:f9eeca106725	1008	/**
Kojto	122:f9eeca106725	1009	* @brief Disable the Debug Module during STANDBY mode
Kojto	122:f9eeca106725	1010	* @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_DisableDBGStandbyMode
Kojto	122:f9eeca106725	1011	* @retval None
Kojto	122:f9eeca106725	1012	*/
Kojto	122:f9eeca106725	1013	__STATIC_INLINE void LL_DBGMCU_DisableDBGStandbyMode(void)
Kojto	122:f9eeca106725	1014	{
Kojto	122:f9eeca106725	1015	CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
Kojto	122:f9eeca106725	1016	}
Kojto	122:f9eeca106725	1017
Kojto	122:f9eeca106725	1018	/**
Kojto	122:f9eeca106725	1019	* @brief Set Trace pin assignment control
Kojto	122:f9eeca106725	1020	* @rmtoll DBGMCU_CR TRACE_IOEN LL_DBGMCU_SetTracePinAssignment\n
Kojto	122:f9eeca106725	1021	* DBGMCU_CR TRACE_MODE LL_DBGMCU_SetTracePinAssignment
Kojto	122:f9eeca106725	1022	* @param PinAssignment This parameter can be one of the following values:
Kojto	122:f9eeca106725	1023	* @arg @ref LL_DBGMCU_TRACE_NONE
Kojto	122:f9eeca106725	1024	* @arg @ref LL_DBGMCU_TRACE_ASYNCH
Kojto	122:f9eeca106725	1025	* @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE1
Kojto	122:f9eeca106725	1026	* @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE2
Kojto	122:f9eeca106725	1027	* @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE4
Kojto	122:f9eeca106725	1028	* @retval None
Kojto	122:f9eeca106725	1029	*/
Kojto	122:f9eeca106725	1030	__STATIC_INLINE void LL_DBGMCU_SetTracePinAssignment(uint32_t PinAssignment)
Kojto	122:f9eeca106725	1031	{
Kojto	122:f9eeca106725	1032	MODIFY_REG(DBGMCU->CR, DBGMCU_CR_TRACE_IOEN \| DBGMCU_CR_TRACE_MODE, PinAssignment);
Kojto	122:f9eeca106725	1033	}
Kojto	122:f9eeca106725	1034
Kojto	122:f9eeca106725	1035	/**
Kojto	122:f9eeca106725	1036	* @brief Get Trace pin assignment control
Kojto	122:f9eeca106725	1037	* @rmtoll DBGMCU_CR TRACE_IOEN LL_DBGMCU_GetTracePinAssignment\n
Kojto	122:f9eeca106725	1038	* DBGMCU_CR TRACE_MODE LL_DBGMCU_GetTracePinAssignment
Kojto	122:f9eeca106725	1039	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1040	* @arg @ref LL_DBGMCU_TRACE_NONE
Kojto	122:f9eeca106725	1041	* @arg @ref LL_DBGMCU_TRACE_ASYNCH
Kojto	122:f9eeca106725	1042	* @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE1
Kojto	122:f9eeca106725	1043	* @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE2
Kojto	122:f9eeca106725	1044	* @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE4
Kojto	122:f9eeca106725	1045	*/
Kojto	122:f9eeca106725	1046	__STATIC_INLINE uint32_t LL_DBGMCU_GetTracePinAssignment(void)
Kojto	122:f9eeca106725	1047	{
Kojto	122:f9eeca106725	1048	return (uint32_t)(READ_BIT(DBGMCU->CR, DBGMCU_CR_TRACE_IOEN \| DBGMCU_CR_TRACE_MODE));
Kojto	122:f9eeca106725	1049	}
Kojto	122:f9eeca106725	1050
Kojto	122:f9eeca106725	1051	/**
Kojto	122:f9eeca106725	1052	* @brief Freeze APB1 peripherals (group1 peripherals)
Kojto	122:f9eeca106725	1053	* @rmtoll DBGMCU_APB1FZR1 DBG_xxxx_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph
Kojto	122:f9eeca106725	1054	* @param Periphs This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	1055	* @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP
Kojto	122:f9eeca106725	1056	* @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP (*)
Kojto	122:f9eeca106725	1057	* @arg @ref LL_DBGMCU_APB1_GRP1_TIM4_STOP (*)
Kojto	122:f9eeca106725	1058	* @arg @ref LL_DBGMCU_APB1_GRP1_TIM5_STOP (*)
Kojto	122:f9eeca106725	1059	* @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP
Kojto	122:f9eeca106725	1060	* @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP (*)
Kojto	122:f9eeca106725	1061	* @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP
Kojto	122:f9eeca106725	1062	* @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP
Kojto	122:f9eeca106725	1063	* @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP
Kojto	122:f9eeca106725	1064	* @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP
Kojto	122:f9eeca106725	1065	* @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP (*)
Kojto	122:f9eeca106725	1066	* @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP
Kojto	122:f9eeca106725	1067	* @arg @ref LL_DBGMCU_APB1_GRP1_CAN_STOP
Kojto	122:f9eeca106725	1068	* @arg @ref LL_DBGMCU_APB1_GRP1_LPTIM1_STOP
Kojto	122:f9eeca106725	1069	*
Kojto	122:f9eeca106725	1070	* (*) value not defined in all devices.
Kojto	122:f9eeca106725	1071	* @retval None
Kojto	122:f9eeca106725	1072	*/
Kojto	122:f9eeca106725	1073	__STATIC_INLINE void LL_DBGMCU_APB1_GRP1_FreezePeriph(uint32_t Periphs)
Kojto	122:f9eeca106725	1074	{
Kojto	122:f9eeca106725	1075	SET_BIT(DBGMCU->APB1FZR1, Periphs);
Kojto	122:f9eeca106725	1076	}
Kojto	122:f9eeca106725	1077
Kojto	122:f9eeca106725	1078	/**
Kojto	122:f9eeca106725	1079	* @brief Freeze APB1 peripherals (group2 peripherals)
Kojto	122:f9eeca106725	1080	* @rmtoll DBGMCU_APB1FZR2 DBG_xxxx_STOP LL_DBGMCU_APB1_GRP2_FreezePeriph
Kojto	122:f9eeca106725	1081	* @param Periphs This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	1082	* @arg @ref LL_DBGMCU_APB1_GRP2_LPTIM2_STOP
Kojto	122:f9eeca106725	1083	* @retval None
Kojto	122:f9eeca106725	1084	*/
Kojto	122:f9eeca106725	1085	__STATIC_INLINE void LL_DBGMCU_APB1_GRP2_FreezePeriph(uint32_t Periphs)
Kojto	122:f9eeca106725	1086	{
Kojto	122:f9eeca106725	1087	SET_BIT(DBGMCU->APB1FZR2, Periphs);
Kojto	122:f9eeca106725	1088	}
Kojto	122:f9eeca106725	1089
Kojto	122:f9eeca106725	1090	/**
Kojto	122:f9eeca106725	1091	* @brief Unfreeze APB1 peripherals (group1 peripherals)
Kojto	122:f9eeca106725	1092	* @rmtoll DBGMCU_APB1FZR1 DBG_xxxx_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph
Kojto	122:f9eeca106725	1093	* @param Periphs This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	1094	* @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP
Kojto	122:f9eeca106725	1095	* @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP (*)
Kojto	122:f9eeca106725	1096	* @arg @ref LL_DBGMCU_APB1_GRP1_TIM4_STOP (*)
Kojto	122:f9eeca106725	1097	* @arg @ref LL_DBGMCU_APB1_GRP1_TIM5_STOP (*)
Kojto	122:f9eeca106725	1098	* @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP
Kojto	122:f9eeca106725	1099	* @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP (*)
Kojto	122:f9eeca106725	1100	* @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP
Kojto	122:f9eeca106725	1101	* @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP
Kojto	122:f9eeca106725	1102	* @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP
Kojto	122:f9eeca106725	1103	* @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP
Kojto	122:f9eeca106725	1104	* @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP (*)
Kojto	122:f9eeca106725	1105	* @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP
Kojto	122:f9eeca106725	1106	* @arg @ref LL_DBGMCU_APB1_GRP1_CAN_STOP
Kojto	122:f9eeca106725	1107	* @arg @ref LL_DBGMCU_APB1_GRP1_LPTIM1_STOP
Kojto	122:f9eeca106725	1108	*
Kojto	122:f9eeca106725	1109	* (*) value not defined in all devices.
Kojto	122:f9eeca106725	1110	* @retval None
Kojto	122:f9eeca106725	1111	*/
Kojto	122:f9eeca106725	1112	__STATIC_INLINE void LL_DBGMCU_APB1_GRP1_UnFreezePeriph(uint32_t Periphs)
Kojto	122:f9eeca106725	1113	{
Kojto	122:f9eeca106725	1114	CLEAR_BIT(DBGMCU->APB1FZR1, Periphs);
Kojto	122:f9eeca106725	1115	}
Kojto	122:f9eeca106725	1116
Kojto	122:f9eeca106725	1117	/**
Kojto	122:f9eeca106725	1118	* @brief Unfreeze APB1 peripherals (group2 peripherals)
Kojto	122:f9eeca106725	1119	* @rmtoll DBGMCU_APB1FZR2 DBG_xxxx_STOP LL_DBGMCU_APB1_GRP2_UnFreezePeriph
Kojto	122:f9eeca106725	1120	* @param Periphs This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	1121	* @arg @ref LL_DBGMCU_APB1_GRP2_LPTIM2_STOP
Kojto	122:f9eeca106725	1122	* @retval None
Kojto	122:f9eeca106725	1123	*/
Kojto	122:f9eeca106725	1124	__STATIC_INLINE void LL_DBGMCU_APB1_GRP2_UnFreezePeriph(uint32_t Periphs)
Kojto	122:f9eeca106725	1125	{
Kojto	122:f9eeca106725	1126	CLEAR_BIT(DBGMCU->APB1FZR2, Periphs);
Kojto	122:f9eeca106725	1127	}
Kojto	122:f9eeca106725	1128
Kojto	122:f9eeca106725	1129	/**
Kojto	122:f9eeca106725	1130	* @brief Freeze APB2 peripherals
Kojto	122:f9eeca106725	1131	* @rmtoll DBGMCU_APB2FZ DBG_TIMx_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph
Kojto	122:f9eeca106725	1132	* @param Periphs This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	1133	* @arg @ref LL_DBGMCU_APB2_GRP1_TIM1_STOP
Kojto	122:f9eeca106725	1134	* @arg @ref LL_DBGMCU_APB2_GRP1_TIM8_STOP (*)
Kojto	122:f9eeca106725	1135	* @arg @ref LL_DBGMCU_APB2_GRP1_TIM15_STOP
Kojto	122:f9eeca106725	1136	* @arg @ref LL_DBGMCU_APB2_GRP1_TIM16_STOP
Kojto	122:f9eeca106725	1137	* @arg @ref LL_DBGMCU_APB2_GRP1_TIM17_STOP (*)
Kojto	122:f9eeca106725	1138	*
Kojto	122:f9eeca106725	1139	* (*) value not defined in all devices.
Kojto	122:f9eeca106725	1140	* @retval None
Kojto	122:f9eeca106725	1141	*/
Kojto	122:f9eeca106725	1142	__STATIC_INLINE void LL_DBGMCU_APB2_GRP1_FreezePeriph(uint32_t Periphs)
Kojto	122:f9eeca106725	1143	{
Kojto	122:f9eeca106725	1144	SET_BIT(DBGMCU->APB2FZ, Periphs);
Kojto	122:f9eeca106725	1145	}
Kojto	122:f9eeca106725	1146
Kojto	122:f9eeca106725	1147	/**
Kojto	122:f9eeca106725	1148	* @brief Unfreeze APB2 peripherals
Kojto	122:f9eeca106725	1149	* @rmtoll DBGMCU_APB2FZ DBG_TIMx_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph
Kojto	122:f9eeca106725	1150	* @param Periphs This parameter can be a combination of the following values:
Kojto	122:f9eeca106725	1151	* @arg @ref LL_DBGMCU_APB2_GRP1_TIM1_STOP
Kojto	122:f9eeca106725	1152	* @arg @ref LL_DBGMCU_APB2_GRP1_TIM8_STOP (*)
Kojto	122:f9eeca106725	1153	* @arg @ref LL_DBGMCU_APB2_GRP1_TIM15_STOP
Kojto	122:f9eeca106725	1154	* @arg @ref LL_DBGMCU_APB2_GRP1_TIM16_STOP
Kojto	122:f9eeca106725	1155	* @arg @ref LL_DBGMCU_APB2_GRP1_TIM17_STOP (*)
Kojto	122:f9eeca106725	1156	*
Kojto	122:f9eeca106725	1157	* (*) value not defined in all devices.
Kojto	122:f9eeca106725	1158	* @retval None
Kojto	122:f9eeca106725	1159	*/
Kojto	122:f9eeca106725	1160	__STATIC_INLINE void LL_DBGMCU_APB2_GRP1_UnFreezePeriph(uint32_t Periphs)
Kojto	122:f9eeca106725	1161	{
Kojto	122:f9eeca106725	1162	CLEAR_BIT(DBGMCU->APB2FZ, Periphs);
Kojto	122:f9eeca106725	1163	}
Kojto	122:f9eeca106725	1164
Kojto	122:f9eeca106725	1165	/**
Kojto	122:f9eeca106725	1166	* @}
Kojto	122:f9eeca106725	1167	*/
Kojto	122:f9eeca106725	1168
Kojto	122:f9eeca106725	1169	#if defined(VREFBUF)
Kojto	122:f9eeca106725	1170	/** @defgroup SYSTEM_LL_EF_VREFBUF VREFBUF
Kojto	122:f9eeca106725	1171	* @{
Kojto	122:f9eeca106725	1172	*/
Kojto	122:f9eeca106725	1173
Kojto	122:f9eeca106725	1174	/**
Kojto	122:f9eeca106725	1175	* @brief Enable Internal voltage reference
Kojto	122:f9eeca106725	1176	* @rmtoll VREFBUF_CSR ENVR LL_VREFBUF_Enable
Kojto	122:f9eeca106725	1177	* @retval None
Kojto	122:f9eeca106725	1178	*/
Kojto	122:f9eeca106725	1179	__STATIC_INLINE void LL_VREFBUF_Enable(void)
Kojto	122:f9eeca106725	1180	{
Kojto	122:f9eeca106725	1181	SET_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
Kojto	122:f9eeca106725	1182	}
Kojto	122:f9eeca106725	1183
Kojto	122:f9eeca106725	1184	/**
Kojto	122:f9eeca106725	1185	* @brief Disable Internal voltage reference
Kojto	122:f9eeca106725	1186	* @rmtoll VREFBUF_CSR ENVR LL_VREFBUF_Disable
Kojto	122:f9eeca106725	1187	* @retval None
Kojto	122:f9eeca106725	1188	*/
Kojto	122:f9eeca106725	1189	__STATIC_INLINE void LL_VREFBUF_Disable(void)
Kojto	122:f9eeca106725	1190	{
Kojto	122:f9eeca106725	1191	CLEAR_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
Kojto	122:f9eeca106725	1192	}
Kojto	122:f9eeca106725	1193
Kojto	122:f9eeca106725	1194	/**
Kojto	122:f9eeca106725	1195	* @brief Enable high impedance (VREF+pin is high impedance)
Kojto	122:f9eeca106725	1196	* @rmtoll VREFBUF_CSR HIZ LL_VREFBUF_EnableHIZ
Kojto	122:f9eeca106725	1197	* @retval None
Kojto	122:f9eeca106725	1198	*/
Kojto	122:f9eeca106725	1199	__STATIC_INLINE void LL_VREFBUF_EnableHIZ(void)
Kojto	122:f9eeca106725	1200	{
Kojto	122:f9eeca106725	1201	SET_BIT(VREFBUF->CSR, VREFBUF_CSR_HIZ);
Kojto	122:f9eeca106725	1202	}
Kojto	122:f9eeca106725	1203
Kojto	122:f9eeca106725	1204	/**
Kojto	122:f9eeca106725	1205	* @brief Disable high impedance (VREF+pin is internally connected to the voltage reference buffer output)
Kojto	122:f9eeca106725	1206	* @rmtoll VREFBUF_CSR HIZ LL_VREFBUF_DisableHIZ
Kojto	122:f9eeca106725	1207	* @retval None
Kojto	122:f9eeca106725	1208	*/
Kojto	122:f9eeca106725	1209	__STATIC_INLINE void LL_VREFBUF_DisableHIZ(void)
Kojto	122:f9eeca106725	1210	{
Kojto	122:f9eeca106725	1211	CLEAR_BIT(VREFBUF->CSR, VREFBUF_CSR_HIZ);
Kojto	122:f9eeca106725	1212	}
Kojto	122:f9eeca106725	1213
Kojto	122:f9eeca106725	1214	/**
Kojto	122:f9eeca106725	1215	* @brief Set the Voltage reference scale
Kojto	122:f9eeca106725	1216	* @rmtoll VREFBUF_CSR VRS LL_VREFBUF_SetVoltageScaling
Kojto	122:f9eeca106725	1217	* @param Scale This parameter can be one of the following values:
Kojto	122:f9eeca106725	1218	* @arg @ref LL_VREFBUF_VOLTAGE_SCALE0
Kojto	122:f9eeca106725	1219	* @arg @ref LL_VREFBUF_VOLTAGE_SCALE1
Kojto	122:f9eeca106725	1220	* @retval None
Kojto	122:f9eeca106725	1221	*/
Kojto	122:f9eeca106725	1222	__STATIC_INLINE void LL_VREFBUF_SetVoltageScaling(uint32_t Scale)
Kojto	122:f9eeca106725	1223	{
Kojto	122:f9eeca106725	1224	MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_VRS, Scale);
Kojto	122:f9eeca106725	1225	}
Kojto	122:f9eeca106725	1226
Kojto	122:f9eeca106725	1227	/**
Kojto	122:f9eeca106725	1228	* @brief Get the Voltage reference scale
Kojto	122:f9eeca106725	1229	* @rmtoll VREFBUF_CSR VRS LL_VREFBUF_GetVoltageScaling
Kojto	122:f9eeca106725	1230	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1231	* @arg @ref LL_VREFBUF_VOLTAGE_SCALE0
Kojto	122:f9eeca106725	1232	* @arg @ref LL_VREFBUF_VOLTAGE_SCALE1
Kojto	122:f9eeca106725	1233	*/
Kojto	122:f9eeca106725	1234	__STATIC_INLINE uint32_t LL_VREFBUF_GetVoltageScaling(void)
Kojto	122:f9eeca106725	1235	{
Kojto	122:f9eeca106725	1236	return (uint32_t)(READ_BIT(VREFBUF->CSR, VREFBUF_CSR_VRS));
Kojto	122:f9eeca106725	1237	}
Kojto	122:f9eeca106725	1238
Kojto	122:f9eeca106725	1239	/**
Kojto	122:f9eeca106725	1240	* @brief Check if Voltage reference buffer is ready
Kojto	122:f9eeca106725	1241	* @rmtoll VREFBUF_CSR VRR LL_VREFBUF_IsVREFReady
Kojto	122:f9eeca106725	1242	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1243	*/
Kojto	122:f9eeca106725	1244	__STATIC_INLINE uint32_t LL_VREFBUF_IsVREFReady(void)
Kojto	122:f9eeca106725	1245	{
Kojto	122:f9eeca106725	1246	return (READ_BIT(VREFBUF->CSR, VREFBUF_CSR_VRR) == (VREFBUF_CSR_VRR));
Kojto	122:f9eeca106725	1247	}
Kojto	122:f9eeca106725	1248
Kojto	122:f9eeca106725	1249	/**
Kojto	122:f9eeca106725	1250	* @brief Get the trimming code for VREFBUF calibration
Kojto	122:f9eeca106725	1251	* @rmtoll VREFBUF_CCR TRIM LL_VREFBUF_GetTrimming
Kojto	122:f9eeca106725	1252	* @retval Between 0 and 0x3F
Kojto	122:f9eeca106725	1253	*/
Kojto	122:f9eeca106725	1254	__STATIC_INLINE uint32_t LL_VREFBUF_GetTrimming(void)
Kojto	122:f9eeca106725	1255	{
Kojto	122:f9eeca106725	1256	return (uint32_t)(READ_BIT(VREFBUF->CCR, VREFBUF_CCR_TRIM));
Kojto	122:f9eeca106725	1257	}
Kojto	122:f9eeca106725	1258
Kojto	122:f9eeca106725	1259	/**
Kojto	122:f9eeca106725	1260	* @brief Set the trimming code for VREFBUF calibration (Tune the internal reference buffer voltage)
Kojto	122:f9eeca106725	1261	* @rmtoll VREFBUF_CCR TRIM LL_VREFBUF_SetTrimming
Kojto	122:f9eeca106725	1262	* @param Value Between 0 and 0x3F
Kojto	122:f9eeca106725	1263	* @retval None
Kojto	122:f9eeca106725	1264	*/
Kojto	122:f9eeca106725	1265	__STATIC_INLINE void LL_VREFBUF_SetTrimming(uint32_t Value)
Kojto	122:f9eeca106725	1266	{
Kojto	122:f9eeca106725	1267	WRITE_REG(VREFBUF->CCR, Value);
Kojto	122:f9eeca106725	1268	}
Kojto	122:f9eeca106725	1269
Kojto	122:f9eeca106725	1270	/**
Kojto	122:f9eeca106725	1271	* @}
Kojto	122:f9eeca106725	1272	*/
Kojto	122:f9eeca106725	1273	#endif /* VREFBUF */
Kojto	122:f9eeca106725	1274
Kojto	122:f9eeca106725	1275	/** @defgroup SYSTEM_LL_EF_FLASH FLASH
Kojto	122:f9eeca106725	1276	* @{
Kojto	122:f9eeca106725	1277	*/
Kojto	122:f9eeca106725	1278
Kojto	122:f9eeca106725	1279	/**
Kojto	122:f9eeca106725	1280	* @brief Set FLASH Latency
Kojto	122:f9eeca106725	1281	* @rmtoll FLASH_ACR LATENCY LL_FLASH_SetLatency
Kojto	122:f9eeca106725	1282	* @param Latency This parameter can be one of the following values:
Kojto	122:f9eeca106725	1283	* @arg @ref LL_FLASH_LATENCY_0
Kojto	122:f9eeca106725	1284	* @arg @ref LL_FLASH_LATENCY_1
Kojto	122:f9eeca106725	1285	* @arg @ref LL_FLASH_LATENCY_2
Kojto	122:f9eeca106725	1286	* @arg @ref LL_FLASH_LATENCY_3
Kojto	122:f9eeca106725	1287	* @arg @ref LL_FLASH_LATENCY_4
Kojto	122:f9eeca106725	1288	* @retval None
Kojto	122:f9eeca106725	1289	*/
Kojto	122:f9eeca106725	1290	__STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency)
Kojto	122:f9eeca106725	1291	{
Kojto	122:f9eeca106725	1292	MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency);
Kojto	122:f9eeca106725	1293	}
Kojto	122:f9eeca106725	1294
Kojto	122:f9eeca106725	1295	/**
Kojto	122:f9eeca106725	1296	* @brief Get FLASH Latency
Kojto	122:f9eeca106725	1297	* @rmtoll FLASH_ACR LATENCY LL_FLASH_GetLatency
Kojto	122:f9eeca106725	1298	* @retval Returned value can be one of the following values:
Kojto	122:f9eeca106725	1299	* @arg @ref LL_FLASH_LATENCY_0
Kojto	122:f9eeca106725	1300	* @arg @ref LL_FLASH_LATENCY_1
Kojto	122:f9eeca106725	1301	* @arg @ref LL_FLASH_LATENCY_2
Kojto	122:f9eeca106725	1302	* @arg @ref LL_FLASH_LATENCY_3
Kojto	122:f9eeca106725	1303	* @arg @ref LL_FLASH_LATENCY_4
Kojto	122:f9eeca106725	1304	*/
Kojto	122:f9eeca106725	1305	__STATIC_INLINE uint32_t LL_FLASH_GetLatency(void)
Kojto	122:f9eeca106725	1306	{
Kojto	122:f9eeca106725	1307	return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY));
Kojto	122:f9eeca106725	1308	}
Kojto	122:f9eeca106725	1309
Kojto	122:f9eeca106725	1310	/**
Kojto	122:f9eeca106725	1311	* @brief Enable Prefetch
Kojto	122:f9eeca106725	1312	* @rmtoll FLASH_ACR PRFTEN LL_FLASH_EnablePrefetch
Kojto	122:f9eeca106725	1313	* @retval None
Kojto	122:f9eeca106725	1314	*/
Kojto	122:f9eeca106725	1315	__STATIC_INLINE void LL_FLASH_EnablePrefetch(void)
Kojto	122:f9eeca106725	1316	{
Kojto	122:f9eeca106725	1317	SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN);
Kojto	122:f9eeca106725	1318	}
Kojto	122:f9eeca106725	1319
Kojto	122:f9eeca106725	1320	/**
Kojto	122:f9eeca106725	1321	* @brief Disable Prefetch
Kojto	122:f9eeca106725	1322	* @rmtoll FLASH_ACR PRFTEN LL_FLASH_DisablePrefetch
Kojto	122:f9eeca106725	1323	* @retval None
Kojto	122:f9eeca106725	1324	*/
Kojto	122:f9eeca106725	1325	__STATIC_INLINE void LL_FLASH_DisablePrefetch(void)
Kojto	122:f9eeca106725	1326	{
Kojto	122:f9eeca106725	1327	CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN);
Kojto	122:f9eeca106725	1328	}
Kojto	122:f9eeca106725	1329
Kojto	122:f9eeca106725	1330	/**
Kojto	122:f9eeca106725	1331	* @brief Check if Prefetch buffer is enabled
Kojto	122:f9eeca106725	1332	* @rmtoll FLASH_ACR PRFTEN LL_FLASH_IsPrefetchEnabled
Kojto	122:f9eeca106725	1333	* @retval State of bit (1 or 0).
Kojto	122:f9eeca106725	1334	*/
Kojto	122:f9eeca106725	1335	__STATIC_INLINE uint32_t LL_FLASH_IsPrefetchEnabled(void)
Kojto	122:f9eeca106725	1336	{
Kojto	122:f9eeca106725	1337	return (READ_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) == (FLASH_ACR_PRFTEN));
Kojto	122:f9eeca106725	1338	}
Kojto	122:f9eeca106725	1339
Kojto	122:f9eeca106725	1340	/**
Kojto	122:f9eeca106725	1341	* @brief Enable Instruction cache
Kojto	122:f9eeca106725	1342	* @rmtoll FLASH_ACR ICEN LL_FLASH_EnableInstCache
Kojto	122:f9eeca106725	1343	* @retval None
Kojto	122:f9eeca106725	1344	*/
Kojto	122:f9eeca106725	1345	__STATIC_INLINE void LL_FLASH_EnableInstCache(void)
Kojto	122:f9eeca106725	1346	{
Kojto	122:f9eeca106725	1347	SET_BIT(FLASH->ACR, FLASH_ACR_ICEN);
Kojto	122:f9eeca106725	1348	}
Kojto	122:f9eeca106725	1349
Kojto	122:f9eeca106725	1350	/**
Kojto	122:f9eeca106725	1351	* @brief Disable Instruction cache
Kojto	122:f9eeca106725	1352	* @rmtoll FLASH_ACR ICEN LL_FLASH_DisableInstCache
Kojto	122:f9eeca106725	1353	* @retval None
Kojto	122:f9eeca106725	1354	*/
Kojto	122:f9eeca106725	1355	__STATIC_INLINE void LL_FLASH_DisableInstCache(void)
Kojto	122:f9eeca106725	1356	{
Kojto	122:f9eeca106725	1357	CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICEN);
Kojto	122:f9eeca106725	1358	}
Kojto	122:f9eeca106725	1359
Kojto	122:f9eeca106725	1360	/**
Kojto	122:f9eeca106725	1361	* @brief Enable Data cache
Kojto	122:f9eeca106725	1362	* @rmtoll FLASH_ACR DCEN LL_FLASH_EnableDataCache
Kojto	122:f9eeca106725	1363	* @retval None
Kojto	122:f9eeca106725	1364	*/
Kojto	122:f9eeca106725	1365	__STATIC_INLINE void LL_FLASH_EnableDataCache(void)
Kojto	122:f9eeca106725	1366	{
Kojto	122:f9eeca106725	1367	SET_BIT(FLASH->ACR, FLASH_ACR_DCEN);
Kojto	122:f9eeca106725	1368	}
Kojto	122:f9eeca106725	1369
Kojto	122:f9eeca106725	1370	/**
Kojto	122:f9eeca106725	1371	* @brief Disable Data cache
Kojto	122:f9eeca106725	1372	* @rmtoll FLASH_ACR DCEN LL_FLASH_DisableDataCache
Kojto	122:f9eeca106725	1373	* @retval None
Kojto	122:f9eeca106725	1374	*/
Kojto	122:f9eeca106725	1375	__STATIC_INLINE void LL_FLASH_DisableDataCache(void)
Kojto	122:f9eeca106725	1376	{
Kojto	122:f9eeca106725	1377	CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCEN);
Kojto	122:f9eeca106725	1378	}
Kojto	122:f9eeca106725	1379
Kojto	122:f9eeca106725	1380	/**
Kojto	122:f9eeca106725	1381	* @brief Enable Instruction cache reset
Kojto	122:f9eeca106725	1382	* @note bit can be written only when the instruction cache is disabled
Kojto	122:f9eeca106725	1383	* @rmtoll FLASH_ACR ICRST LL_FLASH_EnableInstCacheReset
Kojto	122:f9eeca106725	1384	* @retval None
Kojto	122:f9eeca106725	1385	*/
Kojto	122:f9eeca106725	1386	__STATIC_INLINE void LL_FLASH_EnableInstCacheReset(void)
Kojto	122:f9eeca106725	1387	{
Kojto	122:f9eeca106725	1388	SET_BIT(FLASH->ACR, FLASH_ACR_ICRST);
Kojto	122:f9eeca106725	1389	}
Kojto	122:f9eeca106725	1390
Kojto	122:f9eeca106725	1391	/**
Kojto	122:f9eeca106725	1392	* @brief Disable Instruction cache reset
Kojto	122:f9eeca106725	1393	* @rmtoll FLASH_ACR ICRST LL_FLASH_DisableInstCacheReset
Kojto	122:f9eeca106725	1394	* @retval None
Kojto	122:f9eeca106725	1395	*/
Kojto	122:f9eeca106725	1396	__STATIC_INLINE void LL_FLASH_DisableInstCacheReset(void)
Kojto	122:f9eeca106725	1397	{
Kojto	122:f9eeca106725	1398	CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICRST);
Kojto	122:f9eeca106725	1399	}
Kojto	122:f9eeca106725	1400
Kojto	122:f9eeca106725	1401	/**
Kojto	122:f9eeca106725	1402	* @brief Enable Data cache reset
Kojto	122:f9eeca106725	1403	* @note bit can be written only when the data cache is disabled
Kojto	122:f9eeca106725	1404	* @rmtoll FLASH_ACR DCRST LL_FLASH_EnableDataCacheReset
Kojto	122:f9eeca106725	1405	* @retval None
Kojto	122:f9eeca106725	1406	*/
Kojto	122:f9eeca106725	1407	__STATIC_INLINE void LL_FLASH_EnableDataCacheReset(void)
Kojto	122:f9eeca106725	1408	{
Kojto	122:f9eeca106725	1409	SET_BIT(FLASH->ACR, FLASH_ACR_DCRST);
Kojto	122:f9eeca106725	1410	}
Kojto	122:f9eeca106725	1411
Kojto	122:f9eeca106725	1412	/**
Kojto	122:f9eeca106725	1413	* @brief Disable Data cache reset
Kojto	122:f9eeca106725	1414	* @rmtoll FLASH_ACR DCRST LL_FLASH_DisableDataCacheReset
Kojto	122:f9eeca106725	1415	* @retval None
Kojto	122:f9eeca106725	1416	*/
Kojto	122:f9eeca106725	1417	__STATIC_INLINE void LL_FLASH_DisableDataCacheReset(void)
Kojto	122:f9eeca106725	1418	{
Kojto	122:f9eeca106725	1419	CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCRST);
Kojto	122:f9eeca106725	1420	}
Kojto	122:f9eeca106725	1421
Kojto	122:f9eeca106725	1422	/**
Kojto	122:f9eeca106725	1423	* @brief Enable Flash Power-down mode during run mode or Low-power run mode
Kojto	122:f9eeca106725	1424	* @note Flash memory can be put in power-down mode only when the code is executed
Kojto	122:f9eeca106725	1425	* from RAM
Kojto	122:f9eeca106725	1426	* @note Flash must not be accessed when power down is enabled
Kojto	122:f9eeca106725	1427	* @note Flash must not be put in power-down while a program or an erase operation
Kojto	122:f9eeca106725	1428	* is on-going
Kojto	122:f9eeca106725	1429	* @rmtoll FLASH_ACR RUN_PD LL_FLASH_EnableRunPowerDown\n
Kojto	122:f9eeca106725	1430	* FLASH_PDKEYR PDKEY1 LL_FLASH_EnableRunPowerDown\n
Kojto	122:f9eeca106725	1431	* FLASH_PDKEYR PDKEY2 LL_FLASH_EnableRunPowerDown
Kojto	122:f9eeca106725	1432	* @retval None
Kojto	122:f9eeca106725	1433	*/
Kojto	122:f9eeca106725	1434	__STATIC_INLINE void LL_FLASH_EnableRunPowerDown(void)
Kojto	122:f9eeca106725	1435	{
Kojto	122:f9eeca106725	1436	/* Following values must be written consecutively to unlock the RUN_PD bit in
Kojto	122:f9eeca106725	1437	FLASH_ACR */
Kojto	122:f9eeca106725	1438	WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1);
Kojto	122:f9eeca106725	1439	WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2);
Kojto	122:f9eeca106725	1440	SET_BIT(FLASH->ACR, FLASH_ACR_RUN_PD);
Kojto	122:f9eeca106725	1441	}
Kojto	122:f9eeca106725	1442
Kojto	122:f9eeca106725	1443	/**
Kojto	122:f9eeca106725	1444	* @brief Disable Flash Power-down mode during run mode or Low-power run mode
Kojto	122:f9eeca106725	1445	* @rmtoll FLASH_ACR RUN_PD LL_FLASH_DisableRunPowerDown\n
Kojto	122:f9eeca106725	1446	* FLASH_PDKEYR PDKEY1 LL_FLASH_DisableRunPowerDown\n
Kojto	122:f9eeca106725	1447	* FLASH_PDKEYR PDKEY2 LL_FLASH_DisableRunPowerDown
Kojto	122:f9eeca106725	1448	* @retval None
Kojto	122:f9eeca106725	1449	*/
Kojto	122:f9eeca106725	1450	__STATIC_INLINE void LL_FLASH_DisableRunPowerDown(void)
Kojto	122:f9eeca106725	1451	{
Kojto	122:f9eeca106725	1452	/* Following values must be written consecutively to unlock the RUN_PD bit in
Kojto	122:f9eeca106725	1453	FLASH_ACR */
Kojto	122:f9eeca106725	1454	WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1);
Kojto	122:f9eeca106725	1455	WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2);
Kojto	122:f9eeca106725	1456	CLEAR_BIT(FLASH->ACR, FLASH_ACR_RUN_PD);
Kojto	122:f9eeca106725	1457	}
Kojto	122:f9eeca106725	1458
Kojto	122:f9eeca106725	1459	/**
Kojto	122:f9eeca106725	1460	* @brief Enable Flash Power-down mode during Sleep or Low-power sleep mode
Kojto	122:f9eeca106725	1461	* @note Flash must not be put in power-down while a program or an erase operation
Kojto	122:f9eeca106725	1462	* is on-going
Kojto	122:f9eeca106725	1463	* @rmtoll FLASH_ACR SLEEP_PD LL_FLASH_EnableSleepPowerDown
Kojto	122:f9eeca106725	1464	* @retval None
Kojto	122:f9eeca106725	1465	*/
Kojto	122:f9eeca106725	1466	__STATIC_INLINE void LL_FLASH_EnableSleepPowerDown(void)
Kojto	122:f9eeca106725	1467	{
Kojto	122:f9eeca106725	1468	SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD);
Kojto	122:f9eeca106725	1469	}
Kojto	122:f9eeca106725	1470
Kojto	122:f9eeca106725	1471	/**
Kojto	122:f9eeca106725	1472	* @brief Disable Flash Power-down mode during Sleep or Low-power sleep mode
Kojto	122:f9eeca106725	1473	* @rmtoll FLASH_ACR SLEEP_PD LL_FLASH_DisableSleepPowerDown
Kojto	122:f9eeca106725	1474	* @retval None
Kojto	122:f9eeca106725	1475	*/
Kojto	122:f9eeca106725	1476	__STATIC_INLINE void LL_FLASH_DisableSleepPowerDown(void)
Kojto	122:f9eeca106725	1477	{
Kojto	122:f9eeca106725	1478	CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD);
Kojto	122:f9eeca106725	1479	}
Kojto	122:f9eeca106725	1480
Kojto	122:f9eeca106725	1481	/**
Kojto	122:f9eeca106725	1482	* @}
Kojto	122:f9eeca106725	1483	*/
Kojto	122:f9eeca106725	1484
Kojto	122:f9eeca106725	1485	/**
Kojto	122:f9eeca106725	1486	* @}
Kojto	122:f9eeca106725	1487	*/
Kojto	122:f9eeca106725	1488
Kojto	122:f9eeca106725	1489	/**
Kojto	122:f9eeca106725	1490	* @}
Kojto	122:f9eeca106725	1491	*/
Kojto	122:f9eeca106725	1492
Kojto	122:f9eeca106725	1493	#endif /* defined (FLASH) \|\| defined (SYSCFG) \|\| defined (DBGMCU) \|\| defined (VREFBUF) */
Kojto	122:f9eeca106725	1494
Kojto	122:f9eeca106725	1495	/**
Kojto	122:f9eeca106725	1496	* @}
Kojto	122:f9eeca106725	1497	*/
Kojto	122:f9eeca106725	1498
Kojto	122:f9eeca106725	1499	#ifdef __cplusplus
Kojto	122:f9eeca106725	1500	}
Kojto	122:f9eeca106725	1501	#endif
Kojto	122:f9eeca106725	1502
Kojto	122:f9eeca106725	1503	#endif /* __STM32L4xx_LL_SYSTEM_H */
Kojto	122:f9eeca106725	1504
Kojto	122:f9eeca106725	1505	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/