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TARGET_NUCLEO_F334R8/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_ll_wwdg.h@143:86740a56073b, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:30:20 2017 +0100
Revision:
143:86740a56073b
Parent:
135:176b8275d35d
Child:
168:b9e159c1930a
Release 143 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 135:176b8275d35d 1 /**
<> 135:176b8275d35d 2 ******************************************************************************
<> 135:176b8275d35d 3 * @file stm32f3xx_ll_wwdg.h
<> 135:176b8275d35d 4 * @author MCD Application Team
<> 135:176b8275d35d 5 * @version V1.4.0
<> 135:176b8275d35d 6 * @date 16-December-2016
<> 135:176b8275d35d 7 * @brief Header file of WWDG LL module.
<> 135:176b8275d35d 8 ******************************************************************************
<> 135:176b8275d35d 9 * @attention
<> 135:176b8275d35d 10 *
<> 135:176b8275d35d 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 135:176b8275d35d 12 *
<> 135:176b8275d35d 13 * Redistribution and use in source and binary forms, with or without modification,
<> 135:176b8275d35d 14 * are permitted provided that the following conditions are met:
<> 135:176b8275d35d 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 135:176b8275d35d 16 * this list of conditions and the following disclaimer.
<> 135:176b8275d35d 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 135:176b8275d35d 18 * this list of conditions and the following disclaimer in the documentation
<> 135:176b8275d35d 19 * and/or other materials provided with the distribution.
<> 135:176b8275d35d 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 135:176b8275d35d 21 * may be used to endorse or promote products derived from this software
<> 135:176b8275d35d 22 * without specific prior written permission.
<> 135:176b8275d35d 23 *
<> 135:176b8275d35d 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 135:176b8275d35d 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 135:176b8275d35d 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 135:176b8275d35d 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 135:176b8275d35d 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 135:176b8275d35d 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 135:176b8275d35d 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 135:176b8275d35d 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 135:176b8275d35d 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 135:176b8275d35d 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 135:176b8275d35d 34 *
<> 135:176b8275d35d 35 ******************************************************************************
<> 135:176b8275d35d 36 */
<> 135:176b8275d35d 37
<> 135:176b8275d35d 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 135:176b8275d35d 39 #ifndef __STM32F3xx_LL_WWDG_H
<> 135:176b8275d35d 40 #define __STM32F3xx_LL_WWDG_H
<> 135:176b8275d35d 41
<> 135:176b8275d35d 42 #ifdef __cplusplus
<> 135:176b8275d35d 43 extern "C" {
<> 135:176b8275d35d 44 #endif
<> 135:176b8275d35d 45
<> 135:176b8275d35d 46 /* Includes ------------------------------------------------------------------*/
<> 135:176b8275d35d 47 #include "stm32f3xx.h"
<> 135:176b8275d35d 48
<> 135:176b8275d35d 49 /** @addtogroup STM32F3xx_LL_Driver
<> 135:176b8275d35d 50 * @{
<> 135:176b8275d35d 51 */
<> 135:176b8275d35d 52
<> 135:176b8275d35d 53 #if defined (WWDG)
<> 135:176b8275d35d 54
<> 135:176b8275d35d 55 /** @defgroup WWDG_LL WWDG
<> 135:176b8275d35d 56 * @{
<> 135:176b8275d35d 57 */
<> 135:176b8275d35d 58
<> 135:176b8275d35d 59 /* Private types -------------------------------------------------------------*/
<> 135:176b8275d35d 60 /* Private variables ---------------------------------------------------------*/
<> 135:176b8275d35d 61
<> 135:176b8275d35d 62 /* Private constants ---------------------------------------------------------*/
<> 135:176b8275d35d 63
<> 135:176b8275d35d 64 /* Private macros ------------------------------------------------------------*/
<> 135:176b8275d35d 65
<> 135:176b8275d35d 66 /* Exported types ------------------------------------------------------------*/
<> 135:176b8275d35d 67 /* Exported constants --------------------------------------------------------*/
<> 135:176b8275d35d 68 /** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants
<> 135:176b8275d35d 69 * @{
<> 135:176b8275d35d 70 */
<> 135:176b8275d35d 71
<> 135:176b8275d35d 72
<> 135:176b8275d35d 73 /** @defgroup WWDG_LL_EC_IT IT Defines
<> 135:176b8275d35d 74 * @brief IT defines which can be used with LL_WWDG_ReadReg and LL_WWDG_WriteReg functions
<> 135:176b8275d35d 75 * @{
<> 135:176b8275d35d 76 */
<> 135:176b8275d35d 77 #define LL_WWDG_CFR_EWI WWDG_CFR_EWI
<> 135:176b8275d35d 78 /**
<> 135:176b8275d35d 79 * @}
<> 135:176b8275d35d 80 */
<> 135:176b8275d35d 81
<> 135:176b8275d35d 82 /** @defgroup WWDG_LL_EC_PRESCALER PRESCALER
<> 135:176b8275d35d 83 * @{
<> 135:176b8275d35d 84 */
<> 135:176b8275d35d 85 #define LL_WWDG_PRESCALER_1 (uint32_t)0x00000000U /*!< WWDG counter clock = (PCLK1/4096)/1 */
<> 135:176b8275d35d 86 #define LL_WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */
<> 135:176b8275d35d 87 #define LL_WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */
<> 135:176b8275d35d 88 #define LL_WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/8 */
<> 135:176b8275d35d 89 /**
<> 135:176b8275d35d 90 * @}
<> 135:176b8275d35d 91 */
<> 135:176b8275d35d 92
<> 135:176b8275d35d 93 /**
<> 135:176b8275d35d 94 * @}
<> 135:176b8275d35d 95 */
<> 135:176b8275d35d 96
<> 135:176b8275d35d 97 /* Exported macro ------------------------------------------------------------*/
<> 135:176b8275d35d 98 /** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros
<> 135:176b8275d35d 99 * @{
<> 135:176b8275d35d 100 */
<> 135:176b8275d35d 101 /** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros
<> 135:176b8275d35d 102 * @{
<> 135:176b8275d35d 103 */
<> 135:176b8275d35d 104 /**
<> 135:176b8275d35d 105 * @brief Write a value in WWDG register
<> 135:176b8275d35d 106 * @param __INSTANCE__ WWDG Instance
<> 135:176b8275d35d 107 * @param __REG__ Register to be written
<> 135:176b8275d35d 108 * @param __VALUE__ Value to be written in the register
<> 135:176b8275d35d 109 * @retval None
<> 135:176b8275d35d 110 */
<> 135:176b8275d35d 111 #define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
<> 135:176b8275d35d 112
<> 135:176b8275d35d 113 /**
<> 135:176b8275d35d 114 * @brief Read a value in WWDG register
<> 135:176b8275d35d 115 * @param __INSTANCE__ WWDG Instance
<> 135:176b8275d35d 116 * @param __REG__ Register to be read
<> 135:176b8275d35d 117 * @retval Register value
<> 135:176b8275d35d 118 */
<> 135:176b8275d35d 119 #define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
<> 135:176b8275d35d 120 /**
<> 135:176b8275d35d 121 * @}
<> 135:176b8275d35d 122 */
<> 135:176b8275d35d 123
<> 135:176b8275d35d 124
<> 135:176b8275d35d 125 /**
<> 135:176b8275d35d 126 * @}
<> 135:176b8275d35d 127 */
<> 135:176b8275d35d 128
<> 135:176b8275d35d 129 /* Exported functions --------------------------------------------------------*/
<> 135:176b8275d35d 130 /** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions
<> 135:176b8275d35d 131 * @{
<> 135:176b8275d35d 132 */
<> 135:176b8275d35d 133
<> 135:176b8275d35d 134 /** @defgroup WWDG_LL_EF_Configuration Configuration
<> 135:176b8275d35d 135 * @{
<> 135:176b8275d35d 136 */
<> 135:176b8275d35d 137 /**
<> 135:176b8275d35d 138 * @brief Enable Window Watchdog. The watchdog is always disabled after a reset.
<> 135:176b8275d35d 139 * @note It is enabled by setting the WDGA bit in the WWDG_CR register,
<> 135:176b8275d35d 140 * then it cannot be disabled again except by a reset.
<> 135:176b8275d35d 141 * This bit is set by software and only cleared by hardware after a reset.
<> 135:176b8275d35d 142 * When WDGA = 1, the watchdog can generate a reset.
<> 135:176b8275d35d 143 * @rmtoll CR WDGA LL_WWDG_Enable
<> 135:176b8275d35d 144 * @param WWDGx WWDG Instance
<> 135:176b8275d35d 145 * @retval None
<> 135:176b8275d35d 146 */
<> 135:176b8275d35d 147 __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx)
<> 135:176b8275d35d 148 {
<> 135:176b8275d35d 149 SET_BIT(WWDGx->CR, WWDG_CR_WDGA);
<> 135:176b8275d35d 150 }
<> 135:176b8275d35d 151
<> 135:176b8275d35d 152 /**
<> 135:176b8275d35d 153 * @brief Checks if Window Watchdog is enabled
<> 135:176b8275d35d 154 * @rmtoll CR WDGA LL_WWDG_IsEnabled
<> 135:176b8275d35d 155 * @param WWDGx WWDG Instance
<> 135:176b8275d35d 156 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 157 */
<> 135:176b8275d35d 158 __STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx)
<> 135:176b8275d35d 159 {
<> 135:176b8275d35d 160 return (READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA));
<> 135:176b8275d35d 161 }
<> 135:176b8275d35d 162
<> 135:176b8275d35d 163 /**
<> 135:176b8275d35d 164 * @brief Set the Watchdog counter value to provided value (7-bits T[6:0])
<> 135:176b8275d35d 165 * @note When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset
<> 135:176b8275d35d 166 * This counter is decremented every (4096 x 2expWDGTB) PCLK cycles
<> 135:176b8275d35d 167 * A reset is produced when it rolls over from 0x40 to 0x3F (bit T6 becomes cleared)
<> 135:176b8275d35d 168 * Setting the counter lower then 0x40 causes an immediate reset (if WWDG enabled)
<> 135:176b8275d35d 169 * @rmtoll CR T LL_WWDG_SetCounter
<> 135:176b8275d35d 170 * @param WWDGx WWDG Instance
<> 135:176b8275d35d 171 * @param Counter 0..0x7F (7 bit counter value)
<> 135:176b8275d35d 172 * @retval None
<> 135:176b8275d35d 173 */
<> 135:176b8275d35d 174 __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter)
<> 135:176b8275d35d 175 {
<> 135:176b8275d35d 176 MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter);
<> 135:176b8275d35d 177 }
<> 135:176b8275d35d 178
<> 135:176b8275d35d 179 /**
<> 135:176b8275d35d 180 * @brief Return current Watchdog Counter Value (7 bits counter value)
<> 135:176b8275d35d 181 * @rmtoll CR T LL_WWDG_GetCounter
<> 135:176b8275d35d 182 * @param WWDGx WWDG Instance
<> 135:176b8275d35d 183 * @retval 7 bit Watchdog Counter value
<> 135:176b8275d35d 184 */
<> 135:176b8275d35d 185 __STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx)
<> 135:176b8275d35d 186 {
<> 135:176b8275d35d 187 return (uint32_t)(READ_BIT(WWDGx->CR, WWDG_CR_T));
<> 135:176b8275d35d 188 }
<> 135:176b8275d35d 189
<> 135:176b8275d35d 190 /**
<> 135:176b8275d35d 191 * @brief Set the time base of the prescaler (WDGTB).
<> 135:176b8275d35d 192 * @note Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter
<> 135:176b8275d35d 193 * is decremented every (4096 x 2expWDGTB) PCLK cycles
<> 135:176b8275d35d 194 * @rmtoll CFR WDGTB LL_WWDG_SetPrescaler
<> 135:176b8275d35d 195 * @param WWDGx WWDG Instance
<> 135:176b8275d35d 196 * @param Prescaler This parameter can be one of the following values:
<> 135:176b8275d35d 197 * @arg @ref LL_WWDG_PRESCALER_1
<> 135:176b8275d35d 198 * @arg @ref LL_WWDG_PRESCALER_2
<> 135:176b8275d35d 199 * @arg @ref LL_WWDG_PRESCALER_4
<> 135:176b8275d35d 200 * @arg @ref LL_WWDG_PRESCALER_8
<> 135:176b8275d35d 201 * @retval None
<> 135:176b8275d35d 202 */
<> 135:176b8275d35d 203 __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescaler)
<> 135:176b8275d35d 204 {
<> 135:176b8275d35d 205 MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler);
<> 135:176b8275d35d 206 }
<> 135:176b8275d35d 207
<> 135:176b8275d35d 208 /**
<> 135:176b8275d35d 209 * @brief Return current Watchdog Prescaler Value
<> 135:176b8275d35d 210 * @rmtoll CFR WDGTB LL_WWDG_GetPrescaler
<> 135:176b8275d35d 211 * @param WWDGx WWDG Instance
<> 135:176b8275d35d 212 * @retval Returned value can be one of the following values:
<> 135:176b8275d35d 213 * @arg @ref LL_WWDG_PRESCALER_1
<> 135:176b8275d35d 214 * @arg @ref LL_WWDG_PRESCALER_2
<> 135:176b8275d35d 215 * @arg @ref LL_WWDG_PRESCALER_4
<> 135:176b8275d35d 216 * @arg @ref LL_WWDG_PRESCALER_8
<> 135:176b8275d35d 217 */
<> 135:176b8275d35d 218 __STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx)
<> 135:176b8275d35d 219 {
<> 135:176b8275d35d 220 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB));
<> 135:176b8275d35d 221 }
<> 135:176b8275d35d 222
<> 135:176b8275d35d 223 /**
<> 135:176b8275d35d 224 * @brief Set the Watchdog Window value to be compared to the downcounter (7-bits W[6:0]).
<> 135:176b8275d35d 225 * @note This window value defines when write in the WWDG_CR register
<> 135:176b8275d35d 226 * to program Watchdog counter is allowed.
<> 135:176b8275d35d 227 * Watchdog counter value update must occur only when the counter value
<> 135:176b8275d35d 228 * is lower than the Watchdog window register value.
<> 135:176b8275d35d 229 * Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value
<> 135:176b8275d35d 230 * (in the control register) is refreshed before the downcounter has reached
<> 135:176b8275d35d 231 * the watchdog window register value.
<> 135:176b8275d35d 232 * Physically is possible to set the Window lower then 0x40 but it is not recommended.
<> 135:176b8275d35d 233 * To generate an immediate reset, it is possible to set the Counter lower than 0x40.
<> 135:176b8275d35d 234 * @rmtoll CFR W LL_WWDG_SetWindow
<> 135:176b8275d35d 235 * @param WWDGx WWDG Instance
<> 135:176b8275d35d 236 * @param Window 0x00..0x7F (7 bit Window value)
<> 135:176b8275d35d 237 * @retval None
<> 135:176b8275d35d 238 */
<> 135:176b8275d35d 239 __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window)
<> 135:176b8275d35d 240 {
<> 135:176b8275d35d 241 MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window);
<> 135:176b8275d35d 242 }
<> 135:176b8275d35d 243
<> 135:176b8275d35d 244 /**
<> 135:176b8275d35d 245 * @brief Return current Watchdog Window Value (7 bits value)
<> 135:176b8275d35d 246 * @rmtoll CFR W LL_WWDG_GetWindow
<> 135:176b8275d35d 247 * @param WWDGx WWDG Instance
<> 135:176b8275d35d 248 * @retval 7 bit Watchdog Window value
<> 135:176b8275d35d 249 */
<> 135:176b8275d35d 250 __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx)
<> 135:176b8275d35d 251 {
<> 135:176b8275d35d 252 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_W));
<> 135:176b8275d35d 253 }
<> 135:176b8275d35d 254
<> 135:176b8275d35d 255 /**
<> 135:176b8275d35d 256 * @}
<> 135:176b8275d35d 257 */
<> 135:176b8275d35d 258
<> 135:176b8275d35d 259 /** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management
<> 135:176b8275d35d 260 * @{
<> 135:176b8275d35d 261 */
<> 135:176b8275d35d 262 /**
<> 135:176b8275d35d 263 * @brief Indicates if the WWDG Early Wakeup Interrupt Flag is set or not.
<> 135:176b8275d35d 264 * @note This bit is set by hardware when the counter has reached the value 0x40.
<> 135:176b8275d35d 265 * It must be cleared by software by writing 0.
<> 135:176b8275d35d 266 * A write of 1 has no effect. This bit is also set if the interrupt is not enabled.
<> 135:176b8275d35d 267 * @rmtoll SR EWIF LL_WWDG_IsActiveFlag_EWKUP
<> 135:176b8275d35d 268 * @param WWDGx WWDG Instance
<> 135:176b8275d35d 269 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 270 */
<> 135:176b8275d35d 271 __STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx)
<> 135:176b8275d35d 272 {
<> 135:176b8275d35d 273 return (READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF));
<> 135:176b8275d35d 274 }
<> 135:176b8275d35d 275
<> 135:176b8275d35d 276 /**
<> 135:176b8275d35d 277 * @brief Clear WWDG Early Wakeup Interrupt Flag (EWIF)
<> 135:176b8275d35d 278 * @rmtoll SR EWIF LL_WWDG_ClearFlag_EWKUP
<> 135:176b8275d35d 279 * @param WWDGx WWDG Instance
<> 135:176b8275d35d 280 * @retval None
<> 135:176b8275d35d 281 */
<> 135:176b8275d35d 282 __STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef *WWDGx)
<> 135:176b8275d35d 283 {
<> 135:176b8275d35d 284 WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF);
<> 135:176b8275d35d 285 }
<> 135:176b8275d35d 286
<> 135:176b8275d35d 287 /**
<> 135:176b8275d35d 288 * @}
<> 135:176b8275d35d 289 */
<> 135:176b8275d35d 290
<> 135:176b8275d35d 291 /** @defgroup WWDG_LL_EF_IT_Management IT_Management
<> 135:176b8275d35d 292 * @{
<> 135:176b8275d35d 293 */
<> 135:176b8275d35d 294 /**
<> 135:176b8275d35d 295 * @brief Enable the Early Wakeup Interrupt.
<> 135:176b8275d35d 296 * @note When set, an interrupt occurs whenever the counter reaches value 0x40.
<> 135:176b8275d35d 297 * This interrupt is only cleared by hardware after a reset
<> 135:176b8275d35d 298 * @rmtoll CFR EWI LL_WWDG_EnableIT_EWKUP
<> 135:176b8275d35d 299 * @param WWDGx WWDG Instance
<> 135:176b8275d35d 300 * @retval None
<> 135:176b8275d35d 301 */
<> 135:176b8275d35d 302 __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx)
<> 135:176b8275d35d 303 {
<> 135:176b8275d35d 304 SET_BIT(WWDGx->CFR, WWDG_CFR_EWI);
<> 135:176b8275d35d 305 }
<> 135:176b8275d35d 306
<> 135:176b8275d35d 307 /**
<> 135:176b8275d35d 308 * @brief Check if Early Wakeup Interrupt is enabled
<> 135:176b8275d35d 309 * @rmtoll CFR EWI LL_WWDG_IsEnabledIT_EWKUP
<> 135:176b8275d35d 310 * @param WWDGx WWDG Instance
<> 135:176b8275d35d 311 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 312 */
<> 135:176b8275d35d 313 __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx)
<> 135:176b8275d35d 314 {
<> 135:176b8275d35d 315 return (READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI));
<> 135:176b8275d35d 316 }
<> 135:176b8275d35d 317
<> 135:176b8275d35d 318 /**
<> 135:176b8275d35d 319 * @}
<> 135:176b8275d35d 320 */
<> 135:176b8275d35d 321
<> 135:176b8275d35d 322 /**
<> 135:176b8275d35d 323 * @}
<> 135:176b8275d35d 324 */
<> 135:176b8275d35d 325
<> 135:176b8275d35d 326 /**
<> 135:176b8275d35d 327 * @}
<> 135:176b8275d35d 328 */
<> 135:176b8275d35d 329
<> 135:176b8275d35d 330 #endif /* WWDG */
<> 135:176b8275d35d 331
<> 135:176b8275d35d 332 /**
<> 135:176b8275d35d 333 * @}
<> 135:176b8275d35d 334 */
<> 135:176b8275d35d 335
<> 135:176b8275d35d 336 #ifdef __cplusplus
<> 135:176b8275d35d 337 }
<> 135:176b8275d35d 338 #endif
<> 135:176b8275d35d 339
<> 135:176b8275d35d 340 #endif /* __STM32F3xx_LL_WWDG_H */
<> 135:176b8275d35d 341
<> 135:176b8275d35d 342 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/