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TARGET_NUCLEO_F334R8/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_ll_iwdg.h@143:86740a56073b, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:30:20 2017 +0100
Revision:
143:86740a56073b
Parent:
135:176b8275d35d
Child:
168:b9e159c1930a
Release 143 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 135:176b8275d35d 1 /**
<> 135:176b8275d35d 2 ******************************************************************************
<> 135:176b8275d35d 3 * @file stm32f3xx_ll_iwdg.h
<> 135:176b8275d35d 4 * @author MCD Application Team
<> 135:176b8275d35d 5 * @version V1.4.0
<> 135:176b8275d35d 6 * @date 16-December-2016
<> 135:176b8275d35d 7 * @brief Header file of IWDG LL module.
<> 135:176b8275d35d 8 ******************************************************************************
<> 135:176b8275d35d 9 * @attention
<> 135:176b8275d35d 10 *
<> 135:176b8275d35d 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 135:176b8275d35d 12 *
<> 135:176b8275d35d 13 * Redistribution and use in source and binary forms, with or without modification,
<> 135:176b8275d35d 14 * are permitted provided that the following conditions are met:
<> 135:176b8275d35d 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 135:176b8275d35d 16 * this list of conditions and the following disclaimer.
<> 135:176b8275d35d 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 135:176b8275d35d 18 * this list of conditions and the following disclaimer in the documentation
<> 135:176b8275d35d 19 * and/or other materials provided with the distribution.
<> 135:176b8275d35d 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 135:176b8275d35d 21 * may be used to endorse or promote products derived from this software
<> 135:176b8275d35d 22 * without specific prior written permission.
<> 135:176b8275d35d 23 *
<> 135:176b8275d35d 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 135:176b8275d35d 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 135:176b8275d35d 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 135:176b8275d35d 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 135:176b8275d35d 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 135:176b8275d35d 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 135:176b8275d35d 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 135:176b8275d35d 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 135:176b8275d35d 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 135:176b8275d35d 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 135:176b8275d35d 34 *
<> 135:176b8275d35d 35 ******************************************************************************
<> 135:176b8275d35d 36 */
<> 135:176b8275d35d 37
<> 135:176b8275d35d 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 135:176b8275d35d 39 #ifndef __STM32F3xx_LL_IWDG_H
<> 135:176b8275d35d 40 #define __STM32F3xx_LL_IWDG_H
<> 135:176b8275d35d 41
<> 135:176b8275d35d 42 #ifdef __cplusplus
<> 135:176b8275d35d 43 extern "C" {
<> 135:176b8275d35d 44 #endif
<> 135:176b8275d35d 45
<> 135:176b8275d35d 46 /* Includes ------------------------------------------------------------------*/
<> 135:176b8275d35d 47 #include "stm32f3xx.h"
<> 135:176b8275d35d 48
<> 135:176b8275d35d 49 /** @addtogroup STM32F3xx_LL_Driver
<> 135:176b8275d35d 50 * @{
<> 135:176b8275d35d 51 */
<> 135:176b8275d35d 52
<> 135:176b8275d35d 53 #if defined(IWDG)
<> 135:176b8275d35d 54
<> 135:176b8275d35d 55 /** @defgroup IWDG_LL IWDG
<> 135:176b8275d35d 56 * @{
<> 135:176b8275d35d 57 */
<> 135:176b8275d35d 58
<> 135:176b8275d35d 59 /* Private types -------------------------------------------------------------*/
<> 135:176b8275d35d 60 /* Private variables ---------------------------------------------------------*/
<> 135:176b8275d35d 61
<> 135:176b8275d35d 62 /* Private constants ---------------------------------------------------------*/
<> 135:176b8275d35d 63 /** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
<> 135:176b8275d35d 64 * @{
<> 135:176b8275d35d 65 */
<> 135:176b8275d35d 66
<> 135:176b8275d35d 67 #define LL_IWDG_KEY_RELOAD ((uint32_t)0x0000AAAAU) /*!< IWDG Reload Counter Enable */
<> 135:176b8275d35d 68 #define LL_IWDG_KEY_ENABLE ((uint32_t)0x0000CCCCU) /*!< IWDG Peripheral Enable */
<> 135:176b8275d35d 69 #define LL_IWDG_KEY_WR_ACCESS_ENABLE ((uint32_t)0x00005555U) /*!< IWDG KR Write Access Enable */
<> 135:176b8275d35d 70 #define LL_IWDG_KEY_WR_ACCESS_DISABLE ((uint32_t)0x00000000U) /*!< IWDG KR Write Access Disable */
<> 135:176b8275d35d 71
<> 135:176b8275d35d 72 /**
<> 135:176b8275d35d 73 * @}
<> 135:176b8275d35d 74 */
<> 135:176b8275d35d 75
<> 135:176b8275d35d 76 /* Private macros ------------------------------------------------------------*/
<> 135:176b8275d35d 77
<> 135:176b8275d35d 78 /* Exported types ------------------------------------------------------------*/
<> 135:176b8275d35d 79 /* Exported constants --------------------------------------------------------*/
<> 135:176b8275d35d 80 /** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants
<> 135:176b8275d35d 81 * @{
<> 135:176b8275d35d 82 */
<> 135:176b8275d35d 83
<> 135:176b8275d35d 84 /** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines
<> 135:176b8275d35d 85 * @brief Flags defines which can be used with LL_IWDG_ReadReg function
<> 135:176b8275d35d 86 * @{
<> 135:176b8275d35d 87 */
<> 135:176b8275d35d 88 #define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */
<> 135:176b8275d35d 89 #define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */
<> 135:176b8275d35d 90 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog counter window value update */
<> 135:176b8275d35d 91
<> 135:176b8275d35d 92 /**
<> 135:176b8275d35d 93 * @}
<> 135:176b8275d35d 94 */
<> 135:176b8275d35d 95
<> 135:176b8275d35d 96 /** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider
<> 135:176b8275d35d 97 * @{
<> 135:176b8275d35d 98 */
<> 135:176b8275d35d 99 #define LL_IWDG_PRESCALER_4 ((uint32_t)0x00000000U) /*!< Divider by 4 */
<> 135:176b8275d35d 100 #define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */
<> 135:176b8275d35d 101 #define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */
<> 135:176b8275d35d 102 #define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */
<> 135:176b8275d35d 103 #define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */
<> 135:176b8275d35d 104 #define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */
<> 135:176b8275d35d 105 #define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */
<> 135:176b8275d35d 106 /**
<> 135:176b8275d35d 107 * @}
<> 135:176b8275d35d 108 */
<> 135:176b8275d35d 109
<> 135:176b8275d35d 110 /**
<> 135:176b8275d35d 111 * @}
<> 135:176b8275d35d 112 */
<> 135:176b8275d35d 113
<> 135:176b8275d35d 114 /* Exported macro ------------------------------------------------------------*/
<> 135:176b8275d35d 115 /** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros
<> 135:176b8275d35d 116 * @{
<> 135:176b8275d35d 117 */
<> 135:176b8275d35d 118
<> 135:176b8275d35d 119 /** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros
<> 135:176b8275d35d 120 * @{
<> 135:176b8275d35d 121 */
<> 135:176b8275d35d 122
<> 135:176b8275d35d 123 /**
<> 135:176b8275d35d 124 * @brief Write a value in IWDG register
<> 135:176b8275d35d 125 * @param __INSTANCE__ IWDG Instance
<> 135:176b8275d35d 126 * @param __REG__ Register to be written
<> 135:176b8275d35d 127 * @param __VALUE__ Value to be written in the register
<> 135:176b8275d35d 128 * @retval None
<> 135:176b8275d35d 129 */
<> 135:176b8275d35d 130 #define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
<> 135:176b8275d35d 131
<> 135:176b8275d35d 132 /**
<> 135:176b8275d35d 133 * @brief Read a value in IWDG register
<> 135:176b8275d35d 134 * @param __INSTANCE__ IWDG Instance
<> 135:176b8275d35d 135 * @param __REG__ Register to be read
<> 135:176b8275d35d 136 * @retval Register value
<> 135:176b8275d35d 137 */
<> 135:176b8275d35d 138 #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
<> 135:176b8275d35d 139 /**
<> 135:176b8275d35d 140 * @}
<> 135:176b8275d35d 141 */
<> 135:176b8275d35d 142
<> 135:176b8275d35d 143 /**
<> 135:176b8275d35d 144 * @}
<> 135:176b8275d35d 145 */
<> 135:176b8275d35d 146
<> 135:176b8275d35d 147
<> 135:176b8275d35d 148 /* Exported functions --------------------------------------------------------*/
<> 135:176b8275d35d 149 /** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions
<> 135:176b8275d35d 150 * @{
<> 135:176b8275d35d 151 */
<> 135:176b8275d35d 152 /** @defgroup IWDG_LL_EF_Configuration Configuration
<> 135:176b8275d35d 153 * @{
<> 135:176b8275d35d 154 */
<> 135:176b8275d35d 155
<> 135:176b8275d35d 156 /**
<> 135:176b8275d35d 157 * @brief Start the Independent Watchdog
<> 135:176b8275d35d 158 * @note Except if the hardware watchdog option is selected
<> 135:176b8275d35d 159 * @rmtoll KR KEY LL_IWDG_Enable
<> 135:176b8275d35d 160 * @param IWDGx IWDG Instance
<> 135:176b8275d35d 161 * @retval None
<> 135:176b8275d35d 162 */
<> 135:176b8275d35d 163 __STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
<> 135:176b8275d35d 164 {
<> 135:176b8275d35d 165 WRITE_REG(IWDG->KR, LL_IWDG_KEY_ENABLE);
<> 135:176b8275d35d 166 }
<> 135:176b8275d35d 167
<> 135:176b8275d35d 168 /**
<> 135:176b8275d35d 169 * @brief Reloads IWDG counter with value defined in the reload register
<> 135:176b8275d35d 170 * @rmtoll KR KEY LL_IWDG_ReloadCounter
<> 135:176b8275d35d 171 * @param IWDGx IWDG Instance
<> 135:176b8275d35d 172 * @retval None
<> 135:176b8275d35d 173 */
<> 135:176b8275d35d 174 __STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
<> 135:176b8275d35d 175 {
<> 135:176b8275d35d 176 WRITE_REG(IWDG->KR, LL_IWDG_KEY_RELOAD);
<> 135:176b8275d35d 177 }
<> 135:176b8275d35d 178
<> 135:176b8275d35d 179 /**
<> 135:176b8275d35d 180 * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
<> 135:176b8275d35d 181 * @rmtoll KR KEY LL_IWDG_EnableWriteAccess
<> 135:176b8275d35d 182 * @param IWDGx IWDG Instance
<> 135:176b8275d35d 183 * @retval None
<> 135:176b8275d35d 184 */
<> 135:176b8275d35d 185 __STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
<> 135:176b8275d35d 186 {
<> 135:176b8275d35d 187 WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
<> 135:176b8275d35d 188 }
<> 135:176b8275d35d 189
<> 135:176b8275d35d 190 /**
<> 135:176b8275d35d 191 * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
<> 135:176b8275d35d 192 * @rmtoll KR KEY LL_IWDG_DisableWriteAccess
<> 135:176b8275d35d 193 * @param IWDGx IWDG Instance
<> 135:176b8275d35d 194 * @retval None
<> 135:176b8275d35d 195 */
<> 135:176b8275d35d 196 __STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
<> 135:176b8275d35d 197 {
<> 135:176b8275d35d 198 WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
<> 135:176b8275d35d 199 }
<> 135:176b8275d35d 200
<> 135:176b8275d35d 201 /**
<> 135:176b8275d35d 202 * @brief Select the prescaler of the IWDG
<> 135:176b8275d35d 203 * @rmtoll PR PR LL_IWDG_SetPrescaler
<> 135:176b8275d35d 204 * @param IWDGx IWDG Instance
<> 135:176b8275d35d 205 * @param Prescaler This parameter can be one of the following values:
<> 135:176b8275d35d 206 * @arg @ref LL_IWDG_PRESCALER_4
<> 135:176b8275d35d 207 * @arg @ref LL_IWDG_PRESCALER_8
<> 135:176b8275d35d 208 * @arg @ref LL_IWDG_PRESCALER_16
<> 135:176b8275d35d 209 * @arg @ref LL_IWDG_PRESCALER_32
<> 135:176b8275d35d 210 * @arg @ref LL_IWDG_PRESCALER_64
<> 135:176b8275d35d 211 * @arg @ref LL_IWDG_PRESCALER_128
<> 135:176b8275d35d 212 * @arg @ref LL_IWDG_PRESCALER_256
<> 135:176b8275d35d 213 * @retval None
<> 135:176b8275d35d 214 */
<> 135:176b8275d35d 215 __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
<> 135:176b8275d35d 216 {
<> 135:176b8275d35d 217 WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
<> 135:176b8275d35d 218 }
<> 135:176b8275d35d 219
<> 135:176b8275d35d 220 /**
<> 135:176b8275d35d 221 * @brief Get the selected prescaler of the IWDG
<> 135:176b8275d35d 222 * @rmtoll PR PR LL_IWDG_GetPrescaler
<> 135:176b8275d35d 223 * @param IWDGx IWDG Instance
<> 135:176b8275d35d 224 * @retval Returned value can be one of the following values:
<> 135:176b8275d35d 225 * @arg @ref LL_IWDG_PRESCALER_4
<> 135:176b8275d35d 226 * @arg @ref LL_IWDG_PRESCALER_8
<> 135:176b8275d35d 227 * @arg @ref LL_IWDG_PRESCALER_16
<> 135:176b8275d35d 228 * @arg @ref LL_IWDG_PRESCALER_32
<> 135:176b8275d35d 229 * @arg @ref LL_IWDG_PRESCALER_64
<> 135:176b8275d35d 230 * @arg @ref LL_IWDG_PRESCALER_128
<> 135:176b8275d35d 231 * @arg @ref LL_IWDG_PRESCALER_256
<> 135:176b8275d35d 232 */
<> 135:176b8275d35d 233 __STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
<> 135:176b8275d35d 234 {
<> 135:176b8275d35d 235 return (uint32_t)(READ_REG(IWDGx->PR));
<> 135:176b8275d35d 236 }
<> 135:176b8275d35d 237
<> 135:176b8275d35d 238 /**
<> 135:176b8275d35d 239 * @brief Specify the IWDG down-counter reload value
<> 135:176b8275d35d 240 * @rmtoll RLR RL LL_IWDG_SetReloadCounter
<> 135:176b8275d35d 241 * @param IWDGx IWDG Instance
<> 135:176b8275d35d 242 * @param Counter Value between Min_Data=0 and Max_Data=0x0FFF
<> 135:176b8275d35d 243 * @retval None
<> 135:176b8275d35d 244 */
<> 135:176b8275d35d 245 __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
<> 135:176b8275d35d 246 {
<> 135:176b8275d35d 247 WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
<> 135:176b8275d35d 248 }
<> 135:176b8275d35d 249
<> 135:176b8275d35d 250 /**
<> 135:176b8275d35d 251 * @brief Get the specified IWDG down-counter reload value
<> 135:176b8275d35d 252 * @rmtoll RLR RL LL_IWDG_GetReloadCounter
<> 135:176b8275d35d 253 * @param IWDGx IWDG Instance
<> 135:176b8275d35d 254 * @retval Value between Min_Data=0 and Max_Data=0x0FFF
<> 135:176b8275d35d 255 */
<> 135:176b8275d35d 256 __STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
<> 135:176b8275d35d 257 {
<> 135:176b8275d35d 258 return (uint32_t)(READ_REG(IWDGx->RLR));
<> 135:176b8275d35d 259 }
<> 135:176b8275d35d 260
<> 135:176b8275d35d 261 /**
<> 135:176b8275d35d 262 * @brief Specify high limit of the window value to be compared to the down-counter.
<> 135:176b8275d35d 263 * @rmtoll WINR WIN LL_IWDG_SetWindow
<> 135:176b8275d35d 264 * @param IWDGx IWDG Instance
<> 135:176b8275d35d 265 * @param Window Value between Min_Data=0 and Max_Data=0x0FFF
<> 135:176b8275d35d 266 * @retval None
<> 135:176b8275d35d 267 */
<> 135:176b8275d35d 268 __STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window)
<> 135:176b8275d35d 269 {
<> 135:176b8275d35d 270 WRITE_REG(IWDGx->WINR, IWDG_WINR_WIN & Window);
<> 135:176b8275d35d 271 }
<> 135:176b8275d35d 272
<> 135:176b8275d35d 273 /**
<> 135:176b8275d35d 274 * @brief Get the high limit of the window value specified.
<> 135:176b8275d35d 275 * @rmtoll WINR WIN LL_IWDG_GetWindow
<> 135:176b8275d35d 276 * @param IWDGx IWDG Instance
<> 135:176b8275d35d 277 * @retval Value between Min_Data=0 and Max_Data=0x0FFF
<> 135:176b8275d35d 278 */
<> 135:176b8275d35d 279 __STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx)
<> 135:176b8275d35d 280 {
<> 135:176b8275d35d 281 return (uint32_t)(READ_REG(IWDGx->WINR));
<> 135:176b8275d35d 282 }
<> 135:176b8275d35d 283
<> 135:176b8275d35d 284 /**
<> 135:176b8275d35d 285 * @}
<> 135:176b8275d35d 286 */
<> 135:176b8275d35d 287
<> 135:176b8275d35d 288 /** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management
<> 135:176b8275d35d 289 * @{
<> 135:176b8275d35d 290 */
<> 135:176b8275d35d 291
<> 135:176b8275d35d 292 /**
<> 135:176b8275d35d 293 * @brief Check if flag Prescaler Value Update is set or not
<> 135:176b8275d35d 294 * @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU
<> 135:176b8275d35d 295 * @param IWDGx IWDG Instance
<> 135:176b8275d35d 296 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 297 */
<> 135:176b8275d35d 298 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
<> 135:176b8275d35d 299 {
<> 135:176b8275d35d 300 return (READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU));
<> 135:176b8275d35d 301 }
<> 135:176b8275d35d 302
<> 135:176b8275d35d 303 /**
<> 135:176b8275d35d 304 * @brief Check if flag Reload Value Update is set or not
<> 135:176b8275d35d 305 * @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU
<> 135:176b8275d35d 306 * @param IWDGx IWDG Instance
<> 135:176b8275d35d 307 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 308 */
<> 135:176b8275d35d 309 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
<> 135:176b8275d35d 310 {
<> 135:176b8275d35d 311 return (READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU));
<> 135:176b8275d35d 312 }
<> 135:176b8275d35d 313
<> 135:176b8275d35d 314 /**
<> 135:176b8275d35d 315 * @brief Check if flag Window Value Update is set or not
<> 135:176b8275d35d 316 * @rmtoll SR WVU LL_IWDG_IsActiveFlag_WVU
<> 135:176b8275d35d 317 * @param IWDGx IWDG Instance
<> 135:176b8275d35d 318 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 319 */
<> 135:176b8275d35d 320 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx)
<> 135:176b8275d35d 321 {
<> 135:176b8275d35d 322 return (READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU));
<> 135:176b8275d35d 323 }
<> 135:176b8275d35d 324
<> 135:176b8275d35d 325 /**
<> 135:176b8275d35d 326 * @brief Check if all flags Prescaler, Reload & Window Value Update are reset or not
<> 135:176b8275d35d 327 * @rmtoll SR PVU LL_IWDG_IsReady\n
<> 135:176b8275d35d 328 * SR WVU LL_IWDG_IsReady\n
<> 135:176b8275d35d 329 * SR RVU LL_IWDG_IsReady
<> 135:176b8275d35d 330 * @param IWDGx IWDG Instance
<> 135:176b8275d35d 331 * @retval State of bits (1 or 0).
<> 135:176b8275d35d 332 */
<> 135:176b8275d35d 333 __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
<> 135:176b8275d35d 334 {
<> 135:176b8275d35d 335 return (READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U);
<> 135:176b8275d35d 336 }
<> 135:176b8275d35d 337
<> 135:176b8275d35d 338 /**
<> 135:176b8275d35d 339 * @}
<> 135:176b8275d35d 340 */
<> 135:176b8275d35d 341
<> 135:176b8275d35d 342
<> 135:176b8275d35d 343 /**
<> 135:176b8275d35d 344 * @}
<> 135:176b8275d35d 345 */
<> 135:176b8275d35d 346
<> 135:176b8275d35d 347 /**
<> 135:176b8275d35d 348 * @}
<> 135:176b8275d35d 349 */
<> 135:176b8275d35d 350
<> 135:176b8275d35d 351 #endif /* IWDG) */
<> 135:176b8275d35d 352
<> 135:176b8275d35d 353 /**
<> 135:176b8275d35d 354 * @}
<> 135:176b8275d35d 355 */
<> 135:176b8275d35d 356
<> 135:176b8275d35d 357 #ifdef __cplusplus
<> 135:176b8275d35d 358 }
<> 135:176b8275d35d 359 #endif
<> 135:176b8275d35d 360
<> 135:176b8275d35d 361 #endif /* __STM32F3xx_LL_IWDG_H */
<> 135:176b8275d35d 362
<> 135:176b8275d35d 363 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/