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TARGET_NUCLEO_F334R8/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_ll_exti.h@143:86740a56073b, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:30:20 2017 +0100
Revision:
143:86740a56073b
Parent:
135:176b8275d35d
Child:
168:b9e159c1930a
Release 143 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 135:176b8275d35d 1 /**
<> 135:176b8275d35d 2 ******************************************************************************
<> 135:176b8275d35d 3 * @file stm32f3xx_ll_exti.h
<> 135:176b8275d35d 4 * @author MCD Application Team
<> 135:176b8275d35d 5 * @version V1.4.0
<> 135:176b8275d35d 6 * @date 16-December-2016
<> 135:176b8275d35d 7 * @brief Header file of EXTI LL module.
<> 135:176b8275d35d 8 ******************************************************************************
<> 135:176b8275d35d 9 * @attention
<> 135:176b8275d35d 10 *
<> 135:176b8275d35d 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 135:176b8275d35d 12 *
<> 135:176b8275d35d 13 * Redistribution and use in source and binary forms, with or without modification,
<> 135:176b8275d35d 14 * are permitted provided that the following conditions are met:
<> 135:176b8275d35d 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 135:176b8275d35d 16 * this list of conditions and the following disclaimer.
<> 135:176b8275d35d 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 135:176b8275d35d 18 * this list of conditions and the following disclaimer in the documentation
<> 135:176b8275d35d 19 * and/or other materials provided with the distribution.
<> 135:176b8275d35d 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 135:176b8275d35d 21 * may be used to endorse or promote products derived from this software
<> 135:176b8275d35d 22 * without specific prior written permission.
<> 135:176b8275d35d 23 *
<> 135:176b8275d35d 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 135:176b8275d35d 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 135:176b8275d35d 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 135:176b8275d35d 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 135:176b8275d35d 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 135:176b8275d35d 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 135:176b8275d35d 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 135:176b8275d35d 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 135:176b8275d35d 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 135:176b8275d35d 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 135:176b8275d35d 34 *
<> 135:176b8275d35d 35 ******************************************************************************
<> 135:176b8275d35d 36 */
<> 135:176b8275d35d 37
<> 135:176b8275d35d 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 135:176b8275d35d 39 #ifndef __STM32F3xx_LL_EXTI_H
<> 135:176b8275d35d 40 #define __STM32F3xx_LL_EXTI_H
<> 135:176b8275d35d 41
<> 135:176b8275d35d 42 #ifdef __cplusplus
<> 135:176b8275d35d 43 extern "C" {
<> 135:176b8275d35d 44 #endif
<> 135:176b8275d35d 45
<> 135:176b8275d35d 46 /* Includes ------------------------------------------------------------------*/
<> 135:176b8275d35d 47 #include "stm32f3xx.h"
<> 135:176b8275d35d 48
<> 135:176b8275d35d 49 /** @addtogroup STM32F3xx_LL_Driver
<> 135:176b8275d35d 50 * @{
<> 135:176b8275d35d 51 */
<> 135:176b8275d35d 52
<> 135:176b8275d35d 53 #if defined (EXTI)
<> 135:176b8275d35d 54
<> 135:176b8275d35d 55 /** @defgroup EXTI_LL EXTI
<> 135:176b8275d35d 56 * @{
<> 135:176b8275d35d 57 */
<> 135:176b8275d35d 58
<> 135:176b8275d35d 59 /* Private types -------------------------------------------------------------*/
<> 135:176b8275d35d 60 /* Private variables ---------------------------------------------------------*/
<> 135:176b8275d35d 61 /* Private constants ---------------------------------------------------------*/
<> 135:176b8275d35d 62 /* Private Macros ------------------------------------------------------------*/
<> 135:176b8275d35d 63 #if defined(USE_FULL_LL_DRIVER)
<> 135:176b8275d35d 64 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
<> 135:176b8275d35d 65 * @{
<> 135:176b8275d35d 66 */
<> 135:176b8275d35d 67 /**
<> 135:176b8275d35d 68 * @}
<> 135:176b8275d35d 69 */
<> 135:176b8275d35d 70 #endif /*USE_FULL_LL_DRIVER*/
<> 135:176b8275d35d 71 /* Exported types ------------------------------------------------------------*/
<> 135:176b8275d35d 72 #if defined(USE_FULL_LL_DRIVER)
<> 135:176b8275d35d 73 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
<> 135:176b8275d35d 74 * @{
<> 135:176b8275d35d 75 */
<> 135:176b8275d35d 76 typedef struct
<> 135:176b8275d35d 77 {
<> 135:176b8275d35d 78
<> 135:176b8275d35d 79 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
<> 135:176b8275d35d 80 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
<> 135:176b8275d35d 81 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 82
<> 135:176b8275d35d 83 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
<> 135:176b8275d35d 84 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
<> 135:176b8275d35d 85 #endif
<> 135:176b8275d35d 86
<> 135:176b8275d35d 87 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
<> 135:176b8275d35d 88 This parameter can be set either to ENABLE or DISABLE */
<> 135:176b8275d35d 89
<> 135:176b8275d35d 90 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
<> 135:176b8275d35d 91 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
<> 135:176b8275d35d 92
<> 135:176b8275d35d 93 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
<> 135:176b8275d35d 94 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
<> 135:176b8275d35d 95 } LL_EXTI_InitTypeDef;
<> 135:176b8275d35d 96
<> 135:176b8275d35d 97 /**
<> 135:176b8275d35d 98 * @}
<> 135:176b8275d35d 99 */
<> 135:176b8275d35d 100 #endif /*USE_FULL_LL_DRIVER*/
<> 135:176b8275d35d 101
<> 135:176b8275d35d 102 /* Exported constants --------------------------------------------------------*/
<> 135:176b8275d35d 103 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
<> 135:176b8275d35d 104 * @{
<> 135:176b8275d35d 105 */
<> 135:176b8275d35d 106
<> 135:176b8275d35d 107 /** @defgroup EXTI_LL_EC_LINE LINE
<> 135:176b8275d35d 108 * @{
<> 135:176b8275d35d 109 */
<> 135:176b8275d35d 110 #define LL_EXTI_LINE_0 EXTI_IMR_IM0 /*!< Extended line 0 */
<> 135:176b8275d35d 111 #define LL_EXTI_LINE_1 EXTI_IMR_IM1 /*!< Extended line 1 */
<> 135:176b8275d35d 112 #define LL_EXTI_LINE_2 EXTI_IMR_IM2 /*!< Extended line 2 */
<> 135:176b8275d35d 113 #define LL_EXTI_LINE_3 EXTI_IMR_IM3 /*!< Extended line 3 */
<> 135:176b8275d35d 114 #define LL_EXTI_LINE_4 EXTI_IMR_IM4 /*!< Extended line 4 */
<> 135:176b8275d35d 115 #define LL_EXTI_LINE_5 EXTI_IMR_IM5 /*!< Extended line 5 */
<> 135:176b8275d35d 116 #define LL_EXTI_LINE_6 EXTI_IMR_IM6 /*!< Extended line 6 */
<> 135:176b8275d35d 117 #define LL_EXTI_LINE_7 EXTI_IMR_IM7 /*!< Extended line 7 */
<> 135:176b8275d35d 118 #define LL_EXTI_LINE_8 EXTI_IMR_IM8 /*!< Extended line 8 */
<> 135:176b8275d35d 119 #define LL_EXTI_LINE_9 EXTI_IMR_IM9 /*!< Extended line 9 */
<> 135:176b8275d35d 120 #define LL_EXTI_LINE_10 EXTI_IMR_IM10 /*!< Extended line 10 */
<> 135:176b8275d35d 121 #define LL_EXTI_LINE_11 EXTI_IMR_IM11 /*!< Extended line 11 */
<> 135:176b8275d35d 122 #define LL_EXTI_LINE_12 EXTI_IMR_IM12 /*!< Extended line 12 */
<> 135:176b8275d35d 123 #define LL_EXTI_LINE_13 EXTI_IMR_IM13 /*!< Extended line 13 */
<> 135:176b8275d35d 124 #define LL_EXTI_LINE_14 EXTI_IMR_IM14 /*!< Extended line 14 */
<> 135:176b8275d35d 125 #define LL_EXTI_LINE_15 EXTI_IMR_IM15 /*!< Extended line 15 */
<> 135:176b8275d35d 126 #if defined(EXTI_IMR_IM16)
<> 135:176b8275d35d 127 #define LL_EXTI_LINE_16 EXTI_IMR_IM16 /*!< Extended line 16 */
<> 135:176b8275d35d 128 #endif
<> 135:176b8275d35d 129 #define LL_EXTI_LINE_17 EXTI_IMR_IM17 /*!< Extended line 17 */
<> 135:176b8275d35d 130 #if defined(EXTI_IMR_IM18)
<> 135:176b8275d35d 131 #define LL_EXTI_LINE_18 EXTI_IMR_IM18 /*!< Extended line 18 */
<> 135:176b8275d35d 132 #endif
<> 135:176b8275d35d 133 #define LL_EXTI_LINE_19 EXTI_IMR_IM19 /*!< Extended line 19 */
<> 135:176b8275d35d 134 #if defined(EXTI_IMR_IM20)
<> 135:176b8275d35d 135 #define LL_EXTI_LINE_20 EXTI_IMR_IM20 /*!< Extended line 20 */
<> 135:176b8275d35d 136 #endif
<> 135:176b8275d35d 137 #if defined(EXTI_IMR_IM21)
<> 135:176b8275d35d 138 #define LL_EXTI_LINE_21 EXTI_IMR_IM21 /*!< Extended line 21 */
<> 135:176b8275d35d 139 #endif
<> 135:176b8275d35d 140 #if defined(EXTI_IMR_IM22)
<> 135:176b8275d35d 141 #define LL_EXTI_LINE_22 EXTI_IMR_IM22 /*!< Extended line 22 */
<> 135:176b8275d35d 142 #endif
<> 135:176b8275d35d 143 #define LL_EXTI_LINE_23 EXTI_IMR_IM23 /*!< Extended line 23 */
<> 135:176b8275d35d 144 #if defined(EXTI_IMR_IM24)
<> 135:176b8275d35d 145 #define LL_EXTI_LINE_24 EXTI_IMR_IM24 /*!< Extended line 24 */
<> 135:176b8275d35d 146 #endif
<> 135:176b8275d35d 147 #if defined(EXTI_IMR_IM25)
<> 135:176b8275d35d 148 #define LL_EXTI_LINE_25 EXTI_IMR_IM25 /*!< Extended line 25 */
<> 135:176b8275d35d 149 #endif
<> 135:176b8275d35d 150 #if defined(EXTI_IMR_IM26)
<> 135:176b8275d35d 151 #define LL_EXTI_LINE_26 EXTI_IMR_IM26 /*!< Extended line 26 */
<> 135:176b8275d35d 152 #endif
<> 135:176b8275d35d 153 #if defined(EXTI_IMR_IM27)
<> 135:176b8275d35d 154 #define LL_EXTI_LINE_27 EXTI_IMR_IM27 /*!< Extended line 27 */
<> 135:176b8275d35d 155 #endif
<> 135:176b8275d35d 156 #if defined(EXTI_IMR_IM28)
<> 135:176b8275d35d 157 #define LL_EXTI_LINE_28 EXTI_IMR_IM28 /*!< Extended line 28 */
<> 135:176b8275d35d 158 #endif
<> 135:176b8275d35d 159 #if defined(EXTI_IMR_IM29)
<> 135:176b8275d35d 160 #define LL_EXTI_LINE_29 EXTI_IMR_IM29 /*!< Extended line 29 */
<> 135:176b8275d35d 161 #endif
<> 135:176b8275d35d 162 #if defined(EXTI_IMR_IM30)
<> 135:176b8275d35d 163 #define LL_EXTI_LINE_30 EXTI_IMR_IM30 /*!< Extended line 30 */
<> 135:176b8275d35d 164 #endif
<> 135:176b8275d35d 165 #if defined(EXTI_IMR_IM31)
<> 135:176b8275d35d 166 #define LL_EXTI_LINE_31 EXTI_IMR_IM31 /*!< Extended line 31 */
<> 135:176b8275d35d 167 #endif
<> 135:176b8275d35d 168 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR_IM /*!< All Extended line not reserved*/
<> 135:176b8275d35d 169
<> 135:176b8275d35d 170 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 171 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */
<> 135:176b8275d35d 172 #if defined(EXTI_IMR2_IM33)
<> 135:176b8275d35d 173 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */
<> 135:176b8275d35d 174 #endif
<> 135:176b8275d35d 175 #if defined(EXTI_IMR2_IM34)
<> 135:176b8275d35d 176 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */
<> 135:176b8275d35d 177 #endif
<> 135:176b8275d35d 178 #if defined(EXTI_IMR2_IM35)
<> 135:176b8275d35d 179 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */
<> 135:176b8275d35d 180 #endif
<> 135:176b8275d35d 181 #if defined(EXTI_IMR2_IM36)
<> 135:176b8275d35d 182 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
<> 135:176b8275d35d 183 #endif
<> 135:176b8275d35d 184 #if defined(EXTI_IMR2_IM37)
<> 135:176b8275d35d 185 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */
<> 135:176b8275d35d 186 #endif
<> 135:176b8275d35d 187 #if defined(EXTI_IMR2_IM38)
<> 135:176b8275d35d 188 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */
<> 135:176b8275d35d 189 #endif
<> 135:176b8275d35d 190 #if defined(EXTI_IMR2_IM39)
<> 135:176b8275d35d 191 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */
<> 135:176b8275d35d 192 #endif
<> 135:176b8275d35d 193 #define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /*!< All Extended line not reserved*/
<> 135:176b8275d35d 194
<> 135:176b8275d35d 195 #endif
<> 135:176b8275d35d 196
<> 135:176b8275d35d 197 #define LL_EXTI_LINE_ALL ((uint32_t)0xFFFFFFFFU) /*!< All Extended line */
<> 135:176b8275d35d 198
<> 135:176b8275d35d 199 #if defined(USE_FULL_LL_DRIVER)
<> 135:176b8275d35d 200 #define LL_EXTI_LINE_NONE ((uint32_t)0x00000000U) /*!< None Extended line */
<> 135:176b8275d35d 201 #endif /*USE_FULL_LL_DRIVER*/
<> 135:176b8275d35d 202
<> 135:176b8275d35d 203 /**
<> 135:176b8275d35d 204 * @}
<> 135:176b8275d35d 205 */
<> 135:176b8275d35d 206 #if defined(USE_FULL_LL_DRIVER)
<> 135:176b8275d35d 207
<> 135:176b8275d35d 208 /** @defgroup EXTI_LL_EC_MODE Mode
<> 135:176b8275d35d 209 * @{
<> 135:176b8275d35d 210 */
<> 135:176b8275d35d 211 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
<> 135:176b8275d35d 212 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
<> 135:176b8275d35d 213 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
<> 135:176b8275d35d 214 /**
<> 135:176b8275d35d 215 * @}
<> 135:176b8275d35d 216 */
<> 135:176b8275d35d 217
<> 135:176b8275d35d 218 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
<> 135:176b8275d35d 219 * @{
<> 135:176b8275d35d 220 */
<> 135:176b8275d35d 221 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
<> 135:176b8275d35d 222 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
<> 135:176b8275d35d 223 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
<> 135:176b8275d35d 224 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
<> 135:176b8275d35d 225
<> 135:176b8275d35d 226 /**
<> 135:176b8275d35d 227 * @}
<> 135:176b8275d35d 228 */
<> 135:176b8275d35d 229
<> 135:176b8275d35d 230
<> 135:176b8275d35d 231 #endif /*USE_FULL_LL_DRIVER*/
<> 135:176b8275d35d 232
<> 135:176b8275d35d 233
<> 135:176b8275d35d 234 /**
<> 135:176b8275d35d 235 * @}
<> 135:176b8275d35d 236 */
<> 135:176b8275d35d 237
<> 135:176b8275d35d 238 /* Exported macro ------------------------------------------------------------*/
<> 135:176b8275d35d 239 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
<> 135:176b8275d35d 240 * @{
<> 135:176b8275d35d 241 */
<> 135:176b8275d35d 242
<> 135:176b8275d35d 243 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
<> 135:176b8275d35d 244 * @{
<> 135:176b8275d35d 245 */
<> 135:176b8275d35d 246
<> 135:176b8275d35d 247 /**
<> 135:176b8275d35d 248 * @brief Write a value in EXTI register
<> 135:176b8275d35d 249 * @param __REG__ Register to be written
<> 135:176b8275d35d 250 * @param __VALUE__ Value to be written in the register
<> 135:176b8275d35d 251 * @retval None
<> 135:176b8275d35d 252 */
<> 135:176b8275d35d 253 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
<> 135:176b8275d35d 254
<> 135:176b8275d35d 255 /**
<> 135:176b8275d35d 256 * @brief Read a value in EXTI register
<> 135:176b8275d35d 257 * @param __REG__ Register to be read
<> 135:176b8275d35d 258 * @retval Register value
<> 135:176b8275d35d 259 */
<> 135:176b8275d35d 260 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
<> 135:176b8275d35d 261 /**
<> 135:176b8275d35d 262 * @}
<> 135:176b8275d35d 263 */
<> 135:176b8275d35d 264
<> 135:176b8275d35d 265
<> 135:176b8275d35d 266 /**
<> 135:176b8275d35d 267 * @}
<> 135:176b8275d35d 268 */
<> 135:176b8275d35d 269
<> 135:176b8275d35d 270
<> 135:176b8275d35d 271
<> 135:176b8275d35d 272 /* Exported functions --------------------------------------------------------*/
<> 135:176b8275d35d 273 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
<> 135:176b8275d35d 274 * @{
<> 135:176b8275d35d 275 */
<> 135:176b8275d35d 276 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
<> 135:176b8275d35d 277 * @{
<> 135:176b8275d35d 278 */
<> 135:176b8275d35d 279
<> 135:176b8275d35d 280 /**
<> 135:176b8275d35d 281 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
<> 135:176b8275d35d 282 * @note The reset value for the direct or internal lines (see RM)
<> 135:176b8275d35d 283 * is set to 1 in order to enable the interrupt by default.
<> 135:176b8275d35d 284 * Bits are set automatically at Power on.
<> 135:176b8275d35d 285 * @rmtoll IMR IMx LL_EXTI_EnableIT_0_31
<> 135:176b8275d35d 286 * @param ExtiLine This parameter can be one of the following values:
<> 135:176b8275d35d 287 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 288 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 289 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 290 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 291 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 292 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 293 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 294 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 295 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 296 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 297 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 298 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 299 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 300 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 301 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 302 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 303 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 304 * @arg @ref LL_EXTI_LINE_17
<> 135:176b8275d35d 305 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 306 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 307 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 308 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 309 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 310 * @arg @ref LL_EXTI_LINE_23
<> 135:176b8275d35d 311 * @arg @ref LL_EXTI_LINE_24
<> 135:176b8275d35d 312 * @arg @ref LL_EXTI_LINE_25
<> 135:176b8275d35d 313 * @arg @ref LL_EXTI_LINE_26
<> 135:176b8275d35d 314 * @arg @ref LL_EXTI_LINE_27
<> 135:176b8275d35d 315 * @arg @ref LL_EXTI_LINE_28
<> 135:176b8275d35d 316 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 317 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 318 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 319 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 135:176b8275d35d 320 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 321 * @retval None
<> 135:176b8275d35d 322 */
<> 135:176b8275d35d 323 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 324 {
<> 135:176b8275d35d 325 SET_BIT(EXTI->IMR, ExtiLine);
<> 135:176b8275d35d 326 }
<> 135:176b8275d35d 327 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 328 /**
<> 135:176b8275d35d 329 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
<> 135:176b8275d35d 330 * @note The reset value for the direct lines (lines from 32 to 34, line
<> 135:176b8275d35d 331 * 39) is set to 1 in order to enable the interrupt by default.
<> 135:176b8275d35d 332 * Bits are set automatically at Power on.
<> 135:176b8275d35d 333 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
<> 135:176b8275d35d 334 * @param ExtiLine This parameter can be one of the following values:
<> 135:176b8275d35d 335 * @arg @ref LL_EXTI_LINE_32
<> 135:176b8275d35d 336 * @arg @ref LL_EXTI_LINE_33
<> 135:176b8275d35d 337 * @arg @ref LL_EXTI_LINE_34
<> 135:176b8275d35d 338 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 339 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 340 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 341 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 342 * @arg @ref LL_EXTI_LINE_39
<> 135:176b8275d35d 343 * @arg @ref LL_EXTI_LINE_ALL_32_63
<> 135:176b8275d35d 344 * @retval None
<> 135:176b8275d35d 345 */
<> 135:176b8275d35d 346 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 347 {
<> 135:176b8275d35d 348 SET_BIT(EXTI->IMR2, ExtiLine);
<> 135:176b8275d35d 349 }
<> 135:176b8275d35d 350 #endif
<> 135:176b8275d35d 351
<> 135:176b8275d35d 352 /**
<> 135:176b8275d35d 353 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
<> 135:176b8275d35d 354 * @note The reset value for the direct or internal lines (see RM)
<> 135:176b8275d35d 355 * is set to 1 in order to enable the interrupt by default.
<> 135:176b8275d35d 356 * Bits are set automatically at Power on.
<> 135:176b8275d35d 357 * @rmtoll IMR IMx LL_EXTI_DisableIT_0_31
<> 135:176b8275d35d 358 * @param ExtiLine This parameter can be one of the following values:
<> 135:176b8275d35d 359 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 360 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 361 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 362 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 363 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 364 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 365 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 366 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 367 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 368 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 369 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 370 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 371 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 372 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 373 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 374 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 375 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 376 * @arg @ref LL_EXTI_LINE_17
<> 135:176b8275d35d 377 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 378 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 379 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 380 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 381 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 382 * @arg @ref LL_EXTI_LINE_23
<> 135:176b8275d35d 383 * @arg @ref LL_EXTI_LINE_24
<> 135:176b8275d35d 384 * @arg @ref LL_EXTI_LINE_25
<> 135:176b8275d35d 385 * @arg @ref LL_EXTI_LINE_26
<> 135:176b8275d35d 386 * @arg @ref LL_EXTI_LINE_27
<> 135:176b8275d35d 387 * @arg @ref LL_EXTI_LINE_28
<> 135:176b8275d35d 388 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 389 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 390 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 391 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 135:176b8275d35d 392 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 393 * @retval None
<> 135:176b8275d35d 394 */
<> 135:176b8275d35d 395 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 396 {
<> 135:176b8275d35d 397 CLEAR_BIT(EXTI->IMR, ExtiLine);
<> 135:176b8275d35d 398 }
<> 135:176b8275d35d 399
<> 135:176b8275d35d 400 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 401 /**
<> 135:176b8275d35d 402 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
<> 135:176b8275d35d 403 * @note The reset value for the direct lines (lines from 32 to 34, line
<> 135:176b8275d35d 404 * 39) is set to 1 in order to enable the interrupt by default.
<> 135:176b8275d35d 405 * Bits are set automatically at Power on.
<> 135:176b8275d35d 406 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
<> 135:176b8275d35d 407 * @param ExtiLine This parameter can be one of the following values:
<> 135:176b8275d35d 408 * @arg @ref LL_EXTI_LINE_32
<> 135:176b8275d35d 409 * @arg @ref LL_EXTI_LINE_33
<> 135:176b8275d35d 410 * @arg @ref LL_EXTI_LINE_34
<> 135:176b8275d35d 411 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 412 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 413 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 414 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 415 * @arg @ref LL_EXTI_LINE_39
<> 135:176b8275d35d 416 * @arg @ref LL_EXTI_LINE_ALL_32_63
<> 135:176b8275d35d 417 * @retval None
<> 135:176b8275d35d 418 */
<> 135:176b8275d35d 419 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 420 {
<> 135:176b8275d35d 421 CLEAR_BIT(EXTI->IMR2, ExtiLine);
<> 135:176b8275d35d 422 }
<> 135:176b8275d35d 423 #endif
<> 135:176b8275d35d 424
<> 135:176b8275d35d 425 /**
<> 135:176b8275d35d 426 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
<> 135:176b8275d35d 427 * @note The reset value for the direct or internal lines (see RM)
<> 135:176b8275d35d 428 * is set to 1 in order to enable the interrupt by default.
<> 135:176b8275d35d 429 * Bits are set automatically at Power on.
<> 135:176b8275d35d 430 * @rmtoll IMR IMx LL_EXTI_IsEnabledIT_0_31
<> 135:176b8275d35d 431 * @param ExtiLine This parameter can be one of the following values:
<> 135:176b8275d35d 432 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 433 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 434 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 435 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 436 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 437 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 438 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 439 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 440 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 441 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 442 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 443 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 444 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 445 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 446 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 447 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 448 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 449 * @arg @ref LL_EXTI_LINE_17
<> 135:176b8275d35d 450 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 451 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 452 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 453 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 454 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 455 * @arg @ref LL_EXTI_LINE_23
<> 135:176b8275d35d 456 * @arg @ref LL_EXTI_LINE_24
<> 135:176b8275d35d 457 * @arg @ref LL_EXTI_LINE_25
<> 135:176b8275d35d 458 * @arg @ref LL_EXTI_LINE_26
<> 135:176b8275d35d 459 * @arg @ref LL_EXTI_LINE_27
<> 135:176b8275d35d 460 * @arg @ref LL_EXTI_LINE_28
<> 135:176b8275d35d 461 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 462 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 463 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 464 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 135:176b8275d35d 465 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 466 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 467 */
<> 135:176b8275d35d 468 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 469 {
<> 135:176b8275d35d 470 return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine));
<> 135:176b8275d35d 471 }
<> 135:176b8275d35d 472
<> 135:176b8275d35d 473 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 474 /**
<> 135:176b8275d35d 475 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
<> 135:176b8275d35d 476 * @note The reset value for the direct lines (lines from 32 to 34, line
<> 135:176b8275d35d 477 * 39) is set to 1 in order to enable the interrupt by default.
<> 135:176b8275d35d 478 * Bits are set automatically at Power on.
<> 135:176b8275d35d 479 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
<> 135:176b8275d35d 480 * @param ExtiLine This parameter can be one of the following values:
<> 135:176b8275d35d 481 * @arg @ref LL_EXTI_LINE_32
<> 135:176b8275d35d 482 * @arg @ref LL_EXTI_LINE_33
<> 135:176b8275d35d 483 * @arg @ref LL_EXTI_LINE_34
<> 135:176b8275d35d 484 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 485 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 486 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 487 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 488 * @arg @ref LL_EXTI_LINE_39
<> 135:176b8275d35d 489 * @arg @ref LL_EXTI_LINE_ALL_32_63
<> 135:176b8275d35d 490 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 491 */
<> 135:176b8275d35d 492 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 493 {
<> 135:176b8275d35d 494 return (READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine));
<> 135:176b8275d35d 495 }
<> 135:176b8275d35d 496 #endif
<> 135:176b8275d35d 497
<> 135:176b8275d35d 498 /**
<> 135:176b8275d35d 499 * @}
<> 135:176b8275d35d 500 */
<> 135:176b8275d35d 501
<> 135:176b8275d35d 502 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
<> 135:176b8275d35d 503 * @{
<> 135:176b8275d35d 504 */
<> 135:176b8275d35d 505
<> 135:176b8275d35d 506 /**
<> 135:176b8275d35d 507 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
<> 135:176b8275d35d 508 * @rmtoll EMR EMx LL_EXTI_EnableEvent_0_31
<> 135:176b8275d35d 509 * @param ExtiLine This parameter can be one of the following values:
<> 135:176b8275d35d 510 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 511 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 512 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 513 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 514 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 515 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 516 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 517 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 518 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 519 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 520 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 521 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 522 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 523 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 524 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 525 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 526 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 527 * @arg @ref LL_EXTI_LINE_17
<> 135:176b8275d35d 528 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 529 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 530 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 531 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 532 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 533 * @arg @ref LL_EXTI_LINE_23
<> 135:176b8275d35d 534 * @arg @ref LL_EXTI_LINE_24
<> 135:176b8275d35d 535 * @arg @ref LL_EXTI_LINE_25
<> 135:176b8275d35d 536 * @arg @ref LL_EXTI_LINE_26
<> 135:176b8275d35d 537 * @arg @ref LL_EXTI_LINE_27
<> 135:176b8275d35d 538 * @arg @ref LL_EXTI_LINE_28
<> 135:176b8275d35d 539 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 540 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 541 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 542 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 135:176b8275d35d 543 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 544 * @retval None
<> 135:176b8275d35d 545 */
<> 135:176b8275d35d 546 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 547 {
<> 135:176b8275d35d 548 SET_BIT(EXTI->EMR, ExtiLine);
<> 135:176b8275d35d 549
<> 135:176b8275d35d 550 }
<> 135:176b8275d35d 551
<> 135:176b8275d35d 552 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 553 /**
<> 135:176b8275d35d 554 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
<> 135:176b8275d35d 555 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
<> 135:176b8275d35d 556 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 557 * @arg @ref LL_EXTI_LINE_32
<> 135:176b8275d35d 558 * @arg @ref LL_EXTI_LINE_33
<> 135:176b8275d35d 559 * @arg @ref LL_EXTI_LINE_34
<> 135:176b8275d35d 560 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 561 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 562 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 563 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 564 * @arg @ref LL_EXTI_LINE_39
<> 135:176b8275d35d 565 * @arg @ref LL_EXTI_LINE_ALL_32_63
<> 135:176b8275d35d 566 * @retval None
<> 135:176b8275d35d 567 */
<> 135:176b8275d35d 568 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 569 {
<> 135:176b8275d35d 570 SET_BIT(EXTI->EMR2, ExtiLine);
<> 135:176b8275d35d 571 }
<> 135:176b8275d35d 572 #endif
<> 135:176b8275d35d 573
<> 135:176b8275d35d 574 /**
<> 135:176b8275d35d 575 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
<> 135:176b8275d35d 576 * @rmtoll EMR EMx LL_EXTI_DisableEvent_0_31
<> 135:176b8275d35d 577 * @param ExtiLine This parameter can be one of the following values:
<> 135:176b8275d35d 578 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 579 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 580 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 581 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 582 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 583 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 584 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 585 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 586 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 587 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 588 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 589 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 590 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 591 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 592 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 593 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 594 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 595 * @arg @ref LL_EXTI_LINE_17
<> 135:176b8275d35d 596 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 597 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 598 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 599 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 600 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 601 * @arg @ref LL_EXTI_LINE_23
<> 135:176b8275d35d 602 * @arg @ref LL_EXTI_LINE_24
<> 135:176b8275d35d 603 * @arg @ref LL_EXTI_LINE_25
<> 135:176b8275d35d 604 * @arg @ref LL_EXTI_LINE_26
<> 135:176b8275d35d 605 * @arg @ref LL_EXTI_LINE_27
<> 135:176b8275d35d 606 * @arg @ref LL_EXTI_LINE_28
<> 135:176b8275d35d 607 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 608 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 609 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 610 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 135:176b8275d35d 611 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 612 * @retval None
<> 135:176b8275d35d 613 */
<> 135:176b8275d35d 614 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 615 {
<> 135:176b8275d35d 616 CLEAR_BIT(EXTI->EMR, ExtiLine);
<> 135:176b8275d35d 617 }
<> 135:176b8275d35d 618
<> 135:176b8275d35d 619 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 620 /**
<> 135:176b8275d35d 621 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
<> 135:176b8275d35d 622 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
<> 135:176b8275d35d 623 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 624 * @arg @ref LL_EXTI_LINE_32
<> 135:176b8275d35d 625 * @arg @ref LL_EXTI_LINE_33
<> 135:176b8275d35d 626 * @arg @ref LL_EXTI_LINE_34
<> 135:176b8275d35d 627 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 628 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 629 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 630 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 631 * @arg @ref LL_EXTI_LINE_39
<> 135:176b8275d35d 632 * @arg @ref LL_EXTI_LINE_ALL_32_63
<> 135:176b8275d35d 633 * @retval None
<> 135:176b8275d35d 634 */
<> 135:176b8275d35d 635 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 636 {
<> 135:176b8275d35d 637 CLEAR_BIT(EXTI->EMR2, ExtiLine);
<> 135:176b8275d35d 638 }
<> 135:176b8275d35d 639 #endif
<> 135:176b8275d35d 640
<> 135:176b8275d35d 641 /**
<> 135:176b8275d35d 642 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
<> 135:176b8275d35d 643 * @rmtoll EMR EMx LL_EXTI_IsEnabledEvent_0_31
<> 135:176b8275d35d 644 * @param ExtiLine This parameter can be one of the following values:
<> 135:176b8275d35d 645 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 646 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 647 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 648 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 649 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 650 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 651 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 652 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 653 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 654 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 655 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 656 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 657 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 658 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 659 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 660 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 661 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 662 * @arg @ref LL_EXTI_LINE_17
<> 135:176b8275d35d 663 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 664 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 665 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 666 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 667 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 668 * @arg @ref LL_EXTI_LINE_23
<> 135:176b8275d35d 669 * @arg @ref LL_EXTI_LINE_24
<> 135:176b8275d35d 670 * @arg @ref LL_EXTI_LINE_25
<> 135:176b8275d35d 671 * @arg @ref LL_EXTI_LINE_26
<> 135:176b8275d35d 672 * @arg @ref LL_EXTI_LINE_27
<> 135:176b8275d35d 673 * @arg @ref LL_EXTI_LINE_28
<> 135:176b8275d35d 674 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 675 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 676 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 677 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 135:176b8275d35d 678 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 679 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 680 */
<> 135:176b8275d35d 681 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 682 {
<> 135:176b8275d35d 683 return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine));
<> 135:176b8275d35d 684
<> 135:176b8275d35d 685 }
<> 135:176b8275d35d 686
<> 135:176b8275d35d 687 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 688 /**
<> 135:176b8275d35d 689 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
<> 135:176b8275d35d 690 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
<> 135:176b8275d35d 691 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 692 * @arg @ref LL_EXTI_LINE_32
<> 135:176b8275d35d 693 * @arg @ref LL_EXTI_LINE_33
<> 135:176b8275d35d 694 * @arg @ref LL_EXTI_LINE_34
<> 135:176b8275d35d 695 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 696 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 697 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 698 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 699 * @arg @ref LL_EXTI_LINE_39
<> 135:176b8275d35d 700 * @arg @ref LL_EXTI_LINE_ALL_32_63
<> 135:176b8275d35d 701 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 702 */
<> 135:176b8275d35d 703 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 704 {
<> 135:176b8275d35d 705 return (READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine));
<> 135:176b8275d35d 706 }
<> 135:176b8275d35d 707 #endif
<> 135:176b8275d35d 708
<> 135:176b8275d35d 709 /**
<> 135:176b8275d35d 710 * @}
<> 135:176b8275d35d 711 */
<> 135:176b8275d35d 712
<> 135:176b8275d35d 713 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
<> 135:176b8275d35d 714 * @{
<> 135:176b8275d35d 715 */
<> 135:176b8275d35d 716
<> 135:176b8275d35d 717 /**
<> 135:176b8275d35d 718 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
<> 135:176b8275d35d 719 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 135:176b8275d35d 720 * generated on these lines. If a rising edge on a configurable interrupt
<> 135:176b8275d35d 721 * line occurs during a write operation in the EXTI_RTSR register, the
<> 135:176b8275d35d 722 * pending bit is not set.
<> 135:176b8275d35d 723 * Rising and falling edge triggers can be set for
<> 135:176b8275d35d 724 * the same interrupt line. In this case, both generate a trigger
<> 135:176b8275d35d 725 * condition.
<> 135:176b8275d35d 726 * @rmtoll RTSR RTx LL_EXTI_EnableRisingTrig_0_31
<> 135:176b8275d35d 727 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 728 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 729 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 730 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 731 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 732 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 733 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 734 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 735 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 736 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 737 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 738 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 739 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 740 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 741 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 742 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 743 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 744 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 745 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 746 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 747 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 748 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 749 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 750 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 751 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 752 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 753 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 754 * @retval None
<> 135:176b8275d35d 755 */
<> 135:176b8275d35d 756 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 757 {
<> 135:176b8275d35d 758 SET_BIT(EXTI->RTSR, ExtiLine);
<> 135:176b8275d35d 759
<> 135:176b8275d35d 760 }
<> 135:176b8275d35d 761
<> 135:176b8275d35d 762 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 763 /**
<> 135:176b8275d35d 764 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
<> 135:176b8275d35d 765 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 135:176b8275d35d 766 * generated on these lines. If a rising edge on a configurable interrupt
<> 135:176b8275d35d 767 * line occurs during a write operation in the EXTI_RTSR register, the
<> 135:176b8275d35d 768 * pending bit is not set.Rising and falling edge triggers can be set for
<> 135:176b8275d35d 769 * the same interrupt line. In this case, both generate a trigger
<> 135:176b8275d35d 770 * condition.
<> 135:176b8275d35d 771 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
<> 135:176b8275d35d 772 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 773 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 774 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 775 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 776 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 777 * @retval None
<> 135:176b8275d35d 778 */
<> 135:176b8275d35d 779 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 780 {
<> 135:176b8275d35d 781 SET_BIT(EXTI->RTSR2, ExtiLine);
<> 135:176b8275d35d 782 }
<> 135:176b8275d35d 783 #endif
<> 135:176b8275d35d 784
<> 135:176b8275d35d 785 /**
<> 135:176b8275d35d 786 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
<> 135:176b8275d35d 787 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 135:176b8275d35d 788 * generated on these lines. If a rising edge on a configurable interrupt
<> 135:176b8275d35d 789 * line occurs during a write operation in the EXTI_RTSR register, the
<> 135:176b8275d35d 790 * pending bit is not set.
<> 135:176b8275d35d 791 * Rising and falling edge triggers can be set for
<> 135:176b8275d35d 792 * the same interrupt line. In this case, both generate a trigger
<> 135:176b8275d35d 793 * condition.
<> 135:176b8275d35d 794 * @rmtoll RTSR RTx LL_EXTI_DisableRisingTrig_0_31
<> 135:176b8275d35d 795 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 796 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 797 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 798 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 799 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 800 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 801 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 802 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 803 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 804 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 805 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 806 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 807 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 808 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 809 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 810 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 811 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 812 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 813 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 814 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 815 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 816 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 817 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 818 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 819 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 820 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 821 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 822 * @retval None
<> 135:176b8275d35d 823 */
<> 135:176b8275d35d 824 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 825 {
<> 135:176b8275d35d 826 CLEAR_BIT(EXTI->RTSR, ExtiLine);
<> 135:176b8275d35d 827
<> 135:176b8275d35d 828 }
<> 135:176b8275d35d 829
<> 135:176b8275d35d 830 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 831 /**
<> 135:176b8275d35d 832 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
<> 135:176b8275d35d 833 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 135:176b8275d35d 834 * generated on these lines. If a rising edge on a configurable interrupt
<> 135:176b8275d35d 835 * line occurs during a write operation in the EXTI_RTSR register, the
<> 135:176b8275d35d 836 * pending bit is not set.
<> 135:176b8275d35d 837 * Rising and falling edge triggers can be set for
<> 135:176b8275d35d 838 * the same interrupt line. In this case, both generate a trigger
<> 135:176b8275d35d 839 * condition.
<> 135:176b8275d35d 840 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
<> 135:176b8275d35d 841 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 842 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 843 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 844 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 845 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 846 * @retval None
<> 135:176b8275d35d 847 */
<> 135:176b8275d35d 848 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 849 {
<> 135:176b8275d35d 850 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
<> 135:176b8275d35d 851 }
<> 135:176b8275d35d 852 #endif
<> 135:176b8275d35d 853
<> 135:176b8275d35d 854 /**
<> 135:176b8275d35d 855 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
<> 135:176b8275d35d 856 * @rmtoll RTSR RTx LL_EXTI_IsEnabledRisingTrig_0_31
<> 135:176b8275d35d 857 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 858 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 859 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 860 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 861 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 862 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 863 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 864 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 865 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 866 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 867 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 868 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 869 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 870 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 871 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 872 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 873 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 874 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 875 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 876 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 877 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 878 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 879 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 880 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 881 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 882 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 883 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 884 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 885 */
<> 135:176b8275d35d 886 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 887 {
<> 135:176b8275d35d 888 return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine));
<> 135:176b8275d35d 889 }
<> 135:176b8275d35d 890
<> 135:176b8275d35d 891 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 892 /**
<> 135:176b8275d35d 893 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
<> 135:176b8275d35d 894 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
<> 135:176b8275d35d 895 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 896 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 897 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 898 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 899 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 900 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 901 */
<> 135:176b8275d35d 902 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 903 {
<> 135:176b8275d35d 904 return (READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine));
<> 135:176b8275d35d 905 }
<> 135:176b8275d35d 906 #endif
<> 135:176b8275d35d 907
<> 135:176b8275d35d 908 /**
<> 135:176b8275d35d 909 * @}
<> 135:176b8275d35d 910 */
<> 135:176b8275d35d 911
<> 135:176b8275d35d 912 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
<> 135:176b8275d35d 913 * @{
<> 135:176b8275d35d 914 */
<> 135:176b8275d35d 915
<> 135:176b8275d35d 916 /**
<> 135:176b8275d35d 917 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
<> 135:176b8275d35d 918 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 135:176b8275d35d 919 * generated on these lines. If a falling edge on a configurable interrupt
<> 135:176b8275d35d 920 * line occurs during a write operation in the EXTI_FTSR register, the
<> 135:176b8275d35d 921 * pending bit is not set.
<> 135:176b8275d35d 922 * Rising and falling edge triggers can be set for
<> 135:176b8275d35d 923 * the same interrupt line. In this case, both generate a trigger
<> 135:176b8275d35d 924 * condition.
<> 135:176b8275d35d 925 * @rmtoll FTSR FTx LL_EXTI_EnableFallingTrig_0_31
<> 135:176b8275d35d 926 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 927 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 928 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 929 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 930 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 931 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 932 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 933 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 934 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 935 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 936 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 937 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 938 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 939 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 940 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 941 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 942 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 943 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 944 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 945 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 946 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 947 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 948 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 949 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 950 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 951 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 952 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 953 * @retval None
<> 135:176b8275d35d 954 */
<> 135:176b8275d35d 955 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 956 {
<> 135:176b8275d35d 957 SET_BIT(EXTI->FTSR, ExtiLine);
<> 135:176b8275d35d 958 }
<> 135:176b8275d35d 959
<> 135:176b8275d35d 960 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 961 /**
<> 135:176b8275d35d 962 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
<> 135:176b8275d35d 963 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 135:176b8275d35d 964 * generated on these lines. If a Falling edge on a configurable interrupt
<> 135:176b8275d35d 965 * line occurs during a write operation in the EXTI_FTSR register, the
<> 135:176b8275d35d 966 * pending bit is not set.
<> 135:176b8275d35d 967 * Rising and falling edge triggers can be set for
<> 135:176b8275d35d 968 * the same interrupt line. In this case, both generate a trigger
<> 135:176b8275d35d 969 * condition.
<> 135:176b8275d35d 970 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
<> 135:176b8275d35d 971 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 972 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 973 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 974 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 975 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 976 * @retval None
<> 135:176b8275d35d 977 */
<> 135:176b8275d35d 978 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 979 {
<> 135:176b8275d35d 980 SET_BIT(EXTI->FTSR2, ExtiLine);
<> 135:176b8275d35d 981 }
<> 135:176b8275d35d 982 #endif
<> 135:176b8275d35d 983
<> 135:176b8275d35d 984 /**
<> 135:176b8275d35d 985 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
<> 135:176b8275d35d 986 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 135:176b8275d35d 987 * generated on these lines. If a Falling edge on a configurable interrupt
<> 135:176b8275d35d 988 * line occurs during a write operation in the EXTI_FTSR register, the
<> 135:176b8275d35d 989 * pending bit is not set.
<> 135:176b8275d35d 990 * Rising and falling edge triggers can be set for the same interrupt line.
<> 135:176b8275d35d 991 * In this case, both generate a trigger condition.
<> 135:176b8275d35d 992 * @rmtoll FTSR FTx LL_EXTI_DisableFallingTrig_0_31
<> 135:176b8275d35d 993 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 994 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 995 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 996 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 997 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 998 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 999 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 1000 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 1001 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 1002 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 1003 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 1004 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 1005 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 1006 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 1007 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 1008 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 1009 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 1010 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 1011 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 1012 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 1013 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 1014 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 1015 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 1016 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 1017 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 1018 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 1019 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 1020 * @retval None
<> 135:176b8275d35d 1021 */
<> 135:176b8275d35d 1022 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 1023 {
<> 135:176b8275d35d 1024 CLEAR_BIT(EXTI->FTSR, ExtiLine);
<> 135:176b8275d35d 1025 }
<> 135:176b8275d35d 1026
<> 135:176b8275d35d 1027 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 1028 /**
<> 135:176b8275d35d 1029 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
<> 135:176b8275d35d 1030 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 135:176b8275d35d 1031 * generated on these lines. If a Falling edge on a configurable interrupt
<> 135:176b8275d35d 1032 * line occurs during a write operation in the EXTI_FTSR register, the
<> 135:176b8275d35d 1033 * pending bit is not set.
<> 135:176b8275d35d 1034 * Rising and falling edge triggers can be set for the same interrupt line.
<> 135:176b8275d35d 1035 * In this case, both generate a trigger condition.
<> 135:176b8275d35d 1036 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
<> 135:176b8275d35d 1037 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 1038 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 1039 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 1040 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 1041 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 1042 * @retval None
<> 135:176b8275d35d 1043 */
<> 135:176b8275d35d 1044 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 1045 {
<> 135:176b8275d35d 1046 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
<> 135:176b8275d35d 1047 }
<> 135:176b8275d35d 1048 #endif
<> 135:176b8275d35d 1049
<> 135:176b8275d35d 1050 /**
<> 135:176b8275d35d 1051 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
<> 135:176b8275d35d 1052 * @rmtoll FTSR FTx LL_EXTI_IsEnabledFallingTrig_0_31
<> 135:176b8275d35d 1053 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 1054 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 1055 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 1056 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 1057 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 1058 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 1059 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 1060 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 1061 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 1062 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 1063 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 1064 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 1065 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 1066 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 1067 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 1068 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 1069 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 1070 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 1071 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 1072 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 1073 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 1074 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 1075 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 1076 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 1077 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 1078 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 1079 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 1080 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 1081 */
<> 135:176b8275d35d 1082 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 1083 {
<> 135:176b8275d35d 1084 return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine));
<> 135:176b8275d35d 1085 }
<> 135:176b8275d35d 1086
<> 135:176b8275d35d 1087 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 1088 /**
<> 135:176b8275d35d 1089 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
<> 135:176b8275d35d 1090 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
<> 135:176b8275d35d 1091 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 1092 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 1093 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 1094 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 1095 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 1096 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 1097 */
<> 135:176b8275d35d 1098 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 1099 {
<> 135:176b8275d35d 1100 return (READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine));
<> 135:176b8275d35d 1101 }
<> 135:176b8275d35d 1102 #endif
<> 135:176b8275d35d 1103
<> 135:176b8275d35d 1104 /**
<> 135:176b8275d35d 1105 * @}
<> 135:176b8275d35d 1106 */
<> 135:176b8275d35d 1107
<> 135:176b8275d35d 1108 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
<> 135:176b8275d35d 1109 * @{
<> 135:176b8275d35d 1110 */
<> 135:176b8275d35d 1111
<> 135:176b8275d35d 1112 /**
<> 135:176b8275d35d 1113 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
<> 135:176b8275d35d 1114 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
<> 135:176b8275d35d 1115 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
<> 135:176b8275d35d 1116 * resulting in an interrupt request generation.
<> 135:176b8275d35d 1117 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
<> 135:176b8275d35d 1118 * register (by writing a 1 into the bit)
<> 135:176b8275d35d 1119 * @rmtoll SWIER SWIx LL_EXTI_GenerateSWI_0_31
<> 135:176b8275d35d 1120 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 1121 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 1122 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 1123 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 1124 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 1125 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 1126 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 1127 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 1128 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 1129 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 1130 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 1131 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 1132 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 1133 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 1134 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 1135 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 1136 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 1137 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 1138 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 1139 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 1140 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 1141 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 1142 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 1143 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 1144 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 1145 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 1146 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 1147 * @retval None
<> 135:176b8275d35d 1148 */
<> 135:176b8275d35d 1149 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 1150 {
<> 135:176b8275d35d 1151 SET_BIT(EXTI->SWIER, ExtiLine);
<> 135:176b8275d35d 1152 }
<> 135:176b8275d35d 1153
<> 135:176b8275d35d 1154 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 1155 /**
<> 135:176b8275d35d 1156 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
<> 135:176b8275d35d 1157 * @note If the interrupt is enabled on this line inthe EXTI_IMR, writing a 1 to
<> 135:176b8275d35d 1158 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
<> 135:176b8275d35d 1159 * resulting in an interrupt request generation.
<> 135:176b8275d35d 1160 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
<> 135:176b8275d35d 1161 * register (by writing a 1 into the bit)
<> 135:176b8275d35d 1162 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
<> 135:176b8275d35d 1163 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 1164 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 1165 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 1166 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 1167 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 1168 * @retval None
<> 135:176b8275d35d 1169 */
<> 135:176b8275d35d 1170 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 1171 {
<> 135:176b8275d35d 1172 SET_BIT(EXTI->SWIER2, ExtiLine);
<> 135:176b8275d35d 1173 }
<> 135:176b8275d35d 1174 #endif
<> 135:176b8275d35d 1175
<> 135:176b8275d35d 1176 /**
<> 135:176b8275d35d 1177 * @}
<> 135:176b8275d35d 1178 */
<> 135:176b8275d35d 1179
<> 135:176b8275d35d 1180 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
<> 135:176b8275d35d 1181 * @{
<> 135:176b8275d35d 1182 */
<> 135:176b8275d35d 1183
<> 135:176b8275d35d 1184 /**
<> 135:176b8275d35d 1185 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
<> 135:176b8275d35d 1186 * @note This bit is set when the selected edge event arrives on the interrupt
<> 135:176b8275d35d 1187 * line. This bit is cleared by writing a 1 to the bit.
<> 135:176b8275d35d 1188 * @rmtoll PR PIFx LL_EXTI_IsActiveFlag_0_31
<> 135:176b8275d35d 1189 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 1190 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 1191 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 1192 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 1193 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 1194 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 1195 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 1196 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 1197 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 1198 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 1199 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 1200 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 1201 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 1202 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 1203 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 1204 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 1205 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 1206 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 1207 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 1208 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 1209 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 1210 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 1211 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 1212 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 1213 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 1214 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 1215 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 1216 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 1217 */
<> 135:176b8275d35d 1218 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 1219 {
<> 135:176b8275d35d 1220 return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine));
<> 135:176b8275d35d 1221 }
<> 135:176b8275d35d 1222
<> 135:176b8275d35d 1223 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 1224 /**
<> 135:176b8275d35d 1225 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63
<> 135:176b8275d35d 1226 * @note This bit is set when the selected edge event arrives on the interrupt
<> 135:176b8275d35d 1227 * line. This bit is cleared by writing a 1 to the bit.
<> 135:176b8275d35d 1228 * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63
<> 135:176b8275d35d 1229 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 1230 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 1231 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 1232 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 1233 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 1234 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 1235 */
<> 135:176b8275d35d 1236 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 1237 {
<> 135:176b8275d35d 1238 return (READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine));
<> 135:176b8275d35d 1239 }
<> 135:176b8275d35d 1240 #endif
<> 135:176b8275d35d 1241
<> 135:176b8275d35d 1242 /**
<> 135:176b8275d35d 1243 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
<> 135:176b8275d35d 1244 * @note This bit is set when the selected edge event arrives on the interrupt
<> 135:176b8275d35d 1245 * line. This bit is cleared by writing a 1 to the bit.
<> 135:176b8275d35d 1246 * @rmtoll PR PIFx LL_EXTI_ReadFlag_0_31
<> 135:176b8275d35d 1247 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 1248 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 1249 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 1250 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 1251 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 1252 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 1253 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 1254 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 1255 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 1256 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 1257 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 1258 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 1259 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 1260 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 1261 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 1262 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 1263 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 1264 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 1265 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 1266 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 1267 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 1268 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 1269 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 1270 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 1271 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 1272 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 1273 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 1274 * @retval @note This bit is set when the selected edge event arrives on the interrupt
<> 135:176b8275d35d 1275 */
<> 135:176b8275d35d 1276 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 1277 {
<> 135:176b8275d35d 1278 return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine));
<> 135:176b8275d35d 1279 }
<> 135:176b8275d35d 1280
<> 135:176b8275d35d 1281 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 1282
<> 135:176b8275d35d 1283 /**
<> 135:176b8275d35d 1284 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63
<> 135:176b8275d35d 1285 * @note This bit is set when the selected edge event arrives on the interrupt
<> 135:176b8275d35d 1286 * line. This bit is cleared by writing a 1 to the bit.
<> 135:176b8275d35d 1287 * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63
<> 135:176b8275d35d 1288 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 1289 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 1290 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 1291 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 1292 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 1293 * @retval @note This bit is set when the selected edge event arrives on the interrupt
<> 135:176b8275d35d 1294 */
<> 135:176b8275d35d 1295 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 1296 {
<> 135:176b8275d35d 1297 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine));
<> 135:176b8275d35d 1298 }
<> 135:176b8275d35d 1299 #endif
<> 135:176b8275d35d 1300
<> 135:176b8275d35d 1301 /**
<> 135:176b8275d35d 1302 * @brief Clear ExtLine Flags for Lines in range 0 to 31
<> 135:176b8275d35d 1303 * @note This bit is set when the selected edge event arrives on the interrupt
<> 135:176b8275d35d 1304 * line. This bit is cleared by writing a 1 to the bit.
<> 135:176b8275d35d 1305 * @rmtoll PR PIFx LL_EXTI_ClearFlag_0_31
<> 135:176b8275d35d 1306 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 1307 * @arg @ref LL_EXTI_LINE_0
<> 135:176b8275d35d 1308 * @arg @ref LL_EXTI_LINE_1
<> 135:176b8275d35d 1309 * @arg @ref LL_EXTI_LINE_2
<> 135:176b8275d35d 1310 * @arg @ref LL_EXTI_LINE_3
<> 135:176b8275d35d 1311 * @arg @ref LL_EXTI_LINE_4
<> 135:176b8275d35d 1312 * @arg @ref LL_EXTI_LINE_5
<> 135:176b8275d35d 1313 * @arg @ref LL_EXTI_LINE_6
<> 135:176b8275d35d 1314 * @arg @ref LL_EXTI_LINE_7
<> 135:176b8275d35d 1315 * @arg @ref LL_EXTI_LINE_8
<> 135:176b8275d35d 1316 * @arg @ref LL_EXTI_LINE_9
<> 135:176b8275d35d 1317 * @arg @ref LL_EXTI_LINE_10
<> 135:176b8275d35d 1318 * @arg @ref LL_EXTI_LINE_11
<> 135:176b8275d35d 1319 * @arg @ref LL_EXTI_LINE_12
<> 135:176b8275d35d 1320 * @arg @ref LL_EXTI_LINE_13
<> 135:176b8275d35d 1321 * @arg @ref LL_EXTI_LINE_14
<> 135:176b8275d35d 1322 * @arg @ref LL_EXTI_LINE_15
<> 135:176b8275d35d 1323 * @arg @ref LL_EXTI_LINE_16
<> 135:176b8275d35d 1324 * @arg @ref LL_EXTI_LINE_18
<> 135:176b8275d35d 1325 * @arg @ref LL_EXTI_LINE_19
<> 135:176b8275d35d 1326 * @arg @ref LL_EXTI_LINE_20
<> 135:176b8275d35d 1327 * @arg @ref LL_EXTI_LINE_21
<> 135:176b8275d35d 1328 * @arg @ref LL_EXTI_LINE_22
<> 135:176b8275d35d 1329 * @arg @ref LL_EXTI_LINE_29
<> 135:176b8275d35d 1330 * @arg @ref LL_EXTI_LINE_30
<> 135:176b8275d35d 1331 * @arg @ref LL_EXTI_LINE_31
<> 135:176b8275d35d 1332 * @note Please check each device line mapping for EXTI Line availability
<> 135:176b8275d35d 1333 * @retval None
<> 135:176b8275d35d 1334 */
<> 135:176b8275d35d 1335 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
<> 135:176b8275d35d 1336 {
<> 135:176b8275d35d 1337 WRITE_REG(EXTI->PR, ExtiLine);
<> 135:176b8275d35d 1338 }
<> 135:176b8275d35d 1339
<> 135:176b8275d35d 1340 #if defined(EXTI_32_63_SUPPORT)
<> 135:176b8275d35d 1341 /**
<> 135:176b8275d35d 1342 * @brief Clear ExtLine Flags for Lines in range 32 to 63
<> 135:176b8275d35d 1343 * @note This bit is set when the selected edge event arrives on the interrupt
<> 135:176b8275d35d 1344 * line. This bit is cleared by writing a 1 to the bit.
<> 135:176b8275d35d 1345 * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63
<> 135:176b8275d35d 1346 * @param ExtiLine This parameter can be a combination of the following values:
<> 135:176b8275d35d 1347 * @arg @ref LL_EXTI_LINE_35
<> 135:176b8275d35d 1348 * @arg @ref LL_EXTI_LINE_36
<> 135:176b8275d35d 1349 * @arg @ref LL_EXTI_LINE_37
<> 135:176b8275d35d 1350 * @arg @ref LL_EXTI_LINE_38
<> 135:176b8275d35d 1351 * @retval None
<> 135:176b8275d35d 1352 */
<> 135:176b8275d35d 1353 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)
<> 135:176b8275d35d 1354 {
<> 135:176b8275d35d 1355 WRITE_REG(EXTI->PR2, ExtiLine);
<> 135:176b8275d35d 1356 }
<> 135:176b8275d35d 1357 #endif
<> 135:176b8275d35d 1358
<> 135:176b8275d35d 1359 /**
<> 135:176b8275d35d 1360 * @}
<> 135:176b8275d35d 1361 */
<> 135:176b8275d35d 1362
<> 135:176b8275d35d 1363 #if defined(USE_FULL_LL_DRIVER)
<> 135:176b8275d35d 1364 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
<> 135:176b8275d35d 1365 * @{
<> 135:176b8275d35d 1366 */
<> 135:176b8275d35d 1367
<> 135:176b8275d35d 1368 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
<> 135:176b8275d35d 1369 uint32_t LL_EXTI_DeInit(void);
<> 135:176b8275d35d 1370 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
<> 135:176b8275d35d 1371
<> 135:176b8275d35d 1372
<> 135:176b8275d35d 1373 /**
<> 135:176b8275d35d 1374 * @}
<> 135:176b8275d35d 1375 */
<> 135:176b8275d35d 1376 #endif /* USE_FULL_LL_DRIVER */
<> 135:176b8275d35d 1377
<> 135:176b8275d35d 1378 /**
<> 135:176b8275d35d 1379 * @}
<> 135:176b8275d35d 1380 */
<> 135:176b8275d35d 1381
<> 135:176b8275d35d 1382 /**
<> 135:176b8275d35d 1383 * @}
<> 135:176b8275d35d 1384 */
<> 135:176b8275d35d 1385
<> 135:176b8275d35d 1386 #endif /* EXTI */
<> 135:176b8275d35d 1387
<> 135:176b8275d35d 1388 /**
<> 135:176b8275d35d 1389 * @}
<> 135:176b8275d35d 1390 */
<> 135:176b8275d35d 1391
<> 135:176b8275d35d 1392 #ifdef __cplusplus
<> 135:176b8275d35d 1393 }
<> 135:176b8275d35d 1394 #endif
<> 135:176b8275d35d 1395
<> 135:176b8275d35d 1396 #endif /* __STM32F3xx_LL_EXTI_H */
<> 135:176b8275d35d 1397
<> 135:176b8275d35d 1398 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/