mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F334R8/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_nor.h@143:86740a56073b, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:30:20 2017 +0100
Revision:
143:86740a56073b
Parent:
135:176b8275d35d 
Release 143 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f3xx_hal_nor.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
<> 135:176b8275d35d 5 * @version V1.4.0
<> 135:176b8275d35d 6 * @date 16-December-2016
bogdanm 92:4fc01daae5a5 7 * @brief Header file of NOR HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F3xx_HAL_NOR_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F3xx_HAL_NOR_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 47 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
Kojto 122:f9eeca106725 48 #include "stm32f3xx_ll_fmc.h"
bogdanm 92:4fc01daae5a5 49
bogdanm 92:4fc01daae5a5 50 /** @addtogroup STM32F3xx_HAL_Driver
bogdanm 92:4fc01daae5a5 51 * @{
bogdanm 92:4fc01daae5a5 52 */
bogdanm 92:4fc01daae5a5 53
bogdanm 92:4fc01daae5a5 54 /** @addtogroup NOR
bogdanm 92:4fc01daae5a5 55 * @{
bogdanm 92:4fc01daae5a5 56 */
bogdanm 92:4fc01daae5a5 57
Kojto 122:f9eeca106725 58
Kojto 122:f9eeca106725 59 /** @addtogroup NOR_Private_Constants
Kojto 122:f9eeca106725 60 * @{
Kojto 122:f9eeca106725 61 */
Kojto 122:f9eeca106725 62
Kojto 122:f9eeca106725 63 /* NOR device IDs addresses */
<> 135:176b8275d35d 64 #define MC_ADDRESS ((uint16_t)0x0000U)
<> 135:176b8275d35d 65 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001U)
<> 135:176b8275d35d 66 #define DEVICE_CODE2_ADDR ((uint16_t)0x000EU)
<> 135:176b8275d35d 67 #define DEVICE_CODE3_ADDR ((uint16_t)0x000FU)
Kojto 122:f9eeca106725 68
Kojto 122:f9eeca106725 69 /* NOR CFI IDs addresses */
<> 135:176b8275d35d 70 #define CFI1_ADDRESS ((uint16_t)0x10U)
<> 135:176b8275d35d 71 #define CFI2_ADDRESS ((uint16_t)0x11U)
<> 135:176b8275d35d 72 #define CFI3_ADDRESS ((uint16_t)0x12U)
<> 135:176b8275d35d 73 #define CFI4_ADDRESS ((uint16_t)0x13U)
Kojto 122:f9eeca106725 74
Kojto 122:f9eeca106725 75 /* NOR memory data width */
<> 135:176b8275d35d 76 #define NOR_MEMORY_8B ((uint8_t)0x0U)
<> 135:176b8275d35d 77 #define NOR_MEMORY_16B ((uint8_t)0x1U)
Kojto 122:f9eeca106725 78
Kojto 122:f9eeca106725 79 /* NOR memory device read/write start address */
Kojto 122:f9eeca106725 80 #define NOR_MEMORY_ADRESS1 FMC_BANK1_1
Kojto 122:f9eeca106725 81 #define NOR_MEMORY_ADRESS2 FMC_BANK1_2
Kojto 122:f9eeca106725 82 #define NOR_MEMORY_ADRESS3 FMC_BANK1_3
Kojto 122:f9eeca106725 83 #define NOR_MEMORY_ADRESS4 FMC_BANK1_4
Kojto 122:f9eeca106725 84
Kojto 122:f9eeca106725 85 /**
Kojto 122:f9eeca106725 86 * @}
Kojto 122:f9eeca106725 87 */
Kojto 122:f9eeca106725 88
Kojto 122:f9eeca106725 89 /** @addtogroup NOR_Private_Macros
Kojto 122:f9eeca106725 90 * @{
Kojto 122:f9eeca106725 91 */
Kojto 122:f9eeca106725 92
Kojto 122:f9eeca106725 93 /**
Kojto 122:f9eeca106725 94 * @brief NOR memory address shifting.
Kojto 122:f9eeca106725 95 * @param __NOR_ADDRESS: NOR base address
Kojto 122:f9eeca106725 96 * @param __NOR_MEMORY_WIDTH_: NOR memory width
Kojto 122:f9eeca106725 97 * @param __ADDRESS__: NOR memory address
Kojto 122:f9eeca106725 98 * @retval NOR shifted address value
Kojto 122:f9eeca106725 99 */
Kojto 122:f9eeca106725 100 #define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
Kojto 122:f9eeca106725 101 ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \
<> 135:176b8275d35d 102 ((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))): \
Kojto 122:f9eeca106725 103 ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
Kojto 122:f9eeca106725 104
Kojto 122:f9eeca106725 105 /**
Kojto 122:f9eeca106725 106 * @brief NOR memory write data to specified address.
Kojto 122:f9eeca106725 107 * @param __ADDRESS__: NOR memory address
Kojto 122:f9eeca106725 108 * @param __DATA__: Data to write
Kojto 122:f9eeca106725 109 * @retval None
Kojto 122:f9eeca106725 110 */
Kojto 122:f9eeca106725 111 #define NOR_WRITE(__ADDRESS__, __DATA__) (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__))
Kojto 122:f9eeca106725 112
Kojto 122:f9eeca106725 113 /**
Kojto 122:f9eeca106725 114 * @}
Kojto 122:f9eeca106725 115 */
bogdanm 92:4fc01daae5a5 116
bogdanm 92:4fc01daae5a5 117 /* Exported typedef ----------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 118 /** @defgroup NOR_Exported_Types NOR Exported Types
bogdanm 92:4fc01daae5a5 119 * @{
bogdanm 92:4fc01daae5a5 120 */
bogdanm 92:4fc01daae5a5 121
bogdanm 92:4fc01daae5a5 122 /**
bogdanm 92:4fc01daae5a5 123 * @brief HAL SRAM State structures definition
bogdanm 92:4fc01daae5a5 124 */
bogdanm 92:4fc01daae5a5 125 typedef enum
bogdanm 92:4fc01daae5a5 126 {
<> 135:176b8275d35d 127 HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */
<> 135:176b8275d35d 128 HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */
<> 135:176b8275d35d 129 HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */
<> 135:176b8275d35d 130 HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */
bogdanm 92:4fc01daae5a5 131 HAL_NOR_STATE_PROTECTED = 0x04 /*!< NOR NORSRAM device write protected */
bogdanm 92:4fc01daae5a5 132 }HAL_NOR_StateTypeDef;
bogdanm 92:4fc01daae5a5 133
bogdanm 92:4fc01daae5a5 134 /**
bogdanm 92:4fc01daae5a5 135 * @brief FMC NOR Status typedef
bogdanm 92:4fc01daae5a5 136 */
bogdanm 92:4fc01daae5a5 137 typedef enum
bogdanm 92:4fc01daae5a5 138 {
<> 135:176b8275d35d 139 HAL_NOR_STATUS_SUCCESS = 0U,
Kojto 122:f9eeca106725 140 HAL_NOR_STATUS_ONGOING,
Kojto 122:f9eeca106725 141 HAL_NOR_STATUS_ERROR,
Kojto 122:f9eeca106725 142 HAL_NOR_STATUS_TIMEOUT
Kojto 122:f9eeca106725 143 }HAL_NOR_StatusTypeDef;
bogdanm 92:4fc01daae5a5 144
bogdanm 92:4fc01daae5a5 145 /**
bogdanm 92:4fc01daae5a5 146 * @brief FMC NOR ID typedef
bogdanm 92:4fc01daae5a5 147 */
bogdanm 92:4fc01daae5a5 148 typedef struct
bogdanm 92:4fc01daae5a5 149 {
bogdanm 92:4fc01daae5a5 150 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
bogdanm 92:4fc01daae5a5 151
bogdanm 92:4fc01daae5a5 152 uint16_t Device_Code1;
bogdanm 92:4fc01daae5a5 153
bogdanm 92:4fc01daae5a5 154 uint16_t Device_Code2;
bogdanm 92:4fc01daae5a5 155
bogdanm 92:4fc01daae5a5 156 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
bogdanm 92:4fc01daae5a5 157 These codes can be accessed by performing read operations with specific
bogdanm 92:4fc01daae5a5 158 control signals and addresses set.They can also be accessed by issuing
Kojto 122:f9eeca106725 159 an Auto Select command. */
bogdanm 92:4fc01daae5a5 160 }NOR_IDTypeDef;
bogdanm 92:4fc01daae5a5 161
bogdanm 92:4fc01daae5a5 162 /**
bogdanm 92:4fc01daae5a5 163 * @brief FMC NOR CFI typedef
bogdanm 92:4fc01daae5a5 164 */
bogdanm 92:4fc01daae5a5 165 typedef struct
bogdanm 92:4fc01daae5a5 166 {
bogdanm 92:4fc01daae5a5 167 uint16_t CFI_1;
bogdanm 92:4fc01daae5a5 168
bogdanm 92:4fc01daae5a5 169 uint16_t CFI_2;
bogdanm 92:4fc01daae5a5 170
bogdanm 92:4fc01daae5a5 171 uint16_t CFI_3;
bogdanm 92:4fc01daae5a5 172
Kojto 122:f9eeca106725 173 uint16_t CFI_4; /*!< Defines the information stored in the memory's Common flash interface
Kojto 122:f9eeca106725 174 which contains a description of various electrical and timing parameters,
Kojto 122:f9eeca106725 175 density information and functions supported by the memory. */
bogdanm 92:4fc01daae5a5 176 }NOR_CFITypeDef;
bogdanm 92:4fc01daae5a5 177
bogdanm 92:4fc01daae5a5 178 /**
bogdanm 92:4fc01daae5a5 179 * @brief NOR handle Structure definition
bogdanm 92:4fc01daae5a5 180 */
bogdanm 92:4fc01daae5a5 181 typedef struct
bogdanm 92:4fc01daae5a5 182 {
bogdanm 92:4fc01daae5a5 183 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
bogdanm 92:4fc01daae5a5 184
bogdanm 92:4fc01daae5a5 185 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
bogdanm 92:4fc01daae5a5 186
bogdanm 92:4fc01daae5a5 187 FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
bogdanm 92:4fc01daae5a5 188
bogdanm 92:4fc01daae5a5 189 HAL_LockTypeDef Lock; /*!< NOR locking object */
bogdanm 92:4fc01daae5a5 190
bogdanm 92:4fc01daae5a5 191 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
bogdanm 92:4fc01daae5a5 192
bogdanm 92:4fc01daae5a5 193 }NOR_HandleTypeDef;
bogdanm 92:4fc01daae5a5 194
bogdanm 92:4fc01daae5a5 195 /**
bogdanm 92:4fc01daae5a5 196 * @}
bogdanm 92:4fc01daae5a5 197 */
bogdanm 92:4fc01daae5a5 198
bogdanm 92:4fc01daae5a5 199 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 200 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 201 /** @defgroup NOR_Exported_Macros NOR Exported Macros
bogdanm 92:4fc01daae5a5 202 * @{
bogdanm 92:4fc01daae5a5 203 */
bogdanm 92:4fc01daae5a5 204
bogdanm 92:4fc01daae5a5 205 /** @brief Reset NOR handle state
Kojto 122:f9eeca106725 206 * @param __HANDLE__: NOR handle
bogdanm 92:4fc01daae5a5 207 * @retval None
bogdanm 92:4fc01daae5a5 208 */
bogdanm 92:4fc01daae5a5 209 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
bogdanm 92:4fc01daae5a5 210
bogdanm 92:4fc01daae5a5 211 /**
bogdanm 92:4fc01daae5a5 212 * @}
bogdanm 92:4fc01daae5a5 213 */
bogdanm 92:4fc01daae5a5 214
bogdanm 92:4fc01daae5a5 215 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 216 /** @addtogroup NOR_Exported_Functions NOR Exported Functions
bogdanm 92:4fc01daae5a5 217 * @{
bogdanm 92:4fc01daae5a5 218 */
bogdanm 92:4fc01daae5a5 219
bogdanm 92:4fc01daae5a5 220 /** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 92:4fc01daae5a5 221 * @{
bogdanm 92:4fc01daae5a5 222 */
bogdanm 92:4fc01daae5a5 223
Kojto 122:f9eeca106725 224 /* Initialization/de-initialization functions ********************************/
bogdanm 92:4fc01daae5a5 225 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
bogdanm 92:4fc01daae5a5 226 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
bogdanm 92:4fc01daae5a5 227 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
bogdanm 92:4fc01daae5a5 228 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
bogdanm 92:4fc01daae5a5 229 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 230
bogdanm 92:4fc01daae5a5 231 /**
bogdanm 92:4fc01daae5a5 232 * @}
bogdanm 92:4fc01daae5a5 233 */
bogdanm 92:4fc01daae5a5 234
bogdanm 92:4fc01daae5a5 235 /** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions
bogdanm 92:4fc01daae5a5 236 * @{
bogdanm 92:4fc01daae5a5 237 */
bogdanm 92:4fc01daae5a5 238
Kojto 122:f9eeca106725 239 /* I/O operation functions ***************************************************/
bogdanm 92:4fc01daae5a5 240 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
bogdanm 92:4fc01daae5a5 241 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
bogdanm 92:4fc01daae5a5 242 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
bogdanm 92:4fc01daae5a5 243 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
bogdanm 92:4fc01daae5a5 244
bogdanm 92:4fc01daae5a5 245 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
bogdanm 92:4fc01daae5a5 246 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
bogdanm 92:4fc01daae5a5 247
bogdanm 92:4fc01daae5a5 248 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
bogdanm 92:4fc01daae5a5 249 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
bogdanm 92:4fc01daae5a5 250 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
bogdanm 92:4fc01daae5a5 251
bogdanm 92:4fc01daae5a5 252 /**
bogdanm 92:4fc01daae5a5 253 * @}
bogdanm 92:4fc01daae5a5 254 */
bogdanm 92:4fc01daae5a5 255
bogdanm 92:4fc01daae5a5 256 /** @addtogroup NOR_Exported_Functions_Group3 Peripheral Control functions
bogdanm 92:4fc01daae5a5 257 * @{
bogdanm 92:4fc01daae5a5 258 */
bogdanm 92:4fc01daae5a5 259
Kojto 122:f9eeca106725 260 /* NOR Control functions *****************************************************/
bogdanm 92:4fc01daae5a5 261 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
bogdanm 92:4fc01daae5a5 262 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
bogdanm 92:4fc01daae5a5 263
bogdanm 92:4fc01daae5a5 264 /**
bogdanm 92:4fc01daae5a5 265 * @}
bogdanm 92:4fc01daae5a5 266 */
bogdanm 92:4fc01daae5a5 267
bogdanm 92:4fc01daae5a5 268 /** @addtogroup NOR_Exported_Functions_Group4 Peripheral State functions
bogdanm 92:4fc01daae5a5 269 * @{
bogdanm 92:4fc01daae5a5 270 */
bogdanm 92:4fc01daae5a5 271
Kojto 122:f9eeca106725 272 /* NOR State functions ********************************************************/
bogdanm 92:4fc01daae5a5 273 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
Kojto 122:f9eeca106725 274 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 275
bogdanm 92:4fc01daae5a5 276 /**
bogdanm 92:4fc01daae5a5 277 * @}
bogdanm 92:4fc01daae5a5 278 */
bogdanm 92:4fc01daae5a5 279
bogdanm 92:4fc01daae5a5 280 /**
bogdanm 92:4fc01daae5a5 281 * @}
bogdanm 92:4fc01daae5a5 282 */
bogdanm 92:4fc01daae5a5 283
bogdanm 92:4fc01daae5a5 284 /**
bogdanm 92:4fc01daae5a5 285 * @}
bogdanm 92:4fc01daae5a5 286 */
bogdanm 92:4fc01daae5a5 287
bogdanm 92:4fc01daae5a5 288 /**
bogdanm 92:4fc01daae5a5 289 * @}
bogdanm 92:4fc01daae5a5 290 */
bogdanm 92:4fc01daae5a5 291
Kojto 122:f9eeca106725 292 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
Kojto 122:f9eeca106725 293
bogdanm 92:4fc01daae5a5 294 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 295 }
bogdanm 92:4fc01daae5a5 296 #endif
bogdanm 92:4fc01daae5a5 297
bogdanm 92:4fc01daae5a5 298 #endif /* __STM32F3xx_HAL_NOR_H */
bogdanm 92:4fc01daae5a5 299
bogdanm 92:4fc01daae5a5 300 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/