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TARGET_NUCLEO_F030R8/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_uart_ex.h@143:86740a56073b, 2017-05-26 (annotated)

Committer:: AnnaBridge
Date:: Fri May 26 12:30:20 2017 +0100
Revision:: 143:86740a56073b
Parent:: 134:ad3be0349dc5

Release 143 of the mbed library.

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	85:024bf7f99721	1	/**
bogdanm	85:024bf7f99721	2	******************************************************************************
bogdanm	85:024bf7f99721	3	* @file stm32f0xx_hal_uart_ex.h
bogdanm	85:024bf7f99721	4	* @author MCD Application Team
<>	134:ad3be0349dc5	5	* @version V1.5.0
<>	134:ad3be0349dc5	6	* @date 04-November-2016
<>	134:ad3be0349dc5	7	* @brief Header file of UART HAL Extended module.
bogdanm	85:024bf7f99721	8	******************************************************************************
bogdanm	85:024bf7f99721	9	* @attention
bogdanm	85:024bf7f99721	10	*
Kojto	122:f9eeca106725	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm	85:024bf7f99721	12	*
bogdanm	85:024bf7f99721	13	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	85:024bf7f99721	14	* are permitted provided that the following conditions are met:
bogdanm	85:024bf7f99721	15	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	85:024bf7f99721	16	* this list of conditions and the following disclaimer.
bogdanm	85:024bf7f99721	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	85:024bf7f99721	18	* this list of conditions and the following disclaimer in the documentation
bogdanm	85:024bf7f99721	19	* and/or other materials provided with the distribution.
bogdanm	85:024bf7f99721	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	85:024bf7f99721	21	* may be used to endorse or promote products derived from this software
bogdanm	85:024bf7f99721	22	* without specific prior written permission.
bogdanm	85:024bf7f99721	23	*
bogdanm	85:024bf7f99721	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	85:024bf7f99721	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	85:024bf7f99721	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	85:024bf7f99721	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	85:024bf7f99721	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	85:024bf7f99721	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	85:024bf7f99721	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	85:024bf7f99721	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	85:024bf7f99721	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	85:024bf7f99721	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	85:024bf7f99721	34	*
Kojto	108:34e6b704fe68	35	******************************************************************************
bogdanm	85:024bf7f99721	36	*/
bogdanm	85:024bf7f99721	37
bogdanm	85:024bf7f99721	38	/* Define to prevent recursive inclusion -------------------------------------*/
bogdanm	85:024bf7f99721	39	#ifndef __STM32F0xx_HAL_UART_EX_H
bogdanm	85:024bf7f99721	40	#define __STM32F0xx_HAL_UART_EX_H
bogdanm	85:024bf7f99721	41
bogdanm	85:024bf7f99721	42	#ifdef __cplusplus
bogdanm	85:024bf7f99721	43	extern "C" {
bogdanm	85:024bf7f99721	44	#endif
bogdanm	85:024bf7f99721	45
bogdanm	85:024bf7f99721	46	/* Includes ------------------------------------------------------------------*/
bogdanm	85:024bf7f99721	47	#include "stm32f0xx_hal_def.h"
bogdanm	85:024bf7f99721	48
bogdanm	85:024bf7f99721	49	/** @addtogroup STM32F0xx_HAL_Driver
bogdanm	85:024bf7f99721	50	* @{
bogdanm	85:024bf7f99721	51	*/
bogdanm	85:024bf7f99721	52
bogdanm	85:024bf7f99721	53	/** @addtogroup UARTEx
bogdanm	85:024bf7f99721	54	* @{
Kojto	108:34e6b704fe68	55	*/
bogdanm	85:024bf7f99721	56
bogdanm	85:024bf7f99721	57	/* Exported types ------------------------------------------------------------*/
Kojto	93:e188a91d3eaa	58	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
Kojto	93:e188a91d3eaa	59	/** @defgroup UARTEx_Exported_Types UARTEx Exported Types
Kojto	93:e188a91d3eaa	60	* @{
Kojto	93:e188a91d3eaa	61	*/
Kojto	108:34e6b704fe68	62
Kojto	108:34e6b704fe68	63	/**
Kojto	108:34e6b704fe68	64	* @brief UART wake up from stop mode parameters
Kojto	108:34e6b704fe68	65	*/
Kojto	108:34e6b704fe68	66	typedef struct
Kojto	93:e188a91d3eaa	67	{
Kojto	93:e188a91d3eaa	68	uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF).
Kojto	93:e188a91d3eaa	69	This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
Kojto	93:e188a91d3eaa	70	If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
Kojto	93:e188a91d3eaa	71	be filled up. */
Kojto	108:34e6b704fe68	72
Kojto	93:e188a91d3eaa	73	uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.
<>	134:ad3be0349dc5	74	This parameter can be a value of @ref UART_WakeUp_Address_Length. */
Kojto	108:34e6b704fe68	75
<>	134:ad3be0349dc5	76	uint8_t Address; /!< UART/USART node address (7-bit long max). /
Kojto	93:e188a91d3eaa	77	} UART_WakeUpTypeDef;
Kojto	108:34e6b704fe68	78
Kojto	93:e188a91d3eaa	79	/**
Kojto	93:e188a91d3eaa	80	* @}
Kojto	93:e188a91d3eaa	81	*/
Kojto	93:e188a91d3eaa	82	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
Kojto	93:e188a91d3eaa	83
bogdanm	85:024bf7f99721	84	/* Exported constants --------------------------------------------------------*/
bogdanm	92:4fc01daae5a5	85	/** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
bogdanm	85:024bf7f99721	86	* @{
bogdanm	85:024bf7f99721	87	*/
Kojto	108:34e6b704fe68	88
bogdanm	92:4fc01daae5a5	89	/** @defgroup UARTEx_Word_Length UARTEx Word Length
bogdanm	85:024bf7f99721	90	* @{
bogdanm	85:024bf7f99721	91	*/
Kojto	93:e188a91d3eaa	92	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
Kojto	93:e188a91d3eaa	93	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
Kojto	93:e188a91d3eaa	94	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
<>	134:ad3be0349dc5	95	#define UART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /!< 7-bit long UART frame /
<>	134:ad3be0349dc5	96	#define UART_WORDLENGTH_8B (0x00000000U) /!< 8-bit long UART frame /
<>	134:ad3be0349dc5	97	#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /!< 9-bit long UART frame /
bogdanm	85:024bf7f99721	98	#else
<>	134:ad3be0349dc5	99	#define UART_WORDLENGTH_8B (0x00000000U) /!< 8-bit long UART frame /
<>	134:ad3be0349dc5	100	#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) /!< 9-bit long UART frame /
Kojto	93:e188a91d3eaa	101	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
Kojto	93:e188a91d3eaa	102	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
Kojto	93:e188a91d3eaa	103	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
bogdanm	85:024bf7f99721	104	/**
bogdanm	85:024bf7f99721	105	* @}
bogdanm	85:024bf7f99721	106	*/
bogdanm	85:024bf7f99721	107
bogdanm	92:4fc01daae5a5	108	/** @defgroup UARTEx_AutoBaud_Rate_Mode UARTEx Advanced Feature AutoBaud Rate Mode
bogdanm	85:024bf7f99721	109	* @{
bogdanm	85:024bf7f99721	110	*/
Kojto	93:e188a91d3eaa	111	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
Kojto	93:e188a91d3eaa	112	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
Kojto	93:e188a91d3eaa	113	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
<>	134:ad3be0349dc5	114	#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT (0x00000000U) /!< Auto Baud rate detection on start bit /
Kojto	108:34e6b704fe68	115	#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) /!< Auto Baud rate detection on falling edge /
Kojto	108:34e6b704fe68	116	#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1) /!< Auto Baud rate detection on 0x7F frame detection /
Kojto	108:34e6b704fe68	117	#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE) /!< Auto Baud rate detection on 0x55 frame detection /
bogdanm	85:024bf7f99721	118	#else
<>	134:ad3be0349dc5	119	#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT (0x00000000U) /!< Auto Baud rate detection on start bit /
Kojto	108:34e6b704fe68	120	#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) /!< Auto Baud rate detection on falling edge /
Kojto	93:e188a91d3eaa	121	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
Kojto	93:e188a91d3eaa	122	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
Kojto	93:e188a91d3eaa	123	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
bogdanm	85:024bf7f99721	124	/**
bogdanm	85:024bf7f99721	125	* @}
<>	134:ad3be0349dc5	126	*/
bogdanm	85:024bf7f99721	127
Kojto	93:e188a91d3eaa	128	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	92:4fc01daae5a5	129	/** @defgroup UARTEx_LIN UARTEx Local Interconnection Network mode
bogdanm	85:024bf7f99721	130	* @{
bogdanm	85:024bf7f99721	131	*/
<>	134:ad3be0349dc5	132	#define UART_LIN_DISABLE (0x00000000U) /!< Local Interconnect Network disable /
Kojto	108:34e6b704fe68	133	#define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN) /!< Local Interconnect Network enable /
bogdanm	85:024bf7f99721	134	/**
bogdanm	85:024bf7f99721	135	* @}
<>	134:ad3be0349dc5	136	*/
<>	134:ad3be0349dc5	137
bogdanm	92:4fc01daae5a5	138	/** @defgroup UARTEx_LIN_Break_Detection UARTEx LIN Break Detection
bogdanm	85:024bf7f99721	139	* @{
bogdanm	85:024bf7f99721	140	*/
<>	134:ad3be0349dc5	141	#define UART_LINBREAKDETECTLENGTH_10B (0x00000000U) /!< LIN 10-bit break detection length /
Kojto	108:34e6b704fe68	142	#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) /!< LIN 11-bit break detection length /
bogdanm	85:024bf7f99721	143	/**
bogdanm	85:024bf7f99721	144	* @}
<>	134:ad3be0349dc5	145	*/
Kojto	93:e188a91d3eaa	146	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	85:024bf7f99721	147
bogdanm	92:4fc01daae5a5	148	/** @defgroup UART_Flags UARTEx Status Flags
bogdanm	85:024bf7f99721	149	* Elements values convention: 0xXXXX
bogdanm	85:024bf7f99721	150	* - 0xXXXX : Flag mask in the ISR register
bogdanm	85:024bf7f99721	151	* @{
bogdanm	85:024bf7f99721	152	*/
Kojto	108:34e6b704fe68	153	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<>	134:ad3be0349dc5	154	#define UART_FLAG_REACK (0x00400000U) /!< UART receive enable acknowledge flag /
Kojto	108:34e6b704fe68	155	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<>	134:ad3be0349dc5	156	#define UART_FLAG_TEACK (0x00200000U) /!< UART transmit enable acknowledge flag /
Kojto	93:e188a91d3eaa	157	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<>	134:ad3be0349dc5	158	#define UART_FLAG_WUF (0x00100000U) /!< UART wake-up from stop mode flag /
Kojto	93:e188a91d3eaa	159	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<>	134:ad3be0349dc5	160	#define UART_FLAG_RWU (0x00080000U) /!< UART receiver wake-up from mute mode flag /
<>	134:ad3be0349dc5	161	#define UART_FLAG_SBKF (0x00040000U) /!< UART send break flag /
<>	134:ad3be0349dc5	162	#define UART_FLAG_CMF (0x00020000U) /!< UART character match flag /
<>	134:ad3be0349dc5	163	#define UART_FLAG_BUSY (0x00010000U) /!< UART busy flag /
<>	134:ad3be0349dc5	164	#define UART_FLAG_ABRF (0x00008000U) /!< UART auto Baud rate flag /
<>	134:ad3be0349dc5	165	#define UART_FLAG_ABRE (0x00004000U) /!< UART auto Baud rate error /
Kojto	108:34e6b704fe68	166	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<>	134:ad3be0349dc5	167	#define UART_FLAG_EOBF (0x00001000U) /!< UART end of block flag /
Kojto	108:34e6b704fe68	168	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<>	134:ad3be0349dc5	169	#define UART_FLAG_RTOF (0x00000800U) /!< UART receiver timeout flag /
<>	134:ad3be0349dc5	170	#define UART_FLAG_CTS (0x00000400U) /!< UART clear to send flag /
<>	134:ad3be0349dc5	171	#define UART_FLAG_CTSIF (0x00000200U) /!< UART clear to send interrupt flag /
Kojto	93:e188a91d3eaa	172	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<>	134:ad3be0349dc5	173	#define UART_FLAG_LBDF (0x00000100U) /!< UART LIN break detection flag (not available on F030xx devices)/
Kojto	93:e188a91d3eaa	174	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<>	134:ad3be0349dc5	175	#define UART_FLAG_TXE (0x00000080U) /!< UART transmit data register empty /
<>	134:ad3be0349dc5	176	#define UART_FLAG_TC (0x00000040U) /!< UART transmission complete /
<>	134:ad3be0349dc5	177	#define UART_FLAG_RXNE (0x00000020U) /!< UART read data register not empty /
<>	134:ad3be0349dc5	178	#define UART_FLAG_IDLE (0x00000010U) /!< UART idle flag /
<>	134:ad3be0349dc5	179	#define UART_FLAG_ORE (0x00000008U) /!< UART overrun error /
<>	134:ad3be0349dc5	180	#define UART_FLAG_NE (0x00000004U) /!< UART noise error /
<>	134:ad3be0349dc5	181	#define UART_FLAG_FE (0x00000002U) /!< UART frame error /
<>	134:ad3be0349dc5	182	#define UART_FLAG_PE (0x00000001U) /!< UART parity error /
bogdanm	85:024bf7f99721	183	/**
bogdanm	85:024bf7f99721	184	* @}
bogdanm	85:024bf7f99721	185	*/
bogdanm	85:024bf7f99721	186
bogdanm	92:4fc01daae5a5	187	/** @defgroup UART_Interrupt_definition UARTEx Interrupts Definition
<>	134:ad3be0349dc5	188	* Elements values convention: 000ZZZZZ0XXYYYYYb
bogdanm	85:024bf7f99721	189	* - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm	85:024bf7f99721	190	* - XX : Interrupt source register (2bits)
bogdanm	85:024bf7f99721	191	* - 01: CR1 register
bogdanm	85:024bf7f99721	192	* - 10: CR2 register
bogdanm	85:024bf7f99721	193	* - 11: CR3 register
Kojto	93:e188a91d3eaa	194	* - ZZZZZ : Flag position in the ISR register(5bits)
<>	134:ad3be0349dc5	195	* @{
<>	134:ad3be0349dc5	196	*/
<>	134:ad3be0349dc5	197	#define UART_IT_PE (0x0028U) /!< UART parity error interruption /
<>	134:ad3be0349dc5	198	#define UART_IT_TXE (0x0727U) /!< UART transmit data register empty interruption /
<>	134:ad3be0349dc5	199	#define UART_IT_TC (0x0626U) /!< UART transmission complete interruption /
<>	134:ad3be0349dc5	200	#define UART_IT_RXNE (0x0525U) /!< UART read data register not empty interruption /
<>	134:ad3be0349dc5	201	#define UART_IT_IDLE (0x0424U) /!< UART idle interruption /
Kojto	93:e188a91d3eaa	202	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<>	134:ad3be0349dc5	203	#define UART_IT_LBD (0x0846U) /!< UART LIN break detection interruption /
Kojto	93:e188a91d3eaa	204	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<>	134:ad3be0349dc5	205	#define UART_IT_CTS (0x096AU) /!< UART CTS interruption /
<>	134:ad3be0349dc5	206	#define UART_IT_CM (0x112EU) /!< UART character match interruption /
Kojto	93:e188a91d3eaa	207	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<>	134:ad3be0349dc5	208	#define UART_IT_WUF (0x1476U) /!< UART wake-up from stop mode interruption /
Kojto	93:e188a91d3eaa	209	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	85:024bf7f99721	210	/**
bogdanm	85:024bf7f99721	211	* @}
bogdanm	85:024bf7f99721	212	*/
bogdanm	85:024bf7f99721	213
bogdanm	85:024bf7f99721	214
bogdanm	92:4fc01daae5a5	215	/** @defgroup UART_IT_CLEAR_Flags UARTEx Interruption Clear Flags
bogdanm	85:024bf7f99721	216	* @{
bogdanm	85:024bf7f99721	217	*/
<>	134:ad3be0349dc5	218	#define UART_CLEAR_PEF USART_ICR_PECF /!< Parity Error Clear Flag /
<>	134:ad3be0349dc5	219	#define UART_CLEAR_FEF USART_ICR_FECF /!< Framing Error Clear Flag /
<>	134:ad3be0349dc5	220	#define UART_CLEAR_NEF USART_ICR_NCF /!< Noise detected Clear Flag /
<>	134:ad3be0349dc5	221	#define UART_CLEAR_OREF USART_ICR_ORECF /!< Overrun Error Clear Flag /
<>	134:ad3be0349dc5	222	#define UART_CLEAR_IDLEF USART_ICR_IDLECF /!< IDLE line detected Clear Flag /
<>	134:ad3be0349dc5	223	#define UART_CLEAR_TCF USART_ICR_TCCF /!< Transmission Complete Clear Flag /
Kojto	93:e188a91d3eaa	224	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	85:024bf7f99721	225	#define UART_CLEAR_LBDF USART_ICR_LBDCF /!< LIN Break Detection Clear Flag (not available on F030xx devices)/
Kojto	93:e188a91d3eaa	226	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<>	134:ad3be0349dc5	227	#define UART_CLEAR_CTSF USART_ICR_CTSCF /!< CTS Interrupt Clear Flag /
<>	134:ad3be0349dc5	228	#define UART_CLEAR_RTOF USART_ICR_RTOCF /!< Receiver Time Out Clear Flag /
Kojto	108:34e6b704fe68	229	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<>	134:ad3be0349dc5	230	#define UART_CLEAR_EOBF USART_ICR_EOBCF /!< End Of Block Clear Flag /
Kojto	108:34e6b704fe68	231	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<>	134:ad3be0349dc5	232	#define UART_CLEAR_CMF USART_ICR_CMCF /!< Character Match Clear Flag /
Kojto	93:e188a91d3eaa	233	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	85:024bf7f99721	234	#define UART_CLEAR_WUF USART_ICR_WUCF /!< Wake Up from stop mode Clear Flag /
Kojto	93:e188a91d3eaa	235	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	85:024bf7f99721	236	/**
bogdanm	85:024bf7f99721	237	* @}
<>	134:ad3be0349dc5	238	*/
bogdanm	85:024bf7f99721	239
bogdanm	92:4fc01daae5a5	240	/** @defgroup UART_Request_Parameters UARTEx Request Parameters
bogdanm	85:024bf7f99721	241	* @{
bogdanm	85:024bf7f99721	242	*/
<>	134:ad3be0349dc5	243	#define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /!< Auto-Baud Rate Request /
<>	134:ad3be0349dc5	244	#define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /!< Send Break Request /
<>	134:ad3be0349dc5	245	#define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /!< Mute Mode Request /
<>	134:ad3be0349dc5	246	#define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /!< Receive Data flush Request /
Kojto	108:34e6b704fe68	247	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<>	134:ad3be0349dc5	248	#define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /!< Transmit data flush Request /
bogdanm	85:024bf7f99721	249	#else
Kojto	108:34e6b704fe68	250	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	85:024bf7f99721	251	/**
bogdanm	85:024bf7f99721	252	* @}
bogdanm	85:024bf7f99721	253	*/
Kojto	108:34e6b704fe68	254
Kojto	93:e188a91d3eaa	255	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	92:4fc01daae5a5	256	/** @defgroup UART_Stop_Mode_Enable UARTEx Advanced Feature Stop Mode Enable
bogdanm	85:024bf7f99721	257	* @{
bogdanm	85:024bf7f99721	258	*/
<>	134:ad3be0349dc5	259	#define UART_ADVFEATURE_STOPMODE_DISABLE (0x00000000U) /!< UART stop mode disable /
Kojto	108:34e6b704fe68	260	#define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM) /!< UART stop mode enable /
bogdanm	85:024bf7f99721	261	/**
bogdanm	85:024bf7f99721	262	* @}
<>	134:ad3be0349dc5	263	*/
Kojto	108:34e6b704fe68	264
bogdanm	85:024bf7f99721	265	/** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
bogdanm	85:024bf7f99721	266	* @{
bogdanm	85:024bf7f99721	267	*/
<>	134:ad3be0349dc5	268	#define UART_WAKEUP_ON_ADDRESS (0x00000000U) /!< UART wake-up on address /
Kojto	108:34e6b704fe68	269	#define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1) /!< UART wake-up on start bit /
Kojto	108:34e6b704fe68	270	#define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS) /!< UART wake-up on receive data register not empty /
bogdanm	85:024bf7f99721	271	/**
bogdanm	85:024bf7f99721	272	* @}
Kojto	108:34e6b704fe68	273	*/
Kojto	93:e188a91d3eaa	274	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
Kojto	108:34e6b704fe68	275
bogdanm	85:024bf7f99721	276	/**
bogdanm	85:024bf7f99721	277	* @}
Kojto	108:34e6b704fe68	278	*/
bogdanm	85:024bf7f99721	279
Kojto	108:34e6b704fe68	280	/* Exported macros ------------------------------------------------------------*/
bogdanm	92:4fc01daae5a5	281	/** @defgroup UARTEx_Exported_Macros UARTEx Exported Macros
bogdanm	85:024bf7f99721	282	* @{
bogdanm	85:024bf7f99721	283	*/
bogdanm	85:024bf7f99721	284
Kojto	108:34e6b704fe68	285	/** @brief Flush the UART Data registers.
Kojto	108:34e6b704fe68	286	* @param __HANDLE__: specifies the UART Handle.
<>	134:ad3be0349dc5	287	* @retval None
Kojto	108:34e6b704fe68	288	*/
Kojto	108:34e6b704fe68	289	#if !defined(STM32F030x6) && !defined(STM32F030x8)
Kojto	108:34e6b704fe68	290	#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
Kojto	108:34e6b704fe68	291	do{ \
Kojto	108:34e6b704fe68	292	SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
Kojto	108:34e6b704fe68	293	SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
Kojto	108:34e6b704fe68	294	} while(0)
Kojto	108:34e6b704fe68	295	#else
Kojto	108:34e6b704fe68	296	#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
Kojto	108:34e6b704fe68	297	do{ \
Kojto	108:34e6b704fe68	298	SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
Kojto	108:34e6b704fe68	299	} while(0)
Kojto	108:34e6b704fe68	300	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */
Kojto	108:34e6b704fe68	301
Kojto	108:34e6b704fe68	302	/**
Kojto	108:34e6b704fe68	303	* @}
Kojto	108:34e6b704fe68	304	*/
Kojto	108:34e6b704fe68	305
Kojto	108:34e6b704fe68	306	/* Private macros ------------------------------------------------------------*/
Kojto	108:34e6b704fe68	307	/** @defgroup UARTEx_Private_Macros UARTEx Private Macros
Kojto	108:34e6b704fe68	308	* @{
Kojto	108:34e6b704fe68	309	*/
Kojto	108:34e6b704fe68	310
Kojto	108:34e6b704fe68	311	/** @brief Report the UART clock source.
Kojto	108:34e6b704fe68	312	* @param __HANDLE__: specifies the UART Handle.
Kojto	108:34e6b704fe68	313	* @param __CLOCKSOURCE__: output variable.
bogdanm	85:024bf7f99721	314	* @retval UART clocking source, written in __CLOCKSOURCE__.
bogdanm	85:024bf7f99721	315	*/
bogdanm	85:024bf7f99721	316	#if defined(STM32F030x6) \|\| defined(STM32F031x6) \|\| defined(STM32F038xx)
Kojto	108:34e6b704fe68	317	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm	85:024bf7f99721	318	do { \
bogdanm	85:024bf7f99721	319	switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm	85:024bf7f99721	320	{ \
bogdanm	85:024bf7f99721	321	case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm	85:024bf7f99721	322	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	85:024bf7f99721	323	break; \
bogdanm	85:024bf7f99721	324	case RCC_USART1CLKSOURCE_HSI: \
bogdanm	85:024bf7f99721	325	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	85:024bf7f99721	326	break; \
bogdanm	85:024bf7f99721	327	case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm	85:024bf7f99721	328	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	85:024bf7f99721	329	break; \
bogdanm	85:024bf7f99721	330	case RCC_USART1CLKSOURCE_LSE: \
bogdanm	85:024bf7f99721	331	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	85:024bf7f99721	332	break; \
bogdanm	85:024bf7f99721	333	default: \
bogdanm	85:024bf7f99721	334	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	85:024bf7f99721	335	break; \
bogdanm	85:024bf7f99721	336	} \
bogdanm	85:024bf7f99721	337	} while(0)
Kojto	93:e188a91d3eaa	338	#elif defined (STM32F030x8) \|\| defined (STM32F070x6) \|\| \
bogdanm	85:024bf7f99721	339	defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| \
bogdanm	85:024bf7f99721	340	defined (STM32F051x8) \|\| defined (STM32F058xx)
Kojto	108:34e6b704fe68	341	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm	85:024bf7f99721	342	do { \
bogdanm	85:024bf7f99721	343	if((__HANDLE__)->Instance == USART1) \
bogdanm	85:024bf7f99721	344	{ \
bogdanm	85:024bf7f99721	345	switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm	85:024bf7f99721	346	{ \
bogdanm	85:024bf7f99721	347	case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm	85:024bf7f99721	348	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	85:024bf7f99721	349	break; \
bogdanm	85:024bf7f99721	350	case RCC_USART1CLKSOURCE_HSI: \
bogdanm	85:024bf7f99721	351	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	85:024bf7f99721	352	break; \
bogdanm	85:024bf7f99721	353	case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm	85:024bf7f99721	354	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	85:024bf7f99721	355	break; \
bogdanm	85:024bf7f99721	356	case RCC_USART1CLKSOURCE_LSE: \
bogdanm	85:024bf7f99721	357	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	85:024bf7f99721	358	break; \
bogdanm	85:024bf7f99721	359	default: \
bogdanm	85:024bf7f99721	360	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	85:024bf7f99721	361	break; \
bogdanm	85:024bf7f99721	362	} \
bogdanm	85:024bf7f99721	363	} \
bogdanm	85:024bf7f99721	364	else if((__HANDLE__)->Instance == USART2) \
bogdanm	85:024bf7f99721	365	{ \
bogdanm	85:024bf7f99721	366	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	85:024bf7f99721	367	} \
bogdanm	85:024bf7f99721	368	else \
bogdanm	85:024bf7f99721	369	{ \
bogdanm	85:024bf7f99721	370	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	85:024bf7f99721	371	} \
bogdanm	85:024bf7f99721	372	} while(0)
Kojto	93:e188a91d3eaa	373	#elif defined(STM32F070xB)
Kojto	108:34e6b704fe68	374	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
Kojto	93:e188a91d3eaa	375	do { \
Kojto	93:e188a91d3eaa	376	if((__HANDLE__)->Instance == USART1) \
Kojto	93:e188a91d3eaa	377	{ \
Kojto	93:e188a91d3eaa	378	switch(__HAL_RCC_GET_USART1_SOURCE()) \
Kojto	93:e188a91d3eaa	379	{ \
Kojto	93:e188a91d3eaa	380	case RCC_USART1CLKSOURCE_PCLK1: \
Kojto	93:e188a91d3eaa	381	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto	93:e188a91d3eaa	382	break; \
Kojto	93:e188a91d3eaa	383	case RCC_USART1CLKSOURCE_HSI: \
Kojto	93:e188a91d3eaa	384	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
Kojto	93:e188a91d3eaa	385	break; \
Kojto	93:e188a91d3eaa	386	case RCC_USART1CLKSOURCE_SYSCLK: \
Kojto	93:e188a91d3eaa	387	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
Kojto	93:e188a91d3eaa	388	break; \
Kojto	93:e188a91d3eaa	389	case RCC_USART1CLKSOURCE_LSE: \
Kojto	93:e188a91d3eaa	390	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
Kojto	93:e188a91d3eaa	391	break; \
Kojto	93:e188a91d3eaa	392	default: \
Kojto	93:e188a91d3eaa	393	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
Kojto	93:e188a91d3eaa	394	break; \
Kojto	93:e188a91d3eaa	395	} \
Kojto	93:e188a91d3eaa	396	} \
Kojto	93:e188a91d3eaa	397	else if((__HANDLE__)->Instance == USART2) \
Kojto	93:e188a91d3eaa	398	{ \
Kojto	93:e188a91d3eaa	399	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto	93:e188a91d3eaa	400	} \
Kojto	93:e188a91d3eaa	401	else if((__HANDLE__)->Instance == USART3) \
Kojto	93:e188a91d3eaa	402	{ \
Kojto	93:e188a91d3eaa	403	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto	93:e188a91d3eaa	404	} \
Kojto	93:e188a91d3eaa	405	else if((__HANDLE__)->Instance == USART4) \
Kojto	93:e188a91d3eaa	406	{ \
Kojto	93:e188a91d3eaa	407	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto	93:e188a91d3eaa	408	} \
Kojto	93:e188a91d3eaa	409	else \
Kojto	93:e188a91d3eaa	410	{ \
Kojto	93:e188a91d3eaa	411	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
Kojto	93:e188a91d3eaa	412	} \
Kojto	93:e188a91d3eaa	413	} while(0)
bogdanm	85:024bf7f99721	414	#elif defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
Kojto	108:34e6b704fe68	415	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm	85:024bf7f99721	416	do { \
bogdanm	85:024bf7f99721	417	if((__HANDLE__)->Instance == USART1) \
bogdanm	85:024bf7f99721	418	{ \
bogdanm	85:024bf7f99721	419	switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm	85:024bf7f99721	420	{ \
bogdanm	85:024bf7f99721	421	case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm	85:024bf7f99721	422	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	85:024bf7f99721	423	break; \
bogdanm	85:024bf7f99721	424	case RCC_USART1CLKSOURCE_HSI: \
bogdanm	85:024bf7f99721	425	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	85:024bf7f99721	426	break; \
bogdanm	85:024bf7f99721	427	case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm	85:024bf7f99721	428	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	85:024bf7f99721	429	break; \
bogdanm	85:024bf7f99721	430	case RCC_USART1CLKSOURCE_LSE: \
bogdanm	85:024bf7f99721	431	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	85:024bf7f99721	432	break; \
bogdanm	85:024bf7f99721	433	default: \
bogdanm	85:024bf7f99721	434	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	85:024bf7f99721	435	break; \
bogdanm	85:024bf7f99721	436	} \
bogdanm	85:024bf7f99721	437	} \
bogdanm	85:024bf7f99721	438	else if((__HANDLE__)->Instance == USART2) \
bogdanm	85:024bf7f99721	439	{ \
bogdanm	85:024bf7f99721	440	switch(__HAL_RCC_GET_USART2_SOURCE()) \
bogdanm	85:024bf7f99721	441	{ \
bogdanm	85:024bf7f99721	442	case RCC_USART2CLKSOURCE_PCLK1: \
bogdanm	85:024bf7f99721	443	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	85:024bf7f99721	444	break; \
bogdanm	85:024bf7f99721	445	case RCC_USART2CLKSOURCE_HSI: \
bogdanm	85:024bf7f99721	446	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	85:024bf7f99721	447	break; \
bogdanm	85:024bf7f99721	448	case RCC_USART2CLKSOURCE_SYSCLK: \
bogdanm	85:024bf7f99721	449	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	85:024bf7f99721	450	break; \
bogdanm	85:024bf7f99721	451	case RCC_USART2CLKSOURCE_LSE: \
bogdanm	85:024bf7f99721	452	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	85:024bf7f99721	453	break; \
bogdanm	85:024bf7f99721	454	default: \
bogdanm	85:024bf7f99721	455	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	85:024bf7f99721	456	break; \
bogdanm	85:024bf7f99721	457	} \
bogdanm	85:024bf7f99721	458	} \
bogdanm	85:024bf7f99721	459	else if((__HANDLE__)->Instance == USART3) \
bogdanm	85:024bf7f99721	460	{ \
bogdanm	85:024bf7f99721	461	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	85:024bf7f99721	462	} \
bogdanm	85:024bf7f99721	463	else if((__HANDLE__)->Instance == USART4) \
bogdanm	85:024bf7f99721	464	{ \
bogdanm	85:024bf7f99721	465	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	85:024bf7f99721	466	} \
bogdanm	85:024bf7f99721	467	else \
bogdanm	85:024bf7f99721	468	{ \
bogdanm	85:024bf7f99721	469	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	85:024bf7f99721	470	} \
bogdanm	85:024bf7f99721	471	} while(0)
bogdanm	92:4fc01daae5a5	472	#elif defined(STM32F091xC) \|\| defined (STM32F098xx)
Kojto	108:34e6b704fe68	473	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm	92:4fc01daae5a5	474	do { \
bogdanm	92:4fc01daae5a5	475	if((__HANDLE__)->Instance == USART1) \
bogdanm	92:4fc01daae5a5	476	{ \
bogdanm	92:4fc01daae5a5	477	switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm	92:4fc01daae5a5	478	{ \
bogdanm	92:4fc01daae5a5	479	case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm	92:4fc01daae5a5	480	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	92:4fc01daae5a5	481	break; \
bogdanm	92:4fc01daae5a5	482	case RCC_USART1CLKSOURCE_HSI: \
bogdanm	92:4fc01daae5a5	483	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	92:4fc01daae5a5	484	break; \
bogdanm	92:4fc01daae5a5	485	case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm	92:4fc01daae5a5	486	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	92:4fc01daae5a5	487	break; \
bogdanm	92:4fc01daae5a5	488	case RCC_USART1CLKSOURCE_LSE: \
bogdanm	92:4fc01daae5a5	489	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	92:4fc01daae5a5	490	break; \
bogdanm	92:4fc01daae5a5	491	default: \
bogdanm	92:4fc01daae5a5	492	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	92:4fc01daae5a5	493	break; \
bogdanm	92:4fc01daae5a5	494	} \
bogdanm	92:4fc01daae5a5	495	} \
bogdanm	92:4fc01daae5a5	496	else if((__HANDLE__)->Instance == USART2) \
bogdanm	92:4fc01daae5a5	497	{ \
bogdanm	92:4fc01daae5a5	498	switch(__HAL_RCC_GET_USART2_SOURCE()) \
bogdanm	92:4fc01daae5a5	499	{ \
bogdanm	92:4fc01daae5a5	500	case RCC_USART2CLKSOURCE_PCLK1: \
bogdanm	92:4fc01daae5a5	501	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	92:4fc01daae5a5	502	break; \
bogdanm	92:4fc01daae5a5	503	case RCC_USART2CLKSOURCE_HSI: \
bogdanm	92:4fc01daae5a5	504	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	92:4fc01daae5a5	505	break; \
bogdanm	92:4fc01daae5a5	506	case RCC_USART2CLKSOURCE_SYSCLK: \
bogdanm	92:4fc01daae5a5	507	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	92:4fc01daae5a5	508	break; \
bogdanm	92:4fc01daae5a5	509	case RCC_USART2CLKSOURCE_LSE: \
bogdanm	92:4fc01daae5a5	510	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	92:4fc01daae5a5	511	break; \
bogdanm	92:4fc01daae5a5	512	default: \
bogdanm	92:4fc01daae5a5	513	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	92:4fc01daae5a5	514	break; \
bogdanm	92:4fc01daae5a5	515	} \
bogdanm	92:4fc01daae5a5	516	} \
bogdanm	92:4fc01daae5a5	517	else if((__HANDLE__)->Instance == USART3) \
bogdanm	92:4fc01daae5a5	518	{ \
bogdanm	92:4fc01daae5a5	519	switch(__HAL_RCC_GET_USART3_SOURCE()) \
bogdanm	92:4fc01daae5a5	520	{ \
bogdanm	92:4fc01daae5a5	521	case RCC_USART3CLKSOURCE_PCLK1: \
bogdanm	92:4fc01daae5a5	522	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	92:4fc01daae5a5	523	break; \
bogdanm	92:4fc01daae5a5	524	case RCC_USART3CLKSOURCE_HSI: \
bogdanm	92:4fc01daae5a5	525	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	92:4fc01daae5a5	526	break; \
bogdanm	92:4fc01daae5a5	527	case RCC_USART3CLKSOURCE_SYSCLK: \
bogdanm	92:4fc01daae5a5	528	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	92:4fc01daae5a5	529	break; \
bogdanm	92:4fc01daae5a5	530	case RCC_USART3CLKSOURCE_LSE: \
bogdanm	92:4fc01daae5a5	531	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	92:4fc01daae5a5	532	break; \
bogdanm	92:4fc01daae5a5	533	default: \
bogdanm	92:4fc01daae5a5	534	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	92:4fc01daae5a5	535	break; \
bogdanm	92:4fc01daae5a5	536	} \
bogdanm	92:4fc01daae5a5	537	} \
bogdanm	92:4fc01daae5a5	538	else if((__HANDLE__)->Instance == USART4) \
bogdanm	92:4fc01daae5a5	539	{ \
bogdanm	92:4fc01daae5a5	540	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	92:4fc01daae5a5	541	} \
bogdanm	92:4fc01daae5a5	542	else if((__HANDLE__)->Instance == USART5) \
bogdanm	92:4fc01daae5a5	543	{ \
bogdanm	92:4fc01daae5a5	544	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	92:4fc01daae5a5	545	} \
bogdanm	92:4fc01daae5a5	546	else if((__HANDLE__)->Instance == USART6) \
bogdanm	92:4fc01daae5a5	547	{ \
bogdanm	92:4fc01daae5a5	548	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	92:4fc01daae5a5	549	} \
bogdanm	92:4fc01daae5a5	550	else if((__HANDLE__)->Instance == USART7) \
bogdanm	92:4fc01daae5a5	551	{ \
bogdanm	92:4fc01daae5a5	552	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	92:4fc01daae5a5	553	} \
bogdanm	92:4fc01daae5a5	554	else if((__HANDLE__)->Instance == USART8) \
bogdanm	92:4fc01daae5a5	555	{ \
bogdanm	92:4fc01daae5a5	556	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	92:4fc01daae5a5	557	} \
bogdanm	92:4fc01daae5a5	558	else \
bogdanm	92:4fc01daae5a5	559	{ \
bogdanm	92:4fc01daae5a5	560	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	92:4fc01daae5a5	561	} \
bogdanm	92:4fc01daae5a5	562	} while(0)
Kojto	93:e188a91d3eaa	563	#elif defined(STM32F030xC)
Kojto	108:34e6b704fe68	564	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
Kojto	93:e188a91d3eaa	565	do { \
Kojto	93:e188a91d3eaa	566	if((__HANDLE__)->Instance == USART1) \
Kojto	93:e188a91d3eaa	567	{ \
Kojto	93:e188a91d3eaa	568	switch(__HAL_RCC_GET_USART1_SOURCE()) \
Kojto	93:e188a91d3eaa	569	{ \
Kojto	93:e188a91d3eaa	570	case RCC_USART1CLKSOURCE_PCLK1: \
Kojto	93:e188a91d3eaa	571	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto	93:e188a91d3eaa	572	break; \
Kojto	93:e188a91d3eaa	573	case RCC_USART1CLKSOURCE_HSI: \
Kojto	93:e188a91d3eaa	574	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
Kojto	93:e188a91d3eaa	575	break; \
Kojto	93:e188a91d3eaa	576	case RCC_USART1CLKSOURCE_SYSCLK: \
Kojto	93:e188a91d3eaa	577	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
Kojto	93:e188a91d3eaa	578	break; \
Kojto	93:e188a91d3eaa	579	case RCC_USART1CLKSOURCE_LSE: \
Kojto	93:e188a91d3eaa	580	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
Kojto	93:e188a91d3eaa	581	break; \
Kojto	93:e188a91d3eaa	582	default: \
Kojto	93:e188a91d3eaa	583	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
Kojto	93:e188a91d3eaa	584	break; \
Kojto	93:e188a91d3eaa	585	} \
Kojto	93:e188a91d3eaa	586	} \
Kojto	93:e188a91d3eaa	587	else if((__HANDLE__)->Instance == USART2) \
Kojto	93:e188a91d3eaa	588	{ \
Kojto	93:e188a91d3eaa	589	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto	93:e188a91d3eaa	590	} \
Kojto	93:e188a91d3eaa	591	else if((__HANDLE__)->Instance == USART3) \
Kojto	93:e188a91d3eaa	592	{ \
Kojto	93:e188a91d3eaa	593	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto	93:e188a91d3eaa	594	} \
Kojto	93:e188a91d3eaa	595	else if((__HANDLE__)->Instance == USART4) \
Kojto	93:e188a91d3eaa	596	{ \
Kojto	93:e188a91d3eaa	597	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto	93:e188a91d3eaa	598	} \
Kojto	93:e188a91d3eaa	599	else if((__HANDLE__)->Instance == USART5) \
Kojto	93:e188a91d3eaa	600	{ \
Kojto	93:e188a91d3eaa	601	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto	93:e188a91d3eaa	602	} \
Kojto	93:e188a91d3eaa	603	else if((__HANDLE__)->Instance == USART6) \
Kojto	93:e188a91d3eaa	604	{ \
Kojto	93:e188a91d3eaa	605	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto	93:e188a91d3eaa	606	} \
Kojto	93:e188a91d3eaa	607	else \
Kojto	93:e188a91d3eaa	608	{ \
Kojto	93:e188a91d3eaa	609	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
Kojto	93:e188a91d3eaa	610	} \
Kojto	93:e188a91d3eaa	611	} while(0)
bogdanm	92:4fc01daae5a5	612
bogdanm	85:024bf7f99721	613	#endif /* defined(STM32F030x6) \|\| defined(STM32F031x6) \|\| defined(STM32F038xx) */
bogdanm	85:024bf7f99721	614
bogdanm	85:024bf7f99721	615
Kojto	108:34e6b704fe68	616	/** @brief Compute the UART mask to apply to retrieve the received data
bogdanm	85:024bf7f99721	617	* according to the word length and to the parity bits activation.
Kojto	108:34e6b704fe68	618	* @note If PCE = 1, the parity bit is not included in the data extracted
bogdanm	85:024bf7f99721	619	* by the reception API().
bogdanm	85:024bf7f99721	620	* This masking operation is not carried out in the case of
Kojto	108:34e6b704fe68	621	* DMA transfers.
Kojto	108:34e6b704fe68	622	* @param __HANDLE__: specifies the UART Handle.
Kojto	108:34e6b704fe68	623	* @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.
Kojto	108:34e6b704fe68	624	*/
Kojto	93:e188a91d3eaa	625	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
Kojto	93:e188a91d3eaa	626	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
Kojto	93:e188a91d3eaa	627	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
Kojto	108:34e6b704fe68	628	#define UART_MASK_COMPUTATION(__HANDLE__) \
bogdanm	85:024bf7f99721	629	do { \
bogdanm	85:024bf7f99721	630	if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
bogdanm	85:024bf7f99721	631	{ \
bogdanm	85:024bf7f99721	632	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm	85:024bf7f99721	633	{ \
<>	134:ad3be0349dc5	634	(__HANDLE__)->Mask = 0x01FFU; \
bogdanm	85:024bf7f99721	635	} \
bogdanm	85:024bf7f99721	636	else \
bogdanm	85:024bf7f99721	637	{ \
<>	134:ad3be0349dc5	638	(__HANDLE__)->Mask = 0x00FFU; \
bogdanm	85:024bf7f99721	639	} \
bogdanm	85:024bf7f99721	640	} \
bogdanm	85:024bf7f99721	641	else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
bogdanm	85:024bf7f99721	642	{ \
bogdanm	85:024bf7f99721	643	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm	85:024bf7f99721	644	{ \
<>	134:ad3be0349dc5	645	(__HANDLE__)->Mask = 0x00FFU; \
bogdanm	85:024bf7f99721	646	} \
bogdanm	85:024bf7f99721	647	else \
bogdanm	85:024bf7f99721	648	{ \
<>	134:ad3be0349dc5	649	(__HANDLE__)->Mask = 0x007FU; \
bogdanm	85:024bf7f99721	650	} \
bogdanm	85:024bf7f99721	651	} \
bogdanm	85:024bf7f99721	652	else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
bogdanm	85:024bf7f99721	653	{ \
bogdanm	85:024bf7f99721	654	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm	85:024bf7f99721	655	{ \
<>	134:ad3be0349dc5	656	(__HANDLE__)->Mask = 0x007FU; \
bogdanm	85:024bf7f99721	657	} \
bogdanm	85:024bf7f99721	658	else \
bogdanm	85:024bf7f99721	659	{ \
<>	134:ad3be0349dc5	660	(__HANDLE__)->Mask = 0x003FU; \
bogdanm	85:024bf7f99721	661	} \
bogdanm	85:024bf7f99721	662	} \
Kojto	108:34e6b704fe68	663	} while(0)
bogdanm	85:024bf7f99721	664	#else
Kojto	108:34e6b704fe68	665	#define UART_MASK_COMPUTATION(__HANDLE__) \
bogdanm	85:024bf7f99721	666	do { \
bogdanm	85:024bf7f99721	667	if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
bogdanm	85:024bf7f99721	668	{ \
bogdanm	85:024bf7f99721	669	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm	85:024bf7f99721	670	{ \
<>	134:ad3be0349dc5	671	(__HANDLE__)->Mask = 0x01FFU; \
bogdanm	85:024bf7f99721	672	} \
bogdanm	85:024bf7f99721	673	else \
bogdanm	85:024bf7f99721	674	{ \
<>	134:ad3be0349dc5	675	(__HANDLE__)->Mask = 0x00FFU; \
bogdanm	85:024bf7f99721	676	} \
bogdanm	85:024bf7f99721	677	} \
bogdanm	85:024bf7f99721	678	else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
bogdanm	85:024bf7f99721	679	{ \
bogdanm	85:024bf7f99721	680	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm	85:024bf7f99721	681	{ \
<>	134:ad3be0349dc5	682	(__HANDLE__)->Mask = 0x00FFU; \
bogdanm	85:024bf7f99721	683	} \
bogdanm	85:024bf7f99721	684	else \
bogdanm	85:024bf7f99721	685	{ \
<>	134:ad3be0349dc5	686	(__HANDLE__)->Mask = 0x007FU; \
bogdanm	85:024bf7f99721	687	} \
bogdanm	85:024bf7f99721	688	} \
bogdanm	85:024bf7f99721	689	} while(0)
Kojto	93:e188a91d3eaa	690	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
Kojto	93:e188a91d3eaa	691	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
Kojto	93:e188a91d3eaa	692	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
Kojto	108:34e6b704fe68	693
Kojto	108:34e6b704fe68	694	/**
Kojto	108:34e6b704fe68	695	* @brief Ensure that UART frame length is valid.
Kojto	108:34e6b704fe68	696	* @param __LENGTH__: UART frame length.
Kojto	108:34e6b704fe68	697	* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
Kojto	108:34e6b704fe68	698	*/
Kojto	108:34e6b704fe68	699	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
Kojto	108:34e6b704fe68	700	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
Kojto	108:34e6b704fe68	701	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
Kojto	108:34e6b704fe68	702	#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) \|\| \
Kojto	108:34e6b704fe68	703	((__LENGTH__) == UART_WORDLENGTH_8B) \|\| \
Kojto	108:34e6b704fe68	704	((__LENGTH__) == UART_WORDLENGTH_9B))
Kojto	108:34e6b704fe68	705	#else
Kojto	108:34e6b704fe68	706	#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_8B) \|\| \
Kojto	108:34e6b704fe68	707	((__LENGTH__) == UART_WORDLENGTH_9B))
Kojto	108:34e6b704fe68	708	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
Kojto	108:34e6b704fe68	709	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
Kojto	108:34e6b704fe68	710	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
Kojto	108:34e6b704fe68	711
Kojto	108:34e6b704fe68	712	/**
Kojto	108:34e6b704fe68	713	* @brief Ensure that UART auto Baud rate detection mode is valid.
Kojto	108:34e6b704fe68	714	* @param __MODE__: UART auto Baud rate detection mode.
Kojto	108:34e6b704fe68	715	* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
Kojto	108:34e6b704fe68	716	*/
Kojto	108:34e6b704fe68	717	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
Kojto	108:34e6b704fe68	718	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
Kojto	108:34e6b704fe68	719	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
Kojto	108:34e6b704fe68	720	#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) \|\| \
Kojto	108:34e6b704fe68	721	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) \|\| \
Kojto	108:34e6b704fe68	722	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) \|\| \
Kojto	108:34e6b704fe68	723	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
Kojto	108:34e6b704fe68	724	#else
Kojto	108:34e6b704fe68	725	#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) \|\| \
Kojto	108:34e6b704fe68	726	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE))
Kojto	108:34e6b704fe68	727	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
Kojto	108:34e6b704fe68	728	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
Kojto	108:34e6b704fe68	729	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
Kojto	108:34e6b704fe68	730
Kojto	108:34e6b704fe68	731
Kojto	108:34e6b704fe68	732	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
Kojto	108:34e6b704fe68	733	/**
Kojto	108:34e6b704fe68	734	* @brief Ensure that UART LIN state is valid.
Kojto	108:34e6b704fe68	735	* @param __LIN__: UART LIN state.
Kojto	108:34e6b704fe68	736	* @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
Kojto	108:34e6b704fe68	737	*/
Kojto	108:34e6b704fe68	738	#define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) \|\| \
Kojto	108:34e6b704fe68	739	((__LIN__) == UART_LIN_ENABLE))
Kojto	108:34e6b704fe68	740
Kojto	108:34e6b704fe68	741	/**
Kojto	108:34e6b704fe68	742	* @brief Ensure that UART LIN break detection length is valid.
Kojto	108:34e6b704fe68	743	* @param __LENGTH__: UART LIN break detection length.
Kojto	108:34e6b704fe68	744	* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
Kojto	108:34e6b704fe68	745	*/
Kojto	108:34e6b704fe68	746	#define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) \|\| \
Kojto	108:34e6b704fe68	747	((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
Kojto	108:34e6b704fe68	748	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
Kojto	108:34e6b704fe68	749
Kojto	108:34e6b704fe68	750	/**
Kojto	108:34e6b704fe68	751	* @brief Ensure that UART request parameter is valid.
Kojto	108:34e6b704fe68	752	* @param __PARAM__: UART request parameter.
Kojto	108:34e6b704fe68	753	* @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
Kojto	108:34e6b704fe68	754	*/
Kojto	108:34e6b704fe68	755	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
Kojto	108:34e6b704fe68	756	#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) \|\| \
Kojto	108:34e6b704fe68	757	((__PARAM__) == UART_SENDBREAK_REQUEST) \|\| \
Kojto	108:34e6b704fe68	758	((__PARAM__) == UART_MUTE_MODE_REQUEST) \|\| \
Kojto	108:34e6b704fe68	759	((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) \|\| \
Kojto	108:34e6b704fe68	760	((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
Kojto	108:34e6b704fe68	761	#else
Kojto	108:34e6b704fe68	762	#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) \|\| \
Kojto	108:34e6b704fe68	763	((__PARAM__) == UART_SENDBREAK_REQUEST) \|\| \
Kojto	108:34e6b704fe68	764	((__PARAM__) == UART_MUTE_MODE_REQUEST) \|\| \
Kojto	108:34e6b704fe68	765	((__PARAM__) == UART_RXDATA_FLUSH_REQUEST))
Kojto	108:34e6b704fe68	766	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
Kojto	108:34e6b704fe68	767
Kojto	108:34e6b704fe68	768	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
Kojto	108:34e6b704fe68	769	/**
Kojto	108:34e6b704fe68	770	* @brief Ensure that UART stop mode state is valid.
Kojto	108:34e6b704fe68	771	* @param __STOPMODE__: UART stop mode state.
Kojto	108:34e6b704fe68	772	* @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
Kojto	108:34e6b704fe68	773	*/
Kojto	108:34e6b704fe68	774	#define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) \|\| \
Kojto	108:34e6b704fe68	775	((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
<>	134:ad3be0349dc5	776
Kojto	108:34e6b704fe68	777	/**
Kojto	108:34e6b704fe68	778	* @brief Ensure that UART wake-up selection is valid.
Kojto	108:34e6b704fe68	779	* @param __WAKE__: UART wake-up selection.
Kojto	108:34e6b704fe68	780	* @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
Kojto	108:34e6b704fe68	781	*/
Kojto	108:34e6b704fe68	782	#define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) \|\| \
Kojto	108:34e6b704fe68	783	((__WAKE__) == UART_WAKEUP_ON_STARTBIT) \|\| \
Kojto	108:34e6b704fe68	784	((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
Kojto	108:34e6b704fe68	785	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
Kojto	108:34e6b704fe68	786
bogdanm	85:024bf7f99721	787	/**
bogdanm	85:024bf7f99721	788	* @}
bogdanm	85:024bf7f99721	789	*/
bogdanm	85:024bf7f99721	790
bogdanm	85:024bf7f99721	791	/* Exported functions --------------------------------------------------------*/
bogdanm	92:4fc01daae5a5	792	/** @addtogroup UARTEx_Exported_Functions
bogdanm	92:4fc01daae5a5	793	* @{
bogdanm	92:4fc01daae5a5	794	*/
bogdanm	92:4fc01daae5a5	795
bogdanm	92:4fc01daae5a5	796	/** @addtogroup UARTEx_Exported_Functions_Group1
bogdanm	92:4fc01daae5a5	797	* @brief Extended Initialization and Configuration Functions
bogdanm	92:4fc01daae5a5	798	* @{
bogdanm	92:4fc01daae5a5	799	*/
bogdanm	85:024bf7f99721	800	/* Initialization and de-initialization functions ****************************/
Kojto	122:f9eeca106725	801	HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime);
Kojto	93:e188a91d3eaa	802	#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
bogdanm	92:4fc01daae5a5	803	HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
Kojto	93:e188a91d3eaa	804	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
bogdanm	92:4fc01daae5a5	805	/**
bogdanm	92:4fc01daae5a5	806	* @}
bogdanm	92:4fc01daae5a5	807	*/
bogdanm	92:4fc01daae5a5	808
bogdanm	92:4fc01daae5a5	809	/** @addtogroup UARTEx_Exported_Functions_Group2
Kojto	93:e188a91d3eaa	810	* @brief Extended UART Interrupt handling function
bogdanm	92:4fc01daae5a5	811	* @{
bogdanm	92:4fc01daae5a5	812	*/
Kojto	108:34e6b704fe68	813
Kojto	93:e188a91d3eaa	814	/* IO operation functions ***************************************************/
Kojto	93:e188a91d3eaa	815	#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
Kojto	108:34e6b704fe68	816	void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
Kojto	93:e188a91d3eaa	817	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
bogdanm	92:4fc01daae5a5	818	/**
bogdanm	92:4fc01daae5a5	819	* @}
bogdanm	92:4fc01daae5a5	820	*/
bogdanm	92:4fc01daae5a5	821
bogdanm	92:4fc01daae5a5	822	/** @addtogroup UARTEx_Exported_Functions_Group3
bogdanm	92:4fc01daae5a5	823	* @brief Extended Peripheral Control functions
bogdanm	92:4fc01daae5a5	824	* @{
bogdanm	92:4fc01daae5a5	825	*/
bogdanm	92:4fc01daae5a5	826
bogdanm	85:024bf7f99721	827	/* Peripheral Control functions **********************************************/
bogdanm	85:024bf7f99721	828	HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
Kojto	93:e188a91d3eaa	829	#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6) && !defined(STM32F030xC)
Kojto	93:e188a91d3eaa	830	HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
Kojto	93:e188a91d3eaa	831	HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
Kojto	93:e188a91d3eaa	832	HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
bogdanm	85:024bf7f99721	833	HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
Kojto	93:e188a91d3eaa	834	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
bogdanm	92:4fc01daae5a5	835	/**
bogdanm	92:4fc01daae5a5	836	* @}
bogdanm	92:4fc01daae5a5	837	*/
bogdanm	85:024bf7f99721	838	/* Peripheral State functions ************************************************/
bogdanm	85:024bf7f99721	839
bogdanm	92:4fc01daae5a5	840	/**
bogdanm	92:4fc01daae5a5	841	* @}
Kojto	108:34e6b704fe68	842	*/
bogdanm	92:4fc01daae5a5	843
Kojto	108:34e6b704fe68	844	/* Private functions ---------------------------------------------------------*/
bogdanm	85:024bf7f99721	845
bogdanm	85:024bf7f99721	846	/**
bogdanm	85:024bf7f99721	847	* @}
Kojto	108:34e6b704fe68	848	*/
bogdanm	85:024bf7f99721	849
bogdanm	85:024bf7f99721	850	/**
bogdanm	85:024bf7f99721	851	* @}
Kojto	108:34e6b704fe68	852	*/
bogdanm	85:024bf7f99721	853
bogdanm	85:024bf7f99721	854	#ifdef __cplusplus
bogdanm	85:024bf7f99721	855	}
bogdanm	85:024bf7f99721	856	#endif
bogdanm	85:024bf7f99721	857
bogdanm	85:024bf7f99721	858	#endif /* __STM32F0xx_HAL_UART_EX_H */
bogdanm	85:024bf7f99721	859
bogdanm	85:024bf7f99721	860	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
bogdanm	92:4fc01daae5a5	861