mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F030R8/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_uart.h@143:86740a56073b, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:30:20 2017 +0100
Revision:
143:86740a56073b
Parent:
134:ad3be0349dc5 
Release 143 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 85:024bf7f99721 1 /**
bogdanm 85:024bf7f99721 2 ******************************************************************************
bogdanm 85:024bf7f99721 3 * @file stm32f0xx_hal_uart.h
bogdanm 85:024bf7f99721 4 * @author MCD Application Team
<> 134:ad3be0349dc5 5 * @version V1.5.0
<> 134:ad3be0349dc5 6 * @date 04-November-2016
bogdanm 85:024bf7f99721 7 * @brief Header file of UART HAL module.
bogdanm 85:024bf7f99721 8 ******************************************************************************
bogdanm 85:024bf7f99721 9 * @attention
bogdanm 85:024bf7f99721 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm 85:024bf7f99721 12 *
bogdanm 85:024bf7f99721 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 85:024bf7f99721 14 * are permitted provided that the following conditions are met:
bogdanm 85:024bf7f99721 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 85:024bf7f99721 16 * this list of conditions and the following disclaimer.
bogdanm 85:024bf7f99721 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 85:024bf7f99721 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 85:024bf7f99721 19 * and/or other materials provided with the distribution.
bogdanm 85:024bf7f99721 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 85:024bf7f99721 21 * may be used to endorse or promote products derived from this software
bogdanm 85:024bf7f99721 22 * without specific prior written permission.
bogdanm 85:024bf7f99721 23 *
bogdanm 85:024bf7f99721 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 85:024bf7f99721 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 85:024bf7f99721 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 85:024bf7f99721 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 85:024bf7f99721 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 85:024bf7f99721 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 85:024bf7f99721 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 85:024bf7f99721 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 85:024bf7f99721 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 85:024bf7f99721 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 85:024bf7f99721 34 *
<> 134:ad3be0349dc5 35 ******************************************************************************
bogdanm 85:024bf7f99721 36 */
bogdanm 85:024bf7f99721 37
bogdanm 85:024bf7f99721 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 85:024bf7f99721 39 #ifndef __STM32F0xx_HAL_UART_H
bogdanm 85:024bf7f99721 40 #define __STM32F0xx_HAL_UART_H
bogdanm 85:024bf7f99721 41
bogdanm 85:024bf7f99721 42 #ifdef __cplusplus
bogdanm 85:024bf7f99721 43 extern "C" {
bogdanm 85:024bf7f99721 44 #endif
bogdanm 85:024bf7f99721 45
bogdanm 85:024bf7f99721 46 /* Includes ------------------------------------------------------------------*/
bogdanm 85:024bf7f99721 47 #include "stm32f0xx_hal_def.h"
bogdanm 85:024bf7f99721 48
bogdanm 85:024bf7f99721 49 /** @addtogroup STM32F0xx_HAL_Driver
bogdanm 85:024bf7f99721 50 * @{
bogdanm 85:024bf7f99721 51 */
bogdanm 85:024bf7f99721 52
bogdanm 85:024bf7f99721 53 /** @addtogroup UART
bogdanm 85:024bf7f99721 54 * @{
Kojto 108:34e6b704fe68 55 */
bogdanm 85:024bf7f99721 56
Kojto 108:34e6b704fe68 57 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 58 /** @defgroup UART_Exported_Types UART Exported Types
bogdanm 92:4fc01daae5a5 59 * @{
Kojto 108:34e6b704fe68 60 */
bogdanm 85:024bf7f99721 61
Kojto 108:34e6b704fe68 62 /**
Kojto 108:34e6b704fe68 63 * @brief UART Init Structure definition
Kojto 108:34e6b704fe68 64 */
bogdanm 85:024bf7f99721 65 typedef struct
bogdanm 85:024bf7f99721 66 {
bogdanm 85:024bf7f99721 67 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
bogdanm 85:024bf7f99721 68 The baud rate register is computed using the following formula:
bogdanm 85:024bf7f99721 69 - If oversampling is 16 or in LIN mode (LIN mode not available on F030xx devices),
bogdanm 85:024bf7f99721 70 Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
bogdanm 85:024bf7f99721 71 - If oversampling is 8,
Kojto 108:34e6b704fe68 72 Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
bogdanm 85:024bf7f99721 73 Baud Rate Register[3] = 0
<> 134:ad3be0349dc5 74 Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1U */
bogdanm 85:024bf7f99721 75
bogdanm 85:024bf7f99721 76 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 134:ad3be0349dc5 77 This parameter can be a value of @ref UARTEx_Word_Length. */
bogdanm 85:024bf7f99721 78
bogdanm 85:024bf7f99721 79 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
<> 134:ad3be0349dc5 80 This parameter can be a value of @ref UART_Stop_Bits. */
bogdanm 85:024bf7f99721 81
bogdanm 85:024bf7f99721 82 uint32_t Parity; /*!< Specifies the parity mode.
bogdanm 85:024bf7f99721 83 This parameter can be a value of @ref UART_Parity
bogdanm 85:024bf7f99721 84 @note When parity is enabled, the computed parity is inserted
bogdanm 85:024bf7f99721 85 at the MSB position of the transmitted data (9th bit when
bogdanm 85:024bf7f99721 86 the word length is set to 9 data bits; 8th bit when the
bogdanm 85:024bf7f99721 87 word length is set to 8 data bits). */
Kojto 108:34e6b704fe68 88
bogdanm 92:4fc01daae5a5 89 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
<> 134:ad3be0349dc5 90 This parameter can be a value of @ref UART_Mode. */
bogdanm 85:024bf7f99721 91
bogdanm 92:4fc01daae5a5 92 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
bogdanm 85:024bf7f99721 93 or disabled.
<> 134:ad3be0349dc5 94 This parameter can be a value of @ref UART_Hardware_Flow_Control. */
Kojto 108:34e6b704fe68 95
Kojto 108:34e6b704fe68 96 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8).
<> 134:ad3be0349dc5 97 This parameter can be a value of @ref UART_Over_Sampling. */
Kojto 108:34e6b704fe68 98
bogdanm 92:4fc01daae5a5 99 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
bogdanm 85:024bf7f99721 100 Selecting the single sample method increases the receiver tolerance to clock
Kojto 108:34e6b704fe68 101 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
bogdanm 85:024bf7f99721 102 }UART_InitTypeDef;
bogdanm 85:024bf7f99721 103
Kojto 108:34e6b704fe68 104 /**
Kojto 108:34e6b704fe68 105 * @brief UART Advanced Features initalization structure definition
bogdanm 85:024bf7f99721 106 */
Kojto 108:34e6b704fe68 107 typedef struct
bogdanm 85:024bf7f99721 108 {
bogdanm 85:024bf7f99721 109 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
bogdanm 85:024bf7f99721 110 Advanced Features may be initialized at the same time .
<> 134:ad3be0349dc5 111 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */
Kojto 108:34e6b704fe68 112
bogdanm 85:024bf7f99721 113 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
<> 134:ad3be0349dc5 114 This parameter can be a value of @ref UART_Tx_Inv. */
Kojto 108:34e6b704fe68 115
bogdanm 85:024bf7f99721 116 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
<> 134:ad3be0349dc5 117 This parameter can be a value of @ref UART_Rx_Inv. */
bogdanm 85:024bf7f99721 118
bogdanm 85:024bf7f99721 119 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
bogdanm 85:024bf7f99721 120 vs negative/inverted logic).
<> 134:ad3be0349dc5 121 This parameter can be a value of @ref UART_Data_Inv. */
Kojto 108:34e6b704fe68 122
Kojto 108:34e6b704fe68 123 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
<> 134:ad3be0349dc5 124 This parameter can be a value of @ref UART_Rx_Tx_Swap. */
Kojto 108:34e6b704fe68 125
Kojto 108:34e6b704fe68 126 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
<> 134:ad3be0349dc5 127 This parameter can be a value of @ref UART_Overrun_Disable. */
Kojto 108:34e6b704fe68 128
Kojto 108:34e6b704fe68 129 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
<> 134:ad3be0349dc5 130 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
Kojto 108:34e6b704fe68 131
Kojto 108:34e6b704fe68 132 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
Kojto 108:34e6b704fe68 133 This parameter can be a value of @ref UART_AutoBaudRate_Enable */
Kojto 108:34e6b704fe68 134
Kojto 108:34e6b704fe68 135 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
Kojto 108:34e6b704fe68 136 detection is carried out.
<> 134:ad3be0349dc5 137 This parameter can be a value of @ref UARTEx_AutoBaud_Rate_Mode. */
Kojto 108:34e6b704fe68 138
Kojto 108:34e6b704fe68 139 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
<> 134:ad3be0349dc5 140 This parameter can be a value of @ref UART_MSB_First. */
bogdanm 85:024bf7f99721 141 } UART_AdvFeatureInitTypeDef;
bogdanm 85:024bf7f99721 142
Kojto 108:34e6b704fe68 143
Kojto 108:34e6b704fe68 144
Kojto 108:34e6b704fe68 145 /**
Kojto 108:34e6b704fe68 146 * @brief HAL UART State structures definition
Kojto 122:f9eeca106725 147 * @note HAL UART State value is a combination of 2 different substates: gState and RxState.
Kojto 122:f9eeca106725 148 * - gState contains UART state information related to global Handle management
Kojto 122:f9eeca106725 149 * and also information related to Tx operations.
Kojto 122:f9eeca106725 150 * gState value coding follow below described bitmap :
Kojto 122:f9eeca106725 151 * b7-b6 Error information
Kojto 122:f9eeca106725 152 * 00 : No Error
Kojto 122:f9eeca106725 153 * 01 : (Not Used)
Kojto 122:f9eeca106725 154 * 10 : Timeout
Kojto 122:f9eeca106725 155 * 11 : Error
Kojto 122:f9eeca106725 156 * b5 IP initilisation status
Kojto 122:f9eeca106725 157 * 0 : Reset (IP not initialized)
Kojto 122:f9eeca106725 158 * 1 : Init done (IP not initialized. HAL UART Init function already called)
Kojto 122:f9eeca106725 159 * b4-b3 (not used)
Kojto 122:f9eeca106725 160 * xx : Should be set to 00
Kojto 122:f9eeca106725 161 * b2 Intrinsic process state
Kojto 122:f9eeca106725 162 * 0 : Ready
Kojto 122:f9eeca106725 163 * 1 : Busy (IP busy with some configuration or internal operations)
Kojto 122:f9eeca106725 164 * b1 (not used)
Kojto 122:f9eeca106725 165 * x : Should be set to 0
Kojto 122:f9eeca106725 166 * b0 Tx state
Kojto 122:f9eeca106725 167 * 0 : Ready (no Tx operation ongoing)
Kojto 122:f9eeca106725 168 * 1 : Busy (Tx operation ongoing)
Kojto 122:f9eeca106725 169 * - RxState contains information related to Rx operations.
Kojto 122:f9eeca106725 170 * RxState value coding follow below described bitmap :
Kojto 122:f9eeca106725 171 * b7-b6 (not used)
Kojto 122:f9eeca106725 172 * xx : Should be set to 00
Kojto 122:f9eeca106725 173 * b5 IP initilisation status
Kojto 122:f9eeca106725 174 * 0 : Reset (IP not initialized)
Kojto 122:f9eeca106725 175 * 1 : Init done (IP not initialized)
Kojto 122:f9eeca106725 176 * b4-b2 (not used)
Kojto 122:f9eeca106725 177 * xxx : Should be set to 000
Kojto 122:f9eeca106725 178 * b1 Rx state
Kojto 122:f9eeca106725 179 * 0 : Ready (no Rx operation ongoing)
Kojto 122:f9eeca106725 180 * 1 : Busy (Rx operation ongoing)
Kojto 122:f9eeca106725 181 * b0 (not used)
Kojto 122:f9eeca106725 182 * x : Should be set to 0.
Kojto 108:34e6b704fe68 183 */
bogdanm 85:024bf7f99721 184 typedef enum
bogdanm 85:024bf7f99721 185 {
Kojto 122:f9eeca106725 186 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized
Kojto 122:f9eeca106725 187 Value is allowed for gState and RxState */
Kojto 122:f9eeca106725 188 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
Kojto 122:f9eeca106725 189 Value is allowed for gState and RxState */
Kojto 122:f9eeca106725 190 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
Kojto 122:f9eeca106725 191 Value is allowed for gState only */
Kojto 122:f9eeca106725 192 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
Kojto 122:f9eeca106725 193 Value is allowed for gState only */
Kojto 122:f9eeca106725 194 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
Kojto 122:f9eeca106725 195 Value is allowed for RxState only */
Kojto 122:f9eeca106725 196 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
Kojto 122:f9eeca106725 197 Not to be used for neither gState nor RxState.
Kojto 122:f9eeca106725 198 Value is result of combination (Or) between gState and RxState values */
Kojto 122:f9eeca106725 199 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
Kojto 122:f9eeca106725 200 Value is allowed for gState only */
Kojto 122:f9eeca106725 201 HAL_UART_STATE_ERROR = 0xE0U /*!< Error
Kojto 122:f9eeca106725 202 Value is allowed for gState only */
bogdanm 85:024bf7f99721 203 }HAL_UART_StateTypeDef;
bogdanm 85:024bf7f99721 204
bogdanm 85:024bf7f99721 205 /**
bogdanm 85:024bf7f99721 206 * @brief UART clock sources definition
bogdanm 85:024bf7f99721 207 */
bogdanm 85:024bf7f99721 208 typedef enum
bogdanm 85:024bf7f99721 209 {
<> 134:ad3be0349dc5 210 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */
<> 134:ad3be0349dc5 211 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */
<> 134:ad3be0349dc5 212 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
<> 134:ad3be0349dc5 213 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */
<> 134:ad3be0349dc5 214 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */
bogdanm 85:024bf7f99721 215 }UART_ClockSourceTypeDef;
bogdanm 85:024bf7f99721 216
Kojto 108:34e6b704fe68 217 /**
Kojto 108:34e6b704fe68 218 * @brief UART handle Structure definition
Kojto 108:34e6b704fe68 219 */
bogdanm 85:024bf7f99721 220 typedef struct
bogdanm 85:024bf7f99721 221 {
Kojto 93:e188a91d3eaa 222 USART_TypeDef *Instance; /*!< UART registers base address */
bogdanm 85:024bf7f99721 223
Kojto 93:e188a91d3eaa 224 UART_InitTypeDef Init; /*!< UART communication parameters */
bogdanm 85:024bf7f99721 225
Kojto 93:e188a91d3eaa 226 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */
bogdanm 85:024bf7f99721 227
Kojto 93:e188a91d3eaa 228 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
bogdanm 85:024bf7f99721 229
Kojto 93:e188a91d3eaa 230 uint16_t TxXferSize; /*!< UART Tx Transfer size */
bogdanm 85:024bf7f99721 231
<> 134:ad3be0349dc5 232 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
bogdanm 85:024bf7f99721 233
Kojto 93:e188a91d3eaa 234 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
bogdanm 85:024bf7f99721 235
Kojto 93:e188a91d3eaa 236 uint16_t RxXferSize; /*!< UART Rx Transfer size */
bogdanm 85:024bf7f99721 237
<> 134:ad3be0349dc5 238 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
bogdanm 85:024bf7f99721 239
Kojto 93:e188a91d3eaa 240 uint16_t Mask; /*!< UART Rx RDR register mask */
bogdanm 85:024bf7f99721 241
Kojto 93:e188a91d3eaa 242 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
bogdanm 85:024bf7f99721 243
Kojto 93:e188a91d3eaa 244 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
bogdanm 85:024bf7f99721 245
<> 134:ad3be0349dc5 246 HAL_LockTypeDef Lock; /*!< Locking object */
bogdanm 85:024bf7f99721 247
Kojto 122:f9eeca106725 248 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
Kojto 122:f9eeca106725 249 and also related to Tx operations.
Kojto 122:f9eeca106725 250 This parameter can be a value of @ref HAL_UART_StateTypeDef */
Kojto 122:f9eeca106725 251
Kojto 122:f9eeca106725 252 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
Kojto 122:f9eeca106725 253 This parameter can be a value of @ref HAL_UART_StateTypeDef */
Kojto 108:34e6b704fe68 254
Kojto 108:34e6b704fe68 255 __IO uint32_t ErrorCode; /*!< UART Error code */
Kojto 108:34e6b704fe68 256
bogdanm 85:024bf7f99721 257 }UART_HandleTypeDef;
bogdanm 85:024bf7f99721 258
bogdanm 92:4fc01daae5a5 259 /**
bogdanm 92:4fc01daae5a5 260 * @}
bogdanm 92:4fc01daae5a5 261 */
Kojto 108:34e6b704fe68 262
bogdanm 85:024bf7f99721 263 /* Exported constants --------------------------------------------------------*/
Kojto 108:34e6b704fe68 264 /** @defgroup UART_Exported_Constants UART Exported Constants
bogdanm 85:024bf7f99721 265 * @{
bogdanm 85:024bf7f99721 266 */
bogdanm 85:024bf7f99721 267
Kojto 93:e188a91d3eaa 268 /** @defgroup UART_Error UART Error
Kojto 93:e188a91d3eaa 269 * @{
Kojto 93:e188a91d3eaa 270 */
<> 134:ad3be0349dc5 271 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */
<> 134:ad3be0349dc5 272 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */
<> 134:ad3be0349dc5 273 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */
<> 134:ad3be0349dc5 274 #define HAL_UART_ERROR_FE (0x00000004U) /*!< frame error */
<> 134:ad3be0349dc5 275 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */
<> 134:ad3be0349dc5 276 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
<> 134:ad3be0349dc5 277 #define HAL_UART_ERROR_BUSY (0x00000020U) /*!< Busy Error */
Kojto 93:e188a91d3eaa 278 /**
Kojto 93:e188a91d3eaa 279 * @}
Kojto 93:e188a91d3eaa 280 */
Kojto 93:e188a91d3eaa 281
bogdanm 85:024bf7f99721 282 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
bogdanm 85:024bf7f99721 283 * @{
bogdanm 85:024bf7f99721 284 */
Kojto 122:f9eeca106725 285 #ifdef USART_SMARTCARD_SUPPORT
Kojto 122:f9eeca106725 286 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */
<> 134:ad3be0349dc5 287 #define UART_STOPBITS_1 (0x00000000U) /*!< UART frame with 1 stop bit */
Kojto 122:f9eeca106725 288 #define UART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1)) /*!< UART frame with 1.5 stop bits */
Kojto 122:f9eeca106725 289 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /*!< UART frame with 2 stop bits */
Kojto 122:f9eeca106725 290 #else
<> 134:ad3be0349dc5 291 #define UART_STOPBITS_1 (0x00000000U) /*!< UART frame with 1 stop bit */
Kojto 122:f9eeca106725 292 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /*!< UART frame with 2 stop bits */
Kojto 122:f9eeca106725 293 #endif
bogdanm 85:024bf7f99721 294 /**
bogdanm 85:024bf7f99721 295 * @}
Kojto 108:34e6b704fe68 296 */
bogdanm 85:024bf7f99721 297
bogdanm 85:024bf7f99721 298 /** @defgroup UART_Parity UART Parity
bogdanm 85:024bf7f99721 299 * @{
Kojto 108:34e6b704fe68 300 */
<> 134:ad3be0349dc5 301 #define UART_PARITY_NONE (0x00000000U) /*!< No parity */
Kojto 108:34e6b704fe68 302 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< Even parity */
Kojto 108:34e6b704fe68 303 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< Odd parity */
bogdanm 85:024bf7f99721 304 /**
bogdanm 85:024bf7f99721 305 * @}
Kojto 108:34e6b704fe68 306 */
bogdanm 85:024bf7f99721 307
bogdanm 85:024bf7f99721 308 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
bogdanm 85:024bf7f99721 309 * @{
Kojto 108:34e6b704fe68 310 */
<> 134:ad3be0349dc5 311 #define UART_HWCONTROL_NONE (0x00000000U) /*!< No hardware control */
Kojto 108:34e6b704fe68 312 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) /*!< Request To Send */
Kojto 108:34e6b704fe68 313 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) /*!< Clear To Send */
Kojto 108:34e6b704fe68 314 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) /*!< Request and Clear To Send */
bogdanm 85:024bf7f99721 315 /**
bogdanm 85:024bf7f99721 316 * @}
bogdanm 85:024bf7f99721 317 */
bogdanm 85:024bf7f99721 318
bogdanm 85:024bf7f99721 319 /** @defgroup UART_Mode UART Transfer Mode
bogdanm 85:024bf7f99721 320 * @{
Kojto 108:34e6b704fe68 321 */
Kojto 108:34e6b704fe68 322 #define UART_MODE_RX ((uint32_t)USART_CR1_RE) /*!< RX mode */
Kojto 108:34e6b704fe68 323 #define UART_MODE_TX ((uint32_t)USART_CR1_TE) /*!< TX mode */
Kojto 108:34e6b704fe68 324 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< RX and TX mode */
bogdanm 85:024bf7f99721 325 /**
bogdanm 85:024bf7f99721 326 * @}
bogdanm 85:024bf7f99721 327 */
Kojto 108:34e6b704fe68 328
Kojto 108:34e6b704fe68 329 /** @defgroup UART_State UART State
bogdanm 85:024bf7f99721 330 * @{
Kojto 108:34e6b704fe68 331 */
<> 134:ad3be0349dc5 332 #define UART_STATE_DISABLE (0x00000000U) /*!< UART disabled */
Kojto 108:34e6b704fe68 333 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) /*!< UART enabled */
bogdanm 85:024bf7f99721 334 /**
bogdanm 85:024bf7f99721 335 * @}
bogdanm 85:024bf7f99721 336 */
bogdanm 85:024bf7f99721 337
bogdanm 85:024bf7f99721 338 /** @defgroup UART_Over_Sampling UART Over Sampling
bogdanm 85:024bf7f99721 339 * @{
bogdanm 85:024bf7f99721 340 */
<> 134:ad3be0349dc5 341 #define UART_OVERSAMPLING_16 (0x00000000U) /*!< Oversampling by 16 */
Kojto 108:34e6b704fe68 342 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) /*!< Oversampling by 8 */
bogdanm 85:024bf7f99721 343 /**
bogdanm 85:024bf7f99721 344 * @}
Kojto 108:34e6b704fe68 345 */
bogdanm 85:024bf7f99721 346
bogdanm 85:024bf7f99721 347 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
bogdanm 85:024bf7f99721 348 * @{
bogdanm 85:024bf7f99721 349 */
<> 134:ad3be0349dc5 350 #define UART_ONE_BIT_SAMPLE_DISABLE (0x00000000U) /*!< One-bit sampling disable */
Kojto 108:34e6b704fe68 351 #define UART_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT) /*!< One-bit sampling enable */
bogdanm 85:024bf7f99721 352 /**
bogdanm 85:024bf7f99721 353 * @}
Kojto 108:34e6b704fe68 354 */
bogdanm 85:024bf7f99721 355
Kojto 108:34e6b704fe68 356 /** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
bogdanm 85:024bf7f99721 357 * @{
bogdanm 85:024bf7f99721 358 */
<> 134:ad3be0349dc5 359 #define UART_RECEIVER_TIMEOUT_DISABLE (0x00000000U) /*!< UART receiver timeout disable */
<> 134:ad3be0349dc5 360 #define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN) /*!< UART receiver timeout enable */
bogdanm 85:024bf7f99721 361 /**
bogdanm 85:024bf7f99721 362 * @}
Kojto 108:34e6b704fe68 363 */
bogdanm 85:024bf7f99721 364
bogdanm 85:024bf7f99721 365 /** @defgroup UART_DMA_Tx UART DMA Tx
bogdanm 85:024bf7f99721 366 * @{
bogdanm 85:024bf7f99721 367 */
<> 134:ad3be0349dc5 368 #define UART_DMA_TX_DISABLE (0x00000000U) /*!< UART DMA TX disabled */
<> 134:ad3be0349dc5 369 #define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT) /*!< UART DMA TX enabled */
bogdanm 85:024bf7f99721 370 /**
bogdanm 85:024bf7f99721 371 * @}
bogdanm 85:024bf7f99721 372 */
bogdanm 85:024bf7f99721 373
bogdanm 85:024bf7f99721 374 /** @defgroup UART_DMA_Rx UART DMA Rx
bogdanm 85:024bf7f99721 375 * @{
bogdanm 85:024bf7f99721 376 */
<> 134:ad3be0349dc5 377 #define UART_DMA_RX_DISABLE (0x00000000U) /*!< UART DMA RX disabled */
<> 134:ad3be0349dc5 378 #define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR) /*!< UART DMA RX enabled */
bogdanm 85:024bf7f99721 379 /**
bogdanm 85:024bf7f99721 380 * @}
bogdanm 85:024bf7f99721 381 */
bogdanm 85:024bf7f99721 382
bogdanm 85:024bf7f99721 383 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
bogdanm 85:024bf7f99721 384 * @{
bogdanm 85:024bf7f99721 385 */
<> 134:ad3be0349dc5 386 #define UART_HALF_DUPLEX_DISABLE (0x00000000U) /*!< UART half-duplex disabled */
<> 134:ad3be0349dc5 387 #define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL) /*!< UART half-duplex enabled */
bogdanm 85:024bf7f99721 388 /**
bogdanm 85:024bf7f99721 389 * @}
Kojto 108:34e6b704fe68 390 */
bogdanm 85:024bf7f99721 391
bogdanm 85:024bf7f99721 392 /** @defgroup UART_WakeUp_Address_Length UART WakeUp Address Length
bogdanm 85:024bf7f99721 393 * @{
bogdanm 85:024bf7f99721 394 */
<> 134:ad3be0349dc5 395 #define UART_ADDRESS_DETECT_4B (0x00000000U) /*!< 4-bit long wake-up address */
<> 134:ad3be0349dc5 396 #define UART_ADDRESS_DETECT_7B ((uint32_t)USART_CR2_ADDM7) /*!< 7-bit long wake-up address */
bogdanm 85:024bf7f99721 397 /**
bogdanm 85:024bf7f99721 398 * @}
bogdanm 85:024bf7f99721 399 */
bogdanm 85:024bf7f99721 400
bogdanm 85:024bf7f99721 401 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods
bogdanm 85:024bf7f99721 402 * @{
bogdanm 85:024bf7f99721 403 */
<> 134:ad3be0349dc5 404 #define UART_WAKEUPMETHOD_IDLELINE (0x00000000U) /*!< UART wake-up on idle line */
<> 134:ad3be0349dc5 405 #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) /*!< UART wake-up on address mark */
bogdanm 85:024bf7f99721 406 /**
bogdanm 85:024bf7f99721 407 * @}
bogdanm 85:024bf7f99721 408 */
bogdanm 85:024bf7f99721 409
<> 134:ad3be0349dc5 410 /** @defgroup UART_IT UART IT
bogdanm 92:4fc01daae5a5 411 * Elements values convention: 000000000XXYYYYYb
bogdanm 85:024bf7f99721 412 * - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm 85:024bf7f99721 413 * - XX : Interrupt source register (2bits)
bogdanm 85:024bf7f99721 414 * - 01: CR1 register
bogdanm 85:024bf7f99721 415 * - 10: CR2 register
bogdanm 85:024bf7f99721 416 * - 11: CR3 register
bogdanm 92:4fc01daae5a5 417 * @{
bogdanm 85:024bf7f99721 418 */
<> 134:ad3be0349dc5 419 #define UART_IT_ERR (0x0060U) /*!< UART error interruption */
bogdanm 85:024bf7f99721 420
bogdanm 85:024bf7f99721 421 /** Elements values convention: 0000ZZZZ00000000b
bogdanm 85:024bf7f99721 422 * - ZZZZ : Flag position in the ISR register(4bits)
bogdanm 85:024bf7f99721 423 */
<> 134:ad3be0349dc5 424 #define UART_IT_ORE (0x0300U) /*!< UART overrun error interruption */
<> 134:ad3be0349dc5 425 #define UART_IT_NE (0x0200U) /*!< UART noise error interruption */
<> 134:ad3be0349dc5 426 #define UART_IT_FE (0x0100U) /*!< UART frame error interruption */
bogdanm 92:4fc01daae5a5 427 /**
bogdanm 92:4fc01daae5a5 428 * @}
bogdanm 92:4fc01daae5a5 429 */
bogdanm 85:024bf7f99721 430
bogdanm 85:024bf7f99721 431 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
bogdanm 85:024bf7f99721 432 * @{
bogdanm 85:024bf7f99721 433 */
<> 134:ad3be0349dc5 434 #define UART_ADVFEATURE_NO_INIT (0x00000000U) /*!< No advanced feature initialization */
<> 134:ad3be0349dc5 435 #define UART_ADVFEATURE_TXINVERT_INIT (0x00000001U) /*!< TX pin active level inversion */
<> 134:ad3be0349dc5 436 #define UART_ADVFEATURE_RXINVERT_INIT (0x00000002U) /*!< RX pin active level inversion */
<> 134:ad3be0349dc5 437 #define UART_ADVFEATURE_DATAINVERT_INIT (0x00000004U) /*!< Binary data inversion */
<> 134:ad3be0349dc5 438 #define UART_ADVFEATURE_SWAP_INIT (0x00000008U) /*!< TX/RX pins swap */
<> 134:ad3be0349dc5 439 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT (0x00000010U) /*!< RX overrun disable */
<> 134:ad3be0349dc5 440 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT (0x00000020U) /*!< DMA disable on Reception Error */
<> 134:ad3be0349dc5 441 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT (0x00000040U) /*!< Auto Baud rate detection initialization */
<> 134:ad3be0349dc5 442 #define UART_ADVFEATURE_MSBFIRST_INIT (0x00000080U) /*!< Most significant bit sent/received first */
bogdanm 85:024bf7f99721 443 /**
bogdanm 85:024bf7f99721 444 * @}
bogdanm 85:024bf7f99721 445 */
bogdanm 85:024bf7f99721 446
bogdanm 85:024bf7f99721 447 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
bogdanm 85:024bf7f99721 448 * @{
bogdanm 85:024bf7f99721 449 */
<> 134:ad3be0349dc5 450 #define UART_ADVFEATURE_TXINV_DISABLE (0x00000000U) /*!< TX pin active level inversion disable */
<> 134:ad3be0349dc5 451 #define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV) /*!< TX pin active level inversion enable */
bogdanm 85:024bf7f99721 452 /**
bogdanm 85:024bf7f99721 453 * @}
bogdanm 85:024bf7f99721 454 */
bogdanm 85:024bf7f99721 455
bogdanm 85:024bf7f99721 456 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
bogdanm 85:024bf7f99721 457 * @{
bogdanm 85:024bf7f99721 458 */
<> 134:ad3be0349dc5 459 #define UART_ADVFEATURE_RXINV_DISABLE (0x00000000U) /*!< RX pin active level inversion disable */
<> 134:ad3be0349dc5 460 #define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV) /*!< RX pin active level inversion enable */
bogdanm 85:024bf7f99721 461 /**
bogdanm 85:024bf7f99721 462 * @}
bogdanm 85:024bf7f99721 463 */
bogdanm 85:024bf7f99721 464
bogdanm 85:024bf7f99721 465 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
bogdanm 85:024bf7f99721 466 * @{
bogdanm 85:024bf7f99721 467 */
<> 134:ad3be0349dc5 468 #define UART_ADVFEATURE_DATAINV_DISABLE (0x00000000U) /*!< Binary data inversion disable */
<> 134:ad3be0349dc5 469 #define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV) /*!< Binary data inversion enable */
bogdanm 85:024bf7f99721 470 /**
bogdanm 85:024bf7f99721 471 * @}
bogdanm 85:024bf7f99721 472 */
bogdanm 85:024bf7f99721 473
bogdanm 85:024bf7f99721 474 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
bogdanm 85:024bf7f99721 475 * @{
bogdanm 85:024bf7f99721 476 */
<> 134:ad3be0349dc5 477 #define UART_ADVFEATURE_SWAP_DISABLE (0x00000000U) /*!< TX/RX pins swap disable */
<> 134:ad3be0349dc5 478 #define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP) /*!< TX/RX pins swap enable */
bogdanm 85:024bf7f99721 479 /**
bogdanm 85:024bf7f99721 480 * @}
bogdanm 85:024bf7f99721 481 */
bogdanm 85:024bf7f99721 482
bogdanm 85:024bf7f99721 483 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
bogdanm 85:024bf7f99721 484 * @{
bogdanm 85:024bf7f99721 485 */
<> 134:ad3be0349dc5 486 #define UART_ADVFEATURE_OVERRUN_ENABLE (0x00000000U) /*!< RX overrun enable */
<> 134:ad3be0349dc5 487 #define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS) /*!< RX overrun disable */
bogdanm 85:024bf7f99721 488 /**
bogdanm 85:024bf7f99721 489 * @}
bogdanm 85:024bf7f99721 490 */
bogdanm 85:024bf7f99721 491
bogdanm 85:024bf7f99721 492 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
bogdanm 85:024bf7f99721 493 * @{
bogdanm 85:024bf7f99721 494 */
<> 134:ad3be0349dc5 495 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE (0x00000000U) /*!< RX Auto Baud rate detection enable */
<> 134:ad3be0349dc5 496 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN) /*!< RX Auto Baud rate detection disable */
bogdanm 85:024bf7f99721 497 /**
bogdanm 85:024bf7f99721 498 * @}
bogdanm 85:024bf7f99721 499 */
bogdanm 85:024bf7f99721 500
bogdanm 85:024bf7f99721 501 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
bogdanm 85:024bf7f99721 502 * @{
bogdanm 85:024bf7f99721 503 */
<> 134:ad3be0349dc5 504 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR (0x00000000U) /*!< DMA enable on Reception Error */
<> 134:ad3be0349dc5 505 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE) /*!< DMA disable on Reception Error */
bogdanm 85:024bf7f99721 506 /**
bogdanm 85:024bf7f99721 507 * @}
bogdanm 85:024bf7f99721 508 */
bogdanm 85:024bf7f99721 509
bogdanm 85:024bf7f99721 510 /** @defgroup UART_MSB_First UART Advanced Feature MSB First
bogdanm 85:024bf7f99721 511 * @{
bogdanm 85:024bf7f99721 512 */
<> 134:ad3be0349dc5 513 #define UART_ADVFEATURE_MSBFIRST_DISABLE (0x00000000U) /*!< Most significant bit sent/received first disable */
<> 134:ad3be0349dc5 514 #define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST) /*!< Most significant bit sent/received first enable */
bogdanm 85:024bf7f99721 515 /**
bogdanm 85:024bf7f99721 516 * @}
bogdanm 85:024bf7f99721 517 */
bogdanm 85:024bf7f99721 518
bogdanm 85:024bf7f99721 519 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
bogdanm 85:024bf7f99721 520 * @{
bogdanm 85:024bf7f99721 521 */
<> 134:ad3be0349dc5 522 #define UART_ADVFEATURE_MUTEMODE_DISABLE (0x00000000U) /*!< UART mute mode disable */
<> 134:ad3be0349dc5 523 #define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME) /*!< UART mute mode enable */
bogdanm 85:024bf7f99721 524 /**
bogdanm 85:024bf7f99721 525 * @}
bogdanm 85:024bf7f99721 526 */
bogdanm 85:024bf7f99721 527
bogdanm 85:024bf7f99721 528 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
bogdanm 85:024bf7f99721 529 * @{
bogdanm 85:024bf7f99721 530 */
<> 134:ad3be0349dc5 531 #define UART_CR2_ADDRESS_LSB_POS ( 24U) /*!< UART address-matching LSB position in CR2 register */
bogdanm 85:024bf7f99721 532 /**
bogdanm 85:024bf7f99721 533 * @}
bogdanm 85:024bf7f99721 534 */
bogdanm 85:024bf7f99721 535
bogdanm 85:024bf7f99721 536 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
bogdanm 85:024bf7f99721 537 * @{
bogdanm 85:024bf7f99721 538 */
<> 134:ad3be0349dc5 539 #define UART_DE_POLARITY_HIGH (0x00000000U) /*!< Driver enable signal is active high */
<> 134:ad3be0349dc5 540 #define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP) /*!< Driver enable signal is active low */
bogdanm 85:024bf7f99721 541 /**
bogdanm 85:024bf7f99721 542 * @}
bogdanm 85:024bf7f99721 543 */
bogdanm 85:024bf7f99721 544
bogdanm 85:024bf7f99721 545 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
bogdanm 85:024bf7f99721 546 * @{
bogdanm 85:024bf7f99721 547 */
<> 134:ad3be0349dc5 548 #define UART_CR1_DEAT_ADDRESS_LSB_POS ( 21U) /*!< UART Driver Enable assertion time LSB position in CR1 register */
bogdanm 85:024bf7f99721 549 /**
bogdanm 85:024bf7f99721 550 * @}
bogdanm 85:024bf7f99721 551 */
bogdanm 85:024bf7f99721 552
bogdanm 85:024bf7f99721 553 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
bogdanm 85:024bf7f99721 554 * @{
bogdanm 85:024bf7f99721 555 */
<> 134:ad3be0349dc5 556 #define UART_CR1_DEDT_ADDRESS_LSB_POS ( 16U) /*!< UART Driver Enable de-assertion time LSB position in CR1 register */
bogdanm 85:024bf7f99721 557 /**
bogdanm 85:024bf7f99721 558 * @}
bogdanm 85:024bf7f99721 559 */
bogdanm 85:024bf7f99721 560
bogdanm 85:024bf7f99721 561 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
bogdanm 85:024bf7f99721 562 * @{
Kojto 108:34e6b704fe68 563 */
<> 134:ad3be0349dc5 564 #define UART_IT_MASK (0x001FU) /*!< UART interruptions flags mask */
bogdanm 85:024bf7f99721 565 /**
bogdanm 85:024bf7f99721 566 * @}
bogdanm 85:024bf7f99721 567 */
Kojto 108:34e6b704fe68 568
bogdanm 85:024bf7f99721 569 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
bogdanm 85:024bf7f99721 570 * @{
Kojto 108:34e6b704fe68 571 */
<> 134:ad3be0349dc5 572 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */
bogdanm 85:024bf7f99721 573 /**
bogdanm 85:024bf7f99721 574 * @}
bogdanm 85:024bf7f99721 575 */
bogdanm 85:024bf7f99721 576
Kojto 108:34e6b704fe68 577
bogdanm 85:024bf7f99721 578 /**
bogdanm 85:024bf7f99721 579 * @}
bogdanm 85:024bf7f99721 580 */
bogdanm 85:024bf7f99721 581
Kojto 108:34e6b704fe68 582 /* Exported macros -----------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 583 /** @defgroup UART_Exported_Macros UART Exported Macros
bogdanm 85:024bf7f99721 584 * @{
bogdanm 85:024bf7f99721 585 */
Kojto 108:34e6b704fe68 586
<> 134:ad3be0349dc5 587 /** @brief Reset UART handle states.
bogdanm 85:024bf7f99721 588 * @param __HANDLE__: UART handle.
bogdanm 85:024bf7f99721 589 * @retval None
bogdanm 85:024bf7f99721 590 */
Kojto 122:f9eeca106725 591 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
Kojto 122:f9eeca106725 592 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
Kojto 122:f9eeca106725 593 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
Kojto 122:f9eeca106725 594 } while(0)
bogdanm 85:024bf7f99721 595
Kojto 108:34e6b704fe68 596 /** @brief Clear the specified UART pending flag.
Kojto 108:34e6b704fe68 597 * @param __HANDLE__: specifies the UART Handle.
Kojto 108:34e6b704fe68 598 * @param __FLAG__: specifies the flag to check.
Kojto 108:34e6b704fe68 599 * This parameter can be any combination of the following values:
<> 134:ad3be0349dc5 600 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
<> 134:ad3be0349dc5 601 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
<> 134:ad3be0349dc5 602 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
<> 134:ad3be0349dc5 603 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
<> 134:ad3be0349dc5 604 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
<> 134:ad3be0349dc5 605 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
<> 134:ad3be0349dc5 606 @if STM32F030x6
<> 134:ad3be0349dc5 607 @elseif STM32F030x8
<> 134:ad3be0349dc5 608 @elseif STM32F030xC
<> 134:ad3be0349dc5 609 @elseif STM32F070x6
<> 134:ad3be0349dc5 610 @elseif STM32F070xB
<> 134:ad3be0349dc5 611 @else
<> 134:ad3be0349dc5 612 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag (not available on all devices)
<> 134:ad3be0349dc5 613 @endif
<> 134:ad3be0349dc5 614 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
<> 134:ad3be0349dc5 615 * @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag
<> 134:ad3be0349dc5 616 @if STM32F030x6
<> 134:ad3be0349dc5 617 @elseif STM32F030x8
<> 134:ad3be0349dc5 618 @elseif STM32F030xC
<> 134:ad3be0349dc5 619 @elseif STM32F070x6
<> 134:ad3be0349dc5 620 @elseif STM32F070xB
<> 134:ad3be0349dc5 621 @else
<> 134:ad3be0349dc5 622 * @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag (not available on all devices)
<> 134:ad3be0349dc5 623 @endif
<> 134:ad3be0349dc5 624 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
<> 134:ad3be0349dc5 625 @if STM32F030x6
<> 134:ad3be0349dc5 626 @elseif STM32F030x8
<> 134:ad3be0349dc5 627 @elseif STM32F030xC
<> 134:ad3be0349dc5 628 @elseif STM32F070x6
<> 134:ad3be0349dc5 629 @elseif STM32F070xB
<> 134:ad3be0349dc5 630 @else
<> 134:ad3be0349dc5 631 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag (not available on all devices)
<> 134:ad3be0349dc5 632 @endif
Kojto 108:34e6b704fe68 633 * @retval None
Kojto 108:34e6b704fe68 634 */
Kojto 108:34e6b704fe68 635 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
Kojto 108:34e6b704fe68 636
Kojto 108:34e6b704fe68 637 /** @brief Clear the UART PE pending flag.
Kojto 108:34e6b704fe68 638 * @param __HANDLE__: specifies the UART Handle.
Kojto 108:34e6b704fe68 639 * @retval None
Kojto 108:34e6b704fe68 640 */
Kojto 108:34e6b704fe68 641 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
Kojto 108:34e6b704fe68 642
Kojto 108:34e6b704fe68 643 /** @brief Clear the UART FE pending flag.
Kojto 108:34e6b704fe68 644 * @param __HANDLE__: specifies the UART Handle.
Kojto 108:34e6b704fe68 645 * @retval None
Kojto 108:34e6b704fe68 646 */
Kojto 108:34e6b704fe68 647 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
Kojto 108:34e6b704fe68 648
Kojto 108:34e6b704fe68 649 /** @brief Clear the UART NE pending flag.
Kojto 108:34e6b704fe68 650 * @param __HANDLE__: specifies the UART Handle.
Kojto 108:34e6b704fe68 651 * @retval None
Kojto 108:34e6b704fe68 652 */
Kojto 108:34e6b704fe68 653 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
Kojto 108:34e6b704fe68 654
Kojto 108:34e6b704fe68 655 /** @brief Clear the UART ORE pending flag.
Kojto 108:34e6b704fe68 656 * @param __HANDLE__: specifies the UART Handle.
Kojto 108:34e6b704fe68 657 * @retval None
Kojto 108:34e6b704fe68 658 */
Kojto 108:34e6b704fe68 659 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
Kojto 108:34e6b704fe68 660
Kojto 108:34e6b704fe68 661 /** @brief Clear the UART IDLE pending flag.
Kojto 108:34e6b704fe68 662 * @param __HANDLE__: specifies the UART Handle.
Kojto 108:34e6b704fe68 663 * @retval None
Kojto 108:34e6b704fe68 664 */
Kojto 108:34e6b704fe68 665 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
Kojto 108:34e6b704fe68 666
Kojto 108:34e6b704fe68 667 /** @brief Check whether the specified UART flag is set or not.
bogdanm 85:024bf7f99721 668 * @param __HANDLE__: specifies the UART Handle.
bogdanm 85:024bf7f99721 669 * @param __FLAG__: specifies the flag to check.
bogdanm 85:024bf7f99721 670 * This parameter can be one of the following values:
<> 134:ad3be0349dc5 671 @if STM32F030x6
<> 134:ad3be0349dc5 672 @elseif STM32F030x8
<> 134:ad3be0349dc5 673 @elseif STM32F030xC
<> 134:ad3be0349dc5 674 @elseif STM32F070x6
<> 134:ad3be0349dc5 675 @elseif STM32F070xB
<> 134:ad3be0349dc5 676 @else
<> 134:ad3be0349dc5 677 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
<> 134:ad3be0349dc5 678 @endif
<> 134:ad3be0349dc5 679 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
<> 134:ad3be0349dc5 680 @if STM32F030x6
<> 134:ad3be0349dc5 681 @elseif STM32F030x8
<> 134:ad3be0349dc5 682 @elseif STM32F030xC
<> 134:ad3be0349dc5 683 @elseif STM32F070x6
<> 134:ad3be0349dc5 684 @elseif STM32F070xB
<> 134:ad3be0349dc5 685 @else
<> 134:ad3be0349dc5 686 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag (not available on F030xx devices)
<> 134:ad3be0349dc5 687 @endif
<> 134:ad3be0349dc5 688 * @arg @ref UART_FLAG_RWU Receiver wake up flag (not available on F030xx devices)
<> 134:ad3be0349dc5 689 * @arg @ref UART_FLAG_SBKF Send Break flag
<> 134:ad3be0349dc5 690 * @arg @ref UART_FLAG_CMF Character match flag
<> 134:ad3be0349dc5 691 * @arg @ref UART_FLAG_BUSY Busy flag
<> 134:ad3be0349dc5 692 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag
<> 134:ad3be0349dc5 693 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag
<> 134:ad3be0349dc5 694 @if STM32F030x6
<> 134:ad3be0349dc5 695 @elseif STM32F030x8
<> 134:ad3be0349dc5 696 @elseif STM32F030xC
<> 134:ad3be0349dc5 697 @elseif STM32F070x6
<> 134:ad3be0349dc5 698 @elseif STM32F070xB
<> 134:ad3be0349dc5 699 @else
<> 134:ad3be0349dc5 700 * @arg @ref UART_FLAG_EOBF End of block flag (not available on F030xx devices)
<> 134:ad3be0349dc5 701 @endif
<> 134:ad3be0349dc5 702 * @arg @ref UART_FLAG_RTOF Receiver timeout flag
<> 134:ad3be0349dc5 703 * @arg @ref UART_FLAG_CTS CTS Change flag
<> 134:ad3be0349dc5 704 @if STM32F030x6
<> 134:ad3be0349dc5 705 @elseif STM32F030x8
<> 134:ad3be0349dc5 706 @elseif STM32F030xC
<> 134:ad3be0349dc5 707 @elseif STM32F070x6
<> 134:ad3be0349dc5 708 @elseif STM32F070xB
<> 134:ad3be0349dc5 709 @else
<> 134:ad3be0349dc5 710 * @arg @ref UART_FLAG_LBDF LIN Break detection flag (not available on F030xx devices)
<> 134:ad3be0349dc5 711 @endif
<> 134:ad3be0349dc5 712 * @arg @ref UART_FLAG_TXE Transmit data register empty flag
<> 134:ad3be0349dc5 713 * @arg @ref UART_FLAG_TC Transmission Complete flag
<> 134:ad3be0349dc5 714 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag
<> 134:ad3be0349dc5 715 * @arg @ref UART_FLAG_IDLE Idle Line detection flag
<> 134:ad3be0349dc5 716 * @arg @ref UART_FLAG_ORE Overrun Error flag
<> 134:ad3be0349dc5 717 * @arg @ref UART_FLAG_NE Noise Error flag
<> 134:ad3be0349dc5 718 * @arg @ref UART_FLAG_FE Framing Error flag
<> 134:ad3be0349dc5 719 * @arg @ref UART_FLAG_PE Parity Error flag
bogdanm 85:024bf7f99721 720 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 85:024bf7f99721 721 */
Kojto 108:34e6b704fe68 722 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
bogdanm 85:024bf7f99721 723
Kojto 108:34e6b704fe68 724 /** @brief Enable the specified UART interrupt.
bogdanm 85:024bf7f99721 725 * @param __HANDLE__: specifies the UART Handle.
bogdanm 85:024bf7f99721 726 * @param __INTERRUPT__: specifies the UART interrupt source to enable.
bogdanm 85:024bf7f99721 727 * This parameter can be one of the following values:
<> 134:ad3be0349dc5 728 @if STM32F030x6
<> 134:ad3be0349dc5 729 @elseif STM32F030x8
<> 134:ad3be0349dc5 730 @elseif STM32F030xC
<> 134:ad3be0349dc5 731 @elseif STM32F070x6
<> 134:ad3be0349dc5 732 @elseif STM32F070xB
<> 134:ad3be0349dc5 733 @else
<> 134:ad3be0349dc5 734 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
<> 134:ad3be0349dc5 735 @endif
<> 134:ad3be0349dc5 736 * @arg @ref UART_IT_CM Character match interrupt
<> 134:ad3be0349dc5 737 * @arg @ref UART_IT_CTS CTS change interrupt
<> 134:ad3be0349dc5 738 @if STM32F030x6
<> 134:ad3be0349dc5 739 @elseif STM32F030x8
<> 134:ad3be0349dc5 740 @elseif STM32F030xC
<> 134:ad3be0349dc5 741 @elseif STM32F070x6
<> 134:ad3be0349dc5 742 @elseif STM32F070xB
<> 134:ad3be0349dc5 743 @else
<> 134:ad3be0349dc5 744 * @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
<> 134:ad3be0349dc5 745 @endif
<> 134:ad3be0349dc5 746 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
<> 134:ad3be0349dc5 747 * @arg @ref UART_IT_TC Transmission complete interrupt
<> 134:ad3be0349dc5 748 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
<> 134:ad3be0349dc5 749 * @arg @ref UART_IT_IDLE Idle line detection interrupt
<> 134:ad3be0349dc5 750 * @arg @ref UART_IT_PE Parity Error interrupt
<> 134:ad3be0349dc5 751 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
bogdanm 85:024bf7f99721 752 * @retval None
bogdanm 85:024bf7f99721 753 */
<> 134:ad3be0349dc5 754 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
<> 134:ad3be0349dc5 755 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm 85:024bf7f99721 756 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
bogdanm 85:024bf7f99721 757
bogdanm 85:024bf7f99721 758
Kojto 108:34e6b704fe68 759 /** @brief Disable the specified UART interrupt.
bogdanm 85:024bf7f99721 760 * @param __HANDLE__: specifies the UART Handle.
bogdanm 85:024bf7f99721 761 * @param __INTERRUPT__: specifies the UART interrupt source to disable.
bogdanm 85:024bf7f99721 762 * This parameter can be one of the following values:
<> 134:ad3be0349dc5 763 @if STM32F030x6
<> 134:ad3be0349dc5 764 @elseif STM32F030x8
<> 134:ad3be0349dc5 765 @elseif STM32F030xC
<> 134:ad3be0349dc5 766 @elseif STM32F070x6
<> 134:ad3be0349dc5 767 @elseif STM32F070xB
<> 134:ad3be0349dc5 768 @else
<> 134:ad3be0349dc5 769 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
<> 134:ad3be0349dc5 770 @endif
<> 134:ad3be0349dc5 771 * @arg @ref UART_IT_CM Character match interrupt
<> 134:ad3be0349dc5 772 * @arg @ref UART_IT_CTS CTS change interrupt
<> 134:ad3be0349dc5 773 @if STM32F030x6
<> 134:ad3be0349dc5 774 @elseif STM32F030x8
<> 134:ad3be0349dc5 775 @elseif STM32F030xC
<> 134:ad3be0349dc5 776 @elseif STM32F070x6
<> 134:ad3be0349dc5 777 @elseif STM32F070xB
<> 134:ad3be0349dc5 778 @else
<> 134:ad3be0349dc5 779 * @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
<> 134:ad3be0349dc5 780 @endif
<> 134:ad3be0349dc5 781 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
<> 134:ad3be0349dc5 782 * @arg @ref UART_IT_TC Transmission complete interrupt
<> 134:ad3be0349dc5 783 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
<> 134:ad3be0349dc5 784 * @arg @ref UART_IT_IDLE Idle line detection interrupt
<> 134:ad3be0349dc5 785 * @arg @ref UART_IT_PE Parity Error interrupt
<> 134:ad3be0349dc5 786 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
bogdanm 85:024bf7f99721 787 * @retval None
bogdanm 85:024bf7f99721 788 */
<> 134:ad3be0349dc5 789 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
<> 134:ad3be0349dc5 790 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm 85:024bf7f99721 791 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
bogdanm 85:024bf7f99721 792
Kojto 108:34e6b704fe68 793 /** @brief Check whether the specified UART interrupt has occurred or not.
bogdanm 85:024bf7f99721 794 * @param __HANDLE__: specifies the UART Handle.
bogdanm 85:024bf7f99721 795 * @param __IT__: specifies the UART interrupt to check.
bogdanm 85:024bf7f99721 796 * This parameter can be one of the following values:
<> 134:ad3be0349dc5 797 @if STM32F030x6
<> 134:ad3be0349dc5 798 @elseif STM32F030x8
<> 134:ad3be0349dc5 799 @elseif STM32F030xC
<> 134:ad3be0349dc5 800 @elseif STM32F070x6
<> 134:ad3be0349dc5 801 @elseif STM32F070xB
<> 134:ad3be0349dc5 802 @else
<> 134:ad3be0349dc5 803 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
<> 134:ad3be0349dc5 804 @endif
<> 134:ad3be0349dc5 805 * @arg @ref UART_IT_CM Character match interrupt
<> 134:ad3be0349dc5 806 * @arg @ref UART_IT_CTS CTS change interrupt
<> 134:ad3be0349dc5 807 @if STM32F030x6
<> 134:ad3be0349dc5 808 @elseif STM32F030x8
<> 134:ad3be0349dc5 809 @elseif STM32F030xC
<> 134:ad3be0349dc5 810 @elseif STM32F070x6
<> 134:ad3be0349dc5 811 @elseif STM32F070xB
<> 134:ad3be0349dc5 812 @else
<> 134:ad3be0349dc5 813 * @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
<> 134:ad3be0349dc5 814 @endif
<> 134:ad3be0349dc5 815 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
<> 134:ad3be0349dc5 816 * @arg @ref UART_IT_TC Transmission complete interrupt
<> 134:ad3be0349dc5 817 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
<> 134:ad3be0349dc5 818 * @arg @ref UART_IT_IDLE Idle line detection interrupt
<> 134:ad3be0349dc5 819 * @arg @ref UART_IT_ORE Overrun Error interrupt
<> 134:ad3be0349dc5 820 * @arg @ref UART_IT_NE Noise Error interrupt
<> 134:ad3be0349dc5 821 * @arg @ref UART_IT_FE Framing Error interrupt
<> 134:ad3be0349dc5 822 * @arg @ref UART_IT_PE Parity Error interrupt
bogdanm 85:024bf7f99721 823 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 85:024bf7f99721 824 */
<> 134:ad3be0349dc5 825 #define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & (1U << ((__IT__)>> 0x08U)))
bogdanm 85:024bf7f99721 826
Kojto 108:34e6b704fe68 827 /** @brief Check whether the specified UART interrupt source is enabled or not.
bogdanm 85:024bf7f99721 828 * @param __HANDLE__: specifies the UART Handle.
bogdanm 85:024bf7f99721 829 * @param __IT__: specifies the UART interrupt source to check.
bogdanm 85:024bf7f99721 830 * This parameter can be one of the following values:
<> 134:ad3be0349dc5 831 @if STM32F030x6
<> 134:ad3be0349dc5 832 @elseif STM32F030x8
<> 134:ad3be0349dc5 833 @elseif STM32F030xC
<> 134:ad3be0349dc5 834 @elseif STM32F070x6
<> 134:ad3be0349dc5 835 @elseif STM32F070xB
<> 134:ad3be0349dc5 836 @else
<> 134:ad3be0349dc5 837 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
<> 134:ad3be0349dc5 838 @endif
<> 134:ad3be0349dc5 839 * @arg @ref UART_IT_CM Character match interrupt
<> 134:ad3be0349dc5 840 * @arg @ref UART_IT_CTS CTS change interrupt
<> 134:ad3be0349dc5 841 @if STM32F030x6
<> 134:ad3be0349dc5 842 @elseif STM32F030x8
<> 134:ad3be0349dc5 843 @elseif STM32F030xC
<> 134:ad3be0349dc5 844 @elseif STM32F070x6
<> 134:ad3be0349dc5 845 @elseif STM32F070xB
<> 134:ad3be0349dc5 846 @else
<> 134:ad3be0349dc5 847 * @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
<> 134:ad3be0349dc5 848 @endif
<> 134:ad3be0349dc5 849 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
<> 134:ad3be0349dc5 850 * @arg @ref UART_IT_TC Transmission complete interrupt
<> 134:ad3be0349dc5 851 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
<> 134:ad3be0349dc5 852 * @arg @ref UART_IT_IDLE Idle line detection interrupt
<> 134:ad3be0349dc5 853 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
<> 134:ad3be0349dc5 854 * @arg @ref UART_IT_PE Parity Error interrupt
bogdanm 85:024bf7f99721 855 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 85:024bf7f99721 856 */
<> 134:ad3be0349dc5 857 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \
<> 134:ad3be0349dc5 858 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__IT__)) & UART_IT_MASK)))
bogdanm 85:024bf7f99721 859
Kojto 108:34e6b704fe68 860 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag.
bogdanm 85:024bf7f99721 861 * @param __HANDLE__: specifies the UART Handle.
bogdanm 85:024bf7f99721 862 * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
bogdanm 85:024bf7f99721 863 * to clear the corresponding interrupt
bogdanm 85:024bf7f99721 864 * This parameter can be one of the following values:
<> 134:ad3be0349dc5 865 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
<> 134:ad3be0349dc5 866 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
<> 134:ad3be0349dc5 867 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
<> 134:ad3be0349dc5 868 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
<> 134:ad3be0349dc5 869 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
<> 134:ad3be0349dc5 870 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
<> 134:ad3be0349dc5 871 @if STM32F030x6
<> 134:ad3be0349dc5 872 @elseif STM32F030x8
<> 134:ad3be0349dc5 873 @elseif STM32F030xC
<> 134:ad3be0349dc5 874 @elseif STM32F070x6
<> 134:ad3be0349dc5 875 @elseif STM32F070xB
<> 134:ad3be0349dc5 876 @else
<> 134:ad3be0349dc5 877 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag (not available on F030xx devices)
<> 134:ad3be0349dc5 878 @endif
<> 134:ad3be0349dc5 879 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
<> 134:ad3be0349dc5 880 * @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag
<> 134:ad3be0349dc5 881 @if STM32F030x6
<> 134:ad3be0349dc5 882 @elseif STM32F030x8
<> 134:ad3be0349dc5 883 @elseif STM32F030xC
<> 134:ad3be0349dc5 884 @elseif STM32F070x6
<> 134:ad3be0349dc5 885 @elseif STM32F070xB
<> 134:ad3be0349dc5 886 @else
<> 134:ad3be0349dc5 887 * @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag
<> 134:ad3be0349dc5 888 @endif
<> 134:ad3be0349dc5 889 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
<> 134:ad3be0349dc5 890 @if STM32F030x6
<> 134:ad3be0349dc5 891 @elseif STM32F030x8
<> 134:ad3be0349dc5 892 @elseif STM32F030xC
<> 134:ad3be0349dc5 893 @elseif STM32F070x6
<> 134:ad3be0349dc5 894 @elseif STM32F070xB
<> 134:ad3be0349dc5 895 @else
<> 134:ad3be0349dc5 896 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag (not available on F030xx devices)
<> 134:ad3be0349dc5 897 @endif
bogdanm 85:024bf7f99721 898 * @retval None
bogdanm 85:024bf7f99721 899 */
Kojto 108:34e6b704fe68 900 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
bogdanm 85:024bf7f99721 901
bogdanm 85:024bf7f99721 902 /** @brief Set a specific UART request flag.
bogdanm 85:024bf7f99721 903 * @param __HANDLE__: specifies the UART Handle.
bogdanm 85:024bf7f99721 904 * @param __REQ__: specifies the request flag to set
bogdanm 85:024bf7f99721 905 * This parameter can be one of the following values:
<> 134:ad3be0349dc5 906 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
<> 134:ad3be0349dc5 907 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request
<> 134:ad3be0349dc5 908 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
<> 134:ad3be0349dc5 909 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
<> 134:ad3be0349dc5 910 @if STM32F030x6
<> 134:ad3be0349dc5 911 @elseif STM32F030x8
<> 134:ad3be0349dc5 912 @elseif STM32F030xC
<> 134:ad3be0349dc5 913 @elseif STM32F070x6
<> 134:ad3be0349dc5 914 @elseif STM32F070xB
<> 134:ad3be0349dc5 915 @else
<> 134:ad3be0349dc5 916 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request (not available on F030xx devices)
<> 134:ad3be0349dc5 917 @endif
bogdanm 85:024bf7f99721 918 * @retval None
bogdanm 85:024bf7f99721 919 */
<> 134:ad3be0349dc5 920 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint32_t)(__REQ__))
Kojto 108:34e6b704fe68 921
Kojto 108:34e6b704fe68 922 /** @brief Enable the UART one bit sample method.
Kojto 108:34e6b704fe68 923 * @param __HANDLE__: specifies the UART Handle.
Kojto 108:34e6b704fe68 924 * @retval None
Kojto 108:34e6b704fe68 925 */
Kojto 108:34e6b704fe68 926 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
bogdanm 85:024bf7f99721 927
Kojto 108:34e6b704fe68 928 /** @brief Disable the UART one bit sample method.
Kojto 108:34e6b704fe68 929 * @param __HANDLE__: specifies the UART Handle.
Kojto 108:34e6b704fe68 930 * @retval None
Kojto 108:34e6b704fe68 931 */
Kojto 108:34e6b704fe68 932 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
Kojto 108:34e6b704fe68 933
Kojto 108:34e6b704fe68 934 /** @brief Enable UART.
bogdanm 85:024bf7f99721 935 * @param __HANDLE__: specifies the UART Handle.
bogdanm 85:024bf7f99721 936 * @retval None
Kojto 108:34e6b704fe68 937 */
bogdanm 85:024bf7f99721 938 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
bogdanm 85:024bf7f99721 939
Kojto 108:34e6b704fe68 940 /** @brief Disable UART.
bogdanm 85:024bf7f99721 941 * @param __HANDLE__: specifies the UART Handle.
bogdanm 85:024bf7f99721 942 * @retval None
bogdanm 85:024bf7f99721 943 */
bogdanm 85:024bf7f99721 944 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
bogdanm 85:024bf7f99721 945
Kojto 108:34e6b704fe68 946 /** @brief Enable CTS flow control.
Kojto 108:34e6b704fe68 947 * @note This macro allows to enable CTS hardware flow control for a given UART instance,
Kojto 108:34e6b704fe68 948 * without need to call HAL_UART_Init() function.
Kojto 108:34e6b704fe68 949 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
Kojto 108:34e6b704fe68 950 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
Kojto 108:34e6b704fe68 951 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
Kojto 108:34e6b704fe68 952 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
Kojto 108:34e6b704fe68 953 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
Kojto 108:34e6b704fe68 954 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
Kojto 108:34e6b704fe68 955 * @param __HANDLE__: specifies the UART Handle.
Kojto 108:34e6b704fe68 956 * @retval None
Kojto 108:34e6b704fe68 957 */
Kojto 108:34e6b704fe68 958 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
Kojto 108:34e6b704fe68 959 do{ \
Kojto 108:34e6b704fe68 960 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
Kojto 108:34e6b704fe68 961 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
Kojto 108:34e6b704fe68 962 } while(0)
Kojto 108:34e6b704fe68 963
Kojto 108:34e6b704fe68 964 /** @brief Disable CTS flow control.
Kojto 108:34e6b704fe68 965 * @note This macro allows to disable CTS hardware flow control for a given UART instance,
Kojto 108:34e6b704fe68 966 * without need to call HAL_UART_Init() function.
Kojto 108:34e6b704fe68 967 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
Kojto 108:34e6b704fe68 968 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
Kojto 108:34e6b704fe68 969 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
Kojto 108:34e6b704fe68 970 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
Kojto 108:34e6b704fe68 971 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
Kojto 108:34e6b704fe68 972 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
Kojto 108:34e6b704fe68 973 * @param __HANDLE__: specifies the UART Handle.
Kojto 108:34e6b704fe68 974 * @retval None
Kojto 108:34e6b704fe68 975 */
Kojto 108:34e6b704fe68 976 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
Kojto 108:34e6b704fe68 977 do{ \
Kojto 108:34e6b704fe68 978 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
Kojto 108:34e6b704fe68 979 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
Kojto 108:34e6b704fe68 980 } while(0)
Kojto 108:34e6b704fe68 981
Kojto 108:34e6b704fe68 982 /** @brief Enable RTS flow control.
Kojto 108:34e6b704fe68 983 * @note This macro allows to enable RTS hardware flow control for a given UART instance,
Kojto 108:34e6b704fe68 984 * without need to call HAL_UART_Init() function.
Kojto 108:34e6b704fe68 985 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
Kojto 108:34e6b704fe68 986 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
Kojto 108:34e6b704fe68 987 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
Kojto 108:34e6b704fe68 988 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
Kojto 108:34e6b704fe68 989 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
Kojto 108:34e6b704fe68 990 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
Kojto 108:34e6b704fe68 991 * @param __HANDLE__: specifies the UART Handle.
Kojto 108:34e6b704fe68 992 * @retval None
Kojto 108:34e6b704fe68 993 */
Kojto 108:34e6b704fe68 994 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
Kojto 108:34e6b704fe68 995 do{ \
Kojto 108:34e6b704fe68 996 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
Kojto 108:34e6b704fe68 997 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
Kojto 108:34e6b704fe68 998 } while(0)
Kojto 108:34e6b704fe68 999
Kojto 108:34e6b704fe68 1000 /** @brief Disable RTS flow control.
Kojto 108:34e6b704fe68 1001 * @note This macro allows to disable RTS hardware flow control for a given UART instance,
Kojto 108:34e6b704fe68 1002 * without need to call HAL_UART_Init() function.
Kojto 108:34e6b704fe68 1003 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
Kojto 108:34e6b704fe68 1004 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
Kojto 108:34e6b704fe68 1005 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
Kojto 108:34e6b704fe68 1006 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
Kojto 108:34e6b704fe68 1007 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
Kojto 108:34e6b704fe68 1008 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
Kojto 108:34e6b704fe68 1009 * @param __HANDLE__: specifies the UART Handle.
Kojto 108:34e6b704fe68 1010 * @retval None
Kojto 108:34e6b704fe68 1011 */
Kojto 108:34e6b704fe68 1012 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
Kojto 108:34e6b704fe68 1013 do{ \
Kojto 108:34e6b704fe68 1014 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
Kojto 108:34e6b704fe68 1015 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
Kojto 108:34e6b704fe68 1016 } while(0)
Kojto 108:34e6b704fe68 1017
bogdanm 92:4fc01daae5a5 1018 /**
bogdanm 92:4fc01daae5a5 1019 * @}
bogdanm 92:4fc01daae5a5 1020 */
bogdanm 92:4fc01daae5a5 1021
bogdanm 92:4fc01daae5a5 1022 /* Private macros --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 1023 /** @defgroup UART_Private_Macros UART Private Macros
bogdanm 92:4fc01daae5a5 1024 * @{
bogdanm 92:4fc01daae5a5 1025 */
bogdanm 92:4fc01daae5a5 1026
Kojto 108:34e6b704fe68 1027 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
Kojto 108:34e6b704fe68 1028 * @param __PCLK__: UART clock.
Kojto 108:34e6b704fe68 1029 * @param __BAUD__: Baud rate set by the user.
bogdanm 85:024bf7f99721 1030 * @retval Division result
bogdanm 85:024bf7f99721 1031 */
<> 134:ad3be0349dc5 1032 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__))
bogdanm 85:024bf7f99721 1033
Kojto 108:34e6b704fe68 1034 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode.
Kojto 108:34e6b704fe68 1035 * @param __PCLK__: UART clock.
Kojto 108:34e6b704fe68 1036 * @param __BAUD__: Baud rate set by the user.
bogdanm 85:024bf7f99721 1037 * @retval Division result
bogdanm 85:024bf7f99721 1038 */
<> 134:ad3be0349dc5 1039 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__))
bogdanm 85:024bf7f99721 1040
<> 134:ad3be0349dc5 1041 /** @brief Check UART Baud rate.
Kojto 108:34e6b704fe68 1042 * @param __BAUDRATE__: Baudrate specified by the user.
bogdanm 85:024bf7f99721 1043 * The maximum Baud Rate is derived from the maximum clock on F0 (i.e. 48 MHz)
<> 134:ad3be0349dc5 1044 * divided by the smallest oversampling used on the USART (i.e. 8)
Kojto 108:34e6b704fe68 1045 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
Kojto 108:34e6b704fe68 1046 */
<> 134:ad3be0349dc5 1047 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 6000001U)
Kojto 108:34e6b704fe68 1048
Kojto 108:34e6b704fe68 1049 /** @brief Check UART assertion time.
Kojto 108:34e6b704fe68 1050 * @param __TIME__: 5-bit value assertion time.
Kojto 108:34e6b704fe68 1051 * @retval Test result (TRUE or FALSE).
Kojto 108:34e6b704fe68 1052 */
Kojto 108:34e6b704fe68 1053 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F)
Kojto 108:34e6b704fe68 1054
Kojto 108:34e6b704fe68 1055 /** @brief Check UART deassertion time.
Kojto 108:34e6b704fe68 1056 * @param __TIME__: 5-bit value deassertion time.
bogdanm 85:024bf7f99721 1057 * @retval Test result (TRUE or FALSE).
bogdanm 85:024bf7f99721 1058 */
Kojto 108:34e6b704fe68 1059 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F)
Kojto 108:34e6b704fe68 1060
Kojto 108:34e6b704fe68 1061 /**
Kojto 108:34e6b704fe68 1062 * @brief Ensure that UART frame number of stop bits is valid.
Kojto 108:34e6b704fe68 1063 * @param __STOPBITS__: UART frame number of stop bits.
Kojto 122:f9eeca106725 1064 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
Kojto 108:34e6b704fe68 1065 */
Kojto 122:f9eeca106725 1066 #ifdef USART_SMARTCARD_SUPPORT
Kojto 122:f9eeca106725 1067 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \
Kojto 122:f9eeca106725 1068 ((__STOPBITS__) == UART_STOPBITS_1) || \
Kojto 122:f9eeca106725 1069 ((__STOPBITS__) == UART_STOPBITS_1_5) || \
Kojto 122:f9eeca106725 1070 ((__STOPBITS__) == UART_STOPBITS_2))
Kojto 122:f9eeca106725 1071 #else
Kojto 122:f9eeca106725 1072 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \
Kojto 122:f9eeca106725 1073 ((__STOPBITS__) == UART_STOPBITS_2))
Kojto 122:f9eeca106725 1074 #endif
Kojto 108:34e6b704fe68 1075
Kojto 108:34e6b704fe68 1076 /**
Kojto 108:34e6b704fe68 1077 * @brief Ensure that UART frame parity is valid.
Kojto 108:34e6b704fe68 1078 * @param __PARITY__: UART frame parity.
Kojto 108:34e6b704fe68 1079 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
Kojto 108:34e6b704fe68 1080 */
Kojto 108:34e6b704fe68 1081 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \
Kojto 108:34e6b704fe68 1082 ((__PARITY__) == UART_PARITY_EVEN) || \
Kojto 108:34e6b704fe68 1083 ((__PARITY__) == UART_PARITY_ODD))
bogdanm 85:024bf7f99721 1084
Kojto 108:34e6b704fe68 1085 /**
Kojto 108:34e6b704fe68 1086 * @brief Ensure that UART hardware flow control is valid.
Kojto 108:34e6b704fe68 1087 * @param __CONTROL__: UART hardware flow control.
Kojto 108:34e6b704fe68 1088 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
Kojto 108:34e6b704fe68 1089 */
Kojto 108:34e6b704fe68 1090 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
Kojto 108:34e6b704fe68 1091 (((__CONTROL__) == UART_HWCONTROL_NONE) || \
Kojto 108:34e6b704fe68 1092 ((__CONTROL__) == UART_HWCONTROL_RTS) || \
Kojto 108:34e6b704fe68 1093 ((__CONTROL__) == UART_HWCONTROL_CTS) || \
Kojto 108:34e6b704fe68 1094 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
Kojto 108:34e6b704fe68 1095
Kojto 108:34e6b704fe68 1096 /**
Kojto 108:34e6b704fe68 1097 * @brief Ensure that UART communication mode is valid.
Kojto 108:34e6b704fe68 1098 * @param __MODE__: UART communication mode.
Kojto 108:34e6b704fe68 1099 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
Kojto 108:34e6b704fe68 1100 */
<> 134:ad3be0349dc5 1101 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U))
Kojto 108:34e6b704fe68 1102
Kojto 108:34e6b704fe68 1103 /**
Kojto 108:34e6b704fe68 1104 * @brief Ensure that UART state is valid.
Kojto 108:34e6b704fe68 1105 * @param __STATE__: UART state.
Kojto 108:34e6b704fe68 1106 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
Kojto 108:34e6b704fe68 1107 */
Kojto 108:34e6b704fe68 1108 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \
Kojto 108:34e6b704fe68 1109 ((__STATE__) == UART_STATE_ENABLE))
Kojto 108:34e6b704fe68 1110
Kojto 108:34e6b704fe68 1111 /**
Kojto 108:34e6b704fe68 1112 * @brief Ensure that UART oversampling is valid.
Kojto 108:34e6b704fe68 1113 * @param __SAMPLING__: UART oversampling.
Kojto 108:34e6b704fe68 1114 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
bogdanm 85:024bf7f99721 1115 */
Kojto 108:34e6b704fe68 1116 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \
Kojto 108:34e6b704fe68 1117 ((__SAMPLING__) == UART_OVERSAMPLING_8))
Kojto 108:34e6b704fe68 1118
Kojto 108:34e6b704fe68 1119 /**
Kojto 108:34e6b704fe68 1120 * @brief Ensure that UART frame sampling is valid.
Kojto 108:34e6b704fe68 1121 * @param __ONEBIT__: UART frame sampling.
Kojto 108:34e6b704fe68 1122 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
Kojto 108:34e6b704fe68 1123 */
Kojto 108:34e6b704fe68 1124 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \
Kojto 108:34e6b704fe68 1125 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
Kojto 108:34e6b704fe68 1126
Kojto 108:34e6b704fe68 1127 /**
Kojto 108:34e6b704fe68 1128 * @brief Ensure that Address Length detection parameter is valid.
Kojto 108:34e6b704fe68 1129 * @param __ADDRESS__: UART Adress length value.
Kojto 108:34e6b704fe68 1130 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid)
Kojto 108:34e6b704fe68 1131 */
Kojto 108:34e6b704fe68 1132 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \
Kojto 108:34e6b704fe68 1133 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B))
Kojto 108:34e6b704fe68 1134
Kojto 108:34e6b704fe68 1135 /**
Kojto 108:34e6b704fe68 1136 * @brief Ensure that UART receiver timeout setting is valid.
Kojto 108:34e6b704fe68 1137 * @param __TIMEOUT__: UART receiver timeout setting.
Kojto 108:34e6b704fe68 1138 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
Kojto 108:34e6b704fe68 1139 */
Kojto 108:34e6b704fe68 1140 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \
Kojto 108:34e6b704fe68 1141 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
Kojto 108:34e6b704fe68 1142
Kojto 108:34e6b704fe68 1143 /**
Kojto 108:34e6b704fe68 1144 * @brief Ensure that UART DMA TX state is valid.
Kojto 108:34e6b704fe68 1145 * @param __DMATX__: UART DMA TX state.
Kojto 108:34e6b704fe68 1146 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
Kojto 108:34e6b704fe68 1147 */
Kojto 108:34e6b704fe68 1148 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \
Kojto 108:34e6b704fe68 1149 ((__DMATX__) == UART_DMA_TX_ENABLE))
Kojto 108:34e6b704fe68 1150
Kojto 108:34e6b704fe68 1151 /**
Kojto 108:34e6b704fe68 1152 * @brief Ensure that UART DMA RX state is valid.
Kojto 108:34e6b704fe68 1153 * @param __DMARX__: UART DMA RX state.
Kojto 108:34e6b704fe68 1154 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
Kojto 108:34e6b704fe68 1155 */
Kojto 108:34e6b704fe68 1156 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \
Kojto 108:34e6b704fe68 1157 ((__DMARX__) == UART_DMA_RX_ENABLE))
Kojto 108:34e6b704fe68 1158
Kojto 108:34e6b704fe68 1159 /**
Kojto 108:34e6b704fe68 1160 * @brief Ensure that UART half-duplex state is valid.
Kojto 108:34e6b704fe68 1161 * @param __HDSEL__: UART half-duplex state.
Kojto 108:34e6b704fe68 1162 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
Kojto 108:34e6b704fe68 1163 */
Kojto 108:34e6b704fe68 1164 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \
Kojto 108:34e6b704fe68 1165 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
Kojto 108:34e6b704fe68 1166
Kojto 108:34e6b704fe68 1167 /**
Kojto 108:34e6b704fe68 1168 * @brief Ensure that UART wake-up method is valid.
Kojto 108:34e6b704fe68 1169 * @param __WAKEUP__: UART wake-up method .
Kojto 108:34e6b704fe68 1170 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
Kojto 108:34e6b704fe68 1171 */
Kojto 108:34e6b704fe68 1172 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \
Kojto 108:34e6b704fe68 1173 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
Kojto 108:34e6b704fe68 1174
Kojto 108:34e6b704fe68 1175 /**
Kojto 108:34e6b704fe68 1176 * @brief Ensure that UART advanced features initialization is valid.
Kojto 108:34e6b704fe68 1177 * @param __INIT__: UART advanced features initialization.
Kojto 108:34e6b704fe68 1178 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
Kojto 108:34e6b704fe68 1179 */
Kojto 108:34e6b704fe68 1180 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \
Kojto 108:34e6b704fe68 1181 UART_ADVFEATURE_TXINVERT_INIT | \
Kojto 108:34e6b704fe68 1182 UART_ADVFEATURE_RXINVERT_INIT | \
Kojto 108:34e6b704fe68 1183 UART_ADVFEATURE_DATAINVERT_INIT | \
Kojto 108:34e6b704fe68 1184 UART_ADVFEATURE_SWAP_INIT | \
Kojto 108:34e6b704fe68 1185 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \
Kojto 108:34e6b704fe68 1186 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
Kojto 108:34e6b704fe68 1187 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \
Kojto 108:34e6b704fe68 1188 UART_ADVFEATURE_MSBFIRST_INIT))
bogdanm 85:024bf7f99721 1189
Kojto 108:34e6b704fe68 1190 /**
Kojto 108:34e6b704fe68 1191 * @brief Ensure that UART frame TX inversion setting is valid.
Kojto 108:34e6b704fe68 1192 * @param __TXINV__: UART frame TX inversion setting.
Kojto 108:34e6b704fe68 1193 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
Kojto 108:34e6b704fe68 1194 */
Kojto 108:34e6b704fe68 1195 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \
Kojto 108:34e6b704fe68 1196 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
Kojto 108:34e6b704fe68 1197
Kojto 108:34e6b704fe68 1198 /**
Kojto 108:34e6b704fe68 1199 * @brief Ensure that UART frame RX inversion setting is valid.
Kojto 108:34e6b704fe68 1200 * @param __RXINV__: UART frame RX inversion setting.
Kojto 108:34e6b704fe68 1201 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
Kojto 108:34e6b704fe68 1202 */
Kojto 108:34e6b704fe68 1203 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \
Kojto 108:34e6b704fe68 1204 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
Kojto 108:34e6b704fe68 1205
Kojto 108:34e6b704fe68 1206 /**
Kojto 108:34e6b704fe68 1207 * @brief Ensure that UART frame data inversion setting is valid.
Kojto 108:34e6b704fe68 1208 * @param __DATAINV__: UART frame data inversion setting.
Kojto 108:34e6b704fe68 1209 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
Kojto 108:34e6b704fe68 1210 */
Kojto 108:34e6b704fe68 1211 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \
Kojto 108:34e6b704fe68 1212 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
Kojto 108:34e6b704fe68 1213
Kojto 108:34e6b704fe68 1214 /**
Kojto 108:34e6b704fe68 1215 * @brief Ensure that UART frame RX/TX pins swap setting is valid.
Kojto 108:34e6b704fe68 1216 * @param __SWAP__: UART frame RX/TX pins swap setting.
Kojto 108:34e6b704fe68 1217 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
Kojto 108:34e6b704fe68 1218 */
Kojto 108:34e6b704fe68 1219 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \
Kojto 108:34e6b704fe68 1220 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
Kojto 108:34e6b704fe68 1221
Kojto 108:34e6b704fe68 1222 /**
Kojto 108:34e6b704fe68 1223 * @brief Ensure that UART frame overrun setting is valid.
Kojto 108:34e6b704fe68 1224 * @param __OVERRUN__: UART frame overrun setting.
Kojto 108:34e6b704fe68 1225 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
bogdanm 85:024bf7f99721 1226 */
Kojto 108:34e6b704fe68 1227 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
Kojto 108:34e6b704fe68 1228 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
Kojto 108:34e6b704fe68 1229
Kojto 108:34e6b704fe68 1230 /**
Kojto 108:34e6b704fe68 1231 * @brief Ensure that UART auto Baud rate state is valid.
Kojto 108:34e6b704fe68 1232 * @param __AUTOBAUDRATE__: UART auto Baud rate state.
Kojto 108:34e6b704fe68 1233 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
Kojto 108:34e6b704fe68 1234 */
Kojto 108:34e6b704fe68 1235 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
Kojto 108:34e6b704fe68 1236 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
Kojto 108:34e6b704fe68 1237
Kojto 108:34e6b704fe68 1238 /**
Kojto 108:34e6b704fe68 1239 * @brief Ensure that UART DMA enabling or disabling on error setting is valid.
Kojto 108:34e6b704fe68 1240 * @param __DMA__: UART DMA enabling or disabling on error setting.
Kojto 108:34e6b704fe68 1241 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
Kojto 108:34e6b704fe68 1242 */
Kojto 108:34e6b704fe68 1243 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
Kojto 108:34e6b704fe68 1244 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
Kojto 108:34e6b704fe68 1245
Kojto 108:34e6b704fe68 1246 /**
Kojto 108:34e6b704fe68 1247 * @brief Ensure that UART frame MSB first setting is valid.
Kojto 108:34e6b704fe68 1248 * @param __MSBFIRST__: UART frame MSB first setting.
Kojto 108:34e6b704fe68 1249 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
Kojto 108:34e6b704fe68 1250 */
Kojto 108:34e6b704fe68 1251 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
Kojto 108:34e6b704fe68 1252 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
Kojto 108:34e6b704fe68 1253
Kojto 108:34e6b704fe68 1254 /**
Kojto 108:34e6b704fe68 1255 * @brief Ensure that UART mute mode state is valid.
Kojto 108:34e6b704fe68 1256 * @param __MUTE__: UART mute mode state.
Kojto 108:34e6b704fe68 1257 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
Kojto 108:34e6b704fe68 1258 */
Kojto 108:34e6b704fe68 1259 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
Kojto 108:34e6b704fe68 1260 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
Kojto 108:34e6b704fe68 1261
Kojto 108:34e6b704fe68 1262 /**
Kojto 108:34e6b704fe68 1263 * @brief Ensure that UART driver enable polarity is valid.
Kojto 108:34e6b704fe68 1264 * @param __POLARITY__: UART driver enable polarity.
Kojto 108:34e6b704fe68 1265 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
Kojto 108:34e6b704fe68 1266 */
Kojto 108:34e6b704fe68 1267 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \
Kojto 108:34e6b704fe68 1268 ((__POLARITY__) == UART_DE_POLARITY_LOW))
bogdanm 85:024bf7f99721 1269
bogdanm 85:024bf7f99721 1270 /**
bogdanm 85:024bf7f99721 1271 * @}
bogdanm 85:024bf7f99721 1272 */
bogdanm 85:024bf7f99721 1273
<> 134:ad3be0349dc5 1274 /* Include UART HAL Extended module */
Kojto 108:34e6b704fe68 1275 #include "stm32f0xx_hal_uart_ex.h"
bogdanm 85:024bf7f99721 1276
bogdanm 85:024bf7f99721 1277 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 1278 /** @addtogroup UART_Exported_Functions UART Exported Functions
bogdanm 92:4fc01daae5a5 1279 * @{
bogdanm 92:4fc01daae5a5 1280 */
Kojto 108:34e6b704fe68 1281
Kojto 108:34e6b704fe68 1282 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 92:4fc01daae5a5 1283 * @{
bogdanm 92:4fc01daae5a5 1284 */
bogdanm 92:4fc01daae5a5 1285
bogdanm 85:024bf7f99721 1286 /* Initialization and de-initialization functions ****************************/
bogdanm 85:024bf7f99721 1287 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
bogdanm 85:024bf7f99721 1288 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
bogdanm 85:024bf7f99721 1289 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
bogdanm 85:024bf7f99721 1290 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
bogdanm 85:024bf7f99721 1291 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
bogdanm 85:024bf7f99721 1292 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 1293
bogdanm 92:4fc01daae5a5 1294 /**
bogdanm 92:4fc01daae5a5 1295 * @}
bogdanm 92:4fc01daae5a5 1296 */
bogdanm 92:4fc01daae5a5 1297
Kojto 108:34e6b704fe68 1298 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions
bogdanm 92:4fc01daae5a5 1299 * @{
bogdanm 92:4fc01daae5a5 1300 */
bogdanm 85:024bf7f99721 1301
bogdanm 85:024bf7f99721 1302 /* IO operation functions *****************************************************/
bogdanm 85:024bf7f99721 1303 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 85:024bf7f99721 1304 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 85:024bf7f99721 1305 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
bogdanm 85:024bf7f99721 1306 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
bogdanm 85:024bf7f99721 1307 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
bogdanm 85:024bf7f99721 1308 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
bogdanm 85:024bf7f99721 1309 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
bogdanm 85:024bf7f99721 1310 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
bogdanm 85:024bf7f99721 1311 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
<> 134:ad3be0349dc5 1312 /* Transfer Abort functions */
<> 134:ad3be0349dc5 1313 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
<> 134:ad3be0349dc5 1314 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
<> 134:ad3be0349dc5 1315 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
<> 134:ad3be0349dc5 1316 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
<> 134:ad3be0349dc5 1317 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
<> 134:ad3be0349dc5 1318 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
<> 134:ad3be0349dc5 1319
Kojto 108:34e6b704fe68 1320 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 1321 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
bogdanm 85:024bf7f99721 1322 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
bogdanm 85:024bf7f99721 1323 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 1324 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
bogdanm 85:024bf7f99721 1325 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
<> 134:ad3be0349dc5 1326 void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart);
<> 134:ad3be0349dc5 1327 void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart);
<> 134:ad3be0349dc5 1328 void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 1329
bogdanm 92:4fc01daae5a5 1330 /**
bogdanm 92:4fc01daae5a5 1331 * @}
bogdanm 92:4fc01daae5a5 1332 */
bogdanm 92:4fc01daae5a5 1333
bogdanm 92:4fc01daae5a5 1334 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
bogdanm 92:4fc01daae5a5 1335 * @{
bogdanm 92:4fc01daae5a5 1336 */
bogdanm 85:024bf7f99721 1337
Kojto 108:34e6b704fe68 1338 /* Peripheral Control functions ************************************************/
bogdanm 92:4fc01daae5a5 1339 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 1340 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
Kojto 108:34e6b704fe68 1341 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 1342 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 1343 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
bogdanm 85:024bf7f99721 1344
bogdanm 92:4fc01daae5a5 1345 /**
bogdanm 92:4fc01daae5a5 1346 * @}
bogdanm 92:4fc01daae5a5 1347 */
bogdanm 92:4fc01daae5a5 1348
Kojto 108:34e6b704fe68 1349 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
bogdanm 92:4fc01daae5a5 1350 * @{
bogdanm 92:4fc01daae5a5 1351 */
bogdanm 92:4fc01daae5a5 1352
bogdanm 92:4fc01daae5a5 1353 /* Peripheral State and Errors functions **************************************************/
bogdanm 85:024bf7f99721 1354 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
Kojto 108:34e6b704fe68 1355 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
bogdanm 85:024bf7f99721 1356
bogdanm 85:024bf7f99721 1357 /**
bogdanm 85:024bf7f99721 1358 * @}
Kojto 108:34e6b704fe68 1359 */
bogdanm 85:024bf7f99721 1360
bogdanm 85:024bf7f99721 1361 /**
bogdanm 85:024bf7f99721 1362 * @}
Kojto 108:34e6b704fe68 1363 */
bogdanm 85:024bf7f99721 1364
Kojto 108:34e6b704fe68 1365 /* Private functions -----------------------------------------------------------*/
<> 134:ad3be0349dc5 1366 /** @addtogroup UART_Private_Functions UART Private Functions
bogdanm 92:4fc01daae5a5 1367 * @{
bogdanm 92:4fc01daae5a5 1368 */
bogdanm 92:4fc01daae5a5 1369 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 1370 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 1371 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 1372 HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
Kojto 108:34e6b704fe68 1373 HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 1374 HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
<> 134:ad3be0349dc5 1375 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
<> 134:ad3be0349dc5 1376
bogdanm 92:4fc01daae5a5 1377 /**
bogdanm 92:4fc01daae5a5 1378 * @}
Kojto 108:34e6b704fe68 1379 */
Kojto 108:34e6b704fe68 1380
bogdanm 92:4fc01daae5a5 1381 /**
bogdanm 92:4fc01daae5a5 1382 * @}
Kojto 108:34e6b704fe68 1383 */
bogdanm 92:4fc01daae5a5 1384
bogdanm 92:4fc01daae5a5 1385 /**
bogdanm 92:4fc01daae5a5 1386 * @}
bogdanm 92:4fc01daae5a5 1387 */
bogdanm 92:4fc01daae5a5 1388
bogdanm 85:024bf7f99721 1389 #ifdef __cplusplus
bogdanm 85:024bf7f99721 1390 }
bogdanm 85:024bf7f99721 1391 #endif
bogdanm 85:024bf7f99721 1392
bogdanm 85:024bf7f99721 1393 #endif /* __STM32F0xx_HAL_UART_H */
bogdanm 85:024bf7f99721 1394
bogdanm 85:024bf7f99721 1395 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 92:4fc01daae5a5 1396