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TARGET_NUCLEO_F030R8/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_pwr_ex.h@143:86740a56073b, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:30:20 2017 +0100
Revision:
143:86740a56073b
Parent:
134:ad3be0349dc5 
Release 143 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 85:024bf7f99721 1 /**
bogdanm 85:024bf7f99721 2 ******************************************************************************
bogdanm 85:024bf7f99721 3 * @file stm32f0xx_hal_pwr_ex.h
bogdanm 85:024bf7f99721 4 * @author MCD Application Team
<> 134:ad3be0349dc5 5 * @version V1.5.0
<> 134:ad3be0349dc5 6 * @date 04-November-2016
bogdanm 85:024bf7f99721 7 * @brief Header file of PWR HAL Extension module.
bogdanm 85:024bf7f99721 8 ******************************************************************************
bogdanm 85:024bf7f99721 9 * @attention
bogdanm 85:024bf7f99721 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm 85:024bf7f99721 12 *
bogdanm 85:024bf7f99721 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 85:024bf7f99721 14 * are permitted provided that the following conditions are met:
bogdanm 85:024bf7f99721 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 85:024bf7f99721 16 * this list of conditions and the following disclaimer.
bogdanm 85:024bf7f99721 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 85:024bf7f99721 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 85:024bf7f99721 19 * and/or other materials provided with the distribution.
bogdanm 85:024bf7f99721 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 85:024bf7f99721 21 * may be used to endorse or promote products derived from this software
bogdanm 85:024bf7f99721 22 * without specific prior written permission.
bogdanm 85:024bf7f99721 23 *
bogdanm 85:024bf7f99721 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 85:024bf7f99721 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 85:024bf7f99721 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 85:024bf7f99721 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 85:024bf7f99721 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 85:024bf7f99721 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 85:024bf7f99721 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 85:024bf7f99721 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 85:024bf7f99721 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 85:024bf7f99721 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 85:024bf7f99721 34 *
bogdanm 85:024bf7f99721 35 ******************************************************************************
bogdanm 85:024bf7f99721 36 */
bogdanm 85:024bf7f99721 37
bogdanm 85:024bf7f99721 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 85:024bf7f99721 39 #ifndef __STM32F0xx_HAL_PWR_EX_H
bogdanm 85:024bf7f99721 40 #define __STM32F0xx_HAL_PWR_EX_H
bogdanm 85:024bf7f99721 41
bogdanm 85:024bf7f99721 42 #ifdef __cplusplus
bogdanm 85:024bf7f99721 43 extern "C" {
bogdanm 85:024bf7f99721 44 #endif
bogdanm 85:024bf7f99721 45
bogdanm 85:024bf7f99721 46 /* Includes ------------------------------------------------------------------*/
bogdanm 85:024bf7f99721 47 #include "stm32f0xx_hal_def.h"
bogdanm 85:024bf7f99721 48
bogdanm 85:024bf7f99721 49 /** @addtogroup STM32F0xx_HAL_Driver
bogdanm 85:024bf7f99721 50 * @{
bogdanm 85:024bf7f99721 51 */
bogdanm 85:024bf7f99721 52
bogdanm 85:024bf7f99721 53 /** @addtogroup PWREx
bogdanm 85:024bf7f99721 54 * @{
bogdanm 85:024bf7f99721 55 */
bogdanm 85:024bf7f99721 56
bogdanm 85:024bf7f99721 57 /* Exported types ------------------------------------------------------------*/
bogdanm 85:024bf7f99721 58
bogdanm 92:4fc01daae5a5 59 /** @defgroup PWREx_Exported_Types PWREx Exported Types
bogdanm 92:4fc01daae5a5 60 * @{
bogdanm 92:4fc01daae5a5 61 */
bogdanm 92:4fc01daae5a5 62
bogdanm 85:024bf7f99721 63 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
bogdanm 92:4fc01daae5a5 64 defined (STM32F071xB) || defined (STM32F072xB) || \
bogdanm 92:4fc01daae5a5 65 defined (STM32F091xC)
bogdanm 85:024bf7f99721 66
bogdanm 85:024bf7f99721 67 /**
bogdanm 85:024bf7f99721 68 * @brief PWR PVD configuration structure definition
bogdanm 85:024bf7f99721 69 */
bogdanm 85:024bf7f99721 70 typedef struct
bogdanm 85:024bf7f99721 71 {
bogdanm 85:024bf7f99721 72 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level
bogdanm 85:024bf7f99721 73 This parameter can be a value of @ref PWREx_PVD_detection_level */
bogdanm 85:024bf7f99721 74
bogdanm 85:024bf7f99721 75 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
bogdanm 85:024bf7f99721 76 This parameter can be a value of @ref PWREx_PVD_Mode */
bogdanm 85:024bf7f99721 77 }PWR_PVDTypeDef;
bogdanm 85:024bf7f99721 78
bogdanm 85:024bf7f99721 79 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
bogdanm 92:4fc01daae5a5 80 /* defined (STM32F071xB) || defined (STM32F072xB) || */
bogdanm 92:4fc01daae5a5 81 /* defined (STM32F091xC) */
bogdanm 92:4fc01daae5a5 82 /**
bogdanm 92:4fc01daae5a5 83 * @}
bogdanm 92:4fc01daae5a5 84 */
bogdanm 92:4fc01daae5a5 85 /* Exported constants --------------------------------------------------------*/
bogdanm 85:024bf7f99721 86
bogdanm 92:4fc01daae5a5 87 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
bogdanm 85:024bf7f99721 88 * @{
bogdanm 85:024bf7f99721 89 */
bogdanm 85:024bf7f99721 90
bogdanm 92:4fc01daae5a5 91
bogdanm 92:4fc01daae5a5 92 /** @defgroup PWREx_WakeUp_Pins PWREx Wakeup Pins
bogdanm 85:024bf7f99721 93 * @{
bogdanm 85:024bf7f99721 94 */
Kojto 122:f9eeca106725 95 #if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
Kojto 122:f9eeca106725 96 defined (STM32F091xC) || defined (STM32F098xx)
Kojto 122:f9eeca106725 97 #define PWR_WAKEUP_PIN1 ((uint32_t)PWR_CSR_EWUP1)
Kojto 122:f9eeca106725 98 #define PWR_WAKEUP_PIN2 ((uint32_t)PWR_CSR_EWUP2)
Kojto 122:f9eeca106725 99 #define PWR_WAKEUP_PIN3 ((uint32_t)PWR_CSR_EWUP3)
Kojto 122:f9eeca106725 100 #define PWR_WAKEUP_PIN4 ((uint32_t)PWR_CSR_EWUP4)
Kojto 122:f9eeca106725 101 #define PWR_WAKEUP_PIN5 ((uint32_t)PWR_CSR_EWUP5)
Kojto 122:f9eeca106725 102 #define PWR_WAKEUP_PIN6 ((uint32_t)PWR_CSR_EWUP6)
Kojto 122:f9eeca106725 103 #define PWR_WAKEUP_PIN7 ((uint32_t)PWR_CSR_EWUP7)
Kojto 122:f9eeca106725 104 #define PWR_WAKEUP_PIN8 ((uint32_t)PWR_CSR_EWUP8)
bogdanm 85:024bf7f99721 105
bogdanm 85:024bf7f99721 106 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
bogdanm 85:024bf7f99721 107 ((PIN) == PWR_WAKEUP_PIN2) || \
bogdanm 85:024bf7f99721 108 ((PIN) == PWR_WAKEUP_PIN3) || \
bogdanm 85:024bf7f99721 109 ((PIN) == PWR_WAKEUP_PIN4) || \
bogdanm 85:024bf7f99721 110 ((PIN) == PWR_WAKEUP_PIN5) || \
bogdanm 85:024bf7f99721 111 ((PIN) == PWR_WAKEUP_PIN6) || \
bogdanm 85:024bf7f99721 112 ((PIN) == PWR_WAKEUP_PIN7) || \
bogdanm 85:024bf7f99721 113 ((PIN) == PWR_WAKEUP_PIN8))
Kojto 122:f9eeca106725 114
Kojto 122:f9eeca106725 115 #elif defined(STM32F030xC) || defined (STM32F070xB)
Kojto 122:f9eeca106725 116 #define PWR_WAKEUP_PIN1 ((uint32_t)PWR_CSR_EWUP1)
Kojto 122:f9eeca106725 117 #define PWR_WAKEUP_PIN2 ((uint32_t)PWR_CSR_EWUP2)
Kojto 122:f9eeca106725 118 #define PWR_WAKEUP_PIN4 ((uint32_t)PWR_CSR_EWUP4)
Kojto 122:f9eeca106725 119 #define PWR_WAKEUP_PIN5 ((uint32_t)PWR_CSR_EWUP5)
Kojto 122:f9eeca106725 120 #define PWR_WAKEUP_PIN6 ((uint32_t)PWR_CSR_EWUP6)
Kojto 122:f9eeca106725 121 #define PWR_WAKEUP_PIN7 ((uint32_t)PWR_CSR_EWUP7)
Kojto 122:f9eeca106725 122
Kojto 122:f9eeca106725 123 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
Kojto 122:f9eeca106725 124 ((PIN) == PWR_WAKEUP_PIN2) || \
Kojto 122:f9eeca106725 125 ((PIN) == PWR_WAKEUP_PIN4) || \
Kojto 122:f9eeca106725 126 ((PIN) == PWR_WAKEUP_PIN5) || \
Kojto 122:f9eeca106725 127 ((PIN) == PWR_WAKEUP_PIN6) || \
Kojto 122:f9eeca106725 128 ((PIN) == PWR_WAKEUP_PIN7))
Kojto 122:f9eeca106725 129
Kojto 122:f9eeca106725 130 #elif defined(STM32F042x6) || defined (STM32F048xx)
Kojto 122:f9eeca106725 131 #define PWR_WAKEUP_PIN1 ((uint32_t)PWR_CSR_EWUP1)
Kojto 122:f9eeca106725 132 #define PWR_WAKEUP_PIN2 ((uint32_t)PWR_CSR_EWUP2)
Kojto 122:f9eeca106725 133 #define PWR_WAKEUP_PIN4 ((uint32_t)PWR_CSR_EWUP4)
Kojto 122:f9eeca106725 134 #define PWR_WAKEUP_PIN6 ((uint32_t)PWR_CSR_EWUP6)
Kojto 122:f9eeca106725 135 #define PWR_WAKEUP_PIN7 ((uint32_t)PWR_CSR_EWUP7)
Kojto 122:f9eeca106725 136
Kojto 122:f9eeca106725 137 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
Kojto 122:f9eeca106725 138 ((PIN) == PWR_WAKEUP_PIN2) || \
Kojto 122:f9eeca106725 139 ((PIN) == PWR_WAKEUP_PIN4) || \
Kojto 122:f9eeca106725 140 ((PIN) == PWR_WAKEUP_PIN6) || \
Kojto 122:f9eeca106725 141 ((PIN) == PWR_WAKEUP_PIN7))
Kojto 122:f9eeca106725 142
Kojto 122:f9eeca106725 143 #else
Kojto 122:f9eeca106725 144 #define PWR_WAKEUP_PIN1 ((uint32_t)PWR_CSR_EWUP1)
Kojto 122:f9eeca106725 145 #define PWR_WAKEUP_PIN2 ((uint32_t)PWR_CSR_EWUP2)
Kojto 122:f9eeca106725 146
bogdanm 85:024bf7f99721 147
bogdanm 85:024bf7f99721 148 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
bogdanm 85:024bf7f99721 149 ((PIN) == PWR_WAKEUP_PIN2))
Kojto 122:f9eeca106725 150
Kojto 122:f9eeca106725 151 #endif
Kojto 122:f9eeca106725 152
bogdanm 92:4fc01daae5a5 153 /**
bogdanm 92:4fc01daae5a5 154 * @}
bogdanm 92:4fc01daae5a5 155 */
bogdanm 92:4fc01daae5a5 156
bogdanm 92:4fc01daae5a5 157 /** @defgroup PWREx_EXTI_Line PWREx EXTI Line
bogdanm 92:4fc01daae5a5 158 * @{
bogdanm 92:4fc01daae5a5 159 */
bogdanm 92:4fc01daae5a5 160 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
bogdanm 92:4fc01daae5a5 161 defined (STM32F071xB) || defined (STM32F072xB) || \
bogdanm 92:4fc01daae5a5 162 defined (STM32F091xC)
bogdanm 92:4fc01daae5a5 163
Kojto 108:34e6b704fe68 164 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
bogdanm 92:4fc01daae5a5 165
bogdanm 92:4fc01daae5a5 166 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
bogdanm 92:4fc01daae5a5 167 /* defined (STM32F071xB) || defined (STM32F072xB) || */
bogdanm 92:4fc01daae5a5 168 /* defined (STM32F091xC) */
bogdanm 92:4fc01daae5a5 169
bogdanm 92:4fc01daae5a5 170 #if defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 92:4fc01daae5a5 171 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 172 defined (STM32F091xC) || defined (STM32F098xx)
bogdanm 92:4fc01daae5a5 173
Kojto 108:34e6b704fe68 174 #define PWR_EXTI_LINE_VDDIO2 ((uint32_t)EXTI_IMR_MR31) /*!< External interrupt line 31 Connected to the Vddio2 Monitor EXTI Line */
bogdanm 92:4fc01daae5a5 175
Kojto 93:e188a91d3eaa 176 #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\
bogdanm 92:4fc01daae5a5 177 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
Kojto 93:e188a91d3eaa 178 defined (STM32F091xC) || defined (STM32F098xx) ||*/
bogdanm 85:024bf7f99721 179 /**
bogdanm 85:024bf7f99721 180 * @}
bogdanm 85:024bf7f99721 181 */
bogdanm 85:024bf7f99721 182
bogdanm 85:024bf7f99721 183 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
bogdanm 92:4fc01daae5a5 184 defined (STM32F071xB) || defined (STM32F072xB) || \
bogdanm 92:4fc01daae5a5 185 defined (STM32F091xC)
bogdanm 92:4fc01daae5a5 186 /** @defgroup PWREx_PVD_detection_level PWREx PVD detection level
bogdanm 85:024bf7f99721 187 * @{
bogdanm 85:024bf7f99721 188 */
bogdanm 92:4fc01daae5a5 189 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
bogdanm 92:4fc01daae5a5 190 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
bogdanm 92:4fc01daae5a5 191 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
bogdanm 92:4fc01daae5a5 192 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
bogdanm 92:4fc01daae5a5 193 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
bogdanm 92:4fc01daae5a5 194 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
bogdanm 92:4fc01daae5a5 195 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
bogdanm 92:4fc01daae5a5 196 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7
bogdanm 85:024bf7f99721 197 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
bogdanm 85:024bf7f99721 198 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
bogdanm 85:024bf7f99721 199 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
bogdanm 85:024bf7f99721 200 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
bogdanm 85:024bf7f99721 201 /**
bogdanm 85:024bf7f99721 202 * @}
bogdanm 85:024bf7f99721 203 */
bogdanm 85:024bf7f99721 204
bogdanm 92:4fc01daae5a5 205 /** @defgroup PWREx_PVD_Mode PWREx PVD Mode
bogdanm 85:024bf7f99721 206 * @{
bogdanm 85:024bf7f99721 207 */
<> 134:ad3be0349dc5 208 #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< basic mode is used */
<> 134:ad3be0349dc5 209 #define PWR_PVD_MODE_IT_RISING (0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */
<> 134:ad3be0349dc5 210 #define PWR_PVD_MODE_IT_FALLING (0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */
<> 134:ad3be0349dc5 211 #define PWR_PVD_MODE_IT_RISING_FALLING (0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
<> 134:ad3be0349dc5 212 #define PWR_PVD_MODE_EVENT_RISING (0x00020001U) /*!< Event Mode with Rising edge trigger detection */
<> 134:ad3be0349dc5 213 #define PWR_PVD_MODE_EVENT_FALLING (0x00020002U) /*!< Event Mode with Falling edge trigger detection */
<> 134:ad3be0349dc5 214 #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */
bogdanm 92:4fc01daae5a5 215
bogdanm 92:4fc01daae5a5 216 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
bogdanm 92:4fc01daae5a5 217 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
bogdanm 92:4fc01daae5a5 218 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
bogdanm 92:4fc01daae5a5 219 ((MODE) == PWR_PVD_MODE_NORMAL))
bogdanm 85:024bf7f99721 220 /**
bogdanm 85:024bf7f99721 221 * @}
bogdanm 85:024bf7f99721 222 */
bogdanm 85:024bf7f99721 223 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
bogdanm 92:4fc01daae5a5 224 /* defined (STM32F071xB) || defined (STM32F072xB) || */
bogdanm 92:4fc01daae5a5 225 /* defined (STM32F091xC) */
bogdanm 85:024bf7f99721 226
bogdanm 92:4fc01daae5a5 227 /** @defgroup PWREx_Flag PWREx Flag
bogdanm 85:024bf7f99721 228 * @{
bogdanm 85:024bf7f99721 229 */
bogdanm 85:024bf7f99721 230 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
bogdanm 92:4fc01daae5a5 231 defined (STM32F071xB) || defined (STM32F072xB) || \
bogdanm 92:4fc01daae5a5 232 defined (STM32F091xC)
bogdanm 85:024bf7f99721 233
bogdanm 92:4fc01daae5a5 234 #define PWR_FLAG_WU PWR_CSR_WUF
bogdanm 92:4fc01daae5a5 235 #define PWR_FLAG_SB PWR_CSR_SBF
bogdanm 92:4fc01daae5a5 236 #define PWR_FLAG_PVDO PWR_CSR_PVDO
bogdanm 92:4fc01daae5a5 237 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
Kojto 93:e188a91d3eaa 238 #elif defined (STM32F070x6) || defined (STM32F070xB) || defined (STM32F030xC)
Kojto 93:e188a91d3eaa 239 #define PWR_FLAG_WU PWR_CSR_WUF
Kojto 93:e188a91d3eaa 240 #define PWR_FLAG_SB PWR_CSR_SBF
Kojto 93:e188a91d3eaa 241 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
bogdanm 85:024bf7f99721 242 #else
bogdanm 92:4fc01daae5a5 243 #define PWR_FLAG_WU PWR_CSR_WUF
bogdanm 92:4fc01daae5a5 244 #define PWR_FLAG_SB PWR_CSR_SBF
bogdanm 85:024bf7f99721 245
bogdanm 85:024bf7f99721 246 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
bogdanm 92:4fc01daae5a5 247 /* defined (STM32F071xB) || defined (STM32F072xB) || */
bogdanm 92:4fc01daae5a5 248 /* defined (STM32F091xC) */
bogdanm 85:024bf7f99721 249 /**
bogdanm 85:024bf7f99721 250 * @}
bogdanm 85:024bf7f99721 251 */
bogdanm 85:024bf7f99721 252
bogdanm 85:024bf7f99721 253 /**
bogdanm 85:024bf7f99721 254 * @}
bogdanm 85:024bf7f99721 255 */
bogdanm 85:024bf7f99721 256
bogdanm 85:024bf7f99721 257 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 258 /** @defgroup PWREx_Exported_Macros PWREx Exported Macros
bogdanm 85:024bf7f99721 259 * @{
bogdanm 85:024bf7f99721 260 */
bogdanm 85:024bf7f99721 261 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
bogdanm 92:4fc01daae5a5 262 defined (STM32F071xB) || defined (STM32F072xB) || \
bogdanm 92:4fc01daae5a5 263 defined (STM32F091xC)
bogdanm 92:4fc01daae5a5 264 /**
bogdanm 92:4fc01daae5a5 265 * @brief Enable interrupt on PVD Exti Line 16.
bogdanm 92:4fc01daae5a5 266 * @retval None.
bogdanm 92:4fc01daae5a5 267 */
bogdanm 92:4fc01daae5a5 268 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
bogdanm 92:4fc01daae5a5 269
bogdanm 85:024bf7f99721 270 /**
bogdanm 92:4fc01daae5a5 271 * @brief Disable interrupt on PVD Exti Line 16.
bogdanm 92:4fc01daae5a5 272 * @retval None.
bogdanm 92:4fc01daae5a5 273 */
bogdanm 92:4fc01daae5a5 274 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
bogdanm 92:4fc01daae5a5 275
bogdanm 92:4fc01daae5a5 276 /**
bogdanm 92:4fc01daae5a5 277 * @brief Enable event on PVD Exti Line 16.
bogdanm 92:4fc01daae5a5 278 * @retval None.
bogdanm 92:4fc01daae5a5 279 */
bogdanm 92:4fc01daae5a5 280 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
bogdanm 92:4fc01daae5a5 281
bogdanm 92:4fc01daae5a5 282 /**
bogdanm 92:4fc01daae5a5 283 * @brief Disable event on PVD Exti Line 16.
bogdanm 85:024bf7f99721 284 * @retval None.
bogdanm 85:024bf7f99721 285 */
bogdanm 92:4fc01daae5a5 286 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
bogdanm 92:4fc01daae5a5 287
bogdanm 92:4fc01daae5a5 288 /**
Kojto 108:34e6b704fe68 289 * @brief Disable the PVD Extended Interrupt Rising Trigger.
Kojto 108:34e6b704fe68 290 * @retval None.
Kojto 108:34e6b704fe68 291 */
Kojto 108:34e6b704fe68 292 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
Kojto 108:34e6b704fe68 293
Kojto 108:34e6b704fe68 294 /**
Kojto 108:34e6b704fe68 295 * @brief Disable the PVD Extended Interrupt Falling Trigger.
bogdanm 92:4fc01daae5a5 296 * @retval None.
bogdanm 92:4fc01daae5a5 297 */
Kojto 108:34e6b704fe68 298 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
Kojto 108:34e6b704fe68 299
Kojto 108:34e6b704fe68 300 /**
Kojto 108:34e6b704fe68 301 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
Kojto 108:34e6b704fe68 302 * @retval None
Kojto 108:34e6b704fe68 303 */
Kojto 108:34e6b704fe68 304 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
Kojto 108:34e6b704fe68 305
bogdanm 92:4fc01daae5a5 306
bogdanm 92:4fc01daae5a5 307 /**
bogdanm 92:4fc01daae5a5 308 * @brief PVD EXTI line configuration: set falling edge trigger.
bogdanm 92:4fc01daae5a5 309 * @retval None.
bogdanm 92:4fc01daae5a5 310 */
Kojto 108:34e6b704fe68 311 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() EXTI->FTSR |= (PWR_EXTI_LINE_PVD)
bogdanm 85:024bf7f99721 312
bogdanm 85:024bf7f99721 313 /**
bogdanm 92:4fc01daae5a5 314 * @brief PVD EXTI line configuration: set rising edge trigger.
bogdanm 85:024bf7f99721 315 * @retval None.
bogdanm 85:024bf7f99721 316 */
Kojto 108:34e6b704fe68 317 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() EXTI->RTSR |= (PWR_EXTI_LINE_PVD)
Kojto 108:34e6b704fe68 318
Kojto 108:34e6b704fe68 319 /**
Kojto 108:34e6b704fe68 320 * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger.
Kojto 108:34e6b704fe68 321 * @retval None
Kojto 108:34e6b704fe68 322 */
Kojto 108:34e6b704fe68 323 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
bogdanm 92:4fc01daae5a5 324
bogdanm 92:4fc01daae5a5 325 /**
bogdanm 92:4fc01daae5a5 326 * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
bogdanm 92:4fc01daae5a5 327 * @retval EXTI PVD Line Status.
bogdanm 92:4fc01daae5a5 328 */
bogdanm 92:4fc01daae5a5 329 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
bogdanm 92:4fc01daae5a5 330
bogdanm 92:4fc01daae5a5 331 /**
bogdanm 92:4fc01daae5a5 332 * @brief Clear the PVD EXTI flag.
bogdanm 92:4fc01daae5a5 333 * @retval None.
bogdanm 92:4fc01daae5a5 334 */
bogdanm 92:4fc01daae5a5 335 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
bogdanm 85:024bf7f99721 336
bogdanm 85:024bf7f99721 337 /**
bogdanm 85:024bf7f99721 338 * @brief Generate a Software interrupt on selected EXTI line.
bogdanm 92:4fc01daae5a5 339 * @retval None.
bogdanm 85:024bf7f99721 340 */
bogdanm 92:4fc01daae5a5 341 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
bogdanm 92:4fc01daae5a5 342
bogdanm 92:4fc01daae5a5 343 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
bogdanm 92:4fc01daae5a5 344 /* defined (STM32F071xB) || defined (STM32F072xB) || */
bogdanm 92:4fc01daae5a5 345 /* defined (STM32F091xC) */
bogdanm 92:4fc01daae5a5 346
bogdanm 92:4fc01daae5a5 347
bogdanm 92:4fc01daae5a5 348 #if defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 92:4fc01daae5a5 349 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 350 defined (STM32F091xC) || defined (STM32F098xx)
bogdanm 92:4fc01daae5a5 351 /**
bogdanm 92:4fc01daae5a5 352 * @brief Enable interrupt on Vddio2 Monitor Exti Line 31.
bogdanm 92:4fc01daae5a5 353 * @retval None.
bogdanm 92:4fc01daae5a5 354 */
bogdanm 92:4fc01daae5a5 355 #define __HAL_PWR_VDDIO2_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_VDDIO2))
bogdanm 92:4fc01daae5a5 356
bogdanm 92:4fc01daae5a5 357 /**
bogdanm 92:4fc01daae5a5 358 * @brief Disable interrupt on Vddio2 Monitor Exti Line 31.
bogdanm 92:4fc01daae5a5 359 * @retval None.
bogdanm 92:4fc01daae5a5 360 */
bogdanm 92:4fc01daae5a5 361 #define __HAL_PWR_VDDIO2_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_VDDIO2))
bogdanm 85:024bf7f99721 362
bogdanm 85:024bf7f99721 363 /**
bogdanm 92:4fc01daae5a5 364 * @brief Vddio2 Monitor EXTI line configuration: clear falling edge and rising edge trigger.
bogdanm 92:4fc01daae5a5 365 * @retval None.
bogdanm 85:024bf7f99721 366 */
Kojto 122:f9eeca106725 367 #define __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE() \
Kojto 122:f9eeca106725 368 do{ \
Kojto 122:f9eeca106725 369 EXTI->FTSR &= ~(PWR_EXTI_LINE_VDDIO2); \
Kojto 122:f9eeca106725 370 EXTI->RTSR &= ~(PWR_EXTI_LINE_VDDIO2); \
Kojto 122:f9eeca106725 371 } while(0)
Kojto 122:f9eeca106725 372
bogdanm 92:4fc01daae5a5 373 /**
bogdanm 92:4fc01daae5a5 374 * @brief Vddio2 Monitor EXTI line configuration: set falling edge trigger.
bogdanm 92:4fc01daae5a5 375 * @retval None.
bogdanm 92:4fc01daae5a5 376 */
Kojto 108:34e6b704fe68 377 #define __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE() EXTI->FTSR |= (PWR_EXTI_LINE_VDDIO2)
bogdanm 85:024bf7f99721 378
bogdanm 85:024bf7f99721 379 /**
bogdanm 92:4fc01daae5a5 380 * @brief Check whether the specified VDDIO2 monitor EXTI interrupt flag is set or not.
bogdanm 92:4fc01daae5a5 381 * @retval EXTI VDDIO2 Monitor Line Status.
bogdanm 92:4fc01daae5a5 382 */
bogdanm 92:4fc01daae5a5 383 #define __HAL_PWR_VDDIO2_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_VDDIO2))
bogdanm 92:4fc01daae5a5 384
bogdanm 92:4fc01daae5a5 385 /**
bogdanm 92:4fc01daae5a5 386 * @brief Clear the VDDIO2 Monitor EXTI flag.
bogdanm 85:024bf7f99721 387 * @retval None.
bogdanm 85:024bf7f99721 388 */
bogdanm 92:4fc01daae5a5 389 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_VDDIO2))
bogdanm 85:024bf7f99721 390
bogdanm 92:4fc01daae5a5 391 /**
bogdanm 92:4fc01daae5a5 392 * @brief Generate a Software interrupt on selected EXTI line.
bogdanm 92:4fc01daae5a5 393 * @retval None.
bogdanm 92:4fc01daae5a5 394 */
bogdanm 92:4fc01daae5a5 395 #define __HAL_PWR_VDDIO2_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_VDDIO2))
bogdanm 92:4fc01daae5a5 396
bogdanm 92:4fc01daae5a5 397
Kojto 93:e188a91d3eaa 398 #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\
bogdanm 92:4fc01daae5a5 399 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 400 defined (STM32F091xC) || defined (STM32F098xx) */
bogdanm 92:4fc01daae5a5 401
bogdanm 85:024bf7f99721 402 /**
bogdanm 85:024bf7f99721 403 * @}
bogdanm 85:024bf7f99721 404 */
bogdanm 85:024bf7f99721 405
bogdanm 92:4fc01daae5a5 406 /* Exported functions --------------------------------------------------------*/
bogdanm 85:024bf7f99721 407
bogdanm 92:4fc01daae5a5 408 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
bogdanm 92:4fc01daae5a5 409 * @{
bogdanm 92:4fc01daae5a5 410 */
bogdanm 85:024bf7f99721 411
bogdanm 92:4fc01daae5a5 412 /** @addtogroup PWREx_Exported_Functions_Group1
bogdanm 92:4fc01daae5a5 413 * @{
bogdanm 92:4fc01daae5a5 414 */
bogdanm 92:4fc01daae5a5 415 /* I/O operation functions ***************************************************/
bogdanm 85:024bf7f99721 416 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
bogdanm 92:4fc01daae5a5 417 defined (STM32F071xB) || defined (STM32F072xB) || \
bogdanm 92:4fc01daae5a5 418 defined (STM32F091xC)
bogdanm 85:024bf7f99721 419 void HAL_PWR_PVD_IRQHandler(void);
bogdanm 85:024bf7f99721 420 void HAL_PWR_PVDCallback(void);
bogdanm 92:4fc01daae5a5 421 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
bogdanm 92:4fc01daae5a5 422 /* defined (STM32F071xB) || defined (STM32F072xB) || */
bogdanm 92:4fc01daae5a5 423 /* defined (STM32F091xC) */
bogdanm 92:4fc01daae5a5 424
bogdanm 92:4fc01daae5a5 425 #if defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 92:4fc01daae5a5 426 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 427 defined (STM32F091xC) || defined (STM32F098xx)
Kojto 108:34e6b704fe68 428 void HAL_PWREx_Vddio2Monitor_IRQHandler(void);
Kojto 108:34e6b704fe68 429 void HAL_PWREx_Vddio2MonitorCallback(void);
bogdanm 92:4fc01daae5a5 430 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 92:4fc01daae5a5 431 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 432 defined (STM32F091xC) || defined (STM32F098xx) */
bogdanm 85:024bf7f99721 433
bogdanm 85:024bf7f99721 434 /* Peripheral Control functions **********************************************/
bogdanm 92:4fc01daae5a5 435 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
bogdanm 92:4fc01daae5a5 436 defined (STM32F071xB) || defined (STM32F072xB) || \
bogdanm 92:4fc01daae5a5 437 defined (STM32F091xC)
Kojto 108:34e6b704fe68 438 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
bogdanm 85:024bf7f99721 439 void HAL_PWR_EnablePVD(void);
bogdanm 85:024bf7f99721 440 void HAL_PWR_DisablePVD(void);
bogdanm 92:4fc01daae5a5 441 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
bogdanm 92:4fc01daae5a5 442 /* defined (STM32F071xB) || defined (STM32F072xB) || */
bogdanm 92:4fc01daae5a5 443 /* defined (STM32F091xC) */
bogdanm 92:4fc01daae5a5 444
bogdanm 92:4fc01daae5a5 445 #if defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 92:4fc01daae5a5 446 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 447 defined (STM32F091xC) || defined (STM32F098xx)
Kojto 108:34e6b704fe68 448 void HAL_PWREx_EnableVddio2Monitor(void);
Kojto 108:34e6b704fe68 449 void HAL_PWREx_DisableVddio2Monitor(void);
bogdanm 92:4fc01daae5a5 450 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 92:4fc01daae5a5 451 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 452 defined (STM32F091xC) || defined (STM32F098xx) */
bogdanm 85:024bf7f99721 453
bogdanm 92:4fc01daae5a5 454 /**
bogdanm 92:4fc01daae5a5 455 * @}
bogdanm 92:4fc01daae5a5 456 */
bogdanm 92:4fc01daae5a5 457
bogdanm 92:4fc01daae5a5 458 /**
bogdanm 92:4fc01daae5a5 459 * @}
bogdanm 92:4fc01daae5a5 460 */
bogdanm 85:024bf7f99721 461
bogdanm 85:024bf7f99721 462 /**
bogdanm 85:024bf7f99721 463 * @}
bogdanm 85:024bf7f99721 464 */
bogdanm 85:024bf7f99721 465
bogdanm 85:024bf7f99721 466 /**
bogdanm 85:024bf7f99721 467 * @}
bogdanm 85:024bf7f99721 468 */
bogdanm 85:024bf7f99721 469
bogdanm 85:024bf7f99721 470 #ifdef __cplusplus
bogdanm 85:024bf7f99721 471 }
bogdanm 85:024bf7f99721 472 #endif
bogdanm 85:024bf7f99721 473
bogdanm 85:024bf7f99721 474 #endif /* __STM32F0xx_HAL_PWR_EX_H */
bogdanm 85:024bf7f99721 475
bogdanm 85:024bf7f99721 476 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 92:4fc01daae5a5 477