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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_EFM32LG_STK3600/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_ldma.h@139:856d2700e60b, 2017-03-30 (annotated)

Committer:
<>
Date:
Thu Mar 30 13:26:47 2017 +0100
Revision:
139:856d2700e60b
Parent:
128:9bcdf88f62b0 
Release 139 of the mbed library



Ports for Upcoming Targets



3934: [Silicon Labs] Update to HAL and devices https://github.com/ARMmbed/mbed-os/pull/3934



Known Issues



There is an issue with LPC1768 failing the 'Semihost file system' test with this release.



Fixes and Changes



3691: [TLS / hw acceleration] AES ECB for NUCLEO_F439ZI https://github.com/ARMmbed/mbed-os/pull/3691

3869: NCS36510: Default range changed from 0 to 950mV - ADC  https://github.com/ARMmbed/mbed-os/pull/3869

3893: [STM32F7] Update STM32 Cube version v1.6.0 https://github.com/ARMmbed/mbed-os/pull/3893

3917: Fix  mistake register setting in serial_format() https://github.com/ARMmbed/mbed-os/pull/3917

3927: [DELTA_DFBM_NQ620] Add RC calibration setting and revise mbed_overrides.c https://github.com/ARMmbed/mbed-os/pull/3927

3918: [NUC472/M453] Support unique locally administered MAC address and other driver updates https://github.com/ARMmbed/mbed-os/pull/3918

3920: Heap size adjusted to work for both tls-client and mbed-client https://github.com/ARMmbed/mbed-os/pull/3920

3969: NUCLEO_F302R8: Add missing PB_8/PB_9 CAN pins https://github.com/ARMmbed/mbed-os/pull/3969

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 113:f141b2784e32 1 /***************************************************************************//**
Kojto 113:f141b2784e32 2 * @file em_ldma.h
Kojto 113:f141b2784e32 3 * @brief Direct memory access (LDMA) API
<> 139:856d2700e60b 4 * @version 5.1.2
Kojto 113:f141b2784e32 5 *******************************************************************************
Kojto 113:f141b2784e32 6 * @section License
<> 128:9bcdf88f62b0 7 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
Kojto 113:f141b2784e32 8 *******************************************************************************
Kojto 113:f141b2784e32 9 *
Kojto 113:f141b2784e32 10 * Permission is granted to anyone to use this software for any purpose,
Kojto 113:f141b2784e32 11 * including commercial applications, and to alter it and redistribute it
Kojto 113:f141b2784e32 12 * freely, subject to the following restrictions:
Kojto 113:f141b2784e32 13 *
Kojto 113:f141b2784e32 14 * 1. The origin of this software must not be misrepresented; you must not
Kojto 113:f141b2784e32 15 * claim that you wrote the original software.@n
Kojto 113:f141b2784e32 16 * 2. Altered source versions must be plainly marked as such, and must not be
Kojto 113:f141b2784e32 17 * misrepresented as being the original software.@n
Kojto 113:f141b2784e32 18 * 3. This notice may not be removed or altered from any source distribution.
Kojto 113:f141b2784e32 19 *
Kojto 113:f141b2784e32 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
Kojto 113:f141b2784e32 21 * obligation to support this Software. Silicon Labs is providing the
Kojto 113:f141b2784e32 22 * Software "AS IS", with no express or implied warranties of any kind,
Kojto 113:f141b2784e32 23 * including, but not limited to, any implied warranties of merchantability
Kojto 113:f141b2784e32 24 * or fitness for any particular purpose or warranties against infringement
Kojto 113:f141b2784e32 25 * of any proprietary rights of a third party.
Kojto 113:f141b2784e32 26 *
Kojto 113:f141b2784e32 27 * Silicon Labs will not be liable for any consequential, incidental, or
Kojto 113:f141b2784e32 28 * special damages, or any other relief, or for any claim by any third party,
Kojto 113:f141b2784e32 29 * arising from your use of this Software.
Kojto 113:f141b2784e32 30 *
Kojto 113:f141b2784e32 31 ******************************************************************************/
Kojto 113:f141b2784e32 32
<> 128:9bcdf88f62b0 33 #ifndef EM_LDMA_H
<> 128:9bcdf88f62b0 34 #define EM_LDMA_H
Kojto 113:f141b2784e32 35
Kojto 113:f141b2784e32 36 #include "em_device.h"
Kojto 113:f141b2784e32 37
Kojto 113:f141b2784e32 38 #if defined( LDMA_PRESENT ) && ( LDMA_COUNT == 1 )
Kojto 113:f141b2784e32 39
Kojto 113:f141b2784e32 40 #include <stdbool.h>
Kojto 113:f141b2784e32 41
Kojto 113:f141b2784e32 42 #ifdef __cplusplus
Kojto 113:f141b2784e32 43 extern "C" {
Kojto 113:f141b2784e32 44 #endif
Kojto 113:f141b2784e32 45
Kojto 113:f141b2784e32 46
Kojto 113:f141b2784e32 47 /***************************************************************************//**
<> 128:9bcdf88f62b0 48 * @addtogroup emlib
Kojto 113:f141b2784e32 49 * @{
Kojto 113:f141b2784e32 50 ******************************************************************************/
Kojto 113:f141b2784e32 51
Kojto 113:f141b2784e32 52 /***************************************************************************//**
Kojto 113:f141b2784e32 53 * @addtogroup LDMA
<> 128:9bcdf88f62b0 54 * @brief Linked Direct Memory Access (LDMA) Peripheral API
<> 128:9bcdf88f62b0 55 *
<> 128:9bcdf88f62b0 56 * @details
<> 128:9bcdf88f62b0 57 * The LDMA API functions provide full support for the LDMA peripheral.
<> 128:9bcdf88f62b0 58 *
<> 128:9bcdf88f62b0 59 * The LDMA supports these DMA transfer types:
<> 128:9bcdf88f62b0 60 *
<> 128:9bcdf88f62b0 61 * @li Memory to memory.
<> 128:9bcdf88f62b0 62 * @li Memory to peripheral.
<> 128:9bcdf88f62b0 63 * @li Peripheral to memory.
<> 128:9bcdf88f62b0 64 * @li Peripheral to peripheral.
<> 128:9bcdf88f62b0 65 * @li Constant value to memory.
<> 128:9bcdf88f62b0 66 *
<> 128:9bcdf88f62b0 67 * The LDMA supports linked lists of DMA descriptors allowing:
<> 128:9bcdf88f62b0 68 *
<> 128:9bcdf88f62b0 69 * @li Circular and ping-pong buffer transfers.
<> 128:9bcdf88f62b0 70 * @li Scatter-gather transfers.
<> 128:9bcdf88f62b0 71 * @li Looped transfers.
<> 128:9bcdf88f62b0 72 *
<> 128:9bcdf88f62b0 73 * The LDMA has some advanced features:
<> 128:9bcdf88f62b0 74 *
<> 128:9bcdf88f62b0 75 * @li Intra-channel synchronization (SYNC), allowing hardware events to
<> 128:9bcdf88f62b0 76 * pause and restart a DMA sequence.
<> 128:9bcdf88f62b0 77 * @li Immediate-write (WRI), allowing the DMA to write a constant anywhere
<> 128:9bcdf88f62b0 78 * in the memory map.
<> 128:9bcdf88f62b0 79 * @li Complex flow control allowing if-else constructs.
<> 128:9bcdf88f62b0 80 *
<> 128:9bcdf88f62b0 81 * A basic understanding of the LDMA controller is assumed. Please refer to
<> 128:9bcdf88f62b0 82 * the reference manual for further details. The LDMA examples described
<> 128:9bcdf88f62b0 83 * in the reference manual are particularly helpful in understanding LDMA
<> 128:9bcdf88f62b0 84 * operations.
<> 128:9bcdf88f62b0 85 *
<> 128:9bcdf88f62b0 86 * In order to use the DMA controller, the initialization function @ref
<> 128:9bcdf88f62b0 87 * LDMA_Init() must have been executed once (normally during system init).
<> 128:9bcdf88f62b0 88 *
<> 128:9bcdf88f62b0 89 * DMA transfers are initiated by a call to @ref LDMA_StartTransfer(), the
<> 128:9bcdf88f62b0 90 * transfer properties are controlled by the contents of @ref LDMA_TransferCfg_t
<> 128:9bcdf88f62b0 91 * and @ref LDMA_Descriptor_t structure parameters.
<> 128:9bcdf88f62b0 92 * The @htmlonly LDMA_Descriptor_t @endhtmlonly structure parameter may be a
<> 128:9bcdf88f62b0 93 * pointer to an array of descriptors, the descriptors in the array should
<> 128:9bcdf88f62b0 94 * be linked together as needed.
<> 128:9bcdf88f62b0 95 *
<> 128:9bcdf88f62b0 96 * Transfer and descriptor initialization macros are provided for the most common
<> 128:9bcdf88f62b0 97 * transfer types. Due to the flexibility of the LDMA peripheral only a small
<> 128:9bcdf88f62b0 98 * subset of all possible initializer macros are provided, the user should create
<> 128:9bcdf88f62b0 99 * new one's when needed.
<> 128:9bcdf88f62b0 100 *
<> 128:9bcdf88f62b0 101 * <b> Examples of LDMA usage: </b>
<> 128:9bcdf88f62b0 102 *
<> 128:9bcdf88f62b0 103 * A simple memory to memory transfer:
<> 128:9bcdf88f62b0 104 *
<> 128:9bcdf88f62b0 105 * @include em_ldma_single.c
<> 128:9bcdf88f62b0 106 *
<> 128:9bcdf88f62b0 107 * @n A linked list of three memory to memory transfers:
<> 128:9bcdf88f62b0 108 *
<> 128:9bcdf88f62b0 109 * @include em_ldma_link_memory.c
<> 128:9bcdf88f62b0 110 *
<> 128:9bcdf88f62b0 111 * @n DMA from serial port peripheral to memory:
<> 128:9bcdf88f62b0 112 *
<> 128:9bcdf88f62b0 113 * @include em_ldma_peripheral.c
<> 128:9bcdf88f62b0 114 *
<> 128:9bcdf88f62b0 115 * @n Ping pong DMA from serial port peripheral to memory:
<> 128:9bcdf88f62b0 116 *
<> 128:9bcdf88f62b0 117 * @include em_ldma_pingpong.c
<> 128:9bcdf88f62b0 118 *
<> 128:9bcdf88f62b0 119 * @note The LDMA module does not implement the LDMA interrupt handler. A
<> 128:9bcdf88f62b0 120 * template for an LDMA IRQ handler is include here as an example.
<> 128:9bcdf88f62b0 121 *
<> 128:9bcdf88f62b0 122 * @include em_ldma_irq.c
<> 128:9bcdf88f62b0 123 *
Kojto 113:f141b2784e32 124 * @{
Kojto 113:f141b2784e32 125 ******************************************************************************/
Kojto 113:f141b2784e32 126
Kojto 113:f141b2784e32 127 /*******************************************************************************
Kojto 113:f141b2784e32 128 ******************************** ENUMS ************************************
Kojto 113:f141b2784e32 129 ******************************************************************************/
Kojto 113:f141b2784e32 130
Kojto 113:f141b2784e32 131 /**
Kojto 113:f141b2784e32 132 * This value controls the number of unit data transfers per arbitration
Kojto 113:f141b2784e32 133 * cycle, providing a means to balance DMA channels' load on the controller.
Kojto 113:f141b2784e32 134 */
Kojto 113:f141b2784e32 135 typedef enum
Kojto 113:f141b2784e32 136 {
Kojto 113:f141b2784e32 137 ldmaCtrlBlockSizeUnit1 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1, /**< One transfer per arbitration. */
Kojto 113:f141b2784e32 138 ldmaCtrlBlockSizeUnit2 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT2, /**< Two transfers per arbitration. */
Kojto 113:f141b2784e32 139 ldmaCtrlBlockSizeUnit3 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT3, /**< Three transfers per arbitration. */
Kojto 113:f141b2784e32 140 ldmaCtrlBlockSizeUnit4 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT4, /**< Four transfers per arbitration. */
Kojto 113:f141b2784e32 141 ldmaCtrlBlockSizeUnit6 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT6, /**< Six transfers per arbitration. */
Kojto 113:f141b2784e32 142 ldmaCtrlBlockSizeUnit8 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT8, /**< Eight transfers per arbitration. */
Kojto 113:f141b2784e32 143 ldmaCtrlBlockSizeUnit16 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT16, /**< 16 transfers per arbitration. */
Kojto 113:f141b2784e32 144 ldmaCtrlBlockSizeUnit32 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT32, /**< 32 transfers per arbitration. */
Kojto 113:f141b2784e32 145 ldmaCtrlBlockSizeUnit64 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT64, /**< 64 transfers per arbitration. */
Kojto 113:f141b2784e32 146 ldmaCtrlBlockSizeUnit128 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT128, /**< 128 transfers per arbitration. */
Kojto 113:f141b2784e32 147 ldmaCtrlBlockSizeUnit256 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT256, /**< 256 transfers per arbitration. */
Kojto 113:f141b2784e32 148 ldmaCtrlBlockSizeUnit512 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT512, /**< 512 transfers per arbitration. */
Kojto 113:f141b2784e32 149 ldmaCtrlBlockSizeUnit1024 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1024, /**< 1024 transfers per arbitration. */
Kojto 113:f141b2784e32 150 ldmaCtrlBlockSizeAll = _LDMA_CH_CTRL_BLOCKSIZE_ALL /**< Lock arbitration during transfer. */
Kojto 113:f141b2784e32 151 } LDMA_CtrlBlockSize_t;
Kojto 113:f141b2784e32 152
Kojto 113:f141b2784e32 153 /** DMA structure type. */
Kojto 113:f141b2784e32 154 typedef enum
Kojto 113:f141b2784e32 155 {
Kojto 113:f141b2784e32 156 ldmaCtrlStructTypeXfer = _LDMA_CH_CTRL_STRUCTTYPE_TRANSFER, /**< TRANSFER transfer type. */
Kojto 113:f141b2784e32 157 ldmaCtrlStructTypeSync = _LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE, /**< SYNCHRONIZE transfer type. */
Kojto 113:f141b2784e32 158 ldmaCtrlStructTypeWrite = _LDMA_CH_CTRL_STRUCTTYPE_WRITE /**< WRITE transfer type. */
Kojto 113:f141b2784e32 159 } LDMA_CtrlStructType_t;
Kojto 113:f141b2784e32 160
Kojto 113:f141b2784e32 161 /** DMA transfer block or cycle selector. */
Kojto 113:f141b2784e32 162 typedef enum
Kojto 113:f141b2784e32 163 {
Kojto 113:f141b2784e32 164 ldmaCtrlReqModeBlock = _LDMA_CH_CTRL_REQMODE_BLOCK, /**< Each DMA request trigger transfer of one block. */
Kojto 113:f141b2784e32 165 ldmaCtrlReqModeAll = _LDMA_CH_CTRL_REQMODE_ALL /**< A DMA request trigger transfer of a complete cycle. */
Kojto 113:f141b2784e32 166 } LDMA_CtrlReqMode_t;
Kojto 113:f141b2784e32 167
Kojto 113:f141b2784e32 168 /** Source address increment unit size. */
Kojto 113:f141b2784e32 169 typedef enum
Kojto 113:f141b2784e32 170 {
Kojto 113:f141b2784e32 171 ldmaCtrlSrcIncOne = _LDMA_CH_CTRL_SRCINC_ONE, /**< Increment source address by one unit data size. */
Kojto 113:f141b2784e32 172 ldmaCtrlSrcIncTwo = _LDMA_CH_CTRL_SRCINC_TWO, /**< Increment source address by two unit data sizes. */
Kojto 113:f141b2784e32 173 ldmaCtrlSrcIncFour = _LDMA_CH_CTRL_SRCINC_FOUR, /**< Increment source address by four unit data sizes. */
Kojto 113:f141b2784e32 174 ldmaCtrlSrcIncNone = _LDMA_CH_CTRL_SRCINC_NONE /**< Do not increment the source address. */
Kojto 113:f141b2784e32 175 } LDMA_CtrlSrcInc_t;
Kojto 113:f141b2784e32 176
Kojto 113:f141b2784e32 177 /** DMA transfer unit size. */
Kojto 113:f141b2784e32 178 typedef enum
Kojto 113:f141b2784e32 179 {
Kojto 113:f141b2784e32 180 ldmaCtrlSizeByte = _LDMA_CH_CTRL_SIZE_BYTE, /**< Each unit transfer is a byte. */
Kojto 113:f141b2784e32 181 ldmaCtrlSizeHalf = _LDMA_CH_CTRL_SIZE_HALFWORD, /**< Each unit transfer is a half-word. */
Kojto 113:f141b2784e32 182 ldmaCtrlSizeWord = _LDMA_CH_CTRL_SIZE_WORD /**< Each unit transfer is a word. */
Kojto 113:f141b2784e32 183 } LDMA_CtrlSize_t;
Kojto 113:f141b2784e32 184
Kojto 113:f141b2784e32 185 /** Destination address increment unit size. */
Kojto 113:f141b2784e32 186 typedef enum
Kojto 113:f141b2784e32 187 {
Kojto 113:f141b2784e32 188 ldmaCtrlDstIncOne = _LDMA_CH_CTRL_DSTINC_ONE, /**< Increment destination address by one unit data size. */
Kojto 113:f141b2784e32 189 ldmaCtrlDstIncTwo = _LDMA_CH_CTRL_DSTINC_TWO, /**< Increment destination address by two unit data sizes. */
Kojto 113:f141b2784e32 190 ldmaCtrlDstIncFour = _LDMA_CH_CTRL_DSTINC_FOUR, /**< Increment destination address by four unit data sizes. */
Kojto 113:f141b2784e32 191 ldmaCtrlDstIncNone = _LDMA_CH_CTRL_DSTINC_NONE /**< Do not increment the destination address. */
Kojto 113:f141b2784e32 192 } LDMA_CtrlDstInc_t;
Kojto 113:f141b2784e32 193
Kojto 113:f141b2784e32 194 /** Source addressing mode. */
Kojto 113:f141b2784e32 195 typedef enum
Kojto 113:f141b2784e32 196 {
Kojto 113:f141b2784e32 197 ldmaCtrlSrcAddrModeAbs = _LDMA_CH_CTRL_SRCMODE_ABSOLUTE, /**< Address fetched from a linked structure is absolute. */
Kojto 113:f141b2784e32 198 ldmaCtrlSrcAddrModeRel = _LDMA_CH_CTRL_SRCMODE_RELATIVE /**< Address fetched from a linked structure is relative. */
Kojto 113:f141b2784e32 199 } LDMA_CtrlSrcAddrMode_t;
Kojto 113:f141b2784e32 200
Kojto 113:f141b2784e32 201 /** Destination addressing mode. */
Kojto 113:f141b2784e32 202 typedef enum
Kojto 113:f141b2784e32 203 {
Kojto 113:f141b2784e32 204 ldmaCtrlDstAddrModeAbs = _LDMA_CH_CTRL_DSTMODE_ABSOLUTE, /**< Address fetched from a linked structure is absolute. */
Kojto 113:f141b2784e32 205 ldmaCtrlDstAddrModeRel = _LDMA_CH_CTRL_DSTMODE_RELATIVE /**< Address fetched from a linked structure is relative. */
Kojto 113:f141b2784e32 206 } LDMA_CtrlDstAddrMode_t;
Kojto 113:f141b2784e32 207
Kojto 113:f141b2784e32 208 /** DMA linkload address mode. */
Kojto 113:f141b2784e32 209 typedef enum
Kojto 113:f141b2784e32 210 {
Kojto 113:f141b2784e32 211 ldmaLinkModeAbs = _LDMA_CH_LINK_LINKMODE_ABSOLUTE, /**< Link address is an absolute address value. */
Kojto 113:f141b2784e32 212 ldmaLinkModeRel = _LDMA_CH_LINK_LINKMODE_RELATIVE /**< Link address is a two's complement releative address. */
Kojto 113:f141b2784e32 213 } LDMA_LinkMode_t;
Kojto 113:f141b2784e32 214
Kojto 113:f141b2784e32 215 /** Insert extra arbitration slots to increase channel arbitration priority. */
Kojto 113:f141b2784e32 216 typedef enum
Kojto 113:f141b2784e32 217 {
Kojto 113:f141b2784e32 218 ldmaCfgArbSlotsAs1 = _LDMA_CH_CFG_ARBSLOTS_ONE, /**< One arbitration slot selected. */
Kojto 113:f141b2784e32 219 ldmaCfgArbSlotsAs2 = _LDMA_CH_CFG_ARBSLOTS_TWO, /**< Two arbitration slots selected. */
Kojto 113:f141b2784e32 220 ldmaCfgArbSlotsAs4 = _LDMA_CH_CFG_ARBSLOTS_FOUR, /**< Four arbitration slots selected. */
Kojto 113:f141b2784e32 221 ldmaCfgArbSlotsAs8 = _LDMA_CH_CFG_ARBSLOTS_EIGHT /**< Eight arbitration slots selected. */
Kojto 113:f141b2784e32 222 } LDMA_CfgArbSlots_t;
Kojto 113:f141b2784e32 223
Kojto 113:f141b2784e32 224 /** Source address increment sign. */
Kojto 113:f141b2784e32 225 typedef enum
Kojto 113:f141b2784e32 226 {
Kojto 113:f141b2784e32 227 ldmaCfgSrcIncSignPos = _LDMA_CH_CFG_SRCINCSIGN_POSITIVE, /**< Increment source address. */
Kojto 113:f141b2784e32 228 ldmaCfgSrcIncSignNeg = _LDMA_CH_CFG_SRCINCSIGN_NEGATIVE /**< Decrement source address. */
Kojto 113:f141b2784e32 229 } LDMA_CfgSrcIncSign_t;
Kojto 113:f141b2784e32 230
Kojto 113:f141b2784e32 231 /** Destination address increment sign. */
Kojto 113:f141b2784e32 232 typedef enum
Kojto 113:f141b2784e32 233 {
Kojto 113:f141b2784e32 234 ldmaCfgDstIncSignPos = _LDMA_CH_CFG_DSTINCSIGN_POSITIVE, /**< Increment destination address. */
Kojto 113:f141b2784e32 235 ldmaCfgDstIncSignNeg = _LDMA_CH_CFG_DSTINCSIGN_NEGATIVE /**< Decrement destination address. */
Kojto 113:f141b2784e32 236 } LDMA_CfgDstIncSign_t;
Kojto 113:f141b2784e32 237
Kojto 113:f141b2784e32 238 /** Peripherals that can trigger LDMA transfers. */
Kojto 113:f141b2784e32 239 typedef enum
Kojto 113:f141b2784e32 240 {
Kojto 113:f141b2784e32 241 ldmaPeripheralSignal_NONE = LDMA_CH_REQSEL_SOURCESEL_NONE, ///< No peripheral selected for DMA triggering.
<> 139:856d2700e60b 242 #if defined(LDMA_CH_REQSEL_SIGSEL_ADC0SCAN)
Kojto 113:f141b2784e32 243 ldmaPeripheralSignal_ADC0_SCAN = LDMA_CH_REQSEL_SIGSEL_ADC0SCAN | LDMA_CH_REQSEL_SOURCESEL_ADC0, ///< Trig on ADC0_SCAN.
Kojto 113:f141b2784e32 244 #endif
<> 139:856d2700e60b 245 #if defined(LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE)
Kojto 113:f141b2784e32 246 ldmaPeripheralSignal_ADC0_SINGLE = LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE | LDMA_CH_REQSEL_SOURCESEL_ADC0, ///< Trig on ADC0_SINGLE.
Kojto 113:f141b2784e32 247 #endif
Kojto 113:f141b2784e32 248 #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0RD )
Kojto 113:f141b2784e32 249 ldmaPeripheralSignal_CRYPTO_DATA0RD = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA0RD.
Kojto 113:f141b2784e32 250 #endif
Kojto 113:f141b2784e32 251 #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0WR )
Kojto 113:f141b2784e32 252 ldmaPeripheralSignal_CRYPTO_DATA0WR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA0WR.
Kojto 113:f141b2784e32 253 #endif
Kojto 113:f141b2784e32 254 #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0XWR )
Kojto 113:f141b2784e32 255 ldmaPeripheralSignal_CRYPTO_DATA0XWR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0XWR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA0XWR.
Kojto 113:f141b2784e32 256 #endif
Kojto 113:f141b2784e32 257 #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1RD )
Kojto 113:f141b2784e32 258 ldmaPeripheralSignal_CRYPTO_DATA1RD = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA1RD.
Kojto 113:f141b2784e32 259 #endif
Kojto 113:f141b2784e32 260 #if defined( LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1WR )
Kojto 113:f141b2784e32 261 ldmaPeripheralSignal_CRYPTO_DATA1WR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO, ///< Trig on CRYPTO_DATA1WR.
Kojto 113:f141b2784e32 262 #endif
<> 139:856d2700e60b 263 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0RD)
<> 139:856d2700e60b 264 ldmaPeripheralSignal_CRYPTO0_DATA0RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ///< Trig on CRYPTO0_DATA0RD.
<> 139:856d2700e60b 265 #endif
<> 139:856d2700e60b 266 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0WR)
<> 139:856d2700e60b 267 ldmaPeripheralSignal_CRYPTO0_DATA0WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ///< Trig on CRYPTO0_DATA0WR.
<> 139:856d2700e60b 268 #endif
<> 139:856d2700e60b 269 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0XWR)
<> 139:856d2700e60b 270 ldmaPeripheralSignal_CRYPTO0_DATA0XWR = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0XWR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ///< Trig on CRYPTO0_DATA0XWR.
<> 139:856d2700e60b 271 #endif
<> 139:856d2700e60b 272 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1RD)
<> 139:856d2700e60b 273 ldmaPeripheralSignal_CRYPTO0_DATA1RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ///< Trig on CRYPTO0_DATA1RD.
<> 139:856d2700e60b 274 #endif
<> 139:856d2700e60b 275 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1WR)
<> 139:856d2700e60b 276 ldmaPeripheralSignal_CRYPTO0_DATA1WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO0, ///< Trig on CRYPTO0_DATA1WR.
<> 139:856d2700e60b 277 #endif
<> 139:856d2700e60b 278 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0RD)
<> 139:856d2700e60b 279 ldmaPeripheralSignal_CRYPTO1_DATA0RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ///< Trig on CRYPTO1_DATA0RD.
<> 139:856d2700e60b 280 #endif
<> 139:856d2700e60b 281 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0WR)
<> 139:856d2700e60b 282 ldmaPeripheralSignal_CRYPTO1_DATA0WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ///< Trig on CRYPTO1_DATA0WR.
<> 139:856d2700e60b 283 #endif
<> 139:856d2700e60b 284 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0XWR)
<> 139:856d2700e60b 285 ldmaPeripheralSignal_CRYPTO1_DATA0XWR = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA0XWR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ///< Trig on CRYPTO1_DATA0XWR.
<> 139:856d2700e60b 286 #endif
<> 139:856d2700e60b 287 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1RD)
<> 139:856d2700e60b 288 ldmaPeripheralSignal_CRYPTO1_DATA1RD = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ///< Trig on CRYPTO1_DATA1RD.
<> 139:856d2700e60b 289 #endif
<> 139:856d2700e60b 290 #if defined(LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1WR)
<> 139:856d2700e60b 291 ldmaPeripheralSignal_CRYPTO1_DATA1WR = LDMA_CH_REQSEL_SIGSEL_CRYPTO1DATA1WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO1, ///< Trig on CRYPTO1_DATA1WR.
<> 139:856d2700e60b 292 #endif
<> 139:856d2700e60b 293 #if defined(LDMA_CH_REQSEL_SIGSEL_CSENBSLN)
<> 139:856d2700e60b 294 ldmaPeripheralSignal_CSEN_BSLN = LDMA_CH_REQSEL_SIGSEL_CSENBSLN | LDMA_CH_REQSEL_SOURCESEL_CSEN, ///< Trig on CSEN_BSLN.
<> 139:856d2700e60b 295 #endif
<> 139:856d2700e60b 296 #if defined(LDMA_CH_REQSEL_SIGSEL_CSENDATA)
<> 139:856d2700e60b 297 ldmaPeripheralSignal_CSEN_DATA = LDMA_CH_REQSEL_SIGSEL_CSENDATA | LDMA_CH_REQSEL_SOURCESEL_CSEN, ///< Trig on CSEN_DATA.
<> 139:856d2700e60b 298 #endif
<> 139:856d2700e60b 299 #if defined(LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV)
Kojto 113:f141b2784e32 300 ldmaPeripheralSignal_I2C0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_I2C0, ///< Trig on I2C0_RXDATAV.
Kojto 113:f141b2784e32 301 #endif
<> 139:856d2700e60b 302 #if defined(LDMA_CH_REQSEL_SIGSEL_I2C0TXBL)
Kojto 113:f141b2784e32 303 ldmaPeripheralSignal_I2C0_TXBL = LDMA_CH_REQSEL_SIGSEL_I2C0TXBL | LDMA_CH_REQSEL_SOURCESEL_I2C0, ///< Trig on I2C0_TXBL.
Kojto 113:f141b2784e32 304 #endif
<> 139:856d2700e60b 305 #if defined(LDMA_CH_REQSEL_SIGSEL_I2C1RXDATAV)
<> 139:856d2700e60b 306 ldmaPeripheralSignal_I2C1_RXDATAV = LDMA_CH_REQSEL_SIGSEL_I2C1RXDATAV | LDMA_CH_REQSEL_SOURCESEL_I2C1, ///< Trig on I2C1_RXDATAV.
<> 139:856d2700e60b 307 #endif
<> 139:856d2700e60b 308 #if defined(LDMA_CH_REQSEL_SIGSEL_I2C1TXBL)
<> 139:856d2700e60b 309 ldmaPeripheralSignal_I2C1_TXBL = LDMA_CH_REQSEL_SIGSEL_I2C1TXBL | LDMA_CH_REQSEL_SOURCESEL_I2C1, ///< Trig on I2C1_TXBL.
<> 139:856d2700e60b 310 #endif
<> 139:856d2700e60b 311 #if defined(LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV)
<> 139:856d2700e60b 312 ldmaPeripheralSignal_LESENSE_BUFDATAV = LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV | LDMA_CH_REQSEL_SOURCESEL_LESENSE, ///< Trig on LESENSE_BUFDATAV.
<> 139:856d2700e60b 313 #endif
<> 139:856d2700e60b 314 #if defined(LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV)
Kojto 113:f141b2784e32 315 ldmaPeripheralSignal_LEUART0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_LEUART0, ///< Trig on LEUART0_RXDATAV.
Kojto 113:f141b2784e32 316 #endif
<> 139:856d2700e60b 317 #if defined(LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL)
Kojto 113:f141b2784e32 318 ldmaPeripheralSignal_LEUART0_TXBL = LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL | LDMA_CH_REQSEL_SOURCESEL_LEUART0, ///< Trig on LEUART0_TXBL.
Kojto 113:f141b2784e32 319 #endif
<> 139:856d2700e60b 320 #if defined(LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY)
Kojto 113:f141b2784e32 321 ldmaPeripheralSignal_LEUART0_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_LEUART0, ///< Trig on LEUART0_TXEMPTY.
Kojto 113:f141b2784e32 322 #endif
<> 139:856d2700e60b 323 #if defined(LDMA_CH_REQSEL_SIGSEL_MSCWDATA)
Kojto 113:f141b2784e32 324 ldmaPeripheralSignal_MSC_WDATA = LDMA_CH_REQSEL_SIGSEL_MSCWDATA | LDMA_CH_REQSEL_SOURCESEL_MSC, ///< Trig on MSC_WDATA.
Kojto 113:f141b2784e32 325 #endif
<> 139:856d2700e60b 326 #if defined(LDMA_CH_REQSEL_SIGSEL_PRSREQ0)
Kojto 113:f141b2784e32 327 ldmaPeripheralSignal_PRS_REQ0 = LDMA_CH_REQSEL_SIGSEL_PRSREQ0 | LDMA_CH_REQSEL_SOURCESEL_PRS, ///< Trig on PRS_REQ0.
Kojto 113:f141b2784e32 328 #endif
<> 139:856d2700e60b 329 #if defined(LDMA_CH_REQSEL_SIGSEL_PRSREQ1)
Kojto 113:f141b2784e32 330 ldmaPeripheralSignal_PRS_REQ1 = LDMA_CH_REQSEL_SIGSEL_PRSREQ1 | LDMA_CH_REQSEL_SOURCESEL_PRS, ///< Trig on PRS_REQ1.
Kojto 113:f141b2784e32 331 #endif
<> 139:856d2700e60b 332 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER0CC0)
Kojto 113:f141b2784e32 333 ldmaPeripheralSignal_TIMER0_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER0, ///< Trig on TIMER0_CC0.
Kojto 113:f141b2784e32 334 #endif
<> 139:856d2700e60b 335 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER0CC1)
Kojto 113:f141b2784e32 336 ldmaPeripheralSignal_TIMER0_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER0, ///< Trig on TIMER0_CC1.
Kojto 113:f141b2784e32 337 #endif
<> 139:856d2700e60b 338 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER0CC2)
Kojto 113:f141b2784e32 339 ldmaPeripheralSignal_TIMER0_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER0, ///< Trig on TIMER0_CC2.
Kojto 113:f141b2784e32 340 #endif
<> 139:856d2700e60b 341 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF)
Kojto 113:f141b2784e32 342 ldmaPeripheralSignal_TIMER0_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER0, ///< Trig on TIMER0_UFOF.
Kojto 113:f141b2784e32 343 #endif
<> 139:856d2700e60b 344 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1CC0)
Kojto 113:f141b2784e32 345 ldmaPeripheralSignal_TIMER1_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ///< Trig on TIMER1_CC0.
Kojto 113:f141b2784e32 346 #endif
<> 139:856d2700e60b 347 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1CC1)
Kojto 113:f141b2784e32 348 ldmaPeripheralSignal_TIMER1_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ///< Trig on TIMER1_CC1.
Kojto 113:f141b2784e32 349 #endif
<> 139:856d2700e60b 350 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1CC2)
Kojto 113:f141b2784e32 351 ldmaPeripheralSignal_TIMER1_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ///< Trig on TIMER1_CC2.
Kojto 113:f141b2784e32 352 #endif
<> 139:856d2700e60b 353 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1CC3)
Kojto 113:f141b2784e32 354 ldmaPeripheralSignal_TIMER1_CC3 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC3 | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ///< Trig on TIMER1_CC3.
Kojto 113:f141b2784e32 355 #endif
<> 139:856d2700e60b 356 #if defined(LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF)
Kojto 113:f141b2784e32 357 ldmaPeripheralSignal_TIMER1_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER1, ///< Trig on TIMER1_UFOF.
Kojto 113:f141b2784e32 358 #endif
<> 139:856d2700e60b 359 #if defined(LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV)
Kojto 113:f141b2784e32 360 ldmaPeripheralSignal_USART0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART0, ///< Trig on USART0_RXDATAV.
Kojto 113:f141b2784e32 361 #endif
<> 139:856d2700e60b 362 #if defined(LDMA_CH_REQSEL_SIGSEL_USART0TXBL)
Kojto 113:f141b2784e32 363 ldmaPeripheralSignal_USART0_TXBL = LDMA_CH_REQSEL_SIGSEL_USART0TXBL | LDMA_CH_REQSEL_SOURCESEL_USART0, ///< Trig on USART0_TXBL.
Kojto 113:f141b2784e32 364 #endif
<> 139:856d2700e60b 365 #if defined(LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY)
Kojto 113:f141b2784e32 366 ldmaPeripheralSignal_USART0_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART0, ///< Trig on USART0_TXEMPTY.
Kojto 113:f141b2784e32 367 #endif
<> 139:856d2700e60b 368 #if defined(LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV)
Kojto 113:f141b2784e32 369 ldmaPeripheralSignal_USART1_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART1, ///< Trig on USART1_RXDATAV.
Kojto 113:f141b2784e32 370 #endif
<> 139:856d2700e60b 371 #if defined(LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT)
Kojto 113:f141b2784e32 372 ldmaPeripheralSignal_USART1_RXDATAVRIGHT = LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART1, ///< Trig on USART1_RXDATAVRIGHT.
Kojto 113:f141b2784e32 373 #endif
<> 139:856d2700e60b 374 #if defined(LDMA_CH_REQSEL_SIGSEL_USART1TXBL)
Kojto 113:f141b2784e32 375 ldmaPeripheralSignal_USART1_TXBL = LDMA_CH_REQSEL_SIGSEL_USART1TXBL | LDMA_CH_REQSEL_SOURCESEL_USART1, ///< Trig on USART1_TXBL.
Kojto 113:f141b2784e32 376 #endif
<> 139:856d2700e60b 377 #if defined(LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT)
Kojto 113:f141b2784e32 378 ldmaPeripheralSignal_USART1_TXBLRIGHT = LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART1, ///< Trig on USART1_TXBLRIGHT.
Kojto 113:f141b2784e32 379 #endif
<> 139:856d2700e60b 380 #if defined(LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY)
<> 139:856d2700e60b 381 ldmaPeripheralSignal_USART1_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART1, ///< Trig on USART1_TXEMPTY.
<> 139:856d2700e60b 382 #endif
<> 139:856d2700e60b 383 #if defined(LDMA_CH_REQSEL_SIGSEL_USART2RXDATAV)
<> 139:856d2700e60b 384 ldmaPeripheralSignal_USART2_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART2RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART2, ///< Trig on USART2_RXDATAV.
<> 139:856d2700e60b 385 #endif
<> 139:856d2700e60b 386 #if defined(LDMA_CH_REQSEL_SIGSEL_USART2TXBL)
<> 139:856d2700e60b 387 ldmaPeripheralSignal_USART2_TXBL = LDMA_CH_REQSEL_SIGSEL_USART2TXBL | LDMA_CH_REQSEL_SOURCESEL_USART2, ///< Trig on USART2_TXBL.
<> 139:856d2700e60b 388 #endif
<> 139:856d2700e60b 389 #if defined(LDMA_CH_REQSEL_SIGSEL_USART2TXEMPTY)
<> 139:856d2700e60b 390 ldmaPeripheralSignal_USART2_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART2TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART2, ///< Trig on USART2_TXEMPTY.
<> 139:856d2700e60b 391 #endif
<> 139:856d2700e60b 392 #if defined(LDMA_CH_REQSEL_SIGSEL_USART3RXDATAV)
<> 139:856d2700e60b 393 ldmaPeripheralSignal_USART3_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART3RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART3, ///< Trig on USART3_RXDATAV.
<> 139:856d2700e60b 394 #endif
<> 139:856d2700e60b 395 #if defined(LDMA_CH_REQSEL_SIGSEL_USART3RXDATAVRIGHT)
<> 139:856d2700e60b 396 ldmaPeripheralSignal_USART3_RXDATAVRIGHT = LDMA_CH_REQSEL_SIGSEL_USART3RXDATAVRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART3, ///< Trig on USART3_RXDATAVRIGHT.
<> 139:856d2700e60b 397 #endif
<> 139:856d2700e60b 398 #if defined(LDMA_CH_REQSEL_SIGSEL_USART3TXBL)
<> 139:856d2700e60b 399 ldmaPeripheralSignal_USART3_TXBL = LDMA_CH_REQSEL_SIGSEL_USART3TXBL | LDMA_CH_REQSEL_SOURCESEL_USART3, ///< Trig on USART3_TXBL.
<> 139:856d2700e60b 400 #endif
<> 139:856d2700e60b 401 #if defined(LDMA_CH_REQSEL_SIGSEL_USART3TXBLRIGHT)
<> 139:856d2700e60b 402 ldmaPeripheralSignal_USART3_TXBLRIGHT = LDMA_CH_REQSEL_SIGSEL_USART3TXBLRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART3, ///< Trig on USART3_TXBLRIGHT.
<> 139:856d2700e60b 403 #endif
<> 139:856d2700e60b 404 #if defined(LDMA_CH_REQSEL_SIGSEL_USART3TXEMPTY)
<> 139:856d2700e60b 405 ldmaPeripheralSignal_USART3_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART3TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART3, ///< Trig on USART3_TXEMPTY.
<> 139:856d2700e60b 406 #endif
<> 139:856d2700e60b 407 #if defined(LDMA_CH_REQSEL_SIGSEL_VDAC0CH0)
<> 139:856d2700e60b 408 ldmaPeripheralSignal_VDAC0_CH0 = LDMA_CH_REQSEL_SIGSEL_VDAC0CH0 | LDMA_CH_REQSEL_SOURCESEL_VDAC0, ///< Trig on VDAC0_CH0.
<> 139:856d2700e60b 409 #endif
<> 139:856d2700e60b 410 #if defined(LDMA_CH_REQSEL_SIGSEL_VDAC0CH1)
<> 139:856d2700e60b 411 ldmaPeripheralSignal_VDAC0_CH1 = LDMA_CH_REQSEL_SIGSEL_VDAC0CH1 | LDMA_CH_REQSEL_SOURCESEL_VDAC0, ///< Trig on VDAC0_CH1.
<> 139:856d2700e60b 412 #endif
<> 139:856d2700e60b 413 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER0CC0)
<> 139:856d2700e60b 414 ldmaPeripheralSignal_WTIMER0_CC0 = LDMA_CH_REQSEL_SIGSEL_WTIMER0CC0 | LDMA_CH_REQSEL_SOURCESEL_WTIMER0, ///< Trig on WTIMER0_CC0.
<> 139:856d2700e60b 415 #endif
<> 139:856d2700e60b 416 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER0CC1)
<> 139:856d2700e60b 417 ldmaPeripheralSignal_WTIMER0_CC1 = LDMA_CH_REQSEL_SIGSEL_WTIMER0CC1 | LDMA_CH_REQSEL_SOURCESEL_WTIMER0, ///< Trig on WTIMER0_CC1.
<> 139:856d2700e60b 418 #endif
<> 139:856d2700e60b 419 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER0CC2)
<> 139:856d2700e60b 420 ldmaPeripheralSignal_WTIMER0_CC2 = LDMA_CH_REQSEL_SIGSEL_WTIMER0CC2 | LDMA_CH_REQSEL_SOURCESEL_WTIMER0, ///< Trig on WTIMER0_CC2.
<> 139:856d2700e60b 421 #endif
<> 139:856d2700e60b 422 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER0UFOF)
<> 139:856d2700e60b 423 ldmaPeripheralSignal_WTIMER0_UFOF = LDMA_CH_REQSEL_SIGSEL_WTIMER0UFOF | LDMA_CH_REQSEL_SOURCESEL_WTIMER0, ///< Trig on WTIMER0_UFOF.
<> 139:856d2700e60b 424 #endif
<> 139:856d2700e60b 425 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1CC0)
<> 139:856d2700e60b 426 ldmaPeripheralSignal_WTIMER1_CC0 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC0 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1, ///< Trig on WTIMER1_CC0.
<> 139:856d2700e60b 427 #endif
<> 139:856d2700e60b 428 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1CC1)
<> 139:856d2700e60b 429 ldmaPeripheralSignal_WTIMER1_CC1 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC1 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1, ///< Trig on WTIMER1_CC1.
<> 139:856d2700e60b 430 #endif
<> 139:856d2700e60b 431 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1CC2)
<> 139:856d2700e60b 432 ldmaPeripheralSignal_WTIMER1_CC2 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC2 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1, ///< Trig on WTIMER1_CC2.
<> 139:856d2700e60b 433 #endif
<> 139:856d2700e60b 434 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1CC3)
<> 139:856d2700e60b 435 ldmaPeripheralSignal_WTIMER1_CC3 = LDMA_CH_REQSEL_SIGSEL_WTIMER1CC3 | LDMA_CH_REQSEL_SOURCESEL_WTIMER1, ///< Trig on WTIMER1_CC3.
<> 139:856d2700e60b 436 #endif
<> 139:856d2700e60b 437 #if defined(LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF)
<> 139:856d2700e60b 438 ldmaPeripheralSignal_WTIMER1_UFOF = LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF | LDMA_CH_REQSEL_SOURCESEL_WTIMER1 ///< Trig on WTIMER1_UFOF.
Kojto 113:f141b2784e32 439 #endif
Kojto 113:f141b2784e32 440 } LDMA_PeripheralSignal_t;
Kojto 113:f141b2784e32 441
Kojto 113:f141b2784e32 442
Kojto 113:f141b2784e32 443 /*******************************************************************************
Kojto 113:f141b2784e32 444 ******************************* STRUCTS ***********************************
Kojto 113:f141b2784e32 445 ******************************************************************************/
Kojto 113:f141b2784e32 446
Kojto 113:f141b2784e32 447 /**
Kojto 113:f141b2784e32 448 * @brief
Kojto 113:f141b2784e32 449 * DMA descriptor.
Kojto 113:f141b2784e32 450 * @details
Kojto 113:f141b2784e32 451 * The LDMA DMA controller supports three different DMA descriptors. Each
Kojto 113:f141b2784e32 452 * consist of four WORD's which map directly onto hw control registers for a
Kojto 113:f141b2784e32 453 * given DMA channel. The three descriptor types are XFER, SYNC and WRI.
Kojto 113:f141b2784e32 454 * Refer to the reference manual for further information.
Kojto 113:f141b2784e32 455 */
Kojto 113:f141b2784e32 456 typedef union
Kojto 113:f141b2784e32 457 {
Kojto 113:f141b2784e32 458 /**
Kojto 113:f141b2784e32 459 * TRANSFER DMA descriptor, this is the only descriptor type which can be
Kojto 113:f141b2784e32 460 * used to start a DMA transfer.
Kojto 113:f141b2784e32 461 */
Kojto 113:f141b2784e32 462 struct
Kojto 113:f141b2784e32 463 {
Kojto 113:f141b2784e32 464 uint32_t structType : 2; /**< Set to 0 to select XFER descriptor type. */
Kojto 113:f141b2784e32 465 uint32_t reserved0 : 1;
Kojto 113:f141b2784e32 466 uint32_t structReq : 1; /**< DMA transfer trigger during LINKLOAD. */
Kojto 113:f141b2784e32 467 uint32_t xferCnt : 11; /**< Transfer count minus one. */
Kojto 113:f141b2784e32 468 uint32_t byteSwap : 1; /**< Enable byte swapping transfers. */
Kojto 113:f141b2784e32 469 uint32_t blockSize : 4; /**< Number of unit transfers per arb. cycle. */
Kojto 113:f141b2784e32 470 uint32_t doneIfs : 1; /**< Generate interrupt when done. */
Kojto 113:f141b2784e32 471 uint32_t reqMode : 1; /**< Block or cycle transfer selector. */
Kojto 113:f141b2784e32 472 uint32_t decLoopCnt : 1; /**< Enable looped transfers. */
Kojto 113:f141b2784e32 473 uint32_t ignoreSrec : 1; /**< Ignore single requests. */
Kojto 113:f141b2784e32 474 uint32_t srcInc : 2; /**< Source address increment unit size. */
Kojto 113:f141b2784e32 475 uint32_t size : 2; /**< DMA transfer unit size. */
Kojto 113:f141b2784e32 476 uint32_t dstInc : 2; /**< Destination address increment unit size. */
Kojto 113:f141b2784e32 477 uint32_t srcAddrMode: 1; /**< Source addressing mode. */
Kojto 113:f141b2784e32 478 uint32_t dstAddrMode: 1; /**< Destination addressing mode. */
Kojto 113:f141b2784e32 479
Kojto 113:f141b2784e32 480 uint32_t srcAddr; /**< DMA source address. */
Kojto 113:f141b2784e32 481 uint32_t dstAddr; /**< DMA destination address. */
Kojto 113:f141b2784e32 482
Kojto 113:f141b2784e32 483 uint32_t linkMode : 1; /**< Select absolute or relative link address.*/
Kojto 113:f141b2784e32 484 uint32_t link : 1; /**< Enable LINKLOAD when transfer is done. */
Kojto 113:f141b2784e32 485 int32_t linkAddr : 30; /**< Address of next (linked) descriptor. */
Kojto 113:f141b2784e32 486 } xfer;
Kojto 113:f141b2784e32 487
Kojto 113:f141b2784e32 488 /** SYNCHRONIZE DMA descriptor, used for intra channel transfer
Kojto 113:f141b2784e32 489 * syncronization.
Kojto 113:f141b2784e32 490 */
Kojto 113:f141b2784e32 491 struct
Kojto 113:f141b2784e32 492 {
Kojto 113:f141b2784e32 493 uint32_t structType : 2; /**< Set to 1 to select SYNC descriptor type. */
Kojto 113:f141b2784e32 494 uint32_t reserved0 : 1;
Kojto 113:f141b2784e32 495 uint32_t structReq : 1; /**< DMA transfer trigger during LINKLOAD. */
Kojto 113:f141b2784e32 496 uint32_t xferCnt : 11; /**< Transfer count minus one. */
Kojto 113:f141b2784e32 497 uint32_t byteSwap : 1; /**< Enable byte swapping transfers. */
Kojto 113:f141b2784e32 498 uint32_t blockSize : 4; /**< Number of unit transfers per arb. cycle. */
Kojto 113:f141b2784e32 499 uint32_t doneIfs : 1; /**< Generate interrupt when done. */
Kojto 113:f141b2784e32 500 uint32_t reqMode : 1; /**< Block or cycle transfer selector. */
Kojto 113:f141b2784e32 501 uint32_t decLoopCnt : 1; /**< Enable looped transfers. */
Kojto 113:f141b2784e32 502 uint32_t ignoreSrec : 1; /**< Ignore single requests. */
Kojto 113:f141b2784e32 503 uint32_t srcInc : 2; /**< Source address increment unit size. */
Kojto 113:f141b2784e32 504 uint32_t size : 2; /**< DMA transfer unit size. */
Kojto 113:f141b2784e32 505 uint32_t dstInc : 2; /**< Destination address increment unit size. */
Kojto 113:f141b2784e32 506 uint32_t srcAddrMode: 1; /**< Source addressing mode. */
Kojto 113:f141b2784e32 507 uint32_t dstAddrMode: 1; /**< Destination addressing mode. */
Kojto 113:f141b2784e32 508
Kojto 113:f141b2784e32 509 uint32_t syncSet : 8; /**< Set bits in LDMA_CTRL.SYNCTRIG register. */
Kojto 113:f141b2784e32 510 uint32_t syncClr : 8; /**< Clear bits in LDMA_CTRL.SYNCTRIG register*/
Kojto 113:f141b2784e32 511 uint32_t reserved3 : 16;
Kojto 113:f141b2784e32 512 uint32_t matchVal : 8; /**< Sync trig match value. */
Kojto 113:f141b2784e32 513 uint32_t matchEn : 8; /**< Sync trig match enable. */
Kojto 113:f141b2784e32 514 uint32_t reserved4 : 16;
Kojto 113:f141b2784e32 515
Kojto 113:f141b2784e32 516 uint32_t linkMode : 1; /**< Select absolute or relative link address.*/
Kojto 113:f141b2784e32 517 uint32_t link : 1; /**< Enable LINKLOAD when transfer is done. */
Kojto 113:f141b2784e32 518 int32_t linkAddr : 30; /**< Address of next (linked) descriptor. */
Kojto 113:f141b2784e32 519 } sync;
Kojto 113:f141b2784e32 520
Kojto 113:f141b2784e32 521 /** WRITE DMA descriptor, used for write immediate operations. */
Kojto 113:f141b2784e32 522 struct
Kojto 113:f141b2784e32 523 {
Kojto 113:f141b2784e32 524 uint32_t structType : 2; /**< Set to 2 to select WRITE descriptor type.*/
Kojto 113:f141b2784e32 525 uint32_t reserved0 : 1;
Kojto 113:f141b2784e32 526 uint32_t structReq : 1; /**< DMA transfer trigger during LINKLOAD. */
Kojto 113:f141b2784e32 527 uint32_t xferCnt : 11; /**< Transfer count minus one. */
Kojto 113:f141b2784e32 528 uint32_t byteSwap : 1; /**< Enable byte swapping transfers. */
Kojto 113:f141b2784e32 529 uint32_t blockSize : 4; /**< Number of unit transfers per arb. cycle. */
Kojto 113:f141b2784e32 530 uint32_t doneIfs : 1; /**< Generate interrupt when done. */
Kojto 113:f141b2784e32 531 uint32_t reqMode : 1; /**< Block or cycle transfer selector. */
Kojto 113:f141b2784e32 532 uint32_t decLoopCnt : 1; /**< Enable looped transfers. */
Kojto 113:f141b2784e32 533 uint32_t ignoreSrec : 1; /**< Ignore single requests. */
Kojto 113:f141b2784e32 534 uint32_t srcInc : 2; /**< Source address increment unit size. */
Kojto 113:f141b2784e32 535 uint32_t size : 2; /**< DMA transfer unit size. */
Kojto 113:f141b2784e32 536 uint32_t dstInc : 2; /**< Destination address increment unit size. */
Kojto 113:f141b2784e32 537 uint32_t srcAddrMode: 1; /**< Source addressing mode. */
Kojto 113:f141b2784e32 538 uint32_t dstAddrMode: 1; /**< Destination addressing mode. */
Kojto 113:f141b2784e32 539
Kojto 113:f141b2784e32 540 uint32_t immVal; /**< Data to be written at dstAddr. */
Kojto 113:f141b2784e32 541 uint32_t dstAddr; /**< DMA write destination address. */
Kojto 113:f141b2784e32 542
Kojto 113:f141b2784e32 543 uint32_t linkMode : 1; /**< Select absolute or relative link address.*/
Kojto 113:f141b2784e32 544 uint32_t link : 1; /**< Enable LINKLOAD when transfer is done. */
Kojto 113:f141b2784e32 545 int32_t linkAddr : 30; /**< Address of next (linked) descriptor. */
Kojto 113:f141b2784e32 546 } wri;
Kojto 113:f141b2784e32 547 } LDMA_Descriptor_t;
Kojto 113:f141b2784e32 548
Kojto 113:f141b2784e32 549 /** @brief LDMA initialization configuration structure. */
Kojto 113:f141b2784e32 550 typedef struct
Kojto 113:f141b2784e32 551 {
Kojto 113:f141b2784e32 552 uint8_t ldmaInitCtrlNumFixed; /**< Arbitration mode separator.*/
Kojto 113:f141b2784e32 553 uint8_t ldmaInitCtrlSyncPrsClrEn; /**< PRS Synctrig clear enable. */
Kojto 113:f141b2784e32 554 uint8_t ldmaInitCtrlSyncPrsSetEn; /**< PRS Synctrig set enable. */
Kojto 113:f141b2784e32 555 uint8_t ldmaInitIrqPriority; /**< LDMA IRQ priority (0..7). */
Kojto 113:f141b2784e32 556 } LDMA_Init_t;
Kojto 113:f141b2784e32 557
Kojto 113:f141b2784e32 558 /**
Kojto 113:f141b2784e32 559 * @brief
Kojto 113:f141b2784e32 560 * DMA transfer configuration structure.
Kojto 113:f141b2784e32 561 * @details
Kojto 113:f141b2784e32 562 * This struct configures all aspects of a DMA transfer.
Kojto 113:f141b2784e32 563 */
Kojto 113:f141b2784e32 564 typedef struct
Kojto 113:f141b2784e32 565 {
Kojto 113:f141b2784e32 566 uint32_t ldmaReqSel; /**< Selects DMA trigger source. */
Kojto 113:f141b2784e32 567 uint8_t ldmaCtrlSyncPrsClrOff; /**< PRS Synctrig clear enables to clear. */
Kojto 113:f141b2784e32 568 uint8_t ldmaCtrlSyncPrsClrOn; /**< PRS Synctrig clear enables to set. */
Kojto 113:f141b2784e32 569 uint8_t ldmaCtrlSyncPrsSetOff; /**< PRS Synctrig set enables to clear. */
Kojto 113:f141b2784e32 570 uint8_t ldmaCtrlSyncPrsSetOn; /**< PRS Synctrig set enables to set. */
Kojto 113:f141b2784e32 571 bool ldmaReqDis; /**< Mask the PRS trigger input. */
Kojto 113:f141b2784e32 572 bool ldmaDbgHalt; /**< Dis. DMA trig when cpu is halted. */
Kojto 113:f141b2784e32 573 uint8_t ldmaCfgArbSlots; /**< Arbitration slot number. */
Kojto 113:f141b2784e32 574 uint8_t ldmaCfgSrcIncSign; /**< Source addr. increment sign. */
Kojto 113:f141b2784e32 575 uint8_t ldmaCfgDstIncSign; /**< Dest. addr. increment sign. */
Kojto 113:f141b2784e32 576 uint8_t ldmaLoopCnt; /**< Counter for looped transfers. */
Kojto 113:f141b2784e32 577 } LDMA_TransferCfg_t;
Kojto 113:f141b2784e32 578
Kojto 113:f141b2784e32 579
Kojto 113:f141b2784e32 580 /*******************************************************************************
Kojto 113:f141b2784e32 581 ************************** STRUCT INITIALIZERS ****************************
Kojto 113:f141b2784e32 582 ******************************************************************************/
Kojto 113:f141b2784e32 583
Kojto 113:f141b2784e32 584
Kojto 113:f141b2784e32 585 /** @brief Default DMA initialization structure. */
Kojto 113:f141b2784e32 586 #define LDMA_INIT_DEFAULT \
Kojto 113:f141b2784e32 587 { \
Kojto 113:f141b2784e32 588 .ldmaInitCtrlNumFixed = _LDMA_CTRL_NUMFIXED_DEFAULT, /* Fixed priority arbitration. */ \
Kojto 113:f141b2784e32 589 .ldmaInitCtrlSyncPrsClrEn = 0, /* No PRS Synctrig clear enable*/ \
Kojto 113:f141b2784e32 590 .ldmaInitCtrlSyncPrsSetEn = 0, /* No PRS Synctrig set enable. */ \
Kojto 113:f141b2784e32 591 .ldmaInitIrqPriority = 3 /* IRQ priority level 3. */ \
Kojto 113:f141b2784e32 592 }
Kojto 113:f141b2784e32 593
Kojto 113:f141b2784e32 594 /**
Kojto 113:f141b2784e32 595 * @brief
Kojto 113:f141b2784e32 596 * Generic DMA transfer configuration for memory to memory transfers.
Kojto 113:f141b2784e32 597 */
Kojto 113:f141b2784e32 598 #define LDMA_TRANSFER_CFG_MEMORY() \
Kojto 113:f141b2784e32 599 { \
Kojto 113:f141b2784e32 600 0, 0, 0, 0, 0, \
Kojto 113:f141b2784e32 601 false, false, ldmaCfgArbSlotsAs1, \
Kojto 113:f141b2784e32 602 ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, 0 \
Kojto 113:f141b2784e32 603 }
Kojto 113:f141b2784e32 604
Kojto 113:f141b2784e32 605 /**
Kojto 113:f141b2784e32 606 * @brief
Kojto 113:f141b2784e32 607 * Generic DMA transfer configuration for looped memory to memory transfers.
Kojto 113:f141b2784e32 608 */
<> 128:9bcdf88f62b0 609 #define LDMA_TRANSFER_CFG_MEMORY_LOOP(loopCnt) \
Kojto 113:f141b2784e32 610 { \
Kojto 113:f141b2784e32 611 0, 0, 0, 0, 0, \
Kojto 113:f141b2784e32 612 false, false, ldmaCfgArbSlotsAs1, \
Kojto 113:f141b2784e32 613 ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, \
Kojto 113:f141b2784e32 614 loopCnt \
Kojto 113:f141b2784e32 615 }
Kojto 113:f141b2784e32 616
Kojto 113:f141b2784e32 617 /**
Kojto 113:f141b2784e32 618 * @brief
Kojto 113:f141b2784e32 619 * Generic DMA transfer configuration for memory to/from peripheral transfers.
Kojto 113:f141b2784e32 620 */
<> 128:9bcdf88f62b0 621 #define LDMA_TRANSFER_CFG_PERIPHERAL(signal) \
Kojto 113:f141b2784e32 622 { \
Kojto 113:f141b2784e32 623 signal, 0, 0, 0, 0, \
Kojto 113:f141b2784e32 624 false, false, ldmaCfgArbSlotsAs1, \
Kojto 113:f141b2784e32 625 ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, 0 \
Kojto 113:f141b2784e32 626 }
Kojto 113:f141b2784e32 627
Kojto 113:f141b2784e32 628 /**
Kojto 113:f141b2784e32 629 * @brief
Kojto 113:f141b2784e32 630 * Generic DMA transfer configuration for looped memory to/from peripheral transfers.
Kojto 113:f141b2784e32 631 */
<> 128:9bcdf88f62b0 632 #define LDMA_TRANSFER_CFG_PERIPHERAL_LOOP(signal, loopCnt) \
Kojto 113:f141b2784e32 633 { \
Kojto 113:f141b2784e32 634 signal, 0, 0, 0, 0, \
Kojto 113:f141b2784e32 635 false, false, ldmaCfgArbSlotsAs1, \
Kojto 113:f141b2784e32 636 ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, loopCnt \
Kojto 113:f141b2784e32 637 }
Kojto 113:f141b2784e32 638
Kojto 113:f141b2784e32 639 /**
Kojto 113:f141b2784e32 640 * @brief
Kojto 113:f141b2784e32 641 * DMA descriptor initializer for single memory to memory word transfer.
Kojto 113:f141b2784e32 642 * @param[in] src Source data address.
Kojto 113:f141b2784e32 643 * @param[in] dest Destination data address.
Kojto 113:f141b2784e32 644 * @param[in] count Number of words to transfer.
Kojto 113:f141b2784e32 645 */
<> 128:9bcdf88f62b0 646 #define LDMA_DESCRIPTOR_SINGLE_M2M_WORD(src, dest, count) \
Kojto 113:f141b2784e32 647 { \
Kojto 113:f141b2784e32 648 .xfer = \
Kojto 113:f141b2784e32 649 { \
Kojto 113:f141b2784e32 650 .structType = ldmaCtrlStructTypeXfer, \
Kojto 113:f141b2784e32 651 .structReq = 1, \
Kojto 113:f141b2784e32 652 .xferCnt = ( count ) - 1, \
Kojto 113:f141b2784e32 653 .byteSwap = 0, \
Kojto 113:f141b2784e32 654 .blockSize = ldmaCtrlBlockSizeUnit1, \
Kojto 113:f141b2784e32 655 .doneIfs = 1, \
Kojto 113:f141b2784e32 656 .reqMode = ldmaCtrlReqModeAll, \
Kojto 113:f141b2784e32 657 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 658 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 659 .srcInc = ldmaCtrlSrcIncOne, \
Kojto 113:f141b2784e32 660 .size = ldmaCtrlSizeWord, \
Kojto 113:f141b2784e32 661 .dstInc = ldmaCtrlDstIncOne, \
Kojto 113:f141b2784e32 662 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
Kojto 113:f141b2784e32 663 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
Kojto 113:f141b2784e32 664 .srcAddr = (uint32_t)(src), \
Kojto 113:f141b2784e32 665 .dstAddr = (uint32_t)(dest), \
Kojto 113:f141b2784e32 666 .linkMode = 0, \
Kojto 113:f141b2784e32 667 .link = 0, \
Kojto 113:f141b2784e32 668 .linkAddr = 0 \
Kojto 113:f141b2784e32 669 } \
Kojto 113:f141b2784e32 670 }
Kojto 113:f141b2784e32 671
Kojto 113:f141b2784e32 672 /**
Kojto 113:f141b2784e32 673 * @brief
Kojto 113:f141b2784e32 674 * DMA descriptor initializer for single memory to memory half-word transfer.
Kojto 113:f141b2784e32 675 * @param[in] src Source data address.
Kojto 113:f141b2784e32 676 * @param[in] dest Destination data address.
Kojto 113:f141b2784e32 677 * @param[in] count Number of half-words to transfer.
Kojto 113:f141b2784e32 678 */
<> 128:9bcdf88f62b0 679 #define LDMA_DESCRIPTOR_SINGLE_M2M_HALF(src, dest, count) \
Kojto 113:f141b2784e32 680 { \
Kojto 113:f141b2784e32 681 .xfer = \
Kojto 113:f141b2784e32 682 { \
Kojto 113:f141b2784e32 683 .structType = ldmaCtrlStructTypeXfer, \
Kojto 113:f141b2784e32 684 .structReq = 1, \
Kojto 113:f141b2784e32 685 .xferCnt = ( count ) - 1, \
Kojto 113:f141b2784e32 686 .byteSwap = 0, \
Kojto 113:f141b2784e32 687 .blockSize = ldmaCtrlBlockSizeUnit1, \
Kojto 113:f141b2784e32 688 .doneIfs = 1, \
Kojto 113:f141b2784e32 689 .reqMode = ldmaCtrlReqModeAll, \
Kojto 113:f141b2784e32 690 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 691 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 692 .srcInc = ldmaCtrlSrcIncOne, \
Kojto 113:f141b2784e32 693 .size = ldmaCtrlSizeHalf, \
Kojto 113:f141b2784e32 694 .dstInc = ldmaCtrlDstIncOne, \
Kojto 113:f141b2784e32 695 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
Kojto 113:f141b2784e32 696 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
Kojto 113:f141b2784e32 697 .srcAddr = (uint32_t)(src), \
Kojto 113:f141b2784e32 698 .dstAddr = (uint32_t)(dest), \
Kojto 113:f141b2784e32 699 .linkMode = 0, \
Kojto 113:f141b2784e32 700 .link = 0, \
Kojto 113:f141b2784e32 701 .linkAddr = 0 \
Kojto 113:f141b2784e32 702 } \
Kojto 113:f141b2784e32 703 }
Kojto 113:f141b2784e32 704
Kojto 113:f141b2784e32 705 /**
Kojto 113:f141b2784e32 706 * @brief
Kojto 113:f141b2784e32 707 * DMA descriptor initializer for single memory to memory byte transfer.
Kojto 113:f141b2784e32 708 * @param[in] src Source data address.
Kojto 113:f141b2784e32 709 * @param[in] dest Destination data address.
Kojto 113:f141b2784e32 710 * @param[in] count Number of bytes to transfer.
Kojto 113:f141b2784e32 711 */
<> 128:9bcdf88f62b0 712 #define LDMA_DESCRIPTOR_SINGLE_M2M_BYTE(src, dest, count) \
Kojto 113:f141b2784e32 713 { \
Kojto 113:f141b2784e32 714 .xfer = \
Kojto 113:f141b2784e32 715 { \
Kojto 113:f141b2784e32 716 .structType = ldmaCtrlStructTypeXfer, \
Kojto 113:f141b2784e32 717 .structReq = 1, \
<> 128:9bcdf88f62b0 718 .xferCnt = (count) - 1, \
Kojto 113:f141b2784e32 719 .byteSwap = 0, \
Kojto 113:f141b2784e32 720 .blockSize = ldmaCtrlBlockSizeUnit1, \
Kojto 113:f141b2784e32 721 .doneIfs = 1, \
Kojto 113:f141b2784e32 722 .reqMode = ldmaCtrlReqModeAll, \
Kojto 113:f141b2784e32 723 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 724 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 725 .srcInc = ldmaCtrlSrcIncOne, \
Kojto 113:f141b2784e32 726 .size = ldmaCtrlSizeByte, \
Kojto 113:f141b2784e32 727 .dstInc = ldmaCtrlDstIncOne, \
Kojto 113:f141b2784e32 728 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
Kojto 113:f141b2784e32 729 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
Kojto 113:f141b2784e32 730 .srcAddr = (uint32_t)(src), \
Kojto 113:f141b2784e32 731 .dstAddr = (uint32_t)(dest), \
Kojto 113:f141b2784e32 732 .linkMode = 0, \
Kojto 113:f141b2784e32 733 .link = 0, \
Kojto 113:f141b2784e32 734 .linkAddr = 0 \
Kojto 113:f141b2784e32 735 } \
Kojto 113:f141b2784e32 736 }
Kojto 113:f141b2784e32 737
Kojto 113:f141b2784e32 738 /**
Kojto 113:f141b2784e32 739 * @brief
Kojto 113:f141b2784e32 740 * DMA descriptor initializer for linked memory to memory word transfer.
Kojto 113:f141b2784e32 741 *
Kojto 113:f141b2784e32 742 * The link address must be an absolute address.
Kojto 113:f141b2784e32 743 * @note
Kojto 113:f141b2784e32 744 * The linkAddr member of the transfer descriptor is not
Kojto 113:f141b2784e32 745 * initialized.
Kojto 113:f141b2784e32 746 * @param[in] src Source data address.
Kojto 113:f141b2784e32 747 * @param[in] dest Destination data address.
Kojto 113:f141b2784e32 748 * @param[in] count Number of words to transfer.
Kojto 113:f141b2784e32 749 */
<> 128:9bcdf88f62b0 750 #define LDMA_DESCRIPTOR_LINKABS_M2M_WORD(src, dest, count) \
Kojto 113:f141b2784e32 751 { \
Kojto 113:f141b2784e32 752 .xfer = \
Kojto 113:f141b2784e32 753 { \
Kojto 113:f141b2784e32 754 .structType = ldmaCtrlStructTypeXfer, \
Kojto 113:f141b2784e32 755 .structReq = 1, \
<> 128:9bcdf88f62b0 756 .xferCnt = (count) - 1, \
Kojto 113:f141b2784e32 757 .byteSwap = 0, \
Kojto 113:f141b2784e32 758 .blockSize = ldmaCtrlBlockSizeUnit1, \
Kojto 113:f141b2784e32 759 .doneIfs = 0, \
Kojto 113:f141b2784e32 760 .reqMode = ldmaCtrlReqModeAll, \
Kojto 113:f141b2784e32 761 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 762 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 763 .srcInc = ldmaCtrlSrcIncOne, \
Kojto 113:f141b2784e32 764 .size = ldmaCtrlSizeWord, \
Kojto 113:f141b2784e32 765 .dstInc = ldmaCtrlDstIncOne, \
Kojto 113:f141b2784e32 766 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
Kojto 113:f141b2784e32 767 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
Kojto 113:f141b2784e32 768 .srcAddr = (uint32_t)(src), \
Kojto 113:f141b2784e32 769 .dstAddr = (uint32_t)(dest), \
Kojto 113:f141b2784e32 770 .linkMode = ldmaLinkModeAbs, \
Kojto 113:f141b2784e32 771 .link = 1, \
Kojto 113:f141b2784e32 772 .linkAddr = 0 /* Must be set runtime ! */ \
Kojto 113:f141b2784e32 773 } \
Kojto 113:f141b2784e32 774 }
Kojto 113:f141b2784e32 775
Kojto 113:f141b2784e32 776 /**
Kojto 113:f141b2784e32 777 * @brief
Kojto 113:f141b2784e32 778 * DMA descriptor initializer for linked memory to memory half-word transfer.
Kojto 113:f141b2784e32 779 *
Kojto 113:f141b2784e32 780 * The link address must be an absolute address.
Kojto 113:f141b2784e32 781 * @note
Kojto 113:f141b2784e32 782 * The linkAddr member of the transfer descriptor is not
Kojto 113:f141b2784e32 783 * initialized.
Kojto 113:f141b2784e32 784 * @param[in] src Source data address.
Kojto 113:f141b2784e32 785 * @param[in] dest Destination data address.
Kojto 113:f141b2784e32 786 * @param[in] count Number of half-words to transfer.
Kojto 113:f141b2784e32 787 */
<> 128:9bcdf88f62b0 788 #define LDMA_DESCRIPTOR_LINKABS_M2M_HALF(src, dest, count) \
Kojto 113:f141b2784e32 789 { \
Kojto 113:f141b2784e32 790 .xfer = \
Kojto 113:f141b2784e32 791 { \
Kojto 113:f141b2784e32 792 .structType = ldmaCtrlStructTypeXfer, \
Kojto 113:f141b2784e32 793 .structReq = 1, \
<> 128:9bcdf88f62b0 794 .xferCnt = (count) - 1, \
Kojto 113:f141b2784e32 795 .byteSwap = 0, \
Kojto 113:f141b2784e32 796 .blockSize = ldmaCtrlBlockSizeUnit1, \
Kojto 113:f141b2784e32 797 .doneIfs = 0, \
Kojto 113:f141b2784e32 798 .reqMode = ldmaCtrlReqModeAll, \
Kojto 113:f141b2784e32 799 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 800 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 801 .srcInc = ldmaCtrlSrcIncOne, \
Kojto 113:f141b2784e32 802 .size = ldmaCtrlSizeHalf, \
Kojto 113:f141b2784e32 803 .dstInc = ldmaCtrlDstIncOne, \
Kojto 113:f141b2784e32 804 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
Kojto 113:f141b2784e32 805 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
Kojto 113:f141b2784e32 806 .srcAddr = (uint32_t)(src), \
Kojto 113:f141b2784e32 807 .dstAddr = (uint32_t)(dest), \
Kojto 113:f141b2784e32 808 .linkMode = ldmaLinkModeAbs, \
Kojto 113:f141b2784e32 809 .link = 1, \
Kojto 113:f141b2784e32 810 .linkAddr = 0 /* Must be set runtime ! */ \
Kojto 113:f141b2784e32 811 } \
Kojto 113:f141b2784e32 812 }
Kojto 113:f141b2784e32 813
Kojto 113:f141b2784e32 814 /**
Kojto 113:f141b2784e32 815 * @brief
Kojto 113:f141b2784e32 816 * DMA descriptor initializer for linked memory to memory byte transfer.
Kojto 113:f141b2784e32 817 *
Kojto 113:f141b2784e32 818 * The link address must be an absolute address.
Kojto 113:f141b2784e32 819 * @note
Kojto 113:f141b2784e32 820 * The linkAddr member of the transfer descriptor is not
Kojto 113:f141b2784e32 821 * initialized.
Kojto 113:f141b2784e32 822 * @param[in] src Source data address.
Kojto 113:f141b2784e32 823 * @param[in] dest Destination data address.
Kojto 113:f141b2784e32 824 * @param[in] count Number of bytes to transfer.
Kojto 113:f141b2784e32 825 */
<> 128:9bcdf88f62b0 826 #define LDMA_DESCRIPTOR_LINKABS_M2M_BYTE(src, dest, count) \
Kojto 113:f141b2784e32 827 { \
Kojto 113:f141b2784e32 828 .xfer = \
Kojto 113:f141b2784e32 829 { \
Kojto 113:f141b2784e32 830 .structType = ldmaCtrlStructTypeXfer, \
Kojto 113:f141b2784e32 831 .structReq = 1, \
<> 128:9bcdf88f62b0 832 .xferCnt = (count) - 1, \
Kojto 113:f141b2784e32 833 .byteSwap = 0, \
Kojto 113:f141b2784e32 834 .blockSize = ldmaCtrlBlockSizeUnit1, \
Kojto 113:f141b2784e32 835 .doneIfs = 0, \
Kojto 113:f141b2784e32 836 .reqMode = ldmaCtrlReqModeAll, \
Kojto 113:f141b2784e32 837 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 838 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 839 .srcInc = ldmaCtrlSrcIncOne, \
Kojto 113:f141b2784e32 840 .size = ldmaCtrlSizeByte, \
Kojto 113:f141b2784e32 841 .dstInc = ldmaCtrlDstIncOne, \
Kojto 113:f141b2784e32 842 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
Kojto 113:f141b2784e32 843 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
Kojto 113:f141b2784e32 844 .srcAddr = (uint32_t)(src), \
Kojto 113:f141b2784e32 845 .dstAddr = (uint32_t)(dest), \
Kojto 113:f141b2784e32 846 .linkMode = ldmaLinkModeAbs, \
Kojto 113:f141b2784e32 847 .link = 1, \
Kojto 113:f141b2784e32 848 .linkAddr = 0 /* Must be set runtime ! */ \
Kojto 113:f141b2784e32 849 } \
Kojto 113:f141b2784e32 850 }
Kojto 113:f141b2784e32 851
Kojto 113:f141b2784e32 852 /**
Kojto 113:f141b2784e32 853 * @brief
Kojto 113:f141b2784e32 854 * DMA descriptor initializer for linked memory to memory word transfer.
Kojto 113:f141b2784e32 855 *
Kojto 113:f141b2784e32 856 * The link address is a relative address.
Kojto 113:f141b2784e32 857 * @note
Kojto 113:f141b2784e32 858 * The linkAddr member of the transfer descriptor is
Kojto 113:f141b2784e32 859 * initialized to 4, assuming that the next descriptor immediately follows
Kojto 113:f141b2784e32 860 * this descriptor (in memory).
Kojto 113:f141b2784e32 861 * @param[in] src Source data address.
Kojto 113:f141b2784e32 862 * @param[in] dest Destination data address.
Kojto 113:f141b2784e32 863 * @param[in] count Number of words to transfer.
Kojto 113:f141b2784e32 864 * @param[in] linkjmp Address of descriptor to link to expressed as a
Kojto 113:f141b2784e32 865 * signed number of descriptors from "here".
Kojto 113:f141b2784e32 866 * 1=one descriptor forward in memory,
Kojto 113:f141b2784e32 867 * 0=one this descriptor,
Kojto 113:f141b2784e32 868 * -1=one descriptor back in memory.
Kojto 113:f141b2784e32 869 */
<> 128:9bcdf88f62b0 870 #define LDMA_DESCRIPTOR_LINKREL_M2M_WORD(src, dest, count, linkjmp) \
Kojto 113:f141b2784e32 871 { \
Kojto 113:f141b2784e32 872 .xfer = \
Kojto 113:f141b2784e32 873 { \
Kojto 113:f141b2784e32 874 .structType = ldmaCtrlStructTypeXfer, \
Kojto 113:f141b2784e32 875 .structReq = 1, \
<> 128:9bcdf88f62b0 876 .xferCnt = (count) - 1, \
Kojto 113:f141b2784e32 877 .byteSwap = 0, \
Kojto 113:f141b2784e32 878 .blockSize = ldmaCtrlBlockSizeUnit1, \
Kojto 113:f141b2784e32 879 .doneIfs = 0, \
Kojto 113:f141b2784e32 880 .reqMode = ldmaCtrlReqModeAll, \
Kojto 113:f141b2784e32 881 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 882 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 883 .srcInc = ldmaCtrlSrcIncOne, \
Kojto 113:f141b2784e32 884 .size = ldmaCtrlSizeWord, \
Kojto 113:f141b2784e32 885 .dstInc = ldmaCtrlDstIncOne, \
Kojto 113:f141b2784e32 886 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
Kojto 113:f141b2784e32 887 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
Kojto 113:f141b2784e32 888 .srcAddr = (uint32_t)(src), \
Kojto 113:f141b2784e32 889 .dstAddr = (uint32_t)(dest), \
Kojto 113:f141b2784e32 890 .linkMode = ldmaLinkModeRel, \
Kojto 113:f141b2784e32 891 .link = 1, \
<> 128:9bcdf88f62b0 892 .linkAddr = (linkjmp) * 4 \
Kojto 113:f141b2784e32 893 } \
Kojto 113:f141b2784e32 894 }
Kojto 113:f141b2784e32 895
Kojto 113:f141b2784e32 896 /**
Kojto 113:f141b2784e32 897 * @brief
Kojto 113:f141b2784e32 898 * DMA descriptor initializer for linked memory to memory half-word transfer.
Kojto 113:f141b2784e32 899 *
Kojto 113:f141b2784e32 900 * The link address is a relative address.
Kojto 113:f141b2784e32 901 * @note
Kojto 113:f141b2784e32 902 * The linkAddr member of the transfer descriptor is
Kojto 113:f141b2784e32 903 * initialized to 4, assuming that the next descriptor immediately follows
Kojto 113:f141b2784e32 904 * this descriptor (in memory).
Kojto 113:f141b2784e32 905 * @param[in] src Source data address.
Kojto 113:f141b2784e32 906 * @param[in] dest Destination data address.
Kojto 113:f141b2784e32 907 * @param[in] count Number of half-words to transfer.
Kojto 113:f141b2784e32 908 * @param[in] linkjmp Address of descriptor to link to expressed as a
Kojto 113:f141b2784e32 909 * signed number of descriptors from "here".
Kojto 113:f141b2784e32 910 * 1=one descriptor forward in memory,
Kojto 113:f141b2784e32 911 * 0=one this descriptor,
Kojto 113:f141b2784e32 912 * -1=one descriptor back in memory.
Kojto 113:f141b2784e32 913 */
<> 128:9bcdf88f62b0 914 #define LDMA_DESCRIPTOR_LINKREL_M2M_HALF(src, dest, count, linkjmp) \
Kojto 113:f141b2784e32 915 { \
Kojto 113:f141b2784e32 916 .xfer = \
Kojto 113:f141b2784e32 917 { \
Kojto 113:f141b2784e32 918 .structType = ldmaCtrlStructTypeXfer, \
Kojto 113:f141b2784e32 919 .structReq = 1, \
<> 128:9bcdf88f62b0 920 .xferCnt = (count) - 1, \
Kojto 113:f141b2784e32 921 .byteSwap = 0, \
Kojto 113:f141b2784e32 922 .blockSize = ldmaCtrlBlockSizeUnit1, \
Kojto 113:f141b2784e32 923 .doneIfs = 0, \
Kojto 113:f141b2784e32 924 .reqMode = ldmaCtrlReqModeAll, \
Kojto 113:f141b2784e32 925 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 926 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 927 .srcInc = ldmaCtrlSrcIncOne, \
Kojto 113:f141b2784e32 928 .size = ldmaCtrlSizeHalf, \
Kojto 113:f141b2784e32 929 .dstInc = ldmaCtrlDstIncOne, \
Kojto 113:f141b2784e32 930 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
Kojto 113:f141b2784e32 931 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
Kojto 113:f141b2784e32 932 .srcAddr = (uint32_t)(src), \
Kojto 113:f141b2784e32 933 .dstAddr = (uint32_t)(dest), \
Kojto 113:f141b2784e32 934 .linkMode = ldmaLinkModeRel, \
Kojto 113:f141b2784e32 935 .link = 1, \
<> 128:9bcdf88f62b0 936 .linkAddr = (linkjmp) * 4 \
Kojto 113:f141b2784e32 937 } \
Kojto 113:f141b2784e32 938 }
Kojto 113:f141b2784e32 939
Kojto 113:f141b2784e32 940 /**
Kojto 113:f141b2784e32 941 * @brief
Kojto 113:f141b2784e32 942 * DMA descriptor initializer for linked memory to memory byte transfer.
Kojto 113:f141b2784e32 943 *
Kojto 113:f141b2784e32 944 * The link address is a relative address.
Kojto 113:f141b2784e32 945 * @note
Kojto 113:f141b2784e32 946 * The linkAddr member of the transfer descriptor is
Kojto 113:f141b2784e32 947 * initialized to 4, assuming that the next descriptor immediately follows
Kojto 113:f141b2784e32 948 * this descriptor (in memory).
Kojto 113:f141b2784e32 949 * @param[in] src Source data address.
Kojto 113:f141b2784e32 950 * @param[in] dest Destination data address.
Kojto 113:f141b2784e32 951 * @param[in] count Number of bytes to transfer.
Kojto 113:f141b2784e32 952 * @param[in] linkjmp Address of descriptor to link to expressed as a
Kojto 113:f141b2784e32 953 * signed number of descriptors from "here".
Kojto 113:f141b2784e32 954 * 1=one descriptor forward in memory,
Kojto 113:f141b2784e32 955 * 0=one this descriptor,
Kojto 113:f141b2784e32 956 * -1=one descriptor back in memory.
Kojto 113:f141b2784e32 957 */
<> 128:9bcdf88f62b0 958 #define LDMA_DESCRIPTOR_LINKREL_M2M_BYTE(src, dest, count, linkjmp) \
Kojto 113:f141b2784e32 959 { \
Kojto 113:f141b2784e32 960 .xfer = \
Kojto 113:f141b2784e32 961 { \
Kojto 113:f141b2784e32 962 .structType = ldmaCtrlStructTypeXfer, \
Kojto 113:f141b2784e32 963 .structReq = 1, \
<> 128:9bcdf88f62b0 964 .xferCnt = (count) - 1, \
Kojto 113:f141b2784e32 965 .byteSwap = 0, \
Kojto 113:f141b2784e32 966 .blockSize = ldmaCtrlBlockSizeUnit1, \
Kojto 113:f141b2784e32 967 .doneIfs = 0, \
Kojto 113:f141b2784e32 968 .reqMode = ldmaCtrlReqModeAll, \
Kojto 113:f141b2784e32 969 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 970 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 971 .srcInc = ldmaCtrlSrcIncOne, \
Kojto 113:f141b2784e32 972 .size = ldmaCtrlSizeByte, \
Kojto 113:f141b2784e32 973 .dstInc = ldmaCtrlDstIncOne, \
Kojto 113:f141b2784e32 974 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
Kojto 113:f141b2784e32 975 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
Kojto 113:f141b2784e32 976 .srcAddr = (uint32_t)(src), \
Kojto 113:f141b2784e32 977 .dstAddr = (uint32_t)(dest), \
Kojto 113:f141b2784e32 978 .linkMode = ldmaLinkModeRel, \
Kojto 113:f141b2784e32 979 .link = 1, \
<> 128:9bcdf88f62b0 980 .linkAddr = (linkjmp) * 4 \
Kojto 113:f141b2784e32 981 } \
Kojto 113:f141b2784e32 982 }
Kojto 113:f141b2784e32 983
Kojto 113:f141b2784e32 984 /**
Kojto 113:f141b2784e32 985 * @brief
Kojto 113:f141b2784e32 986 * DMA descriptor initializer for byte transfers from a peripheral to memory.
Kojto 113:f141b2784e32 987 * @param[in] src Peripheral data source register address.
Kojto 113:f141b2784e32 988 * @param[in] dest Destination data address.
Kojto 113:f141b2784e32 989 * @param[in] count Number of bytes to transfer.
Kojto 113:f141b2784e32 990 */
<> 128:9bcdf88f62b0 991 #define LDMA_DESCRIPTOR_SINGLE_P2M_BYTE(src, dest, count) \
Kojto 113:f141b2784e32 992 { \
Kojto 113:f141b2784e32 993 .xfer = \
Kojto 113:f141b2784e32 994 { \
Kojto 113:f141b2784e32 995 .structType = ldmaCtrlStructTypeXfer, \
Kojto 113:f141b2784e32 996 .structReq = 0, \
<> 128:9bcdf88f62b0 997 .xferCnt = (count) - 1, \
Kojto 113:f141b2784e32 998 .byteSwap = 0, \
Kojto 113:f141b2784e32 999 .blockSize = ldmaCtrlBlockSizeUnit1, \
Kojto 113:f141b2784e32 1000 .doneIfs = 1, \
Kojto 113:f141b2784e32 1001 .reqMode = ldmaCtrlReqModeBlock, \
Kojto 113:f141b2784e32 1002 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 1003 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 1004 .srcInc = ldmaCtrlSrcIncNone, \
Kojto 113:f141b2784e32 1005 .size = ldmaCtrlSizeByte, \
Kojto 113:f141b2784e32 1006 .dstInc = ldmaCtrlDstIncOne, \
Kojto 113:f141b2784e32 1007 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
Kojto 113:f141b2784e32 1008 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
Kojto 113:f141b2784e32 1009 .srcAddr = (uint32_t)(src), \
Kojto 113:f141b2784e32 1010 .dstAddr = (uint32_t)(dest), \
Kojto 113:f141b2784e32 1011 .linkMode = 0, \
Kojto 113:f141b2784e32 1012 .link = 0, \
Kojto 113:f141b2784e32 1013 .linkAddr = 0 \
Kojto 113:f141b2784e32 1014 } \
Kojto 113:f141b2784e32 1015 }
Kojto 113:f141b2784e32 1016
Kojto 113:f141b2784e32 1017 /**
Kojto 113:f141b2784e32 1018 * @brief
<> 128:9bcdf88f62b0 1019 * DMA descriptor initializer for byte transfers from a peripheral to a peripheral.
<> 128:9bcdf88f62b0 1020 * @param[in] src Peripheral data source register address.
<> 128:9bcdf88f62b0 1021 * @param[in] dest Peripheral data destination register address.
<> 128:9bcdf88f62b0 1022 * @param[in] count Number of bytes to transfer.
<> 128:9bcdf88f62b0 1023 */
<> 128:9bcdf88f62b0 1024 #define LDMA_DESCRIPTOR_SINGLE_P2P_BYTE(src, dest, count) \
<> 128:9bcdf88f62b0 1025 { \
<> 128:9bcdf88f62b0 1026 .xfer = \
<> 128:9bcdf88f62b0 1027 { \
<> 128:9bcdf88f62b0 1028 .structType = ldmaCtrlStructTypeXfer, \
<> 128:9bcdf88f62b0 1029 .structReq = 0, \
<> 128:9bcdf88f62b0 1030 .xferCnt = (count) - 1, \
<> 128:9bcdf88f62b0 1031 .byteSwap = 0, \
<> 128:9bcdf88f62b0 1032 .blockSize = ldmaCtrlBlockSizeUnit1, \
<> 128:9bcdf88f62b0 1033 .doneIfs = 1, \
<> 128:9bcdf88f62b0 1034 .reqMode = ldmaCtrlReqModeBlock, \
<> 128:9bcdf88f62b0 1035 .decLoopCnt = 0, \
<> 128:9bcdf88f62b0 1036 .ignoreSrec = 0, \
<> 128:9bcdf88f62b0 1037 .srcInc = ldmaCtrlSrcIncNone, \
<> 128:9bcdf88f62b0 1038 .size = ldmaCtrlSizeByte, \
<> 128:9bcdf88f62b0 1039 .dstInc = ldmaCtrlDstIncNone, \
<> 128:9bcdf88f62b0 1040 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
<> 128:9bcdf88f62b0 1041 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
<> 128:9bcdf88f62b0 1042 .srcAddr = (uint32_t)(src), \
<> 128:9bcdf88f62b0 1043 .dstAddr = (uint32_t)(dest), \
<> 128:9bcdf88f62b0 1044 .linkMode = 0, \
<> 128:9bcdf88f62b0 1045 .link = 0, \
<> 128:9bcdf88f62b0 1046 .linkAddr = 0 \
<> 128:9bcdf88f62b0 1047 } \
<> 128:9bcdf88f62b0 1048 }
<> 128:9bcdf88f62b0 1049
<> 128:9bcdf88f62b0 1050 /**
<> 128:9bcdf88f62b0 1051 * @brief
Kojto 113:f141b2784e32 1052 * DMA descriptor initializer for byte transfers from memory to a peripheral
Kojto 113:f141b2784e32 1053 * @param[in] src Source data address.
Kojto 113:f141b2784e32 1054 * @param[in] dest Peripheral data register destination address.
Kojto 113:f141b2784e32 1055 * @param[in] count Number of bytes to transfer.
Kojto 113:f141b2784e32 1056 */
<> 128:9bcdf88f62b0 1057 #define LDMA_DESCRIPTOR_SINGLE_M2P_BYTE(src, dest, count) \
Kojto 113:f141b2784e32 1058 { \
Kojto 113:f141b2784e32 1059 .xfer = \
Kojto 113:f141b2784e32 1060 { \
Kojto 113:f141b2784e32 1061 .structType = ldmaCtrlStructTypeXfer, \
Kojto 113:f141b2784e32 1062 .structReq = 0, \
<> 128:9bcdf88f62b0 1063 .xferCnt = (count) - 1, \
Kojto 113:f141b2784e32 1064 .byteSwap = 0, \
Kojto 113:f141b2784e32 1065 .blockSize = ldmaCtrlBlockSizeUnit1, \
Kojto 113:f141b2784e32 1066 .doneIfs = 1, \
Kojto 113:f141b2784e32 1067 .reqMode = ldmaCtrlReqModeBlock, \
Kojto 113:f141b2784e32 1068 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 1069 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 1070 .srcInc = ldmaCtrlSrcIncOne, \
Kojto 113:f141b2784e32 1071 .size = ldmaCtrlSizeByte, \
Kojto 113:f141b2784e32 1072 .dstInc = ldmaCtrlDstIncNone, \
Kojto 113:f141b2784e32 1073 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
Kojto 113:f141b2784e32 1074 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
Kojto 113:f141b2784e32 1075 .srcAddr = (uint32_t)(src), \
Kojto 113:f141b2784e32 1076 .dstAddr = (uint32_t)(dest), \
Kojto 113:f141b2784e32 1077 .linkMode = 0, \
Kojto 113:f141b2784e32 1078 .link = 0, \
Kojto 113:f141b2784e32 1079 .linkAddr = 0 \
Kojto 113:f141b2784e32 1080 } \
Kojto 113:f141b2784e32 1081 }
Kojto 113:f141b2784e32 1082
Kojto 113:f141b2784e32 1083 /**
Kojto 113:f141b2784e32 1084 * @brief
Kojto 113:f141b2784e32 1085 * DMA descriptor initializer for byte transfers from a peripheral to memory.
Kojto 113:f141b2784e32 1086 * @param[in] src Peripheral data source register address.
Kojto 113:f141b2784e32 1087 * @param[in] dest Destination data address.
Kojto 113:f141b2784e32 1088 * @param[in] count Number of bytes to transfer.
Kojto 113:f141b2784e32 1089 * @param[in] linkjmp Address of descriptor to link to expressed as a
Kojto 113:f141b2784e32 1090 * signed number of descriptors from "here".
Kojto 113:f141b2784e32 1091 * 1=one descriptor forward in memory,
Kojto 113:f141b2784e32 1092 * 0=one this descriptor,
Kojto 113:f141b2784e32 1093 * -1=one descriptor back in memory.
Kojto 113:f141b2784e32 1094 */
<> 128:9bcdf88f62b0 1095 #define LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(src, dest, count, linkjmp) \
Kojto 113:f141b2784e32 1096 { \
Kojto 113:f141b2784e32 1097 .xfer = \
Kojto 113:f141b2784e32 1098 { \
Kojto 113:f141b2784e32 1099 .structType = ldmaCtrlStructTypeXfer, \
Kojto 113:f141b2784e32 1100 .structReq = 0, \
<> 128:9bcdf88f62b0 1101 .xferCnt = (count) - 1, \
Kojto 113:f141b2784e32 1102 .byteSwap = 0, \
Kojto 113:f141b2784e32 1103 .blockSize = ldmaCtrlBlockSizeUnit1, \
Kojto 113:f141b2784e32 1104 .doneIfs = 1, \
Kojto 113:f141b2784e32 1105 .reqMode = ldmaCtrlReqModeBlock, \
Kojto 113:f141b2784e32 1106 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 1107 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 1108 .srcInc = ldmaCtrlSrcIncNone, \
Kojto 113:f141b2784e32 1109 .size = ldmaCtrlSizeByte, \
Kojto 113:f141b2784e32 1110 .dstInc = ldmaCtrlDstIncOne, \
Kojto 113:f141b2784e32 1111 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
Kojto 113:f141b2784e32 1112 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
Kojto 113:f141b2784e32 1113 .srcAddr = (uint32_t)(src), \
Kojto 113:f141b2784e32 1114 .dstAddr = (uint32_t)(dest), \
Kojto 113:f141b2784e32 1115 .linkMode = ldmaLinkModeRel, \
Kojto 113:f141b2784e32 1116 .link = 1, \
<> 128:9bcdf88f62b0 1117 .linkAddr = (linkjmp) * 4 \
Kojto 113:f141b2784e32 1118 } \
Kojto 113:f141b2784e32 1119 }
Kojto 113:f141b2784e32 1120
Kojto 113:f141b2784e32 1121 /**
Kojto 113:f141b2784e32 1122 * @brief
Kojto 113:f141b2784e32 1123 * DMA descriptor initializer for byte transfers from memory to a peripheral
Kojto 113:f141b2784e32 1124 * @param[in] src Source data address.
Kojto 113:f141b2784e32 1125 * @param[in] dest Peripheral data register destination address.
Kojto 113:f141b2784e32 1126 * @param[in] count Number of bytes to transfer.
Kojto 113:f141b2784e32 1127 * @param[in] linkjmp Address of descriptor to link to expressed as a
Kojto 113:f141b2784e32 1128 * signed number of descriptors from "here".
Kojto 113:f141b2784e32 1129 * 1=one descriptor forward in memory,
Kojto 113:f141b2784e32 1130 * 0=one this descriptor,
Kojto 113:f141b2784e32 1131 * -1=one descriptor back in memory.
Kojto 113:f141b2784e32 1132 */
<> 128:9bcdf88f62b0 1133 #define LDMA_DESCRIPTOR_LINKREL_M2P_BYTE(src, dest, count, linkjmp) \
Kojto 113:f141b2784e32 1134 { \
Kojto 113:f141b2784e32 1135 .xfer = \
Kojto 113:f141b2784e32 1136 { \
Kojto 113:f141b2784e32 1137 .structType = ldmaCtrlStructTypeXfer, \
Kojto 113:f141b2784e32 1138 .structReq = 0, \
<> 128:9bcdf88f62b0 1139 .xferCnt = (count) - 1, \
Kojto 113:f141b2784e32 1140 .byteSwap = 0, \
Kojto 113:f141b2784e32 1141 .blockSize = ldmaCtrlBlockSizeUnit1, \
Kojto 113:f141b2784e32 1142 .doneIfs = 1, \
Kojto 113:f141b2784e32 1143 .reqMode = ldmaCtrlReqModeBlock, \
Kojto 113:f141b2784e32 1144 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 1145 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 1146 .srcInc = ldmaCtrlSrcIncOne, \
Kojto 113:f141b2784e32 1147 .size = ldmaCtrlSizeByte, \
Kojto 113:f141b2784e32 1148 .dstInc = ldmaCtrlDstIncNone, \
Kojto 113:f141b2784e32 1149 .srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
Kojto 113:f141b2784e32 1150 .dstAddrMode = ldmaCtrlDstAddrModeAbs, \
Kojto 113:f141b2784e32 1151 .srcAddr = (uint32_t)(src), \
Kojto 113:f141b2784e32 1152 .dstAddr = (uint32_t)(dest), \
Kojto 113:f141b2784e32 1153 .linkMode = ldmaLinkModeRel, \
Kojto 113:f141b2784e32 1154 .link = 1, \
<> 128:9bcdf88f62b0 1155 .linkAddr = (linkjmp) * 4 \
Kojto 113:f141b2784e32 1156 } \
Kojto 113:f141b2784e32 1157 }
Kojto 113:f141b2784e32 1158
Kojto 113:f141b2784e32 1159 /**
Kojto 113:f141b2784e32 1160 * @brief
Kojto 113:f141b2784e32 1161 * DMA descriptor initializer for Immediate WRITE transfer
Kojto 113:f141b2784e32 1162 * @param[in] value Immediate value to write.
Kojto 113:f141b2784e32 1163 * @param[in] address Write sddress.
Kojto 113:f141b2784e32 1164 */
<> 128:9bcdf88f62b0 1165 #define LDMA_DESCRIPTOR_SINGLE_WRITE(value, address) \
Kojto 113:f141b2784e32 1166 { \
Kojto 113:f141b2784e32 1167 .wri = \
Kojto 113:f141b2784e32 1168 { \
Kojto 113:f141b2784e32 1169 .structType = ldmaCtrlStructTypeWrite, \
Kojto 113:f141b2784e32 1170 .structReq = 1, \
Kojto 113:f141b2784e32 1171 .xferCnt = 0, \
Kojto 113:f141b2784e32 1172 .byteSwap = 0, \
Kojto 113:f141b2784e32 1173 .blockSize = 0, \
Kojto 113:f141b2784e32 1174 .doneIfs = 1, \
Kojto 113:f141b2784e32 1175 .reqMode = 0, \
Kojto 113:f141b2784e32 1176 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 1177 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 1178 .srcInc = 0, \
Kojto 113:f141b2784e32 1179 .size = 0, \
Kojto 113:f141b2784e32 1180 .dstInc = 0, \
Kojto 113:f141b2784e32 1181 .srcAddrMode = 0, \
Kojto 113:f141b2784e32 1182 .dstAddrMode = 0, \
Kojto 113:f141b2784e32 1183 .immVal = (value), \
Kojto 113:f141b2784e32 1184 .dstAddr = (uint32_t)(address), \
Kojto 113:f141b2784e32 1185 .linkMode = 0, \
Kojto 113:f141b2784e32 1186 .link = 0, \
Kojto 113:f141b2784e32 1187 .linkAddr = 0 \
Kojto 113:f141b2784e32 1188 } \
Kojto 113:f141b2784e32 1189 }
Kojto 113:f141b2784e32 1190
Kojto 113:f141b2784e32 1191 /**
Kojto 113:f141b2784e32 1192 * @brief
Kojto 113:f141b2784e32 1193 * DMA descriptor initializer for Immediate WRITE transfer
Kojto 113:f141b2784e32 1194 *
Kojto 113:f141b2784e32 1195 * The link address must be an absolute address.
Kojto 113:f141b2784e32 1196 * @note
Kojto 113:f141b2784e32 1197 * The linkAddr member of the transfer descriptor is not
Kojto 113:f141b2784e32 1198 * initialized.
Kojto 113:f141b2784e32 1199 * @param[in] value Immediate value to write.
Kojto 113:f141b2784e32 1200 * @param[in] address Write sddress.
Kojto 113:f141b2784e32 1201 */
<> 128:9bcdf88f62b0 1202 #define LDMA_DESCRIPTOR_LINKABS_WRITE(value, address) \
Kojto 113:f141b2784e32 1203 { \
Kojto 113:f141b2784e32 1204 .wri = \
Kojto 113:f141b2784e32 1205 { \
Kojto 113:f141b2784e32 1206 .structType = ldmaCtrlStructTypeWrite, \
Kojto 113:f141b2784e32 1207 .structReq = 1, \
Kojto 113:f141b2784e32 1208 .xferCnt = 0, \
Kojto 113:f141b2784e32 1209 .byteSwap = 0, \
Kojto 113:f141b2784e32 1210 .blockSize = 0, \
Kojto 113:f141b2784e32 1211 .doneIfs = 0, \
Kojto 113:f141b2784e32 1212 .reqMode = 0, \
Kojto 113:f141b2784e32 1213 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 1214 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 1215 .srcInc = 0, \
Kojto 113:f141b2784e32 1216 .size = 0, \
Kojto 113:f141b2784e32 1217 .dstInc = 0, \
Kojto 113:f141b2784e32 1218 .srcAddrMode = 0, \
Kojto 113:f141b2784e32 1219 .dstAddrMode = 0, \
Kojto 113:f141b2784e32 1220 .immVal = (value), \
Kojto 113:f141b2784e32 1221 .dstAddr = (uint32_t)(address), \
Kojto 113:f141b2784e32 1222 .linkMode = ldmaLinkModeAbs, \
Kojto 113:f141b2784e32 1223 .link = 1, \
Kojto 113:f141b2784e32 1224 .linkAddr = 0 /* Must be set runtime ! */ \
Kojto 113:f141b2784e32 1225 } \
Kojto 113:f141b2784e32 1226 }
Kojto 113:f141b2784e32 1227
Kojto 113:f141b2784e32 1228 /**
Kojto 113:f141b2784e32 1229 * @brief
Kojto 113:f141b2784e32 1230 * DMA descriptor initializer for Immediate WRITE transfer
Kojto 113:f141b2784e32 1231 * @param[in] value Immediate value to write.
Kojto 113:f141b2784e32 1232 * @param[in] address Write sddress.
Kojto 113:f141b2784e32 1233 * @param[in] linkjmp Address of descriptor to link to expressed as a
Kojto 113:f141b2784e32 1234 * signed number of descriptors from "here".
Kojto 113:f141b2784e32 1235 * 1=one descriptor forward in memory,
Kojto 113:f141b2784e32 1236 * 0=one this descriptor,
Kojto 113:f141b2784e32 1237 * -1=one descriptor back in memory.
Kojto 113:f141b2784e32 1238 */
<> 128:9bcdf88f62b0 1239 #define LDMA_DESCRIPTOR_LINKREL_WRITE(value, address, linkjmp) \
Kojto 113:f141b2784e32 1240 { \
Kojto 113:f141b2784e32 1241 .wri = \
Kojto 113:f141b2784e32 1242 { \
Kojto 113:f141b2784e32 1243 .structType = ldmaCtrlStructTypeWrite, \
Kojto 113:f141b2784e32 1244 .structReq = 1, \
Kojto 113:f141b2784e32 1245 .xferCnt = 0, \
Kojto 113:f141b2784e32 1246 .byteSwap = 0, \
Kojto 113:f141b2784e32 1247 .blockSize = 0, \
Kojto 113:f141b2784e32 1248 .doneIfs = 0, \
Kojto 113:f141b2784e32 1249 .reqMode = 0, \
Kojto 113:f141b2784e32 1250 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 1251 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 1252 .srcInc = 0, \
Kojto 113:f141b2784e32 1253 .size = 0, \
Kojto 113:f141b2784e32 1254 .dstInc = 0, \
Kojto 113:f141b2784e32 1255 .srcAddrMode = 0, \
Kojto 113:f141b2784e32 1256 .dstAddrMode = 0, \
Kojto 113:f141b2784e32 1257 .immVal = (value), \
Kojto 113:f141b2784e32 1258 .dstAddr = (uint32_t)(address), \
Kojto 113:f141b2784e32 1259 .linkMode = ldmaLinkModeRel, \
Kojto 113:f141b2784e32 1260 .link = 1, \
<> 128:9bcdf88f62b0 1261 .linkAddr = (linkjmp) * 4 \
Kojto 113:f141b2784e32 1262 } \
Kojto 113:f141b2784e32 1263 }
Kojto 113:f141b2784e32 1264
Kojto 113:f141b2784e32 1265 /**
Kojto 113:f141b2784e32 1266 * @brief
Kojto 113:f141b2784e32 1267 * DMA descriptor initializer for SYNC transfer
Kojto 113:f141b2784e32 1268 * @param[in] set Sync pattern bits to set.
Kojto 113:f141b2784e32 1269 * @param[in] clr Sync pattern bits to clear.
Kojto 113:f141b2784e32 1270 * @param[in] matchValue Sync pattern to match.
Kojto 113:f141b2784e32 1271 * @param[in] matchEnable Sync pattern bits to enable for match.
Kojto 113:f141b2784e32 1272 */
<> 128:9bcdf88f62b0 1273 #define LDMA_DESCRIPTOR_SINGLE_SYNC(set, clr, matchValue, matchEnable) \
Kojto 113:f141b2784e32 1274 { \
Kojto 113:f141b2784e32 1275 .sync = \
Kojto 113:f141b2784e32 1276 { \
Kojto 113:f141b2784e32 1277 .structType = ldmaCtrlStructTypeSync, \
Kojto 113:f141b2784e32 1278 .structReq = 1, \
Kojto 113:f141b2784e32 1279 .xferCnt = 0, \
Kojto 113:f141b2784e32 1280 .byteSwap = 0, \
Kojto 113:f141b2784e32 1281 .blockSize = 0, \
Kojto 113:f141b2784e32 1282 .doneIfs = 1, \
Kojto 113:f141b2784e32 1283 .reqMode = 0, \
Kojto 113:f141b2784e32 1284 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 1285 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 1286 .srcInc = 0, \
Kojto 113:f141b2784e32 1287 .size = 0, \
Kojto 113:f141b2784e32 1288 .dstInc = 0, \
Kojto 113:f141b2784e32 1289 .srcAddrMode = 0, \
Kojto 113:f141b2784e32 1290 .dstAddrMode = 0, \
Kojto 113:f141b2784e32 1291 .syncSet = (set), \
Kojto 113:f141b2784e32 1292 .syncClr = (clr), \
Kojto 113:f141b2784e32 1293 .matchVal = (matchValue), \
Kojto 113:f141b2784e32 1294 .matchEn = (matchEnable), \
Kojto 113:f141b2784e32 1295 .linkMode = 0, \
Kojto 113:f141b2784e32 1296 .link = 0, \
Kojto 113:f141b2784e32 1297 .linkAddr = 0 \
Kojto 113:f141b2784e32 1298 } \
Kojto 113:f141b2784e32 1299 }
Kojto 113:f141b2784e32 1300
Kojto 113:f141b2784e32 1301 /**
Kojto 113:f141b2784e32 1302 * @brief
Kojto 113:f141b2784e32 1303 * DMA descriptor initializer for SYNC transfer
Kojto 113:f141b2784e32 1304 *
Kojto 113:f141b2784e32 1305 * The link address must be an absolute address.
Kojto 113:f141b2784e32 1306 * @note
Kojto 113:f141b2784e32 1307 * The linkAddr member of the transfer descriptor is not
Kojto 113:f141b2784e32 1308 * initialized.
Kojto 113:f141b2784e32 1309 * @param[in] set Sync pattern bits to set.
Kojto 113:f141b2784e32 1310 * @param[in] clr Sync pattern bits to clear.
Kojto 113:f141b2784e32 1311 * @param[in] matchValue Sync pattern to match.
Kojto 113:f141b2784e32 1312 * @param[in] matchEnable Sync pattern bits to enable for match.
Kojto 113:f141b2784e32 1313 */
<> 128:9bcdf88f62b0 1314 #define LDMA_DESCRIPTOR_LINKABS_SYNC(set, clr, matchValue, matchEnable) \
Kojto 113:f141b2784e32 1315 { \
Kojto 113:f141b2784e32 1316 .sync = \
Kojto 113:f141b2784e32 1317 { \
Kojto 113:f141b2784e32 1318 .structType = ldmaCtrlStructTypeSync, \
Kojto 113:f141b2784e32 1319 .structReq = 1, \
Kojto 113:f141b2784e32 1320 .xferCnt = 0, \
Kojto 113:f141b2784e32 1321 .byteSwap = 0, \
Kojto 113:f141b2784e32 1322 .blockSize = 0, \
Kojto 113:f141b2784e32 1323 .doneIfs = 0, \
Kojto 113:f141b2784e32 1324 .reqMode = 0, \
Kojto 113:f141b2784e32 1325 .decLoopCnt = 0, \
Kojto 113:f141b2784e32 1326 .ignoreSrec = 0, \
Kojto 113:f141b2784e32 1327 .srcInc = 0, \
Kojto 113:f141b2784e32 1328 .size = 0, \
Kojto 113:f141b2784e32 1329 .dstInc = 0, \
Kojto 113:f141b2784e32 1330 .srcAddrMode = 0, \
Kojto 113:f141b2784e32 1331 .dstAddrMode = 0, \
Kojto 113:f141b2784e32 1332 .syncSet = (set), \
Kojto 113:f141b2784e32 1333 .syncClr = (clr), \
Kojto 113:f141b2784e32 1334 .matchVal = (matchValue), \
Kojto 113:f141b2784e32 1335 .matchEn = (matchEnable), \
Kojto 113:f141b2784e32 1336 .linkMode = ldmaLinkModeAbs, \
Kojto 113:f141b2784e32 1337 .link = 1, \
Kojto 113:f141b2784e32 1338 .linkAddr = 0 /* Must be set runtime ! */ \
Kojto 113:f141b2784e32 1339 } \
Kojto 113:f141b2784e32 1340 }
Kojto 113:f141b2784e32 1341
Kojto 113:f141b2784e32 1342 /**
Kojto 113:f141b2784e32 1343 * @brief
Kojto 113:f141b2784e32 1344 * DMA descriptor initializer for SYNC transfer
Kojto 113:f141b2784e32 1345 * @param[in] set Sync pattern bits to set.
Kojto 113:f141b2784e32 1346 * @param[in] clr Sync pattern bits to clear.
Kojto 113:f141b2784e32 1347 * @param[in] matchValue Sync pattern to match.
Kojto 113:f141b2784e32 1348 * @param[in] matchEnable Sync pattern bits to enable for match.
Kojto 113:f141b2784e32 1349 * @param[in] linkjmp Address of descriptor to link to expressed as a
Kojto 113:f141b2784e32 1350 * signed number of descriptors from "here".
Kojto 113:f141b2784e32 1351 * 1=one descriptor forward in memory,
Kojto 113:f141b2784e32 1352 * 0=one this descriptor,
Kojto 113:f141b2784e32 1353 * -1=one descriptor back in memory.
Kojto 113:f141b2784e32 1354 */
<> 128:9bcdf88f62b0 1355 #define LDMA_DESCRIPTOR_LINKREL_SYNC(set, clr, matchValue, matchEnable, linkjmp) \
<> 128:9bcdf88f62b0 1356 { \
<> 128:9bcdf88f62b0 1357 .sync = \
<> 128:9bcdf88f62b0 1358 { \
<> 128:9bcdf88f62b0 1359 .structType = ldmaCtrlStructTypeSync, \
<> 128:9bcdf88f62b0 1360 .structReq = 1, \
<> 128:9bcdf88f62b0 1361 .xferCnt = 0, \
<> 128:9bcdf88f62b0 1362 .byteSwap = 0, \
<> 128:9bcdf88f62b0 1363 .blockSize = 0, \
<> 128:9bcdf88f62b0 1364 .doneIfs = 0, \
<> 128:9bcdf88f62b0 1365 .reqMode = 0, \
<> 128:9bcdf88f62b0 1366 .decLoopCnt = 0, \
<> 128:9bcdf88f62b0 1367 .ignoreSrec = 0, \
<> 128:9bcdf88f62b0 1368 .srcInc = 0, \
<> 128:9bcdf88f62b0 1369 .size = 0, \
<> 128:9bcdf88f62b0 1370 .dstInc = 0, \
<> 128:9bcdf88f62b0 1371 .srcAddrMode = 0, \
<> 128:9bcdf88f62b0 1372 .dstAddrMode = 0, \
<> 128:9bcdf88f62b0 1373 .syncSet = (set), \
<> 128:9bcdf88f62b0 1374 .syncClr = (clr), \
<> 128:9bcdf88f62b0 1375 .matchVal = (matchValue), \
<> 128:9bcdf88f62b0 1376 .matchEn = (matchEnable), \
<> 128:9bcdf88f62b0 1377 .linkMode = ldmaLinkModeRel, \
<> 128:9bcdf88f62b0 1378 .link = 1, \
<> 128:9bcdf88f62b0 1379 .linkAddr = (linkjmp) * 4 \
<> 128:9bcdf88f62b0 1380 } \
Kojto 113:f141b2784e32 1381 }
Kojto 113:f141b2784e32 1382
Kojto 113:f141b2784e32 1383 /*******************************************************************************
Kojto 113:f141b2784e32 1384 ***************************** PROTOTYPES **********************************
Kojto 113:f141b2784e32 1385 ******************************************************************************/
Kojto 113:f141b2784e32 1386
<> 128:9bcdf88f62b0 1387 void LDMA_DeInit(void);
<> 128:9bcdf88f62b0 1388 void LDMA_EnableChannelRequest(int ch, bool enable);
<> 128:9bcdf88f62b0 1389 void LDMA_Init(const LDMA_Init_t *init);
<> 128:9bcdf88f62b0 1390 void LDMA_StartTransfer(int ch,
<> 128:9bcdf88f62b0 1391 const LDMA_TransferCfg_t *transfer,
<> 128:9bcdf88f62b0 1392 const LDMA_Descriptor_t *descriptor);
<> 128:9bcdf88f62b0 1393 void LDMA_StopTransfer(int ch);
<> 128:9bcdf88f62b0 1394 bool LDMA_TransferDone(int ch);
<> 128:9bcdf88f62b0 1395 uint32_t LDMA_TransferRemainingCount(int ch);
Kojto 113:f141b2784e32 1396
Kojto 113:f141b2784e32 1397
Kojto 113:f141b2784e32 1398 /***************************************************************************//**
Kojto 113:f141b2784e32 1399 * @brief
Kojto 113:f141b2784e32 1400 * Clear one or more pending LDMA interrupts.
Kojto 113:f141b2784e32 1401 *
Kojto 113:f141b2784e32 1402 * @param[in] flags
Kojto 113:f141b2784e32 1403 * Pending LDMA interrupt sources to clear. Use one or more valid
<> 128:9bcdf88f62b0 1404 * interrupt flags for the LDMA module. The flags are @ref LDMA_IFC_ERROR
<> 128:9bcdf88f62b0 1405 * and one done flag for each channel.
Kojto 113:f141b2784e32 1406 ******************************************************************************/
Kojto 113:f141b2784e32 1407 __STATIC_INLINE void LDMA_IntClear(uint32_t flags)
Kojto 113:f141b2784e32 1408 {
Kojto 113:f141b2784e32 1409 LDMA->IFC = flags;
Kojto 113:f141b2784e32 1410 }
Kojto 113:f141b2784e32 1411
Kojto 113:f141b2784e32 1412
Kojto 113:f141b2784e32 1413 /***************************************************************************//**
Kojto 113:f141b2784e32 1414 * @brief
Kojto 113:f141b2784e32 1415 * Disable one or more LDMA interrupts.
Kojto 113:f141b2784e32 1416 *
Kojto 113:f141b2784e32 1417 * @param[in] flags
Kojto 113:f141b2784e32 1418 * LDMA interrupt sources to disable. Use one or more valid
<> 128:9bcdf88f62b0 1419 * interrupt flags for the LDMA module. The flags are @ref LDMA_IEN_ERROR
<> 128:9bcdf88f62b0 1420 * and one done flag for each channel.
Kojto 113:f141b2784e32 1421 ******************************************************************************/
Kojto 113:f141b2784e32 1422 __STATIC_INLINE void LDMA_IntDisable(uint32_t flags)
Kojto 113:f141b2784e32 1423 {
Kojto 113:f141b2784e32 1424 LDMA->IEN &= ~flags;
Kojto 113:f141b2784e32 1425 }
Kojto 113:f141b2784e32 1426
Kojto 113:f141b2784e32 1427
Kojto 113:f141b2784e32 1428 /***************************************************************************//**
Kojto 113:f141b2784e32 1429 * @brief
Kojto 113:f141b2784e32 1430 * Enable one or more LDMA interrupts.
Kojto 113:f141b2784e32 1431 *
Kojto 113:f141b2784e32 1432 * @note
Kojto 113:f141b2784e32 1433 * Depending on the use, a pending interrupt may already be set prior to
Kojto 113:f141b2784e32 1434 * enabling the interrupt. Consider using LDMA_IntClear() prior to enabling
Kojto 113:f141b2784e32 1435 * if such a pending interrupt should be ignored.
Kojto 113:f141b2784e32 1436 *
Kojto 113:f141b2784e32 1437 * @param[in] flags
Kojto 113:f141b2784e32 1438 * LDMA interrupt sources to enable. Use one or more valid
<> 128:9bcdf88f62b0 1439 * interrupt flags for the LDMA module. The flags are @ref LDMA_IEN_ERROR
<> 128:9bcdf88f62b0 1440 * and one done flag for each channel.
Kojto 113:f141b2784e32 1441 ******************************************************************************/
Kojto 113:f141b2784e32 1442 __STATIC_INLINE void LDMA_IntEnable(uint32_t flags)
Kojto 113:f141b2784e32 1443 {
Kojto 113:f141b2784e32 1444 LDMA->IEN |= flags;
Kojto 113:f141b2784e32 1445 }
Kojto 113:f141b2784e32 1446
Kojto 113:f141b2784e32 1447
Kojto 113:f141b2784e32 1448 /***************************************************************************//**
Kojto 113:f141b2784e32 1449 * @brief
Kojto 113:f141b2784e32 1450 * Get pending LDMA interrupt flags.
Kojto 113:f141b2784e32 1451 *
Kojto 113:f141b2784e32 1452 * @note
Kojto 113:f141b2784e32 1453 * The event bits are not cleared by the use of this function.
Kojto 113:f141b2784e32 1454 *
Kojto 113:f141b2784e32 1455 * @return
Kojto 113:f141b2784e32 1456 * LDMA interrupt sources pending. Returns one or more valid
<> 128:9bcdf88f62b0 1457 * interrupt flags for the LDMA module. The flags are @ref LDMA_IF_ERROR and
<> 128:9bcdf88f62b0 1458 * one flag for each LDMA channel.
Kojto 113:f141b2784e32 1459 ******************************************************************************/
Kojto 113:f141b2784e32 1460 __STATIC_INLINE uint32_t LDMA_IntGet(void)
Kojto 113:f141b2784e32 1461 {
Kojto 113:f141b2784e32 1462 return LDMA->IF;
Kojto 113:f141b2784e32 1463 }
Kojto 113:f141b2784e32 1464
Kojto 113:f141b2784e32 1465
Kojto 113:f141b2784e32 1466 /***************************************************************************//**
Kojto 113:f141b2784e32 1467 * @brief
Kojto 113:f141b2784e32 1468 * Get enabled and pending LDMA interrupt flags.
Kojto 113:f141b2784e32 1469 * Useful for handling more interrupt sources in the same interrupt handler.
Kojto 113:f141b2784e32 1470 *
Kojto 113:f141b2784e32 1471 * @note
Kojto 113:f141b2784e32 1472 * Interrupt flags are not cleared by the use of this function.
Kojto 113:f141b2784e32 1473 *
Kojto 113:f141b2784e32 1474 * @return
Kojto 113:f141b2784e32 1475 * Pending and enabled LDMA interrupt sources
Kojto 113:f141b2784e32 1476 * The return value is the bitwise AND of
Kojto 113:f141b2784e32 1477 * - the enabled interrupt sources in LDMA_IEN and
Kojto 113:f141b2784e32 1478 * - the pending interrupt flags LDMA_IF
Kojto 113:f141b2784e32 1479 ******************************************************************************/
Kojto 113:f141b2784e32 1480 __STATIC_INLINE uint32_t LDMA_IntGetEnabled(void)
Kojto 113:f141b2784e32 1481 {
Kojto 113:f141b2784e32 1482 uint32_t ien;
Kojto 113:f141b2784e32 1483
Kojto 113:f141b2784e32 1484 ien = LDMA->IEN;
Kojto 113:f141b2784e32 1485 return LDMA->IF & ien;
Kojto 113:f141b2784e32 1486 }
Kojto 113:f141b2784e32 1487
Kojto 113:f141b2784e32 1488
Kojto 113:f141b2784e32 1489 /***************************************************************************//**
Kojto 113:f141b2784e32 1490 * @brief
Kojto 113:f141b2784e32 1491 * Set one or more pending LDMA interrupts
Kojto 113:f141b2784e32 1492 *
Kojto 113:f141b2784e32 1493 * @param[in] flags
Kojto 113:f141b2784e32 1494 * LDMA interrupt sources to set to pending. Use one or more valid
<> 128:9bcdf88f62b0 1495 * interrupt flags for the LDMA module. The flags are @ref LDMA_IFS_ERROR and
<> 128:9bcdf88f62b0 1496 * one done flag for each LDMA channel.
Kojto 113:f141b2784e32 1497 ******************************************************************************/
Kojto 113:f141b2784e32 1498 __STATIC_INLINE void LDMA_IntSet(uint32_t flags)
Kojto 113:f141b2784e32 1499 {
Kojto 113:f141b2784e32 1500 LDMA->IFS = flags;
Kojto 113:f141b2784e32 1501 }
Kojto 113:f141b2784e32 1502
Kojto 113:f141b2784e32 1503 /** @} (end addtogroup LDMA) */
<> 128:9bcdf88f62b0 1504 /** @} (end addtogroup emlib) */
Kojto 113:f141b2784e32 1505
Kojto 113:f141b2784e32 1506 #ifdef __cplusplus
Kojto 113:f141b2784e32 1507 }
Kojto 113:f141b2784e32 1508 #endif
Kojto 113:f141b2784e32 1509
Kojto 113:f141b2784e32 1510 #endif /* defined( LDMA_PRESENT ) && ( LDMA_COUNT == 1 ) */
<> 128:9bcdf88f62b0 1511 #endif /* EM_LDMA_H */