The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
Anna Bridge
Date:
Fri Apr 28 13:09:19 2017 +0100
Revision:
141:794e51388b66
Parent:
128:9bcdf88f62b0
Child:
145:64910690c574
Release 141 of the mbed library

Ports for Upcoming Targets


Fixes and Changes

4008: [NUC472/M453] Support Bootloader and FlashIAP https://github.com/ARMmbed/mbed-os/pull/4008
4102: Add SCL and SDA defs for I2C[0-2]; redefine I2C_[SCL,SDA] to I2C2 https://github.com/ARMmbed/mbed-os/pull/4102
4118: STM32F4 Internal ADC channels rework https://github.com/ARMmbed/mbed-os/pull/4118
4126: STM32F4 : remove SERIAL_TX and SERIAL_RX from available pins https://github.com/ARMmbed/mbed-os/pull/4126
4148: Revert "STM32F4 Internal ADC channels rework" https://github.com/ARMmbed/mbed-os/pull/4148
4152: STM32F4 Internal ADC channels rework https://github.com/ARMmbed/mbed-os/pull/4152
4074: [Silicon Labs] Update pinout https://github.com/ARMmbed/mbed-os/pull/4074
4133: U-BLOX_C030: Default XTAL is now 12MHz onboard. Option to use Debug 8MHz https://github.com/ARMmbed/mbed-os/pull/4133
4142: EFM32: Fixed `pwmout_all_inactive` being inversed https://github.com/ARMmbed/mbed-os/pull/4142
4016: [NRF5]: fix rtc overflow-while-set-timestamp issue https://github.com/ARMmbed/mbed-os/pull/4016
4031: STM32 increase IAR heap size for big RAM targets https://github.com/ARMmbed/mbed-os/pull/4031
4137: MCUXpresso: Update ARM linker files to eliminate reserving RAM for stack & heap https://github.com/ARMmbed/mbed-os/pull/4137
4176: STM32L4 Internal ADC channels rework https://github.com/ARMmbed/mbed-os/pull/4176
4154: STM32F7 Internal ADC channels rework https://github.com/ARMmbed/mbed-os/pull/4154
4174: [NRF52840]: fix rtc overflow-while-set-timestamp issue https://github.com/ARMmbed/mbed-os/pull/4174
4180: [UBLOX_C030] create target hierarchy for the specific versions of the C030 board https://github.com/ARMmbed/mbed-os/pull/4180
4153: STM32F2: Internal ADC channels rework https://github.com/ARMmbed/mbed-os/pull/4153

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /***************************************************************************//**
<> 128:9bcdf88f62b0 2 * @file objects.h
<> 128:9bcdf88f62b0 3 *******************************************************************************
<> 128:9bcdf88f62b0 4 * @section License
<> 128:9bcdf88f62b0 5 * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
<> 128:9bcdf88f62b0 6 *******************************************************************************
<> 128:9bcdf88f62b0 7 *
<> 128:9bcdf88f62b0 8 * SPDX-License-Identifier: Apache-2.0
<> 128:9bcdf88f62b0 9 *
<> 128:9bcdf88f62b0 10 * Licensed under the Apache License, Version 2.0 (the "License"); you may
<> 128:9bcdf88f62b0 11 * not use this file except in compliance with the License.
<> 128:9bcdf88f62b0 12 * You may obtain a copy of the License at
<> 128:9bcdf88f62b0 13 *
<> 128:9bcdf88f62b0 14 * http://www.apache.org/licenses/LICENSE-2.0
<> 128:9bcdf88f62b0 15 *
<> 128:9bcdf88f62b0 16 * Unless required by applicable law or agreed to in writing, software
<> 128:9bcdf88f62b0 17 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
<> 128:9bcdf88f62b0 18 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 128:9bcdf88f62b0 19 * See the License for the specific language governing permissions and
<> 128:9bcdf88f62b0 20 * limitations under the License.
<> 128:9bcdf88f62b0 21 *
<> 128:9bcdf88f62b0 22 ******************************************************************************/
<> 128:9bcdf88f62b0 23
<> 128:9bcdf88f62b0 24 #ifndef MBED_OBJECTS_H
<> 128:9bcdf88f62b0 25 #define MBED_OBJECTS_H
<> 128:9bcdf88f62b0 26
<> 128:9bcdf88f62b0 27 #include "PinNames.h"
<> 128:9bcdf88f62b0 28 #include "PeripheralNames.h"
<> 128:9bcdf88f62b0 29 #include "PortNames.h"
<> 128:9bcdf88f62b0 30 #include "em_i2c.h"
<> 128:9bcdf88f62b0 31 #include "em_dma.h"
<> 128:9bcdf88f62b0 32 #include "em_cmu.h"
<> 128:9bcdf88f62b0 33 #include "dma_api_HAL.h"
<> 128:9bcdf88f62b0 34
<> 128:9bcdf88f62b0 35 #ifdef __cplusplus
<> 128:9bcdf88f62b0 36 extern "C" {
<> 128:9bcdf88f62b0 37 #endif
<> 128:9bcdf88f62b0 38
<> 128:9bcdf88f62b0 39 typedef struct {
<> 128:9bcdf88f62b0 40 PinName pin:8;
<> 128:9bcdf88f62b0 41 PinMode mode:6;
<> 128:9bcdf88f62b0 42 PinDirection dir:2;
<> 128:9bcdf88f62b0 43 } gpio_t;
<> 128:9bcdf88f62b0 44
<> 128:9bcdf88f62b0 45 #if DEVICE_ANALOGIN
<> 128:9bcdf88f62b0 46 struct analogin_s {
<> 128:9bcdf88f62b0 47 ADC_TypeDef *adc;
<> 128:9bcdf88f62b0 48 uint32_t channel;
<> 128:9bcdf88f62b0 49 };
<> 128:9bcdf88f62b0 50 #endif
<> 128:9bcdf88f62b0 51
<> 128:9bcdf88f62b0 52 #if DEVICE_ANALOGOUT
<> 128:9bcdf88f62b0 53 struct dac_s {
<> 128:9bcdf88f62b0 54 DAC_TypeDef *dac;
<> 128:9bcdf88f62b0 55 uint32_t channel;
<> 128:9bcdf88f62b0 56 };
<> 128:9bcdf88f62b0 57 #endif
<> 128:9bcdf88f62b0 58
<> 128:9bcdf88f62b0 59 #if DEVICE_I2C
<> 128:9bcdf88f62b0 60 struct i2c_s {
<> 128:9bcdf88f62b0 61 I2C_TypeDef *i2c;
Anna Bridge 141:794e51388b66 62 uint32_t location;
<> 128:9bcdf88f62b0 63 #if DEVICE_I2C_ASYNCH
<> 128:9bcdf88f62b0 64 uint32_t events;
<> 128:9bcdf88f62b0 65 I2C_TransferSeq_TypeDef xfer;
<> 128:9bcdf88f62b0 66 #endif
<> 128:9bcdf88f62b0 67 };
<> 128:9bcdf88f62b0 68 #endif
<> 128:9bcdf88f62b0 69
<> 128:9bcdf88f62b0 70 #if DEVICE_PORTOUT
<> 128:9bcdf88f62b0 71 struct port_s {
<> 128:9bcdf88f62b0 72 PortName port;
<> 128:9bcdf88f62b0 73 uint32_t mask;
<> 128:9bcdf88f62b0 74 PinDirection dir;
<> 128:9bcdf88f62b0 75 };
<> 128:9bcdf88f62b0 76 #endif
<> 128:9bcdf88f62b0 77
<> 128:9bcdf88f62b0 78 #if DEVICE_PWMOUT
<> 128:9bcdf88f62b0 79 struct pwmout_s {
<> 128:9bcdf88f62b0 80 //Channel on TIMER
<> 128:9bcdf88f62b0 81 uint32_t channel;
<> 128:9bcdf88f62b0 82 PinName pin;
<> 128:9bcdf88f62b0 83 };
<> 128:9bcdf88f62b0 84 #endif
<> 128:9bcdf88f62b0 85
<> 128:9bcdf88f62b0 86 #if DEVICE_INTERRUPTIN
<> 128:9bcdf88f62b0 87 struct gpio_irq_s {
<> 128:9bcdf88f62b0 88 PinName pin:8; // Pin number 4 least significant bits, port number 4 most significant bits
<> 128:9bcdf88f62b0 89 uint32_t risingEdge:1;
<> 128:9bcdf88f62b0 90 uint32_t fallingEdge:1;
<> 128:9bcdf88f62b0 91 };
<> 128:9bcdf88f62b0 92 #endif
<> 128:9bcdf88f62b0 93
<> 128:9bcdf88f62b0 94 #if DEVICE_SERIAL
<> 128:9bcdf88f62b0 95 struct serial_s {
<> 128:9bcdf88f62b0 96 union {
<> 128:9bcdf88f62b0 97 USART_TypeDef *uart;
<> 128:9bcdf88f62b0 98 LEUART_TypeDef *leuart;
<> 128:9bcdf88f62b0 99 } periph;
<> 128:9bcdf88f62b0 100 #ifndef _SILICON_LABS_32B_PLATFORM_2
<> 128:9bcdf88f62b0 101 uint32_t location;
<> 128:9bcdf88f62b0 102 #else
<> 128:9bcdf88f62b0 103 uint32_t location_tx;
<> 128:9bcdf88f62b0 104 uint32_t location_rx;
<> 128:9bcdf88f62b0 105 #endif
<> 128:9bcdf88f62b0 106 PinName rx_pin;
<> 128:9bcdf88f62b0 107 PinName tx_pin;
<> 128:9bcdf88f62b0 108 #if DEVICE_SERIAL_ASYNCH
<> 128:9bcdf88f62b0 109 uint32_t events;
<> 128:9bcdf88f62b0 110 DMA_OPTIONS_t dmaOptionsTX;
<> 128:9bcdf88f62b0 111 DMA_OPTIONS_t dmaOptionsRX;
<> 128:9bcdf88f62b0 112 #endif
<> 128:9bcdf88f62b0 113 uint32_t sleep_blocked;
<> 128:9bcdf88f62b0 114 };
<> 128:9bcdf88f62b0 115 #endif
<> 128:9bcdf88f62b0 116
<> 128:9bcdf88f62b0 117 #if DEVICE_SPI
<> 128:9bcdf88f62b0 118 struct spi_s {
<> 128:9bcdf88f62b0 119 USART_TypeDef *spi;
Anna Bridge 141:794e51388b66 120 uint32_t location;
Anna Bridge 141:794e51388b66 121 uint32_t route;
<> 128:9bcdf88f62b0 122 uint8_t bits;
<> 128:9bcdf88f62b0 123 uint8_t master;
<> 128:9bcdf88f62b0 124 #if DEVICE_SPI_ASYNCH
<> 128:9bcdf88f62b0 125 uint32_t event;
<> 128:9bcdf88f62b0 126 DMA_OPTIONS_t dmaOptionsTX;
<> 128:9bcdf88f62b0 127 DMA_OPTIONS_t dmaOptionsRX;
<> 128:9bcdf88f62b0 128 #endif
<> 128:9bcdf88f62b0 129 };
<> 128:9bcdf88f62b0 130 #endif
<> 128:9bcdf88f62b0 131
<> 128:9bcdf88f62b0 132 #if DEVICE_RTC
<> 128:9bcdf88f62b0 133 struct lp_timer_s {
<> 128:9bcdf88f62b0 134 uint32_t start;
<> 128:9bcdf88f62b0 135 uint32_t stop;
<> 128:9bcdf88f62b0 136 };
<> 128:9bcdf88f62b0 137 #endif
<> 128:9bcdf88f62b0 138
<> 128:9bcdf88f62b0 139 #if DEVICE_SLEEP
<> 128:9bcdf88f62b0 140 #define NUM_SLEEP_MODES 5
<> 128:9bcdf88f62b0 141 typedef enum {
<> 128:9bcdf88f62b0 142 EM0 = 0,
<> 128:9bcdf88f62b0 143 EM1 = 1,
<> 128:9bcdf88f62b0 144 EM2 = 2,
<> 128:9bcdf88f62b0 145 EM3 = 3,
<> 128:9bcdf88f62b0 146 EM4 = 4
<> 128:9bcdf88f62b0 147 } sleepstate_enum;
<> 128:9bcdf88f62b0 148 #endif
<> 128:9bcdf88f62b0 149
<> 128:9bcdf88f62b0 150
<> 128:9bcdf88f62b0 151 #ifdef __cplusplus
<> 128:9bcdf88f62b0 152 }
<> 128:9bcdf88f62b0 153 #endif
<> 128:9bcdf88f62b0 154
<> 128:9bcdf88f62b0 155 #endif